VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp@ 16691

Last change on this file since 16691 was 15428, checked in by vboxsync, 16 years ago

PGM: PGMDynMapHCPageOff -> pgmDynMapHCPageOff, making it internal and faster.

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1/* $Id: PGMAllPhys.cpp 15428 2008-12-13 10:02:55Z vboxsync $ */
2/** @file
3 * PGM - Page Manager and Monitor, Physical Memory Addressing.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22/*******************************************************************************
23* Defined Constants And Macros *
24*******************************************************************************/
25/** @def PGM_IGNORE_RAM_FLAGS_RESERVED
26 * Don't respect the MM_RAM_FLAGS_RESERVED flag when converting to HC addresses.
27 *
28 * Since this flag is currently incorrectly kept set for ROM regions we will
29 * have to ignore it for now so we don't break stuff.
30 *
31 * @todo this has been fixed now I believe, remove this hack.
32 */
33#define PGM_IGNORE_RAM_FLAGS_RESERVED
34
35
36/*******************************************************************************
37* Header Files *
38*******************************************************************************/
39#define LOG_GROUP LOG_GROUP_PGM_PHYS
40#include <VBox/pgm.h>
41#include <VBox/trpm.h>
42#include <VBox/vmm.h>
43#include <VBox/iom.h>
44#include <VBox/em.h>
45#include <VBox/rem.h>
46#include "PGMInternal.h"
47#include <VBox/vm.h>
48#include <VBox/param.h>
49#include <VBox/err.h>
50#include <iprt/assert.h>
51#include <iprt/string.h>
52#include <iprt/asm.h>
53#include <VBox/log.h>
54#ifdef IN_RING3
55# include <iprt/thread.h>
56#endif
57
58
59
60#ifndef IN_RING3
61
62/**
63 * \#PF Handler callback for Guest ROM range write access.
64 * We simply ignore the writes or fall back to the recompiler if we don't support the instruction.
65 *
66 * @returns VBox status code (appropritate for trap handling and GC return).
67 * @param pVM VM Handle.
68 * @param uErrorCode CPU Error code.
69 * @param pRegFrame Trap register frame.
70 * @param pvFault The fault address (cr2).
71 * @param GCPhysFault The GC physical address corresponding to pvFault.
72 * @param pvUser User argument. Pointer to the ROM range structure.
73 */
74VMMDECL(int) pgmPhysRomWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void *pvFault, RTGCPHYS GCPhysFault, void *pvUser)
75{
76 int rc;
77#ifdef VBOX_WITH_NEW_PHYS_CODE
78 PPGMROMRANGE pRom = (PPGMROMRANGE)pvUser;
79 uint32_t iPage = GCPhysFault - pRom->GCPhys;
80 Assert(iPage < (pRom->cb >> PAGE_SHIFT));
81 switch (pRom->aPages[iPage].enmProt)
82 {
83 case PGMROMPROT_READ_ROM_WRITE_IGNORE:
84 case PGMROMPROT_READ_RAM_WRITE_IGNORE:
85 {
86#endif
87 /*
88 * If it's a simple instruction which doesn't change the cpu state
89 * we will simply skip it. Otherwise we'll have to defer it to REM.
90 */
91 uint32_t cbOp;
92 DISCPUSTATE Cpu;
93 rc = EMInterpretDisasOne(pVM, pRegFrame, &Cpu, &cbOp);
94 if ( RT_SUCCESS(rc)
95 && Cpu.mode == CPUMODE_32BIT /** @todo why does this matter? */
96 && !(Cpu.prefix & (PREFIX_REPNE | PREFIX_REP | PREFIX_SEG)))
97 {
98 switch (Cpu.opcode)
99 {
100 /** @todo Find other instructions we can safely skip, possibly
101 * adding this kind of detection to DIS or EM. */
102 case OP_MOV:
103 pRegFrame->rip += cbOp;
104 STAM_COUNTER_INC(&pVM->pgm.s.StatRZGuestROMWriteHandled);
105 return VINF_SUCCESS;
106 }
107 }
108 else if (RT_UNLIKELY(rc == VERR_INTERNAL_ERROR))
109 return rc;
110#ifdef VBOX_WITH_NEW_PHYS_CODE
111 break;
112 }
113
114 case PGMROMPROT_READ_RAM_WRITE_RAM:
115 rc = PGMHandlerPhysicalPageTempOff(pVM, pRom->GCPhys, GCPhysFault & X86_PTE_PG_MASK);
116 AssertRC(rc);
117 case PGMROMPROT_READ_ROM_WRITE_RAM:
118 /* Handle it in ring-3 because it's *way* easier there. */
119 break;
120
121 default:
122 AssertMsgFailedReturn(("enmProt=%d iPage=%d GCPhysFault=%RGp\n",
123 pRom->aPages[iPage].enmProt, iPage, GCPhysFault),
124 VERR_INTERNAL_ERROR);
125 }
126#endif
127
128 STAM_COUNTER_INC(&pVM->pgm.s.StatRZGuestROMWriteUnhandled);
129 return VINF_EM_RAW_EMULATE_INSTR;
130}
131
132#endif /* IN_RING3 */
133
134/**
135 * Checks if Address Gate 20 is enabled or not.
136 *
137 * @returns true if enabled.
138 * @returns false if disabled.
139 * @param pVM VM handle.
140 */
141VMMDECL(bool) PGMPhysIsA20Enabled(PVM pVM)
142{
143 LogFlow(("PGMPhysIsA20Enabled %d\n", pVM->pgm.s.fA20Enabled));
144 return !!pVM->pgm.s.fA20Enabled ; /* stupid MS compiler doesn't trust me. */
145}
146
147
148/**
149 * Validates a GC physical address.
150 *
151 * @returns true if valid.
152 * @returns false if invalid.
153 * @param pVM The VM handle.
154 * @param GCPhys The physical address to validate.
155 */
156VMMDECL(bool) PGMPhysIsGCPhysValid(PVM pVM, RTGCPHYS GCPhys)
157{
158 PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhys);
159 return pPage != NULL;
160}
161
162
163/**
164 * Checks if a GC physical address is a normal page,
165 * i.e. not ROM, MMIO or reserved.
166 *
167 * @returns true if normal.
168 * @returns false if invalid, ROM, MMIO or reserved page.
169 * @param pVM The VM handle.
170 * @param GCPhys The physical address to check.
171 */
172VMMDECL(bool) PGMPhysIsGCPhysNormal(PVM pVM, RTGCPHYS GCPhys)
173{
174 PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhys);
175 return pPage
176 && !(pPage->HCPhys & (MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO2));
177}
178
179
180/**
181 * Converts a GC physical address to a HC physical address.
182 *
183 * @returns VINF_SUCCESS on success.
184 * @returns VERR_PGM_PHYS_PAGE_RESERVED it it's a valid GC physical
185 * page but has no physical backing.
186 * @returns VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid
187 * GC physical address.
188 *
189 * @param pVM The VM handle.
190 * @param GCPhys The GC physical address to convert.
191 * @param pHCPhys Where to store the HC physical address on success.
192 */
193VMMDECL(int) PGMPhysGCPhys2HCPhys(PVM pVM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys)
194{
195 PPGMPAGE pPage;
196 int rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhys, &pPage);
197 if (RT_FAILURE(rc))
198 return rc;
199
200#ifndef PGM_IGNORE_RAM_FLAGS_RESERVED
201 if (RT_UNLIKELY(pPage->HCPhys & MM_RAM_FLAGS_RESERVED)) /** @todo PAGE FLAGS */
202 return VERR_PGM_PHYS_PAGE_RESERVED;
203#endif
204
205 *pHCPhys = PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK);
206 return VINF_SUCCESS;
207}
208
209
210/**
211 * Invalidates the GC page mapping TLB.
212 *
213 * @param pVM The VM handle.
214 */
215VMMDECL(void) PGMPhysInvalidatePageGCMapTLB(PVM pVM)
216{
217 /* later */
218 NOREF(pVM);
219}
220
221
222/**
223 * Invalidates the ring-0 page mapping TLB.
224 *
225 * @param pVM The VM handle.
226 */
227VMMDECL(void) PGMPhysInvalidatePageR0MapTLB(PVM pVM)
228{
229 PGMPhysInvalidatePageR3MapTLB(pVM);
230}
231
232
233/**
234 * Invalidates the ring-3 page mapping TLB.
235 *
236 * @param pVM The VM handle.
237 */
238VMMDECL(void) PGMPhysInvalidatePageR3MapTLB(PVM pVM)
239{
240 pgmLock(pVM);
241 for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.PhysTlbHC.aEntries); i++)
242 {
243 pVM->pgm.s.PhysTlbHC.aEntries[i].GCPhys = NIL_RTGCPHYS;
244 pVM->pgm.s.PhysTlbHC.aEntries[i].pPage = 0;
245 pVM->pgm.s.PhysTlbHC.aEntries[i].pMap = 0;
246 pVM->pgm.s.PhysTlbHC.aEntries[i].pv = 0;
247 }
248 pgmUnlock(pVM);
249}
250
251
252/**
253 * Frees the specified RAM page.
254 *
255 * This is used by ballooning and remapping MMIO2.
256 *
257 * @param pVM Pointer to the shared VM structure.
258 * @param pPage Pointer to the page structure.
259 * @param GCPhys The guest physical address of the page, if applicable.
260 */
261void pgmPhysFreePage(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys)
262{
263 AssertFatal(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_RAM);
264
265 /** @todo implement this... */
266 AssertFatalFailed();
267}
268
269
270/**
271 * Makes sure that there is at least one handy page ready for use.
272 *
273 * This will also take the appropriate actions when reaching water-marks.
274 *
275 * @returns The following VBox status codes.
276 * @retval VINF_SUCCESS on success.
277 * @retval VERR_EM_NO_MEMORY if we're really out of memory.
278 *
279 * @param pVM The VM handle.
280 *
281 * @remarks Must be called from within the PGM critical section. It may
282 * nip back to ring-3/0 in some cases.
283 */
284static int pgmPhysEnsureHandyPage(PVM pVM)
285{
286 /** @remarks
287 * low-water mark logic for R0 & GC:
288 * - 75%: Set FF.
289 * - 50%: Force return to ring-3 ASAP.
290 *
291 * For ring-3 there is a little problem wrt to the recompiler, so:
292 * - 75%: Set FF.
293 * - 50%: Try allocate pages; on failure we'll force REM to quite ASAP.
294 *
295 * The basic idea is that we should be able to get out of any situation with
296 * only 50% of handy pages remaining.
297 *
298 * At the moment we'll not adjust the number of handy pages relative to the
299 * actual VM RAM committment, that's too much work for now.
300 */
301 Assert(pVM->pgm.s.cHandyPages <= RT_ELEMENTS(pVM->pgm.s.aHandyPages));
302 if ( !pVM->pgm.s.cHandyPages
303#ifdef IN_RING3
304 || pVM->pgm.s.cHandyPages - 1 <= RT_ELEMENTS(pVM->pgm.s.aHandyPages) / 2 /* 50% */
305#endif
306 )
307 {
308 Log(("PGM: cHandyPages=%u out of %u -> allocate more\n", pVM->pgm.s.cHandyPages - 1 <= RT_ELEMENTS(pVM->pgm.s.aHandyPages)));
309#ifdef IN_RING3
310 int rc = SUPCallVMMR0Ex(pVM->pVMR0, VMMR0_DO_PGM_ALLOCATE_HANDY_PAGES, 0, NULL);
311#elif defined(IN_RING0)
312 /** @todo call PGMR0PhysAllocateHandyPages directly - need to make sure we can call kernel code first and deal with the seeding fallback. */
313 int rc = VMMR0CallHost(pVM, VMMCALLHOST_PGM_ALLOCATE_HANDY_PAGES, 0);
314#else
315 int rc = VMMGCCallHost(pVM, VMMCALLHOST_PGM_ALLOCATE_HANDY_PAGES, 0);
316#endif
317 if (RT_UNLIKELY(rc != VINF_SUCCESS))
318 {
319 Assert(rc == VINF_EM_NO_MEMORY);
320 if (!pVM->pgm.s.cHandyPages)
321 {
322 LogRel(("PGM: no more handy pages!\n"));
323 return VERR_EM_NO_MEMORY;
324 }
325 Assert(VM_FF_ISSET(pVM, VM_FF_PGM_NEED_HANDY_PAGES));
326#ifdef IN_RING3
327 REMR3NotifyFF(pVM);
328#else
329 VM_FF_SET(pVM, VM_FF_TO_R3);
330#endif
331 }
332 Assert(pVM->pgm.s.cHandyPages <= RT_ELEMENTS(pVM->pgm.s.aHandyPages));
333 }
334 else if (pVM->pgm.s.cHandyPages - 1 <= (RT_ELEMENTS(pVM->pgm.s.aHandyPages) / 4) * 3) /* 75% */
335 {
336 VM_FF_SET(pVM, VM_FF_PGM_NEED_HANDY_PAGES);
337#ifndef IN_RING3
338 if (pVM->pgm.s.cHandyPages - 1 <= RT_ELEMENTS(pVM->pgm.s.aHandyPages) / 2)
339 {
340 Log(("PGM: VM_FF_TO_R3 - cHandyPages=%u out of %u\n", pVM->pgm.s.cHandyPages - 1 <= RT_ELEMENTS(pVM->pgm.s.aHandyPages)));
341 VM_FF_SET(pVM, VM_FF_TO_R3);
342 }
343#endif
344 }
345
346 return VINF_SUCCESS;
347}
348
349
350/**
351 * Replace a zero or shared page with new page that we can write to.
352 *
353 * @returns The following VBox status codes.
354 * @retval VINF_SUCCESS on success, pPage is modified.
355 * @retval VERR_EM_NO_MEMORY if we're totally out of memory.
356 *
357 * @todo Propagate VERR_EM_NO_MEMORY up the call tree.
358 *
359 * @param pVM The VM address.
360 * @param pPage The physical page tracking structure. This will
361 * be modified on success.
362 * @param GCPhys The address of the page.
363 *
364 * @remarks Must be called from within the PGM critical section. It may
365 * nip back to ring-3/0 in some cases.
366 *
367 * @remarks This function shouldn't really fail, however if it does
368 * it probably means we've screwed up the size of the amount
369 * and/or the low-water mark of handy pages. Or, that some
370 * device I/O is causing a lot of pages to be allocated while
371 * while the host is in a low-memory condition.
372 */
373int pgmPhysAllocPage(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys)
374{
375 /*
376 * Ensure that we've got a page handy, take it and use it.
377 */
378 int rc = pgmPhysEnsureHandyPage(pVM);
379 if (RT_FAILURE(rc))
380 {
381 Assert(rc == VERR_EM_NO_MEMORY);
382 return rc;
383 }
384 AssertMsg(PGM_PAGE_IS_ZERO(pPage) || PGM_PAGE_IS_SHARED(pPage), ("%d %RGp\n", PGM_PAGE_GET_STATE(pPage), GCPhys));
385 Assert(!PGM_PAGE_IS_RESERVED(pPage));
386 Assert(!PGM_PAGE_IS_MMIO(pPage));
387
388 uint32_t iHandyPage = --pVM->pgm.s.cHandyPages;
389 Assert(iHandyPage < RT_ELEMENTS(pVM->pgm.s.aHandyPages));
390 Assert(pVM->pgm.s.aHandyPages[iHandyPage].HCPhysGCPhys != NIL_RTHCPHYS);
391 Assert(!(pVM->pgm.s.aHandyPages[iHandyPage].HCPhysGCPhys & ~X86_PTE_PAE_PG_MASK));
392 Assert(pVM->pgm.s.aHandyPages[iHandyPage].idPage != NIL_GMM_PAGEID);
393 Assert(pVM->pgm.s.aHandyPages[iHandyPage].idSharedPage == NIL_GMM_PAGEID);
394
395 /*
396 * There are one or two action to be taken the next time we allocate handy pages:
397 * - Tell the GMM (global memory manager) what the page is being used for.
398 * (Speeds up replacement operations - sharing and defragmenting.)
399 * - If the current backing is shared, it must be freed.
400 */
401 const RTHCPHYS HCPhys = pVM->pgm.s.aHandyPages[iHandyPage].HCPhysGCPhys;
402 pVM->pgm.s.aHandyPages[iHandyPage].HCPhysGCPhys = GCPhys;
403
404 if (PGM_PAGE_IS_SHARED(pPage))
405 {
406 pVM->pgm.s.aHandyPages[iHandyPage].idSharedPage = PGM_PAGE_GET_PAGEID(pPage);
407 Assert(PGM_PAGE_GET_PAGEID(pPage) != NIL_GMM_PAGEID);
408 VM_FF_SET(pVM, VM_FF_PGM_NEED_HANDY_PAGES);
409
410 Log2(("PGM: Replaced shared page %#x at %RGp with %#x / %RHp\n", PGM_PAGE_GET_PAGEID(pPage),
411 GCPhys, pVM->pgm.s.aHandyPages[iHandyPage].idPage, HCPhys));
412 STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,PageReplaceShared));
413 pVM->pgm.s.cSharedPages--;
414/** @todo err.. what about copying the page content? */
415 }
416 else
417 {
418 Log2(("PGM: Replaced zero page %RGp with %#x / %RHp\n", GCPhys, pVM->pgm.s.aHandyPages[iHandyPage].idPage, HCPhys));
419 STAM_COUNTER_INC(&pVM->pgm.s.StatRZPageReplaceZero);
420 pVM->pgm.s.cZeroPages--;
421/** @todo verify that the handy page is zero! */
422 }
423
424 /*
425 * Do the PGMPAGE modifications.
426 */
427 pVM->pgm.s.cPrivatePages++;
428 PGM_PAGE_SET_HCPHYS(pPage, HCPhys);
429 PGM_PAGE_SET_PAGEID(pPage, pVM->pgm.s.aHandyPages[iHandyPage].idPage);
430 PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ALLOCATED);
431
432 return VINF_SUCCESS;
433}
434
435
436/**
437 * Deal with pages that are not writable, i.e. not in the ALLOCATED state.
438 *
439 * @returns VBox status code.
440 * @retval VINF_SUCCESS on success.
441 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
442 *
443 * @param pVM The VM address.
444 * @param pPage The physical page tracking structure.
445 * @param GCPhys The address of the page.
446 *
447 * @remarks Called from within the PGM critical section.
448 */
449int pgmPhysPageMakeWritable(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys)
450{
451 switch (PGM_PAGE_GET_STATE(pPage))
452 {
453 case PGM_PAGE_STATE_WRITE_MONITORED:
454 PGM_PAGE_SET_WRITTEN_TO(pPage);
455 PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ALLOCATED);
456 /* fall thru */
457 default: /* to shut up GCC */
458 case PGM_PAGE_STATE_ALLOCATED:
459 return VINF_SUCCESS;
460
461 /*
462 * Zero pages can be dummy pages for MMIO or reserved memory,
463 * so we need to check the flags before joining cause with
464 * shared page replacement.
465 */
466 case PGM_PAGE_STATE_ZERO:
467 if ( PGM_PAGE_IS_MMIO(pPage)
468 || PGM_PAGE_IS_RESERVED(pPage))
469 return VERR_PGM_PHYS_PAGE_RESERVED;
470 /* fall thru */
471 case PGM_PAGE_STATE_SHARED:
472 return pgmPhysAllocPage(pVM, pPage, GCPhys);
473 }
474}
475
476
477/**
478 * Maps a page into the current virtual address space so it can be accessed.
479 *
480 * @returns VBox status code.
481 * @retval VINF_SUCCESS on success.
482 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
483 *
484 * @param pVM The VM address.
485 * @param pPage The physical page tracking structure.
486 * @param GCPhys The address of the page.
487 * @param ppMap Where to store the address of the mapping tracking structure.
488 * @param ppv Where to store the mapping address of the page. The page
489 * offset is masked off!
490 *
491 * @remarks Called from within the PGM critical section.
492 */
493int pgmPhysPageMap(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, PPPGMPAGEMAP ppMap, void **ppv)
494{
495#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
496 /*
497 * Just some sketchy GC/R0-darwin code.
498 */
499 *ppMap = NULL;
500 RTHCPHYS HCPhys = PGM_PAGE_GET_HCPHYS(pPage);
501 Assert(HCPhys != pVM->pgm.s.HCPhysZeroPg);
502# ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
503 pgmR0DynMapHCPageInlined(&pVM->pgm.s, HCPhys, ppv);
504# else
505 PGMDynMapHCPage(pVM, HCPhys, ppv);
506# endif
507 return VINF_SUCCESS;
508
509#else /* IN_RING3 || IN_RING0 */
510
511 /*
512 * Find/make Chunk TLB entry for the mapping chunk.
513 */
514 PPGMCHUNKR3MAP pMap;
515 const uint32_t idChunk = PGM_PAGE_GET_CHUNKID(pPage);
516 PPGMCHUNKR3MAPTLBE pTlbe = &pVM->pgm.s.ChunkR3Map.Tlb.aEntries[PGM_CHUNKR3MAPTLB_IDX(idChunk)];
517 if (pTlbe->idChunk == idChunk)
518 {
519 STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,ChunkR3MapTlbHits));
520 pMap = pTlbe->pChunk;
521 }
522 else if (idChunk != NIL_GMM_CHUNKID)
523 {
524 STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,ChunkR3MapTlbMisses));
525
526 /*
527 * Find the chunk, map it if necessary.
528 */
529 pMap = (PPGMCHUNKR3MAP)RTAvlU32Get(&pVM->pgm.s.ChunkR3Map.pTree, idChunk);
530 if (!pMap)
531 {
532#ifdef IN_RING0
533 int rc = VMMR0CallHost(pVM, VMMCALLHOST_PGM_MAP_CHUNK, idChunk);
534 AssertRCReturn(rc, rc);
535 pMap = (PPGMCHUNKR3MAP)RTAvlU32Get(&pVM->pgm.s.ChunkR3Map.pTree, idChunk);
536 Assert(pMap);
537#else
538 int rc = pgmR3PhysChunkMap(pVM, idChunk, &pMap);
539 if (RT_FAILURE(rc))
540 return rc;
541#endif
542 }
543
544 /*
545 * Enter it into the Chunk TLB.
546 */
547 pTlbe->idChunk = idChunk;
548 pTlbe->pChunk = pMap;
549 pMap->iAge = 0;
550 }
551 else
552 {
553 Assert(PGM_PAGE_IS_ZERO(pPage));
554 *ppv = pVM->pgm.s.CTXALLSUFF(pvZeroPg);
555 *ppMap = NULL;
556 return VINF_SUCCESS;
557 }
558
559 *ppv = (uint8_t *)pMap->pv + (PGM_PAGE_GET_PAGE_IN_CHUNK(pPage) << PAGE_SHIFT);
560 *ppMap = pMap;
561 return VINF_SUCCESS;
562#endif /* IN_RING3 */
563}
564
565
566#if !defined(IN_RC) && !defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
567/**
568 * Load a guest page into the ring-3 physical TLB.
569 *
570 * @returns VBox status code.
571 * @retval VINF_SUCCESS on success
572 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
573 * @param pPGM The PGM instance pointer.
574 * @param GCPhys The guest physical address in question.
575 */
576int pgmPhysPageLoadIntoTlb(PPGM pPGM, RTGCPHYS GCPhys)
577{
578 STAM_COUNTER_INC(&pPGM->CTX_MID_Z(Stat,PageMapTlbMisses));
579
580 /*
581 * Find the ram range.
582 * 99.8% of requests are expected to be in the first range.
583 */
584 PPGMRAMRANGE pRam = pPGM->CTX_SUFF(pRamRanges);
585 RTGCPHYS off = GCPhys - pRam->GCPhys;
586 if (RT_UNLIKELY(off >= pRam->cb))
587 {
588 do
589 {
590 pRam = pRam->CTX_SUFF(pNext);
591 if (!pRam)
592 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
593 off = GCPhys - pRam->GCPhys;
594 } while (off >= pRam->cb);
595 }
596
597 /*
598 * Map the page.
599 * Make a special case for the zero page as it is kind of special.
600 */
601 PPGMPAGE pPage = &pRam->aPages[off >> PAGE_SHIFT];
602 PPGMPAGEMAPTLBE pTlbe = &pPGM->CTXSUFF(PhysTlb).aEntries[PGM_PAGEMAPTLB_IDX(GCPhys)];
603 if (!PGM_PAGE_IS_ZERO(pPage))
604 {
605 void *pv;
606 PPGMPAGEMAP pMap;
607 int rc = pgmPhysPageMap(PGM2VM(pPGM), pPage, GCPhys, &pMap, &pv);
608 if (RT_FAILURE(rc))
609 return rc;
610 pTlbe->pMap = pMap;
611 pTlbe->pv = pv;
612 }
613 else
614 {
615 Assert(PGM_PAGE_GET_HCPHYS(pPage) == pPGM->HCPhysZeroPg);
616 pTlbe->pMap = NULL;
617 pTlbe->pv = pPGM->CTXALLSUFF(pvZeroPg);
618 }
619 pTlbe->pPage = pPage;
620 return VINF_SUCCESS;
621}
622#endif /* !IN_RC && !VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
623
624
625/**
626 * Requests the mapping of a guest page into the current context.
627 *
628 * This API should only be used for very short term, as it will consume
629 * scarse resources (R0 and GC) in the mapping cache. When you're done
630 * with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
631 *
632 * This API will assume your intention is to write to the page, and will
633 * therefore replace shared and zero pages. If you do not intend to modify
634 * the page, use the PGMPhysGCPhys2CCPtrReadOnly() API.
635 *
636 * @returns VBox status code.
637 * @retval VINF_SUCCESS on success.
638 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
639 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
640 *
641 * @param pVM The VM handle.
642 * @param GCPhys The guest physical address of the page that should be mapped.
643 * @param ppv Where to store the address corresponding to GCPhys.
644 * @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
645 *
646 * @remark Avoid calling this API from within critical sections (other than
647 * the PGM one) because of the deadlock risk.
648 * @thread Any thread.
649 */
650VMMDECL(int) PGMPhysGCPhys2CCPtr(PVM pVM, RTGCPHYS GCPhys, void **ppv, PPGMPAGEMAPLOCK pLock)
651{
652#ifdef VBOX_WITH_NEW_PHYS_CODE
653# if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
654/** @todo this needs to be fixed, it really ain't right. */
655 /* Until a physical TLB is implemented for GC or/and R0-darwin, let PGMDynMapGCPageEx handle it. */
656 return PGMDynMapGCPageOff(pVM, GCPhys, ppv);
657
658#else
659 int rc = pgmLock(pVM);
660 AssertRCReturn(rc);
661
662 /*
663 * Query the Physical TLB entry for the page (may fail).
664 */
665 PGMPHYSTLBE pTlbe;
666 int rc = pgmPhysPageQueryTlbe(&pVM->pgm.s, GCPhys, &pTlbe);
667 if (RT_SUCCESS(rc))
668 {
669 /*
670 * If the page is shared, the zero page, or being write monitored
671 * it must be converted to an page that's writable if possible.
672 */
673 PPGMPAGE pPage = pTlbe->pPage;
674 if (RT_UNLIKELY(PGM_PAGE_GET_STATE(pPage) != PGM_PAGE_STATE_ALLOCATED))
675 {
676 rc = pgmPhysPageMakeWritable(pVM, pPage, GCPhys);
677 /** @todo stuff is missing here! */
678 }
679 if (RT_SUCCESS(rc))
680 {
681 /*
682 * Now, just perform the locking and calculate the return address.
683 */
684 PPGMPAGEMAP pMap = pTlbe->pMap;
685 pMap->cRefs++;
686 if (RT_LIKELY(pPage->cLocks != PGM_PAGE_MAX_LOCKS))
687 if (RT_UNLIKELY(++pPage->cLocks == PGM_PAGE_MAX_LOCKS))
688 {
689 AssertMsgFailed(("%RGp is entering permanent locked state!\n", GCPhys));
690 pMap->cRefs++; /* Extra ref to prevent it from going away. */
691 }
692
693 *ppv = (void *)((uintptr_t)pTlbe->pv | (GCPhys & PAGE_OFFSET_MASK));
694 pLock->pvPage = pPage;
695 pLock->pvMap = pMap;
696 }
697 }
698
699 pgmUnlock(pVM);
700 return rc;
701
702#endif /* IN_RING3 || IN_RING0 */
703
704#else
705 /*
706 * Temporary fallback code.
707 */
708# if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
709/** @todo @bugref{3202}: check up this path. */
710 return PGMDynMapGCPageOff(pVM, GCPhys, ppv);
711# else
712 return PGMPhysGCPhys2R3Ptr(pVM, GCPhys, 1, (PRTR3PTR)ppv);
713# endif
714#endif
715}
716
717
718/**
719 * Requests the mapping of a guest page into the current context.
720 *
721 * This API should only be used for very short term, as it will consume
722 * scarse resources (R0 and GC) in the mapping cache. When you're done
723 * with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
724 *
725 * @returns VBox status code.
726 * @retval VINF_SUCCESS on success.
727 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
728 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
729 *
730 * @param pVM The VM handle.
731 * @param GCPhys The guest physical address of the page that should be mapped.
732 * @param ppv Where to store the address corresponding to GCPhys.
733 * @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
734 *
735 * @remark Avoid calling this API from within critical sections (other than
736 * the PGM one) because of the deadlock risk.
737 * @thread Any thread.
738 */
739VMMDECL(int) PGMPhysGCPhys2CCPtrReadOnly(PVM pVM, RTGCPHYS GCPhys, void const **ppv, PPGMPAGEMAPLOCK pLock)
740{
741 /** @todo implement this */
742 return PGMPhysGCPhys2CCPtr(pVM, GCPhys, (void **)ppv, pLock);
743}
744
745
746/**
747 * Requests the mapping of a guest page given by virtual address into the current context.
748 *
749 * This API should only be used for very short term, as it will consume
750 * scarse resources (R0 and GC) in the mapping cache. When you're done
751 * with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
752 *
753 * This API will assume your intention is to write to the page, and will
754 * therefore replace shared and zero pages. If you do not intend to modify
755 * the page, use the PGMPhysGCPtr2CCPtrReadOnly() API.
756 *
757 * @returns VBox status code.
758 * @retval VINF_SUCCESS on success.
759 * @retval VERR_PAGE_TABLE_NOT_PRESENT if the page directory for the virtual address isn't present.
760 * @retval VERR_PAGE_NOT_PRESENT if the page at the virtual address isn't present.
761 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
762 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
763 *
764 * @param pVM The VM handle.
765 * @param GCPhys The guest physical address of the page that should be mapped.
766 * @param ppv Where to store the address corresponding to GCPhys.
767 * @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
768 *
769 * @remark Avoid calling this API from within critical sections (other than
770 * the PGM one) because of the deadlock risk.
771 * @thread EMT
772 */
773VMMDECL(int) PGMPhysGCPtr2CCPtr(PVM pVM, RTGCPTR GCPtr, void **ppv, PPGMPAGEMAPLOCK pLock)
774{
775 RTGCPHYS GCPhys;
776 int rc = PGMPhysGCPtr2GCPhys(pVM, GCPtr, &GCPhys);
777 if (RT_SUCCESS(rc))
778 rc = PGMPhysGCPhys2CCPtr(pVM, GCPhys, ppv, pLock);
779 return rc;
780}
781
782
783/**
784 * Requests the mapping of a guest page given by virtual address into the current context.
785 *
786 * This API should only be used for very short term, as it will consume
787 * scarse resources (R0 and GC) in the mapping cache. When you're done
788 * with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
789 *
790 * @returns VBox status code.
791 * @retval VINF_SUCCESS on success.
792 * @retval VERR_PAGE_TABLE_NOT_PRESENT if the page directory for the virtual address isn't present.
793 * @retval VERR_PAGE_NOT_PRESENT if the page at the virtual address isn't present.
794 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
795 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
796 *
797 * @param pVM The VM handle.
798 * @param GCPhys The guest physical address of the page that should be mapped.
799 * @param ppv Where to store the address corresponding to GCPhys.
800 * @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
801 *
802 * @remark Avoid calling this API from within critical sections (other than
803 * the PGM one) because of the deadlock risk.
804 * @thread EMT
805 */
806VMMDECL(int) PGMPhysGCPtr2CCPtrReadOnly(PVM pVM, RTGCPTR GCPtr, void const **ppv, PPGMPAGEMAPLOCK pLock)
807{
808 RTGCPHYS GCPhys;
809 int rc = PGMPhysGCPtr2GCPhys(pVM, GCPtr, &GCPhys);
810 if (RT_SUCCESS(rc))
811 rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, GCPhys, ppv, pLock);
812 return rc;
813}
814
815
816/**
817 * Release the mapping of a guest page.
818 *
819 * This is the counter part of PGMPhysGCPhys2CCPtr, PGMPhysGCPhys2CCPtrReadOnly
820 * PGMPhysGCPtr2CCPtr and PGMPhysGCPtr2CCPtrReadOnly.
821 *
822 * @param pVM The VM handle.
823 * @param pLock The lock structure initialized by the mapping function.
824 */
825VMMDECL(void) PGMPhysReleasePageMappingLock(PVM pVM, PPGMPAGEMAPLOCK pLock)
826{
827#ifdef VBOX_WITH_NEW_PHYS_CODE
828#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
829 /* currently nothing to do here. */
830/* --- postponed
831#elif defined(IN_RING0)
832*/
833
834#else /* IN_RING3 */
835 pgmLock(pVM);
836
837 PPGMPAGE pPage = (PPGMPAGE)pLock->pvPage;
838 Assert(pPage->cLocks >= 1);
839 if (pPage->cLocks != PGM_PAGE_MAX_LOCKS)
840 pPage->cLocks--;
841
842 PPGMCHUNKR3MAP pChunk = (PPGMCHUNKR3MAP)pLock->pvChunk;
843 Assert(pChunk->cRefs >= 1);
844 pChunk->cRefs--;
845 pChunk->iAge = 0;
846
847 pgmUnlock(pVM);
848#endif /* IN_RING3 */
849#else
850 NOREF(pVM);
851 NOREF(pLock);
852#endif
853}
854
855
856/**
857 * Converts a GC physical address to a HC ring-3 pointer.
858 *
859 * @returns VINF_SUCCESS on success.
860 * @returns VERR_PGM_PHYS_PAGE_RESERVED it it's a valid GC physical
861 * page but has no physical backing.
862 * @returns VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid
863 * GC physical address.
864 * @returns VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY if the range crosses
865 * a dynamic ram chunk boundary
866 *
867 * @param pVM The VM handle.
868 * @param GCPhys The GC physical address to convert.
869 * @param cbRange Physical range
870 * @param pR3Ptr Where to store the R3 pointer on success.
871 */
872VMMDECL(int) PGMPhysGCPhys2R3Ptr(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange, PRTR3PTR pR3Ptr)
873{
874#ifdef VBOX_WITH_NEW_PHYS_CODE
875 VM_ASSERT_EMT(pVM); /* no longer safe for use outside the EMT thread! */
876#endif
877
878 if ((GCPhys & PGM_DYNAMIC_CHUNK_BASE_MASK) != ((GCPhys+cbRange-1) & PGM_DYNAMIC_CHUNK_BASE_MASK))
879 {
880 AssertMsgFailed(("%RGp - %RGp crosses a chunk boundary!!\n", GCPhys, GCPhys+cbRange));
881 LogRel(("PGMPhysGCPhys2HCPtr %RGp - %RGp crosses a chunk boundary!!\n", GCPhys, GCPhys+cbRange));
882 return VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY;
883 }
884
885 PPGMRAMRANGE pRam;
886 PPGMPAGE pPage;
887 int rc = pgmPhysGetPageAndRangeEx(&pVM->pgm.s, GCPhys, &pPage, &pRam);
888 if (RT_FAILURE(rc))
889 return rc;
890
891#ifndef PGM_IGNORE_RAM_FLAGS_RESERVED
892 if (RT_UNLIKELY(PGM_PAGE_IS_RESERVED(pPage)))
893 return VERR_PGM_PHYS_PAGE_RESERVED;
894#endif
895
896 RTGCPHYS off = GCPhys - pRam->GCPhys;
897 if (RT_UNLIKELY(off + cbRange > pRam->cb))
898 {
899 AssertMsgFailed(("%RGp - %RGp crosses a chunk boundary!!\n", GCPhys, GCPhys + cbRange));
900 return VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY;
901 }
902
903 if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
904 {
905 unsigned iChunk = (off >> PGM_DYNAMIC_CHUNK_SHIFT);
906#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) /* ASSUMES this is a rare occurence */
907 PRTR3UINTPTR paChunkR3Ptrs = (PRTR3UINTPTR)MMHyperR3ToCC(pVM, pRam->paChunkR3Ptrs);
908 *pR3Ptr = (RTR3PTR)(paChunkR3Ptrs[iChunk] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
909#else
910 *pR3Ptr = (RTR3PTR)(pRam->paChunkR3Ptrs[iChunk] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
911#endif
912 }
913 else if (RT_LIKELY(pRam->pvR3))
914 *pR3Ptr = (RTR3PTR)((RTR3UINTPTR)pRam->pvR3 + off);
915 else
916 return VERR_PGM_PHYS_PAGE_RESERVED;
917 return VINF_SUCCESS;
918}
919
920
921/**
922 * PGMPhysGCPhys2R3Ptr convenience for use with assertions.
923 *
924 * @returns The R3Ptr, NIL_RTR3PTR on failure.
925 * @param pVM The VM handle.
926 * @param GCPhys The GC Physical addresss.
927 * @param cbRange Physical range.
928 */
929VMMDECL(RTR3PTR) PGMPhysGCPhys2R3PtrAssert(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange)
930{
931 RTR3PTR R3Ptr;
932 int rc = PGMPhysGCPhys2R3Ptr(pVM, GCPhys, cbRange, &R3Ptr);
933 if (RT_SUCCESS(rc))
934 return R3Ptr;
935 return NIL_RTR3PTR;
936}
937
938
939/**
940 * Converts a guest pointer to a GC physical address.
941 *
942 * This uses the current CR3/CR0/CR4 of the guest.
943 *
944 * @returns VBox status code.
945 * @param pVM The VM Handle
946 * @param GCPtr The guest pointer to convert.
947 * @param pGCPhys Where to store the GC physical address.
948 */
949VMMDECL(int) PGMPhysGCPtr2GCPhys(PVM pVM, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
950{
951 int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, pGCPhys);
952 if (pGCPhys && RT_SUCCESS(rc))
953 *pGCPhys |= (RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK;
954 return rc;
955}
956
957
958/**
959 * Converts a guest pointer to a HC physical address.
960 *
961 * This uses the current CR3/CR0/CR4 of the guest.
962 *
963 * @returns VBox status code.
964 * @param pVM The VM Handle
965 * @param GCPtr The guest pointer to convert.
966 * @param pHCPhys Where to store the HC physical address.
967 */
968VMMDECL(int) PGMPhysGCPtr2HCPhys(PVM pVM, RTGCPTR GCPtr, PRTHCPHYS pHCPhys)
969{
970 RTGCPHYS GCPhys;
971 int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, &GCPhys);
972 if (RT_SUCCESS(rc))
973 rc = PGMPhysGCPhys2HCPhys(pVM, GCPhys | ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), pHCPhys);
974 return rc;
975}
976
977
978/**
979 * Converts a guest pointer to a R3 pointer.
980 *
981 * This uses the current CR3/CR0/CR4 of the guest.
982 *
983 * @returns VBox status code.
984 * @param pVM The VM Handle
985 * @param GCPtr The guest pointer to convert.
986 * @param pR3Ptr Where to store the R3 virtual address.
987 */
988VMMDECL(int) PGMPhysGCPtr2R3Ptr(PVM pVM, RTGCPTR GCPtr, PRTR3PTR pR3Ptr)
989{
990#ifdef VBOX_WITH_NEW_PHYS_CODE
991 VM_ASSERT_EMT(pVM); /* no longer safe for use outside the EMT thread! */
992#endif
993
994 RTGCPHYS GCPhys;
995 int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, &GCPhys);
996 if (RT_SUCCESS(rc))
997 rc = PGMPhysGCPhys2R3Ptr(pVM, GCPhys | ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), 1 /* we always stay within one page */, pR3Ptr);
998 return rc;
999}
1000
1001
1002/**
1003 * Converts a guest virtual address to a HC ring-3 pointer by specfied CR3 and
1004 * flags.
1005 *
1006 * @returns VBox status code.
1007 * @param pVM The VM Handle
1008 * @param GCPtr The guest pointer to convert.
1009 * @param cr3 The guest CR3.
1010 * @param fFlags Flags used for interpreting the PD correctly: X86_CR4_PSE and X86_CR4_PAE
1011 * @param pR3Ptr Where to store the R3 pointer.
1012 *
1013 * @remark This function is used by the REM at a time where PGM could
1014 * potentially not be in sync. It could also be used by a
1015 * future DBGF API to cpu state independent conversions.
1016 */
1017VMMDECL(int) PGMPhysGCPtr2R3PtrByGstCR3(PVM pVM, RTGCPTR GCPtr, uint64_t cr3, unsigned fFlags, PRTR3PTR pR3Ptr)
1018{
1019#ifdef VBOX_WITH_NEW_PHYS_CODE
1020 VM_ASSERT_EMT(pVM); /* no longer safe for use outside the EMT thread! */
1021#endif
1022 /*
1023 * PAE or 32-bit?
1024 */
1025 Assert(!CPUMIsGuestInLongMode(pVM));
1026
1027 int rc;
1028 if (!(fFlags & X86_CR4_PAE))
1029 {
1030 PX86PD pPD;
1031 rc = PGM_GCPHYS_2_PTR(pVM, cr3 & X86_CR3_PAGE_MASK, &pPD);
1032 if (RT_SUCCESS(rc))
1033 {
1034 X86PDE Pde = pPD->a[(RTGCUINTPTR)GCPtr >> X86_PD_SHIFT];
1035 if (Pde.n.u1Present)
1036 {
1037 if ((fFlags & X86_CR4_PSE) && Pde.b.u1Size)
1038 { /* (big page) */
1039 rc = PGMPhysGCPhys2R3Ptr(pVM, pgmGstGet4MBPhysPage(&pVM->pgm.s, Pde) | ((RTGCUINTPTR)GCPtr & X86_PAGE_4M_OFFSET_MASK),
1040 1 /* we always stay within one page */, pR3Ptr);
1041 }
1042 else
1043 { /* (normal page) */
1044 PX86PT pPT;
1045 rc = PGM_GCPHYS_2_PTR(pVM, Pde.u & X86_PDE_PG_MASK, &pPT);
1046 if (RT_SUCCESS(rc))
1047 {
1048 X86PTE Pte = pPT->a[((RTGCUINTPTR)GCPtr >> X86_PT_SHIFT) & X86_PT_MASK];
1049 if (Pte.n.u1Present)
1050 return PGMPhysGCPhys2R3Ptr(pVM, (Pte.u & X86_PTE_PG_MASK) | ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK),
1051 1 /* we always stay within one page */, pR3Ptr);
1052 rc = VERR_PAGE_NOT_PRESENT;
1053 }
1054 }
1055 }
1056 else
1057 rc = VERR_PAGE_TABLE_NOT_PRESENT;
1058 }
1059 }
1060 else
1061 {
1062 /** @todo long mode! */
1063 Assert(PGMGetGuestMode(pVM) < PGMMODE_AMD64);
1064
1065 PX86PDPT pPdpt;
1066 rc = PGM_GCPHYS_2_PTR(pVM, cr3 & X86_CR3_PAE_PAGE_MASK, &pPdpt);
1067 if (RT_SUCCESS(rc))
1068 {
1069 X86PDPE Pdpe = pPdpt->a[((RTGCUINTPTR)GCPtr >> X86_PDPT_SHIFT) & X86_PDPT_MASK_PAE];
1070 if (Pdpe.n.u1Present)
1071 {
1072 PX86PDPAE pPD;
1073 rc = PGM_GCPHYS_2_PTR(pVM, Pdpe.u & X86_PDPE_PG_MASK, &pPD);
1074 if (RT_SUCCESS(rc))
1075 {
1076 X86PDEPAE Pde = pPD->a[((RTGCUINTPTR)GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK];
1077 if (Pde.n.u1Present)
1078 {
1079 if ((fFlags & X86_CR4_PSE) && Pde.b.u1Size)
1080 { /* (big page) */
1081 rc = PGMPhysGCPhys2R3Ptr(pVM, (Pde.u & X86_PDE2M_PAE_PG_MASK) | ((RTGCUINTPTR)GCPtr & X86_PAGE_2M_OFFSET_MASK),
1082 1 /* we always stay within one page */, pR3Ptr);
1083 }
1084 else
1085 { /* (normal page) */
1086 PX86PTPAE pPT;
1087 rc = PGM_GCPHYS_2_PTR(pVM, (Pde.u & X86_PDE_PAE_PG_MASK), &pPT);
1088 if (RT_SUCCESS(rc))
1089 {
1090 X86PTEPAE Pte = pPT->a[((RTGCUINTPTR)GCPtr >> X86_PT_PAE_SHIFT) & X86_PT_PAE_MASK];
1091 if (Pte.n.u1Present)
1092 return PGMPhysGCPhys2R3Ptr(pVM, (Pte.u & X86_PTE_PAE_PG_MASK) | ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK),
1093 1 /* we always stay within one page */, pR3Ptr);
1094 rc = VERR_PAGE_NOT_PRESENT;
1095 }
1096 }
1097 }
1098 else
1099 rc = VERR_PAGE_TABLE_NOT_PRESENT;
1100 }
1101 }
1102 else
1103 rc = VERR_PAGE_TABLE_NOT_PRESENT;
1104 }
1105 }
1106 return rc;
1107}
1108
1109
1110#undef LOG_GROUP
1111#define LOG_GROUP LOG_GROUP_PGM_PHYS_ACCESS
1112
1113
1114#ifdef IN_RING3
1115/**
1116 * Cache PGMPhys memory access
1117 *
1118 * @param pVM VM Handle.
1119 * @param pCache Cache structure pointer
1120 * @param GCPhys GC physical address
1121 * @param pbHC HC pointer corresponding to physical page
1122 *
1123 * @thread EMT.
1124 */
1125static void pgmPhysCacheAdd(PVM pVM, PGMPHYSCACHE *pCache, RTGCPHYS GCPhys, uint8_t *pbR3)
1126{
1127 uint32_t iCacheIndex;
1128
1129 Assert(VM_IS_EMT(pVM));
1130
1131 GCPhys = PHYS_PAGE_ADDRESS(GCPhys);
1132 pbR3 = (uint8_t *)PAGE_ADDRESS(pbR3);
1133
1134 iCacheIndex = ((GCPhys >> PAGE_SHIFT) & PGM_MAX_PHYSCACHE_ENTRIES_MASK);
1135
1136 ASMBitSet(&pCache->aEntries, iCacheIndex);
1137
1138 pCache->Entry[iCacheIndex].GCPhys = GCPhys;
1139 pCache->Entry[iCacheIndex].pbR3 = pbR3;
1140}
1141#endif /* IN_RING3 */
1142
1143/**
1144 * Read physical memory.
1145 *
1146 * This API respects access handlers and MMIO. Use PGMPhysSimpleReadGCPhys() if you
1147 * want to ignore those.
1148 *
1149 * @param pVM VM Handle.
1150 * @param GCPhys Physical address start reading from.
1151 * @param pvBuf Where to put the read bits.
1152 * @param cbRead How many bytes to read.
1153 */
1154VMMDECL(void) PGMPhysRead(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
1155{
1156#ifdef IN_RING3
1157 bool fGrabbedLock = false;
1158#endif
1159
1160 AssertMsg(cbRead > 0, ("don't even think about reading zero bytes!\n"));
1161 if (cbRead == 0)
1162 return;
1163
1164 LogFlow(("PGMPhysRead: %RGp %d\n", GCPhys, cbRead));
1165
1166#ifdef IN_RING3
1167 if (!VM_IS_EMT(pVM))
1168 {
1169 pgmLock(pVM);
1170 fGrabbedLock = true;
1171 }
1172#endif
1173
1174 /*
1175 * Copy loop on ram ranges.
1176 */
1177 PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
1178 for (;;)
1179 {
1180 /* Find range. */
1181 while (pRam && GCPhys > pRam->GCPhysLast)
1182 pRam = pRam->CTX_SUFF(pNext);
1183 /* Inside range or not? */
1184 if (pRam && GCPhys >= pRam->GCPhys)
1185 {
1186 /*
1187 * Must work our way thru this page by page.
1188 */
1189 RTGCPHYS off = GCPhys - pRam->GCPhys;
1190 while (off < pRam->cb)
1191 {
1192 unsigned iPage = off >> PAGE_SHIFT;
1193 PPGMPAGE pPage = &pRam->aPages[iPage];
1194 size_t cb;
1195
1196 /* Physical chunk in dynamically allocated range not present? */
1197 if (RT_UNLIKELY(!PGM_PAGE_GET_HCPHYS(pPage)))
1198 {
1199 /* Treat it as reserved; return zeros */
1200 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1201 if (cb >= cbRead)
1202 {
1203 memset(pvBuf, 0, cbRead);
1204 goto end;
1205 }
1206 memset(pvBuf, 0, cb);
1207 }
1208 /* temp hacks, will be reorganized. */
1209 /*
1210 * Physical handler.
1211 */
1212 else if ( RT_UNLIKELY(PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) >= PGM_PAGE_HNDL_PHYS_STATE_ALL)
1213 && !(pPage->HCPhys & MM_RAM_FLAGS_MMIO)) /// @todo PAGE FLAGS
1214 {
1215 int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1216 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1217
1218#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
1219 /* find and call the handler */
1220 PPGMPHYSHANDLER pNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesR3->PhysHandlers, GCPhys);
1221 if (pNode && pNode->pfnHandlerR3)
1222 {
1223 size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
1224 if (cbRange < cb)
1225 cb = cbRange;
1226 if (cb > cbRead)
1227 cb = cbRead;
1228
1229 void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1230
1231 /* Note! Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1232 rc = pNode->pfnHandlerR3(pVM, GCPhys, pvSrc, pvBuf, cb, PGMACCESSTYPE_READ, pNode->pvUserR3);
1233 }
1234#endif /* IN_RING3 */
1235 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1236 {
1237#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1238 void *pvSrc = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
1239#else
1240 void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1241#endif
1242
1243 if (cb >= cbRead)
1244 {
1245 memcpy(pvBuf, pvSrc, cbRead);
1246 goto end;
1247 }
1248 memcpy(pvBuf, pvSrc, cb);
1249 }
1250 else if (cb >= cbRead)
1251 goto end;
1252 }
1253 /*
1254 * Virtual handlers.
1255 */
1256 else if ( RT_UNLIKELY(PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) >= PGM_PAGE_HNDL_VIRT_STATE_ALL)
1257 && !(pPage->HCPhys & MM_RAM_FLAGS_MMIO)) /// @todo PAGE FLAGS
1258 {
1259 int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1260 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1261#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
1262 /* Search the whole tree for matching physical addresses (rather expensive!) */
1263 PPGMVIRTHANDLER pNode;
1264 unsigned iPage;
1265 int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pNode, &iPage);
1266 if (RT_SUCCESS(rc2) && pNode->pfnHandlerR3)
1267 {
1268 size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
1269 if (cbRange < cb)
1270 cb = cbRange;
1271 if (cb > cbRead)
1272 cb = cbRead;
1273 RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pNode->Core.Key & PAGE_BASE_GC_MASK)
1274 + (iPage << PAGE_SHIFT) + (off & PAGE_OFFSET_MASK);
1275
1276 void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1277
1278 /* Note! Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1279 rc = pNode->pfnHandlerR3(pVM, (RTGCPTR)GCPtr, pvSrc, pvBuf, cb, PGMACCESSTYPE_READ, 0);
1280 }
1281#endif /* IN_RING3 */
1282 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1283 {
1284#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1285 void *pvSrc = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
1286#else
1287 void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1288#endif
1289 if (cb >= cbRead)
1290 {
1291 memcpy(pvBuf, pvSrc, cbRead);
1292 goto end;
1293 }
1294 memcpy(pvBuf, pvSrc, cb);
1295 }
1296 else if (cb >= cbRead)
1297 goto end;
1298 }
1299 else
1300 {
1301 switch (pPage->HCPhys & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_ROM)) /** @todo PAGE FLAGS */
1302 {
1303 /*
1304 * Normal memory or ROM.
1305 */
1306 case 0:
1307 case MM_RAM_FLAGS_ROM:
1308 case MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_RESERVED:
1309 //case MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_MMIO2: /* = shadow */ - //MMIO2 isn't in the mask.
1310 case MM_RAM_FLAGS_MMIO2: // MMIO2 isn't in the mask.
1311 {
1312#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1313 void *pvSrc = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
1314#else
1315 void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1316#endif
1317 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1318 if (cb >= cbRead)
1319 {
1320#if defined(IN_RING3) && defined(PGM_PHYSMEMACCESS_CACHING)
1321 if (cbRead <= 4 && !fGrabbedLock /* i.e. EMT */)
1322 pgmPhysCacheAdd(pVM, &pVM->pgm.s.pgmphysreadcache, GCPhys, (uint8_t*)pvSrc);
1323#endif /* IN_RING3 && PGM_PHYSMEMACCESS_CACHING */
1324 memcpy(pvBuf, pvSrc, cbRead);
1325 goto end;
1326 }
1327 memcpy(pvBuf, pvSrc, cb);
1328 break;
1329 }
1330
1331 /*
1332 * All reserved, nothing there.
1333 */
1334 case MM_RAM_FLAGS_RESERVED:
1335 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1336 if (cb >= cbRead)
1337 {
1338 memset(pvBuf, 0, cbRead);
1339 goto end;
1340 }
1341 memset(pvBuf, 0, cb);
1342 break;
1343
1344 /*
1345 * The rest needs to be taken more carefully.
1346 */
1347 default:
1348#if 1 /** @todo r=bird: Can you do this properly please. */
1349 /** @todo Try MMIO; quick hack */
1350 if (cbRead <= 8 && IOMMMIORead(pVM, GCPhys, (uint32_t *)pvBuf, cbRead) == VINF_SUCCESS)
1351 goto end;
1352#endif
1353
1354 /** @todo fix me later. */
1355 AssertReleaseMsgFailed(("Unknown read at %RGp size %u implement the complex physical reading case %RHp\n",
1356 GCPhys, cbRead,
1357 pPage->HCPhys & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_ROM))); /** @todo PAGE FLAGS */
1358 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1359 break;
1360 }
1361 }
1362 cbRead -= cb;
1363 off += cb;
1364 pvBuf = (char *)pvBuf + cb;
1365 }
1366
1367 GCPhys = pRam->GCPhysLast + 1;
1368 }
1369 else
1370 {
1371 LogFlow(("PGMPhysRead: Unassigned %RGp size=%u\n", GCPhys, cbRead));
1372
1373 /*
1374 * Unassigned address space.
1375 */
1376 size_t cb;
1377 if ( !pRam
1378 || (cb = pRam->GCPhys - GCPhys) >= cbRead)
1379 {
1380 memset(pvBuf, 0, cbRead);
1381 goto end;
1382 }
1383
1384 memset(pvBuf, 0, cb);
1385 cbRead -= cb;
1386 pvBuf = (char *)pvBuf + cb;
1387 GCPhys += cb;
1388 }
1389 }
1390end:
1391#ifdef IN_RING3
1392 if (fGrabbedLock)
1393 pgmUnlock(pVM);
1394#endif
1395 return;
1396}
1397
1398
1399/**
1400 * Write to physical memory.
1401 *
1402 * This API respects access handlers and MMIO. Use PGMPhysSimpleReadGCPhys() if you
1403 * want to ignore those.
1404 *
1405 * @param pVM VM Handle.
1406 * @param GCPhys Physical address to write to.
1407 * @param pvBuf What to write.
1408 * @param cbWrite How many bytes to write.
1409 */
1410VMMDECL(void) PGMPhysWrite(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
1411{
1412#ifdef IN_RING3
1413 bool fGrabbedLock = false;
1414#endif
1415
1416 AssertMsg(!pVM->pgm.s.fNoMorePhysWrites, ("Calling PGMPhysWrite after pgmR3Save()!\n"));
1417 AssertMsg(cbWrite > 0, ("don't even think about writing zero bytes!\n"));
1418 if (cbWrite == 0)
1419 return;
1420
1421 LogFlow(("PGMPhysWrite: %RGp %d\n", GCPhys, cbWrite));
1422
1423#ifdef IN_RING3
1424 if (!VM_IS_EMT(pVM))
1425 {
1426 pgmLock(pVM);
1427 fGrabbedLock = true;
1428 }
1429#endif
1430 /*
1431 * Copy loop on ram ranges.
1432 */
1433 PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
1434 for (;;)
1435 {
1436 /* Find range. */
1437 while (pRam && GCPhys > pRam->GCPhysLast)
1438 pRam = pRam->CTX_SUFF(pNext);
1439 /* Inside range or not? */
1440 if (pRam && GCPhys >= pRam->GCPhys)
1441 {
1442 /*
1443 * Must work our way thru this page by page.
1444 */
1445 RTGCPTR off = GCPhys - pRam->GCPhys;
1446 while (off < pRam->cb)
1447 {
1448 RTGCPTR iPage = off >> PAGE_SHIFT;
1449 PPGMPAGE pPage = &pRam->aPages[iPage];
1450
1451 /* Physical chunk in dynamically allocated range not present? */
1452 if (RT_UNLIKELY(!PGM_PAGE_GET_HCPHYS(pPage)))
1453 {
1454 int rc;
1455#ifdef IN_RING3
1456 if (fGrabbedLock)
1457 {
1458 pgmUnlock(pVM);
1459 rc = pgmr3PhysGrowRange(pVM, GCPhys);
1460 if (rc == VINF_SUCCESS)
1461 PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite); /* try again; can't assume pRam is still valid (paranoia) */
1462 return;
1463 }
1464 rc = pgmr3PhysGrowRange(pVM, GCPhys);
1465#else
1466 rc = CTXALLMID(VMM, CallHost)(pVM, VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
1467#endif
1468 if (rc != VINF_SUCCESS)
1469 goto end;
1470 }
1471
1472 size_t cb;
1473 /* temporary hack, will reogranize is later. */
1474 /*
1475 * Virtual handlers
1476 */
1477 if ( PGM_PAGE_HAS_ACTIVE_VIRTUAL_HANDLERS(pPage)
1478 && !(pPage->HCPhys & MM_RAM_FLAGS_MMIO)) /// @todo PAGE FLAGS
1479 {
1480 if (PGM_PAGE_HAS_ACTIVE_PHYSICAL_HANDLERS(pPage))
1481 {
1482 /*
1483 * Physical write handler + virtual write handler.
1484 * Consider this a quick workaround for the CSAM + shadow caching problem.
1485 *
1486 * We hand it to the shadow caching first since it requires the unchanged
1487 * data. CSAM will have to put up with it already being changed.
1488 */
1489 int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1490 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1491#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
1492 /* 1. The physical handler */
1493 PPGMPHYSHANDLER pPhysNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesR3->PhysHandlers, GCPhys);
1494 if (pPhysNode && pPhysNode->pfnHandlerR3)
1495 {
1496 size_t cbRange = pPhysNode->Core.KeyLast - GCPhys + 1;
1497 if (cbRange < cb)
1498 cb = cbRange;
1499 if (cb > cbWrite)
1500 cb = cbWrite;
1501
1502 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1503
1504 /* Note! Dangerous assumption that R3 handlers don't do anything that really requires an EMT lock! */
1505 rc = pPhysNode->pfnHandlerR3(pVM, GCPhys, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, pPhysNode->pvUserR3);
1506 }
1507
1508 /* 2. The virtual handler (will see incorrect data) */
1509 PPGMVIRTHANDLER pVirtNode;
1510 unsigned iPage;
1511 int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pVirtNode, &iPage);
1512 if (RT_SUCCESS(rc2) && pVirtNode->pfnHandlerR3)
1513 {
1514 size_t cbRange = pVirtNode->Core.KeyLast - GCPhys + 1;
1515 if (cbRange < cb)
1516 cb = cbRange;
1517 if (cb > cbWrite)
1518 cb = cbWrite;
1519 RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pVirtNode->Core.Key & PAGE_BASE_GC_MASK)
1520 + (iPage << PAGE_SHIFT) + (off & PAGE_OFFSET_MASK);
1521
1522 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1523
1524 /* Note! Dangerous assumption that R3 handlers don't do anything that really requires an EMT lock! */
1525 rc2 = pVirtNode->pfnHandlerR3(pVM, (RTGCPTR)GCPtr, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, 0);
1526 if ( ( rc2 != VINF_PGM_HANDLER_DO_DEFAULT
1527 && rc == VINF_PGM_HANDLER_DO_DEFAULT)
1528 || ( RT_FAILURE(rc2)
1529 && RT_SUCCESS(rc)))
1530 rc = rc2;
1531 }
1532#endif /* IN_RING3 */
1533 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1534 {
1535#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1536 void *pvDst = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
1537#else
1538 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1539#endif
1540 if (cb >= cbWrite)
1541 {
1542 memcpy(pvDst, pvBuf, cbWrite);
1543 goto end;
1544 }
1545 memcpy(pvDst, pvBuf, cb);
1546 }
1547 else if (cb >= cbWrite)
1548 goto end;
1549 }
1550 else
1551 {
1552 int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1553 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1554#ifdef IN_RING3
1555/** @todo deal with this in GC and R0! */
1556 /* Search the whole tree for matching physical addresses (rather expensive!) */
1557 PPGMVIRTHANDLER pNode;
1558 unsigned iPage;
1559 int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pNode, &iPage);
1560 if (RT_SUCCESS(rc2) && pNode->pfnHandlerR3)
1561 {
1562 size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
1563 if (cbRange < cb)
1564 cb = cbRange;
1565 if (cb > cbWrite)
1566 cb = cbWrite;
1567 RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pNode->Core.Key & PAGE_BASE_GC_MASK)
1568 + (iPage << PAGE_SHIFT) + (off & PAGE_OFFSET_MASK);
1569
1570 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1571
1572 /* Note! Dangerous assumption that R3 handlers don't do anything that really requires an EMT lock! */
1573 rc = pNode->pfnHandlerR3(pVM, (RTGCPTR)GCPtr, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, 0);
1574 }
1575#endif /* IN_RING3 */
1576 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1577 {
1578#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1579 void *pvDst = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
1580#else
1581 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1582#endif
1583 if (cb >= cbWrite)
1584 {
1585 memcpy(pvDst, pvBuf, cbWrite);
1586 goto end;
1587 }
1588 memcpy(pvDst, pvBuf, cb);
1589 }
1590 else if (cb >= cbWrite)
1591 goto end;
1592 }
1593 }
1594 /*
1595 * Physical handler.
1596 */
1597 else if ( RT_UNLIKELY(PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) >= PGM_PAGE_HNDL_PHYS_STATE_WRITE)
1598 && !(pPage->HCPhys & MM_RAM_FLAGS_MMIO)) /// @todo PAGE FLAGS
1599 {
1600 int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1601 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1602#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
1603 /* find and call the handler */
1604 PPGMPHYSHANDLER pNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesR3->PhysHandlers, GCPhys);
1605 if (pNode && pNode->pfnHandlerR3)
1606 {
1607 size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
1608 if (cbRange < cb)
1609 cb = cbRange;
1610 if (cb > cbWrite)
1611 cb = cbWrite;
1612
1613 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1614
1615 /** @todo Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1616 rc = pNode->pfnHandlerR3(pVM, GCPhys, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, pNode->pvUserR3);
1617 }
1618#endif /* IN_RING3 */
1619 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1620 {
1621#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1622 void *pvDst = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
1623#else
1624 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1625#endif
1626 if (cb >= cbWrite)
1627 {
1628 memcpy(pvDst, pvBuf, cbWrite);
1629 goto end;
1630 }
1631 memcpy(pvDst, pvBuf, cb);
1632 }
1633 else if (cb >= cbWrite)
1634 goto end;
1635 }
1636 else
1637 {
1638 /** @todo r=bird: missing MM_RAM_FLAGS_ROM here, we shall not allow anyone to overwrite the ROM! */
1639 switch (pPage->HCPhys & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_MMIO2)) /** @todo PAGE FLAGS */
1640 {
1641 /*
1642 * Normal memory, MMIO2 or writable shadow ROM.
1643 */
1644 case 0:
1645 case MM_RAM_FLAGS_MMIO2:
1646 case MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_MMIO2: /* shadow rom */
1647 {
1648#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1649 void *pvDst = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
1650#else
1651 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1652#endif
1653 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1654 if (cb >= cbWrite)
1655 {
1656#if defined(IN_RING3) && defined(PGM_PHYSMEMACCESS_CACHING)
1657 if (cbWrite <= 4 && !fGrabbedLock /* i.e. EMT */)
1658 pgmPhysCacheAdd(pVM, &pVM->pgm.s.pgmphyswritecache, GCPhys, (uint8_t*)pvDst);
1659#endif /* IN_RING3 && PGM_PHYSMEMACCESS_CACHING */
1660 memcpy(pvDst, pvBuf, cbWrite);
1661 goto end;
1662 }
1663 memcpy(pvDst, pvBuf, cb);
1664 break;
1665 }
1666
1667 /*
1668 * All reserved, nothing there.
1669 */
1670 case MM_RAM_FLAGS_RESERVED:
1671 case MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO2:
1672 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1673 if (cb >= cbWrite)
1674 goto end;
1675 break;
1676
1677
1678 /*
1679 * The rest needs to be taken more carefully.
1680 */
1681 default:
1682#if 1 /** @todo r=bird: Can you do this properly please. */
1683 /** @todo Try MMIO; quick hack */
1684 if (cbWrite <= 8 && IOMMMIOWrite(pVM, GCPhys, *(uint32_t *)pvBuf, cbWrite) == VINF_SUCCESS)
1685 goto end;
1686#endif
1687
1688 /** @todo fix me later. */
1689 AssertReleaseMsgFailed(("Unknown write at %RGp size %u implement the complex physical writing case %RHp\n",
1690 GCPhys, cbWrite,
1691 (pPage->HCPhys & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_MMIO2)))); /** @todo PAGE FLAGS */
1692 /* skip the write */
1693 cb = cbWrite;
1694 break;
1695 }
1696 }
1697
1698 cbWrite -= cb;
1699 off += cb;
1700 pvBuf = (const char *)pvBuf + cb;
1701 }
1702
1703 GCPhys = pRam->GCPhysLast + 1;
1704 }
1705 else
1706 {
1707 /*
1708 * Unassigned address space.
1709 */
1710 size_t cb;
1711 if ( !pRam
1712 || (cb = pRam->GCPhys - GCPhys) >= cbWrite)
1713 goto end;
1714
1715 cbWrite -= cb;
1716 pvBuf = (const char *)pvBuf + cb;
1717 GCPhys += cb;
1718 }
1719 }
1720end:
1721#ifdef IN_RING3
1722 if (fGrabbedLock)
1723 pgmUnlock(pVM);
1724#endif
1725 return;
1726}
1727
1728#ifndef IN_RC /* Ring 0 & 3 only. (Just not needed in GC.) */
1729
1730/**
1731 * Read from guest physical memory by GC physical address, bypassing
1732 * MMIO and access handlers.
1733 *
1734 * @returns VBox status.
1735 * @param pVM VM handle.
1736 * @param pvDst The destination address.
1737 * @param GCPhysSrc The source address (GC physical address).
1738 * @param cb The number of bytes to read.
1739 */
1740VMMDECL(int) PGMPhysSimpleReadGCPhys(PVM pVM, void *pvDst, RTGCPHYS GCPhysSrc, size_t cb)
1741{
1742 /*
1743 * Treat the first page as a special case.
1744 */
1745 if (!cb)
1746 return VINF_SUCCESS;
1747
1748 /* map the 1st page */
1749 void const *pvSrc;
1750 PGMPAGEMAPLOCK Lock;
1751 int rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, GCPhysSrc, &pvSrc, &Lock);
1752 if (RT_FAILURE(rc))
1753 return rc;
1754
1755 /* optimize for the case where access is completely within the first page. */
1756 size_t cbPage = PAGE_SIZE - (GCPhysSrc & PAGE_OFFSET_MASK);
1757 if (RT_LIKELY(cb <= cbPage))
1758 {
1759 memcpy(pvDst, pvSrc, cb);
1760 PGMPhysReleasePageMappingLock(pVM, &Lock);
1761 return VINF_SUCCESS;
1762 }
1763
1764 /* copy to the end of the page. */
1765 memcpy(pvDst, pvSrc, cbPage);
1766 PGMPhysReleasePageMappingLock(pVM, &Lock);
1767 GCPhysSrc += cbPage;
1768 pvDst = (uint8_t *)pvDst + cbPage;
1769 cb -= cbPage;
1770
1771 /*
1772 * Page by page.
1773 */
1774 for (;;)
1775 {
1776 /* map the page */
1777 rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, GCPhysSrc, &pvSrc, &Lock);
1778 if (RT_FAILURE(rc))
1779 return rc;
1780
1781 /* last page? */
1782 if (cb <= PAGE_SIZE)
1783 {
1784 memcpy(pvDst, pvSrc, cb);
1785 PGMPhysReleasePageMappingLock(pVM, &Lock);
1786 return VINF_SUCCESS;
1787 }
1788
1789 /* copy the entire page and advance */
1790 memcpy(pvDst, pvSrc, PAGE_SIZE);
1791 PGMPhysReleasePageMappingLock(pVM, &Lock);
1792 GCPhysSrc += PAGE_SIZE;
1793 pvDst = (uint8_t *)pvDst + PAGE_SIZE;
1794 cb -= PAGE_SIZE;
1795 }
1796 /* won't ever get here. */
1797}
1798
1799
1800/**
1801 * Write to guest physical memory referenced by GC pointer.
1802 * Write memory to GC physical address in guest physical memory.
1803 *
1804 * This will bypass MMIO and access handlers.
1805 *
1806 * @returns VBox status.
1807 * @param pVM VM handle.
1808 * @param GCPhysDst The GC physical address of the destination.
1809 * @param pvSrc The source buffer.
1810 * @param cb The number of bytes to write.
1811 */
1812VMMDECL(int) PGMPhysSimpleWriteGCPhys(PVM pVM, RTGCPHYS GCPhysDst, const void *pvSrc, size_t cb)
1813{
1814 LogFlow(("PGMPhysSimpleWriteGCPhys: %RGp %zu\n", GCPhysDst, cb));
1815
1816 /*
1817 * Treat the first page as a special case.
1818 */
1819 if (!cb)
1820 return VINF_SUCCESS;
1821
1822 /* map the 1st page */
1823 void *pvDst;
1824 PGMPAGEMAPLOCK Lock;
1825 int rc = PGMPhysGCPhys2CCPtr(pVM, GCPhysDst, &pvDst, &Lock);
1826 if (RT_FAILURE(rc))
1827 return rc;
1828
1829 /* optimize for the case where access is completely within the first page. */
1830 size_t cbPage = PAGE_SIZE - (GCPhysDst & PAGE_OFFSET_MASK);
1831 if (RT_LIKELY(cb <= cbPage))
1832 {
1833 memcpy(pvDst, pvSrc, cb);
1834 PGMPhysReleasePageMappingLock(pVM, &Lock);
1835 return VINF_SUCCESS;
1836 }
1837
1838 /* copy to the end of the page. */
1839 memcpy(pvDst, pvSrc, cbPage);
1840 PGMPhysReleasePageMappingLock(pVM, &Lock);
1841 GCPhysDst += cbPage;
1842 pvSrc = (const uint8_t *)pvSrc + cbPage;
1843 cb -= cbPage;
1844
1845 /*
1846 * Page by page.
1847 */
1848 for (;;)
1849 {
1850 /* map the page */
1851 rc = PGMPhysGCPhys2CCPtr(pVM, GCPhysDst, &pvDst, &Lock);
1852 if (RT_FAILURE(rc))
1853 return rc;
1854
1855 /* last page? */
1856 if (cb <= PAGE_SIZE)
1857 {
1858 memcpy(pvDst, pvSrc, cb);
1859 PGMPhysReleasePageMappingLock(pVM, &Lock);
1860 return VINF_SUCCESS;
1861 }
1862
1863 /* copy the entire page and advance */
1864 memcpy(pvDst, pvSrc, PAGE_SIZE);
1865 PGMPhysReleasePageMappingLock(pVM, &Lock);
1866 GCPhysDst += PAGE_SIZE;
1867 pvSrc = (const uint8_t *)pvSrc + PAGE_SIZE;
1868 cb -= PAGE_SIZE;
1869 }
1870 /* won't ever get here. */
1871}
1872
1873
1874/**
1875 * Read from guest physical memory referenced by GC pointer.
1876 *
1877 * This function uses the current CR3/CR0/CR4 of the guest and will
1878 * bypass access handlers and not set any accessed bits.
1879 *
1880 * @returns VBox status.
1881 * @param pVM VM handle.
1882 * @param pvDst The destination address.
1883 * @param GCPtrSrc The source address (GC pointer).
1884 * @param cb The number of bytes to read.
1885 */
1886VMMDECL(int) PGMPhysSimpleReadGCPtr(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb)
1887{
1888 /*
1889 * Treat the first page as a special case.
1890 */
1891 if (!cb)
1892 return VINF_SUCCESS;
1893
1894 /* map the 1st page */
1895 void const *pvSrc;
1896 PGMPAGEMAPLOCK Lock;
1897 int rc = PGMPhysGCPtr2CCPtrReadOnly(pVM, GCPtrSrc, &pvSrc, &Lock);
1898 if (RT_FAILURE(rc))
1899 return rc;
1900
1901 /* optimize for the case where access is completely within the first page. */
1902 size_t cbPage = PAGE_SIZE - ((RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK);
1903 if (RT_LIKELY(cb <= cbPage))
1904 {
1905 memcpy(pvDst, pvSrc, cb);
1906 PGMPhysReleasePageMappingLock(pVM, &Lock);
1907 return VINF_SUCCESS;
1908 }
1909
1910 /* copy to the end of the page. */
1911 memcpy(pvDst, pvSrc, cbPage);
1912 PGMPhysReleasePageMappingLock(pVM, &Lock);
1913 GCPtrSrc = (RTGCPTR)((RTGCUINTPTR)GCPtrSrc + cbPage);
1914 pvDst = (uint8_t *)pvDst + cbPage;
1915 cb -= cbPage;
1916
1917 /*
1918 * Page by page.
1919 */
1920 for (;;)
1921 {
1922 /* map the page */
1923 rc = PGMPhysGCPtr2CCPtrReadOnly(pVM, GCPtrSrc, &pvSrc, &Lock);
1924 if (RT_FAILURE(rc))
1925 return rc;
1926
1927 /* last page? */
1928 if (cb <= PAGE_SIZE)
1929 {
1930 memcpy(pvDst, pvSrc, cb);
1931 PGMPhysReleasePageMappingLock(pVM, &Lock);
1932 return VINF_SUCCESS;
1933 }
1934
1935 /* copy the entire page and advance */
1936 memcpy(pvDst, pvSrc, PAGE_SIZE);
1937 PGMPhysReleasePageMappingLock(pVM, &Lock);
1938 GCPtrSrc = (RTGCPTR)((RTGCUINTPTR)GCPtrSrc + PAGE_SIZE);
1939 pvDst = (uint8_t *)pvDst + PAGE_SIZE;
1940 cb -= PAGE_SIZE;
1941 }
1942 /* won't ever get here. */
1943}
1944
1945
1946/**
1947 * Write to guest physical memory referenced by GC pointer.
1948 *
1949 * This function uses the current CR3/CR0/CR4 of the guest and will
1950 * bypass access handlers and not set dirty or accessed bits.
1951 *
1952 * @returns VBox status.
1953 * @param pVM VM handle.
1954 * @param GCPtrDst The destination address (GC pointer).
1955 * @param pvSrc The source address.
1956 * @param cb The number of bytes to write.
1957 */
1958VMMDECL(int) PGMPhysSimpleWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
1959{
1960 /*
1961 * Treat the first page as a special case.
1962 */
1963 if (!cb)
1964 return VINF_SUCCESS;
1965
1966 /* map the 1st page */
1967 void *pvDst;
1968 PGMPAGEMAPLOCK Lock;
1969 int rc = PGMPhysGCPtr2CCPtr(pVM, GCPtrDst, &pvDst, &Lock);
1970 if (RT_FAILURE(rc))
1971 return rc;
1972
1973 /* optimize for the case where access is completely within the first page. */
1974 size_t cbPage = PAGE_SIZE - ((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK);
1975 if (RT_LIKELY(cb <= cbPage))
1976 {
1977 memcpy(pvDst, pvSrc, cb);
1978 PGMPhysReleasePageMappingLock(pVM, &Lock);
1979 return VINF_SUCCESS;
1980 }
1981
1982 /* copy to the end of the page. */
1983 memcpy(pvDst, pvSrc, cbPage);
1984 PGMPhysReleasePageMappingLock(pVM, &Lock);
1985 GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + cbPage);
1986 pvSrc = (const uint8_t *)pvSrc + cbPage;
1987 cb -= cbPage;
1988
1989 /*
1990 * Page by page.
1991 */
1992 for (;;)
1993 {
1994 /* map the page */
1995 rc = PGMPhysGCPtr2CCPtr(pVM, GCPtrDst, &pvDst, &Lock);
1996 if (RT_FAILURE(rc))
1997 return rc;
1998
1999 /* last page? */
2000 if (cb <= PAGE_SIZE)
2001 {
2002 memcpy(pvDst, pvSrc, cb);
2003 PGMPhysReleasePageMappingLock(pVM, &Lock);
2004 return VINF_SUCCESS;
2005 }
2006
2007 /* copy the entire page and advance */
2008 memcpy(pvDst, pvSrc, PAGE_SIZE);
2009 PGMPhysReleasePageMappingLock(pVM, &Lock);
2010 GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + PAGE_SIZE);
2011 pvSrc = (const uint8_t *)pvSrc + PAGE_SIZE;
2012 cb -= PAGE_SIZE;
2013 }
2014 /* won't ever get here. */
2015}
2016
2017
2018/**
2019 * Write to guest physical memory referenced by GC pointer and update the PTE.
2020 *
2021 * This function uses the current CR3/CR0/CR4 of the guest and will
2022 * bypass access handlers but will set any dirty and accessed bits in the PTE.
2023 *
2024 * If you don't want to set the dirty bit, use PGMPhysSimpleWriteGCPtr().
2025 *
2026 * @returns VBox status.
2027 * @param pVM VM handle.
2028 * @param GCPtrDst The destination address (GC pointer).
2029 * @param pvSrc The source address.
2030 * @param cb The number of bytes to write.
2031 */
2032VMMDECL(int) PGMPhysSimpleDirtyWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
2033{
2034 /*
2035 * Treat the first page as a special case.
2036 * Btw. this is the same code as in PGMPhyssimpleWriteGCPtr excep for the PGMGstModifyPage.
2037 */
2038 if (!cb)
2039 return VINF_SUCCESS;
2040
2041 /* map the 1st page */
2042 void *pvDst;
2043 PGMPAGEMAPLOCK Lock;
2044 int rc = PGMPhysGCPtr2CCPtr(pVM, GCPtrDst, &pvDst, &Lock);
2045 if (RT_FAILURE(rc))
2046 return rc;
2047
2048 /* optimize for the case where access is completely within the first page. */
2049 size_t cbPage = PAGE_SIZE - ((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK);
2050 if (RT_LIKELY(cb <= cbPage))
2051 {
2052 memcpy(pvDst, pvSrc, cb);
2053 PGMPhysReleasePageMappingLock(pVM, &Lock);
2054 rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
2055 return VINF_SUCCESS;
2056 }
2057
2058 /* copy to the end of the page. */
2059 memcpy(pvDst, pvSrc, cbPage);
2060 PGMPhysReleasePageMappingLock(pVM, &Lock);
2061 rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
2062 GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + cbPage);
2063 pvSrc = (const uint8_t *)pvSrc + cbPage;
2064 cb -= cbPage;
2065
2066 /*
2067 * Page by page.
2068 */
2069 for (;;)
2070 {
2071 /* map the page */
2072 rc = PGMPhysGCPtr2CCPtr(pVM, GCPtrDst, &pvDst, &Lock);
2073 if (RT_FAILURE(rc))
2074 return rc;
2075
2076 /* last page? */
2077 if (cb <= PAGE_SIZE)
2078 {
2079 memcpy(pvDst, pvSrc, cb);
2080 PGMPhysReleasePageMappingLock(pVM, &Lock);
2081 rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
2082 return VINF_SUCCESS;
2083 }
2084
2085 /* copy the entire page and advance */
2086 memcpy(pvDst, pvSrc, PAGE_SIZE);
2087 PGMPhysReleasePageMappingLock(pVM, &Lock);
2088 rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
2089 GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + PAGE_SIZE);
2090 pvSrc = (const uint8_t *)pvSrc + PAGE_SIZE;
2091 cb -= PAGE_SIZE;
2092 }
2093 /* won't ever get here. */
2094}
2095
2096
2097/**
2098 * Read from guest physical memory referenced by GC pointer.
2099 *
2100 * This function uses the current CR3/CR0/CR4 of the guest and will
2101 * respect access handlers and set accessed bits.
2102 *
2103 * @returns VBox status.
2104 * @param pVM VM handle.
2105 * @param pvDst The destination address.
2106 * @param GCPtrSrc The source address (GC pointer).
2107 * @param cb The number of bytes to read.
2108 */
2109VMMDECL(int) PGMPhysReadGCPtr(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb)
2110{
2111 RTGCPHYS GCPhys;
2112 int rc;
2113
2114 /*
2115 * Anything to do?
2116 */
2117 if (!cb)
2118 return VINF_SUCCESS;
2119
2120 LogFlow(("PGMPhysReadGCPtr: %RGv %zu\n", GCPtrSrc, cb));
2121
2122 /*
2123 * Optimize reads within a single page.
2124 */
2125 if (((RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK) + cb <= PAGE_SIZE)
2126 {
2127 /* Convert virtual to physical address */
2128 rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrSrc, &GCPhys);
2129 AssertRCReturn(rc, rc);
2130
2131 /* mark the guest page as accessed. */
2132 rc = PGMGstModifyPage(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)(X86_PTE_A));
2133 AssertRC(rc);
2134
2135 PGMPhysRead(pVM, GCPhys, pvDst, cb);
2136 return VINF_SUCCESS;
2137 }
2138
2139 /*
2140 * Page by page.
2141 */
2142 for (;;)
2143 {
2144 /* Convert virtual to physical address */
2145 rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrSrc, &GCPhys);
2146 AssertRCReturn(rc, rc);
2147
2148 /* mark the guest page as accessed. */
2149 int rc = PGMGstModifyPage(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)(X86_PTE_A));
2150 AssertRC(rc);
2151
2152 /* copy */
2153 size_t cbRead = PAGE_SIZE - ((RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK);
2154 if (cbRead >= cb)
2155 {
2156 PGMPhysRead(pVM, GCPhys, pvDst, cb);
2157 return VINF_SUCCESS;
2158 }
2159 PGMPhysRead(pVM, GCPhys, pvDst, cbRead);
2160
2161 /* next */
2162 cb -= cbRead;
2163 pvDst = (uint8_t *)pvDst + cbRead;
2164 GCPtrSrc += cbRead;
2165 }
2166}
2167
2168
2169/**
2170 * Write to guest physical memory referenced by GC pointer.
2171 *
2172 * This function uses the current CR3/CR0/CR4 of the guest and will
2173 * respect access handlers and set dirty and accessed bits.
2174 *
2175 * @returns VBox status.
2176 * @param pVM VM handle.
2177 * @param GCPtrDst The destination address (GC pointer).
2178 * @param pvSrc The source address.
2179 * @param cb The number of bytes to write.
2180 */
2181VMMDECL(int) PGMPhysWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
2182{
2183 RTGCPHYS GCPhys;
2184 int rc;
2185
2186 /*
2187 * Anything to do?
2188 */
2189 if (!cb)
2190 return VINF_SUCCESS;
2191
2192 LogFlow(("PGMPhysWriteGCPtr: %RGv %zu\n", GCPtrDst, cb));
2193
2194 /*
2195 * Optimize writes within a single page.
2196 */
2197 if (((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK) + cb <= PAGE_SIZE)
2198 {
2199 /* Convert virtual to physical address */
2200 rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrDst, &GCPhys);
2201 AssertMsgRCReturn(rc, ("PGMPhysGCPtr2GCPhys failed with %Rrc for %RGv\n", rc, GCPtrDst), rc);
2202
2203 /* mark the guest page as accessed and dirty. */
2204 rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
2205 AssertRC(rc);
2206
2207 PGMPhysWrite(pVM, GCPhys, pvSrc, cb);
2208 return VINF_SUCCESS;
2209 }
2210
2211 /*
2212 * Page by page.
2213 */
2214 for (;;)
2215 {
2216 /* Convert virtual to physical address */
2217 rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrDst, &GCPhys);
2218 AssertRCReturn(rc, rc);
2219
2220 /* mark the guest page as accessed and dirty. */
2221 rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
2222 AssertRC(rc);
2223
2224 /* copy */
2225 size_t cbWrite = PAGE_SIZE - ((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK);
2226 if (cbWrite >= cb)
2227 {
2228 PGMPhysWrite(pVM, GCPhys, pvSrc, cb);
2229 return VINF_SUCCESS;
2230 }
2231 PGMPhysWrite(pVM, GCPhys, pvSrc, cbWrite);
2232
2233 /* next */
2234 cb -= cbWrite;
2235 pvSrc = (uint8_t *)pvSrc + cbWrite;
2236 GCPtrDst += cbWrite;
2237 }
2238}
2239
2240#endif /* !IN_RC */
2241
2242/**
2243 * Performs a read of guest virtual memory for instruction emulation.
2244 *
2245 * This will check permissions, raise exceptions and update the access bits.
2246 *
2247 * The current implementation will bypass all access handlers. It may later be
2248 * changed to at least respect MMIO.
2249 *
2250 *
2251 * @returns VBox status code suitable to scheduling.
2252 * @retval VINF_SUCCESS if the read was performed successfully.
2253 * @retval VINF_EM_RAW_GUEST_TRAP if an exception was raised but not dispatched yet.
2254 * @retval VINF_TRPM_XCPT_DISPATCHED if an exception was raised and dispatched.
2255 *
2256 * @param pVM The VM handle.
2257 * @param pCtxCore The context core.
2258 * @param pvDst Where to put the bytes we've read.
2259 * @param GCPtrSrc The source address.
2260 * @param cb The number of bytes to read. Not more than a page.
2261 *
2262 * @remark This function will dynamically map physical pages in GC. This may unmap
2263 * mappings done by the caller. Be careful!
2264 */
2265VMMDECL(int) PGMPhysInterpretedRead(PVM pVM, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCUINTPTR GCPtrSrc, size_t cb)
2266{
2267 Assert(cb <= PAGE_SIZE);
2268
2269/** @todo r=bird: This isn't perfect!
2270 * -# It's not checking for reserved bits being 1.
2271 * -# It's not correctly dealing with the access bit.
2272 * -# It's not respecting MMIO memory or any other access handlers.
2273 */
2274 /*
2275 * 1. Translate virtual to physical. This may fault.
2276 * 2. Map the physical address.
2277 * 3. Do the read operation.
2278 * 4. Set access bits if required.
2279 */
2280 int rc;
2281 unsigned cb1 = PAGE_SIZE - (GCPtrSrc & PAGE_OFFSET_MASK);
2282 if (cb <= cb1)
2283 {
2284 /*
2285 * Not crossing pages.
2286 */
2287 RTGCPHYS GCPhys;
2288 uint64_t fFlags;
2289 rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc, &fFlags, &GCPhys);
2290 if (RT_SUCCESS(rc))
2291 {
2292 /** @todo we should check reserved bits ... */
2293 void *pvSrc;
2294 rc = PGM_GCPHYS_2_PTR(pVM, GCPhys, &pvSrc);
2295 switch (rc)
2296 {
2297 case VINF_SUCCESS:
2298 Log(("PGMPhysInterpretedRead: pvDst=%p pvSrc=%p cb=%d\n", pvDst, (uint8_t *)pvSrc + (GCPtrSrc & PAGE_OFFSET_MASK), cb));
2299 memcpy(pvDst, (uint8_t *)pvSrc + (GCPtrSrc & PAGE_OFFSET_MASK), cb);
2300 break;
2301 case VERR_PGM_PHYS_PAGE_RESERVED:
2302 case VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS:
2303 memset(pvDst, 0, cb); /** @todo this is wrong, it should be 0xff */
2304 break;
2305 default:
2306 return rc;
2307 }
2308
2309 /** @todo access bit emulation isn't 100% correct. */
2310 if (!(fFlags & X86_PTE_A))
2311 {
2312 rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
2313 AssertRC(rc);
2314 }
2315 return VINF_SUCCESS;
2316 }
2317 }
2318 else
2319 {
2320 /*
2321 * Crosses pages.
2322 */
2323 size_t cb2 = cb - cb1;
2324 uint64_t fFlags1;
2325 RTGCPHYS GCPhys1;
2326 uint64_t fFlags2;
2327 RTGCPHYS GCPhys2;
2328 rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc, &fFlags1, &GCPhys1);
2329 if (RT_SUCCESS(rc))
2330 rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc + cb1, &fFlags2, &GCPhys2);
2331 if (RT_SUCCESS(rc))
2332 {
2333 /** @todo we should check reserved bits ... */
2334 AssertMsgFailed(("cb=%d cb1=%d cb2=%d GCPtrSrc=%RGv\n", cb, cb1, cb2, GCPtrSrc));
2335 void *pvSrc1;
2336 rc = PGM_GCPHYS_2_PTR(pVM, GCPhys1, &pvSrc1);
2337 switch (rc)
2338 {
2339 case VINF_SUCCESS:
2340 memcpy(pvDst, (uint8_t *)pvSrc1 + (GCPtrSrc & PAGE_OFFSET_MASK), cb1);
2341 break;
2342 case VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS:
2343 memset(pvDst, 0, cb1); /** @todo this is wrong, it should be 0xff */
2344 break;
2345 default:
2346 return rc;
2347 }
2348
2349 void *pvSrc2;
2350 rc = PGM_GCPHYS_2_PTR(pVM, GCPhys2, &pvSrc2);
2351 switch (rc)
2352 {
2353 case VINF_SUCCESS:
2354 memcpy((uint8_t *)pvDst + cb1, pvSrc2, cb2);
2355 break;
2356 case VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS:
2357 memset((uint8_t *)pvDst + cb1, 0, cb2); /** @todo this is wrong, it should be 0xff */
2358 break;
2359 default:
2360 return rc;
2361 }
2362
2363 if (!(fFlags1 & X86_PTE_A))
2364 {
2365 rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
2366 AssertRC(rc);
2367 }
2368 if (!(fFlags2 & X86_PTE_A))
2369 {
2370 rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrSrc + cb1, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
2371 AssertRC(rc);
2372 }
2373 return VINF_SUCCESS;
2374 }
2375 }
2376
2377 /*
2378 * Raise a #PF.
2379 */
2380 uint32_t uErr;
2381
2382 /* Get the current privilege level. */
2383 uint32_t cpl = CPUMGetGuestCPL(pVM, pCtxCore);
2384 switch (rc)
2385 {
2386 case VINF_SUCCESS:
2387 uErr = (cpl >= 2) ? X86_TRAP_PF_RSVD | X86_TRAP_PF_US : X86_TRAP_PF_RSVD;
2388 break;
2389
2390 case VERR_PAGE_NOT_PRESENT:
2391 case VERR_PAGE_TABLE_NOT_PRESENT:
2392 uErr = (cpl >= 2) ? X86_TRAP_PF_US : 0;
2393 break;
2394
2395 default:
2396 AssertMsgFailed(("rc=%Rrc GCPtrSrc=%RGv cb=%#x\n", rc, GCPtrSrc, cb));
2397 return rc;
2398 }
2399 Log(("PGMPhysInterpretedRead: GCPtrSrc=%RGv cb=%#x -> #PF(%#x)\n", GCPtrSrc, cb, uErr));
2400 return TRPMRaiseXcptErrCR2(pVM, pCtxCore, X86_XCPT_PF, uErr, GCPtrSrc);
2401}
2402
2403/// @todo VMMDECL(int) PGMPhysInterpretedWrite(PVM pVM, PCPUMCTXCORE pCtxCore, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
2404
2405
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