VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp@ 17462

Last change on this file since 17462 was 17438, checked in by vboxsync, 16 years ago

PGM: Some REM hacking for the ROM registration and some in-progress page sync hacking...

  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
File size: 111.3 KB
Line 
1/* $Id: PGMAllPhys.cpp 17438 2009-03-06 04:35:00Z vboxsync $ */
2/** @file
3 * PGM - Page Manager and Monitor, Physical Memory Addressing.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22/*******************************************************************************
23* Defined Constants And Macros *
24*******************************************************************************/
25/** @def PGM_IGNORE_RAM_FLAGS_RESERVED
26 * Don't respect the MM_RAM_FLAGS_RESERVED flag when converting to HC addresses.
27 *
28 * Since this flag is currently incorrectly kept set for ROM regions we will
29 * have to ignore it for now so we don't break stuff.
30 *
31 * @todo this has been fixed now I believe, remove this hack.
32 */
33#define PGM_IGNORE_RAM_FLAGS_RESERVED
34
35
36/*******************************************************************************
37* Header Files *
38*******************************************************************************/
39#define LOG_GROUP LOG_GROUP_PGM_PHYS
40#include <VBox/pgm.h>
41#include <VBox/trpm.h>
42#include <VBox/vmm.h>
43#include <VBox/iom.h>
44#include <VBox/em.h>
45#include <VBox/rem.h>
46#include "PGMInternal.h"
47#include <VBox/vm.h>
48#include <VBox/param.h>
49#include <VBox/err.h>
50#include <iprt/assert.h>
51#include <iprt/string.h>
52#include <iprt/asm.h>
53#include <VBox/log.h>
54#ifdef IN_RING3
55# include <iprt/thread.h>
56#endif
57
58
59
60#ifndef IN_RING3
61
62/**
63 * \#PF Handler callback for Guest ROM range write access.
64 * We simply ignore the writes or fall back to the recompiler if we don't support the instruction.
65 *
66 * @returns VBox status code (appropritate for trap handling and GC return).
67 * @param pVM VM Handle.
68 * @param uErrorCode CPU Error code.
69 * @param pRegFrame Trap register frame.
70 * @param pvFault The fault address (cr2).
71 * @param GCPhysFault The GC physical address corresponding to pvFault.
72 * @param pvUser User argument. Pointer to the ROM range structure.
73 */
74VMMDECL(int) pgmPhysRomWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void *pvFault, RTGCPHYS GCPhysFault, void *pvUser)
75{
76 int rc;
77#ifdef VBOX_WITH_NEW_PHYS_CODE
78 PPGMROMRANGE pRom = (PPGMROMRANGE)pvUser;
79 uint32_t iPage = GCPhysFault - pRom->GCPhys;
80 Assert(iPage < (pRom->cb >> PAGE_SHIFT));
81 switch (pRom->aPages[iPage].enmProt)
82 {
83 case PGMROMPROT_READ_ROM_WRITE_IGNORE:
84 case PGMROMPROT_READ_RAM_WRITE_IGNORE:
85 {
86#endif
87 /*
88 * If it's a simple instruction which doesn't change the cpu state
89 * we will simply skip it. Otherwise we'll have to defer it to REM.
90 */
91 uint32_t cbOp;
92 DISCPUSTATE Cpu;
93 rc = EMInterpretDisasOne(pVM, pRegFrame, &Cpu, &cbOp);
94 if ( RT_SUCCESS(rc)
95 && Cpu.mode == CPUMODE_32BIT /** @todo why does this matter? */
96 && !(Cpu.prefix & (PREFIX_REPNE | PREFIX_REP | PREFIX_SEG)))
97 {
98 switch (Cpu.opcode)
99 {
100 /** @todo Find other instructions we can safely skip, possibly
101 * adding this kind of detection to DIS or EM. */
102 case OP_MOV:
103 pRegFrame->rip += cbOp;
104 STAM_COUNTER_INC(&pVM->pgm.s.StatRZGuestROMWriteHandled);
105 return VINF_SUCCESS;
106 }
107 }
108 else if (RT_UNLIKELY(rc == VERR_INTERNAL_ERROR))
109 return rc;
110#ifdef VBOX_WITH_NEW_PHYS_CODE
111 break;
112 }
113
114 case PGMROMPROT_READ_RAM_WRITE_RAM:
115 rc = PGMHandlerPhysicalPageTempOff(pVM, pRom->GCPhys, GCPhysFault & X86_PTE_PG_MASK);
116 AssertRC(rc);
117 break; /** @todo Must restart the instruction, not use the interpreter! */
118
119 case PGMROMPROT_READ_ROM_WRITE_RAM:
120 /* Handle it in ring-3 because it's *way* easier there. */
121 break;
122
123 default:
124 AssertMsgFailedReturn(("enmProt=%d iPage=%d GCPhysFault=%RGp\n",
125 pRom->aPages[iPage].enmProt, iPage, GCPhysFault),
126 VERR_INTERNAL_ERROR);
127 }
128#endif
129
130 STAM_COUNTER_INC(&pVM->pgm.s.StatRZGuestROMWriteUnhandled);
131 return VINF_EM_RAW_EMULATE_INSTR;
132}
133
134#endif /* IN_RING3 */
135
136/**
137 * Checks if Address Gate 20 is enabled or not.
138 *
139 * @returns true if enabled.
140 * @returns false if disabled.
141 * @param pVM VM handle.
142 */
143VMMDECL(bool) PGMPhysIsA20Enabled(PVM pVM)
144{
145 LogFlow(("PGMPhysIsA20Enabled %d\n", pVM->pgm.s.fA20Enabled));
146 return !!pVM->pgm.s.fA20Enabled ; /* stupid MS compiler doesn't trust me. */
147}
148
149
150/**
151 * Validates a GC physical address.
152 *
153 * @returns true if valid.
154 * @returns false if invalid.
155 * @param pVM The VM handle.
156 * @param GCPhys The physical address to validate.
157 */
158VMMDECL(bool) PGMPhysIsGCPhysValid(PVM pVM, RTGCPHYS GCPhys)
159{
160 PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhys);
161 return pPage != NULL;
162}
163
164
165/**
166 * Checks if a GC physical address is a normal page,
167 * i.e. not ROM, MMIO or reserved.
168 *
169 * @returns true if normal.
170 * @returns false if invalid, ROM, MMIO or reserved page.
171 * @param pVM The VM handle.
172 * @param GCPhys The physical address to check.
173 */
174VMMDECL(bool) PGMPhysIsGCPhysNormal(PVM pVM, RTGCPHYS GCPhys)
175{
176 PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhys);
177#ifdef VBOX_WITH_NEW_PHYS_CODE
178 return pPage
179 && PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_RAM;
180#else
181 return pPage
182 && !(pPage->HCPhys & (MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO2));
183#endif
184}
185
186
187/**
188 * Converts a GC physical address to a HC physical address.
189 *
190 * @returns VINF_SUCCESS on success.
191 * @returns VERR_PGM_PHYS_PAGE_RESERVED it it's a valid GC physical
192 * page but has no physical backing.
193 * @returns VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid
194 * GC physical address.
195 *
196 * @param pVM The VM handle.
197 * @param GCPhys The GC physical address to convert.
198 * @param pHCPhys Where to store the HC physical address on success.
199 */
200VMMDECL(int) PGMPhysGCPhys2HCPhys(PVM pVM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys)
201{
202 PPGMPAGE pPage;
203 int rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhys, &pPage);
204 if (RT_FAILURE(rc))
205 return rc;
206
207#ifndef PGM_IGNORE_RAM_FLAGS_RESERVED
208 if (RT_UNLIKELY(pPage->HCPhys & MM_RAM_FLAGS_RESERVED)) /** @todo PAGE FLAGS */
209 return VERR_PGM_PHYS_PAGE_RESERVED;
210#endif
211
212 *pHCPhys = PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK);
213 return VINF_SUCCESS;
214}
215
216
217/**
218 * Invalidates the GC page mapping TLB.
219 *
220 * @param pVM The VM handle.
221 */
222VMMDECL(void) PGMPhysInvalidatePageGCMapTLB(PVM pVM)
223{
224 /* later */
225 NOREF(pVM);
226}
227
228
229/**
230 * Invalidates the ring-0 page mapping TLB.
231 *
232 * @param pVM The VM handle.
233 */
234VMMDECL(void) PGMPhysInvalidatePageR0MapTLB(PVM pVM)
235{
236 PGMPhysInvalidatePageR3MapTLB(pVM);
237}
238
239
240/**
241 * Invalidates the ring-3 page mapping TLB.
242 *
243 * @param pVM The VM handle.
244 */
245VMMDECL(void) PGMPhysInvalidatePageR3MapTLB(PVM pVM)
246{
247 pgmLock(pVM);
248 for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.PhysTlbHC.aEntries); i++)
249 {
250 pVM->pgm.s.PhysTlbHC.aEntries[i].GCPhys = NIL_RTGCPHYS;
251 pVM->pgm.s.PhysTlbHC.aEntries[i].pPage = 0;
252 pVM->pgm.s.PhysTlbHC.aEntries[i].pMap = 0;
253 pVM->pgm.s.PhysTlbHC.aEntries[i].pv = 0;
254 }
255 pgmUnlock(pVM);
256}
257
258
259/**
260 * Makes sure that there is at least one handy page ready for use.
261 *
262 * This will also take the appropriate actions when reaching water-marks.
263 *
264 * @returns The following VBox status codes.
265 * @retval VINF_SUCCESS on success.
266 * @retval VERR_EM_NO_MEMORY if we're really out of memory.
267 *
268 * @param pVM The VM handle.
269 *
270 * @remarks Must be called from within the PGM critical section. It may
271 * nip back to ring-3/0 in some cases.
272 */
273static int pgmPhysEnsureHandyPage(PVM pVM)
274{
275 /** @remarks
276 * low-water mark logic for R0 & GC:
277 * - 75%: Set FF.
278 * - 50%: Force return to ring-3 ASAP.
279 *
280 * For ring-3 there is a little problem wrt to the recompiler, so:
281 * - 75%: Set FF.
282 * - 50%: Try allocate pages; on failure we'll force REM to quite ASAP.
283 *
284 * The basic idea is that we should be able to get out of any situation with
285 * only 50% of handy pages remaining.
286 *
287 * At the moment we'll not adjust the number of handy pages relative to the
288 * actual VM RAM committment, that's too much work for now.
289 */
290 Assert(PDMCritSectIsOwner(&pVM->pgm.s.CritSect));
291 Assert(pVM->pgm.s.cHandyPages <= RT_ELEMENTS(pVM->pgm.s.aHandyPages));
292 if ( !pVM->pgm.s.cHandyPages
293#ifdef IN_RING3
294 || pVM->pgm.s.cHandyPages - 1 <= RT_ELEMENTS(pVM->pgm.s.aHandyPages) / 2 /* 50% */
295#endif
296 )
297 {
298 Log(("PGM: cHandyPages=%u out of %u -> allocate more\n", pVM->pgm.s.cHandyPages, RT_ELEMENTS(pVM->pgm.s.aHandyPages)));
299#ifdef IN_RING3
300 int rc = PGMR3PhysAllocateHandyPages(pVM);
301#elif defined(IN_RING0)
302 int rc = VMMR0CallHost(pVM, VMMCALLHOST_PGM_ALLOCATE_HANDY_PAGES, 0);
303#else
304 int rc = VMMGCCallHost(pVM, VMMCALLHOST_PGM_ALLOCATE_HANDY_PAGES, 0);
305#endif
306 if (RT_UNLIKELY(rc != VINF_SUCCESS))
307 {
308 Assert(rc == VINF_EM_NO_MEMORY);
309 if (!pVM->pgm.s.cHandyPages)
310 {
311 LogRel(("PGM: no more handy pages!\n"));
312 return VERR_EM_NO_MEMORY;
313 }
314 Assert(VM_FF_ISSET(pVM, VM_FF_PGM_NEED_HANDY_PAGES));
315#ifdef IN_RING3
316 REMR3NotifyFF(pVM);
317#else
318 VM_FF_SET(pVM, VM_FF_TO_R3);
319#endif
320 }
321 Assert(pVM->pgm.s.cHandyPages <= RT_ELEMENTS(pVM->pgm.s.aHandyPages));
322 }
323 else if (pVM->pgm.s.cHandyPages - 1 <= (RT_ELEMENTS(pVM->pgm.s.aHandyPages) / 4) * 3) /* 75% */
324 {
325 VM_FF_SET(pVM, VM_FF_PGM_NEED_HANDY_PAGES);
326#ifndef IN_RING3
327 if (pVM->pgm.s.cHandyPages - 1 <= RT_ELEMENTS(pVM->pgm.s.aHandyPages) / 2)
328 {
329 Log(("PGM: VM_FF_TO_R3 - cHandyPages=%u out of %u\n", pVM->pgm.s.cHandyPages - 1, RT_ELEMENTS(pVM->pgm.s.aHandyPages)));
330 VM_FF_SET(pVM, VM_FF_TO_R3);
331 }
332#endif
333 }
334
335 return VINF_SUCCESS;
336}
337
338
339/**
340 * Replace a zero or shared page with new page that we can write to.
341 *
342 * @returns The following VBox status codes.
343 * @retval VINF_SUCCESS on success, pPage is modified.
344 * @retval VERR_EM_NO_MEMORY if we're totally out of memory.
345 *
346 * @todo Propagate VERR_EM_NO_MEMORY up the call tree.
347 *
348 * @param pVM The VM address.
349 * @param pPage The physical page tracking structure. This will
350 * be modified on success.
351 * @param GCPhys The address of the page.
352 *
353 * @remarks Must be called from within the PGM critical section. It may
354 * nip back to ring-3/0 in some cases.
355 *
356 * @remarks This function shouldn't really fail, however if it does
357 * it probably means we've screwed up the size of the amount
358 * and/or the low-water mark of handy pages. Or, that some
359 * device I/O is causing a lot of pages to be allocated while
360 * while the host is in a low-memory condition.
361 */
362int pgmPhysAllocPage(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys)
363{
364 LogFlow(("pgmPhysAllocPage: %R[pgmpage] %RGp\n", pPage, GCPhys));
365
366 /*
367 * Ensure that we've got a page handy, take it and use it.
368 */
369 int rc = pgmPhysEnsureHandyPage(pVM);
370 if (RT_FAILURE(rc))
371 {
372 Assert(rc == VERR_EM_NO_MEMORY);
373 return rc;
374 }
375 Assert(PDMCritSectIsOwner(&pVM->pgm.s.CritSect));
376 AssertMsg(PGM_PAGE_IS_ZERO(pPage) || PGM_PAGE_IS_SHARED(pPage), ("%d %RGp\n", PGM_PAGE_GET_STATE(pPage), GCPhys));
377 Assert(!PGM_PAGE_IS_MMIO(pPage));
378
379 uint32_t iHandyPage = --pVM->pgm.s.cHandyPages;
380 Assert(iHandyPage < RT_ELEMENTS(pVM->pgm.s.aHandyPages));
381 Assert(pVM->pgm.s.aHandyPages[iHandyPage].HCPhysGCPhys != NIL_RTHCPHYS);
382 Assert(!(pVM->pgm.s.aHandyPages[iHandyPage].HCPhysGCPhys & ~X86_PTE_PAE_PG_MASK));
383 Assert(pVM->pgm.s.aHandyPages[iHandyPage].idPage != NIL_GMM_PAGEID);
384 Assert(pVM->pgm.s.aHandyPages[iHandyPage].idSharedPage == NIL_GMM_PAGEID);
385
386 /*
387 * There are one or two action to be taken the next time we allocate handy pages:
388 * - Tell the GMM (global memory manager) what the page is being used for.
389 * (Speeds up replacement operations - sharing and defragmenting.)
390 * - If the current backing is shared, it must be freed.
391 */
392 const RTHCPHYS HCPhys = pVM->pgm.s.aHandyPages[iHandyPage].HCPhysGCPhys;
393 pVM->pgm.s.aHandyPages[iHandyPage].HCPhysGCPhys = GCPhys & ~(RTGCPHYS)PAGE_OFFSET_MASK;
394
395 if (PGM_PAGE_IS_SHARED(pPage))
396 {
397 pVM->pgm.s.aHandyPages[iHandyPage].idSharedPage = PGM_PAGE_GET_PAGEID(pPage);
398 Assert(PGM_PAGE_GET_PAGEID(pPage) != NIL_GMM_PAGEID);
399 VM_FF_SET(pVM, VM_FF_PGM_NEED_HANDY_PAGES);
400
401 Log2(("PGM: Replaced shared page %#x at %RGp with %#x / %RHp\n", PGM_PAGE_GET_PAGEID(pPage),
402 GCPhys, pVM->pgm.s.aHandyPages[iHandyPage].idPage, HCPhys));
403 STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,PageReplaceShared));
404 pVM->pgm.s.cSharedPages--;
405 AssertMsgFailed(("TODO: copy shared page content")); /** @todo err.. what about copying the page content? */
406 }
407 else
408 {
409 Log2(("PGM: Replaced zero page %RGp with %#x / %RHp\n", GCPhys, pVM->pgm.s.aHandyPages[iHandyPage].idPage, HCPhys));
410 STAM_COUNTER_INC(&pVM->pgm.s.StatRZPageReplaceZero);
411 pVM->pgm.s.cZeroPages--;
412 Assert(pVM->pgm.s.aHandyPages[iHandyPage].idSharedPage == NIL_GMM_PAGEID);
413 }
414
415 /*
416 * Do the PGMPAGE modifications.
417 */
418 pVM->pgm.s.cPrivatePages++;
419 PGM_PAGE_SET_HCPHYS(pPage, HCPhys);
420 PGM_PAGE_SET_PAGEID(pPage, pVM->pgm.s.aHandyPages[iHandyPage].idPage);
421 PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ALLOCATED);
422
423 return VINF_SUCCESS;
424}
425
426
427/**
428 * Deal with pages that are not writable, i.e. not in the ALLOCATED state.
429 *
430 * @returns VBox status code.
431 * @retval VINF_SUCCESS on success.
432 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
433 *
434 * @param pVM The VM address.
435 * @param pPage The physical page tracking structure.
436 * @param GCPhys The address of the page.
437 *
438 * @remarks Called from within the PGM critical section.
439 */
440int pgmPhysPageMakeWritable(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys)
441{
442 switch (PGM_PAGE_GET_STATE(pPage))
443 {
444 case PGM_PAGE_STATE_WRITE_MONITORED:
445 PGM_PAGE_SET_WRITTEN_TO(pPage);
446 PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ALLOCATED);
447 /* fall thru */
448 default: /* to shut up GCC */
449 case PGM_PAGE_STATE_ALLOCATED:
450 return VINF_SUCCESS;
451
452 /*
453 * Zero pages can be dummy pages for MMIO or reserved memory,
454 * so we need to check the flags before joining cause with
455 * shared page replacement.
456 */
457 case PGM_PAGE_STATE_ZERO:
458 if (PGM_PAGE_IS_MMIO(pPage))
459 return VERR_PGM_PHYS_PAGE_RESERVED;
460 /* fall thru */
461 case PGM_PAGE_STATE_SHARED:
462 return pgmPhysAllocPage(pVM, pPage, GCPhys);
463 }
464}
465
466
467/**
468 * Wrapper for pgmPhysPageMakeWritable which enters the critsect.
469 *
470 * @returns VBox status code.
471 * @retval VINF_SUCCESS on success.
472 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
473 *
474 * @param pVM The VM address.
475 * @param pPage The physical page tracking structure.
476 * @param GCPhys The address of the page.
477 */
478int pgmPhysPageMakeWritableUnlocked(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys)
479{
480 int rc = pgmLock(pVM);
481 if (RT_SUCCESS(rc))
482 {
483 rc = pgmPhysPageMakeWritable(pVM, pPage, GCPhys);
484 pgmUnlock(pVM);
485 }
486 return rc;
487}
488
489
490/**
491 * Internal usage: Map the page specified by its GMM ID.
492 *
493 * This is similar to pgmPhysPageMap
494 *
495 * @returns VBox status code.
496 *
497 * @param pVM The VM handle.
498 * @param idPage The Page ID.
499 * @param HCPhys The physical address (for RC).
500 * @param ppv Where to store the mapping address.
501 *
502 * @remarks Called from within the PGM critical section.
503 */
504int pgmPhysPageMapByPageID(PVM pVM, uint32_t idPage, RTHCPHYS HCPhys, void **ppv)
505{
506 /*
507 * Validation.
508 */
509 Assert(PDMCritSectIsOwner(&pVM->pgm.s.CritSect));
510 AssertReturn(HCPhys && !(HCPhys & PAGE_OFFSET_MASK), VERR_INVALID_PARAMETER);
511 const uint32_t idChunk = idPage >> GMM_CHUNKID_SHIFT;
512 AssertReturn(idChunk != NIL_GMM_CHUNKID, VERR_INVALID_PARAMETER);
513
514#ifdef IN_RC
515 /*
516 * Map it by HCPhys.
517 */
518 return PGMDynMapHCPage(pVM, HCPhys, ppv);
519
520#elif defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
521 /*
522 * Map it by HCPhys.
523 */
524 return pgmR0DynMapHCPageInlined(&pVM->pgm.s, HCPhys, ppv);
525
526#else
527 /*
528 * Find/make Chunk TLB entry for the mapping chunk.
529 */
530 PPGMCHUNKR3MAP pMap;
531 PPGMCHUNKR3MAPTLBE pTlbe = &pVM->pgm.s.ChunkR3Map.Tlb.aEntries[PGM_CHUNKR3MAPTLB_IDX(idChunk)];
532 if (pTlbe->idChunk == idChunk)
533 {
534 STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,ChunkR3MapTlbHits));
535 pMap = pTlbe->pChunk;
536 }
537 else
538 {
539 STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,ChunkR3MapTlbMisses));
540
541 /*
542 * Find the chunk, map it if necessary.
543 */
544 pMap = (PPGMCHUNKR3MAP)RTAvlU32Get(&pVM->pgm.s.ChunkR3Map.pTree, idChunk);
545 if (!pMap)
546 {
547# ifdef IN_RING0
548 int rc = VMMR0CallHost(pVM, VMMCALLHOST_PGM_MAP_CHUNK, idChunk);
549 AssertRCReturn(rc, rc);
550 pMap = (PPGMCHUNKR3MAP)RTAvlU32Get(&pVM->pgm.s.ChunkR3Map.pTree, idChunk);
551 Assert(pMap);
552# else
553 int rc = pgmR3PhysChunkMap(pVM, idChunk, &pMap);
554 if (RT_FAILURE(rc))
555 return rc;
556# endif
557 }
558
559 /*
560 * Enter it into the Chunk TLB.
561 */
562 pTlbe->idChunk = idChunk;
563 pTlbe->pChunk = pMap;
564 pMap->iAge = 0;
565 }
566
567 *ppv = (uint8_t *)pMap->pv + ((idPage &GMM_PAGEID_IDX_MASK) << PAGE_SHIFT);
568 return VINF_SUCCESS;
569#endif
570}
571
572
573/**
574 * Maps a page into the current virtual address space so it can be accessed.
575 *
576 * @returns VBox status code.
577 * @retval VINF_SUCCESS on success.
578 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
579 *
580 * @param pVM The VM address.
581 * @param pPage The physical page tracking structure.
582 * @param GCPhys The address of the page.
583 * @param ppMap Where to store the address of the mapping tracking structure.
584 * @param ppv Where to store the mapping address of the page. The page
585 * offset is masked off!
586 *
587 * @remarks Called from within the PGM critical section.
588 */
589int pgmPhysPageMap(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, PPPGMPAGEMAP ppMap, void **ppv)
590{
591 Assert(PDMCritSectIsOwner(&pVM->pgm.s.CritSect));
592
593#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
594 /*
595 * Just some sketchy GC/R0-darwin code.
596 */
597 *ppMap = NULL;
598 RTHCPHYS HCPhys = PGM_PAGE_GET_HCPHYS(pPage);
599 Assert(HCPhys != pVM->pgm.s.HCPhysZeroPg);
600# ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
601 pgmR0DynMapHCPageInlined(&pVM->pgm.s, HCPhys, ppv);
602# else
603 PGMDynMapHCPage(pVM, HCPhys, ppv);
604# endif
605 return VINF_SUCCESS;
606
607#else /* IN_RING3 || IN_RING0 */
608
609
610 /*
611 * Special case: ZERO and MMIO2 pages.
612 */
613 const uint32_t idChunk = PGM_PAGE_GET_CHUNKID(pPage);
614 if (idChunk == NIL_GMM_CHUNKID)
615 {
616 AssertMsgReturn(PGM_PAGE_GET_PAGEID(pPage) == NIL_GMM_PAGEID, ("pPage=%R[pgmpage]\n", pPage), VERR_INTERNAL_ERROR);
617 if (PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2)
618 {
619 /* Lookup the MMIO2 range and use pvR3 to calc the address. */
620 PPGMRAMRANGE pRam = pgmPhysGetRange(&pVM->pgm.s, GCPhys);
621 AssertMsgReturn(pRam || !pRam->pvR3, ("pRam=%p pPage=%R[pgmpage]\n", pRam, pPage), VERR_INTERNAL_ERROR);
622 *ppv = (void *)((uintptr_t)pRam->pvR3 + (GCPhys - pRam->GCPhys));
623 }
624 else if (PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO)
625 {
626 /** @todo deal with aliased MMIO2 pages somehow...
627 * One solution would be to seed MMIO2 pages to GMM and get unique Page IDs for
628 * them, that would also avoid this mess. It would actually be kind of
629 * elegant... */
630 AssertFailedReturn(VERR_INTERNAL_ERROR);
631 }
632 else
633 {
634 /** @todo handle MMIO2 */
635 AssertMsgReturn(PGM_PAGE_IS_ZERO(pPage), ("pPage=%R[pgmpage]\n", pPage), VERR_INTERNAL_ERROR);
636 AssertMsgReturn(PGM_PAGE_GET_HCPHYS(pPage) == pVM->pgm.s.HCPhysZeroPg,
637 ("pPage=%R[pgmpage]\n", pPage),
638 VERR_INTERNAL_ERROR);
639 *ppv = pVM->pgm.s.CTXALLSUFF(pvZeroPg);
640 }
641 *ppMap = NULL;
642 return VINF_SUCCESS;
643 }
644
645 /*
646 * Find/make Chunk TLB entry for the mapping chunk.
647 */
648 PPGMCHUNKR3MAP pMap;
649 PPGMCHUNKR3MAPTLBE pTlbe = &pVM->pgm.s.ChunkR3Map.Tlb.aEntries[PGM_CHUNKR3MAPTLB_IDX(idChunk)];
650 if (pTlbe->idChunk == idChunk)
651 {
652 STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,ChunkR3MapTlbHits));
653 pMap = pTlbe->pChunk;
654 }
655 else
656 {
657 STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,ChunkR3MapTlbMisses));
658
659 /*
660 * Find the chunk, map it if necessary.
661 */
662 pMap = (PPGMCHUNKR3MAP)RTAvlU32Get(&pVM->pgm.s.ChunkR3Map.pTree, idChunk);
663 if (!pMap)
664 {
665#ifdef IN_RING0
666 int rc = VMMR0CallHost(pVM, VMMCALLHOST_PGM_MAP_CHUNK, idChunk);
667 AssertRCReturn(rc, rc);
668 pMap = (PPGMCHUNKR3MAP)RTAvlU32Get(&pVM->pgm.s.ChunkR3Map.pTree, idChunk);
669 Assert(pMap);
670#else
671 int rc = pgmR3PhysChunkMap(pVM, idChunk, &pMap);
672 if (RT_FAILURE(rc))
673 return rc;
674#endif
675 }
676
677 /*
678 * Enter it into the Chunk TLB.
679 */
680 pTlbe->idChunk = idChunk;
681 pTlbe->pChunk = pMap;
682 pMap->iAge = 0;
683 }
684
685 *ppv = (uint8_t *)pMap->pv + (PGM_PAGE_GET_PAGE_IN_CHUNK(pPage) << PAGE_SHIFT);
686 *ppMap = pMap;
687 return VINF_SUCCESS;
688#endif /* IN_RING3 */
689}
690
691
692#if !defined(IN_RC) && !defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
693/**
694 * Load a guest page into the ring-3 physical TLB.
695 *
696 * @returns VBox status code.
697 * @retval VINF_SUCCESS on success
698 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
699 * @param pPGM The PGM instance pointer.
700 * @param GCPhys The guest physical address in question.
701 */
702int pgmPhysPageLoadIntoTlb(PPGM pPGM, RTGCPHYS GCPhys)
703{
704 STAM_COUNTER_INC(&pPGM->CTX_MID_Z(Stat,PageMapTlbMisses));
705
706 /*
707 * Find the ram range.
708 * 99.8% of requests are expected to be in the first range.
709 */
710 PPGMRAMRANGE pRam = pPGM->CTX_SUFF(pRamRanges);
711 RTGCPHYS off = GCPhys - pRam->GCPhys;
712 if (RT_UNLIKELY(off >= pRam->cb))
713 {
714 do
715 {
716 pRam = pRam->CTX_SUFF(pNext);
717 if (!pRam)
718 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
719 off = GCPhys - pRam->GCPhys;
720 } while (off >= pRam->cb);
721 }
722
723 /*
724 * Map the page.
725 * Make a special case for the zero page as it is kind of special.
726 */
727 PPGMPAGE pPage = &pRam->aPages[off >> PAGE_SHIFT];
728 PPGMPAGEMAPTLBE pTlbe = &pPGM->CTXSUFF(PhysTlb).aEntries[PGM_PAGEMAPTLB_IDX(GCPhys)];
729 if (!PGM_PAGE_IS_ZERO(pPage))
730 {
731 void *pv;
732 PPGMPAGEMAP pMap;
733 int rc = pgmPhysPageMap(PGM2VM(pPGM), pPage, GCPhys, &pMap, &pv);
734 if (RT_FAILURE(rc))
735 return rc;
736 pTlbe->pMap = pMap;
737 pTlbe->pv = pv;
738 }
739 else
740 {
741 Assert(PGM_PAGE_GET_HCPHYS(pPage) == pPGM->HCPhysZeroPg);
742 pTlbe->pMap = NULL;
743 pTlbe->pv = pPGM->CTXALLSUFF(pvZeroPg);
744 }
745 pTlbe->pPage = pPage;
746 return VINF_SUCCESS;
747}
748
749
750/**
751 * Load a guest page into the ring-3 physical TLB.
752 *
753 * @returns VBox status code.
754 * @retval VINF_SUCCESS on success
755 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
756 *
757 * @param pPGM The PGM instance pointer.
758 * @param pPage Pointer to the PGMPAGE structure corresponding to
759 * GCPhys.
760 * @param GCPhys The guest physical address in question.
761 */
762int pgmPhysPageLoadIntoTlbWithPage(PPGM pPGM, PPGMPAGE pPage, RTGCPHYS GCPhys)
763{
764 STAM_COUNTER_INC(&pPGM->CTX_MID_Z(Stat,PageMapTlbMisses));
765
766 /*
767 * Map the page.
768 * Make a special case for the zero page as it is kind of special.
769 */
770 PPGMPAGEMAPTLBE pTlbe = &pPGM->CTXSUFF(PhysTlb).aEntries[PGM_PAGEMAPTLB_IDX(GCPhys)];
771 if (!PGM_PAGE_IS_ZERO(pPage))
772 {
773 void *pv;
774 PPGMPAGEMAP pMap;
775 int rc = pgmPhysPageMap(PGM2VM(pPGM), pPage, GCPhys, &pMap, &pv);
776 if (RT_FAILURE(rc))
777 return rc;
778 pTlbe->pMap = pMap;
779 pTlbe->pv = pv;
780 }
781 else
782 {
783 Assert(PGM_PAGE_GET_HCPHYS(pPage) == pPGM->HCPhysZeroPg);
784 pTlbe->pMap = NULL;
785 pTlbe->pv = pPGM->CTXALLSUFF(pvZeroPg);
786 }
787 pTlbe->pPage = pPage;
788 return VINF_SUCCESS;
789}
790#endif /* !IN_RC && !VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
791
792
793/**
794 * Internal version of PGMPhysGCPhys2CCPtr that expects the caller to
795 * own the PGM lock and therefore not need to lock the mapped page.
796 *
797 * @returns VBox status code.
798 * @retval VINF_SUCCESS on success.
799 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
800 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
801 *
802 * @param pVM The VM handle.
803 * @param GCPhys The guest physical address of the page that should be mapped.
804 * @param pPage Pointer to the PGMPAGE structure for the page.
805 * @param ppv Where to store the address corresponding to GCPhys.
806 *
807 * @internal
808 */
809int pgmPhysGCPhys2CCPtrInternal(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, void **ppv)
810{
811 int rc;
812 AssertReturn(pPage, VERR_INTERNAL_ERROR);
813 Assert(PDMCritSectIsOwner(&pVM->pgm.s.CritSect) || VM_IS_EMT(pVM));
814
815 /*
816 * Make sure the page is writable.
817 */
818 if (RT_UNLIKELY(PGM_PAGE_GET_STATE(pPage) != PGM_PAGE_STATE_ALLOCATED))
819 {
820 rc = pgmPhysPageMakeWritable(pVM, pPage, GCPhys);
821 if (RT_FAILURE(rc))
822 return rc;
823 }
824 Assert(PGM_PAGE_GET_HCPHYS(pPage) != 0);
825
826 /*
827 * Get the mapping address.
828 */
829#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
830 *ppv = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK));
831#else
832 PPGMPAGEMAPTLBE pTlbe;
833 rc = pgmPhysPageQueryTlbeWithPage(&pVM->pgm.s, pPage, GCPhys, &pTlbe);
834 if (RT_FAILURE(rc))
835 return rc;
836 *ppv = (void *)((uintptr_t)pTlbe->pv | (GCPhys & PAGE_OFFSET_MASK));
837#endif
838 return VINF_SUCCESS;
839}
840
841
842/**
843 * Internal version of PGMPhysGCPhys2CCPtrReadOnly that expects the caller to
844 * own the PGM lock and therefore not need to lock the mapped page.
845 *
846 * @returns VBox status code.
847 * @retval VINF_SUCCESS on success.
848 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
849 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
850 *
851 * @param pVM The VM handle.
852 * @param GCPhys The guest physical address of the page that should be mapped.
853 * @param pPage Pointer to the PGMPAGE structure for the page.
854 * @param ppv Where to store the address corresponding to GCPhys.
855 *
856 * @internal
857 */
858int pgmPhysGCPhys2CCPtrInternalReadOnly(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, const void **ppv)
859{
860 int rc;
861 AssertReturn(pPage, VERR_INTERNAL_ERROR);
862 Assert(PDMCritSectIsOwner(&pVM->pgm.s.CritSect) || VM_IS_EMT(pVM));
863 Assert(PGM_PAGE_GET_HCPHYS(pPage) != 0);
864
865 /*
866 * Get the mapping address.
867 */
868#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
869 *ppv = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK)); /** @todo add a read only flag? */
870#else
871 PPGMPAGEMAPTLBE pTlbe;
872 rc = pgmPhysPageQueryTlbeWithPage(&pVM->pgm.s, pPage, GCPhys, &pTlbe);
873 if (RT_FAILURE(rc))
874 return rc;
875 *ppv = (void *)((uintptr_t)pTlbe->pv | (GCPhys & PAGE_OFFSET_MASK));
876#endif
877 return VINF_SUCCESS;
878}
879
880
881/**
882 * Requests the mapping of a guest page into the current context.
883 *
884 * This API should only be used for very short term, as it will consume
885 * scarse resources (R0 and GC) in the mapping cache. When you're done
886 * with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
887 *
888 * This API will assume your intention is to write to the page, and will
889 * therefore replace shared and zero pages. If you do not intend to modify
890 * the page, use the PGMPhysGCPhys2CCPtrReadOnly() API.
891 *
892 * @returns VBox status code.
893 * @retval VINF_SUCCESS on success.
894 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
895 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
896 *
897 * @param pVM The VM handle.
898 * @param GCPhys The guest physical address of the page that should be mapped.
899 * @param ppv Where to store the address corresponding to GCPhys.
900 * @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
901 *
902 * @remark Avoid calling this API from within critical sections (other than
903 * the PGM one) because of the deadlock risk.
904 * @thread Any thread.
905 */
906VMMDECL(int) PGMPhysGCPhys2CCPtr(PVM pVM, RTGCPHYS GCPhys, void **ppv, PPGMPAGEMAPLOCK pLock)
907{
908#ifdef VBOX_WITH_NEW_PHYS_CODE
909# if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
910
911 /*
912 * Find the page and make sure it's writable.
913 */
914 PPGMPAGE pPage;
915 int rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhys, &pPage);
916 if (RT_SUCCESS(rc))
917 {
918 if (RT_UNLIKELY(PGM_PAGE_GET_STATE(pPage) != PGM_PAGE_STATE_ALLOCATED))
919 rc = pgmPhysPageMakeWritable(pVM, pPage, GCPhys);
920 if (RT_SUCCESS(rc))
921 {
922 *ppv = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK)); /** @todo add a read only flag? */
923#if 0
924 pLock->pvMap = 0;
925 pLock->pvPage = pPage;
926#else
927 pLock->u32Dummy = UINT32_MAX;
928#endif
929 }
930 }
931
932# else
933 int rc = pgmLock(pVM);
934 AssertRCReturn(rc, rc);
935
936 /*
937 * Query the Physical TLB entry for the page (may fail).
938 */
939 PPGMPAGEMAPTLBE pTlbe;
940 rc = pgmPhysPageQueryTlbe(&pVM->pgm.s, GCPhys, &pTlbe);
941 if (RT_SUCCESS(rc))
942 {
943 /*
944 * If the page is shared, the zero page, or being write monitored
945 * it must be converted to an page that's writable if possible.
946 */
947 PPGMPAGE pPage = pTlbe->pPage;
948 if (RT_UNLIKELY(PGM_PAGE_GET_STATE(pPage) != PGM_PAGE_STATE_ALLOCATED))
949 {
950 rc = pgmPhysPageMakeWritable(pVM, pPage, GCPhys);
951 if (RT_SUCCESS(rc))
952 rc = pgmPhysPageQueryTlbeWithPage(&pVM->pgm.s, pPage, GCPhys, &pTlbe);
953 }
954 if (RT_SUCCESS(rc))
955 {
956 /*
957 * Now, just perform the locking and calculate the return address.
958 */
959 PPGMPAGEMAP pMap = pTlbe->pMap;
960 pMap->cRefs++;
961#if 0 /** @todo implement locking properly */
962 if (RT_LIKELY(pPage->cLocks != PGM_PAGE_MAX_LOCKS))
963 if (RT_UNLIKELY(++pPage->cLocks == PGM_PAGE_MAX_LOCKS))
964 {
965 AssertMsgFailed(("%RGp is entering permanent locked state!\n", GCPhys));
966 pMap->cRefs++; /* Extra ref to prevent it from going away. */
967 }
968#endif
969 *ppv = (void *)((uintptr_t)pTlbe->pv | (GCPhys & PAGE_OFFSET_MASK));
970 pLock->pvPage = pPage;
971 pLock->pvMap = pMap;
972 }
973 }
974
975 pgmUnlock(pVM);
976#endif /* IN_RING3 || IN_RING0 */
977 return rc;
978
979#else
980 /*
981 * Temporary fallback code.
982 */
983# if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
984/** @todo @bugref{3202}: check up this path. */
985 return PGMDynMapGCPageOff(pVM, GCPhys, ppv);
986# else
987 return PGMPhysGCPhys2R3Ptr(pVM, GCPhys, 1, (PRTR3PTR)ppv);
988# endif
989#endif
990}
991
992
993/**
994 * Requests the mapping of a guest page into the current context.
995 *
996 * This API should only be used for very short term, as it will consume
997 * scarse resources (R0 and GC) in the mapping cache. When you're done
998 * with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
999 *
1000 * @returns VBox status code.
1001 * @retval VINF_SUCCESS on success.
1002 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
1003 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
1004 *
1005 * @param pVM The VM handle.
1006 * @param GCPhys The guest physical address of the page that should be mapped.
1007 * @param ppv Where to store the address corresponding to GCPhys.
1008 * @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
1009 *
1010 * @remark Avoid calling this API from within critical sections (other than
1011 * the PGM one) because of the deadlock risk.
1012 * @thread Any thread.
1013 */
1014VMMDECL(int) PGMPhysGCPhys2CCPtrReadOnly(PVM pVM, RTGCPHYS GCPhys, void const **ppv, PPGMPAGEMAPLOCK pLock)
1015{
1016 /** @todo implement this */
1017 return PGMPhysGCPhys2CCPtr(pVM, GCPhys, (void **)ppv, pLock);
1018}
1019
1020
1021/**
1022 * Requests the mapping of a guest page given by virtual address into the current context.
1023 *
1024 * This API should only be used for very short term, as it will consume
1025 * scarse resources (R0 and GC) in the mapping cache. When you're done
1026 * with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
1027 *
1028 * This API will assume your intention is to write to the page, and will
1029 * therefore replace shared and zero pages. If you do not intend to modify
1030 * the page, use the PGMPhysGCPtr2CCPtrReadOnly() API.
1031 *
1032 * @returns VBox status code.
1033 * @retval VINF_SUCCESS on success.
1034 * @retval VERR_PAGE_TABLE_NOT_PRESENT if the page directory for the virtual address isn't present.
1035 * @retval VERR_PAGE_NOT_PRESENT if the page at the virtual address isn't present.
1036 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
1037 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
1038 *
1039 * @param pVM The VM handle.
1040 * @param GCPhys The guest physical address of the page that should be mapped.
1041 * @param ppv Where to store the address corresponding to GCPhys.
1042 * @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
1043 *
1044 * @remark Avoid calling this API from within critical sections (other than
1045 * the PGM one) because of the deadlock risk.
1046 * @thread EMT
1047 */
1048VMMDECL(int) PGMPhysGCPtr2CCPtr(PVM pVM, RTGCPTR GCPtr, void **ppv, PPGMPAGEMAPLOCK pLock)
1049{
1050 VM_ASSERT_EMT(pVM);
1051 RTGCPHYS GCPhys;
1052 int rc = PGMPhysGCPtr2GCPhys(pVM, GCPtr, &GCPhys);
1053 if (RT_SUCCESS(rc))
1054 rc = PGMPhysGCPhys2CCPtr(pVM, GCPhys, ppv, pLock);
1055 return rc;
1056}
1057
1058
1059/**
1060 * Requests the mapping of a guest page given by virtual address into the current context.
1061 *
1062 * This API should only be used for very short term, as it will consume
1063 * scarse resources (R0 and GC) in the mapping cache. When you're done
1064 * with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
1065 *
1066 * @returns VBox status code.
1067 * @retval VINF_SUCCESS on success.
1068 * @retval VERR_PAGE_TABLE_NOT_PRESENT if the page directory for the virtual address isn't present.
1069 * @retval VERR_PAGE_NOT_PRESENT if the page at the virtual address isn't present.
1070 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
1071 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
1072 *
1073 * @param pVM The VM handle.
1074 * @param GCPhys The guest physical address of the page that should be mapped.
1075 * @param ppv Where to store the address corresponding to GCPhys.
1076 * @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
1077 *
1078 * @remark Avoid calling this API from within critical sections (other than
1079 * the PGM one) because of the deadlock risk.
1080 * @thread EMT
1081 */
1082VMMDECL(int) PGMPhysGCPtr2CCPtrReadOnly(PVM pVM, RTGCPTR GCPtr, void const **ppv, PPGMPAGEMAPLOCK pLock)
1083{
1084 VM_ASSERT_EMT(pVM);
1085 RTGCPHYS GCPhys;
1086 int rc = PGMPhysGCPtr2GCPhys(pVM, GCPtr, &GCPhys);
1087 if (RT_SUCCESS(rc))
1088 rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, GCPhys, ppv, pLock);
1089 return rc;
1090}
1091
1092
1093/**
1094 * Release the mapping of a guest page.
1095 *
1096 * This is the counter part of PGMPhysGCPhys2CCPtr, PGMPhysGCPhys2CCPtrReadOnly
1097 * PGMPhysGCPtr2CCPtr and PGMPhysGCPtr2CCPtrReadOnly.
1098 *
1099 * @param pVM The VM handle.
1100 * @param pLock The lock structure initialized by the mapping function.
1101 */
1102VMMDECL(void) PGMPhysReleasePageMappingLock(PVM pVM, PPGMPAGEMAPLOCK pLock)
1103{
1104#ifdef VBOX_WITH_NEW_PHYS_CODE
1105#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1106 /* currently nothing to do here. */
1107 Assert(pLock->u32Dummy == UINT32_MAX);
1108 pLock->u32Dummy = 0;
1109
1110#else /* IN_RING3 */
1111 PPGMPAGEMAP pMap = (PPGMPAGEMAP)pLock->pvMap;
1112 if (!pMap)
1113 {
1114 /* The ZERO page and MMIO2 ends up here. */
1115 Assert(pLock->pvPage);
1116 pLock->pvPage = NULL;
1117 }
1118 else
1119 {
1120 pgmLock(pVM);
1121
1122# if 0 /** @todo implement page locking */
1123 PPGMPAGE pPage = (PPGMPAGE)pLock->pvPage;
1124 Assert(pPage->cLocks >= 1);
1125 if (pPage->cLocks != PGM_PAGE_MAX_LOCKS)
1126 pPage->cLocks--;
1127# endif
1128
1129 Assert(pMap->cRefs >= 1);
1130 pMap->cRefs--;
1131 pMap->iAge = 0;
1132
1133 pgmUnlock(pVM);
1134 }
1135#endif /* IN_RING3 */
1136#else
1137 NOREF(pVM);
1138 NOREF(pLock);
1139#endif
1140}
1141
1142
1143/**
1144 * Converts a GC physical address to a HC ring-3 pointer.
1145 *
1146 * @returns VINF_SUCCESS on success.
1147 * @returns VERR_PGM_PHYS_PAGE_RESERVED it it's a valid GC physical
1148 * page but has no physical backing.
1149 * @returns VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid
1150 * GC physical address.
1151 * @returns VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY if the range crosses
1152 * a dynamic ram chunk boundary
1153 *
1154 * @param pVM The VM handle.
1155 * @param GCPhys The GC physical address to convert.
1156 * @param cbRange Physical range
1157 * @param pR3Ptr Where to store the R3 pointer on success.
1158 *
1159 * @deprecated Avoid when possible!
1160 */
1161VMMDECL(int) PGMPhysGCPhys2R3Ptr(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange, PRTR3PTR pR3Ptr)
1162{
1163#ifdef VBOX_WITH_NEW_PHYS_CODE
1164/** @todo this is kind of hacky and needs some more work. */
1165 VM_ASSERT_EMT(pVM); /* no longer safe for use outside the EMT thread! */
1166
1167 LogAlways(("PGMPhysGCPhys2R3Ptr(,%RGp,%#x,): dont use this API!\n", GCPhys, cbRange)); /** @todo eliminate this API! */
1168# if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1169 AssertFailedReturn(VERR_NOT_IMPLEMENTED);
1170# else
1171 pgmLock(pVM);
1172
1173 PPGMRAMRANGE pRam;
1174 PPGMPAGE pPage;
1175 int rc = pgmPhysGetPageAndRangeEx(&pVM->pgm.s, GCPhys, &pPage, &pRam);
1176 if (RT_SUCCESS(rc))
1177 rc = pgmPhysGCPhys2CCPtrInternal(pVM, pPage, GCPhys, (void **)&pR3Ptr);
1178
1179 pgmUnlock(pVM);
1180 Assert(rc <= VINF_SUCCESS);
1181 return rc;
1182# endif
1183
1184#else /* !VBOX_WITH_NEW_PHYS_CODE */
1185
1186 if ((GCPhys & PGM_DYNAMIC_CHUNK_BASE_MASK) != ((GCPhys+cbRange-1) & PGM_DYNAMIC_CHUNK_BASE_MASK))
1187 {
1188 AssertMsgFailed(("%RGp - %RGp crosses a chunk boundary!!\n", GCPhys, GCPhys+cbRange));
1189 LogRel(("PGMPhysGCPhys2HCPtr %RGp - %RGp crosses a chunk boundary!!\n", GCPhys, GCPhys+cbRange));
1190 return VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY;
1191 }
1192
1193 PPGMRAMRANGE pRam;
1194 PPGMPAGE pPage;
1195 int rc = pgmPhysGetPageAndRangeEx(&pVM->pgm.s, GCPhys, &pPage, &pRam);
1196 if (RT_FAILURE(rc))
1197 return rc;
1198
1199#ifndef PGM_IGNORE_RAM_FLAGS_RESERVED
1200 if (RT_UNLIKELY(PGM_PAGE_IS_RESERVED(pPage)))
1201 return VERR_PGM_PHYS_PAGE_RESERVED;
1202#endif
1203
1204 RTGCPHYS off = GCPhys - pRam->GCPhys;
1205 if (RT_UNLIKELY(off + cbRange > pRam->cb))
1206 {
1207 AssertMsgFailed(("%RGp - %RGp crosses a chunk boundary!!\n", GCPhys, GCPhys + cbRange));
1208 return VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY;
1209 }
1210
1211 if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
1212 {
1213 unsigned iChunk = (off >> PGM_DYNAMIC_CHUNK_SHIFT);
1214#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) /* ASSUMES this is a rare occurence */
1215 PRTR3UINTPTR paChunkR3Ptrs = (PRTR3UINTPTR)MMHyperR3ToCC(pVM, pRam->paChunkR3Ptrs);
1216 *pR3Ptr = (RTR3PTR)(paChunkR3Ptrs[iChunk] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
1217#else
1218 *pR3Ptr = (RTR3PTR)(pRam->paChunkR3Ptrs[iChunk] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
1219#endif
1220 }
1221 else if (RT_LIKELY(pRam->pvR3))
1222 *pR3Ptr = (RTR3PTR)((RTR3UINTPTR)pRam->pvR3 + off);
1223 else
1224 return VERR_PGM_PHYS_PAGE_RESERVED;
1225 return VINF_SUCCESS;
1226#endif /* !VBOX_WITH_NEW_PHYS_CODE */
1227}
1228
1229
1230#ifdef VBOX_STRICT
1231/**
1232 * PGMPhysGCPhys2R3Ptr convenience for use with assertions.
1233 *
1234 * @returns The R3Ptr, NIL_RTR3PTR on failure.
1235 * @param pVM The VM handle.
1236 * @param GCPhys The GC Physical addresss.
1237 * @param cbRange Physical range.
1238 *
1239 * @deprecated Avoid when possible.
1240 */
1241VMMDECL(RTR3PTR) PGMPhysGCPhys2R3PtrAssert(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange)
1242{
1243 RTR3PTR R3Ptr;
1244 int rc = PGMPhysGCPhys2R3Ptr(pVM, GCPhys, cbRange, &R3Ptr);
1245 if (RT_SUCCESS(rc))
1246 return R3Ptr;
1247 return NIL_RTR3PTR;
1248}
1249#endif /* VBOX_STRICT */
1250
1251
1252/**
1253 * Converts a guest pointer to a GC physical address.
1254 *
1255 * This uses the current CR3/CR0/CR4 of the guest.
1256 *
1257 * @returns VBox status code.
1258 * @param pVM The VM Handle
1259 * @param GCPtr The guest pointer to convert.
1260 * @param pGCPhys Where to store the GC physical address.
1261 */
1262VMMDECL(int) PGMPhysGCPtr2GCPhys(PVM pVM, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
1263{
1264 int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, pGCPhys);
1265 if (pGCPhys && RT_SUCCESS(rc))
1266 *pGCPhys |= (RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK;
1267 return rc;
1268}
1269
1270
1271/**
1272 * Converts a guest pointer to a HC physical address.
1273 *
1274 * This uses the current CR3/CR0/CR4 of the guest.
1275 *
1276 * @returns VBox status code.
1277 * @param pVM The VM Handle
1278 * @param GCPtr The guest pointer to convert.
1279 * @param pHCPhys Where to store the HC physical address.
1280 */
1281VMMDECL(int) PGMPhysGCPtr2HCPhys(PVM pVM, RTGCPTR GCPtr, PRTHCPHYS pHCPhys)
1282{
1283 RTGCPHYS GCPhys;
1284 int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, &GCPhys);
1285 if (RT_SUCCESS(rc))
1286 rc = PGMPhysGCPhys2HCPhys(pVM, GCPhys | ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), pHCPhys);
1287 return rc;
1288}
1289
1290
1291/**
1292 * Converts a guest pointer to a R3 pointer.
1293 *
1294 * This uses the current CR3/CR0/CR4 of the guest.
1295 *
1296 * @returns VBox status code.
1297 * @param pVM The VM Handle
1298 * @param GCPtr The guest pointer to convert.
1299 * @param pR3Ptr Where to store the R3 virtual address.
1300 *
1301 * @deprecated Don't use this.
1302 */
1303VMMDECL(int) PGMPhysGCPtr2R3Ptr(PVM pVM, RTGCPTR GCPtr, PRTR3PTR pR3Ptr)
1304{
1305#ifdef VBOX_WITH_NEW_PHYS_CODE
1306 VM_ASSERT_EMT(pVM); /* no longer safe for use outside the EMT thread! */
1307#endif
1308
1309 RTGCPHYS GCPhys;
1310 int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, &GCPhys);
1311 if (RT_SUCCESS(rc))
1312 rc = PGMPhysGCPhys2R3Ptr(pVM, GCPhys | ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), 1 /* we always stay within one page */, pR3Ptr);
1313 return rc;
1314}
1315
1316
1317
1318#undef LOG_GROUP
1319#define LOG_GROUP LOG_GROUP_PGM_PHYS_ACCESS
1320
1321
1322#ifdef IN_RING3
1323/**
1324 * Cache PGMPhys memory access
1325 *
1326 * @param pVM VM Handle.
1327 * @param pCache Cache structure pointer
1328 * @param GCPhys GC physical address
1329 * @param pbHC HC pointer corresponding to physical page
1330 *
1331 * @thread EMT.
1332 */
1333static void pgmPhysCacheAdd(PVM pVM, PGMPHYSCACHE *pCache, RTGCPHYS GCPhys, uint8_t *pbR3)
1334{
1335 uint32_t iCacheIndex;
1336
1337 Assert(VM_IS_EMT(pVM));
1338
1339 GCPhys = PHYS_PAGE_ADDRESS(GCPhys);
1340 pbR3 = (uint8_t *)PAGE_ADDRESS(pbR3);
1341
1342 iCacheIndex = ((GCPhys >> PAGE_SHIFT) & PGM_MAX_PHYSCACHE_ENTRIES_MASK);
1343
1344 ASMBitSet(&pCache->aEntries, iCacheIndex);
1345
1346 pCache->Entry[iCacheIndex].GCPhys = GCPhys;
1347 pCache->Entry[iCacheIndex].pbR3 = pbR3;
1348}
1349#endif /* IN_RING3 */
1350
1351#ifdef VBOX_WITH_NEW_PHYS_CODE
1352
1353/**
1354 * Deals with reading from a page with one or more ALL access handlers.
1355 *
1356 * @param pVM The VM handle.
1357 * @param pPage The page descriptor.
1358 * @param GCPhys The physical address to start reading at.
1359 * @param pvBuf Where to put the bits we read.
1360 * @param cb How much to read - less or equal to a page.
1361 */
1362static void pgmPhysReadHandler(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, void *pvBuf, size_t cb)
1363{
1364 /*
1365 * The most frequent access here is MMIO and shadowed ROM.
1366 *
1367 * The current code ASSUMES all these access handlers are page sized
1368 * and that we do NOT use any virtual ones.
1369 */
1370 if ( PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) == PGM_PAGE_HNDL_PHYS_STATE_ALL
1371 && PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) != PGM_PAGE_HNDL_VIRT_STATE_ALL)
1372 {
1373#ifdef IN_RING3
1374 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1375 AssertReleaseMsg(pCur, ("GCPhys=%RGp cb=%#x\n", GCPhys, cb));
1376 Assert(GCPhys >= pCur->Core.Key && GCPhys <= pCur->Core.KeyLast);
1377 Assert(pCur->CTX_SUFF(pfnHandler));
1378
1379 const void *pvSrc;
1380 int rc = pgmPhysGCPhys2CCPtrInternalReadOnly(pVM, pPage, GCPhys, &pvSrc);
1381 if (RT_SUCCESS(rc))
1382 {
1383 STAM_PROFILE_START(&pCur->Stat, h);
1384 int rc = pCur->CTX_SUFF(pfnHandler)(pVM, GCPhys, (void *)pvSrc, pvBuf, cb, PGMACCESSTYPE_READ, pCur->CTX_SUFF(pvUser));
1385 STAM_PROFILE_STOP(&pCur->Stat, h);
1386 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1387 memcpy(pvBuf, pvSrc, cb);
1388 else
1389 AssertLogRelMsg(rc == VINF_SUCCESS, ("rc=%Rrc GCPhys=%RGp\n", rc, GCPhys));
1390 }
1391 else
1392 {
1393 AssertLogRelMsgFailed(("pgmPhysGCPhys2CCPtrInternalReadOnly failed on %RGp / %R[pgmpage] -> %Rrc\n",
1394 GCPhys, pPage, rc));
1395 memset(pvBuf, 0xff, cb);
1396 }
1397#else
1398 AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cb=%#x\n", GCPhys, cb));
1399#endif
1400 }
1401 else
1402 AssertReleaseMsgFailed(("ALL access virtual handlers are not implemented here\n"));
1403}
1404
1405
1406/**
1407 * Read physical memory.
1408 *
1409 * This API respects access handlers and MMIO. Use PGMPhysSimpleReadGCPhys() if you
1410 * want to ignore those.
1411 *
1412 * @param pVM VM Handle.
1413 * @param GCPhys Physical address start reading from.
1414 * @param pvBuf Where to put the read bits.
1415 * @param cbRead How many bytes to read.
1416 */
1417VMMDECL(void) PGMPhysRead(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
1418{
1419 AssertMsgReturnVoid(cbRead > 0, ("don't even think about reading zero bytes!\n"));
1420 LogFlow(("PGMPhysRead: %RGp %d\n", GCPhys, cbRead));
1421
1422 pgmLock(pVM);
1423
1424 /*
1425 * Copy loop on ram ranges.
1426 */
1427 PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
1428 for (;;)
1429 {
1430 /* Find range. */
1431 while (pRam && GCPhys > pRam->GCPhysLast)
1432 pRam = pRam->CTX_SUFF(pNext);
1433 /* Inside range or not? */
1434 if (pRam && GCPhys >= pRam->GCPhys)
1435 {
1436 /*
1437 * Must work our way thru this page by page.
1438 */
1439 RTGCPHYS off = GCPhys - pRam->GCPhys;
1440 while (off < pRam->cb)
1441 {
1442 unsigned iPage = off >> PAGE_SHIFT;
1443 PPGMPAGE pPage = &pRam->aPages[iPage];
1444 size_t cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1445 if (cb > cbRead)
1446 cb = cbRead;
1447
1448 /*
1449 * Any ALL access handlers?
1450 */
1451 if (RT_UNLIKELY(PGM_PAGE_HAS_ACTIVE_ALL_HANDLERS(pPage)))
1452 pgmPhysReadHandler(pVM, pPage, pRam->GCPhys + off, pvBuf, cb);
1453 else
1454 {
1455 /*
1456 * Get the pointer to the page.
1457 */
1458 const void *pvSrc;
1459 int rc = pgmPhysGCPhys2CCPtrInternalReadOnly(pVM, pPage, pRam->GCPhys + off, &pvSrc);
1460 if (RT_SUCCESS(rc))
1461 memcpy(pvBuf, pvSrc, cb);
1462 else
1463 AssertLogRelMsgFailed(("pgmPhysGCPhys2CCPtrInternalReadOnly failed on %RGp / %R[pgmpage] -> %Rrc\n",
1464 pRam->GCPhys + off, pPage, rc));
1465 }
1466
1467 /* next page */
1468 if (cb >= cbRead)
1469 {
1470 pgmUnlock(pVM);
1471 return;
1472 }
1473 cbRead -= cb;
1474 off += cb;
1475 pvBuf = (char *)pvBuf + cb;
1476 } /* walk pages in ram range. */
1477
1478 GCPhys = pRam->GCPhysLast + 1;
1479 }
1480 else
1481 {
1482 LogFlow(("PGMPhysRead: Unassigned %RGp size=%u\n", GCPhys, cbRead));
1483
1484 /*
1485 * Unassigned address space.
1486 */
1487 if (!pRam)
1488 break;
1489 size_t cb = pRam->GCPhys - GCPhys;
1490 if (cb >= cbRead)
1491 {
1492#if 0 /** @todo enable this later. */
1493 memset(pvBuf, 0xff, cbRead);
1494#else
1495 memset(pvBuf, 0, cbRead);
1496#endif
1497 break;
1498 }
1499
1500#if 0 /** @todo enable this later. */
1501 memset(pvBuf, 0xff, cb);
1502#else
1503 memset(pvBuf, 0, cb);
1504#endif
1505 cbRead -= cb;
1506 pvBuf = (char *)pvBuf + cb;
1507 GCPhys += cb;
1508 }
1509 } /* Ram range walk */
1510
1511 pgmUnlock(pVM);
1512}
1513
1514#else /* Old PGMPhysRead */
1515
1516/**
1517 * Read physical memory.
1518 *
1519 * This API respects access handlers and MMIO. Use PGMPhysSimpleReadGCPhys() if you
1520 * want to ignore those.
1521 *
1522 * @param pVM VM Handle.
1523 * @param GCPhys Physical address start reading from.
1524 * @param pvBuf Where to put the read bits.
1525 * @param cbRead How many bytes to read.
1526 */
1527VMMDECL(void) PGMPhysRead(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
1528{
1529#ifdef IN_RING3
1530 bool fGrabbedLock = false;
1531#endif
1532
1533 AssertMsg(cbRead > 0, ("don't even think about reading zero bytes!\n"));
1534 if (cbRead == 0)
1535 return;
1536
1537 LogFlow(("PGMPhysRead: %RGp %d\n", GCPhys, cbRead));
1538
1539#ifdef IN_RING3
1540 if (!VM_IS_EMT(pVM))
1541 {
1542 pgmLock(pVM);
1543 fGrabbedLock = true;
1544 }
1545#endif
1546
1547 /*
1548 * Copy loop on ram ranges.
1549 */
1550 PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
1551 for (;;)
1552 {
1553 /* Find range. */
1554 while (pRam && GCPhys > pRam->GCPhysLast)
1555 pRam = pRam->CTX_SUFF(pNext);
1556 /* Inside range or not? */
1557 if (pRam && GCPhys >= pRam->GCPhys)
1558 {
1559 /*
1560 * Must work our way thru this page by page.
1561 */
1562 RTGCPHYS off = GCPhys - pRam->GCPhys;
1563 while (off < pRam->cb)
1564 {
1565 unsigned iPage = off >> PAGE_SHIFT;
1566 PPGMPAGE pPage = &pRam->aPages[iPage];
1567 size_t cb;
1568
1569 /* Physical chunk in dynamically allocated range not present? */
1570 if (RT_UNLIKELY(!PGM_PAGE_GET_HCPHYS(pPage)))
1571 {
1572 /* Treat it as reserved; return zeros */
1573 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1574 if (cb >= cbRead)
1575 {
1576 memset(pvBuf, 0, cbRead);
1577 goto l_End;
1578 }
1579 memset(pvBuf, 0, cb);
1580 }
1581 /* temp hacks, will be reorganized. */
1582 /*
1583 * Physical handler.
1584 */
1585 else if ( RT_UNLIKELY(PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) >= PGM_PAGE_HNDL_PHYS_STATE_ALL)
1586 && !(pPage->HCPhys & MM_RAM_FLAGS_MMIO)) /// @todo PAGE FLAGS
1587 {
1588 int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1589 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1590
1591#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
1592 /* find and call the handler */
1593 PPGMPHYSHANDLER pNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesR3->PhysHandlers, GCPhys);
1594 if (pNode && pNode->pfnHandlerR3)
1595 {
1596 size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
1597 if (cbRange < cb)
1598 cb = cbRange;
1599 if (cb > cbRead)
1600 cb = cbRead;
1601
1602 void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1603
1604 /* Note! Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1605 rc = pNode->pfnHandlerR3(pVM, GCPhys, pvSrc, pvBuf, cb, PGMACCESSTYPE_READ, pNode->pvUserR3);
1606 }
1607#endif /* IN_RING3 */
1608 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1609 {
1610#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1611 void *pvSrc = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
1612#else
1613 void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1614#endif
1615
1616 if (cb >= cbRead)
1617 {
1618 memcpy(pvBuf, pvSrc, cbRead);
1619 goto l_End;
1620 }
1621 memcpy(pvBuf, pvSrc, cb);
1622 }
1623 else if (cb >= cbRead)
1624 goto l_End;
1625 }
1626 /*
1627 * Virtual handlers.
1628 */
1629 else if ( RT_UNLIKELY(PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) >= PGM_PAGE_HNDL_VIRT_STATE_ALL)
1630 && !(pPage->HCPhys & MM_RAM_FLAGS_MMIO)) /// @todo PAGE FLAGS
1631 {
1632 int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1633 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1634#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
1635 /* Search the whole tree for matching physical addresses (rather expensive!) */
1636 PPGMVIRTHANDLER pNode;
1637 unsigned iPage;
1638 int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pNode, &iPage);
1639 if (RT_SUCCESS(rc2) && pNode->pfnHandlerR3)
1640 {
1641 size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
1642 if (cbRange < cb)
1643 cb = cbRange;
1644 if (cb > cbRead)
1645 cb = cbRead;
1646 RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pNode->Core.Key & PAGE_BASE_GC_MASK)
1647 + (iPage << PAGE_SHIFT) + (off & PAGE_OFFSET_MASK);
1648
1649 void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1650
1651 /* Note! Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1652 rc = pNode->pfnHandlerR3(pVM, (RTGCPTR)GCPtr, pvSrc, pvBuf, cb, PGMACCESSTYPE_READ, 0);
1653 }
1654#endif /* IN_RING3 */
1655 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1656 {
1657#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1658 void *pvSrc = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
1659#else
1660 void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1661#endif
1662 if (cb >= cbRead)
1663 {
1664 memcpy(pvBuf, pvSrc, cbRead);
1665 goto l_End;
1666 }
1667 memcpy(pvBuf, pvSrc, cb);
1668 }
1669 else if (cb >= cbRead)
1670 goto l_End;
1671 }
1672 else
1673 {
1674 switch (pPage->HCPhys & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_ROM)) /** @todo PAGE FLAGS */
1675 {
1676 /*
1677 * Normal memory or ROM.
1678 */
1679 case 0:
1680 case MM_RAM_FLAGS_ROM:
1681 case MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_RESERVED:
1682 //case MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_MMIO2: /* = shadow */ - //MMIO2 isn't in the mask.
1683 case MM_RAM_FLAGS_MMIO2: // MMIO2 isn't in the mask.
1684 {
1685#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1686 void *pvSrc = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
1687#else
1688 void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1689#endif
1690 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1691 if (cb >= cbRead)
1692 {
1693#if defined(IN_RING3) && defined(PGM_PHYSMEMACCESS_CACHING)
1694 if (cbRead <= 4 && !fGrabbedLock /* i.e. EMT */)
1695 pgmPhysCacheAdd(pVM, &pVM->pgm.s.pgmphysreadcache, GCPhys, (uint8_t*)pvSrc);
1696#endif /* IN_RING3 && PGM_PHYSMEMACCESS_CACHING */
1697 memcpy(pvBuf, pvSrc, cbRead);
1698 goto l_End;
1699 }
1700 memcpy(pvBuf, pvSrc, cb);
1701 break;
1702 }
1703
1704 /*
1705 * All reserved, nothing there.
1706 */
1707 case MM_RAM_FLAGS_RESERVED:
1708 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1709 if (cb >= cbRead)
1710 {
1711 memset(pvBuf, 0, cbRead);
1712 goto l_End;
1713 }
1714 memset(pvBuf, 0, cb);
1715 break;
1716
1717 /*
1718 * The rest needs to be taken more carefully.
1719 */
1720 default:
1721#if 1 /** @todo r=bird: Can you do this properly please. */
1722 /** @todo Try MMIO; quick hack */
1723 if (cbRead <= 8 && IOMMMIORead(pVM, GCPhys, (uint32_t *)pvBuf, cbRead) == VINF_SUCCESS)
1724 goto l_End;
1725#endif
1726
1727 /** @todo fix me later. */
1728 AssertReleaseMsgFailed(("Unknown read at %RGp size %u implement the complex physical reading case %RHp\n",
1729 GCPhys, cbRead,
1730 pPage->HCPhys & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_ROM))); /** @todo PAGE FLAGS */
1731 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1732 break;
1733 }
1734 }
1735
1736 cbRead -= cb;
1737 off += cb;
1738 pvBuf = (char *)pvBuf + cb;
1739 }
1740
1741 GCPhys = pRam->GCPhysLast + 1;
1742 }
1743 else
1744 {
1745 LogFlow(("PGMPhysRead: Unassigned %RGp size=%u\n", GCPhys, cbRead));
1746
1747 /*
1748 * Unassigned address space.
1749 */
1750 size_t cb;
1751 if ( !pRam
1752 || (cb = pRam->GCPhys - GCPhys) >= cbRead)
1753 {
1754 memset(pvBuf, 0, cbRead);
1755 goto l_End;
1756 }
1757
1758 memset(pvBuf, 0, cb); /** @todo this is wrong, unassigne == 0xff not 0x00! */
1759 cbRead -= cb;
1760 pvBuf = (char *)pvBuf + cb;
1761 GCPhys += cb;
1762 }
1763 }
1764l_End:
1765#ifdef IN_RING3
1766 if (fGrabbedLock)
1767 pgmUnlock(pVM);
1768#endif
1769 return;
1770}
1771
1772#endif /* Old PGMPhysRead */
1773#ifdef VBOX_WITH_NEW_PHYS_CODE
1774
1775/**
1776 * Deals with writing to a page with one or more WRITE or ALL access handlers.
1777 *
1778 * @param pVM The VM handle.
1779 * @param pPage The page descriptor.
1780 * @param GCPhys The physical address to start writing at.
1781 * @param pvBuf What to write.
1782 * @param cbWrite How much to write - less or equal to a page.
1783 */
1784static void pgmPhysWriteHandler(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, void const *pvBuf, size_t cbWrite)
1785{
1786 void *pvDst = NULL;
1787 int rc;
1788
1789 /*
1790 * Give priority to physical handlers (like #PF does).
1791 *
1792 * Hope for a lonely physical handler first that covers the whole
1793 * write area. This should be a pretty frequent case with MMIO and
1794 * the heavy usage of full page handlers in the page pool.
1795 */
1796 if ( !PGM_PAGE_HAS_ACTIVE_VIRTUAL_HANDLERS(pPage)
1797 || PGM_PAGE_IS_MMIO(pPage) /* screw virtual handlers on MMIO pages */)
1798 {
1799 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1800 if (pCur)
1801 {
1802 Assert(GCPhys >= pCur->Core.Key && GCPhys <= pCur->Core.KeyLast);
1803 Assert(pCur->CTX_SUFF(pfnHandler));
1804
1805 size_t cbRange = pCur->Core.KeyLast - GCPhys + 1;
1806 if (cbRange > cbWrite)
1807 cbRange = cbWrite;
1808
1809#ifdef IN_RING3
1810 if (!PGM_PAGE_IS_MMIO(pPage))
1811 rc = pgmPhysGCPhys2CCPtrInternal(pVM, pPage, GCPhys, &pvDst);
1812 else
1813 rc = VINF_SUCCESS;
1814 if (RT_SUCCESS(rc))
1815 {
1816 STAM_PROFILE_START(&pCur->Stat, h);
1817 rc = pCur->CTX_SUFF(pfnHandler)(pVM, GCPhys, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, pCur->CTX_SUFF(pvUser));
1818 STAM_PROFILE_STOP(&pCur->Stat, h);
1819 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1820 memcpy(pvDst, pvBuf, cbRange);
1821 else
1822 AssertLogRelMsg(rc == VINF_SUCCESS, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pCur->pszDesc));
1823 }
1824 else
1825 AssertLogRelMsgFailedReturnVoid(("pgmPhysGCPhys2CCPtrInternal failed on %RGp / %R[pgmpage] -> %Rrc\n",
1826 GCPhys, pPage, rc));
1827#else
1828 AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cbRange=%#x\n", GCPhys, cbRange));
1829#endif
1830 if (RT_LIKELY(cbRange == cbWrite))
1831 return;
1832
1833 /* more fun to be had below */
1834 cbWrite -= cbRange;
1835 GCPhys += cbRange;
1836 pvBuf = (uint8_t *)pvBuf + cbRange;
1837 pvDst = (uint8_t *)pvDst + cbRange;
1838 }
1839 /* else: the handler is somewhere else in the page, deal with it below. */
1840 Assert(!PGM_PAGE_IS_MMIO(pPage)); /* MMIO handlers are all PAGE_SIZEed! */
1841 }
1842 /*
1843 * A virtual handler without any interfering physical handlers.
1844 * Hopefully it'll conver the whole write.
1845 */
1846 else if (!PGM_PAGE_HAS_ACTIVE_PHYSICAL_HANDLERS(pPage))
1847 {
1848 unsigned iPage;
1849 PPGMVIRTHANDLER pCur;
1850 rc = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pCur, &iPage);
1851 if (RT_SUCCESS(rc))
1852 {
1853 size_t cbRange = (PAGE_OFFSET_MASK & pCur->Core.KeyLast) - (PAGE_OFFSET_MASK & GCPhys) + 1;
1854 if (cbRange > cbWrite)
1855 cbRange = cbWrite;
1856
1857#ifdef IN_RING3
1858 rc = pgmPhysGCPhys2CCPtrInternal(pVM, pPage, GCPhys, &pvDst);
1859 if (RT_SUCCESS(rc))
1860 {
1861 rc = VINF_PGM_HANDLER_DO_DEFAULT;
1862 if (pCur->pfnHandlerR3)
1863 {
1864 RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pCur->Core.Key & PAGE_BASE_GC_MASK)
1865 + (iPage << PAGE_SHIFT)
1866 + (GCPhys & PAGE_OFFSET_MASK);
1867
1868 STAM_PROFILE_START(&pCur->Stat, h);
1869 rc = pCur->CTX_SUFF(pfnHandler)(pVM, GCPtr, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, /*pCur->CTX_SUFF(pvUser)*/ NULL);
1870 STAM_PROFILE_STOP(&pCur->Stat, h);
1871 }
1872 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1873 memcpy(pvDst, pvBuf, cbRange);
1874 else
1875 AssertLogRelMsg(rc == VINF_SUCCESS, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pCur->pszDesc));
1876 }
1877 else
1878 AssertLogRelMsgFailedReturnVoid(("pgmPhysGCPhys2CCPtrInternal failed on %RGp / %R[pgmpage] -> %Rrc\n",
1879 GCPhys, pPage, rc));
1880#else
1881 AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cb=%#x\n", GCPhys, cbRange));
1882#endif
1883 if (RT_LIKELY(cbRange == cbWrite))
1884 return;
1885
1886 /* more fun to be had below */
1887 cbWrite -= cbRange;
1888 GCPhys += cbRange;
1889 pvBuf = (uint8_t *)pvBuf + cbRange;
1890 pvDst = (uint8_t *)pvDst + cbRange;
1891 }
1892 /* else: the handler is somewhere else in the page, deal with it below. */
1893 }
1894
1895 /*
1896 * Deal with all the odd ends.
1897 */
1898
1899 /* We need a writable destination page. */
1900 if (!pvDst)
1901 {
1902 rc = pgmPhysGCPhys2CCPtrInternal(pVM, pPage, GCPhys, &pvDst);
1903 AssertLogRelMsgReturnVoid(RT_SUCCESS(rc),
1904 ("pgmPhysGCPhys2CCPtrInternal failed on %RGp / %R[pgmpage] -> %Rrc\n",
1905 GCPhys, pPage, rc));
1906 }
1907
1908 /* The loop state (big + ugly). */
1909 unsigned iVirtPage = 0;
1910 PPGMVIRTHANDLER pVirt = NULL;
1911 uint32_t offVirt = PAGE_SIZE;
1912 uint32_t offVirtLast = PAGE_SIZE;
1913 bool fMoreVirt = PGM_PAGE_HAS_ACTIVE_VIRTUAL_HANDLERS(pPage);
1914
1915 PPGMPHYSHANDLER pPhys = NULL;
1916 uint32_t offPhys = PAGE_SIZE;
1917 uint32_t offPhysLast = PAGE_SIZE;
1918 bool fMorePhys = PGM_PAGE_HAS_ACTIVE_PHYSICAL_HANDLERS(pPage);
1919
1920 /* The loop. */
1921 for (;;)
1922 {
1923 /*
1924 * Find the closest handler at or above GCPhys.
1925 */
1926 if (fMoreVirt && !pVirt)
1927 {
1928 int rc = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pVirt, &iVirtPage);
1929 if (RT_SUCCESS(rc))
1930 {
1931 offVirt = 0;
1932 offVirtLast = (pVirt->aPhysToVirt[iVirtPage].Core.KeyLast & PAGE_OFFSET_MASK) - (GCPhys & PAGE_OFFSET_MASK);
1933 }
1934 else
1935 {
1936 PPGMPHYS2VIRTHANDLER pVirtPhys;
1937 pVirtPhys = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGetBestFit(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers,
1938 GCPhys, true /* fAbove */);
1939 if (pVirtPhys)
1940 {
1941 /* ASSUME that pVirtPhys only covers one page. */
1942 Assert((pVirtPhys->Core.Key >> PAGE_SHIFT) == (pVirtPhys->Core.KeyLast >> PAGE_SHIFT));
1943 pVirt = (PPGMVIRTHANDLER)((uintptr_t)pVirtPhys + pVirtPhys->offVirtHandler);
1944 iVirtPage = pVirtPhys - &pVirt->aPhysToVirt[0]; Assert(iVirtPage == 0);
1945 offVirtLast = pVirtPhys->Core.KeyLast & PAGE_OFFSET_MASK - (GCPhys & PAGE_OFFSET_MASK);
1946 }
1947 else
1948 {
1949 pVirt = NULL;
1950 fMoreVirt = false;
1951 offVirt = offVirtLast = PAGE_SIZE;
1952 }
1953 }
1954 }
1955
1956 if (fMorePhys && !pPhys)
1957 {
1958 pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1959 if (pPhys)
1960 {
1961 offPhys = 0;
1962 offPhysLast = pPhys->Core.KeyLast - GCPhys; /* ASSUMES < 4GB handlers... */
1963 }
1964 else
1965 {
1966 pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers,
1967 GCPhys, true /* fAbove */);
1968 if ( pPhys
1969 && pPhys->Core.Key <= GCPhys + (cbWrite - 1))
1970 {
1971 offPhys = pPhys->Core.Key - GCPhys;
1972 offPhysLast = pPhys->Core.KeyLast - GCPhys; /* ASSUMES < 4GB handlers... */
1973 }
1974 else
1975 {
1976 pPhys = NULL;
1977 fMorePhys = false;
1978 offPhys = offPhysLast = PAGE_SIZE;
1979 }
1980 }
1981 }
1982
1983 /*
1984 * Handle access to space without handlers (that's easy).
1985 */
1986 rc = VINF_PGM_HANDLER_DO_DEFAULT;
1987 size_t cbRange = cbWrite;
1988 if (offPhys && offVirt)
1989 {
1990 if (cbRange > offPhys)
1991 cbRange = offPhys;
1992 if (cbRange > offVirt)
1993 cbRange = offVirt;
1994 }
1995 /*
1996 * Physical handler.
1997 */
1998 else if (!offPhys && offVirt)
1999 {
2000 if (cbRange > offPhysLast + 1)
2001 cbRange = offPhysLast + 1;
2002 if (cbRange > offVirt)
2003 cbRange = offVirt;
2004#ifdef IN_RING3
2005 STAM_PROFILE_START(&pPhys->Stat, h);
2006 rc = pPhys->CTX_SUFF(pfnHandler)(pVM, GCPhys, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, pPhys->CTX_SUFF(pvUser));
2007 STAM_PROFILE_STOP(&pPhys->Stat, h);
2008 AssertLogRelMsg(rc != VINF_SUCCESS && rc != VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pPhys->pszDesc));
2009#else
2010 AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cbRange=%#x\n", GCPhys, cbRange));
2011#endif
2012 pPhys = NULL;
2013 }
2014 /*
2015 * Virtual handler.
2016 */
2017 else if (offPhys && !offVirt)
2018 {
2019 if (cbRange > offVirtLast + 1)
2020 cbRange = offVirtLast + 1;
2021 if (cbRange > offPhys)
2022 cbRange = offPhys;
2023#ifdef IN_RING3
2024 if (pVirt->pfnHandlerR3)
2025 {
2026 RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pVirt->Core.Key & PAGE_BASE_GC_MASK)
2027 + (iVirtPage << PAGE_SHIFT)
2028 + (GCPhys & PAGE_OFFSET_MASK);
2029 STAM_PROFILE_START(&pVirt->Stat, h);
2030 rc = pVirt->CTX_SUFF(pfnHandler)(pVM, GCPtr, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, /*pCur->CTX_SUFF(pvUser)*/ NULL);
2031 STAM_PROFILE_STOP(&pVirt->Stat, h);
2032 AssertLogRelMsg(rc != VINF_SUCCESS && rc != VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pVirt->pszDesc));
2033 }
2034#else
2035 AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cb=%#x\n", GCPhys, cbRange));
2036#endif
2037 pVirt = NULL;
2038 }
2039 /*
2040 * Both... give the physical one priority.
2041 */
2042 else
2043 {
2044 Assert(!offPhys && !offVirt);
2045 if (cbRange > offVirtLast + 1)
2046 cbRange = offVirtLast + 1;
2047 if (cbRange > offPhysLast + 1)
2048 cbRange = offPhysLast + 1;
2049
2050#ifdef IN_RING3
2051 if (pVirt->pfnHandlerR3)
2052 Log(("pgmPhysWriteHandler: overlapping phys and virt handlers at %RGp %R[pgmpage]; cbRange=%#x\n", GCPhys, pPage, cbRange));
2053
2054 STAM_PROFILE_START(&pPhys->Stat, h);
2055 rc = pPhys->CTX_SUFF(pfnHandler)(pVM, GCPhys, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, pPhys->CTX_SUFF(pvUser));
2056 STAM_PROFILE_STOP(&pPhys->Stat, h);
2057 AssertLogRelMsg(rc != VINF_SUCCESS && rc != VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pPhys->pszDesc));
2058 if (pVirt->pfnHandlerR3)
2059 {
2060
2061 RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pVirt->Core.Key & PAGE_BASE_GC_MASK)
2062 + (iVirtPage << PAGE_SHIFT)
2063 + (GCPhys & PAGE_OFFSET_MASK);
2064 STAM_PROFILE_START(&pVirt->Stat, h);
2065 int rc2 = pVirt->CTX_SUFF(pfnHandler)(pVM, GCPtr, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, /*pCur->CTX_SUFF(pvUser)*/ NULL);
2066 STAM_PROFILE_STOP(&pVirt->Stat, h);
2067 AssertLogRelMsg(rc2 != VINF_SUCCESS && rc2 != VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pVirt->pszDesc));
2068 if (rc2 == VINF_SUCCESS && rc == VINF_PGM_HANDLER_DO_DEFAULT)
2069 rc = VINF_SUCCESS;
2070 }
2071#else
2072 AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cbRange=%#x\n", GCPhys, cbRange));
2073#endif
2074 pPhys = NULL;
2075 pVirt = NULL;
2076 }
2077 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
2078 memcpy(pvDst, pvBuf, cbRange);
2079
2080 /*
2081 * Advance if we've got more stuff to do.
2082 */
2083 if (cbRange >= cbWrite)
2084 return;
2085
2086 cbWrite -= cbRange;
2087 GCPhys += cbRange;
2088 pvBuf = (uint8_t *)pvBuf + cbRange;
2089 pvDst = (uint8_t *)pvDst + cbRange;
2090
2091 offPhys -= cbRange;
2092 offPhysLast -= cbRange;
2093 offVirt -= cbRange;
2094 offVirtLast -= cbRange;
2095 }
2096}
2097
2098
2099/**
2100 * Write to physical memory.
2101 *
2102 * This API respects access handlers and MMIO. Use PGMPhysSimpleReadGCPhys() if you
2103 * want to ignore those.
2104 *
2105 * @param pVM VM Handle.
2106 * @param GCPhys Physical address to write to.
2107 * @param pvBuf What to write.
2108 * @param cbWrite How many bytes to write.
2109 */
2110VMMDECL(void) PGMPhysWrite(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
2111{
2112 AssertMsg(!pVM->pgm.s.fNoMorePhysWrites, ("Calling PGMPhysWrite after pgmR3Save()!\n"));
2113 AssertMsgReturnVoid(cbWrite > 0, ("don't even think about writing zero bytes!\n"));
2114 LogFlow(("PGMPhysWrite: %RGp %d\n", GCPhys, cbWrite));
2115
2116 pgmLock(pVM);
2117
2118 /*
2119 * Copy loop on ram ranges.
2120 */
2121 PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
2122 for (;;)
2123 {
2124 /* Find range. */
2125 while (pRam && GCPhys > pRam->GCPhysLast)
2126 pRam = pRam->CTX_SUFF(pNext);
2127 /* Inside range or not? */
2128 if (pRam && GCPhys >= pRam->GCPhys)
2129 {
2130 /*
2131 * Must work our way thru this page by page.
2132 */
2133 RTGCPTR off = GCPhys - pRam->GCPhys;
2134 while (off < pRam->cb)
2135 {
2136 RTGCPTR iPage = off >> PAGE_SHIFT;
2137 PPGMPAGE pPage = &pRam->aPages[iPage];
2138 size_t cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
2139 if (cb > cbWrite)
2140 cb = cbWrite;
2141
2142 /*
2143 * Any active WRITE or ALL access handlers?
2144 */
2145 if (PGM_PAGE_HAS_ACTIVE_HANDLERS(pPage))
2146 pgmPhysWriteHandler(pVM, pPage, pRam->GCPhys + off, pvBuf, cb);
2147 else
2148 {
2149 /*
2150 * Get the pointer to the page.
2151 */
2152 void *pvDst;
2153 int rc = pgmPhysGCPhys2CCPtrInternal(pVM, pPage, pRam->GCPhys + off, &pvDst);
2154 if (RT_SUCCESS(rc))
2155 memcpy(pvDst, pvBuf, cb);
2156 else
2157 AssertLogRelMsgFailed(("pgmPhysGCPhys2CCPtrInternal failed on %RGp / %R[pgmpage] -> %Rrc\n",
2158 pRam->GCPhys + off, pPage, rc));
2159 }
2160
2161 /* next page */
2162 if (cb >= cbWrite)
2163 {
2164 pgmUnlock(pVM);
2165 return;
2166 }
2167
2168 cbWrite -= cb;
2169 off += cb;
2170 pvBuf = (const char *)pvBuf + cb;
2171 } /* walk pages in ram range */
2172
2173 GCPhys = pRam->GCPhysLast + 1;
2174 }
2175 else
2176 {
2177 /*
2178 * Unassigned address space, skip it.
2179 */
2180 if (!pRam)
2181 break;
2182 size_t cb = pRam->GCPhys - GCPhys;
2183 if (cb >= cbWrite)
2184 break;
2185 cbWrite -= cb;
2186 pvBuf = (const char *)pvBuf + cb;
2187 GCPhys += cb;
2188 }
2189 } /* Ram range walk */
2190
2191 pgmUnlock(pVM);
2192}
2193
2194#else /* Old PGMPhysWrite */
2195
2196/**
2197 * Write to physical memory.
2198 *
2199 * This API respects access handlers and MMIO. Use PGMPhysSimpleReadGCPhys() if you
2200 * want to ignore those.
2201 *
2202 * @param pVM VM Handle.
2203 * @param GCPhys Physical address to write to.
2204 * @param pvBuf What to write.
2205 * @param cbWrite How many bytes to write.
2206 */
2207VMMDECL(void) PGMPhysWrite(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
2208{
2209#ifdef IN_RING3
2210 bool fGrabbedLock = false;
2211#endif
2212
2213 AssertMsg(!pVM->pgm.s.fNoMorePhysWrites, ("Calling PGMPhysWrite after pgmR3Save()!\n"));
2214 AssertMsg(cbWrite > 0, ("don't even think about writing zero bytes!\n"));
2215 if (cbWrite == 0)
2216 return;
2217
2218 LogFlow(("PGMPhysWrite: %RGp %d\n", GCPhys, cbWrite));
2219
2220#ifdef IN_RING3
2221 if (!VM_IS_EMT(pVM))
2222 {
2223 pgmLock(pVM);
2224 fGrabbedLock = true;
2225 }
2226#endif
2227 /*
2228 * Copy loop on ram ranges.
2229 */
2230 PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
2231 for (;;)
2232 {
2233 /* Find range. */
2234 while (pRam && GCPhys > pRam->GCPhysLast)
2235 pRam = pRam->CTX_SUFF(pNext);
2236 /* Inside range or not? */
2237 if (pRam && GCPhys >= pRam->GCPhys)
2238 {
2239 /*
2240 * Must work our way thru this page by page.
2241 */
2242 RTGCPTR off = GCPhys - pRam->GCPhys;
2243 while (off < pRam->cb)
2244 {
2245 RTGCPTR iPage = off >> PAGE_SHIFT;
2246 PPGMPAGE pPage = &pRam->aPages[iPage];
2247
2248 /* Physical chunk in dynamically allocated range not present? */
2249 if (RT_UNLIKELY(!PGM_PAGE_GET_HCPHYS(pPage)))
2250 {
2251 int rc;
2252#ifdef IN_RING3
2253 if (fGrabbedLock)
2254 {
2255 pgmUnlock(pVM);
2256 rc = pgmr3PhysGrowRange(pVM, GCPhys);
2257 if (rc == VINF_SUCCESS)
2258 PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite); /* try again; can't assume pRam is still valid (paranoia) */
2259 return;
2260 }
2261 rc = pgmr3PhysGrowRange(pVM, GCPhys);
2262#else
2263 rc = CTXALLMID(VMM, CallHost)(pVM, VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2264#endif
2265 if (rc != VINF_SUCCESS)
2266 goto l_End;
2267 }
2268
2269 size_t cb;
2270 /* temporary hack, will reogranize is later. */
2271 /*
2272 * Virtual handlers
2273 */
2274 if ( PGM_PAGE_HAS_ACTIVE_VIRTUAL_HANDLERS(pPage)
2275 && !(pPage->HCPhys & MM_RAM_FLAGS_MMIO)) /// @todo PAGE FLAGS
2276 {
2277 if (PGM_PAGE_HAS_ACTIVE_PHYSICAL_HANDLERS(pPage))
2278 {
2279 /*
2280 * Physical write handler + virtual write handler.
2281 * Consider this a quick workaround for the CSAM + shadow caching problem.
2282 *
2283 * We hand it to the shadow caching first since it requires the unchanged
2284 * data. CSAM will have to put up with it already being changed.
2285 */
2286 int rc = VINF_PGM_HANDLER_DO_DEFAULT;
2287 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
2288#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
2289 /* 1. The physical handler */
2290 PPGMPHYSHANDLER pPhysNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesR3->PhysHandlers, GCPhys);
2291 if (pPhysNode && pPhysNode->pfnHandlerR3)
2292 {
2293 size_t cbRange = pPhysNode->Core.KeyLast - GCPhys + 1;
2294 if (cbRange < cb)
2295 cb = cbRange;
2296 if (cb > cbWrite)
2297 cb = cbWrite;
2298
2299 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
2300
2301 /* Note! Dangerous assumption that R3 handlers don't do anything that really requires an EMT lock! */
2302 rc = pPhysNode->pfnHandlerR3(pVM, GCPhys, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, pPhysNode->pvUserR3);
2303 }
2304
2305 /* 2. The virtual handler (will see incorrect data) */
2306 PPGMVIRTHANDLER pVirtNode;
2307 unsigned iPage;
2308 int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pVirtNode, &iPage);
2309 if (RT_SUCCESS(rc2) && pVirtNode->pfnHandlerR3)
2310 {
2311 size_t cbRange = pVirtNode->Core.KeyLast - GCPhys + 1;
2312 if (cbRange < cb)
2313 cb = cbRange;
2314 if (cb > cbWrite)
2315 cb = cbWrite;
2316 RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pVirtNode->Core.Key & PAGE_BASE_GC_MASK)
2317 + (iPage << PAGE_SHIFT) + (off & PAGE_OFFSET_MASK);
2318
2319 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
2320
2321 /* Note! Dangerous assumption that R3 handlers don't do anything that really requires an EMT lock! */
2322 rc2 = pVirtNode->pfnHandlerR3(pVM, (RTGCPTR)GCPtr, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, 0);
2323 if ( ( rc2 != VINF_PGM_HANDLER_DO_DEFAULT
2324 && rc == VINF_PGM_HANDLER_DO_DEFAULT)
2325 || ( RT_FAILURE(rc2)
2326 && RT_SUCCESS(rc)))
2327 rc = rc2;
2328 }
2329#endif /* IN_RING3 */
2330 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
2331 {
2332#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
2333 void *pvDst = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
2334#else
2335 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
2336#endif
2337 if (cb >= cbWrite)
2338 {
2339 memcpy(pvDst, pvBuf, cbWrite);
2340 goto l_End;
2341 }
2342 memcpy(pvDst, pvBuf, cb);
2343 }
2344 else if (cb >= cbWrite)
2345 goto l_End;
2346 }
2347 else
2348 {
2349 int rc = VINF_PGM_HANDLER_DO_DEFAULT;
2350 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
2351#ifdef IN_RING3
2352/** @todo deal with this in GC and R0! */
2353 /* Search the whole tree for matching physical addresses (rather expensive!) */
2354 PPGMVIRTHANDLER pNode;
2355 unsigned iPage;
2356 int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pNode, &iPage);
2357 if (RT_SUCCESS(rc2) && pNode->pfnHandlerR3)
2358 {
2359 size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
2360 if (cbRange < cb)
2361 cb = cbRange;
2362 if (cb > cbWrite)
2363 cb = cbWrite;
2364 RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pNode->Core.Key & PAGE_BASE_GC_MASK)
2365 + (iPage << PAGE_SHIFT) + (off & PAGE_OFFSET_MASK);
2366
2367 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
2368
2369 /* Note! Dangerous assumption that R3 handlers don't do anything that really requires an EMT lock! */
2370 rc = pNode->pfnHandlerR3(pVM, (RTGCPTR)GCPtr, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, 0);
2371 }
2372#endif /* IN_RING3 */
2373 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
2374 {
2375#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
2376 void *pvDst = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
2377#else
2378 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
2379#endif
2380 if (cb >= cbWrite)
2381 {
2382 memcpy(pvDst, pvBuf, cbWrite);
2383 goto l_End;
2384 }
2385 memcpy(pvDst, pvBuf, cb);
2386 }
2387 else if (cb >= cbWrite)
2388 goto l_End;
2389 }
2390 }
2391 /*
2392 * Physical handler.
2393 */
2394 else if ( RT_UNLIKELY(PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) >= PGM_PAGE_HNDL_PHYS_STATE_WRITE)
2395 && !(pPage->HCPhys & MM_RAM_FLAGS_MMIO)) /// @todo PAGE FLAGS
2396 {
2397 int rc = VINF_PGM_HANDLER_DO_DEFAULT;
2398 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
2399#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
2400 /* find and call the handler */
2401 PPGMPHYSHANDLER pNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesR3->PhysHandlers, GCPhys);
2402 if (pNode && pNode->pfnHandlerR3)
2403 {
2404 size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
2405 if (cbRange < cb)
2406 cb = cbRange;
2407 if (cb > cbWrite)
2408 cb = cbWrite;
2409
2410 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
2411
2412 /** @todo Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
2413 rc = pNode->pfnHandlerR3(pVM, GCPhys, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, pNode->pvUserR3);
2414 }
2415#endif /* IN_RING3 */
2416 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
2417 {
2418#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
2419 void *pvDst = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
2420#else
2421 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
2422#endif
2423 if (cb >= cbWrite)
2424 {
2425 memcpy(pvDst, pvBuf, cbWrite);
2426 goto l_End;
2427 }
2428 memcpy(pvDst, pvBuf, cb);
2429 }
2430 else if (cb >= cbWrite)
2431 goto l_End;
2432 }
2433 else
2434 {
2435 /** @todo r=bird: missing MM_RAM_FLAGS_ROM here, we shall not allow anyone to overwrite the ROM! */
2436 switch (pPage->HCPhys & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_MMIO2)) /** @todo PAGE FLAGS */
2437 {
2438 /*
2439 * Normal memory, MMIO2 or writable shadow ROM.
2440 */
2441 case 0:
2442 case MM_RAM_FLAGS_MMIO2:
2443 case MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_MMIO2: /* shadow rom */
2444 {
2445#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
2446 void *pvDst = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
2447#else
2448 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
2449#endif
2450 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
2451 if (cb >= cbWrite)
2452 {
2453#if defined(IN_RING3) && defined(PGM_PHYSMEMACCESS_CACHING)
2454 if (cbWrite <= 4 && !fGrabbedLock /* i.e. EMT */)
2455 pgmPhysCacheAdd(pVM, &pVM->pgm.s.pgmphyswritecache, GCPhys, (uint8_t*)pvDst);
2456#endif /* IN_RING3 && PGM_PHYSMEMACCESS_CACHING */
2457 memcpy(pvDst, pvBuf, cbWrite);
2458 goto l_End;
2459 }
2460 memcpy(pvDst, pvBuf, cb);
2461 break;
2462 }
2463
2464 /*
2465 * All reserved, nothing there.
2466 */
2467 case MM_RAM_FLAGS_RESERVED:
2468 case MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO2:
2469 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
2470 if (cb >= cbWrite)
2471 goto l_End;
2472 break;
2473
2474
2475 /*
2476 * The rest needs to be taken more carefully.
2477 */
2478 default:
2479#if 1 /** @todo r=bird: Can you do this properly please. */
2480 /** @todo Try MMIO; quick hack */
2481 if (cbWrite <= 8 && IOMMMIOWrite(pVM, GCPhys, *(uint32_t *)pvBuf, cbWrite) == VINF_SUCCESS)
2482 goto l_End;
2483#endif
2484
2485 /** @todo fix me later. */
2486 AssertReleaseMsgFailed(("Unknown write at %RGp size %u implement the complex physical writing case %RHp\n",
2487 GCPhys, cbWrite,
2488 (pPage->HCPhys & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_MMIO2)))); /** @todo PAGE FLAGS */
2489 /* skip the write */
2490 cb = cbWrite;
2491 break;
2492 }
2493 }
2494
2495 cbWrite -= cb;
2496 off += cb;
2497 pvBuf = (const char *)pvBuf + cb;
2498 }
2499
2500 GCPhys = pRam->GCPhysLast + 1;
2501 }
2502 else
2503 {
2504 /*
2505 * Unassigned address space.
2506 */
2507 size_t cb;
2508 if ( !pRam
2509 || (cb = pRam->GCPhys - GCPhys) >= cbWrite)
2510 goto l_End;
2511
2512 cbWrite -= cb;
2513 pvBuf = (const char *)pvBuf + cb;
2514 GCPhys += cb;
2515 }
2516 }
2517l_End:
2518#ifdef IN_RING3
2519 if (fGrabbedLock)
2520 pgmUnlock(pVM);
2521#endif
2522 return;
2523}
2524
2525#endif /* Old PGMPhysWrite */
2526
2527/**
2528 * Read from guest physical memory by GC physical address, bypassing
2529 * MMIO and access handlers.
2530 *
2531 * @returns VBox status.
2532 * @param pVM VM handle.
2533 * @param pvDst The destination address.
2534 * @param GCPhysSrc The source address (GC physical address).
2535 * @param cb The number of bytes to read.
2536 */
2537VMMDECL(int) PGMPhysSimpleReadGCPhys(PVM pVM, void *pvDst, RTGCPHYS GCPhysSrc, size_t cb)
2538{
2539 /*
2540 * Treat the first page as a special case.
2541 */
2542 if (!cb)
2543 return VINF_SUCCESS;
2544
2545 /* map the 1st page */
2546 void const *pvSrc;
2547 PGMPAGEMAPLOCK Lock;
2548 int rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, GCPhysSrc, &pvSrc, &Lock);
2549 if (RT_FAILURE(rc))
2550 return rc;
2551
2552 /* optimize for the case where access is completely within the first page. */
2553 size_t cbPage = PAGE_SIZE - (GCPhysSrc & PAGE_OFFSET_MASK);
2554 if (RT_LIKELY(cb <= cbPage))
2555 {
2556 memcpy(pvDst, pvSrc, cb);
2557 PGMPhysReleasePageMappingLock(pVM, &Lock);
2558 return VINF_SUCCESS;
2559 }
2560
2561 /* copy to the end of the page. */
2562 memcpy(pvDst, pvSrc, cbPage);
2563 PGMPhysReleasePageMappingLock(pVM, &Lock);
2564 GCPhysSrc += cbPage;
2565 pvDst = (uint8_t *)pvDst + cbPage;
2566 cb -= cbPage;
2567
2568 /*
2569 * Page by page.
2570 */
2571 for (;;)
2572 {
2573 /* map the page */
2574 rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, GCPhysSrc, &pvSrc, &Lock);
2575 if (RT_FAILURE(rc))
2576 return rc;
2577
2578 /* last page? */
2579 if (cb <= PAGE_SIZE)
2580 {
2581 memcpy(pvDst, pvSrc, cb);
2582 PGMPhysReleasePageMappingLock(pVM, &Lock);
2583 return VINF_SUCCESS;
2584 }
2585
2586 /* copy the entire page and advance */
2587 memcpy(pvDst, pvSrc, PAGE_SIZE);
2588 PGMPhysReleasePageMappingLock(pVM, &Lock);
2589 GCPhysSrc += PAGE_SIZE;
2590 pvDst = (uint8_t *)pvDst + PAGE_SIZE;
2591 cb -= PAGE_SIZE;
2592 }
2593 /* won't ever get here. */
2594}
2595
2596#ifndef IN_RC /* Ring 0 & 3 only. (Just not needed in GC.) */
2597
2598/**
2599 * Write to guest physical memory referenced by GC pointer.
2600 * Write memory to GC physical address in guest physical memory.
2601 *
2602 * This will bypass MMIO and access handlers.
2603 *
2604 * @returns VBox status.
2605 * @param pVM VM handle.
2606 * @param GCPhysDst The GC physical address of the destination.
2607 * @param pvSrc The source buffer.
2608 * @param cb The number of bytes to write.
2609 */
2610VMMDECL(int) PGMPhysSimpleWriteGCPhys(PVM pVM, RTGCPHYS GCPhysDst, const void *pvSrc, size_t cb)
2611{
2612 LogFlow(("PGMPhysSimpleWriteGCPhys: %RGp %zu\n", GCPhysDst, cb));
2613
2614 /*
2615 * Treat the first page as a special case.
2616 */
2617 if (!cb)
2618 return VINF_SUCCESS;
2619
2620 /* map the 1st page */
2621 void *pvDst;
2622 PGMPAGEMAPLOCK Lock;
2623 int rc = PGMPhysGCPhys2CCPtr(pVM, GCPhysDst, &pvDst, &Lock);
2624 if (RT_FAILURE(rc))
2625 return rc;
2626
2627 /* optimize for the case where access is completely within the first page. */
2628 size_t cbPage = PAGE_SIZE - (GCPhysDst & PAGE_OFFSET_MASK);
2629 if (RT_LIKELY(cb <= cbPage))
2630 {
2631 memcpy(pvDst, pvSrc, cb);
2632 PGMPhysReleasePageMappingLock(pVM, &Lock);
2633 return VINF_SUCCESS;
2634 }
2635
2636 /* copy to the end of the page. */
2637 memcpy(pvDst, pvSrc, cbPage);
2638 PGMPhysReleasePageMappingLock(pVM, &Lock);
2639 GCPhysDst += cbPage;
2640 pvSrc = (const uint8_t *)pvSrc + cbPage;
2641 cb -= cbPage;
2642
2643 /*
2644 * Page by page.
2645 */
2646 for (;;)
2647 {
2648 /* map the page */
2649 rc = PGMPhysGCPhys2CCPtr(pVM, GCPhysDst, &pvDst, &Lock);
2650 if (RT_FAILURE(rc))
2651 return rc;
2652
2653 /* last page? */
2654 if (cb <= PAGE_SIZE)
2655 {
2656 memcpy(pvDst, pvSrc, cb);
2657 PGMPhysReleasePageMappingLock(pVM, &Lock);
2658 return VINF_SUCCESS;
2659 }
2660
2661 /* copy the entire page and advance */
2662 memcpy(pvDst, pvSrc, PAGE_SIZE);
2663 PGMPhysReleasePageMappingLock(pVM, &Lock);
2664 GCPhysDst += PAGE_SIZE;
2665 pvSrc = (const uint8_t *)pvSrc + PAGE_SIZE;
2666 cb -= PAGE_SIZE;
2667 }
2668 /* won't ever get here. */
2669}
2670
2671
2672/**
2673 * Read from guest physical memory referenced by GC pointer.
2674 *
2675 * This function uses the current CR3/CR0/CR4 of the guest and will
2676 * bypass access handlers and not set any accessed bits.
2677 *
2678 * @returns VBox status.
2679 * @param pVM VM handle.
2680 * @param pvDst The destination address.
2681 * @param GCPtrSrc The source address (GC pointer).
2682 * @param cb The number of bytes to read.
2683 */
2684VMMDECL(int) PGMPhysSimpleReadGCPtr(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb)
2685{
2686 /*
2687 * Treat the first page as a special case.
2688 */
2689 if (!cb)
2690 return VINF_SUCCESS;
2691
2692 /* map the 1st page */
2693 void const *pvSrc;
2694 PGMPAGEMAPLOCK Lock;
2695 int rc = PGMPhysGCPtr2CCPtrReadOnly(pVM, GCPtrSrc, &pvSrc, &Lock);
2696 if (RT_FAILURE(rc))
2697 return rc;
2698
2699 /* optimize for the case where access is completely within the first page. */
2700 size_t cbPage = PAGE_SIZE - ((RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK);
2701 if (RT_LIKELY(cb <= cbPage))
2702 {
2703 memcpy(pvDst, pvSrc, cb);
2704 PGMPhysReleasePageMappingLock(pVM, &Lock);
2705 return VINF_SUCCESS;
2706 }
2707
2708 /* copy to the end of the page. */
2709 memcpy(pvDst, pvSrc, cbPage);
2710 PGMPhysReleasePageMappingLock(pVM, &Lock);
2711 GCPtrSrc = (RTGCPTR)((RTGCUINTPTR)GCPtrSrc + cbPage);
2712 pvDst = (uint8_t *)pvDst + cbPage;
2713 cb -= cbPage;
2714
2715 /*
2716 * Page by page.
2717 */
2718 for (;;)
2719 {
2720 /* map the page */
2721 rc = PGMPhysGCPtr2CCPtrReadOnly(pVM, GCPtrSrc, &pvSrc, &Lock);
2722 if (RT_FAILURE(rc))
2723 return rc;
2724
2725 /* last page? */
2726 if (cb <= PAGE_SIZE)
2727 {
2728 memcpy(pvDst, pvSrc, cb);
2729 PGMPhysReleasePageMappingLock(pVM, &Lock);
2730 return VINF_SUCCESS;
2731 }
2732
2733 /* copy the entire page and advance */
2734 memcpy(pvDst, pvSrc, PAGE_SIZE);
2735 PGMPhysReleasePageMappingLock(pVM, &Lock);
2736 GCPtrSrc = (RTGCPTR)((RTGCUINTPTR)GCPtrSrc + PAGE_SIZE);
2737 pvDst = (uint8_t *)pvDst + PAGE_SIZE;
2738 cb -= PAGE_SIZE;
2739 }
2740 /* won't ever get here. */
2741}
2742
2743
2744/**
2745 * Write to guest physical memory referenced by GC pointer.
2746 *
2747 * This function uses the current CR3/CR0/CR4 of the guest and will
2748 * bypass access handlers and not set dirty or accessed bits.
2749 *
2750 * @returns VBox status.
2751 * @param pVM VM handle.
2752 * @param GCPtrDst The destination address (GC pointer).
2753 * @param pvSrc The source address.
2754 * @param cb The number of bytes to write.
2755 */
2756VMMDECL(int) PGMPhysSimpleWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
2757{
2758 /*
2759 * Treat the first page as a special case.
2760 */
2761 if (!cb)
2762 return VINF_SUCCESS;
2763
2764 /* map the 1st page */
2765 void *pvDst;
2766 PGMPAGEMAPLOCK Lock;
2767 int rc = PGMPhysGCPtr2CCPtr(pVM, GCPtrDst, &pvDst, &Lock);
2768 if (RT_FAILURE(rc))
2769 return rc;
2770
2771 /* optimize for the case where access is completely within the first page. */
2772 size_t cbPage = PAGE_SIZE - ((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK);
2773 if (RT_LIKELY(cb <= cbPage))
2774 {
2775 memcpy(pvDst, pvSrc, cb);
2776 PGMPhysReleasePageMappingLock(pVM, &Lock);
2777 return VINF_SUCCESS;
2778 }
2779
2780 /* copy to the end of the page. */
2781 memcpy(pvDst, pvSrc, cbPage);
2782 PGMPhysReleasePageMappingLock(pVM, &Lock);
2783 GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + cbPage);
2784 pvSrc = (const uint8_t *)pvSrc + cbPage;
2785 cb -= cbPage;
2786
2787 /*
2788 * Page by page.
2789 */
2790 for (;;)
2791 {
2792 /* map the page */
2793 rc = PGMPhysGCPtr2CCPtr(pVM, GCPtrDst, &pvDst, &Lock);
2794 if (RT_FAILURE(rc))
2795 return rc;
2796
2797 /* last page? */
2798 if (cb <= PAGE_SIZE)
2799 {
2800 memcpy(pvDst, pvSrc, cb);
2801 PGMPhysReleasePageMappingLock(pVM, &Lock);
2802 return VINF_SUCCESS;
2803 }
2804
2805 /* copy the entire page and advance */
2806 memcpy(pvDst, pvSrc, PAGE_SIZE);
2807 PGMPhysReleasePageMappingLock(pVM, &Lock);
2808 GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + PAGE_SIZE);
2809 pvSrc = (const uint8_t *)pvSrc + PAGE_SIZE;
2810 cb -= PAGE_SIZE;
2811 }
2812 /* won't ever get here. */
2813}
2814
2815
2816/**
2817 * Write to guest physical memory referenced by GC pointer and update the PTE.
2818 *
2819 * This function uses the current CR3/CR0/CR4 of the guest and will
2820 * bypass access handlers but will set any dirty and accessed bits in the PTE.
2821 *
2822 * If you don't want to set the dirty bit, use PGMPhysSimpleWriteGCPtr().
2823 *
2824 * @returns VBox status.
2825 * @param pVM VM handle.
2826 * @param GCPtrDst The destination address (GC pointer).
2827 * @param pvSrc The source address.
2828 * @param cb The number of bytes to write.
2829 */
2830VMMDECL(int) PGMPhysSimpleDirtyWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
2831{
2832 /*
2833 * Treat the first page as a special case.
2834 * Btw. this is the same code as in PGMPhyssimpleWriteGCPtr excep for the PGMGstModifyPage.
2835 */
2836 if (!cb)
2837 return VINF_SUCCESS;
2838
2839 /* map the 1st page */
2840 void *pvDst;
2841 PGMPAGEMAPLOCK Lock;
2842 int rc = PGMPhysGCPtr2CCPtr(pVM, GCPtrDst, &pvDst, &Lock);
2843 if (RT_FAILURE(rc))
2844 return rc;
2845
2846 /* optimize for the case where access is completely within the first page. */
2847 size_t cbPage = PAGE_SIZE - ((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK);
2848 if (RT_LIKELY(cb <= cbPage))
2849 {
2850 memcpy(pvDst, pvSrc, cb);
2851 PGMPhysReleasePageMappingLock(pVM, &Lock);
2852 rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
2853 return VINF_SUCCESS;
2854 }
2855
2856 /* copy to the end of the page. */
2857 memcpy(pvDst, pvSrc, cbPage);
2858 PGMPhysReleasePageMappingLock(pVM, &Lock);
2859 rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
2860 GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + cbPage);
2861 pvSrc = (const uint8_t *)pvSrc + cbPage;
2862 cb -= cbPage;
2863
2864 /*
2865 * Page by page.
2866 */
2867 for (;;)
2868 {
2869 /* map the page */
2870 rc = PGMPhysGCPtr2CCPtr(pVM, GCPtrDst, &pvDst, &Lock);
2871 if (RT_FAILURE(rc))
2872 return rc;
2873
2874 /* last page? */
2875 if (cb <= PAGE_SIZE)
2876 {
2877 memcpy(pvDst, pvSrc, cb);
2878 PGMPhysReleasePageMappingLock(pVM, &Lock);
2879 rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
2880 return VINF_SUCCESS;
2881 }
2882
2883 /* copy the entire page and advance */
2884 memcpy(pvDst, pvSrc, PAGE_SIZE);
2885 PGMPhysReleasePageMappingLock(pVM, &Lock);
2886 rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
2887 GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + PAGE_SIZE);
2888 pvSrc = (const uint8_t *)pvSrc + PAGE_SIZE;
2889 cb -= PAGE_SIZE;
2890 }
2891 /* won't ever get here. */
2892}
2893
2894
2895/**
2896 * Read from guest physical memory referenced by GC pointer.
2897 *
2898 * This function uses the current CR3/CR0/CR4 of the guest and will
2899 * respect access handlers and set accessed bits.
2900 *
2901 * @returns VBox status.
2902 * @param pVM VM handle.
2903 * @param pvDst The destination address.
2904 * @param GCPtrSrc The source address (GC pointer).
2905 * @param cb The number of bytes to read.
2906 */
2907VMMDECL(int) PGMPhysReadGCPtr(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb)
2908{
2909 RTGCPHYS GCPhys;
2910 int rc;
2911
2912 /*
2913 * Anything to do?
2914 */
2915 if (!cb)
2916 return VINF_SUCCESS;
2917
2918 LogFlow(("PGMPhysReadGCPtr: %RGv %zu\n", GCPtrSrc, cb));
2919
2920 /*
2921 * Optimize reads within a single page.
2922 */
2923 if (((RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK) + cb <= PAGE_SIZE)
2924 {
2925 /* Convert virtual to physical address */
2926 rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrSrc, &GCPhys);
2927 AssertRCReturn(rc, rc);
2928
2929 /* mark the guest page as accessed. */
2930 rc = PGMGstModifyPage(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)(X86_PTE_A));
2931 AssertRC(rc);
2932
2933 PGMPhysRead(pVM, GCPhys, pvDst, cb);
2934 return VINF_SUCCESS;
2935 }
2936
2937 /*
2938 * Page by page.
2939 */
2940 for (;;)
2941 {
2942 /* Convert virtual to physical address */
2943 rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrSrc, &GCPhys);
2944 AssertRCReturn(rc, rc);
2945
2946 /* mark the guest page as accessed. */
2947 int rc = PGMGstModifyPage(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)(X86_PTE_A));
2948 AssertRC(rc);
2949
2950 /* copy */
2951 size_t cbRead = PAGE_SIZE - ((RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK);
2952 if (cbRead >= cb)
2953 {
2954 PGMPhysRead(pVM, GCPhys, pvDst, cb);
2955 return VINF_SUCCESS;
2956 }
2957 PGMPhysRead(pVM, GCPhys, pvDst, cbRead);
2958
2959 /* next */
2960 cb -= cbRead;
2961 pvDst = (uint8_t *)pvDst + cbRead;
2962 GCPtrSrc += cbRead;
2963 }
2964}
2965
2966
2967/**
2968 * Write to guest physical memory referenced by GC pointer.
2969 *
2970 * This function uses the current CR3/CR0/CR4 of the guest and will
2971 * respect access handlers and set dirty and accessed bits.
2972 *
2973 * @returns VBox status.
2974 * @param pVM VM handle.
2975 * @param GCPtrDst The destination address (GC pointer).
2976 * @param pvSrc The source address.
2977 * @param cb The number of bytes to write.
2978 */
2979VMMDECL(int) PGMPhysWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
2980{
2981 RTGCPHYS GCPhys;
2982 int rc;
2983
2984 /*
2985 * Anything to do?
2986 */
2987 if (!cb)
2988 return VINF_SUCCESS;
2989
2990 LogFlow(("PGMPhysWriteGCPtr: %RGv %zu\n", GCPtrDst, cb));
2991
2992 /*
2993 * Optimize writes within a single page.
2994 */
2995 if (((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK) + cb <= PAGE_SIZE)
2996 {
2997 /* Convert virtual to physical address */
2998 rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrDst, &GCPhys);
2999 AssertMsgRCReturn(rc, ("PGMPhysGCPtr2GCPhys failed with %Rrc for %RGv\n", rc, GCPtrDst), rc);
3000
3001 /* mark the guest page as accessed and dirty. */
3002 rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
3003 AssertRC(rc);
3004
3005 PGMPhysWrite(pVM, GCPhys, pvSrc, cb);
3006 return VINF_SUCCESS;
3007 }
3008
3009 /*
3010 * Page by page.
3011 */
3012 for (;;)
3013 {
3014 /* Convert virtual to physical address */
3015 rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrDst, &GCPhys);
3016 AssertRCReturn(rc, rc);
3017
3018 /* mark the guest page as accessed and dirty. */
3019 rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
3020 AssertRC(rc);
3021
3022 /* copy */
3023 size_t cbWrite = PAGE_SIZE - ((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK);
3024 if (cbWrite >= cb)
3025 {
3026 PGMPhysWrite(pVM, GCPhys, pvSrc, cb);
3027 return VINF_SUCCESS;
3028 }
3029 PGMPhysWrite(pVM, GCPhys, pvSrc, cbWrite);
3030
3031 /* next */
3032 cb -= cbWrite;
3033 pvSrc = (uint8_t *)pvSrc + cbWrite;
3034 GCPtrDst += cbWrite;
3035 }
3036}
3037
3038#endif /* !IN_RC */
3039
3040/**
3041 * Performs a read of guest virtual memory for instruction emulation.
3042 *
3043 * This will check permissions, raise exceptions and update the access bits.
3044 *
3045 * The current implementation will bypass all access handlers. It may later be
3046 * changed to at least respect MMIO.
3047 *
3048 *
3049 * @returns VBox status code suitable to scheduling.
3050 * @retval VINF_SUCCESS if the read was performed successfully.
3051 * @retval VINF_EM_RAW_GUEST_TRAP if an exception was raised but not dispatched yet.
3052 * @retval VINF_TRPM_XCPT_DISPATCHED if an exception was raised and dispatched.
3053 *
3054 * @param pVM The VM handle.
3055 * @param pCtxCore The context core.
3056 * @param pvDst Where to put the bytes we've read.
3057 * @param GCPtrSrc The source address.
3058 * @param cb The number of bytes to read. Not more than a page.
3059 *
3060 * @remark This function will dynamically map physical pages in GC. This may unmap
3061 * mappings done by the caller. Be careful!
3062 */
3063VMMDECL(int) PGMPhysInterpretedRead(PVM pVM, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCUINTPTR GCPtrSrc, size_t cb)
3064{
3065 Assert(cb <= PAGE_SIZE);
3066
3067/** @todo r=bird: This isn't perfect!
3068 * -# It's not checking for reserved bits being 1.
3069 * -# It's not correctly dealing with the access bit.
3070 * -# It's not respecting MMIO memory or any other access handlers.
3071 */
3072 /*
3073 * 1. Translate virtual to physical. This may fault.
3074 * 2. Map the physical address.
3075 * 3. Do the read operation.
3076 * 4. Set access bits if required.
3077 */
3078 int rc;
3079 unsigned cb1 = PAGE_SIZE - (GCPtrSrc & PAGE_OFFSET_MASK);
3080 if (cb <= cb1)
3081 {
3082 /*
3083 * Not crossing pages.
3084 */
3085 RTGCPHYS GCPhys;
3086 uint64_t fFlags;
3087 rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc, &fFlags, &GCPhys);
3088 if (RT_SUCCESS(rc))
3089 {
3090 /** @todo we should check reserved bits ... */
3091 void *pvSrc;
3092 rc = PGM_GCPHYS_2_PTR(pVM, GCPhys, &pvSrc);
3093 switch (rc)
3094 {
3095 case VINF_SUCCESS:
3096 Log(("PGMPhysInterpretedRead: pvDst=%p pvSrc=%p cb=%d\n", pvDst, (uint8_t *)pvSrc + (GCPtrSrc & PAGE_OFFSET_MASK), cb));
3097 memcpy(pvDst, (uint8_t *)pvSrc + (GCPtrSrc & PAGE_OFFSET_MASK), cb);
3098 break;
3099 case VERR_PGM_PHYS_PAGE_RESERVED:
3100 case VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS:
3101 memset(pvDst, 0, cb); /** @todo this is wrong, it should be 0xff */
3102 break;
3103 default:
3104 return rc;
3105 }
3106
3107 /** @todo access bit emulation isn't 100% correct. */
3108 if (!(fFlags & X86_PTE_A))
3109 {
3110 rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
3111 AssertRC(rc);
3112 }
3113 return VINF_SUCCESS;
3114 }
3115 }
3116 else
3117 {
3118 /*
3119 * Crosses pages.
3120 */
3121 size_t cb2 = cb - cb1;
3122 uint64_t fFlags1;
3123 RTGCPHYS GCPhys1;
3124 uint64_t fFlags2;
3125 RTGCPHYS GCPhys2;
3126 rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc, &fFlags1, &GCPhys1);
3127 if (RT_SUCCESS(rc))
3128 rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc + cb1, &fFlags2, &GCPhys2);
3129 if (RT_SUCCESS(rc))
3130 {
3131 /** @todo we should check reserved bits ... */
3132 AssertMsgFailed(("cb=%d cb1=%d cb2=%d GCPtrSrc=%RGv\n", cb, cb1, cb2, GCPtrSrc));
3133 void *pvSrc1;
3134 rc = PGM_GCPHYS_2_PTR(pVM, GCPhys1, &pvSrc1);
3135 switch (rc)
3136 {
3137 case VINF_SUCCESS:
3138 memcpy(pvDst, (uint8_t *)pvSrc1 + (GCPtrSrc & PAGE_OFFSET_MASK), cb1);
3139 break;
3140 case VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS:
3141 memset(pvDst, 0, cb1); /** @todo this is wrong, it should be 0xff */
3142 break;
3143 default:
3144 return rc;
3145 }
3146
3147 void *pvSrc2;
3148 rc = PGM_GCPHYS_2_PTR(pVM, GCPhys2, &pvSrc2);
3149 switch (rc)
3150 {
3151 case VINF_SUCCESS:
3152 memcpy((uint8_t *)pvDst + cb1, pvSrc2, cb2);
3153 break;
3154 case VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS:
3155 memset((uint8_t *)pvDst + cb1, 0, cb2); /** @todo this is wrong, it should be 0xff */
3156 break;
3157 default:
3158 return rc;
3159 }
3160
3161 if (!(fFlags1 & X86_PTE_A))
3162 {
3163 rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
3164 AssertRC(rc);
3165 }
3166 if (!(fFlags2 & X86_PTE_A))
3167 {
3168 rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrSrc + cb1, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
3169 AssertRC(rc);
3170 }
3171 return VINF_SUCCESS;
3172 }
3173 }
3174
3175 /*
3176 * Raise a #PF.
3177 */
3178 uint32_t uErr;
3179
3180 /* Get the current privilege level. */
3181 uint32_t cpl = CPUMGetGuestCPL(pVM, pCtxCore);
3182 switch (rc)
3183 {
3184 case VINF_SUCCESS:
3185 uErr = (cpl >= 2) ? X86_TRAP_PF_RSVD | X86_TRAP_PF_US : X86_TRAP_PF_RSVD;
3186 break;
3187
3188 case VERR_PAGE_NOT_PRESENT:
3189 case VERR_PAGE_TABLE_NOT_PRESENT:
3190 uErr = (cpl >= 2) ? X86_TRAP_PF_US : 0;
3191 break;
3192
3193 default:
3194 AssertMsgFailed(("rc=%Rrc GCPtrSrc=%RGv cb=%#x\n", rc, GCPtrSrc, cb));
3195 return rc;
3196 }
3197 Log(("PGMPhysInterpretedRead: GCPtrSrc=%RGv cb=%#x -> #PF(%#x)\n", GCPtrSrc, cb, uErr));
3198 return TRPMRaiseXcptErrCR2(pVM, pCtxCore, X86_XCPT_PF, uErr, GCPtrSrc);
3199}
3200
3201/// @todo VMMDECL(int) PGMPhysInterpretedWrite(PVM pVM, PCPUMCTXCORE pCtxCore, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
3202
3203
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette