PGMAllPhys.cpp@ 2018

Last change on this file since 2018 was 1946, checked in by vboxsync, 18 years ago
PGMReadPhys: return zeros for physical memory that hasn't been allocated yet.
Property svn:eol-style set to `native` Property svn:keywords set to `Id`
File size: 62.5 KB

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1	/* $Id: PGMAllPhys.cpp 1946 2007-04-05 10:57:11Z vboxsync $ */
2	/** @file
3	* PGM - Page Manager and Monitor, Physical Memory Addressing.
4	*/
5
6	/*
7	* Copyright (C) 2006 InnoTek Systemberatung GmbH
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License as published by the Free Software Foundation,
13	* in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14	* distribution. VirtualBox OSE is distributed in the hope that it will
15	* be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* If you received this file as part of a commercial VirtualBox
18	* distribution, then only the terms of your commercial VirtualBox
19	* license agreement apply instead of the previous paragraph.
20	*/
21
22	/** @def PGM_IGNORE_RAM_FLAGS_RESERVED
23	* Don't respect the MM_RAM_FLAGS_RESERVED flag when converting to HC addresses.
24	*
25	* Since this flag is currently incorrectly kept set for ROM regions we will
26	* have to ignore it for now so we don't break stuff.
27	*/
28	#define PGM_IGNORE_RAM_FLAGS_RESERVED
29
30
31	/*******************************************************************************
32	* Header Files *
33	*******************************************************************************/
34	#define LOG_GROUP LOG_GROUP_PGM_PHYS
35	#include <VBox/pgm.h>
36	#include <VBox/trpm.h>
37	#include <VBox/vmm.h>
38	#include "PGMInternal.h"
39	#include <VBox/vm.h>
40	#include <VBox/param.h>
41	#include <VBox/err.h>
42	#include <iprt/assert.h>
43	#include <iprt/string.h>
44	#include <iprt/asm.h>
45	#include <VBox/log.h>
46	#ifdef IN_RING3
47	# include <iprt/thread.h>
48	#endif
49
50
51
52	/**
53	* Checks if Address Gate 20 is enabled or not.
54	*
55	* @returns true if enabled.
56	* @returns false if disabled.
57	* @param pVM VM handle.
58	*/
59	PGMDECL(bool) PGMPhysIsA20Enabled(PVM pVM)
60	{
61	LogFlow(("PGMPhysIsA20Enabled %d\n", pVM->pgm.s.fA20Enabled));
62	return !!pVM->pgm.s.fA20Enabled ; /* stupid MS compiler doesn't trust me. */
63	}
64
65
66	/**
67	* Validates a GC physical address.
68	*
69	* @returns true if valid.
70	* @returns false if invalid.
71	* @param pVM The VM handle.
72	* @param GCPhys The physical address to validate.
73	*/
74	PGMDECL(bool) PGMPhysIsGCPhysValid(PVM pVM, RTGCPHYS GCPhys)
75	{
76	for (PPGMRAMRANGE pRam = CTXSUFF(pVM->pgm.s.pRamRanges);
77	pRam;
78	pRam = CTXSUFF(pRam->pNext))
79	{
80	RTGCPHYS off = GCPhys - pRam->GCPhys;
81	if (off < pRam->cb)
82	return true;
83	}
84	return false;
85	}
86
87
88	/**
89	* Checks if a GC physical address is a normal page,
90	* i.e. not ROM, MMIO or reserved.
91	*
92	* @returns true if normal.
93	* @returns false if invalid, ROM, MMIO or reserved page.
94	* @param pVM The VM handle.
95	* @param GCPhys The physical address to check.
96	*/
97	PGMDECL(bool) PGMPhysIsGCPhysNormal(PVM pVM, RTGCPHYS GCPhys)
98	{
99	for (PPGMRAMRANGE pRam = CTXSUFF(pVM->pgm.s.pRamRanges);
100	pRam;
101	pRam = CTXSUFF(pRam->pNext))
102	{
103	RTGCPHYS off = GCPhys - pRam->GCPhys;
104	if (off < pRam->cb)
105	return !(pRam->aHCPhys[off >> PAGE_SHIFT] & (MM_RAM_FLAGS_MMIO \| MM_RAM_FLAGS_ROM \| MM_RAM_FLAGS_RESERVED \| MM_RAM_FLAGS_MMIO2));
106	}
107	return false;
108	}
109
110
111	/**
112	* Converts a GC physical address to a HC physical address.
113	*
114	* @returns VINF_SUCCESS on success.
115	* @returns VERR_PGM_PHYS_PAGE_RESERVED it it's a valid GC physical
116	* page but has no physical backing.
117	* @returns VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid
118	* GC physical address.
119	* @param pVM The VM handle.
120	* @param GCPhys The GC physical address to convert.
121	* @param pHCPhys Where to store the HC physical address on success.
122	*/
123	PGMDECL(int) PGMPhysGCPhys2HCPhys(PVM pVM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys)
124	{
125	for (PPGMRAMRANGE pRam = CTXSUFF(pVM->pgm.s.pRamRanges);
126	pRam;
127	pRam = CTXSUFF(pRam->pNext))
128	{
129	RTGCPHYS off = GCPhys - pRam->GCPhys;
130	if (off < pRam->cb)
131	{
132	if ( pRam->pvHC
133	\|\| (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC))
134	{
135	unsigned iPage = off >> PAGE_SHIFT;
136	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
137	{
138	#ifdef IN_RING3
139	int rc = pgmr3PhysGrowRange(pVM, GCPhys);
140	#else
141	int rc = CTXALLMID(VMM, CallHost)(pVM, VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
142	#endif
143	if (rc != VINF_SUCCESS)
144	return rc;
145	}
146
147	RTHCPHYS HCPhys = pRam->aHCPhys[off >> PAGE_SHIFT];
148	#ifndef PGM_IGNORE_RAM_FLAGS_RESERVED
149	if (!(HCPhys & MM_RAM_FLAGS_RESERVED))
150	#endif
151	{
152	*pHCPhys = (HCPhys & X86_PTE_PAE_PG_MASK)
153	\| (off & PAGE_OFFSET_MASK);
154	return VINF_SUCCESS;
155	}
156	}
157	return VERR_PGM_PHYS_PAGE_RESERVED;
158	}
159	}
160	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
161	}
162
163
164	/**
165	* Converts a GC physical address to a HC pointer.
166	*
167	* @returns VINF_SUCCESS on success.
168	* @returns VERR_PGM_PHYS_PAGE_RESERVED it it's a valid GC physical
169	* page but has no physical backing.
170	* @returns VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid
171	* GC physical address.
172	* @returns VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY if the range crosses
173	* a dynamic ram chunk boundary
174	* @param pVM The VM handle.
175	* @param GCPhys The GC physical address to convert.
176	* @param cbRange Physical range
177	* @param pHCPtr Where to store the HC pointer on success.
178	*/
179	PGMDECL(int) PGMPhysGCPhys2HCPtr(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR pHCPtr)
180	{
181	#ifdef PGM_DYNAMIC_RAM_ALLOC
182	if ((GCPhys & PGM_DYNAMIC_CHUNK_BASE_MASK) != ((GCPhys+cbRange-1) & PGM_DYNAMIC_CHUNK_BASE_MASK))
183	{
184	AssertMsgFailed(("PGMPhysGCPhys2HCPtr %VGp - %VGp crosses a chunk boundary!!\n", GCPhys, GCPhys+cbRange));
185	return VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY;
186	}
187	#endif
188
189	for (PPGMRAMRANGE pRam = CTXSUFF(pVM->pgm.s.pRamRanges);
190	pRam;
191	pRam = CTXSUFF(pRam->pNext))
192	{
193	RTGCPHYS off = GCPhys - pRam->GCPhys;
194	if (off < pRam->cb)
195	{
196	if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
197	{
198	unsigned iPage = off >> PAGE_SHIFT;
199	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
200	{
201	#ifdef IN_RING3
202	int rc = pgmr3PhysGrowRange(pVM, GCPhys);
203	#else
204	int rc = CTXALLMID(VMM, CallHost)(pVM, VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
205	#endif
206	if (rc != VINF_SUCCESS)
207	return rc;
208	}
209	unsigned idx = (off >> PGM_DYNAMIC_CHUNK_SHIFT);
210	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[idx] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
211	return VINF_SUCCESS;
212	}
213	if (pRam->pvHC)
214	{
215	#ifndef PGM_IGNORE_RAM_FLAGS_RESERVED
216	if (!(pRam->aHCPhys[off >> PAGE_SHIFT] & MM_RAM_FLAGS_RESERVED))
217	#endif
218	{
219	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
220	return VINF_SUCCESS;
221	}
222	}
223	return VERR_PGM_PHYS_PAGE_RESERVED;
224	}
225	}
226	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
227	}
228
229
230	/**
231	* Validates a HC pointer.
232	*
233	* @returns true if valid.
234	* @returns false if invalid.
235	* @param pVM The VM handle.
236	* @param HCPtr The pointer to validate.
237	*/
238	PGMDECL(bool) PGMPhysIsHCPtrValid(PVM pVM, RTHCPTR HCPtr)
239	{
240	for (PPGMRAMRANGE pRam = CTXSUFF(pVM->pgm.s.pRamRanges);
241	pRam;
242	pRam = CTXSUFF(pRam->pNext))
243	{
244	if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
245	{
246	/** @note this is quite slow */
247	for (unsigned iChunk = 0; iChunk < (pRam->cb >> PGM_DYNAMIC_CHUNK_SHIFT); iChunk++)
248	{
249	if (CTXSUFF(pRam->pavHCChunk)[iChunk])
250	{
251	RTHCUINTPTR off = (RTHCUINTPTR)HCPtr - (RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[iChunk];
252	if (off < PGM_DYNAMIC_CHUNK_SIZE)
253	return true;
254	}
255	}
256	}
257	else if (pRam->pvHC)
258	{
259	RTHCUINTPTR off = (RTHCUINTPTR)HCPtr - (RTHCUINTPTR)pRam->pvHC;
260
261	if (off < pRam->cb)
262	return true;
263	}
264	}
265	return false;
266	}
267
268
269	/**
270	* Converts a HC pointer to a GC physical address.
271	*
272	* @returns VINF_SUCCESS on success.
273	* @returns VERR_INVALID_POINTER if the pointer is not within the
274	* GC physical memory.
275	* @param pVM The VM handle.
276	* @param HCPtr The HC pointer to convert.
277	* @param pGCPhys Where to store the GC physical address on success.
278	*/
279	PGMDECL(int) PGMPhysHCPtr2GCPhys(PVM pVM, RTHCPTR HCPtr, PRTGCPHYS pGCPhys)
280	{
281	for (PPGMRAMRANGE pRam = CTXSUFF(pVM->pgm.s.pRamRanges);
282	pRam;
283	pRam = CTXSUFF(pRam->pNext))
284	{
285	if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
286	{
287	/** @note this is quite slow */
288	for (unsigned iChunk = 0; iChunk < (pRam->cb >> PGM_DYNAMIC_CHUNK_SHIFT); iChunk++)
289	{
290	if (CTXSUFF(pRam->pavHCChunk)[iChunk])
291	{
292	RTHCUINTPTR off = (RTHCUINTPTR)HCPtr - (RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[iChunk];
293	if (off < PGM_DYNAMIC_CHUNK_SIZE)
294	{
295	pGCPhys = pRam->GCPhys + iChunkPGM_DYNAMIC_CHUNK_SIZE + off;
296	return VINF_SUCCESS;
297	}
298	}
299	}
300	}
301	else if (pRam->pvHC)
302	{
303	RTHCUINTPTR off = (RTHCUINTPTR)HCPtr - (RTHCUINTPTR)pRam->pvHC;
304	if (off < pRam->cb)
305	{
306	*pGCPhys = pRam->GCPhys + off;
307	return VINF_SUCCESS;
308	}
309	}
310	}
311	return VERR_INVALID_POINTER;
312	}
313
314
315	/**
316	* Converts a HC pointer to a GC physical address.
317	*
318	* @returns VINF_SUCCESS on success.
319	* @returns VERR_PGM_PHYS_PAGE_RESERVED it it's a valid GC physical
320	* page but has no physical backing.
321	* @returns VERR_INVALID_POINTER if the pointer is not within the
322	* GC physical memory.
323	* @param pVM The VM handle.
324	* @param HCPtr The HC pointer to convert.
325	* @param pHCPhys Where to store the HC physical address on success.
326	*/
327	PGMDECL(int) PGMPhysHCPtr2HCPhys(PVM pVM, RTHCPTR HCPtr, PRTHCPHYS pHCPhys)
328	{
329	for (PPGMRAMRANGE pRam = CTXSUFF(pVM->pgm.s.pRamRanges);
330	pRam;
331	pRam = CTXSUFF(pRam->pNext))
332	{
333	if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
334	{
335	/** @note this is quite slow */
336	for (unsigned iChunk = 0; iChunk < (pRam->cb >> PGM_DYNAMIC_CHUNK_SHIFT); iChunk++)
337	{
338	if (CTXSUFF(pRam->pavHCChunk)[iChunk])
339	{
340	RTHCUINTPTR off = (RTHCUINTPTR)HCPtr - (RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[iChunk];
341	if (off < PGM_DYNAMIC_CHUNK_SIZE)
342	{
343	RTHCPHYS HCPhys = pRam->aHCPhys[off >> PAGE_SHIFT];
344	#ifndef PGM_IGNORE_RAM_FLAGS_RESERVED
345	if (!(HCPhys & MM_RAM_FLAGS_RESERVED))
346	#endif
347	{
348	*pHCPhys = (HCPhys & X86_PTE_PAE_PG_MASK)
349	\| (off & PAGE_OFFSET_MASK);
350	return VINF_SUCCESS;
351	}
352	return VERR_PGM_PHYS_PAGE_RESERVED;
353	}
354	}
355	}
356	}
357	else if (pRam->pvHC)
358	{
359	RTHCUINTPTR off = (RTHCUINTPTR)HCPtr - (RTHCUINTPTR)pRam->pvHC;
360	if (off < pRam->cb)
361	{
362	RTHCPHYS HCPhys = pRam->aHCPhys[off >> PAGE_SHIFT];
363	#ifndef PGM_IGNORE_RAM_FLAGS_RESERVED
364	if (!(HCPhys & MM_RAM_FLAGS_RESERVED))
365	#endif
366	{
367	*pHCPhys = (HCPhys & X86_PTE_PAE_PG_MASK)
368	\| (off & PAGE_OFFSET_MASK);
369	return VINF_SUCCESS;
370	}
371	return VERR_PGM_PHYS_PAGE_RESERVED;
372	}
373	}
374	}
375	return VERR_INVALID_POINTER;
376	}
377
378
379	/**
380	* Validates a HC Physical address.
381	*
382	* This is an extremely slow API, don't use it!
383	*
384	* @returns true if valid.
385	* @returns false if invalid.
386	* @param pVM The VM handle.
387	* @param HCPhys The physical address to validate.
388	*/
389	PGMDECL(bool) PGMPhysIsHCPhysValid(PVM pVM, RTHCPHYS HCPhys)
390	{
391	RTGCPHYS GCPhys;
392	int rc = PGMPhysHCPhys2GCPhys(pVM, HCPhys, &GCPhys);
393	return VBOX_SUCCESS(rc);
394	}
395
396
397	/**
398	* Converts a HC physical address to a GC physical address.
399	*
400	* This is an extremely slow API, don't use it!
401	*
402	* @returns VINF_SUCCESS on success.
403	* @returns VERR_INVALID_POINTER if the HC physical address is
404	* not within the GC physical memory.
405	* @param pVM The VM handle.
406	* @param HCPhys The HC physical address to convert.
407	* @param pGCPhys Where to store the GC physical address on success.
408	*/
409	PGMDECL(int) PGMPhysHCPhys2GCPhys(PVM pVM, RTHCPHYS HCPhys, PRTGCPHYS pGCPhys)
410	{
411	unsigned off = HCPhys & PAGE_OFFSET_MASK;
412	HCPhys &= X86_PTE_PAE_PG_MASK;
413	for (PPGMRAMRANGE pRam = CTXSUFF(pVM->pgm.s.pRamRanges);
414	pRam;
415	pRam = CTXSUFF(pRam->pNext))
416	{
417	if ( pRam->pvHC
418	\|\| (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC))
419	{
420	unsigned iPage = pRam->cb >> PAGE_SHIFT;
421	while (iPage-- > 0)
422	#ifndef PGM_IGNORE_RAM_FLAGS_RESERVED
423	if ((pRam->aHCPhys[iPage] & (X86_PTE_PAE_PG_MASK \| MM_RAM_FLAGS_RESERVED)) == HCPhys)
424	#else
425	if ((pRam->aHCPhys[iPage] & (X86_PTE_PAE_PG_MASK)) == HCPhys)
426	#endif
427	{
428	*pGCPhys = pRam->GCPhys + (iPage << PAGE_SHIFT) + off;
429	return VINF_SUCCESS;
430	}
431	}
432	}
433	return VERR_INVALID_POINTER;
434	}
435
436
437	/**
438	* Converts a HC physical address to a HC pointer.
439	*
440	* This is an extremely slow API, don't use it!
441	*
442	* @returns VINF_SUCCESS on success.
443	* @returns VERR_INVALID_POINTER if the HC physical address is
444	* not within the GC physical memory.
445	* @param pVM The VM handle.
446	* @param HCPhys The HC physical address to convert.
447	* @param pHCPtr Where to store the HC pointer on success.
448	*/
449	PGMDECL(int) PGMPhysHCPhys2HCPtr(PVM pVM, RTHCPHYS HCPhys, PRTHCPTR pHCPtr)
450	{
451	unsigned off = HCPhys & PAGE_OFFSET_MASK;
452	HCPhys &= X86_PTE_PAE_PG_MASK;
453	for (PPGMRAMRANGE pRam = CTXSUFF(pVM->pgm.s.pRamRanges);
454	pRam;
455	pRam = CTXSUFF(pRam->pNext))
456	{
457	if ( pRam->pvHC
458	\|\| (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC))
459	{
460	unsigned iPage = pRam->cb >> PAGE_SHIFT;
461	while (iPage-- > 0)
462	#ifndef PGM_IGNORE_RAM_FLAGS_RESERVED
463	if ((pRam->aHCPhys[iPage] & (X86_PTE_PAE_PG_MASK \| MM_RAM_FLAGS_RESERVED)) == HCPhys)
464	#else
465	if ((pRam->aHCPhys[iPage] & (X86_PTE_PAE_PG_MASK)) == HCPhys)
466	#endif
467	{
468	if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
469	{
470	unsigned idx = (iPage >> (PGM_DYNAMIC_CHUNK_SHIFT - PAGE_SHIFT));
471
472	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[idx] + ((iPage << PAGE_SHIFT) & PGM_DYNAMIC_CHUNK_OFFSET_MASK) + off);
473	}
474	else
475	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + (iPage << PAGE_SHIFT) + off);
476
477	return VINF_SUCCESS;
478	}
479	}
480	}
481	return VERR_INVALID_POINTER;
482	}
483
484
485	/**
486	* Converts a guest pointer to a GC physical address.
487	*
488	* This uses the current CR3/CR0/CR4 of the guest.
489	*
490	* @returns VBox status code.
491	* @param pVM The VM Handle
492	* @param GCPtr The guest pointer to convert.
493	* @param pGCPhys Where to store the HC physical address.
494	*/
495	PGMDECL(int) PGMPhysGCPtr2GCPhys(PVM pVM, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
496	{
497	int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, pGCPhys);
498	/** @todo real mode & protected mode? */
499	return rc;
500	}
501
502
503	/**
504	* Converts a guest pointer to a HC physical address.
505	*
506	* This uses the current CR3/CR0/CR4 of the guest.
507	*
508	* @returns VBox status code.
509	* @param pVM The VM Handle
510	* @param GCPtr The guest pointer to convert.
511	* @param pHCPhys Where to store the HC physical address.
512	*/
513	PGMDECL(int) PGMPhysGCPtr2HCPhys(PVM pVM, RTGCPTR GCPtr, PRTHCPHYS pHCPhys)
514	{
515	RTGCPHYS GCPhys;
516	int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, &GCPhys);
517	if (VBOX_SUCCESS(rc))
518	rc = PGMPhysGCPhys2HCPhys(pVM, GCPhys \| ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), pHCPhys);
519	/** @todo real mode & protected mode? */
520	return rc;
521	}
522
523
524	/**
525	* Converts a guest pointer to a HC pointer.
526	*
527	* This uses the current CR3/CR0/CR4 of the guest.
528	*
529	* @returns VBox status code.
530	* @param pVM The VM Handle
531	* @param GCPtr The guest pointer to convert.
532	* @param pHCPtr Where to store the HC virtual address.
533	*/
534	PGMDECL(int) PGMPhysGCPtr2HCPtr(PVM pVM, RTGCPTR GCPtr, PRTHCPTR pHCPtr)
535	{
536	RTGCPHYS GCPhys;
537	int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, &GCPhys);
538	if (VBOX_SUCCESS(rc))
539	rc = PGMPhysGCPhys2HCPtr(pVM, GCPhys \| ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), 1 /* we always stay within one page */, pHCPtr);
540	/** @todo real mode & protected mode? */
541	return rc;
542	}
543
544
545	/**
546	* Converts a guest virtual address to a HC pointer by specfied CR3 and flags.
547	*
548	* @returns VBox status code.
549	* @param pVM The VM Handle
550	* @param GCPtr The guest pointer to convert.
551	* @param cr3 The guest CR3.
552	* @param fFlags Flags used for interpreting the PD correctly: X86_CR4_PSE and X86_CR4_PAE
553	* @param pHCPtr Where to store the HC pointer.
554	*
555	* @remark This function is used by the REM at a time where PGM could
556	* potentially not be in sync. It could also be used by a
557	* future DBGF API to cpu state independent conversions.
558	*/
559	PGMDECL(int) PGMPhysGCPtr2HCPtrByGstCR3(PVM pVM, RTGCPTR GCPtr, uint32_t cr3, unsigned fFlags, PRTHCPTR pHCPtr)
560	{
561	/*
562	* PAE or 32-bit?
563	*/
564	int rc;
565	if (!(fFlags & X86_CR4_PAE))
566	{
567	PX86PD pPD;
568	rc = PGM_GCPHYS_2_PTR(pVM, cr3 & X86_CR3_PAGE_MASK, &pPD);
569	if (VBOX_SUCCESS(rc))
570	{
571	VBOXPDE Pde = pPD->a[(RTGCUINTPTR)GCPtr >> X86_PD_SHIFT];
572	if (Pde.n.u1Present)
573	{
574	if ((fFlags & X86_CR4_PSE) && Pde.b.u1Size)
575	{ /* (big page) */
576	rc = PGMPhysGCPhys2HCPtr(pVM, (Pde.u & X86_PDE4M_PG_MASK) \| ((RTGCUINTPTR)GCPtr & X86_PAGE_4M_OFFSET_MASK), 1 /* we always stay within one page */, pHCPtr);
577	}
578	else
579	{ /* (normal page) */
580	PVBOXPT pPT;
581	rc = PGM_GCPHYS_2_PTR(pVM, Pde.u & X86_PDE_PG_MASK, &pPT);
582	if (VBOX_SUCCESS(rc))
583	{
584	VBOXPTE Pte = pPT->a[((RTGCUINTPTR)GCPtr >> X86_PT_SHIFT) & X86_PT_MASK];
585	if (Pte.n.u1Present)
586	return PGMPhysGCPhys2HCPtr(pVM, (Pte.u & X86_PTE_PG_MASK) \| ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), 1 /* we always stay within one page */, pHCPtr);
587	rc = VERR_PAGE_NOT_PRESENT;
588	}
589	}
590	}
591	else
592	rc = VERR_PAGE_TABLE_NOT_PRESENT;
593	}
594	}
595	else
596	{
597	/** @todo long mode! */
598	PX86PDPTR pPdptr;
599	rc = PGM_GCPHYS_2_PTR(pVM, cr3 & X86_CR3_PAE_PAGE_MASK, &pPdptr);
600	if (VBOX_SUCCESS(rc))
601	{
602	X86PDPE Pdpe = pPdptr->a[((RTGCUINTPTR)GCPtr >> X86_PDPTR_SHIFT) & X86_PDPTR_MASK];
603	if (Pdpe.n.u1Present)
604	{
605	PX86PDPAE pPD;
606	rc = PGM_GCPHYS_2_PTR(pVM, Pdpe.u & X86_PDPE_PG_MASK, &pPD);
607	if (VBOX_SUCCESS(rc))
608	{
609	X86PDEPAE Pde = pPD->a[((RTGCUINTPTR)GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK];
610	if (Pde.n.u1Present)
611	{
612	if ((fFlags & X86_CR4_PSE) && Pde.b.u1Size)
613	{ /* (big page) */
614	rc = PGMPhysGCPhys2HCPtr(pVM, (Pde.u & X86_PDE4M_PAE_PG_MASK) \| ((RTGCUINTPTR)GCPtr & X86_PAGE_4M_OFFSET_MASK), 1 /* we always stay within one page */, pHCPtr);
615	}
616	else
617	{ /* (normal page) */
618	PX86PTPAE pPT;
619	rc = PGM_GCPHYS_2_PTR(pVM, (Pde.u & X86_PDE_PAE_PG_MASK), &pPT);
620	if (VBOX_SUCCESS(rc))
621	{
622	X86PTEPAE Pte = pPT->a[((RTGCUINTPTR)GCPtr >> X86_PT_PAE_SHIFT) & X86_PT_PAE_MASK];
623	if (Pte.n.u1Present)
624	return PGMPhysGCPhys2HCPtr(pVM, (Pte.u & X86_PTE_PAE_PG_MASK) \| ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), 1 /* we always stay within one page */, pHCPtr);
625	rc = VERR_PAGE_NOT_PRESENT;
626	}
627	}
628	}
629	else
630	rc = VERR_PAGE_TABLE_NOT_PRESENT;
631	}
632	}
633	else
634	rc = VERR_PAGE_TABLE_NOT_PRESENT;
635	}
636	}
637	return rc;
638	}
639
640
641	#undef LOG_GROUP
642	#define LOG_GROUP LOG_GROUP_PGM_PHYS_ACCESS
643
644
645	#ifdef IN_RING3
646	/**
647	* Cache PGMPhys memory access
648	*
649	* @param pVM VM Handle.
650	* @param pCache Cache structure pointer
651	* @param GCPhys GC physical address
652	* @param pbHC HC pointer corresponding to physical page
653	*/
654	static void pgmPhysCacheAdd(PVM pVM, PGMPHYSCACHE pCache, RTGCPHYS GCPhys, uint8_t pbHC)
655	{
656	uint32_t iCacheIndex;
657
658	GCPhys = PAGE_ADDRESS(GCPhys);
659	pbHC = (uint8_t *)PAGE_ADDRESS(pbHC);
660
661	iCacheIndex = ((GCPhys >> PAGE_SHIFT) & PGM_MAX_PHYSCACHE_ENTRIES_MASK);
662
663	ASMBitSet(&pCache->aEntries, iCacheIndex);
664
665	pCache->Entry[iCacheIndex].GCPhys = GCPhys;
666	pCache->Entry[iCacheIndex].pbHC = pbHC;
667	}
668	#endif
669
670	/**
671	* Read physical memory.
672	*
673	* This API respects access handlers and MMIO. Use PGMPhysReadGCPhys() if you
674	* want to ignore those.
675	*
676	* @param pVM VM Handle.
677	* @param GCPhys Physical address start reading from.
678	* @param pvBuf Where to put the read bits.
679	* @param cbRead How many bytes to read.
680	*/
681	PGMDECL(void) PGMPhysRead(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
682	{
683	#ifdef IN_RING3
684	bool fGrabbedLock = false;
685	#endif
686
687	AssertMsg(cbRead > 0, ("don't even think about reading zero bytes!\n"));
688	if (cbRead == 0)
689	return;
690
691	LogFlow(("PGMPhysRead: %VGp %d\n", GCPhys, cbRead));
692
693	#ifdef IN_RING3
694	if (!VM_IS_EMT(pVM))
695	{
696	pgmLock(pVM);
697	fGrabbedLock = true;
698	}
699	#endif
700
701	/*
702	* Copy loop on ram ranges.
703	*/
704	PPGMRAMRANGE pCur = CTXSUFF(pVM->pgm.s.pRamRanges);
705	for (;;)
706	{
707	/* Find range. */
708	while (pCur && GCPhys > pCur->GCPhysLast)
709	pCur = CTXSUFF(pCur->pNext);
710	/* Inside range or not? */
711	if (pCur && GCPhys >= pCur->GCPhys)
712	{
713	/*
714	* Must work our way thru this page by page.
715	*/
716	RTGCPHYS off = GCPhys - pCur->GCPhys;
717	while (off < pCur->cb)
718	{
719	unsigned iPage = off >> PAGE_SHIFT;
720	size_t cb;
721
722	/* Physical chunk in dynamically allocated range not present? */
723	if (RT_UNLIKELY(!(pCur->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
724	{
725	/* Treat it as reserved; return zeros */
726	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
727	if (cb >= cbRead)
728	{
729	memset(pvBuf, 0, cbRead);
730	goto end;
731	}
732	memset(pvBuf, 0, cb);
733	}
734	else
735	{
736	RTHCPHYS HCPhys = pCur->aHCPhys[iPage];
737	switch (HCPhys & (MM_RAM_FLAGS_RESERVED \| MM_RAM_FLAGS_MMIO \| MM_RAM_FLAGS_VIRTUAL_ALL \| MM_RAM_FLAGS_PHYSICAL_ALL \| MM_RAM_FLAGS_ROM))
738	{
739	/*
740	* Normal memory or ROM.
741	*/
742	case 0:
743	case MM_RAM_FLAGS_ROM:
744	case MM_RAM_FLAGS_ROM \| MM_RAM_FLAGS_RESERVED:
745	case MM_RAM_FLAGS_PHYSICAL_WRITE:
746	case MM_RAM_FLAGS_MMIO2 \| MM_RAM_FLAGS_PHYSICAL_WRITE:
747	case MM_RAM_FLAGS_VIRTUAL_WRITE:
748	{
749	#ifdef IN_GC
750	void *pvSrc = NULL;
751	PGMGCDynMapHCPage(pVM, HCPhys & X86_PTE_PAE_PG_MASK, &pvSrc);
752	pvSrc = (char *)pvSrc + (off & PAGE_OFFSET_MASK);
753	#else
754	void *pvSrc = PGMRAMRANGE_GETHCPTR(pCur, off)
755	#endif
756	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
757	if (cb >= cbRead)
758	{
759	#if defined(IN_RING3) && defined(PGM_PHYSMEMACCESS_CACHING)
760	if (cbRead <= 4)
761	pgmPhysCacheAdd(pVM, &pVM->pgm.s.pgmphysreadcache, GCPhys, (uint8_t*)pvSrc);
762	#endif /* IN_RING3 && PGM_PHYSMEMACCESS_CACHING */
763	memcpy(pvBuf, pvSrc, cbRead);
764	goto end;
765	}
766	memcpy(pvBuf, pvSrc, cb);
767	break;
768	}
769
770	/*
771	* All reserved, nothing there.
772	*/
773	case MM_RAM_FLAGS_RESERVED:
774	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
775	if (cb >= cbRead)
776	{
777	memset(pvBuf, 0, cbRead);
778	goto end;
779	}
780	memset(pvBuf, 0, cb);
781	break;
782
783	/*
784	* Physical handler.
785	*/
786	case MM_RAM_FLAGS_PHYSICAL_ALL:
787	case MM_RAM_FLAGS_MMIO2 \| MM_RAM_FLAGS_PHYSICAL_ALL: /** r=bird: MMIO2 isn't in the mask! */
788	{
789	int rc = VINF_PGM_HANDLER_DO_DEFAULT;
790	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
791	#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
792
793	/* find and call the handler */
794	PPGMPHYSHANDLER pNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesHC->PhysHandlers, GCPhys);
795	if (pNode && pNode->pfnHandlerR3)
796	{
797	size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
798	if (cbRange < cb)
799	cb = cbRange;
800	if (cb > cbRead)
801	cb = cbRead;
802
803	void *pvSrc = PGMRAMRANGE_GETHCPTR(pCur, off)
804
805	/** @note Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
806	rc = pNode->pfnHandlerR3(pVM, GCPhys, pvSrc, pvBuf, cb, PGMACCESSTYPE_READ, pNode->pvUserR3);
807	}
808	#endif /* IN_RING3 */
809	if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
810	{
811	#ifdef IN_GC
812	void *pvSrc = NULL;
813	PGMGCDynMapHCPage(pVM, HCPhys & X86_PTE_PAE_PG_MASK, &pvSrc);
814	pvSrc = (char *)pvSrc + (off & PAGE_OFFSET_MASK);
815	#else
816	void *pvSrc = PGMRAMRANGE_GETHCPTR(pCur, off)
817	#endif
818
819	if (cb >= cbRead)
820	{
821	memcpy(pvBuf, pvSrc, cbRead);
822	goto end;
823	}
824	memcpy(pvBuf, pvSrc, cb);
825	}
826	else if (cb >= cbRead)
827	goto end;
828	break;
829	}
830
831	case MM_RAM_FLAGS_VIRTUAL_ALL:
832	{
833	int rc = VINF_PGM_HANDLER_DO_DEFAULT;
834	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
835	#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
836	/* Search the whole tree for matching physical addresses (rather expensive!) */
837	PPGMVIRTHANDLER pNode;
838	unsigned iPage;
839	int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pNode, &iPage);
840	if (VBOX_SUCCESS(rc2) && pNode->pfnHandlerHC)
841	{
842	size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
843	if (cbRange < cb)
844	cb = cbRange;
845	if (cb > cbRead)
846	cb = cbRead;
847	RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pNode->GCPtr & PAGE_BASE_GC_MASK)
848	+ (iPage << PAGE_SHIFT) + (off & PAGE_OFFSET_MASK);
849
850	void *pvSrc = PGMRAMRANGE_GETHCPTR(pCur, off)
851
852	/** @note Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
853	rc = pNode->pfnHandlerHC(pVM, (RTGCPTR)GCPtr, pvSrc, pvBuf, cb, PGMACCESSTYPE_READ, 0);
854	}
855	#endif /* IN_RING3 */
856	if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
857	{
858	#ifdef IN_GC
859	void *pvSrc = NULL;
860	PGMGCDynMapHCPage(pVM, HCPhys & X86_PTE_PAE_PG_MASK, &pvSrc);
861	pvSrc = (char *)pvSrc + (off & PAGE_OFFSET_MASK);
862	#else
863	void *pvSrc = PGMRAMRANGE_GETHCPTR(pCur, off)
864	#endif
865	if (cb >= cbRead)
866	{
867	memcpy(pvBuf, pvSrc, cbRead);
868	goto end;
869	}
870	memcpy(pvBuf, pvSrc, cb);
871	}
872	else if (cb >= cbRead)
873	goto end;
874	break;
875	}
876
877	/*
878	* The rest needs to be taken more carefully.
879	*/
880	default:
881	#if 1 /** @todo r=bird: Can you do this properly please. */
882	/** @todo Try MMIO; quick hack */
883	if (cbRead <= 4 && IOMMMIORead(pVM, GCPhys, (uint32_t *)pvBuf, cbRead) == VINF_SUCCESS)
884	goto end;
885	#endif
886
887	/** @todo fix me later. */
888	AssertReleaseMsgFailed(("Unknown read at %VGp size %d implement the complex physical reading case %x\n",
889	GCPhys, cbRead,
890	HCPhys & (MM_RAM_FLAGS_RESERVED \| MM_RAM_FLAGS_MMIO \| MM_RAM_FLAGS_VIRTUAL_ALL \| MM_RAM_FLAGS_PHYSICAL_ALL \| MM_RAM_FLAGS_ROM)));
891	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
892	break;
893	}
894	}
895	cbRead -= cb;
896	off += cb;
897	pvBuf = (char *)pvBuf + cb;
898	}
899
900	GCPhys = pCur->GCPhysLast + 1;
901	}
902	else
903	{
904	LogFlow(("PGMPhysRead: Unassigned %VGp size=%d\n", GCPhys, cbRead));
905
906	/*
907	* Unassigned address space.
908	*/
909	size_t cb;
910	if ( !pCur
911	\|\| (cb = pCur->GCPhys - GCPhys) >= cbRead)
912	{
913	memset(pvBuf, 0, cbRead);
914	goto end;
915	}
916
917	memset(pvBuf, 0, cb);
918	cbRead -= cb;
919	pvBuf = (char *)pvBuf + cb;
920	GCPhys += cb;
921	}
922	}
923	end:
924	#ifdef IN_RING3
925	if (fGrabbedLock)
926	pgmUnlock(pVM);
927	#endif
928	return;
929	}
930
931	/**
932	* Write to physical memory.
933	*
934	* This API respects access handlers and MMIO. Use PGMPhysReadGCPhys() if you
935	* want to ignore those.
936	*
937	* @param pVM VM Handle.
938	* @param GCPhys Physical address to write to.
939	* @param pvBuf What to write.
940	* @param cbWrite How many bytes to write.
941	*/
942	PGMDECL(void) PGMPhysWrite(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
943	{
944	#ifdef IN_RING3
945	bool fGrabbedLock = false;
946	#endif
947
948	AssertMsg(cbWrite > 0, ("don't even think about writing zero bytes!\n"));
949	if (cbWrite == 0)
950	return;
951
952	LogFlow(("PGMPhysWrite: %VGp %d\n", GCPhys, cbWrite));
953
954	#ifdef IN_RING3
955	if (!VM_IS_EMT(pVM))
956	{
957	pgmLock(pVM);
958	fGrabbedLock = true;
959	}
960	#endif
961	/*
962	* Copy loop on ram ranges.
963	*/
964	PPGMRAMRANGE pCur = CTXSUFF(pVM->pgm.s.pRamRanges);
965	for (;;)
966	{
967	/* Find range. */
968	while (pCur && GCPhys > pCur->GCPhysLast)
969	pCur = CTXSUFF(pCur->pNext);
970	/* Inside range or not? */
971	if (pCur && GCPhys >= pCur->GCPhys)
972	{
973	/*
974	* Must work our way thru this page by page.
975	*/
976	unsigned off = GCPhys - pCur->GCPhys;
977	while (off < pCur->cb)
978	{
979	unsigned iPage = off >> PAGE_SHIFT;
980
981	/* Physical chunk in dynamically allocated range not present? */
982	if (RT_UNLIKELY(!(pCur->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
983	{
984	int rc;
985	#ifdef IN_RING3
986	if (fGrabbedLock)
987	{
988	pgmUnlock(pVM);
989	rc = pgmr3PhysGrowRange(pVM, GCPhys);
990	if (rc == VINF_SUCCESS)
991	PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite); /* try again; can't assume pCur is still valid (paranoia) */
992	return;
993	}
994	rc = pgmr3PhysGrowRange(pVM, GCPhys);
995	#else
996	rc = CTXALLMID(VMM, CallHost)(pVM, VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
997	#endif
998	if (rc != VINF_SUCCESS)
999	goto end;
1000	}
1001
1002	size_t cb;
1003	RTHCPHYS HCPhys = pCur->aHCPhys[iPage];
1004	/** @todo r=bird: missing MM_RAM_FLAGS_ROM here, we shall not allow anyone to overwrite the ROM! */
1005	switch (HCPhys & (MM_RAM_FLAGS_RESERVED \| MM_RAM_FLAGS_MMIO \| MM_RAM_FLAGS_MMIO2 \| MM_RAM_FLAGS_VIRTUAL_ALL \| MM_RAM_FLAGS_VIRTUAL_WRITE \| MM_RAM_FLAGS_PHYSICAL_ALL \| MM_RAM_FLAGS_PHYSICAL_WRITE))
1006	{
1007	/*
1008	* Normal memory.
1009	*/
1010	case 0:
1011	case MM_RAM_FLAGS_MMIO2:
1012	{
1013	#ifdef IN_GC
1014	void *pvDst = NULL;
1015	PGMGCDynMapHCPage(pVM, HCPhys & X86_PTE_PAE_PG_MASK, &pvDst);
1016	pvDst = (char *)pvDst + (off & PAGE_OFFSET_MASK);
1017	#else
1018	void *pvDst = PGMRAMRANGE_GETHCPTR(pCur, off)
1019	#endif
1020	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1021	if (cb >= cbWrite)
1022	{
1023	#if defined(IN_RING3) && defined(PGM_PHYSMEMACCESS_CACHING)
1024	if (cbWrite <= 4)
1025	pgmPhysCacheAdd(pVM, &pVM->pgm.s.pgmphyswritecache, GCPhys, (uint8_t*)pvDst);
1026	#endif /* IN_RING3 && PGM_PHYSMEMACCESS_CACHING */
1027	memcpy(pvDst, pvBuf, cbWrite);
1028	goto end;
1029	}
1030	memcpy(pvDst, pvBuf, cb);
1031	break;
1032	}
1033
1034	/*
1035	* All reserved, nothing there.
1036	*/
1037	case MM_RAM_FLAGS_RESERVED:
1038	case MM_RAM_FLAGS_RESERVED \| MM_RAM_FLAGS_MMIO2:
1039	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1040	if (cb >= cbWrite)
1041	goto end;
1042	break;
1043
1044	/*
1045	* Physical handler.
1046	*/
1047	case MM_RAM_FLAGS_PHYSICAL_ALL:
1048	case MM_RAM_FLAGS_PHYSICAL_WRITE:
1049	case MM_RAM_FLAGS_MMIO2 \| MM_RAM_FLAGS_PHYSICAL_ALL:
1050	case MM_RAM_FLAGS_MMIO2 \| MM_RAM_FLAGS_PHYSICAL_WRITE:
1051	{
1052	int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1053	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1054	#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
1055	/* find and call the handler */
1056	PPGMPHYSHANDLER pNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesHC->PhysHandlers, GCPhys);
1057	if (pNode && pNode->pfnHandlerR3)
1058	{
1059	size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
1060	if (cbRange < cb)
1061	cb = cbRange;
1062	if (cb > cbWrite)
1063	cb = cbWrite;
1064
1065	void *pvDst = PGMRAMRANGE_GETHCPTR(pCur, off)
1066
1067	/** @note Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1068	rc = pNode->pfnHandlerR3(pVM, GCPhys, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, pNode->pvUserR3);
1069	}
1070	#endif /* IN_RING3 */
1071	if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1072	{
1073	#ifdef IN_GC
1074	void *pvDst = NULL;
1075	PGMGCDynMapHCPage(pVM, HCPhys & X86_PTE_PAE_PG_MASK, &pvDst);
1076	pvDst = (char *)pvDst + (off & PAGE_OFFSET_MASK);
1077	#else
1078	void *pvDst = PGMRAMRANGE_GETHCPTR(pCur, off)
1079	#endif
1080	if (cb >= cbWrite)
1081	{
1082	memcpy(pvDst, pvBuf, cbWrite);
1083	goto end;
1084	}
1085	memcpy(pvDst, pvBuf, cb);
1086	}
1087	else if (cb >= cbWrite)
1088	goto end;
1089	break;
1090	}
1091
1092	case MM_RAM_FLAGS_VIRTUAL_ALL:
1093	case MM_RAM_FLAGS_VIRTUAL_WRITE:
1094	{
1095	int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1096	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1097	#ifdef IN_RING3
1098	/** @todo deal with this in GC and R0! */
1099	/* Search the whole tree for matching physical addresses (rather expensive!) */
1100	PPGMVIRTHANDLER pNode;
1101	unsigned iPage;
1102	int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pNode, &iPage);
1103	if (VBOX_SUCCESS(rc2) && pNode->pfnHandlerHC)
1104	{
1105	size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
1106	if (cbRange < cb)
1107	cb = cbRange;
1108	if (cb > cbWrite)
1109	cb = cbWrite;
1110	RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pNode->GCPtr & PAGE_BASE_GC_MASK)
1111	+ (iPage << PAGE_SHIFT) + (off & PAGE_OFFSET_MASK);
1112
1113	void *pvDst = PGMRAMRANGE_GETHCPTR(pCur, off)
1114
1115	/** @note Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1116	rc = pNode->pfnHandlerHC(pVM, (RTGCPTR)GCPtr, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, 0);
1117	}
1118	#endif /* IN_RING3 */
1119	if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1120	{
1121	#ifdef IN_GC
1122	void *pvDst = NULL;
1123	PGMGCDynMapHCPage(pVM, HCPhys & X86_PTE_PAE_PG_MASK, &pvDst);
1124	pvDst = (char *)pvDst + (off & PAGE_OFFSET_MASK);
1125	#else
1126	void *pvDst = PGMRAMRANGE_GETHCPTR(pCur, off)
1127	#endif
1128	if (cb >= cbWrite)
1129	{
1130	memcpy(pvDst, pvBuf, cbWrite);
1131	goto end;
1132	}
1133	memcpy(pvDst, pvBuf, cb);
1134	}
1135	else if (cb >= cbWrite)
1136	goto end;
1137	break;
1138	}
1139
1140	/*
1141	* Physical write handler + virtual write handler.
1142	* Consider this a quick workaround for the CSAM + shadow caching problem.
1143	*
1144	* We hand it to the shadow caching first since it requires the unchanged
1145	* data. CSAM will have to put up with it already being changed.
1146	*/
1147	case MM_RAM_FLAGS_PHYSICAL_WRITE \| MM_RAM_FLAGS_VIRTUAL_WRITE:
1148	{
1149	int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1150	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1151	#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
1152	/* 1. The physical handler */
1153	PPGMPHYSHANDLER pPhysNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesHC->PhysHandlers, GCPhys);
1154	if (pPhysNode && pPhysNode->pfnHandlerR3)
1155	{
1156	size_t cbRange = pPhysNode->Core.KeyLast - GCPhys + 1;
1157	if (cbRange < cb)
1158	cb = cbRange;
1159	if (cb > cbWrite)
1160	cb = cbWrite;
1161
1162	void *pvDst = PGMRAMRANGE_GETHCPTR(pCur, off)
1163
1164	/** @note Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1165	rc = pPhysNode->pfnHandlerR3(pVM, GCPhys, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, pPhysNode->pvUserR3);
1166	}
1167
1168	/* 2. The virtual handler (will see incorrect data) */
1169	PPGMVIRTHANDLER pVirtNode;
1170	unsigned iPage;
1171	int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pVirtNode, &iPage);
1172	if (VBOX_SUCCESS(rc2) && pVirtNode->pfnHandlerHC)
1173	{
1174	size_t cbRange = pVirtNode->Core.KeyLast - GCPhys + 1;
1175	if (cbRange < cb)
1176	cb = cbRange;
1177	if (cb > cbWrite)
1178	cb = cbWrite;
1179	RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pVirtNode->GCPtr & PAGE_BASE_GC_MASK)
1180	+ (iPage << PAGE_SHIFT) + (off & PAGE_OFFSET_MASK);
1181
1182	void *pvDst = PGMRAMRANGE_GETHCPTR(pCur, off)
1183
1184	/** @note Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1185	rc2 = pVirtNode->pfnHandlerHC(pVM, (RTGCPTR)GCPtr, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, 0);
1186	if ( ( rc2 != VINF_PGM_HANDLER_DO_DEFAULT
1187	&& rc == VINF_PGM_HANDLER_DO_DEFAULT)
1188	\|\| ( VBOX_FAILURE(rc2)
1189	&& VBOX_SUCCESS(rc)))
1190	rc = rc2;
1191	}
1192	#endif /* IN_RING3 */
1193	if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1194	{
1195	#ifdef IN_GC
1196	void *pvDst = NULL;
1197	PGMGCDynMapHCPage(pVM, HCPhys & X86_PTE_PAE_PG_MASK, &pvDst);
1198	pvDst = (char *)pvDst + (off & PAGE_OFFSET_MASK);
1199	#else
1200	void *pvDst = PGMRAMRANGE_GETHCPTR(pCur, off)
1201	#endif
1202	if (cb >= cbWrite)
1203	{
1204	memcpy(pvDst, pvBuf, cbWrite);
1205	goto end;
1206	}
1207	memcpy(pvDst, pvBuf, cb);
1208	}
1209	else if (cb >= cbWrite)
1210	goto end;
1211	break;
1212	}
1213
1214
1215	/*
1216	* The rest needs to be taken more carefully.
1217	*/
1218	default:
1219	#if 1 /** @todo r=bird: Can you do this properly please. */
1220	/** @todo Try MMIO; quick hack */
1221	if (cbWrite <= 4 && IOMMMIOWrite(pVM, GCPhys, (uint32_t )pvBuf, cbWrite) == VINF_SUCCESS)
1222	goto end;
1223	#endif
1224
1225	/** @todo fix me later. */
1226	AssertReleaseMsgFailed(("Unknown write at %VGp size %d implement the complex physical writing case %x\n",
1227	GCPhys, cbWrite,
1228	(HCPhys & (MM_RAM_FLAGS_RESERVED \| MM_RAM_FLAGS_MMIO \| MM_RAM_FLAGS_MMIO2 \| MM_RAM_FLAGS_VIRTUAL_ALL \| MM_RAM_FLAGS_VIRTUAL_WRITE \| MM_RAM_FLAGS_PHYSICAL_ALL \| MM_RAM_FLAGS_PHYSICAL_WRITE))));
1229	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1230	break;
1231	}
1232
1233	cbWrite -= cb;
1234	off += cb;
1235	pvBuf = (const char *)pvBuf + cb;
1236	}
1237
1238	GCPhys = pCur->GCPhysLast + 1;
1239	}
1240	else
1241	{
1242	/*
1243	* Unassigned address space.
1244	*/
1245	size_t cb;
1246	if ( !pCur
1247	\|\| (cb = pCur->GCPhys - GCPhys) >= cbWrite)
1248	goto end;
1249
1250	cbWrite -= cb;
1251	pvBuf = (const char *)pvBuf + cb;
1252	GCPhys += cb;
1253	}
1254	}
1255	end:
1256	#ifdef IN_RING3
1257	if (fGrabbedLock)
1258	pgmUnlock(pVM);
1259	#endif
1260	return;
1261	}
1262
1263	#ifndef IN_GC /* Ring 0 & 3 only */
1264
1265	/**
1266	* Read from guest physical memory by GC physical address, bypassing
1267	* MMIO and access handlers.
1268	*
1269	* @returns VBox status.
1270	* @param pVM VM handle.
1271	* @param pvDst The destination address.
1272	* @param GCPhysSrc The source address (GC physical address).
1273	* @param cb The number of bytes to read.
1274	*/
1275	PGMDECL(int) PGMPhysReadGCPhys(PVM pVM, void *pvDst, RTGCPHYS GCPhysSrc, size_t cb)
1276	{
1277	/*
1278	* Anything to be done?
1279	*/
1280	if (!cb)
1281	return VINF_SUCCESS;
1282
1283	/*
1284	* Loop ram ranges.
1285	*/
1286	for (PPGMRAMRANGE pRam = CTXSUFF(pVM->pgm.s.pRamRanges);
1287	pRam;
1288	pRam = pRam->CTXSUFF(pNext))
1289	{
1290	RTGCPHYS off = GCPhysSrc - pRam->GCPhys;
1291	if (off < pRam->cb)
1292	{
1293	if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
1294	{
1295	/* Copy page by page as we're not dealing with a linear HC range. */
1296	for (;;)
1297	{
1298	/* convert */
1299	void *pvSrc;
1300	int rc = PGMRamGCPhys2HCPtr(pVM, pRam, GCPhysSrc, &pvSrc);
1301	if (VBOX_FAILURE(rc))
1302	return rc;
1303
1304	/* copy */
1305	size_t cbRead = PAGE_SIZE - ((RTGCUINTPTR)GCPhysSrc & PAGE_OFFSET_MASK);
1306	if (cbRead >= cb)
1307	{
1308	memcpy(pvDst, pvSrc, cb);
1309	return VINF_SUCCESS;
1310	}
1311	memcpy(pvDst, pvSrc, cbRead);
1312
1313	/* next */
1314	cb -= cbRead;
1315	pvDst = (uint8_t *)pvDst + cbRead;
1316	GCPhysSrc += cbRead;
1317	}
1318	}
1319	else if (pRam->pvHC)
1320	{
1321	/* read */
1322	size_t cbRead = pRam->cb - off;
1323	if (cbRead >= cb)
1324	{
1325	memcpy(pvDst, (uint8_t *)pRam->pvHC + off, cb);
1326	return VINF_SUCCESS;
1327	}
1328	memcpy(pvDst, (uint8_t *)pRam->pvHC + off, cbRead);
1329
1330	/* next */
1331	cb -= cbRead;
1332	pvDst = (uint8_t *)pvDst + cbRead;
1333	GCPhysSrc += cbRead;
1334	}
1335	else
1336	return VERR_PGM_PHYS_PAGE_RESERVED;
1337	}
1338	else if (GCPhysSrc < pRam->GCPhysLast)
1339	break;
1340	}
1341	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1342	}
1343
1344
1345	/**
1346	* Write to guest physical memory referenced by GC pointer.
1347	* Write memory to GC physical address in guest physical memory.
1348	*
1349	* This will bypass MMIO and access handlers.
1350	*
1351	* @returns VBox status.
1352	* @param pVM VM handle.
1353	* @param GCPhysDst The GC physical address of the destination.
1354	* @param pvSrc The source buffer.
1355	* @param cb The number of bytes to write.
1356	*/
1357	PGMDECL(int) PGMPhysWriteGCPhys(PVM pVM, RTGCPHYS GCPhysDst, const void *pvSrc, size_t cb)
1358	{
1359	/*
1360	* Anything to be done?
1361	*/
1362	if (!cb)
1363	return VINF_SUCCESS;
1364
1365	LogFlow(("PGMPhysWriteGCPhys: %VGp %d\n", GCPhysDst, cb));
1366
1367	/*
1368	* Loop ram ranges.
1369	*/
1370	for (PPGMRAMRANGE pRam = CTXSUFF(pVM->pgm.s.pRamRanges);
1371	pRam;
1372	pRam = pRam->CTXSUFF(pNext))
1373	{
1374	RTGCPHYS off = GCPhysDst - pRam->GCPhys;
1375	if (off < pRam->cb)
1376	{
1377	if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
1378	{
1379	/* Copy page by page as we're not dealing with a linear HC range. */
1380	for (;;)
1381	{
1382	/* convert */
1383	void *pvDst;
1384	int rc = PGMRamGCPhys2HCPtr(pVM, pRam, GCPhysDst, &pvDst);
1385	if (VBOX_FAILURE(rc))
1386	return rc;
1387
1388	/* copy */
1389	size_t cbWrite = PAGE_SIZE - ((RTGCUINTPTR)GCPhysDst & PAGE_OFFSET_MASK);
1390	if (cbWrite >= cb)
1391	{
1392	memcpy(pvDst, pvSrc, cb);
1393	return VINF_SUCCESS;
1394	}
1395	memcpy(pvDst, pvSrc, cbWrite);
1396
1397	/* next */
1398	cb -= cbWrite;
1399	pvSrc = (uint8_t *)pvSrc + cbWrite;
1400	GCPhysDst += cbWrite;
1401	}
1402	}
1403	else if (pRam->pvHC)
1404	{
1405	/* write */
1406	size_t cbWrite = pRam->cb - off;
1407	if (cbWrite >= cb)
1408	{
1409	memcpy((uint8_t *)pRam->pvHC + off, pvSrc, cb);
1410	return VINF_SUCCESS;
1411	}
1412	memcpy((uint8_t *)pRam->pvHC + off, pvSrc, cbWrite);
1413
1414	/* next */
1415	cb -= cbWrite;
1416	GCPhysDst += cbWrite;
1417	pvSrc = (uint8_t *)pvSrc + cbWrite;
1418	}
1419	else
1420	return VERR_PGM_PHYS_PAGE_RESERVED;
1421	}
1422	else if (GCPhysDst < pRam->GCPhysLast)
1423	break;
1424	}
1425	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1426	}
1427
1428
1429	/**
1430	* Read from guest physical memory referenced by GC pointer.
1431	*
1432	* This function uses the current CR3/CR0/CR4 of the guest and will
1433	* bypass access handlers and not set any accessed bits.
1434	*
1435	* @returns VBox status.
1436	* @param pVM VM handle.
1437	* @param pvDst The destination address.
1438	* @param GCPtrSrc The source address (GC pointer).
1439	* @param cb The number of bytes to read.
1440	*/
1441	PGMDECL(int) PGMPhysReadGCPtr(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb)
1442	{
1443	/*
1444	* Anything to do?
1445	*/
1446	if (!cb)
1447	return VINF_SUCCESS;
1448
1449	/*
1450	* Optimize reads within a single page.
1451	*/
1452	if (((RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK) + cb <= PAGE_SIZE)
1453	{
1454	void *pvSrc;
1455	int rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrSrc, &pvSrc);
1456	if (VBOX_FAILURE(rc))
1457	return rc;
1458	memcpy(pvDst, pvSrc, cb);
1459	return VINF_SUCCESS;
1460	}
1461
1462	/*
1463	* Page by page.
1464	*/
1465	for (;;)
1466	{
1467	/* convert */
1468	void *pvSrc;
1469	int rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrSrc, &pvSrc);
1470	if (VBOX_FAILURE(rc))
1471	return rc;
1472
1473	/* copy */
1474	size_t cbRead = PAGE_SIZE - ((RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK);
1475	if (cbRead >= cb)
1476	{
1477	memcpy(pvDst, pvSrc, cb);
1478	return VINF_SUCCESS;
1479	}
1480	memcpy(pvDst, pvSrc, cbRead);
1481
1482	/* next */
1483	cb -= cbRead;
1484	pvDst = (uint8_t *)pvDst + cbRead;
1485	GCPtrSrc += cbRead;
1486	}
1487	}
1488
1489
1490	/**
1491	* Write to guest physical memory referenced by GC pointer.
1492	*
1493	* This function uses the current CR3/CR0/CR4 of the guest and will
1494	* bypass access handlers and not set dirty or accessed bits.
1495	*
1496	* @returns VBox status.
1497	* @param pVM VM handle.
1498	* @param GCPtrDst The destination address (GC pointer).
1499	* @param pvSrc The source address.
1500	* @param cb The number of bytes to write.
1501	*/
1502	PGMDECL(int) PGMPhysWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
1503	{
1504	/*
1505	* Anything to do?
1506	*/
1507	if (!cb)
1508	return VINF_SUCCESS;
1509
1510	LogFlow(("PGMPhysWriteGCPtr: %VGv %d\n", GCPtrDst, cb));
1511
1512	/*
1513	* Optimize writes within a single page.
1514	*/
1515	if (((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK) + cb <= PAGE_SIZE)
1516	{
1517	void *pvDst;
1518	int rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrDst, &pvDst);
1519	if (VBOX_FAILURE(rc))
1520	return rc;
1521	memcpy(pvDst, pvSrc, cb);
1522	return VINF_SUCCESS;
1523	}
1524
1525	/*
1526	* Page by page.
1527	*/
1528	for (;;)
1529	{
1530	/* convert */
1531	void *pvDst;
1532	int rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrDst, &pvDst);
1533	if (VBOX_FAILURE(rc))
1534	return rc;
1535
1536	/* copy */
1537	size_t cbWrite = PAGE_SIZE - ((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK);
1538	if (cbWrite >= cb)
1539	{
1540	memcpy(pvDst, pvSrc, cb);
1541	return VINF_SUCCESS;
1542	}
1543	memcpy(pvDst, pvSrc, cbWrite);
1544
1545	/* next */
1546	cb -= cbWrite;
1547	pvSrc = (uint8_t *)pvSrc + cbWrite;
1548	GCPtrDst += cbWrite;
1549	}
1550	}
1551
1552
1553	/**
1554	* Write to guest physical memory referenced by GC pointer and update the PTE.
1555	*
1556	* This function uses the current CR3/CR0/CR4 of the guest and will
1557	* bypass access handlers and set any dirty and accessed bits in the PTE.
1558	*
1559	* If you don't want to set the dirty bit, use PGMPhysWriteGCPtr().
1560	*
1561	* @returns VBox status.
1562	* @param pVM VM handle.
1563	* @param GCPtrDst The destination address (GC pointer).
1564	* @param pvSrc The source address.
1565	* @param cb The number of bytes to write.
1566	*/
1567	PGMDECL(int) PGMPhysWriteGCPtrDirty(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
1568	{
1569	/*
1570	* Anything to do?
1571	*/
1572	if (!cb)
1573	return VINF_SUCCESS;
1574
1575	/*
1576	* Optimize writes within a single page.
1577	*/
1578	if (((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK) + cb <= PAGE_SIZE)
1579	{
1580	void *pvDst;
1581	int rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrDst, &pvDst);
1582	if (VBOX_FAILURE(rc))
1583	return rc;
1584	memcpy(pvDst, pvSrc, cb);
1585	rc = PGMGstModifyPage(pVM, GCPtrDst, cb, X86_PTE_A \| X86_PTE_D, ~(uint64_t)(X86_PTE_A \| X86_PTE_D));
1586	AssertRC(rc);
1587	return VINF_SUCCESS;
1588	}
1589
1590	/*
1591	* Page by page.
1592	*/
1593	for (;;)
1594	{
1595	/* convert */
1596	void *pvDst;
1597	int rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrDst, &pvDst);
1598	if (VBOX_FAILURE(rc))
1599	return rc;
1600
1601	/* mark the guest page as accessed and dirty. */
1602	rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A \| X86_PTE_D, ~(uint64_t)(X86_PTE_A \| X86_PTE_D));
1603	AssertRC(rc);
1604
1605	/* copy */
1606	size_t cbWrite = PAGE_SIZE - ((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK);
1607	if (cbWrite >= cb)
1608	{
1609	memcpy(pvDst, pvSrc, cb);
1610	return VINF_SUCCESS;
1611	}
1612	memcpy(pvDst, pvSrc, cbWrite);
1613
1614	/* next */
1615	cb -= cbWrite;
1616	GCPtrDst += cbWrite;
1617	pvSrc = (char *)pvSrc + cbWrite;
1618	}
1619	}
1620
1621	#endif /* !IN_GC */
1622
1623
1624
1625	/**
1626	* Performs a read of guest virtual memory for instruction emulation.
1627	*
1628	* This will check permissions, raise exceptions and update the access bits.
1629	*
1630	* The current implementation will bypass all access handlers. It may later be
1631	* changed to at least respect MMIO.
1632	*
1633	*
1634	* @returns VBox status code suitable to scheduling.
1635	* @retval VINF_SUCCESS if the read was performed successfully.
1636	* @retval VINF_EM_RAW_GUEST_TRAP if an exception was raised but not dispatched yet.
1637	* @retval VINF_TRPM_XCPT_DISPATCHED if an exception was raised and dispatched.
1638	*
1639	* @param pVM The VM handle.
1640	* @param pCtxCore The context core.
1641	* @param pvDst Where to put the bytes we've read.
1642	* @param GCPtrSrc The source address.
1643	* @param cb The number of bytes to read. Not more than a page.
1644	*
1645	* @remark This function will dynamically map physical pages in GC. This may unmap
1646	* mappings done by the caller. Be careful!
1647	*/
1648	PGMDECL(int) PGMPhysInterpretedRead(PVM pVM, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCUINTPTR GCPtrSrc, size_t cb)
1649	{
1650	Assert(cb <= PAGE_SIZE);
1651
1652	/** @todo r=bird: This isn't perfect!
1653	* -# It's not checking for reserved bits being 1.
1654	* -# It's not correctly dealing with the access bit.
1655	* -# It's not respecting MMIO memory or any other access handlers.
1656	*/
1657	/*
1658	* 1. Translate virtual to physical. This may fault.
1659	* 2. Map the physical address.
1660	* 3. Do the read operation.
1661	* 4. Set access bits if required.
1662	*/
1663	int rc;
1664	unsigned cb1 = PAGE_SIZE - (GCPtrSrc & PAGE_OFFSET_MASK);
1665	if (cb <= cb1)
1666	{
1667	/*
1668	* Not crossing pages.
1669	*/
1670	RTGCPHYS GCPhys;
1671	uint64_t fFlags;
1672	rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc, &fFlags, &GCPhys);
1673	if (VBOX_SUCCESS(rc))
1674	{
1675	/** @todo we should check reserved bits ... */
1676	void *pvSrc;
1677	rc = PGM_GCPHYS_2_PTR(pVM, GCPhys, &pvSrc);
1678	switch (rc)
1679	{
1680	case VINF_SUCCESS:
1681	Log(("PGMPhysInterpretedRead: pvDst=%p pvSrc=%p cb=%d\n", pvDst, (uint8_t *)pvSrc + (GCPtrSrc & PAGE_OFFSET_MASK), cb));
1682	memcpy(pvDst, (uint8_t *)pvSrc + (GCPtrSrc & PAGE_OFFSET_MASK), cb);
1683	break;
1684	case VERR_PGM_PHYS_PAGE_RESERVED:
1685	case VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS:
1686	memset(pvDst, 0, cb);
1687	break;
1688	default:
1689	return rc;
1690	}
1691
1692	/** @todo access bit emulation isn't 100% correct. */
1693	if (!(fFlags & X86_PTE_A))
1694	{
1695	rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
1696	AssertRC(rc);
1697	}
1698	return VINF_SUCCESS;
1699	}
1700	}
1701	else
1702	{
1703	/*
1704	* Crosses pages.
1705	*/
1706	unsigned cb2 = cb - cb1;
1707	uint64_t fFlags1;
1708	RTGCPHYS GCPhys1;
1709	uint64_t fFlags2;
1710	RTGCPHYS GCPhys2;
1711	rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc, &fFlags1, &GCPhys1);
1712	if (VBOX_SUCCESS(rc))
1713	rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc + cb1, &fFlags2, &GCPhys2);
1714	if (VBOX_SUCCESS(rc))
1715	{
1716	/** @todo we should check reserved bits ... */
1717	AssertMsgFailed(("cb=%d cb1=%d cb2=%d GCPtrSrc=%VGv\n", cb, cb1, cb2, GCPtrSrc));
1718	void *pvSrc1;
1719	rc = PGM_GCPHYS_2_PTR(pVM, GCPhys1, &pvSrc1);
1720	switch (rc)
1721	{
1722	case VINF_SUCCESS:
1723	memcpy(pvDst, (uint8_t *)pvSrc1 + (GCPtrSrc & PAGE_OFFSET_MASK), cb1);
1724	break;
1725	case VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS:
1726	memset(pvDst, 0, cb1);
1727	break;
1728	default:
1729	return rc;
1730	}
1731
1732	void *pvSrc2;
1733	rc = PGM_GCPHYS_2_PTR(pVM, GCPhys2, &pvSrc2);
1734	switch (rc)
1735	{
1736	case VINF_SUCCESS:
1737	memcpy((uint8_t *)pvDst + cb2, pvSrc2, cb2);
1738	break;
1739	case VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS:
1740	memset((uint8_t *)pvDst + cb2, 0, cb2);
1741	break;
1742	default:
1743	return rc;
1744	}
1745
1746	if (!(fFlags1 & X86_PTE_A))
1747	{
1748	rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
1749	AssertRC(rc);
1750	}
1751	if (!(fFlags2 & X86_PTE_A))
1752	{
1753	rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrSrc + cb1, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
1754	AssertRC(rc);
1755	}
1756	return VINF_SUCCESS;
1757	}
1758	}
1759
1760	/*
1761	* Raise a #PF.
1762	*/
1763	uint32_t uErr;
1764
1765	/* Get the current privilege level. */
1766	uint32_t cpl = CPUMGetGuestCPL(pVM, pCtxCore);
1767	switch (rc)
1768	{
1769	case VINF_SUCCESS:
1770	uErr = (cpl >= 2) ? X86_TRAP_PF_RSVD \| X86_TRAP_PF_US : X86_TRAP_PF_RSVD;
1771	break;
1772
1773	case VERR_PAGE_NOT_PRESENT:
1774	case VERR_PAGE_TABLE_NOT_PRESENT:
1775	uErr = (cpl >= 2) ? X86_TRAP_PF_US : 0;
1776	break;
1777
1778	default:
1779	AssertMsgFailed(("rc=%Vrc GCPtrSrc=%VGv cb=%#x\n", rc, GCPtrSrc, cb));
1780	return rc;
1781	}
1782	Log(("PGMPhysInterpretedRead: GCPtrSrc=%VGv cb=%#x -> #PF(%#x)\n", GCPtrSrc, cb, uErr));
1783	return TRPMRaiseXcptErrCR2(pVM, pCtxCore, X86_XCPT_PF, uErr, GCPtrSrc);
1784	}
1785
1786	/// @todo PGMDECL(int) PGMPhysInterpretedWrite(PVM pVM, PCPUMCTXCORE pCtxCore, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
1787

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source: vbox/trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp@ 2018

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