PGMAllPhys.cpp@ 4679

Last change on this file since 4679 was 4679, checked in by vboxsync, 17 years ago
Corrected PGMPhysGCPtr2GCPhys to respect the page offset.
Property svn:eol-style set to `native` Property svn:keywords set to `Id`
File size: 76.6 KB

Line
1	/* $Id: PGMAllPhys.cpp 4679 2007-09-10 16:04:46Z vboxsync $ */
2	/** @file
3	* PGM - Page Manager and Monitor, Physical Memory Addressing.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 innotek GmbH
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License as published by the Free Software Foundation,
13	* in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14	* distribution. VirtualBox OSE is distributed in the hope that it will
15	* be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	/** @def PGM_IGNORE_RAM_FLAGS_RESERVED
19	* Don't respect the MM_RAM_FLAGS_RESERVED flag when converting to HC addresses.
20	*
21	* Since this flag is currently incorrectly kept set for ROM regions we will
22	* have to ignore it for now so we don't break stuff.
23	*
24	* @todo this has been fixed now I believe, remove this hack.
25	*/
26	#define PGM_IGNORE_RAM_FLAGS_RESERVED
27
28
29	/*******************************************************************************
30	* Header Files *
31	*******************************************************************************/
32	#define LOG_GROUP LOG_GROUP_PGM_PHYS
33	#include <VBox/pgm.h>
34	#include <VBox/trpm.h>
35	#include <VBox/vmm.h>
36	#include <VBox/iom.h>
37	#include "PGMInternal.h"
38	#include <VBox/vm.h>
39	#include <VBox/param.h>
40	#include <VBox/err.h>
41	#include <iprt/assert.h>
42	#include <iprt/string.h>
43	#include <iprt/asm.h>
44	#include <VBox/log.h>
45	#ifdef IN_RING3
46	# include <iprt/thread.h>
47	#endif
48
49
50
51	/**
52	* Checks if Address Gate 20 is enabled or not.
53	*
54	* @returns true if enabled.
55	* @returns false if disabled.
56	* @param pVM VM handle.
57	*/
58	PGMDECL(bool) PGMPhysIsA20Enabled(PVM pVM)
59	{
60	LogFlow(("PGMPhysIsA20Enabled %d\n", pVM->pgm.s.fA20Enabled));
61	return !!pVM->pgm.s.fA20Enabled ; /* stupid MS compiler doesn't trust me. */
62	}
63
64
65	/**
66	* Validates a GC physical address.
67	*
68	* @returns true if valid.
69	* @returns false if invalid.
70	* @param pVM The VM handle.
71	* @param GCPhys The physical address to validate.
72	*/
73	PGMDECL(bool) PGMPhysIsGCPhysValid(PVM pVM, RTGCPHYS GCPhys)
74	{
75	PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhys);
76	return pPage != NULL;
77	}
78
79
80	/**
81	* Checks if a GC physical address is a normal page,
82	* i.e. not ROM, MMIO or reserved.
83	*
84	* @returns true if normal.
85	* @returns false if invalid, ROM, MMIO or reserved page.
86	* @param pVM The VM handle.
87	* @param GCPhys The physical address to check.
88	*/
89	PGMDECL(bool) PGMPhysIsGCPhysNormal(PVM pVM, RTGCPHYS GCPhys)
90	{
91	PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhys);
92	return pPage
93	&& !(pPage->HCPhys & (MM_RAM_FLAGS_MMIO \| MM_RAM_FLAGS_ROM \| MM_RAM_FLAGS_RESERVED \| MM_RAM_FLAGS_MMIO2));
94	}
95
96
97	/**
98	* Converts a GC physical address to a HC physical address.
99	*
100	* @returns VINF_SUCCESS on success.
101	* @returns VERR_PGM_PHYS_PAGE_RESERVED it it's a valid GC physical
102	* page but has no physical backing.
103	* @returns VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid
104	* GC physical address.
105	*
106	* @param pVM The VM handle.
107	* @param GCPhys The GC physical address to convert.
108	* @param pHCPhys Where to store the HC physical address on success.
109	*/
110	PGMDECL(int) PGMPhysGCPhys2HCPhys(PVM pVM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys)
111	{
112	PPGMPAGE pPage;
113	int rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhys, &pPage);
114	if (VBOX_FAILURE(rc))
115	return rc;
116
117	#ifndef PGM_IGNORE_RAM_FLAGS_RESERVED
118	if (RT_UNLIKELY(pPage->HCPhys & MM_RAM_FLAGS_RESERVED)) /** @todo PAGE FLAGS */
119	return VERR_PGM_PHYS_PAGE_RESERVED;
120	#endif
121
122	*pHCPhys = PGM_PAGE_GET_HCPHYS(pPage) \| (GCPhys & PAGE_OFFSET_MASK);
123	return VINF_SUCCESS;
124	}
125
126
127	#ifdef NEW_PHYS_CODE
128
129
130	/**
131	* Replace a zero or shared page with new page that we can write to.
132	*
133	* @returns VBox status.
134	* @todo Define the return values and propagate them up the call tree..
135	*
136	* @param pVM The VM address.
137	* @param pPage The physical page tracking structure.
138	* @param GCPhys The address of the page.
139	*
140	* @remarks Called from within the PGM critical section.
141	*/
142	int pgmPhysAllocPage(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys)
143	{
144	return VERR_NOT_IMPLEMENTED;
145	}
146
147
148	/**
149	* Deal with pages that are not writable, i.e. not in the ALLOCATED state.
150	*
151	* @returns VBox status code.
152	* @retval VINF_SUCCESS on success.
153	* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
154	*
155	* @param pVM The VM address.
156	* @param pPage The physical page tracking structure.
157	* @param GCPhys The address of the page.
158	*
159	* @remarks Called from within the PGM critical section.
160	*/
161	int pgmPhysPageMakeWritable(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys)
162	{
163	switch (pPage->u2State)
164	{
165	case PGM_PAGE_STATE_WRITE_MONITORED:
166	pPage->fWrittenTo = true;
167	pPage->u2State = PGM_PAGE_STATE_WRITE_ALLOCATED;
168	/* fall thru */
169	case PGM_PAGE_STATE_ALLOCATED:
170	return VINF_SUCCESS;
171
172	/*
173	* Zero pages can be dummy pages for MMIO or reserved memory,
174	* so we need to check the flags before joining cause with
175	* shared page replacement.
176	*/
177	case PGM_PAGE_STATE_ZERO:
178	if ( PGM_PAGE_IS_MMIO(pPage)
179	\|\| PGM_PAGE_IS_RESERVED(pPage))
180	return VERR_PGM_PHYS_PAGE_RESERVED;
181	/* fall thru */
182	case PGM_PAGE_STATE_SHARED:
183	return pgmPhysAllocPage(pVM, pPage, GCPhys);
184	}
185	}
186
187
188	#ifdef IN_RING3
189
190	/**
191	* Tree enumeration callback for dealing with age rollover.
192	* It will perform a simple compression of the current age.
193	*/
194	static DECLCALLBACK(int) pgmR3PhysChunkAgeingRolloverCallback(PAVLU32NODECORE pNode, void *pvUser)
195	{
196	/* ASSMES iNow = 4 */
197	PPGMCHUNKR3MAPPING pChunk = (PPGMCHUNKR3MAPPING)pNode;
198	if (pChunk->iAge >= UINT32_C(0xffffff00))
199	pChunk->iAge = 3;
200	else if (pChunk->iAge >= UINT32_C(0xfffff000))
201	pChunk->iAge = 2;
202	else if (pChunk->iAge)
203	pChunk->iAge = 1;
204	return 0;
205	}
206
207
208	/**
209	* Tree enumeration callback that updates the chunks that have
210	* been used since the last
211	*/
212	static DECLCALLBACK(int) pgmR3PhysChunkAgeingCallback(PAVLU32NODECORE pNode, void *pvUser)
213	{
214	PPGMCHUNKR3MAPPING pChunk = (PPGMCHUNKR3MAPPING)pNode;
215	if (!pChunk->iAge)
216	{
217	PVM pVM = (PVM)pvUser;
218	RTAvllU32Remove(&pVM->pgm.s.R3ChunkTlb.pAgeTree, pChunk->AgeCore.Key);
219	pChunk->AgeCore.Key = pChunk->iAge = pVM->pgm.s.R3ChunkTlb.iNow;
220	RTAvllU32Insert(&pVM->pgm.s.R3ChunkTlb.pAgeTree, &pChunk->AgeCore);
221	}
222
223	return 0;
224	}
225
226
227	/**
228	* Performs ageing of the ring-3 chunk mappings.
229	*
230	* @param pVM The VM handle.
231	*/
232	PGMR3DECL(void) PGMR3PhysChunkAgeing(PVM pVM)
233	{
234	pVM->pgm.s.R3ChunkMap.AgeingCountdown = RT_MIN(pVM->pgm.s.R3ChunkMap.cMax / 4, 1024);
235	pVM->pgm.s.R3ChunkMap.iNow++;
236	if (pVM->pgm.s.R3ChunkMap.iNow == 0)
237	{
238	pVM->pgm.s.R3ChunkMap.iNow = 20;
239	RTAvlU32DoWithAll(&pVM->pgm.s.R3ChunkMap.pTree, true /fFromLeft/, pgmR3PhysChunkAgeingRolloverCallback, NULL);
240	}
241	RTAvlU32DoWithAll(&pVM->pgm.s.R3ChunkMap.pTree, true /fFromLeft/, pgmR3PhysChunkAgeingCallback, pVM);
242	}
243
244
245	/**
246	* The structure passed in the pvUser argument of pgmR3PhysChunkUnmapCandidateCallback().
247	*/
248	typedef struct PGMR3PHYSCHUNKUNMAPCB
249	{
250	PVM pVM; /*< The VM handle. /
251	PPGMR3CHUNKMAP pChunk; /*< The chunk to unmap. /
252	} PGMR3PHYSCHUNKUNMAPCB, *PPGMR3PHYSCHUNKUNMAPCB;
253
254
255	/**
256	* Callback used to find the mapping that's been unused for
257	* the longest time.
258	*/
259	static DECLCALLBACK(int) pgmR3PhysChunkUnmapCandidateCallback(PAVLLU32NODECORE pNode, void *pvUser)
260	{
261	do
262	{
263	PPGMR3CHUNKMAP pChunk = (PPGMR3CHUNKMAP)((uint8_t *)pNode - RT_OFFSETOF(PGMR3CHUNKMAP, AgeCore));
264	if ( pChunk->iAge
265	&& !pChunk->cRefs)
266	{
267	/*
268	* Check that it's not in any of the TLBs.
269	*/
270	PVM pVM = ((PPGMR3PHYSCHUNKUNMAPCB)pvUser)->pVM;
271	for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.R3ChunkTlb->aEntries); i++)
272	if (pVM->pgm.s.R3ChunkTlb->aEntries[i].pChunk == pChunk)
273	{
274	pChunk = NULL;
275	break;
276	}
277	if (pChunk)
278	for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.CTXSUFF(PhysTlb)->aEntries); i++)
279	if (pVM->pgm.s.CTXSUFF(PhysTlb)->aEntries[i].pChunk == pChunk)
280	{
281	pChunk = NULL;
282	break;
283	}
284	if (pChunk)
285	{
286	((PPGMR3PHYSCHUNKUNMAPCB)pvUser)->pChunk = pChunk;
287	return 1; /* done */
288	}
289	}
290
291	/* next with the same age - this version of the AVL API doesn't enumerate the list, so we have to do it. */
292	pNode = pNode->pList;
293	} while (pNode);
294	return 0;
295	}
296
297
298	/**
299	* Finds a good candidate for unmapping when the ring-3 mapping cache is full.
300	*
301	* The candidate will not be part of any TLBs, so no need to flush
302	* anything afterwards.
303	*
304	* @returns Chunk id.
305	* @param pVM The VM handle.
306	*/
307	int pgmR3PhysChunkFindUnmapCandidate(PVM pVM)
308	{
309	/*
310	* Do tree ageing first?
311	*/
312	if (pVM->pgm.s.R3ChunkMap.AgeingCountdown-- == 0)
313	pgmR3PhysChunkAgeing(pVM);
314
315	/*
316	* Enumerate the age tree starting with the left most node.
317	*/
318	PGMR3PHYSCHUNKUNMAPCB Args;
319	Args.pVM = pVM;
320	Args.pChunk = NULL;
321	if (RTAvlU32DoWithAll(&pVM->pgm.s.R3ChunkMap.pAgeTree, true /fFromLeft/, pgmR3PhysChunkUnmapCandidateCallback, pVM))
322	return Args.pChunk->idChunk;
323	return INT32_MAX;
324	}
325
326
327	/**
328	* Maps the given chunk into the ring-3 mapping cache.
329	*
330	* This will call ring-0.
331	*
332	* @returns VBox status code.
333	* @param pVM The VM handle.
334	* @param idChunk The chunk in question.
335	* @param ppChunk Where to store the chunk tracking structure.
336	*
337	* @remarks Called from within the PGM critical section.
338	*/
339	int pgmR3PhysChunkMap(PVM pVM, uint32_t idChunk, PPPGMCHUNKR3MAPPING ppChunk)
340	{
341	/*
342	* Allocate a new tracking structure first.
343	*/
344	#if 0 /* for later when we've got a separate mapping method for ring-0. */
345	PPGMCHUNKR3MAPPING pChunk = (PPGMCHUNKR3MAPPING)MMR3HeapAlloc(pVM, MM_TAG_PGM_CHUNK_MAPPING, sizeof(*pChunk));
346	#else
347	PPGMCHUNKR3MAPPING pChunk = (PPGMCHUNKR3MAPPING)MMHyperAlloc(pVM, MM_TAG_PGM_CHUNK_MAPPING, sizeof(*pChunk));
348	#endif
349	AssertReturn(pChunk, VERR_NO_MEMORY);
350	pChunk->Core.Key = idChunk;
351	pChunk->pv = NULL;
352	pChunk->cRefs = 0;
353	pChunk->iAge = 0;
354
355	/*
356	* Request the ring-0 part to map the chunk in question and if
357	* necessary unmap another one to make space in the mapping cache.
358	*/
359	PGMMAPCHUNKREQ Req;
360	Req.pvR3 = NULL;
361	Req.idChunkMap = idChunck;
362	Req.idChunkUnmap = INT32_MAX;
363	if (pVM->pgm.R3ChunkMap.c >= pVM->pgm.R3ChunkMap.cMax)
364	Req.idChunkUnmap = pgmR3PhysChunkFindUnmapCandidate(pVM);
365	/** @todo SUPCallVMMR0Ex needs to support in+out or similar. */
366	int rc = SUPCallVMMR0Ex(pVM->pVMR0, VMMR0_DO_PGM_MAP_CHUNK, &Req, sizeof(Req));
367	if (VBOX_SUCCESS(rc))
368	{
369	/*
370	* Update the tree.
371	*/
372	/* insert the new one. */
373	AssertPtr(Req.pvR3);
374	pChunk->pv = Req.pvR3;
375	bool fRc = RTAvlU32Insert(&pVM->pgm.s.R3ChunkMap.Tree, &pChunk->Core);
376	AssertRelease(fRc);
377	pVM->pgm.s.R3ChunkMap.c++;
378
379	/* remove the unmapped one. */
380	if (Req.idChunkUnmap != INT32_MAX)
381	{
382	PPGMCHUNKR3MAPPING pUnmappedChunk = (PPGMCHUNKR3MAPPING)RTAvlU32Remove(&pVM->pgm.s.R3ChunkMap.Tree, Req.idChunkUnmap);
383	AssertRelease(pUnmappedChunk);
384	pUnmappedChunk->pv = NULL;
385	pUnmappedChunk->Key = INT32_MAX;
386	#if 0 /* for later when we've got a separate mapping method for ring-0. */
387	MMR3HeapFree(pUnmappedChunk);
388	#else
389	MMHyperFree(pVM, pUnmappedChunk);
390	#endif
391	pVM->pgm.R3ChunkMap.c--;
392	}
393	}
394	else
395	{
396	AssertRC(rc);
397	#if 0 /* for later when we've got a separate mapping method for ring-0. */
398	MMR3HeapFree(pChunk);
399	#else
400	MMHyperFree(pVM, pChunk);
401	#endif
402	pChunk = NULL;
403	}
404
405	*ppChunk = pChunk;
406	return rc;
407	}
408	#endif /* IN_RING3 */
409
410
411	/**
412	* Maps a page into the current virtual address space so it can be accessed.
413	*
414	* @returns VBox status code.
415	* @retval VINF_SUCCESS on success.
416	* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
417	*
418	* @param pVM The VM address.
419	* @param pPage The physical page tracking structure.
420	* @param GCPhys The address of the page.
421	* @param ppMap Where to store the address of the mapping tracking structure.
422	* @param ppv Where to store the mapping address of the page. The page
423	* offset is masked off!
424	*
425	* @remarks Called from within the PGM critical section.
426	*/
427	int pgmPhysPageMap(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, PPPGMPAGEMAP ppMap, void **ppv)
428	{
429	#ifdef IN_GC
430	/*
431	* Just some sketchy GC code.
432	*/
433	*ppMap = NULL;
434	RTHCPHYS HCPhys = pPage->HCPhys & PGM_HCPHYS_PAGE_MASK;
435	Assert(HCPhys != pVM->pgm.s.HCPhysZeroPg)
436	return PGMGCDynMapHCPage(pVM, HCPhys, ppv);
437
438	#else /* IN_RING3 \|\| IN_RING0 */
439
440	/**
441	* Calculates the index of a guest page in the Ring-3 Chunk TLB.
442	* @returns Chunk TLB index.
443	* @param idChunk The Chunk ID.
444	*/
445	#define PGM_R3CHUNKTLB_IDX(idChunk) ( (idChunk) & (PGM_R3CHUNKTLB_ENTRIES - 1) )
446
447	/*
448	* Find/make Chunk TLB entry for the mapping chunk.
449	*/
450	PPGMR3CHUNK pChunk;
451	const uint32_t idChunk = PGM_PAGE_GET_PAGEID(pPage) >> XXX_CHUNKID_SHIFT;
452	PGMR3CHUNKTLBE pTlbe = &pVM->pgm.s.R3ChunkTlb.aEntries[PGM_R3CHUNKTLB_IDX(idChunk)];
453	if (pTlbe->idChunk == idChunk)
454	{
455	STAM_COUNTER_INC(&pVM->pgm.s.StatR3ChunkTlbHits);
456	pChunk = pTlbe->pChunk;
457	}
458	else
459	{
460	STAM_COUNTER_INC(&pVM->pgm.s.StatR3ChunkTlbMisses);
461
462	/*
463	* Find the chunk, map it if necessary.
464	*/
465	pChunk = (PPGMR3CHUNK)RTAvlU32Get(&pVM->pgm.s.R3ChunkMap.Tree, idChunk);
466	if (!pChunk)
467	{
468	#ifdef IN_RING0
469	int rc = VMMR0CallHost(pVM, VMMCALLHOST_PGM_MAP_CHUNK, idChunk);
470	AssertRCReturn(rc, rc);
471	pChunk = (PPGMR3CHUNK)RTAvlU32Get(&pVM->pgm.s.R3ChunkMap.Tree, idChunk);
472	Assert(pChunk);
473	#else
474	int rc = pgmR3PhysChunkMap(pVM, idChunk, &pChunk);
475	if (VBOX_FAILURE(rc))
476	return rc;
477	#endif
478	}
479
480	/*
481	* Enter it into the Chunk TLB.
482	*/
483	pTlbe->idChunk = idChunk;
484	pTlbe->pChunk = pChunk;
485	pChunk->iAge = 0;
486	}
487
488	ppv = (uint8_t )pMap->pv + (iPage << PAGE_SHIFT);
489	*ppMap = pChunk;
490	return VINF_SUCCESS;
491	#endif /* IN_RING3 */
492	}
493
494
495	/**
496	* Calculates the index of a guest page in the Physical TLB.
497	* @returns Physical TLB index.
498	* @param GCPhys The guest physical address.
499	*/
500	#define PGM_R3PHYSTLB_IDX(GCPhys) ( ((GCPhys) >> PAGE_SHIFT) & (PGM_R3PHYSTLB_ENTRIES - 1) )
501
502	#if defined(IN_RING3) \|\| defined(IN_RING0)
503	# define PGM_PHYSTLB_IDX(GCPhys) PGM_R3PHYSTLB_IDX(GCPhys)
504	# define PGMPHYSTLBE PGMR3PHYSTLBE
505	#else /* IN_GC */
506	# define PGM_PHYSTLB_IDX(GCPhys) PGM_GCPHYSTLB_IDX(GCPhys)
507	# define PGMPHYSTLBE PGMGCPHYSTLBE
508	#endif
509
510
511	/**
512	* Load a guest page into the ring-3 physical TLB.
513	*
514	* @returns VBox status code.
515	* @retval VINF_SUCCESS on success
516	* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
517	* @param pPGM The PGM instance pointer.
518	* @param GCPhys The guest physical address in question.
519	*/
520	int pgmPhysPageLoadIntoTlb(PPGM pPGM, RTGCPHYS GCPhys)
521	{
522	STAM_COUNTER_INC(&pPGM->StatR3PhysTlbMisses);
523
524	/*
525	* Find the ram range.
526	* 99.8% of requests are expected to be in the first range.
527	*/
528	PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
529	RTGCPHYS off = GCPhys - pRam->GCPhys;
530	if (RT_UNLIKELY(off >= pRam->cb))
531	{
532	do
533	{
534	pRam = CTXSUFF(pRam->pNext);
535	if (!pRam)
536	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
537	off = GCPhys - pRam->GCPhys;
538	} while (off >= pRam->cb);
539	}
540
541	/*
542	* Map the page.
543	* Make a special case for the zero page as it is kind of special.
544	*/
545	PPGMPAGE pPage = &pRam->aPages[off >> PAGE_SHIFT];
546	PPGMR3PHYSTLBE pTlbe = &pPGM->CTXSUFF(PhysTlb).aEntries[PGM_PHYSTLB_IDX(GCPhys)];
547	if (PGM_PAGE_GET_STATE(pPage) != PGM_PAGE_STATE_ZERO)
548	{
549	void *pv;
550	PPGMPAGEMAP pMap;
551	int rc = pgmPhysPageMap(pVM, pPage, GCPhys, &pMap, &pv);
552	if (VBOX_FAILURE(rc))
553	return rc;
554	pTlbe->pMap = pMap;
555	pTlbe->pv = pv;
556	}
557	else
558	{
559	Assert(PGM_PAGE_GET_HCPHYS(pPage) == pPGM->HCPhysZeroPg);
560	pTlbe->pMap = NULL;
561	pTlbe->pv = pPGM->pvZeroPgR3;
562	}
563	pTlbe->pPage = pPage;
564	return VINF_SUCCESS;
565	}
566
567
568	/**
569	* Queries the Physical TLB entry for a physical guest page,
570	* attemting to load the TLB entry if necessary.
571	*
572	* @returns VBox status code.
573	* @retval VINF_SUCCESS on success
574	* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
575	* @param pPgm The PGM instance handle.
576	* @param GCPhys The address of the guest page.
577	* @param ppTlbe Where to store the pointer to the TLB entry.
578	*/
579	DECLINLINE(int) pgmPhysPageQueryTlbe(PPGM pPgm, RTGCPHYS GCPhys, PPPGMPHYSTLBE ppTlbe)
580	{
581	int rc;
582	PGMPHYSTLBE pTlbe = &pPgm->CTXSUFF(PhysTlb).aEntries[PGM_PHYSTLB_IDX(GCPhys)];
583	if (pTlbe->GCPhys == (GCPhys & X86_PTE_PAE_PG_MASK))
584	{
585	STAM_COUNTER_INC(&pPgm->StatR3PhysTlbHits);
586	rc = VINF_SUCCESS;
587	}
588	else
589	rc = pgmPhysPageLoadIntoTlb(pVM, GCPhys);
590	*ppTlbe = pTlbe;
591	return rc;
592	}
593
594
595	#endif /* NEW_PHYS_CODE */
596
597
598	/**
599	* Requests the mapping of a guest page into the current context.
600	*
601	* This API should only be used for very short term, as it will consume
602	* scarse resources (R0 and GC) in the mapping cache. When you're done
603	* with the page, call PGMPhysGCPhys2CCPtrRelease() ASAP to release it.
604	*
605	* @returns VBox status code.
606	* @retval VINF_SUCCESS on success.
607	* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
608	* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
609	*
610	* @param pVM The VM handle.
611	* @param GCPhys The guest physical address of the page that should be mapped.
612	* @param ppv Where to store the address corresponding to GCPhys.
613	*
614	* @remark Avoid calling this API from within critical sections (other than
615	* the PGM one) because of the deadlock risk.
616	*/
617	PGMDECL(int) PGMPhysGCPhys2CCPtr(PVM pVM, RTGCPHYS GCPhys, void **ppv)
618	{
619	# ifdef NEW_PHYS_CODE
620	int rc = pgmLock(pVM);
621	AssertRCReturn(rc);
622
623	#ifdef IN_GC
624	/* Until a physical TLB is implemented for GC, let PGMGCDynMapGCPageEx handle it. */
625	return PGMGCDynMapGCPageEx(pVM, GCPhys, ppv);
626
627	#else
628	/*
629	* Query the Physical TLB entry for the page (may fail).
630	*/
631	PGMPHYSTLBE pTlbe;
632	int rc = pgmPhysPageQueryTlbe(&pVM->pgm.s, GCPhys, &pTlbe);
633	if (RT_SUCCESS(rc))
634	{
635	/*
636	* If the page is shared, the zero page, or being write monitored
637	* it must be converted to an page that's writable if possible.
638	*/
639	PPGMPAGE pPage = pTlbe->pPage;
640	if (RT_UNLIKELY(pPage->u2State != PGM_PAGE_STATE_ALLOCATED))
641	rc = pgmPhysPageMakeWritable(pVM, pPage, GCPhys);
642	if (RT_SUCCESS(rc))
643	{
644	/*
645	* Now, just perform the locking and calculate the return address.
646	*/
647	PPGMPAGEMAP pMap = pTlbe->pMap;
648	pMap->cRefs++;
649	if (RT_LIKELY(pPage->cLocks != PGM_PAGE_MAX_LOCKS))
650	if (RT_UNLIKELY(++pPage->cLocks == PGM_PAGE_MAX_LOCKS))
651	{
652	AssertMsgFailed(("%VGp is entering permanent locked state!\n", GCPhys));
653	pMap->cRefs++; /* Extra ref to prevent it from going away. */
654	}
655
656	ppv = (void )((uintptr_t)pTlbe->pv \| (GCPhys & PAGE_OFFSET_MASK));
657	}
658	}
659
660	pgmUnlock(pVM);
661	return rc;
662
663	#endif /* IN_RING3 \|\| IN_RING0 */
664
665	#else
666	/*
667	* Temporary fallback code.
668	*/
669	# ifdef IN_GC
670	return PGMGCDynMapGCPageEx(pVM, GCPhys, ppv);
671	# else
672	return PGMPhysGCPhys2HCPtr(pVM, GCPhys, 1, ppv);
673	# endif
674	#endif
675	}
676
677
678	/**
679	* Release the mapping of a guest page.
680	*
681	* This is the counterpart to the PGMPhysGCPhys2CCPtr.
682	*
683	* @param pVM The VM handle.
684	* @param GCPhys The address that was mapped using PGMPhysGCPhys2CCPtr.
685	* @param pv The address that PGMPhysGCPhys2CCPtr returned.
686	*/
687	PGMDECL(void) PGMPhysGCPhys2CCPtrRelease(PVM pVM, RTGCPHYS GCPhys, void *pv)
688	{
689	#ifdef NEW_PHYS_CODE
690	#ifdef IN_GC
691	/* currently nothing to do here. */
692	/* --- postponed
693	#elif defined(IN_RING0)
694	*/
695
696	#else /* IN_RING3 */
697	pgmLock(pVM);
698
699	/*
700	* Try the Physical TLB cache.
701	* There's a high likely hood that this will work out since it's a short-term lock.
702	*/
703	PPGMR3PHYSTLBE pTlbe = &pVM->pgm.s.R3PhysTlb.aEntries[PGM_R3PHYSTLB_IDX(GCPhys)];
704	if (RT_LIKELY(pTlbe->GCPhys == (GCPhys & X86_PTE_PAE_PG_MASK)))
705	{
706	PPGMPAGE pPage = pTlbe->pPage;
707	Assert(PGM_PAGE_IS_NORMAL(pPage));
708	Assert(pPage->cLocks >= 1);
709	if (pPage->cLocks != PGM_PAGE_MAX_LOCKS)
710	pPage->cLocks--;
711
712	PPGMR3CHUNK pChunk = pTlbe->pChunk;
713	Assert(pChunk->cRefs >= 1);
714	pChunk->cRefs--;
715	pChunk->iAge = 0;
716	}
717	else
718	{
719	/*
720	* Find the page and unlock it.
721	*/
722	PPGMRAMRANGE pRam = CTXSUFF(pVM->pgm.s.pRamRanges);
723	RTGCPHYS off = GCPhys - pRam->GCPhys;
724	if (RT_UNLIKELY(off >= pRam->cb))
725	{
726	do
727	{
728	pRam = CTXSUFF(pRam->pNext);
729	AssertMsgRelease(pRam, ("GCPhys=%RGp\n", GCPhys));
730	off = GCPhys - pRam->GCPhys;
731	} while (off >= pRam->cb);
732	}
733	PPGMPAGE pPage = &pRam->aPages[off >> PAGE_SHIFT];
734	Assert(PGM_PAGE_IS_NORMAL(pTlbe->pPage));
735	Assert(pPage->cLocks >= 1);
736	if (pPage->cLocks != PGM_PAGE_MAX_LOCKS)
737	pPage->cLocks--;
738
739	/*
740	* Now find the chunk mapping and unlock it.
741	*/
742	PPGMR3CHUNK pChunk;
743	const uint32_t idChunk = PGM_PAGE_GET_PAGEID(pPage) >> XXX_CHUNKID_SHIFT;
744	PGMR3CHUNKTLBE pTlbe = &pVM->pgm.s.R3ChunkTlb.aEntries[PGM_R3CHUNKTLB_IDX(idChunk)];
745	if (pTlbe->idChunk == idChunk)
746	pChunk = pTlbe->pChunk;
747	else
748	{
749	pChunk = (PPGMR3CHUNK)RTAvlU32Get(&pVM->pgm.s.R3ChunkMap.Tree, idChunk);
750	AssertMsgRelease(pChunk, ("GCPhys=%RGp\n", GCPhys));
751	pChunk->iAge = 0;
752	}
753	Assert(pChunk->cRefs >= 1);
754	pChunk->cRefs--;
755	}
756
757	pgmUnlock(pVM);
758	#endif /* IN_RING3 */
759	#else
760	NOREF(pVM);
761	NOREF(GCPhys);
762	NOREF(pv);
763	#endif
764	}
765
766
767	/**
768	* Converts a GC physical address to a HC pointer.
769	*
770	* @returns VINF_SUCCESS on success.
771	* @returns VERR_PGM_PHYS_PAGE_RESERVED it it's a valid GC physical
772	* page but has no physical backing.
773	* @returns VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid
774	* GC physical address.
775	* @returns VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY if the range crosses
776	* a dynamic ram chunk boundary
777	* @param pVM The VM handle.
778	* @param GCPhys The GC physical address to convert.
779	* @param cbRange Physical range
780	* @param pHCPtr Where to store the HC pointer on success.
781	*/
782	PGMDECL(int) PGMPhysGCPhys2HCPtr(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR pHCPtr)
783	{
784	#ifdef PGM_DYNAMIC_RAM_ALLOC
785	if ((GCPhys & PGM_DYNAMIC_CHUNK_BASE_MASK) != ((GCPhys+cbRange-1) & PGM_DYNAMIC_CHUNK_BASE_MASK))
786	{
787	AssertMsgFailed(("%VGp - %VGp crosses a chunk boundary!!\n", GCPhys, GCPhys+cbRange));
788	LogRel(("PGMPhysGCPhys2HCPtr %VGp - %VGp crosses a chunk boundary!!\n", GCPhys, GCPhys+cbRange));
789	return VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY;
790	}
791	#endif
792
793	PPGMRAMRANGE pRam;
794	PPGMPAGE pPage;
795	int rc = pgmPhysGetPageAndRangeEx(&pVM->pgm.s, GCPhys, &pPage, &pRam);
796	if (VBOX_FAILURE(rc))
797	return rc;
798
799	#ifndef PGM_IGNORE_RAM_FLAGS_RESERVED
800	if (RT_UNLIKELY(PGM_PAGE_IS_RESERVED(pPage)))
801	return VERR_PGM_PHYS_PAGE_RESERVED;
802	#endif
803
804	RTGCPHYS off = GCPhys - pRam->GCPhys;
805	if (RT_UNLIKELY(off + cbRange > pRam->cb))
806	{
807	AssertMsgFailed(("%VGp - %VGp crosses a chunk boundary!!\n", GCPhys, GCPhys + cbRange));
808	return VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY;
809	}
810
811	if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
812	{
813	unsigned iChunk = (off >> PGM_DYNAMIC_CHUNK_SHIFT);
814	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[iChunk] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
815	}
816	else if (RT_LIKELY(pRam->pvHC))
817	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
818	else
819	return VERR_PGM_PHYS_PAGE_RESERVED;
820	return VINF_SUCCESS;
821	}
822
823
824	/**
825	* Converts a guest pointer to a GC physical address.
826	*
827	* This uses the current CR3/CR0/CR4 of the guest.
828	*
829	* @returns VBox status code.
830	* @param pVM The VM Handle
831	* @param GCPtr The guest pointer to convert.
832	* @param pGCPhys Where to store the GC physical address.
833	*/
834	PGMDECL(int) PGMPhysGCPtr2GCPhys(PVM pVM, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
835	{
836	int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, pGCPhys);
837	if (pGCPhys && VBOX_SUCCESS(rc))
838	*pGCPhys \|= (RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK;
839	return rc;
840	}
841
842
843	/**
844	* Converts a guest pointer to a HC physical address.
845	*
846	* This uses the current CR3/CR0/CR4 of the guest.
847	*
848	* @returns VBox status code.
849	* @param pVM The VM Handle
850	* @param GCPtr The guest pointer to convert.
851	* @param pHCPhys Where to store the HC physical address.
852	*/
853	PGMDECL(int) PGMPhysGCPtr2HCPhys(PVM pVM, RTGCPTR GCPtr, PRTHCPHYS pHCPhys)
854	{
855	RTGCPHYS GCPhys;
856	int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, &GCPhys);
857	if (VBOX_SUCCESS(rc))
858	rc = PGMPhysGCPhys2HCPhys(pVM, GCPhys \| ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), pHCPhys);
859	return rc;
860	}
861
862
863	/**
864	* Converts a guest pointer to a HC pointer.
865	*
866	* This uses the current CR3/CR0/CR4 of the guest.
867	*
868	* @returns VBox status code.
869	* @param pVM The VM Handle
870	* @param GCPtr The guest pointer to convert.
871	* @param pHCPtr Where to store the HC virtual address.
872	*/
873	PGMDECL(int) PGMPhysGCPtr2HCPtr(PVM pVM, RTGCPTR GCPtr, PRTHCPTR pHCPtr)
874	{
875	RTGCPHYS GCPhys;
876	int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, &GCPhys);
877	if (VBOX_SUCCESS(rc))
878	rc = PGMPhysGCPhys2HCPtr(pVM, GCPhys \| ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), 1 /* we always stay within one page */, pHCPtr);
879	return rc;
880	}
881
882
883	/**
884	* Converts a guest virtual address to a HC pointer by specfied CR3 and flags.
885	*
886	* @returns VBox status code.
887	* @param pVM The VM Handle
888	* @param GCPtr The guest pointer to convert.
889	* @param cr3 The guest CR3.
890	* @param fFlags Flags used for interpreting the PD correctly: X86_CR4_PSE and X86_CR4_PAE
891	* @param pHCPtr Where to store the HC pointer.
892	*
893	* @remark This function is used by the REM at a time where PGM could
894	* potentially not be in sync. It could also be used by a
895	* future DBGF API to cpu state independent conversions.
896	*/
897	PGMDECL(int) PGMPhysGCPtr2HCPtrByGstCR3(PVM pVM, RTGCPTR GCPtr, uint32_t cr3, unsigned fFlags, PRTHCPTR pHCPtr)
898	{
899	/*
900	* PAE or 32-bit?
901	*/
902	int rc;
903	if (!(fFlags & X86_CR4_PAE))
904	{
905	PX86PD pPD;
906	rc = PGM_GCPHYS_2_PTR(pVM, cr3 & X86_CR3_PAGE_MASK, &pPD);
907	if (VBOX_SUCCESS(rc))
908	{
909	VBOXPDE Pde = pPD->a[(RTGCUINTPTR)GCPtr >> X86_PD_SHIFT];
910	if (Pde.n.u1Present)
911	{
912	if ((fFlags & X86_CR4_PSE) && Pde.b.u1Size)
913	{ /* (big page) */
914	rc = PGMPhysGCPhys2HCPtr(pVM, (Pde.u & X86_PDE4M_PG_MASK) \| ((RTGCUINTPTR)GCPtr & X86_PAGE_4M_OFFSET_MASK), 1 /* we always stay within one page */, pHCPtr);
915	}
916	else
917	{ /* (normal page) */
918	PVBOXPT pPT;
919	rc = PGM_GCPHYS_2_PTR(pVM, Pde.u & X86_PDE_PG_MASK, &pPT);
920	if (VBOX_SUCCESS(rc))
921	{
922	VBOXPTE Pte = pPT->a[((RTGCUINTPTR)GCPtr >> X86_PT_SHIFT) & X86_PT_MASK];
923	if (Pte.n.u1Present)
924	return PGMPhysGCPhys2HCPtr(pVM, (Pte.u & X86_PTE_PG_MASK) \| ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), 1 /* we always stay within one page */, pHCPtr);
925	rc = VERR_PAGE_NOT_PRESENT;
926	}
927	}
928	}
929	else
930	rc = VERR_PAGE_TABLE_NOT_PRESENT;
931	}
932	}
933	else
934	{
935	/** @todo long mode! */
936	PX86PDPTR pPdptr;
937	rc = PGM_GCPHYS_2_PTR(pVM, cr3 & X86_CR3_PAE_PAGE_MASK, &pPdptr);
938	if (VBOX_SUCCESS(rc))
939	{
940	X86PDPE Pdpe = pPdptr->a[((RTGCUINTPTR)GCPtr >> X86_PDPTR_SHIFT) & X86_PDPTR_MASK];
941	if (Pdpe.n.u1Present)
942	{
943	PX86PDPAE pPD;
944	rc = PGM_GCPHYS_2_PTR(pVM, Pdpe.u & X86_PDPE_PG_MASK, &pPD);
945	if (VBOX_SUCCESS(rc))
946	{
947	X86PDEPAE Pde = pPD->a[((RTGCUINTPTR)GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK];
948	if (Pde.n.u1Present)
949	{
950	if ((fFlags & X86_CR4_PSE) && Pde.b.u1Size)
951	{ /* (big page) */
952	rc = PGMPhysGCPhys2HCPtr(pVM, (Pde.u & X86_PDE4M_PAE_PG_MASK) \| ((RTGCUINTPTR)GCPtr & X86_PAGE_4M_OFFSET_MASK), 1 /* we always stay within one page */, pHCPtr);
953	}
954	else
955	{ /* (normal page) */
956	PX86PTPAE pPT;
957	rc = PGM_GCPHYS_2_PTR(pVM, (Pde.u & X86_PDE_PAE_PG_MASK), &pPT);
958	if (VBOX_SUCCESS(rc))
959	{
960	X86PTEPAE Pte = pPT->a[((RTGCUINTPTR)GCPtr >> X86_PT_PAE_SHIFT) & X86_PT_PAE_MASK];
961	if (Pte.n.u1Present)
962	return PGMPhysGCPhys2HCPtr(pVM, (Pte.u & X86_PTE_PAE_PG_MASK) \| ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), 1 /* we always stay within one page */, pHCPtr);
963	rc = VERR_PAGE_NOT_PRESENT;
964	}
965	}
966	}
967	else
968	rc = VERR_PAGE_TABLE_NOT_PRESENT;
969	}
970	}
971	else
972	rc = VERR_PAGE_TABLE_NOT_PRESENT;
973	}
974	}
975	return rc;
976	}
977
978
979	#undef LOG_GROUP
980	#define LOG_GROUP LOG_GROUP_PGM_PHYS_ACCESS
981
982
983	#ifdef IN_RING3
984	/**
985	* Cache PGMPhys memory access
986	*
987	* @param pVM VM Handle.
988	* @param pCache Cache structure pointer
989	* @param GCPhys GC physical address
990	* @param pbHC HC pointer corresponding to physical page
991	*
992	* @thread EMT.
993	*/
994	static void pgmPhysCacheAdd(PVM pVM, PGMPHYSCACHE pCache, RTGCPHYS GCPhys, uint8_t pbHC)
995	{
996	uint32_t iCacheIndex;
997
998	GCPhys = PAGE_ADDRESS(GCPhys);
999	pbHC = (uint8_t *)PAGE_ADDRESS(pbHC);
1000
1001	iCacheIndex = ((GCPhys >> PAGE_SHIFT) & PGM_MAX_PHYSCACHE_ENTRIES_MASK);
1002
1003	ASMBitSet(&pCache->aEntries, iCacheIndex);
1004
1005	pCache->Entry[iCacheIndex].GCPhys = GCPhys;
1006	pCache->Entry[iCacheIndex].pbHC = pbHC;
1007	}
1008	#endif
1009
1010	/**
1011	* Read physical memory.
1012	*
1013	* This API respects access handlers and MMIO. Use PGMPhysReadGCPhys() if you
1014	* want to ignore those.
1015	*
1016	* @param pVM VM Handle.
1017	* @param GCPhys Physical address start reading from.
1018	* @param pvBuf Where to put the read bits.
1019	* @param cbRead How many bytes to read.
1020	*/
1021	PGMDECL(void) PGMPhysRead(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
1022	{
1023	#ifdef IN_RING3
1024	bool fGrabbedLock = false;
1025	#endif
1026
1027	AssertMsg(cbRead > 0, ("don't even think about reading zero bytes!\n"));
1028	if (cbRead == 0)
1029	return;
1030
1031	LogFlow(("PGMPhysRead: %VGp %d\n", GCPhys, cbRead));
1032
1033	#ifdef IN_RING3
1034	if (!VM_IS_EMT(pVM))
1035	{
1036	pgmLock(pVM);
1037	fGrabbedLock = true;
1038	}
1039	#endif
1040
1041	/*
1042	* Copy loop on ram ranges.
1043	*/
1044	PPGMRAMRANGE pCur = CTXSUFF(pVM->pgm.s.pRamRanges);
1045	for (;;)
1046	{
1047	/* Find range. */
1048	while (pCur && GCPhys > pCur->GCPhysLast)
1049	pCur = CTXSUFF(pCur->pNext);
1050	/* Inside range or not? */
1051	if (pCur && GCPhys >= pCur->GCPhys)
1052	{
1053	/*
1054	* Must work our way thru this page by page.
1055	*/
1056	RTGCPHYS off = GCPhys - pCur->GCPhys;
1057	while (off < pCur->cb)
1058	{
1059	unsigned iPage = off >> PAGE_SHIFT;
1060	PPGMPAGE pPage = &pCur->aPages[iPage];
1061	size_t cb;
1062
1063	/* Physical chunk in dynamically allocated range not present? */
1064	if (RT_UNLIKELY(!PGM_PAGE_GET_HCPHYS(pPage)))
1065	{
1066	/* Treat it as reserved; return zeros */
1067	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1068	if (cb >= cbRead)
1069	{
1070	memset(pvBuf, 0, cbRead);
1071	goto end;
1072	}
1073	memset(pvBuf, 0, cb);
1074	}
1075	else
1076	{
1077	switch (pPage->HCPhys & (MM_RAM_FLAGS_RESERVED \| MM_RAM_FLAGS_MMIO \| MM_RAM_FLAGS_VIRTUAL_ALL \| MM_RAM_FLAGS_PHYSICAL_ALL \| MM_RAM_FLAGS_ROM)) /** @todo PAGE FLAGS */
1078	{
1079	/*
1080	* Normal memory or ROM.
1081	*/
1082	case 0:
1083	case MM_RAM_FLAGS_ROM:
1084	case MM_RAM_FLAGS_ROM \| MM_RAM_FLAGS_RESERVED:
1085	//case MM_RAM_FLAGS_ROM \| MM_RAM_FLAGS_MMIO2: /* = shadow */ - //MMIO2 isn't in the mask.
1086	case MM_RAM_FLAGS_PHYSICAL_WRITE:
1087	case MM_RAM_FLAGS_MMIO2 \| MM_RAM_FLAGS_PHYSICAL_WRITE: // MMIO2 isn't in the mask.
1088	case MM_RAM_FLAGS_VIRTUAL_WRITE:
1089	{
1090	#ifdef IN_GC
1091	void *pvSrc = NULL;
1092	PGMGCDynMapHCPage(pVM, PGM_PAGE_GET_HCPHYS(pPage), &pvSrc);
1093	pvSrc = (char *)pvSrc + (off & PAGE_OFFSET_MASK);
1094	#else
1095	void *pvSrc = PGMRAMRANGE_GETHCPTR(pCur, off)
1096	#endif
1097	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1098	if (cb >= cbRead)
1099	{
1100	#if defined(IN_RING3) && defined(PGM_PHYSMEMACCESS_CACHING)
1101	if (cbRead <= 4 && !fGrabbedLock /* i.e. EMT */)
1102	pgmPhysCacheAdd(pVM, &pVM->pgm.s.pgmphysreadcache, GCPhys, (uint8_t*)pvSrc);
1103	#endif /* IN_RING3 && PGM_PHYSMEMACCESS_CACHING */
1104	memcpy(pvBuf, pvSrc, cbRead);
1105	goto end;
1106	}
1107	memcpy(pvBuf, pvSrc, cb);
1108	break;
1109	}
1110
1111	/*
1112	* All reserved, nothing there.
1113	*/
1114	case MM_RAM_FLAGS_RESERVED:
1115	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1116	if (cb >= cbRead)
1117	{
1118	memset(pvBuf, 0, cbRead);
1119	goto end;
1120	}
1121	memset(pvBuf, 0, cb);
1122	break;
1123
1124	/*
1125	* Physical handler.
1126	*/
1127	case MM_RAM_FLAGS_PHYSICAL_ALL:
1128	case MM_RAM_FLAGS_MMIO2 \| MM_RAM_FLAGS_PHYSICAL_ALL: /** r=bird: MMIO2 isn't in the mask! */
1129	{
1130	int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1131	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1132	#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
1133
1134	/* find and call the handler */
1135	PPGMPHYSHANDLER pNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesHC->PhysHandlers, GCPhys);
1136	if (pNode && pNode->pfnHandlerR3)
1137	{
1138	size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
1139	if (cbRange < cb)
1140	cb = cbRange;
1141	if (cb > cbRead)
1142	cb = cbRead;
1143
1144	void *pvSrc = PGMRAMRANGE_GETHCPTR(pCur, off)
1145
1146	/** @note Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1147	rc = pNode->pfnHandlerR3(pVM, GCPhys, pvSrc, pvBuf, cb, PGMACCESSTYPE_READ, pNode->pvUserR3);
1148	}
1149	#endif /* IN_RING3 */
1150	if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1151	{
1152	#ifdef IN_GC
1153	void *pvSrc = NULL;
1154	PGMGCDynMapHCPage(pVM, PGM_PAGE_GET_HCPHYS(pPage), &pvSrc);
1155	pvSrc = (char *)pvSrc + (off & PAGE_OFFSET_MASK);
1156	#else
1157	void *pvSrc = PGMRAMRANGE_GETHCPTR(pCur, off)
1158	#endif
1159
1160	if (cb >= cbRead)
1161	{
1162	memcpy(pvBuf, pvSrc, cbRead);
1163	goto end;
1164	}
1165	memcpy(pvBuf, pvSrc, cb);
1166	}
1167	else if (cb >= cbRead)
1168	goto end;
1169	break;
1170	}
1171
1172	case MM_RAM_FLAGS_VIRTUAL_ALL:
1173	{
1174	int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1175	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1176	#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
1177	/* Search the whole tree for matching physical addresses (rather expensive!) */
1178	PPGMVIRTHANDLER pNode;
1179	unsigned iPage;
1180	int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pNode, &iPage);
1181	if (VBOX_SUCCESS(rc2) && pNode->pfnHandlerHC)
1182	{
1183	size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
1184	if (cbRange < cb)
1185	cb = cbRange;
1186	if (cb > cbRead)
1187	cb = cbRead;
1188	RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pNode->GCPtr & PAGE_BASE_GC_MASK)
1189	+ (iPage << PAGE_SHIFT) + (off & PAGE_OFFSET_MASK);
1190
1191	void *pvSrc = PGMRAMRANGE_GETHCPTR(pCur, off)
1192
1193	/** @note Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1194	rc = pNode->pfnHandlerHC(pVM, (RTGCPTR)GCPtr, pvSrc, pvBuf, cb, PGMACCESSTYPE_READ, 0);
1195	}
1196	#endif /* IN_RING3 */
1197	if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1198	{
1199	#ifdef IN_GC
1200	void *pvSrc = NULL;
1201	PGMGCDynMapHCPage(pVM, PGM_PAGE_GET_HCPHYS(pPage), &pvSrc);
1202	pvSrc = (char *)pvSrc + (off & PAGE_OFFSET_MASK);
1203	#else
1204	void *pvSrc = PGMRAMRANGE_GETHCPTR(pCur, off)
1205	#endif
1206	if (cb >= cbRead)
1207	{
1208	memcpy(pvBuf, pvSrc, cbRead);
1209	goto end;
1210	}
1211	memcpy(pvBuf, pvSrc, cb);
1212	}
1213	else if (cb >= cbRead)
1214	goto end;
1215	break;
1216	}
1217
1218	/*
1219	* The rest needs to be taken more carefully.
1220	*/
1221	default:
1222	#if 1 /** @todo r=bird: Can you do this properly please. */
1223	/** @todo Try MMIO; quick hack */
1224	if (cbRead <= 4 && IOMMMIORead(pVM, GCPhys, (uint32_t *)pvBuf, cbRead) == VINF_SUCCESS)
1225	goto end;
1226	#endif
1227
1228	/** @todo fix me later. */
1229	AssertReleaseMsgFailed(("Unknown read at %VGp size %d implement the complex physical reading case %x\n",
1230	GCPhys, cbRead,
1231	pPage->HCPhys & (MM_RAM_FLAGS_RESERVED \| MM_RAM_FLAGS_MMIO \| MM_RAM_FLAGS_VIRTUAL_ALL \| MM_RAM_FLAGS_PHYSICAL_ALL \| MM_RAM_FLAGS_ROM))); /** @todo PAGE FLAGS */
1232	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1233	break;
1234	}
1235	}
1236	cbRead -= cb;
1237	off += cb;
1238	pvBuf = (char *)pvBuf + cb;
1239	}
1240
1241	GCPhys = pCur->GCPhysLast + 1;
1242	}
1243	else
1244	{
1245	LogFlow(("PGMPhysRead: Unassigned %VGp size=%d\n", GCPhys, cbRead));
1246
1247	/*
1248	* Unassigned address space.
1249	*/
1250	size_t cb;
1251	if ( !pCur
1252	\|\| (cb = pCur->GCPhys - GCPhys) >= cbRead)
1253	{
1254	memset(pvBuf, 0, cbRead);
1255	goto end;
1256	}
1257
1258	memset(pvBuf, 0, cb);
1259	cbRead -= cb;
1260	pvBuf = (char *)pvBuf + cb;
1261	GCPhys += cb;
1262	}
1263	}
1264	end:
1265	#ifdef IN_RING3
1266	if (fGrabbedLock)
1267	pgmUnlock(pVM);
1268	#endif
1269	return;
1270	}
1271
1272	/**
1273	* Write to physical memory.
1274	*
1275	* This API respects access handlers and MMIO. Use PGMPhysReadGCPhys() if you
1276	* want to ignore those.
1277	*
1278	* @param pVM VM Handle.
1279	* @param GCPhys Physical address to write to.
1280	* @param pvBuf What to write.
1281	* @param cbWrite How many bytes to write.
1282	*/
1283	PGMDECL(void) PGMPhysWrite(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
1284	{
1285	#ifdef IN_RING3
1286	bool fGrabbedLock = false;
1287	#endif
1288
1289	AssertMsg(!pVM->pgm.s.fNoMorePhysWrites, ("Calling PGMPhysWrite after pgmR3Save()!\n"));
1290	AssertMsg(cbWrite > 0, ("don't even think about writing zero bytes!\n"));
1291	if (cbWrite == 0)
1292	return;
1293
1294	LogFlow(("PGMPhysWrite: %VGp %d\n", GCPhys, cbWrite));
1295
1296	#ifdef IN_RING3
1297	if (!VM_IS_EMT(pVM))
1298	{
1299	pgmLock(pVM);
1300	fGrabbedLock = true;
1301	}
1302	#endif
1303	/*
1304	* Copy loop on ram ranges.
1305	*/
1306	PPGMRAMRANGE pCur = CTXSUFF(pVM->pgm.s.pRamRanges);
1307	for (;;)
1308	{
1309	/* Find range. */
1310	while (pCur && GCPhys > pCur->GCPhysLast)
1311	pCur = CTXSUFF(pCur->pNext);
1312	/* Inside range or not? */
1313	if (pCur && GCPhys >= pCur->GCPhys)
1314	{
1315	/*
1316	* Must work our way thru this page by page.
1317	*/
1318	unsigned off = GCPhys - pCur->GCPhys;
1319	while (off < pCur->cb)
1320	{
1321	unsigned iPage = off >> PAGE_SHIFT;
1322	PPGMPAGE pPage = &pCur->aPages[iPage];
1323
1324	/* Physical chunk in dynamically allocated range not present? */
1325	if (RT_UNLIKELY(!PGM_PAGE_GET_HCPHYS(pPage)))
1326	{
1327	int rc;
1328	#ifdef IN_RING3
1329	if (fGrabbedLock)
1330	{
1331	pgmUnlock(pVM);
1332	rc = pgmr3PhysGrowRange(pVM, GCPhys);
1333	if (rc == VINF_SUCCESS)
1334	PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite); /* try again; can't assume pCur is still valid (paranoia) */
1335	return;
1336	}
1337	rc = pgmr3PhysGrowRange(pVM, GCPhys);
1338	#else
1339	rc = CTXALLMID(VMM, CallHost)(pVM, VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
1340	#endif
1341	if (rc != VINF_SUCCESS)
1342	goto end;
1343	}
1344
1345	size_t cb;
1346	/** @todo r=bird: missing MM_RAM_FLAGS_ROM here, we shall not allow anyone to overwrite the ROM! */
1347	switch (pPage->HCPhys & (MM_RAM_FLAGS_RESERVED \| MM_RAM_FLAGS_MMIO \| MM_RAM_FLAGS_MMIO2 \| MM_RAM_FLAGS_VIRTUAL_ALL \| MM_RAM_FLAGS_VIRTUAL_WRITE \| MM_RAM_FLAGS_PHYSICAL_ALL \| MM_RAM_FLAGS_PHYSICAL_WRITE)) /** @todo PAGE FLAGS */
1348	{
1349	/*
1350	* Normal memory, MMIO2 or writable shadow ROM.
1351	*/
1352	case 0:
1353	case MM_RAM_FLAGS_MMIO2:
1354	case MM_RAM_FLAGS_ROM \| MM_RAM_FLAGS_MMIO2: /* shadow rom */
1355	{
1356	#ifdef IN_GC
1357	void *pvDst = NULL;
1358	PGMGCDynMapHCPage(pVM, PGM_PAGE_GET_HCPHYS(pPage), &pvDst);
1359	pvDst = (char *)pvDst + (off & PAGE_OFFSET_MASK);
1360	#else
1361	void *pvDst = PGMRAMRANGE_GETHCPTR(pCur, off)
1362	#endif
1363	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1364	if (cb >= cbWrite)
1365	{
1366	#if defined(IN_RING3) && defined(PGM_PHYSMEMACCESS_CACHING)
1367	if (cbWrite <= 4 && !fGrabbedLock /* i.e. EMT */)
1368	pgmPhysCacheAdd(pVM, &pVM->pgm.s.pgmphyswritecache, GCPhys, (uint8_t*)pvDst);
1369	#endif /* IN_RING3 && PGM_PHYSMEMACCESS_CACHING */
1370	memcpy(pvDst, pvBuf, cbWrite);
1371	goto end;
1372	}
1373	memcpy(pvDst, pvBuf, cb);
1374	break;
1375	}
1376
1377	/*
1378	* All reserved, nothing there.
1379	*/
1380	case MM_RAM_FLAGS_RESERVED:
1381	case MM_RAM_FLAGS_RESERVED \| MM_RAM_FLAGS_MMIO2:
1382	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1383	if (cb >= cbWrite)
1384	goto end;
1385	break;
1386
1387	/*
1388	* Physical handler.
1389	*/
1390	case MM_RAM_FLAGS_PHYSICAL_ALL:
1391	case MM_RAM_FLAGS_PHYSICAL_WRITE:
1392	case MM_RAM_FLAGS_MMIO2 \| MM_RAM_FLAGS_PHYSICAL_ALL:
1393	case MM_RAM_FLAGS_MMIO2 \| MM_RAM_FLAGS_PHYSICAL_WRITE:
1394	{
1395	int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1396	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1397	#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
1398	/* find and call the handler */
1399	PPGMPHYSHANDLER pNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesHC->PhysHandlers, GCPhys);
1400	if (pNode && pNode->pfnHandlerR3)
1401	{
1402	size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
1403	if (cbRange < cb)
1404	cb = cbRange;
1405	if (cb > cbWrite)
1406	cb = cbWrite;
1407
1408	void *pvDst = PGMRAMRANGE_GETHCPTR(pCur, off)
1409
1410	/** @note Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1411	rc = pNode->pfnHandlerR3(pVM, GCPhys, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, pNode->pvUserR3);
1412	}
1413	#endif /* IN_RING3 */
1414	if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1415	{
1416	#ifdef IN_GC
1417	void *pvDst = NULL;
1418	PGMGCDynMapHCPage(pVM, PGM_PAGE_GET_HCPHYS(pPage), &pvDst);
1419	pvDst = (char *)pvDst + (off & PAGE_OFFSET_MASK);
1420	#else
1421	void *pvDst = PGMRAMRANGE_GETHCPTR(pCur, off)
1422	#endif
1423	if (cb >= cbWrite)
1424	{
1425	memcpy(pvDst, pvBuf, cbWrite);
1426	goto end;
1427	}
1428	memcpy(pvDst, pvBuf, cb);
1429	}
1430	else if (cb >= cbWrite)
1431	goto end;
1432	break;
1433	}
1434
1435	case MM_RAM_FLAGS_VIRTUAL_ALL:
1436	case MM_RAM_FLAGS_VIRTUAL_WRITE:
1437	{
1438	int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1439	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1440	#ifdef IN_RING3
1441	/** @todo deal with this in GC and R0! */
1442	/* Search the whole tree for matching physical addresses (rather expensive!) */
1443	PPGMVIRTHANDLER pNode;
1444	unsigned iPage;
1445	int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pNode, &iPage);
1446	if (VBOX_SUCCESS(rc2) && pNode->pfnHandlerHC)
1447	{
1448	size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
1449	if (cbRange < cb)
1450	cb = cbRange;
1451	if (cb > cbWrite)
1452	cb = cbWrite;
1453	RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pNode->GCPtr & PAGE_BASE_GC_MASK)
1454	+ (iPage << PAGE_SHIFT) + (off & PAGE_OFFSET_MASK);
1455
1456	void *pvDst = PGMRAMRANGE_GETHCPTR(pCur, off)
1457
1458	/** @note Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1459	rc = pNode->pfnHandlerHC(pVM, (RTGCPTR)GCPtr, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, 0);
1460	}
1461	#endif /* IN_RING3 */
1462	if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1463	{
1464	#ifdef IN_GC
1465	void *pvDst = NULL;
1466	PGMGCDynMapHCPage(pVM, PGM_PAGE_GET_HCPHYS(pPage), &pvDst);
1467	pvDst = (char *)pvDst + (off & PAGE_OFFSET_MASK);
1468	#else
1469	void *pvDst = PGMRAMRANGE_GETHCPTR(pCur, off)
1470	#endif
1471	if (cb >= cbWrite)
1472	{
1473	memcpy(pvDst, pvBuf, cbWrite);
1474	goto end;
1475	}
1476	memcpy(pvDst, pvBuf, cb);
1477	}
1478	else if (cb >= cbWrite)
1479	goto end;
1480	break;
1481	}
1482
1483	/*
1484	* Physical write handler + virtual write handler.
1485	* Consider this a quick workaround for the CSAM + shadow caching problem.
1486	*
1487	* We hand it to the shadow caching first since it requires the unchanged
1488	* data. CSAM will have to put up with it already being changed.
1489	*/
1490	case MM_RAM_FLAGS_PHYSICAL_WRITE \| MM_RAM_FLAGS_VIRTUAL_WRITE:
1491	{
1492	int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1493	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1494	#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
1495	/* 1. The physical handler */
1496	PPGMPHYSHANDLER pPhysNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesHC->PhysHandlers, GCPhys);
1497	if (pPhysNode && pPhysNode->pfnHandlerR3)
1498	{
1499	size_t cbRange = pPhysNode->Core.KeyLast - GCPhys + 1;
1500	if (cbRange < cb)
1501	cb = cbRange;
1502	if (cb > cbWrite)
1503	cb = cbWrite;
1504
1505	void *pvDst = PGMRAMRANGE_GETHCPTR(pCur, off)
1506
1507	/** @note Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1508	rc = pPhysNode->pfnHandlerR3(pVM, GCPhys, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, pPhysNode->pvUserR3);
1509	}
1510
1511	/* 2. The virtual handler (will see incorrect data) */
1512	PPGMVIRTHANDLER pVirtNode;
1513	unsigned iPage;
1514	int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pVirtNode, &iPage);
1515	if (VBOX_SUCCESS(rc2) && pVirtNode->pfnHandlerHC)
1516	{
1517	size_t cbRange = pVirtNode->Core.KeyLast - GCPhys + 1;
1518	if (cbRange < cb)
1519	cb = cbRange;
1520	if (cb > cbWrite)
1521	cb = cbWrite;
1522	RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pVirtNode->GCPtr & PAGE_BASE_GC_MASK)
1523	+ (iPage << PAGE_SHIFT) + (off & PAGE_OFFSET_MASK);
1524
1525	void *pvDst = PGMRAMRANGE_GETHCPTR(pCur, off)
1526
1527	/** @note Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1528	rc2 = pVirtNode->pfnHandlerHC(pVM, (RTGCPTR)GCPtr, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, 0);
1529	if ( ( rc2 != VINF_PGM_HANDLER_DO_DEFAULT
1530	&& rc == VINF_PGM_HANDLER_DO_DEFAULT)
1531	\|\| ( VBOX_FAILURE(rc2)
1532	&& VBOX_SUCCESS(rc)))
1533	rc = rc2;
1534	}
1535	#endif /* IN_RING3 */
1536	if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1537	{
1538	#ifdef IN_GC
1539	void *pvDst = NULL;
1540	PGMGCDynMapHCPage(pVM, PGM_PAGE_GET_HCPHYS(pPage), &pvDst);
1541	pvDst = (char *)pvDst + (off & PAGE_OFFSET_MASK);
1542	#else
1543	void *pvDst = PGMRAMRANGE_GETHCPTR(pCur, off)
1544	#endif
1545	if (cb >= cbWrite)
1546	{
1547	memcpy(pvDst, pvBuf, cbWrite);
1548	goto end;
1549	}
1550	memcpy(pvDst, pvBuf, cb);
1551	}
1552	else if (cb >= cbWrite)
1553	goto end;
1554	break;
1555	}
1556
1557
1558	/*
1559	* The rest needs to be taken more carefully.
1560	*/
1561	default:
1562	#if 1 /** @todo r=bird: Can you do this properly please. */
1563	/** @todo Try MMIO; quick hack */
1564	if (cbWrite <= 4 && IOMMMIOWrite(pVM, GCPhys, (uint32_t )pvBuf, cbWrite) == VINF_SUCCESS)
1565	goto end;
1566	#endif
1567
1568	/** @todo fix me later. */
1569	AssertReleaseMsgFailed(("Unknown write at %VGp size %d implement the complex physical writing case %x\n",
1570	GCPhys, cbWrite,
1571	(pPage->HCPhys & (MM_RAM_FLAGS_RESERVED \| MM_RAM_FLAGS_MMIO \| MM_RAM_FLAGS_MMIO2 \| MM_RAM_FLAGS_VIRTUAL_ALL \| MM_RAM_FLAGS_VIRTUAL_WRITE \| MM_RAM_FLAGS_PHYSICAL_ALL \| MM_RAM_FLAGS_PHYSICAL_WRITE)))); /** @todo PAGE FLAGS */
1572	/* skip the write */
1573	cb = cbWrite;
1574	break;
1575	}
1576
1577	cbWrite -= cb;
1578	off += cb;
1579	pvBuf = (const char *)pvBuf + cb;
1580	}
1581
1582	GCPhys = pCur->GCPhysLast + 1;
1583	}
1584	else
1585	{
1586	/*
1587	* Unassigned address space.
1588	*/
1589	size_t cb;
1590	if ( !pCur
1591	\|\| (cb = pCur->GCPhys - GCPhys) >= cbWrite)
1592	goto end;
1593
1594	cbWrite -= cb;
1595	pvBuf = (const char *)pvBuf + cb;
1596	GCPhys += cb;
1597	}
1598	}
1599	end:
1600	#ifdef IN_RING3
1601	if (fGrabbedLock)
1602	pgmUnlock(pVM);
1603	#endif
1604	return;
1605	}
1606
1607	#ifndef IN_GC /* Ring 0 & 3 only */
1608
1609	/**
1610	* Read from guest physical memory by GC physical address, bypassing
1611	* MMIO and access handlers.
1612	*
1613	* @returns VBox status.
1614	* @param pVM VM handle.
1615	* @param pvDst The destination address.
1616	* @param GCPhysSrc The source address (GC physical address).
1617	* @param cb The number of bytes to read.
1618	*/
1619	PGMDECL(int) PGMPhysReadGCPhys(PVM pVM, void *pvDst, RTGCPHYS GCPhysSrc, size_t cb)
1620	{
1621	/*
1622	* Anything to be done?
1623	*/
1624	if (!cb)
1625	return VINF_SUCCESS;
1626
1627	/*
1628	* Loop ram ranges.
1629	*/
1630	for (PPGMRAMRANGE pRam = CTXSUFF(pVM->pgm.s.pRamRanges);
1631	pRam;
1632	pRam = pRam->CTXSUFF(pNext))
1633	{
1634	RTGCPHYS off = GCPhysSrc - pRam->GCPhys;
1635	if (off < pRam->cb)
1636	{
1637	if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
1638	{
1639	/* Copy page by page as we're not dealing with a linear HC range. */
1640	for (;;)
1641	{
1642	/* convert */
1643	void *pvSrc;
1644	int rc = pgmRamGCPhys2HCPtrWithRange(pVM, pRam, GCPhysSrc, &pvSrc);
1645	if (VBOX_FAILURE(rc))
1646	return rc;
1647
1648	/* copy */
1649	size_t cbRead = PAGE_SIZE - ((RTGCUINTPTR)GCPhysSrc & PAGE_OFFSET_MASK);
1650	if (cbRead >= cb)
1651	{
1652	memcpy(pvDst, pvSrc, cb);
1653	return VINF_SUCCESS;
1654	}
1655	memcpy(pvDst, pvSrc, cbRead);
1656
1657	/* next */
1658	cb -= cbRead;
1659	pvDst = (uint8_t *)pvDst + cbRead;
1660	GCPhysSrc += cbRead;
1661	}
1662	}
1663	else if (pRam->pvHC)
1664	{
1665	/* read */
1666	size_t cbRead = pRam->cb - off;
1667	if (cbRead >= cb)
1668	{
1669	memcpy(pvDst, (uint8_t *)pRam->pvHC + off, cb);
1670	return VINF_SUCCESS;
1671	}
1672	memcpy(pvDst, (uint8_t *)pRam->pvHC + off, cbRead);
1673
1674	/* next */
1675	cb -= cbRead;
1676	pvDst = (uint8_t *)pvDst + cbRead;
1677	GCPhysSrc += cbRead;
1678	}
1679	else
1680	return VERR_PGM_PHYS_PAGE_RESERVED;
1681	}
1682	else if (GCPhysSrc < pRam->GCPhysLast)
1683	break;
1684	}
1685	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1686	}
1687
1688
1689	/**
1690	* Write to guest physical memory referenced by GC pointer.
1691	* Write memory to GC physical address in guest physical memory.
1692	*
1693	* This will bypass MMIO and access handlers.
1694	*
1695	* @returns VBox status.
1696	* @param pVM VM handle.
1697	* @param GCPhysDst The GC physical address of the destination.
1698	* @param pvSrc The source buffer.
1699	* @param cb The number of bytes to write.
1700	*/
1701	PGMDECL(int) PGMPhysWriteGCPhys(PVM pVM, RTGCPHYS GCPhysDst, const void *pvSrc, size_t cb)
1702	{
1703	/*
1704	* Anything to be done?
1705	*/
1706	if (!cb)
1707	return VINF_SUCCESS;
1708
1709	LogFlow(("PGMPhysWriteGCPhys: %VGp %d\n", GCPhysDst, cb));
1710
1711	/*
1712	* Loop ram ranges.
1713	*/
1714	for (PPGMRAMRANGE pRam = CTXSUFF(pVM->pgm.s.pRamRanges);
1715	pRam;
1716	pRam = pRam->CTXSUFF(pNext))
1717	{
1718	RTGCPHYS off = GCPhysDst - pRam->GCPhys;
1719	if (off < pRam->cb)
1720	{
1721	#ifdef NEW_PHYS_CODE
1722	/** @todo PGMRamGCPhys2HCPtrWithRange. */
1723	#endif
1724	if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
1725	{
1726	/* Copy page by page as we're not dealing with a linear HC range. */
1727	for (;;)
1728	{
1729	/* convert */
1730	void *pvDst;
1731	int rc = pgmRamGCPhys2HCPtrWithRange(pVM, pRam, GCPhysDst, &pvDst);
1732	if (VBOX_FAILURE(rc))
1733	return rc;
1734
1735	/* copy */
1736	size_t cbWrite = PAGE_SIZE - ((RTGCUINTPTR)GCPhysDst & PAGE_OFFSET_MASK);
1737	if (cbWrite >= cb)
1738	{
1739	memcpy(pvDst, pvSrc, cb);
1740	return VINF_SUCCESS;
1741	}
1742	memcpy(pvDst, pvSrc, cbWrite);
1743
1744	/* next */
1745	cb -= cbWrite;
1746	pvSrc = (uint8_t *)pvSrc + cbWrite;
1747	GCPhysDst += cbWrite;
1748	}
1749	}
1750	else if (pRam->pvHC)
1751	{
1752	/* write */
1753	size_t cbWrite = pRam->cb - off;
1754	if (cbWrite >= cb)
1755	{
1756	memcpy((uint8_t *)pRam->pvHC + off, pvSrc, cb);
1757	return VINF_SUCCESS;
1758	}
1759	memcpy((uint8_t *)pRam->pvHC + off, pvSrc, cbWrite);
1760
1761	/* next */
1762	cb -= cbWrite;
1763	GCPhysDst += cbWrite;
1764	pvSrc = (uint8_t *)pvSrc + cbWrite;
1765	}
1766	else
1767	return VERR_PGM_PHYS_PAGE_RESERVED;
1768	}
1769	else if (GCPhysDst < pRam->GCPhysLast)
1770	break;
1771	}
1772	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1773	}
1774
1775
1776	/**
1777	* Read from guest physical memory referenced by GC pointer.
1778	*
1779	* This function uses the current CR3/CR0/CR4 of the guest and will
1780	* bypass access handlers and not set any accessed bits.
1781	*
1782	* @returns VBox status.
1783	* @param pVM VM handle.
1784	* @param pvDst The destination address.
1785	* @param GCPtrSrc The source address (GC pointer).
1786	* @param cb The number of bytes to read.
1787	*/
1788	PGMDECL(int) PGMPhysReadGCPtr(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb)
1789	{
1790	/*
1791	* Anything to do?
1792	*/
1793	if (!cb)
1794	return VINF_SUCCESS;
1795
1796	/*
1797	* Optimize reads within a single page.
1798	*/
1799	if (((RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK) + cb <= PAGE_SIZE)
1800	{
1801	void *pvSrc;
1802	int rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrSrc, &pvSrc);
1803	if (VBOX_FAILURE(rc))
1804	return rc;
1805	memcpy(pvDst, pvSrc, cb);
1806	return VINF_SUCCESS;
1807	}
1808
1809	/*
1810	* Page by page.
1811	*/
1812	for (;;)
1813	{
1814	/* convert */
1815	void *pvSrc;
1816	int rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrSrc, &pvSrc);
1817	if (VBOX_FAILURE(rc))
1818	return rc;
1819
1820	/* copy */
1821	size_t cbRead = PAGE_SIZE - ((RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK);
1822	if (cbRead >= cb)
1823	{
1824	memcpy(pvDst, pvSrc, cb);
1825	return VINF_SUCCESS;
1826	}
1827	memcpy(pvDst, pvSrc, cbRead);
1828
1829	/* next */
1830	cb -= cbRead;
1831	pvDst = (uint8_t *)pvDst + cbRead;
1832	GCPtrSrc += cbRead;
1833	}
1834	}
1835
1836
1837	/**
1838	* Write to guest physical memory referenced by GC pointer.
1839	*
1840	* This function uses the current CR3/CR0/CR4 of the guest and will
1841	* bypass access handlers and not set dirty or accessed bits.
1842	*
1843	* @returns VBox status.
1844	* @param pVM VM handle.
1845	* @param GCPtrDst The destination address (GC pointer).
1846	* @param pvSrc The source address.
1847	* @param cb The number of bytes to write.
1848	*/
1849	PGMDECL(int) PGMPhysWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
1850	{
1851	/*
1852	* Anything to do?
1853	*/
1854	if (!cb)
1855	return VINF_SUCCESS;
1856
1857	LogFlow(("PGMPhysWriteGCPtr: %VGv %d\n", GCPtrDst, cb));
1858
1859	/*
1860	* Optimize writes within a single page.
1861	*/
1862	if (((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK) + cb <= PAGE_SIZE)
1863	{
1864	void *pvDst;
1865	int rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrDst, &pvDst);
1866	if (VBOX_FAILURE(rc))
1867	return rc;
1868	memcpy(pvDst, pvSrc, cb);
1869	return VINF_SUCCESS;
1870	}
1871
1872	/*
1873	* Page by page.
1874	*/
1875	for (;;)
1876	{
1877	/* convert */
1878	void *pvDst;
1879	int rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrDst, &pvDst);
1880	if (VBOX_FAILURE(rc))
1881	return rc;
1882
1883	/* copy */
1884	size_t cbWrite = PAGE_SIZE - ((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK);
1885	if (cbWrite >= cb)
1886	{
1887	memcpy(pvDst, pvSrc, cb);
1888	return VINF_SUCCESS;
1889	}
1890	memcpy(pvDst, pvSrc, cbWrite);
1891
1892	/* next */
1893	cb -= cbWrite;
1894	pvSrc = (uint8_t *)pvSrc + cbWrite;
1895	GCPtrDst += cbWrite;
1896	}
1897	}
1898
1899	/**
1900	* Read from guest physical memory referenced by GC pointer.
1901	*
1902	* This function uses the current CR3/CR0/CR4 of the guest and will
1903	* respect access handlers and set accessed bits.
1904	*
1905	* @returns VBox status.
1906	* @param pVM VM handle.
1907	* @param pvDst The destination address.
1908	* @param GCPtrSrc The source address (GC pointer).
1909	* @param cb The number of bytes to read.
1910	*/
1911	/** @todo use the PGMPhysReadGCPtr name and rename the unsafe one to something appropriate */
1912	PGMDECL(int) PGMPhysReadGCPtrSafe(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb)
1913	{
1914	RTGCPHYS GCPhys;
1915	RTGCUINTPTR offset;
1916	int rc;
1917
1918	/*
1919	* Anything to do?
1920	*/
1921	if (!cb)
1922	return VINF_SUCCESS;
1923
1924	LogFlow(("PGMPhysReadGCPtrSafe: %VGv %d\n", GCPtrSrc, cb));
1925
1926	/*
1927	* Optimize reads within a single page.
1928	*/
1929	if (((RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK) + cb <= PAGE_SIZE)
1930	{
1931	/* Convert virtual to physical address */
1932	rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrSrc, &GCPhys);
1933	AssertRCReturn(rc, rc);
1934
1935	/* mark the guest page as accessed. */
1936	rc = PGMGstModifyPage(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)(X86_PTE_A));
1937	AssertRC(rc);
1938
1939	PGMPhysRead(pVM, GCPhys, pvDst, cb);
1940	return VINF_SUCCESS;
1941	}
1942
1943	/*
1944	* Page by page.
1945	*/
1946	for (;;)
1947	{
1948	/* Convert virtual to physical address */
1949	rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrSrc, &GCPhys);
1950	AssertRCReturn(rc, rc);
1951
1952	/* mark the guest page as accessed. */
1953	int rc = PGMGstModifyPage(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)(X86_PTE_A));
1954	AssertRC(rc);
1955
1956	/* copy */
1957	size_t cbRead = PAGE_SIZE - ((RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK);
1958	if (cbRead >= cb)
1959	{
1960	PGMPhysRead(pVM, GCPhys, pvDst, cb);
1961	return VINF_SUCCESS;
1962	}
1963	PGMPhysRead(pVM, GCPhys, pvDst, cbRead);
1964
1965	/* next */
1966	cb -= cbRead;
1967	pvDst = (uint8_t *)pvDst + cbRead;
1968	GCPtrSrc += cbRead;
1969	}
1970	}
1971
1972
1973	/**
1974	* Write to guest physical memory referenced by GC pointer.
1975	*
1976	* This function uses the current CR3/CR0/CR4 of the guest and will
1977	* respect access handlers and set dirty and accessed bits.
1978	*
1979	* @returns VBox status.
1980	* @param pVM VM handle.
1981	* @param GCPtrDst The destination address (GC pointer).
1982	* @param pvSrc The source address.
1983	* @param cb The number of bytes to write.
1984	*/
1985	/** @todo use the PGMPhysWriteGCPtr name and rename the unsafe one to something appropriate */
1986	PGMDECL(int) PGMPhysWriteGCPtrSafe(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
1987	{
1988	RTGCPHYS GCPhys;
1989	RTGCUINTPTR offset;
1990	int rc;
1991
1992	/*
1993	* Anything to do?
1994	*/
1995	if (!cb)
1996	return VINF_SUCCESS;
1997
1998	LogFlow(("PGMPhysWriteGCPtrSafe: %VGv %d\n", GCPtrDst, cb));
1999
2000	/*
2001	* Optimize writes within a single page.
2002	*/
2003	if (((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK) + cb <= PAGE_SIZE)
2004	{
2005	/* Convert virtual to physical address */
2006	rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrDst, &GCPhys);
2007	AssertRCReturn(rc, rc);
2008
2009	/* mark the guest page as accessed and dirty. */
2010	rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A \| X86_PTE_D, ~(uint64_t)(X86_PTE_A \| X86_PTE_D));
2011	AssertRC(rc);
2012
2013	PGMPhysWrite(pVM, GCPhys, pvSrc, cb);
2014	return VINF_SUCCESS;
2015	}
2016
2017	/*
2018	* Page by page.
2019	*/
2020	for (;;)
2021	{
2022	/* Convert virtual to physical address */
2023	rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrDst, &GCPhys);
2024	AssertRCReturn(rc, rc);
2025
2026	/* mark the guest page as accessed and dirty. */
2027	rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A \| X86_PTE_D, ~(uint64_t)(X86_PTE_A \| X86_PTE_D));
2028	AssertRC(rc);
2029
2030	/* copy */
2031	size_t cbWrite = PAGE_SIZE - ((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK);
2032	if (cbWrite >= cb)
2033	{
2034	PGMPhysWrite(pVM, GCPhys, pvSrc, cb);
2035	return VINF_SUCCESS;
2036	}
2037	PGMPhysWrite(pVM, GCPhys, pvSrc, cbWrite);
2038
2039	/* next */
2040	cb -= cbWrite;
2041	pvSrc = (uint8_t *)pvSrc + cbWrite;
2042	GCPtrDst += cbWrite;
2043	}
2044	}
2045
2046	/**
2047	* Write to guest physical memory referenced by GC pointer and update the PTE.
2048	*
2049	* This function uses the current CR3/CR0/CR4 of the guest and will
2050	* bypass access handlers and set any dirty and accessed bits in the PTE.
2051	*
2052	* If you don't want to set the dirty bit, use PGMPhysWriteGCPtr().
2053	*
2054	* @returns VBox status.
2055	* @param pVM VM handle.
2056	* @param GCPtrDst The destination address (GC pointer).
2057	* @param pvSrc The source address.
2058	* @param cb The number of bytes to write.
2059	*/
2060	PGMDECL(int) PGMPhysWriteGCPtrDirty(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
2061	{
2062	/*
2063	* Anything to do?
2064	*/
2065	if (!cb)
2066	return VINF_SUCCESS;
2067
2068	/*
2069	* Optimize writes within a single page.
2070	*/
2071	if (((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK) + cb <= PAGE_SIZE)
2072	{
2073	void *pvDst;
2074	int rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrDst, &pvDst);
2075	if (VBOX_FAILURE(rc))
2076	return rc;
2077	memcpy(pvDst, pvSrc, cb);
2078	rc = PGMGstModifyPage(pVM, GCPtrDst, cb, X86_PTE_A \| X86_PTE_D, ~(uint64_t)(X86_PTE_A \| X86_PTE_D));
2079	AssertRC(rc);
2080	return VINF_SUCCESS;
2081	}
2082
2083	/*
2084	* Page by page.
2085	*/
2086	for (;;)
2087	{
2088	/* convert */
2089	void *pvDst;
2090	int rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrDst, &pvDst);
2091	if (VBOX_FAILURE(rc))
2092	return rc;
2093
2094	/* mark the guest page as accessed and dirty. */
2095	rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A \| X86_PTE_D, ~(uint64_t)(X86_PTE_A \| X86_PTE_D));
2096	AssertRC(rc);
2097
2098	/* copy */
2099	size_t cbWrite = PAGE_SIZE - ((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK);
2100	if (cbWrite >= cb)
2101	{
2102	memcpy(pvDst, pvSrc, cb);
2103	return VINF_SUCCESS;
2104	}
2105	memcpy(pvDst, pvSrc, cbWrite);
2106
2107	/* next */
2108	cb -= cbWrite;
2109	GCPtrDst += cbWrite;
2110	pvSrc = (char *)pvSrc + cbWrite;
2111	}
2112	}
2113
2114	#endif /* !IN_GC */
2115
2116
2117
2118	/**
2119	* Performs a read of guest virtual memory for instruction emulation.
2120	*
2121	* This will check permissions, raise exceptions and update the access bits.
2122	*
2123	* The current implementation will bypass all access handlers. It may later be
2124	* changed to at least respect MMIO.
2125	*
2126	*
2127	* @returns VBox status code suitable to scheduling.
2128	* @retval VINF_SUCCESS if the read was performed successfully.
2129	* @retval VINF_EM_RAW_GUEST_TRAP if an exception was raised but not dispatched yet.
2130	* @retval VINF_TRPM_XCPT_DISPATCHED if an exception was raised and dispatched.
2131	*
2132	* @param pVM The VM handle.
2133	* @param pCtxCore The context core.
2134	* @param pvDst Where to put the bytes we've read.
2135	* @param GCPtrSrc The source address.
2136	* @param cb The number of bytes to read. Not more than a page.
2137	*
2138	* @remark This function will dynamically map physical pages in GC. This may unmap
2139	* mappings done by the caller. Be careful!
2140	*/
2141	PGMDECL(int) PGMPhysInterpretedRead(PVM pVM, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCUINTPTR GCPtrSrc, size_t cb)
2142	{
2143	Assert(cb <= PAGE_SIZE);
2144
2145	/** @todo r=bird: This isn't perfect!
2146	* -# It's not checking for reserved bits being 1.
2147	* -# It's not correctly dealing with the access bit.
2148	* -# It's not respecting MMIO memory or any other access handlers.
2149	*/
2150	/*
2151	* 1. Translate virtual to physical. This may fault.
2152	* 2. Map the physical address.
2153	* 3. Do the read operation.
2154	* 4. Set access bits if required.
2155	*/
2156	int rc;
2157	unsigned cb1 = PAGE_SIZE - (GCPtrSrc & PAGE_OFFSET_MASK);
2158	if (cb <= cb1)
2159	{
2160	/*
2161	* Not crossing pages.
2162	*/
2163	RTGCPHYS GCPhys;
2164	uint64_t fFlags;
2165	rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc, &fFlags, &GCPhys);
2166	if (VBOX_SUCCESS(rc))
2167	{
2168	/** @todo we should check reserved bits ... */
2169	void *pvSrc;
2170	rc = PGM_GCPHYS_2_PTR(pVM, GCPhys, &pvSrc);
2171	switch (rc)
2172	{
2173	case VINF_SUCCESS:
2174	Log(("PGMPhysInterpretedRead: pvDst=%p pvSrc=%p cb=%d\n", pvDst, (uint8_t *)pvSrc + (GCPtrSrc & PAGE_OFFSET_MASK), cb));
2175	memcpy(pvDst, (uint8_t *)pvSrc + (GCPtrSrc & PAGE_OFFSET_MASK), cb);
2176	break;
2177	case VERR_PGM_PHYS_PAGE_RESERVED:
2178	case VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS:
2179	memset(pvDst, 0, cb);
2180	break;
2181	default:
2182	return rc;
2183	}
2184
2185	/** @todo access bit emulation isn't 100% correct. */
2186	if (!(fFlags & X86_PTE_A))
2187	{
2188	rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
2189	AssertRC(rc);
2190	}
2191	return VINF_SUCCESS;
2192	}
2193	}
2194	else
2195	{
2196	/*
2197	* Crosses pages.
2198	*/
2199	unsigned cb2 = cb - cb1;
2200	uint64_t fFlags1;
2201	RTGCPHYS GCPhys1;
2202	uint64_t fFlags2;
2203	RTGCPHYS GCPhys2;
2204	rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc, &fFlags1, &GCPhys1);
2205	if (VBOX_SUCCESS(rc))
2206	rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc + cb1, &fFlags2, &GCPhys2);
2207	if (VBOX_SUCCESS(rc))
2208	{
2209	/** @todo we should check reserved bits ... */
2210	AssertMsgFailed(("cb=%d cb1=%d cb2=%d GCPtrSrc=%VGv\n", cb, cb1, cb2, GCPtrSrc));
2211	void *pvSrc1;
2212	rc = PGM_GCPHYS_2_PTR(pVM, GCPhys1, &pvSrc1);
2213	switch (rc)
2214	{
2215	case VINF_SUCCESS:
2216	memcpy(pvDst, (uint8_t *)pvSrc1 + (GCPtrSrc & PAGE_OFFSET_MASK), cb1);
2217	break;
2218	case VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS:
2219	memset(pvDst, 0, cb1);
2220	break;
2221	default:
2222	return rc;
2223	}
2224
2225	void *pvSrc2;
2226	rc = PGM_GCPHYS_2_PTR(pVM, GCPhys2, &pvSrc2);
2227	switch (rc)
2228	{
2229	case VINF_SUCCESS:
2230	memcpy((uint8_t *)pvDst + cb2, pvSrc2, cb2);
2231	break;
2232	case VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS:
2233	memset((uint8_t *)pvDst + cb2, 0, cb2);
2234	break;
2235	default:
2236	return rc;
2237	}
2238
2239	if (!(fFlags1 & X86_PTE_A))
2240	{
2241	rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
2242	AssertRC(rc);
2243	}
2244	if (!(fFlags2 & X86_PTE_A))
2245	{
2246	rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrSrc + cb1, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
2247	AssertRC(rc);
2248	}
2249	return VINF_SUCCESS;
2250	}
2251	}
2252
2253	/*
2254	* Raise a #PF.
2255	*/
2256	uint32_t uErr;
2257
2258	/* Get the current privilege level. */
2259	uint32_t cpl = CPUMGetGuestCPL(pVM, pCtxCore);
2260	switch (rc)
2261	{
2262	case VINF_SUCCESS:
2263	uErr = (cpl >= 2) ? X86_TRAP_PF_RSVD \| X86_TRAP_PF_US : X86_TRAP_PF_RSVD;
2264	break;
2265
2266	case VERR_PAGE_NOT_PRESENT:
2267	case VERR_PAGE_TABLE_NOT_PRESENT:
2268	uErr = (cpl >= 2) ? X86_TRAP_PF_US : 0;
2269	break;
2270
2271	default:
2272	AssertMsgFailed(("rc=%Vrc GCPtrSrc=%VGv cb=%#x\n", rc, GCPtrSrc, cb));
2273	return rc;
2274	}
2275	Log(("PGMPhysInterpretedRead: GCPtrSrc=%VGv cb=%#x -> #PF(%#x)\n", GCPtrSrc, cb, uErr));
2276	return TRPMRaiseXcptErrCR2(pVM, pCtxCore, X86_XCPT_PF, uErr, GCPtrSrc);
2277	}
2278
2279	/// @todo PGMDECL(int) PGMPhysInterpretedWrite(PVM pVM, PCPUMCTXCORE pCtxCore, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
2280

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source: vbox/trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp@ 4679

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