VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp@ 7961

Last change on this file since 7961 was 7905, checked in by vboxsync, 17 years ago

Changed CRx parameter size

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  • Property svn:keywords set to Id
File size: 81.4 KB
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1/* $Id: PGMAllPhys.cpp 7905 2008-04-11 10:16:23Z vboxsync $ */
2/** @file
3 * PGM - Page Manager and Monitor, Physical Memory Addressing.
4 */
5
6/*
7 * Copyright (C) 2006-2007 innotek GmbH
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18/** @def PGM_IGNORE_RAM_FLAGS_RESERVED
19 * Don't respect the MM_RAM_FLAGS_RESERVED flag when converting to HC addresses.
20 *
21 * Since this flag is currently incorrectly kept set for ROM regions we will
22 * have to ignore it for now so we don't break stuff.
23 *
24 * @todo this has been fixed now I believe, remove this hack.
25 */
26#define PGM_IGNORE_RAM_FLAGS_RESERVED
27
28
29/*******************************************************************************
30* Header Files *
31*******************************************************************************/
32#define LOG_GROUP LOG_GROUP_PGM_PHYS
33#include <VBox/pgm.h>
34#include <VBox/trpm.h>
35#include <VBox/vmm.h>
36#include <VBox/iom.h>
37#include <VBox/em.h>
38#include <VBox/rem.h>
39#include "PGMInternal.h"
40#include <VBox/vm.h>
41#include <VBox/param.h>
42#include <VBox/err.h>
43#include <iprt/assert.h>
44#include <iprt/string.h>
45#include <iprt/asm.h>
46#include <VBox/log.h>
47#ifdef IN_RING3
48# include <iprt/thread.h>
49#endif
50
51
52
53#ifndef IN_RING3
54
55/**
56 * \#PF Handler callback for Guest ROM range write access.
57 * We simply ignore the writes or fall back to the recompiler if we don't support the instruction.
58 *
59 * @returns VBox status code (appropritate for trap handling and GC return).
60 * @param pVM VM Handle.
61 * @param uErrorCode CPU Error code.
62 * @param pRegFrame Trap register frame.
63 * @param pvFault The fault address (cr2).
64 * @param GCPhysFault The GC physical address corresponding to pvFault.
65 * @param pvUser User argument. Pointer to the ROM range structure.
66 */
67PGMDECL(int) pgmPhysRomWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void *pvFault, RTGCPHYS GCPhysFault, void *pvUser)
68{
69 int rc;
70#ifdef VBOX_WITH_NEW_PHYS_CODE
71 PPGMROMRANGE pRom = (PPGMROMRANGE)pvUser;
72 uint32_t iPage = GCPhysFault - pRom->GCPhys;
73 Assert(iPage < (pRom->cb >> PAGE_SHIFT));
74 switch (pRom->aPages[iPage].enmProt)
75 {
76 case PGMROMPROT_READ_ROM_WRITE_IGNORE:
77 case PGMROMPROT_READ_RAM_WRITE_IGNORE:
78 {
79#endif
80 /*
81 * If it's a simple instruction which doesn't change the cpu state
82 * we will simply skip it. Otherwise we'll have to defer it to REM.
83 */
84 uint32_t cbOp;
85 DISCPUSTATE Cpu;
86 rc = EMInterpretDisasOne(pVM, pRegFrame, &Cpu, &cbOp);
87 if ( RT_SUCCESS(rc)
88 && Cpu.mode == CPUMODE_32BIT
89 && !(Cpu.prefix & (PREFIX_REPNE | PREFIX_REP | PREFIX_SEG)))
90 {
91 switch (Cpu.opcode)
92 {
93 /** @todo Find other instructions we can safely skip, possibly
94 * adding this kind of detection to DIS or EM. */
95 case OP_MOV:
96 pRegFrame->eip += cbOp;
97 STAM_COUNTER_INC(&pVM->pgm.s.StatGCGuestROMWriteHandled);
98 return VINF_SUCCESS;
99 }
100 }
101 else if (RT_UNLIKELY(rc == VERR_INTERNAL_ERROR))
102 return rc;
103#ifdef VBOX_WITH_NEW_PHYS_CODE
104 break;
105 }
106
107 case PGMROMPROT_READ_RAM_WRITE_RAM:
108 rc = PGMHandlerPhysicalPageTempOff(pVM, pRom->GCPhys, GCPhysFault & X86_PTE_PG_MASK);
109 AssertRC(rc);
110 case PGMROMPROT_READ_ROM_WRITE_RAM:
111 /* Handle it in ring-3 because it's *way* easier there. */
112 break;
113
114 default:
115 AssertMsgFailedReturn(("enmProt=%d iPage=%d GCPhysFault=%RGp\n",
116 pRom->aPages[iPage].enmProt, iPage, GCPhysFault),
117 VERR_INTERNAL_ERROR);
118 }
119#endif
120
121 STAM_COUNTER_INC(&pVM->pgm.s.StatGCGuestROMWriteUnhandled);
122 return VINF_EM_RAW_EMULATE_INSTR;
123}
124
125#endif /* IN_RING3 */
126
127/**
128 * Checks if Address Gate 20 is enabled or not.
129 *
130 * @returns true if enabled.
131 * @returns false if disabled.
132 * @param pVM VM handle.
133 */
134PGMDECL(bool) PGMPhysIsA20Enabled(PVM pVM)
135{
136 LogFlow(("PGMPhysIsA20Enabled %d\n", pVM->pgm.s.fA20Enabled));
137 return !!pVM->pgm.s.fA20Enabled ; /* stupid MS compiler doesn't trust me. */
138}
139
140
141/**
142 * Validates a GC physical address.
143 *
144 * @returns true if valid.
145 * @returns false if invalid.
146 * @param pVM The VM handle.
147 * @param GCPhys The physical address to validate.
148 */
149PGMDECL(bool) PGMPhysIsGCPhysValid(PVM pVM, RTGCPHYS GCPhys)
150{
151 PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhys);
152 return pPage != NULL;
153}
154
155
156/**
157 * Checks if a GC physical address is a normal page,
158 * i.e. not ROM, MMIO or reserved.
159 *
160 * @returns true if normal.
161 * @returns false if invalid, ROM, MMIO or reserved page.
162 * @param pVM The VM handle.
163 * @param GCPhys The physical address to check.
164 */
165PGMDECL(bool) PGMPhysIsGCPhysNormal(PVM pVM, RTGCPHYS GCPhys)
166{
167 PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhys);
168 return pPage
169 && !(pPage->HCPhys & (MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO2));
170}
171
172
173/**
174 * Converts a GC physical address to a HC physical address.
175 *
176 * @returns VINF_SUCCESS on success.
177 * @returns VERR_PGM_PHYS_PAGE_RESERVED it it's a valid GC physical
178 * page but has no physical backing.
179 * @returns VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid
180 * GC physical address.
181 *
182 * @param pVM The VM handle.
183 * @param GCPhys The GC physical address to convert.
184 * @param pHCPhys Where to store the HC physical address on success.
185 */
186PGMDECL(int) PGMPhysGCPhys2HCPhys(PVM pVM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys)
187{
188 PPGMPAGE pPage;
189 int rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhys, &pPage);
190 if (VBOX_FAILURE(rc))
191 return rc;
192
193#ifndef PGM_IGNORE_RAM_FLAGS_RESERVED
194 if (RT_UNLIKELY(pPage->HCPhys & MM_RAM_FLAGS_RESERVED)) /** @todo PAGE FLAGS */
195 return VERR_PGM_PHYS_PAGE_RESERVED;
196#endif
197
198 *pHCPhys = PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK);
199 return VINF_SUCCESS;
200}
201
202
203/**
204 * Invalidates the GC page mapping TLB.
205 *
206 * @param pVM The VM handle.
207 */
208PDMDECL(void) PGMPhysInvalidatePageGCMapTLB(PVM pVM)
209{
210 /* later */
211 NOREF(pVM);
212}
213
214
215/**
216 * Invalidates the ring-0 page mapping TLB.
217 *
218 * @param pVM The VM handle.
219 */
220PDMDECL(void) PGMPhysInvalidatePageR0MapTLB(PVM pVM)
221{
222 PGMPhysInvalidatePageR3MapTLB(pVM);
223}
224
225
226/**
227 * Invalidates the ring-3 page mapping TLB.
228 *
229 * @param pVM The VM handle.
230 */
231PDMDECL(void) PGMPhysInvalidatePageR3MapTLB(PVM pVM)
232{
233 pgmLock(pVM);
234 for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.PhysTlbHC.aEntries); i++)
235 {
236 pVM->pgm.s.PhysTlbHC.aEntries[i].GCPhys = NIL_RTGCPHYS;
237 pVM->pgm.s.PhysTlbHC.aEntries[i].pPage = 0;
238 pVM->pgm.s.PhysTlbHC.aEntries[i].pMap = 0;
239 pVM->pgm.s.PhysTlbHC.aEntries[i].pv = 0;
240 }
241 pgmUnlock(pVM);
242}
243
244
245/**
246 * Frees the specified RAM page.
247 *
248 * This is used by ballooning and remapping MMIO2.
249 *
250 * @param pVM Pointer to the shared VM structure.
251 * @param pPage Pointer to the page structure.
252 * @param GCPhys The guest physical address of the page, if applicable.
253 */
254void pgmPhysFreePage(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys)
255{
256 AssertFatal(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_RAM);
257
258 /** @todo implement this... */
259 AssertFatalFailed();
260}
261
262
263
264/**
265 * Makes sure that there is at least one handy page ready for use.
266 *
267 * This will also take the appropriate actions when reaching water-marks.
268 *
269 * @returns The following VBox status codes.
270 * @retval VINF_SUCCESS on success.
271 * @retval VERR_EM_NO_MEMORY if we're really out of memory.
272 *
273 * @param pVM The VM handle.
274 *
275 * @remarks Must be called from within the PGM critical section. It may
276 * nip back to ring-3/0 in some cases.
277 */
278static int pgmPhysEnsureHandyPage(PVM pVM)
279{
280 /** @remarks
281 * low-water mark logic for R0 & GC:
282 * - 75%: Set FF.
283 * - 50%: Force return to ring-3 ASAP.
284 *
285 * For ring-3 there is a little problem wrt to the recompiler, so:
286 * - 75%: Set FF.
287 * - 50%: Try allocate pages; on failure we'll force REM to quite ASAP.
288 *
289 * The basic idea is that we should be able to get out of any situation with
290 * only 50% of handy pages remaining.
291 *
292 * At the moment we'll not adjust the number of handy pages relative to the
293 * actual VM RAM committment, that's too much work for now.
294 */
295 Assert(pVM->pgm.s.cHandyPages <= RT_ELEMENTS(pVM->pgm.s.aHandyPages));
296 if ( !pVM->pgm.s.cHandyPages
297#ifdef IN_RING3
298 || pVM->pgm.s.cHandyPages - 1 <= RT_ELEMENTS(pVM->pgm.s.aHandyPages) / 2 /* 50% */
299#endif
300 )
301 {
302 Log(("PGM: cHandyPages=%u out of %u -> allocate more\n", pVM->pgm.s.cHandyPages - 1 <= RT_ELEMENTS(pVM->pgm.s.aHandyPages)));
303#ifdef IN_RING3
304 int rc = SUPCallVMMR0Ex(pVM->pVMR0, VMMR0_DO_PGM_ALLOCATE_HANDY_PAGES, 0, NULL);
305#elif defined(IN_RING0)
306 /** @todo call PGMR0PhysAllocateHandyPages directly - need to make sure we can call kernel code first and deal with the seeding fallback. */
307 int rc = VMMR0CallHost(pVM, VMMCALLHOST_PGM_ALLOCATE_HANDY_PAGES, 0);
308#else
309 int rc = VMMGCCallHost(pVM, VMMCALLHOST_PGM_ALLOCATE_HANDY_PAGES, 0);
310#endif
311 if (RT_UNLIKELY(rc != VINF_SUCCESS))
312 {
313 Assert(rc == VINF_EM_NO_MEMORY);
314 if (!pVM->pgm.s.cHandyPages)
315 {
316 LogRel(("PGM: no more handy pages!\n"));
317 return VERR_EM_NO_MEMORY;
318 }
319 Assert(VM_FF_ISSET(pVM, VM_FF_PGM_NEED_HANDY_PAGES));
320#ifdef IN_RING3
321 REMR3NotifyFF(pVM);
322#else
323 VM_FF_SET(pVM, VM_FF_TO_R3);
324#endif
325 }
326 Assert(pVM->pgm.s.cHandyPages <= RT_ELEMENTS(pVM->pgm.s.aHandyPages));
327 }
328 else if (pVM->pgm.s.cHandyPages - 1 <= (RT_ELEMENTS(pVM->pgm.s.aHandyPages) / 4) * 3) /* 75% */
329 {
330 VM_FF_SET(pVM, VM_FF_PGM_NEED_HANDY_PAGES);
331#ifndef IN_RING3
332 if (pVM->pgm.s.cHandyPages - 1 <= RT_ELEMENTS(pVM->pgm.s.aHandyPages) / 2)
333 {
334 Log(("PGM: VM_FF_TO_R3 - cHandyPages=%u out of %u\n", pVM->pgm.s.cHandyPages - 1 <= RT_ELEMENTS(pVM->pgm.s.aHandyPages)));
335 VM_FF_SET(pVM, VM_FF_TO_R3);
336 }
337#endif
338 }
339
340 return VINF_SUCCESS;
341}
342
343
344/**
345 * Replace a zero or shared page with new page that we can write to.
346 *
347 * @returns The following VBox status codes.
348 * @retval VINF_SUCCESS on success, pPage is modified.
349 * @retval VERR_EM_NO_MEMORY if we're totally out of memory.
350 *
351 * @todo Propagate VERR_EM_NO_MEMORY up the call tree.
352 *
353 * @param pVM The VM address.
354 * @param pPage The physical page tracking structure. This will
355 * be modified on success.
356 * @param GCPhys The address of the page.
357 *
358 * @remarks Must be called from within the PGM critical section. It may
359 * nip back to ring-3/0 in some cases.
360 *
361 * @remarks This function shouldn't really fail, however if it does
362 * it probably means we've screwed up the size of the amount
363 * and/or the low-water mark of handy pages. Or, that some
364 * device I/O is causing a lot of pages to be allocated while
365 * while the host is in a low-memory condition.
366 */
367int pgmPhysAllocPage(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys)
368{
369 /*
370 * Ensure that we've got a page handy, take it and use it.
371 */
372 int rc = pgmPhysEnsureHandyPage(pVM);
373 if (VBOX_FAILURE(rc))
374 {
375 Assert(rc == VERR_EM_NO_MEMORY);
376 return rc;
377 }
378 AssertMsg(PGM_PAGE_IS_ZERO(pPage) || PGM_PAGE_IS_SHARED(pPage), ("%d %RGp\n", PGM_PAGE_GET_STATE(pPage), GCPhys));
379 Assert(!PGM_PAGE_IS_RESERVED(pPage));
380 Assert(!PGM_PAGE_IS_MMIO(pPage));
381
382 uint32_t iHandyPage = --pVM->pgm.s.cHandyPages;
383 Assert(iHandyPage < RT_ELEMENTS(pVM->pgm.s.aHandyPages));
384 Assert(pVM->pgm.s.aHandyPages[iHandyPage].HCPhysGCPhys != NIL_RTHCPHYS);
385 Assert(!(pVM->pgm.s.aHandyPages[iHandyPage].HCPhysGCPhys & ~X86_PTE_PAE_PG_MASK));
386 Assert(pVM->pgm.s.aHandyPages[iHandyPage].idPage != NIL_GMM_PAGEID);
387 Assert(pVM->pgm.s.aHandyPages[iHandyPage].idSharedPage == NIL_GMM_PAGEID);
388
389 /*
390 * There are one or two action to be taken the next time we allocate handy pages:
391 * - Tell the GMM (global memory manager) what the page is being used for.
392 * (Speeds up replacement operations - sharing and defragmenting.)
393 * - If the current backing is shared, it must be freed.
394 */
395 const RTHCPHYS HCPhys = pVM->pgm.s.aHandyPages[iHandyPage].HCPhysGCPhys;
396 pVM->pgm.s.aHandyPages[iHandyPage].HCPhysGCPhys = GCPhys;
397
398 if (PGM_PAGE_IS_SHARED(pPage))
399 {
400 pVM->pgm.s.aHandyPages[iHandyPage].idSharedPage = PGM_PAGE_GET_PAGEID(pPage);
401 Assert(PGM_PAGE_GET_PAGEID(pPage) != NIL_GMM_PAGEID);
402 VM_FF_SET(pVM, VM_FF_PGM_NEED_HANDY_PAGES);
403
404 Log2(("PGM: Replaced shared page %#x at %RGp with %#x / %RHp\n", PGM_PAGE_GET_PAGEID(pPage),
405 GCPhys, pVM->pgm.s.aHandyPages[iHandyPage].idPage, HCPhys));
406 STAM_COUNTER_INC(&pVM->pgm.s.StatPageReplaceShared);
407 pVM->pgm.s.cSharedPages--;
408/** @todo err.. what about copying the page content? */
409 }
410 else
411 {
412 Log2(("PGM: Replaced zero page %RGp with %#x / %RHp\n", GCPhys, pVM->pgm.s.aHandyPages[iHandyPage].idPage, HCPhys));
413 STAM_COUNTER_INC(&pVM->pgm.s.StatPageReplaceZero);
414 pVM->pgm.s.cZeroPages--;
415/** @todo verify that the handy page is zero! */
416 }
417
418 /*
419 * Do the PGMPAGE modifications.
420 */
421 pVM->pgm.s.cPrivatePages++;
422 PGM_PAGE_SET_HCPHYS(pPage, HCPhys);
423 PGM_PAGE_SET_PAGEID(pPage, pVM->pgm.s.aHandyPages[iHandyPage].idPage);
424 PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ALLOCATED);
425
426 return VINF_SUCCESS;
427}
428
429
430/**
431 * Deal with pages that are not writable, i.e. not in the ALLOCATED state.
432 *
433 * @returns VBox status code.
434 * @retval VINF_SUCCESS on success.
435 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
436 *
437 * @param pVM The VM address.
438 * @param pPage The physical page tracking structure.
439 * @param GCPhys The address of the page.
440 *
441 * @remarks Called from within the PGM critical section.
442 */
443int pgmPhysPageMakeWritable(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys)
444{
445 switch (PGM_PAGE_GET_STATE(pPage))
446 {
447 case PGM_PAGE_STATE_WRITE_MONITORED:
448 PGM_PAGE_SET_WRITTEN_TO(pPage);
449 PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ALLOCATED);
450 /* fall thru */
451 default: /* to shut up GCC */
452 case PGM_PAGE_STATE_ALLOCATED:
453 return VINF_SUCCESS;
454
455 /*
456 * Zero pages can be dummy pages for MMIO or reserved memory,
457 * so we need to check the flags before joining cause with
458 * shared page replacement.
459 */
460 case PGM_PAGE_STATE_ZERO:
461 if ( PGM_PAGE_IS_MMIO(pPage)
462 || PGM_PAGE_IS_RESERVED(pPage))
463 return VERR_PGM_PHYS_PAGE_RESERVED;
464 /* fall thru */
465 case PGM_PAGE_STATE_SHARED:
466 return pgmPhysAllocPage(pVM, pPage, GCPhys);
467 }
468}
469
470
471/**
472 * Maps a page into the current virtual address space so it can be accessed.
473 *
474 * @returns VBox status code.
475 * @retval VINF_SUCCESS on success.
476 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
477 *
478 * @param pVM The VM address.
479 * @param pPage The physical page tracking structure.
480 * @param GCPhys The address of the page.
481 * @param ppMap Where to store the address of the mapping tracking structure.
482 * @param ppv Where to store the mapping address of the page. The page
483 * offset is masked off!
484 *
485 * @remarks Called from within the PGM critical section.
486 */
487int pgmPhysPageMap(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, PPPGMPAGEMAP ppMap, void **ppv)
488{
489#ifdef IN_GC
490 /*
491 * Just some sketchy GC code.
492 */
493 *ppMap = NULL;
494 RTHCPHYS HCPhys = PGM_PAGE_GET_HCPHYS(pPage);
495 Assert(HCPhys != pVM->pgm.s.HCPhysZeroPg);
496 return PGMGCDynMapHCPage(pVM, HCPhys, ppv);
497
498#else /* IN_RING3 || IN_RING0 */
499
500 /*
501 * Find/make Chunk TLB entry for the mapping chunk.
502 */
503 PPGMCHUNKR3MAP pMap;
504 const uint32_t idChunk = PGM_PAGE_GET_CHUNKID(pPage);
505 PPGMCHUNKR3MAPTLBE pTlbe = &pVM->pgm.s.ChunkR3Map.Tlb.aEntries[PGM_CHUNKR3MAPTLB_IDX(idChunk)];
506 if (pTlbe->idChunk == idChunk)
507 {
508 STAM_COUNTER_INC(&pVM->pgm.s.StatChunkR3MapTlbHits);
509 pMap = pTlbe->pChunk;
510 }
511 else if (idChunk != NIL_GMM_CHUNKID)
512 {
513 STAM_COUNTER_INC(&pVM->pgm.s.StatChunkR3MapTlbMisses);
514
515 /*
516 * Find the chunk, map it if necessary.
517 */
518 pMap = (PPGMCHUNKR3MAP)RTAvlU32Get(&pVM->pgm.s.ChunkR3Map.pTree, idChunk);
519 if (!pMap)
520 {
521#ifdef IN_RING0
522 int rc = VMMR0CallHost(pVM, VMMCALLHOST_PGM_MAP_CHUNK, idChunk);
523 AssertRCReturn(rc, rc);
524 pMap = (PPGMCHUNKR3MAP)RTAvlU32Get(&pVM->pgm.s.ChunkR3Map.pTree, idChunk);
525 Assert(pMap);
526#else
527 int rc = pgmR3PhysChunkMap(pVM, idChunk, &pMap);
528 if (VBOX_FAILURE(rc))
529 return rc;
530#endif
531 }
532
533 /*
534 * Enter it into the Chunk TLB.
535 */
536 pTlbe->idChunk = idChunk;
537 pTlbe->pChunk = pMap;
538 pMap->iAge = 0;
539 }
540 else
541 {
542 Assert(PGM_PAGE_IS_ZERO(pPage));
543 *ppv = pVM->pgm.s.CTXALLSUFF(pvZeroPg);
544 *ppMap = NULL;
545 return VINF_SUCCESS;
546 }
547
548 *ppv = (uint8_t *)pMap->pv + (PGM_PAGE_GET_PAGE_IN_CHUNK(pPage) << PAGE_SHIFT);
549 *ppMap = pMap;
550 return VINF_SUCCESS;
551#endif /* IN_RING3 */
552}
553
554
555#ifndef IN_GC
556/**
557 * Load a guest page into the ring-3 physical TLB.
558 *
559 * @returns VBox status code.
560 * @retval VINF_SUCCESS on success
561 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
562 * @param pPGM The PGM instance pointer.
563 * @param GCPhys The guest physical address in question.
564 */
565int pgmPhysPageLoadIntoTlb(PPGM pPGM, RTGCPHYS GCPhys)
566{
567 STAM_COUNTER_INC(&pPGM->CTXMID(StatPage,MapTlbMisses));
568
569 /*
570 * Find the ram range.
571 * 99.8% of requests are expected to be in the first range.
572 */
573 PPGMRAMRANGE pRam = CTXALLSUFF(pPGM->pRamRanges);
574 RTGCPHYS off = GCPhys - pRam->GCPhys;
575 if (RT_UNLIKELY(off >= pRam->cb))
576 {
577 do
578 {
579 pRam = CTXALLSUFF(pRam->pNext);
580 if (!pRam)
581 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
582 off = GCPhys - pRam->GCPhys;
583 } while (off >= pRam->cb);
584 }
585
586 /*
587 * Map the page.
588 * Make a special case for the zero page as it is kind of special.
589 */
590 PPGMPAGE pPage = &pRam->aPages[off >> PAGE_SHIFT];
591 PPGMPAGEMAPTLBE pTlbe = &pPGM->CTXSUFF(PhysTlb).aEntries[PGM_PAGEMAPTLB_IDX(GCPhys)];
592 if (!PGM_PAGE_IS_ZERO(pPage))
593 {
594 void *pv;
595 PPGMPAGEMAP pMap;
596 int rc = pgmPhysPageMap(PGM2VM(pPGM), pPage, GCPhys, &pMap, &pv);
597 if (VBOX_FAILURE(rc))
598 return rc;
599 pTlbe->pMap = pMap;
600 pTlbe->pv = pv;
601 }
602 else
603 {
604 Assert(PGM_PAGE_GET_HCPHYS(pPage) == pPGM->HCPhysZeroPg);
605 pTlbe->pMap = NULL;
606 pTlbe->pv = pPGM->CTXALLSUFF(pvZeroPg);
607 }
608 pTlbe->pPage = pPage;
609 return VINF_SUCCESS;
610}
611#endif /* !IN_GC */
612
613
614/**
615 * Requests the mapping of a guest page into the current context.
616 *
617 * This API should only be used for very short term, as it will consume
618 * scarse resources (R0 and GC) in the mapping cache. When you're done
619 * with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
620 *
621 * This API will assume your intention is to write to the page, and will
622 * therefore replace shared and zero pages. If you do not intend to modify
623 * the page, use the PGMPhysGCPhys2CCPtrReadOnly() API.
624 *
625 * @returns VBox status code.
626 * @retval VINF_SUCCESS on success.
627 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
628 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
629 *
630 * @param pVM The VM handle.
631 * @param GCPhys The guest physical address of the page that should be mapped.
632 * @param ppv Where to store the address corresponding to GCPhys.
633 * @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
634 *
635 * @remark Avoid calling this API from within critical sections (other than
636 * the PGM one) because of the deadlock risk.
637 * @thread Any thread.
638 */
639PGMDECL(int) PGMPhysGCPhys2CCPtr(PVM pVM, RTGCPHYS GCPhys, void **ppv, PPGMPAGEMAPLOCK pLock)
640{
641#ifdef VBOX_WITH_NEW_PHYS_CODE
642#ifdef IN_GC
643 /* Until a physical TLB is implemented for GC, let PGMGCDynMapGCPageEx handle it. */
644 return PGMGCDynMapGCPageEx(pVM, GCPhys, ppv);
645#else
646 int rc = pgmLock(pVM);
647 AssertRCReturn(rc);
648
649 /*
650 * Query the Physical TLB entry for the page (may fail).
651 */
652 PGMPHYSTLBE pTlbe;
653 int rc = pgmPhysPageQueryTlbe(&pVM->pgm.s, GCPhys, &pTlbe);
654 if (RT_SUCCESS(rc))
655 {
656 /*
657 * If the page is shared, the zero page, or being write monitored
658 * it must be converted to an page that's writable if possible.
659 */
660 PPGMPAGE pPage = pTlbe->pPage;
661 if (RT_UNLIKELY(PGM_PAGE_GET_STATE(pPage) != PGM_PAGE_STATE_ALLOCATED))
662 {
663 rc = pgmPhysPageMakeWritable(pVM, pPage, GCPhys);
664 /** @todo stuff is missing here! */
665 }
666 if (RT_SUCCESS(rc))
667 {
668 /*
669 * Now, just perform the locking and calculate the return address.
670 */
671 PPGMPAGEMAP pMap = pTlbe->pMap;
672 pMap->cRefs++;
673 if (RT_LIKELY(pPage->cLocks != PGM_PAGE_MAX_LOCKS))
674 if (RT_UNLIKELY(++pPage->cLocks == PGM_PAGE_MAX_LOCKS))
675 {
676 AssertMsgFailed(("%VGp is entering permanent locked state!\n", GCPhys));
677 pMap->cRefs++; /* Extra ref to prevent it from going away. */
678 }
679
680 *ppv = (void *)((uintptr_t)pTlbe->pv | (GCPhys & PAGE_OFFSET_MASK));
681 pLock->pvPage = pPage;
682 pLock->pvMap = pMap;
683 }
684 }
685
686 pgmUnlock(pVM);
687 return rc;
688
689#endif /* IN_RING3 || IN_RING0 */
690
691#else
692 /*
693 * Temporary fallback code.
694 */
695# ifdef IN_GC
696 return PGMGCDynMapGCPageEx(pVM, GCPhys, ppv);
697# else
698 return PGMPhysGCPhys2HCPtr(pVM, GCPhys, 1, ppv);
699# endif
700#endif
701}
702
703
704/**
705 * Requests the mapping of a guest page into the current context.
706 *
707 * This API should only be used for very short term, as it will consume
708 * scarse resources (R0 and GC) in the mapping cache. When you're done
709 * with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
710 *
711 * @returns VBox status code.
712 * @retval VINF_SUCCESS on success.
713 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
714 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
715 *
716 * @param pVM The VM handle.
717 * @param GCPhys The guest physical address of the page that should be mapped.
718 * @param ppv Where to store the address corresponding to GCPhys.
719 * @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
720 *
721 * @remark Avoid calling this API from within critical sections (other than
722 * the PGM one) because of the deadlock risk.
723 * @thread Any thread.
724 */
725PGMDECL(int) PGMPhysGCPhys2CCPtrReadOnly(PVM pVM, RTGCPHYS GCPhys, void const **ppv, PPGMPAGEMAPLOCK pLock)
726{
727 /** @todo implement this */
728 return PGMPhysGCPhys2CCPtr(pVM, GCPhys, (void **)ppv, pLock);
729}
730
731
732/**
733 * Requests the mapping of a guest page given by virtual address into the current context.
734 *
735 * This API should only be used for very short term, as it will consume
736 * scarse resources (R0 and GC) in the mapping cache. When you're done
737 * with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
738 *
739 * This API will assume your intention is to write to the page, and will
740 * therefore replace shared and zero pages. If you do not intend to modify
741 * the page, use the PGMPhysGCPtr2CCPtrReadOnly() API.
742 *
743 * @returns VBox status code.
744 * @retval VINF_SUCCESS on success.
745 * @retval VERR_PAGE_TABLE_NOT_PRESENT if the page directory for the virtual address isn't present.
746 * @retval VERR_PAGE_NOT_PRESENT if the page at the virtual address isn't present.
747 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
748 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
749 *
750 * @param pVM The VM handle.
751 * @param GCPhys The guest physical address of the page that should be mapped.
752 * @param ppv Where to store the address corresponding to GCPhys.
753 * @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
754 *
755 * @remark Avoid calling this API from within critical sections (other than
756 * the PGM one) because of the deadlock risk.
757 * @thread EMT
758 */
759PGMDECL(int) PGMPhysGCPtr2CCPtr(PVM pVM, RTGCPTR GCPtr, void **ppv, PPGMPAGEMAPLOCK pLock)
760{
761 RTGCPHYS GCPhys;
762 int rc = PGMPhysGCPtr2GCPhys(pVM, GCPtr, &GCPhys);
763 if (VBOX_SUCCESS(rc))
764 rc = PGMPhysGCPhys2CCPtr(pVM, GCPhys, ppv, pLock);
765 return rc;
766}
767
768
769/**
770 * Requests the mapping of a guest page given by virtual address into the current context.
771 *
772 * This API should only be used for very short term, as it will consume
773 * scarse resources (R0 and GC) in the mapping cache. When you're done
774 * with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
775 *
776 * @returns VBox status code.
777 * @retval VINF_SUCCESS on success.
778 * @retval VERR_PAGE_TABLE_NOT_PRESENT if the page directory for the virtual address isn't present.
779 * @retval VERR_PAGE_NOT_PRESENT if the page at the virtual address isn't present.
780 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
781 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
782 *
783 * @param pVM The VM handle.
784 * @param GCPhys The guest physical address of the page that should be mapped.
785 * @param ppv Where to store the address corresponding to GCPhys.
786 * @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
787 *
788 * @remark Avoid calling this API from within critical sections (other than
789 * the PGM one) because of the deadlock risk.
790 * @thread EMT
791 */
792PGMDECL(int) PGMPhysGCPtr2CCPtrReadOnly(PVM pVM, RTGCPTR GCPtr, void const **ppv, PPGMPAGEMAPLOCK pLock)
793{
794 RTGCPHYS GCPhys;
795 int rc = PGMPhysGCPtr2GCPhys(pVM, GCPtr, &GCPhys);
796 if (VBOX_SUCCESS(rc))
797 rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, GCPhys, ppv, pLock);
798 return rc;
799}
800
801
802/**
803 * Release the mapping of a guest page.
804 *
805 * This is the counter part of PGMPhysGCPhys2CCPtr, PGMPhysGCPhys2CCPtrReadOnly
806 * PGMPhysGCPtr2CCPtr and PGMPhysGCPtr2CCPtrReadOnly.
807 *
808 * @param pVM The VM handle.
809 * @param pLock The lock structure initialized by the mapping function.
810 */
811PGMDECL(void) PGMPhysReleasePageMappingLock(PVM pVM, PPGMPAGEMAPLOCK pLock)
812{
813#ifdef VBOX_WITH_NEW_PHYS_CODE
814#ifdef IN_GC
815 /* currently nothing to do here. */
816/* --- postponed
817#elif defined(IN_RING0)
818*/
819
820#else /* IN_RING3 */
821 pgmLock(pVM);
822
823 PPGMPAGE pPage = (PPGMPAGE)pLock->pvPage;
824 Assert(pPage->cLocks >= 1);
825 if (pPage->cLocks != PGM_PAGE_MAX_LOCKS)
826 pPage->cLocks--;
827
828 PPGMCHUNKR3MAP pChunk = (PPGMCHUNKR3MAP)pLock->pvChunk;
829 Assert(pChunk->cRefs >= 1);
830 pChunk->cRefs--;
831 pChunk->iAge = 0;
832
833 pgmUnlock(pVM);
834#endif /* IN_RING3 */
835#else
836 NOREF(pVM);
837 NOREF(pLock);
838#endif
839}
840
841
842/**
843 * Converts a GC physical address to a HC pointer.
844 *
845 * @returns VINF_SUCCESS on success.
846 * @returns VERR_PGM_PHYS_PAGE_RESERVED it it's a valid GC physical
847 * page but has no physical backing.
848 * @returns VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid
849 * GC physical address.
850 * @returns VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY if the range crosses
851 * a dynamic ram chunk boundary
852 * @param pVM The VM handle.
853 * @param GCPhys The GC physical address to convert.
854 * @param cbRange Physical range
855 * @param pHCPtr Where to store the HC pointer on success.
856 */
857PGMDECL(int) PGMPhysGCPhys2HCPtr(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR pHCPtr)
858{
859#ifdef VBOX_WITH_NEW_PHYS_CODE
860 VM_ASSERT_EMT(pVM); /* no longer safe for use outside the EMT thread! */
861#endif
862
863 if ((GCPhys & PGM_DYNAMIC_CHUNK_BASE_MASK) != ((GCPhys+cbRange-1) & PGM_DYNAMIC_CHUNK_BASE_MASK))
864 {
865 AssertMsgFailed(("%VGp - %VGp crosses a chunk boundary!!\n", GCPhys, GCPhys+cbRange));
866 LogRel(("PGMPhysGCPhys2HCPtr %VGp - %VGp crosses a chunk boundary!!\n", GCPhys, GCPhys+cbRange));
867 return VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY;
868 }
869
870 PPGMRAMRANGE pRam;
871 PPGMPAGE pPage;
872 int rc = pgmPhysGetPageAndRangeEx(&pVM->pgm.s, GCPhys, &pPage, &pRam);
873 if (VBOX_FAILURE(rc))
874 return rc;
875
876#ifndef PGM_IGNORE_RAM_FLAGS_RESERVED
877 if (RT_UNLIKELY(PGM_PAGE_IS_RESERVED(pPage)))
878 return VERR_PGM_PHYS_PAGE_RESERVED;
879#endif
880
881 RTGCPHYS off = GCPhys - pRam->GCPhys;
882 if (RT_UNLIKELY(off + cbRange > pRam->cb))
883 {
884 AssertMsgFailed(("%VGp - %VGp crosses a chunk boundary!!\n", GCPhys, GCPhys + cbRange));
885 return VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY;
886 }
887
888 if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
889 {
890 unsigned iChunk = (off >> PGM_DYNAMIC_CHUNK_SHIFT);
891 *pHCPtr = (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[iChunk] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
892 }
893 else if (RT_LIKELY(pRam->pvHC))
894 *pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
895 else
896 return VERR_PGM_PHYS_PAGE_RESERVED;
897 return VINF_SUCCESS;
898}
899
900
901/**
902 * Converts a guest pointer to a GC physical address.
903 *
904 * This uses the current CR3/CR0/CR4 of the guest.
905 *
906 * @returns VBox status code.
907 * @param pVM The VM Handle
908 * @param GCPtr The guest pointer to convert.
909 * @param pGCPhys Where to store the GC physical address.
910 */
911PGMDECL(int) PGMPhysGCPtr2GCPhys(PVM pVM, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
912{
913 int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, pGCPhys);
914 if (pGCPhys && VBOX_SUCCESS(rc))
915 *pGCPhys |= (RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK;
916 return rc;
917}
918
919
920/**
921 * Converts a guest pointer to a HC physical address.
922 *
923 * This uses the current CR3/CR0/CR4 of the guest.
924 *
925 * @returns VBox status code.
926 * @param pVM The VM Handle
927 * @param GCPtr The guest pointer to convert.
928 * @param pHCPhys Where to store the HC physical address.
929 */
930PGMDECL(int) PGMPhysGCPtr2HCPhys(PVM pVM, RTGCPTR GCPtr, PRTHCPHYS pHCPhys)
931{
932 RTGCPHYS GCPhys;
933 int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, &GCPhys);
934 if (VBOX_SUCCESS(rc))
935 rc = PGMPhysGCPhys2HCPhys(pVM, GCPhys | ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), pHCPhys);
936 return rc;
937}
938
939
940/**
941 * Converts a guest pointer to a HC pointer.
942 *
943 * This uses the current CR3/CR0/CR4 of the guest.
944 *
945 * @returns VBox status code.
946 * @param pVM The VM Handle
947 * @param GCPtr The guest pointer to convert.
948 * @param pHCPtr Where to store the HC virtual address.
949 */
950PGMDECL(int) PGMPhysGCPtr2HCPtr(PVM pVM, RTGCPTR GCPtr, PRTHCPTR pHCPtr)
951{
952#ifdef VBOX_WITH_NEW_PHYS_CODE
953 VM_ASSERT_EMT(pVM); /* no longer safe for use outside the EMT thread! */
954#endif
955
956 RTGCPHYS GCPhys;
957 int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, &GCPhys);
958 if (VBOX_SUCCESS(rc))
959 rc = PGMPhysGCPhys2HCPtr(pVM, GCPhys | ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), 1 /* we always stay within one page */, pHCPtr);
960 return rc;
961}
962
963
964/**
965 * Converts a guest virtual address to a HC pointer by specfied CR3 and flags.
966 *
967 * @returns VBox status code.
968 * @param pVM The VM Handle
969 * @param GCPtr The guest pointer to convert.
970 * @param cr3 The guest CR3.
971 * @param fFlags Flags used for interpreting the PD correctly: X86_CR4_PSE and X86_CR4_PAE
972 * @param pHCPtr Where to store the HC pointer.
973 *
974 * @remark This function is used by the REM at a time where PGM could
975 * potentially not be in sync. It could also be used by a
976 * future DBGF API to cpu state independent conversions.
977 */
978PGMDECL(int) PGMPhysGCPtr2HCPtrByGstCR3(PVM pVM, RTGCPTR GCPtr, uint64_t cr3, unsigned fFlags, PRTHCPTR pHCPtr)
979{
980#ifdef VBOX_WITH_NEW_PHYS_CODE
981 VM_ASSERT_EMT(pVM); /* no longer safe for use outside the EMT thread! */
982#endif
983 /*
984 * PAE or 32-bit?
985 */
986 int rc;
987 if (!(fFlags & X86_CR4_PAE))
988 {
989 PX86PD pPD;
990 rc = PGM_GCPHYS_2_PTR(pVM, cr3 & X86_CR3_PAGE_MASK, &pPD);
991 if (VBOX_SUCCESS(rc))
992 {
993 X86PDE Pde = pPD->a[(RTGCUINTPTR)GCPtr >> X86_PD_SHIFT];
994 if (Pde.n.u1Present)
995 {
996 if ((fFlags & X86_CR4_PSE) && Pde.b.u1Size)
997 { /* (big page) */
998 rc = PGMPhysGCPhys2HCPtr(pVM, (Pde.u & X86_PDE4M_PG_MASK) | ((RTGCUINTPTR)GCPtr & X86_PAGE_4M_OFFSET_MASK), 1 /* we always stay within one page */, pHCPtr);
999 }
1000 else
1001 { /* (normal page) */
1002 PX86PT pPT;
1003 rc = PGM_GCPHYS_2_PTR(pVM, Pde.u & X86_PDE_PG_MASK, &pPT);
1004 if (VBOX_SUCCESS(rc))
1005 {
1006 X86PTE Pte = pPT->a[((RTGCUINTPTR)GCPtr >> X86_PT_SHIFT) & X86_PT_MASK];
1007 if (Pte.n.u1Present)
1008 return PGMPhysGCPhys2HCPtr(pVM, (Pte.u & X86_PTE_PG_MASK) | ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), 1 /* we always stay within one page */, pHCPtr);
1009 rc = VERR_PAGE_NOT_PRESENT;
1010 }
1011 }
1012 }
1013 else
1014 rc = VERR_PAGE_TABLE_NOT_PRESENT;
1015 }
1016 }
1017 else
1018 {
1019 /** @todo long mode! */
1020 Assert(PGMGetGuestMode(pVM) < PGMMODE_AMD64);
1021
1022 PX86PDPT pPdpt;
1023 rc = PGM_GCPHYS_2_PTR(pVM, cr3 & X86_CR3_PAE_PAGE_MASK, &pPdpt);
1024 if (VBOX_SUCCESS(rc))
1025 {
1026 X86PDPE Pdpe = pPdpt->a[((RTGCUINTPTR)GCPtr >> X86_PDPT_SHIFT) & X86_PDPT_MASK_PAE];
1027 if (Pdpe.n.u1Present)
1028 {
1029 PX86PDPAE pPD;
1030 rc = PGM_GCPHYS_2_PTR(pVM, Pdpe.u & X86_PDPE_PG_MASK, &pPD);
1031 if (VBOX_SUCCESS(rc))
1032 {
1033 X86PDEPAE Pde = pPD->a[((RTGCUINTPTR)GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK];
1034 if (Pde.n.u1Present)
1035 {
1036 if ((fFlags & X86_CR4_PSE) && Pde.b.u1Size)
1037 { /* (big page) */
1038 rc = PGMPhysGCPhys2HCPtr(pVM, (Pde.u & X86_PDE2M_PAE_PG_MASK) | ((RTGCUINTPTR)GCPtr & X86_PAGE_2M_OFFSET_MASK), 1 /* we always stay within one page */, pHCPtr);
1039 }
1040 else
1041 { /* (normal page) */
1042 PX86PTPAE pPT;
1043 rc = PGM_GCPHYS_2_PTR(pVM, (Pde.u & X86_PDE_PAE_PG_MASK), &pPT);
1044 if (VBOX_SUCCESS(rc))
1045 {
1046 X86PTEPAE Pte = pPT->a[((RTGCUINTPTR)GCPtr >> X86_PT_PAE_SHIFT) & X86_PT_PAE_MASK];
1047 if (Pte.n.u1Present)
1048 return PGMPhysGCPhys2HCPtr(pVM, (Pte.u & X86_PTE_PAE_PG_MASK) | ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), 1 /* we always stay within one page */, pHCPtr);
1049 rc = VERR_PAGE_NOT_PRESENT;
1050 }
1051 }
1052 }
1053 else
1054 rc = VERR_PAGE_TABLE_NOT_PRESENT;
1055 }
1056 }
1057 else
1058 rc = VERR_PAGE_TABLE_NOT_PRESENT;
1059 }
1060 }
1061 return rc;
1062}
1063
1064
1065#undef LOG_GROUP
1066#define LOG_GROUP LOG_GROUP_PGM_PHYS_ACCESS
1067
1068
1069#ifdef IN_RING3
1070/**
1071 * Cache PGMPhys memory access
1072 *
1073 * @param pVM VM Handle.
1074 * @param pCache Cache structure pointer
1075 * @param GCPhys GC physical address
1076 * @param pbHC HC pointer corresponding to physical page
1077 *
1078 * @thread EMT.
1079 */
1080static void pgmPhysCacheAdd(PVM pVM, PGMPHYSCACHE *pCache, RTGCPHYS GCPhys, uint8_t *pbHC)
1081{
1082 uint32_t iCacheIndex;
1083
1084 Assert(VM_IS_EMT(pVM));
1085
1086 GCPhys = PHYS_PAGE_ADDRESS(GCPhys);
1087 pbHC = (uint8_t *)PAGE_ADDRESS(pbHC);
1088
1089 iCacheIndex = ((GCPhys >> PAGE_SHIFT) & PGM_MAX_PHYSCACHE_ENTRIES_MASK);
1090
1091 ASMBitSet(&pCache->aEntries, iCacheIndex);
1092
1093 pCache->Entry[iCacheIndex].GCPhys = GCPhys;
1094 pCache->Entry[iCacheIndex].pbHC = pbHC;
1095}
1096#endif
1097
1098/**
1099 * Read physical memory.
1100 *
1101 * This API respects access handlers and MMIO. Use PGMPhysReadGCPhys() if you
1102 * want to ignore those.
1103 *
1104 * @param pVM VM Handle.
1105 * @param GCPhys Physical address start reading from.
1106 * @param pvBuf Where to put the read bits.
1107 * @param cbRead How many bytes to read.
1108 */
1109PGMDECL(void) PGMPhysRead(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
1110{
1111#ifdef IN_RING3
1112 bool fGrabbedLock = false;
1113#endif
1114
1115 AssertMsg(cbRead > 0, ("don't even think about reading zero bytes!\n"));
1116 if (cbRead == 0)
1117 return;
1118
1119 LogFlow(("PGMPhysRead: %VGp %d\n", GCPhys, cbRead));
1120
1121#ifdef IN_RING3
1122 if (!VM_IS_EMT(pVM))
1123 {
1124 pgmLock(pVM);
1125 fGrabbedLock = true;
1126 }
1127#endif
1128
1129 /*
1130 * Copy loop on ram ranges.
1131 */
1132 PPGMRAMRANGE pRam = CTXALLSUFF(pVM->pgm.s.pRamRanges);
1133 for (;;)
1134 {
1135 /* Find range. */
1136 while (pRam && GCPhys > pRam->GCPhysLast)
1137 pRam = CTXALLSUFF(pRam->pNext);
1138 /* Inside range or not? */
1139 if (pRam && GCPhys >= pRam->GCPhys)
1140 {
1141 /*
1142 * Must work our way thru this page by page.
1143 */
1144 RTGCPHYS off = GCPhys - pRam->GCPhys;
1145 while (off < pRam->cb)
1146 {
1147 unsigned iPage = off >> PAGE_SHIFT;
1148 PPGMPAGE pPage = &pRam->aPages[iPage];
1149 size_t cb;
1150
1151 /* Physical chunk in dynamically allocated range not present? */
1152 if (RT_UNLIKELY(!PGM_PAGE_GET_HCPHYS(pPage)))
1153 {
1154 /* Treat it as reserved; return zeros */
1155 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1156 if (cb >= cbRead)
1157 {
1158 memset(pvBuf, 0, cbRead);
1159 goto end;
1160 }
1161 memset(pvBuf, 0, cb);
1162 }
1163 /* temp hacks, will be reorganized. */
1164 /*
1165 * Physical handler.
1166 */
1167 else if ( RT_UNLIKELY(PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) >= PGM_PAGE_HNDL_PHYS_STATE_ALL)
1168 && !(pPage->HCPhys & MM_RAM_FLAGS_MMIO)) /// @todo PAGE FLAGS
1169 {
1170 int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1171 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1172
1173#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
1174 /* find and call the handler */
1175 PPGMPHYSHANDLER pNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesHC->PhysHandlers, GCPhys);
1176 if (pNode && pNode->pfnHandlerR3)
1177 {
1178 size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
1179 if (cbRange < cb)
1180 cb = cbRange;
1181 if (cb > cbRead)
1182 cb = cbRead;
1183
1184 void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1185
1186 /** @note Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1187 rc = pNode->pfnHandlerR3(pVM, GCPhys, pvSrc, pvBuf, cb, PGMACCESSTYPE_READ, pNode->pvUserR3);
1188 }
1189#endif /* IN_RING3 */
1190 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1191 {
1192#ifdef IN_GC
1193 void *pvSrc = NULL;
1194 PGMGCDynMapHCPage(pVM, PGM_PAGE_GET_HCPHYS(pPage), &pvSrc);
1195 pvSrc = (char *)pvSrc + (off & PAGE_OFFSET_MASK);
1196#else
1197 void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1198#endif
1199
1200 if (cb >= cbRead)
1201 {
1202 memcpy(pvBuf, pvSrc, cbRead);
1203 goto end;
1204 }
1205 memcpy(pvBuf, pvSrc, cb);
1206 }
1207 else if (cb >= cbRead)
1208 goto end;
1209 }
1210 /*
1211 * Virtual handlers.
1212 */
1213 else if ( RT_UNLIKELY(PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) >= PGM_PAGE_HNDL_VIRT_STATE_ALL)
1214 && !(pPage->HCPhys & MM_RAM_FLAGS_MMIO)) /// @todo PAGE FLAGS
1215 {
1216 int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1217 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1218#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
1219 /* Search the whole tree for matching physical addresses (rather expensive!) */
1220 PPGMVIRTHANDLER pNode;
1221 unsigned iPage;
1222 int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pNode, &iPage);
1223 if (VBOX_SUCCESS(rc2) && pNode->pfnHandlerHC)
1224 {
1225 size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
1226 if (cbRange < cb)
1227 cb = cbRange;
1228 if (cb > cbRead)
1229 cb = cbRead;
1230 RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pNode->GCPtr & PAGE_BASE_GC_MASK)
1231 + (iPage << PAGE_SHIFT) + (off & PAGE_OFFSET_MASK);
1232
1233 void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1234
1235 /** @note Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1236 rc = pNode->pfnHandlerHC(pVM, (RTGCPTR)GCPtr, pvSrc, pvBuf, cb, PGMACCESSTYPE_READ, 0);
1237 }
1238#endif /* IN_RING3 */
1239 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1240 {
1241#ifdef IN_GC
1242 void *pvSrc = NULL;
1243 PGMGCDynMapHCPage(pVM, PGM_PAGE_GET_HCPHYS(pPage), &pvSrc);
1244 pvSrc = (char *)pvSrc + (off & PAGE_OFFSET_MASK);
1245#else
1246 void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1247#endif
1248 if (cb >= cbRead)
1249 {
1250 memcpy(pvBuf, pvSrc, cbRead);
1251 goto end;
1252 }
1253 memcpy(pvBuf, pvSrc, cb);
1254 }
1255 else if (cb >= cbRead)
1256 goto end;
1257 }
1258 else
1259 {
1260 switch (pPage->HCPhys & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_ROM)) /** @todo PAGE FLAGS */
1261 {
1262 /*
1263 * Normal memory or ROM.
1264 */
1265 case 0:
1266 case MM_RAM_FLAGS_ROM:
1267 case MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_RESERVED:
1268 //case MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_MMIO2: /* = shadow */ - //MMIO2 isn't in the mask.
1269 case MM_RAM_FLAGS_MMIO2: // MMIO2 isn't in the mask.
1270 {
1271#ifdef IN_GC
1272 void *pvSrc = NULL;
1273 PGMGCDynMapHCPage(pVM, PGM_PAGE_GET_HCPHYS(pPage), &pvSrc);
1274 pvSrc = (char *)pvSrc + (off & PAGE_OFFSET_MASK);
1275#else
1276 void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1277#endif
1278 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1279 if (cb >= cbRead)
1280 {
1281#if defined(IN_RING3) && defined(PGM_PHYSMEMACCESS_CACHING)
1282 if (cbRead <= 4 && !fGrabbedLock /* i.e. EMT */)
1283 pgmPhysCacheAdd(pVM, &pVM->pgm.s.pgmphysreadcache, GCPhys, (uint8_t*)pvSrc);
1284#endif /* IN_RING3 && PGM_PHYSMEMACCESS_CACHING */
1285 memcpy(pvBuf, pvSrc, cbRead);
1286 goto end;
1287 }
1288 memcpy(pvBuf, pvSrc, cb);
1289 break;
1290 }
1291
1292 /*
1293 * All reserved, nothing there.
1294 */
1295 case MM_RAM_FLAGS_RESERVED:
1296 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1297 if (cb >= cbRead)
1298 {
1299 memset(pvBuf, 0, cbRead);
1300 goto end;
1301 }
1302 memset(pvBuf, 0, cb);
1303 break;
1304
1305 /*
1306 * The rest needs to be taken more carefully.
1307 */
1308 default:
1309#if 1 /** @todo r=bird: Can you do this properly please. */
1310 /** @todo Try MMIO; quick hack */
1311 if (cbRead <= 4 && IOMMMIORead(pVM, GCPhys, (uint32_t *)pvBuf, cbRead) == VINF_SUCCESS)
1312 goto end;
1313#endif
1314
1315 /** @todo fix me later. */
1316 AssertReleaseMsgFailed(("Unknown read at %VGp size %d implement the complex physical reading case %x\n",
1317 GCPhys, cbRead,
1318 pPage->HCPhys & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_ROM))); /** @todo PAGE FLAGS */
1319 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1320 break;
1321 }
1322 }
1323 cbRead -= cb;
1324 off += cb;
1325 pvBuf = (char *)pvBuf + cb;
1326 }
1327
1328 GCPhys = pRam->GCPhysLast + 1;
1329 }
1330 else
1331 {
1332 LogFlow(("PGMPhysRead: Unassigned %VGp size=%d\n", GCPhys, cbRead));
1333
1334 /*
1335 * Unassigned address space.
1336 */
1337 size_t cb;
1338 if ( !pRam
1339 || (cb = pRam->GCPhys - GCPhys) >= cbRead)
1340 {
1341 memset(pvBuf, 0, cbRead);
1342 goto end;
1343 }
1344
1345 memset(pvBuf, 0, cb);
1346 cbRead -= cb;
1347 pvBuf = (char *)pvBuf + cb;
1348 GCPhys += cb;
1349 }
1350 }
1351end:
1352#ifdef IN_RING3
1353 if (fGrabbedLock)
1354 pgmUnlock(pVM);
1355#endif
1356 return;
1357}
1358
1359/**
1360 * Write to physical memory.
1361 *
1362 * This API respects access handlers and MMIO. Use PGMPhysReadGCPhys() if you
1363 * want to ignore those.
1364 *
1365 * @param pVM VM Handle.
1366 * @param GCPhys Physical address to write to.
1367 * @param pvBuf What to write.
1368 * @param cbWrite How many bytes to write.
1369 */
1370PGMDECL(void) PGMPhysWrite(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
1371{
1372#ifdef IN_RING3
1373 bool fGrabbedLock = false;
1374#endif
1375
1376 AssertMsg(!pVM->pgm.s.fNoMorePhysWrites, ("Calling PGMPhysWrite after pgmR3Save()!\n"));
1377 AssertMsg(cbWrite > 0, ("don't even think about writing zero bytes!\n"));
1378 if (cbWrite == 0)
1379 return;
1380
1381 LogFlow(("PGMPhysWrite: %VGp %d\n", GCPhys, cbWrite));
1382
1383#ifdef IN_RING3
1384 if (!VM_IS_EMT(pVM))
1385 {
1386 pgmLock(pVM);
1387 fGrabbedLock = true;
1388 }
1389#endif
1390 /*
1391 * Copy loop on ram ranges.
1392 */
1393 PPGMRAMRANGE pRam = CTXALLSUFF(pVM->pgm.s.pRamRanges);
1394 for (;;)
1395 {
1396 /* Find range. */
1397 while (pRam && GCPhys > pRam->GCPhysLast)
1398 pRam = CTXALLSUFF(pRam->pNext);
1399 /* Inside range or not? */
1400 if (pRam && GCPhys >= pRam->GCPhys)
1401 {
1402 /*
1403 * Must work our way thru this page by page.
1404 */
1405 unsigned off = GCPhys - pRam->GCPhys;
1406 while (off < pRam->cb)
1407 {
1408 unsigned iPage = off >> PAGE_SHIFT;
1409 PPGMPAGE pPage = &pRam->aPages[iPage];
1410
1411 /* Physical chunk in dynamically allocated range not present? */
1412 if (RT_UNLIKELY(!PGM_PAGE_GET_HCPHYS(pPage)))
1413 {
1414 int rc;
1415#ifdef IN_RING3
1416 if (fGrabbedLock)
1417 {
1418 pgmUnlock(pVM);
1419 rc = pgmr3PhysGrowRange(pVM, GCPhys);
1420 if (rc == VINF_SUCCESS)
1421 PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite); /* try again; can't assume pRam is still valid (paranoia) */
1422 return;
1423 }
1424 rc = pgmr3PhysGrowRange(pVM, GCPhys);
1425#else
1426 rc = CTXALLMID(VMM, CallHost)(pVM, VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
1427#endif
1428 if (rc != VINF_SUCCESS)
1429 goto end;
1430 }
1431
1432 size_t cb;
1433 /* temporary hack, will reogranize is later. */
1434 /*
1435 * Virtual handlers
1436 */
1437 if ( PGM_PAGE_HAS_ACTIVE_VIRTUAL_HANDLERS(pPage)
1438 && !(pPage->HCPhys & MM_RAM_FLAGS_MMIO)) /// @todo PAGE FLAGS
1439 {
1440 if (PGM_PAGE_HAS_ACTIVE_PHYSICAL_HANDLERS(pPage))
1441 {
1442 /*
1443 * Physical write handler + virtual write handler.
1444 * Consider this a quick workaround for the CSAM + shadow caching problem.
1445 *
1446 * We hand it to the shadow caching first since it requires the unchanged
1447 * data. CSAM will have to put up with it already being changed.
1448 */
1449 int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1450 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1451#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
1452 /* 1. The physical handler */
1453 PPGMPHYSHANDLER pPhysNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesHC->PhysHandlers, GCPhys);
1454 if (pPhysNode && pPhysNode->pfnHandlerR3)
1455 {
1456 size_t cbRange = pPhysNode->Core.KeyLast - GCPhys + 1;
1457 if (cbRange < cb)
1458 cb = cbRange;
1459 if (cb > cbWrite)
1460 cb = cbWrite;
1461
1462 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1463
1464 /** @note Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1465 rc = pPhysNode->pfnHandlerR3(pVM, GCPhys, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, pPhysNode->pvUserR3);
1466 }
1467
1468 /* 2. The virtual handler (will see incorrect data) */
1469 PPGMVIRTHANDLER pVirtNode;
1470 unsigned iPage;
1471 int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pVirtNode, &iPage);
1472 if (VBOX_SUCCESS(rc2) && pVirtNode->pfnHandlerHC)
1473 {
1474 size_t cbRange = pVirtNode->Core.KeyLast - GCPhys + 1;
1475 if (cbRange < cb)
1476 cb = cbRange;
1477 if (cb > cbWrite)
1478 cb = cbWrite;
1479 RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pVirtNode->GCPtr & PAGE_BASE_GC_MASK)
1480 + (iPage << PAGE_SHIFT) + (off & PAGE_OFFSET_MASK);
1481
1482 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1483
1484 /** @note Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1485 rc2 = pVirtNode->pfnHandlerHC(pVM, (RTGCPTR)GCPtr, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, 0);
1486 if ( ( rc2 != VINF_PGM_HANDLER_DO_DEFAULT
1487 && rc == VINF_PGM_HANDLER_DO_DEFAULT)
1488 || ( VBOX_FAILURE(rc2)
1489 && VBOX_SUCCESS(rc)))
1490 rc = rc2;
1491 }
1492#endif /* IN_RING3 */
1493 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1494 {
1495#ifdef IN_GC
1496 void *pvDst = NULL;
1497 PGMGCDynMapHCPage(pVM, PGM_PAGE_GET_HCPHYS(pPage), &pvDst);
1498 pvDst = (char *)pvDst + (off & PAGE_OFFSET_MASK);
1499#else
1500 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1501#endif
1502 if (cb >= cbWrite)
1503 {
1504 memcpy(pvDst, pvBuf, cbWrite);
1505 goto end;
1506 }
1507 memcpy(pvDst, pvBuf, cb);
1508 }
1509 else if (cb >= cbWrite)
1510 goto end;
1511 }
1512 else
1513 {
1514 int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1515 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1516#ifdef IN_RING3
1517/** @todo deal with this in GC and R0! */
1518 /* Search the whole tree for matching physical addresses (rather expensive!) */
1519 PPGMVIRTHANDLER pNode;
1520 unsigned iPage;
1521 int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pNode, &iPage);
1522 if (VBOX_SUCCESS(rc2) && pNode->pfnHandlerHC)
1523 {
1524 size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
1525 if (cbRange < cb)
1526 cb = cbRange;
1527 if (cb > cbWrite)
1528 cb = cbWrite;
1529 RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pNode->GCPtr & PAGE_BASE_GC_MASK)
1530 + (iPage << PAGE_SHIFT) + (off & PAGE_OFFSET_MASK);
1531
1532 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1533
1534 /** @tode Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1535 rc = pNode->pfnHandlerHC(pVM, (RTGCPTR)GCPtr, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, 0);
1536 }
1537#endif /* IN_RING3 */
1538 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1539 {
1540#ifdef IN_GC
1541 void *pvDst = NULL;
1542 PGMGCDynMapHCPage(pVM, PGM_PAGE_GET_HCPHYS(pPage), &pvDst);
1543 pvDst = (char *)pvDst + (off & PAGE_OFFSET_MASK);
1544#else
1545 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1546#endif
1547 if (cb >= cbWrite)
1548 {
1549 memcpy(pvDst, pvBuf, cbWrite);
1550 goto end;
1551 }
1552 memcpy(pvDst, pvBuf, cb);
1553 }
1554 else if (cb >= cbWrite)
1555 goto end;
1556 }
1557 }
1558 /*
1559 * Physical handler.
1560 */
1561 else if ( RT_UNLIKELY(PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) >= PGM_PAGE_HNDL_PHYS_STATE_WRITE)
1562 && !(pPage->HCPhys & MM_RAM_FLAGS_MMIO)) /// @todo PAGE FLAGS
1563 {
1564 int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1565 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1566#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
1567 /* find and call the handler */
1568 PPGMPHYSHANDLER pNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesHC->PhysHandlers, GCPhys);
1569 if (pNode && pNode->pfnHandlerR3)
1570 {
1571 size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
1572 if (cbRange < cb)
1573 cb = cbRange;
1574 if (cb > cbWrite)
1575 cb = cbWrite;
1576
1577 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1578
1579 /** @todo Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1580 rc = pNode->pfnHandlerR3(pVM, GCPhys, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, pNode->pvUserR3);
1581 }
1582#endif /* IN_RING3 */
1583 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1584 {
1585#ifdef IN_GC
1586 void *pvDst = NULL;
1587 PGMGCDynMapHCPage(pVM, PGM_PAGE_GET_HCPHYS(pPage), &pvDst);
1588 pvDst = (char *)pvDst + (off & PAGE_OFFSET_MASK);
1589#else
1590 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1591#endif
1592 if (cb >= cbWrite)
1593 {
1594 memcpy(pvDst, pvBuf, cbWrite);
1595 goto end;
1596 }
1597 memcpy(pvDst, pvBuf, cb);
1598 }
1599 else if (cb >= cbWrite)
1600 goto end;
1601 }
1602 else
1603 {
1604 /** @todo r=bird: missing MM_RAM_FLAGS_ROM here, we shall not allow anyone to overwrite the ROM! */
1605 switch (pPage->HCPhys & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_MMIO2)) /** @todo PAGE FLAGS */
1606 {
1607 /*
1608 * Normal memory, MMIO2 or writable shadow ROM.
1609 */
1610 case 0:
1611 case MM_RAM_FLAGS_MMIO2:
1612 case MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_MMIO2: /* shadow rom */
1613 {
1614#ifdef IN_GC
1615 void *pvDst = NULL;
1616 PGMGCDynMapHCPage(pVM, PGM_PAGE_GET_HCPHYS(pPage), &pvDst);
1617 pvDst = (char *)pvDst + (off & PAGE_OFFSET_MASK);
1618#else
1619 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1620#endif
1621 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1622 if (cb >= cbWrite)
1623 {
1624#if defined(IN_RING3) && defined(PGM_PHYSMEMACCESS_CACHING)
1625 if (cbWrite <= 4 && !fGrabbedLock /* i.e. EMT */)
1626 pgmPhysCacheAdd(pVM, &pVM->pgm.s.pgmphyswritecache, GCPhys, (uint8_t*)pvDst);
1627#endif /* IN_RING3 && PGM_PHYSMEMACCESS_CACHING */
1628 memcpy(pvDst, pvBuf, cbWrite);
1629 goto end;
1630 }
1631 memcpy(pvDst, pvBuf, cb);
1632 break;
1633 }
1634
1635 /*
1636 * All reserved, nothing there.
1637 */
1638 case MM_RAM_FLAGS_RESERVED:
1639 case MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO2:
1640 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1641 if (cb >= cbWrite)
1642 goto end;
1643 break;
1644
1645
1646 /*
1647 * The rest needs to be taken more carefully.
1648 */
1649 default:
1650#if 1 /** @todo r=bird: Can you do this properly please. */
1651 /** @todo Try MMIO; quick hack */
1652 if (cbWrite <= 4 && IOMMMIOWrite(pVM, GCPhys, *(uint32_t *)pvBuf, cbWrite) == VINF_SUCCESS)
1653 goto end;
1654#endif
1655
1656 /** @todo fix me later. */
1657 AssertReleaseMsgFailed(("Unknown write at %VGp size %d implement the complex physical writing case %x\n",
1658 GCPhys, cbWrite,
1659 (pPage->HCPhys & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_MMIO2)))); /** @todo PAGE FLAGS */
1660 /* skip the write */
1661 cb = cbWrite;
1662 break;
1663 }
1664 }
1665
1666 cbWrite -= cb;
1667 off += cb;
1668 pvBuf = (const char *)pvBuf + cb;
1669 }
1670
1671 GCPhys = pRam->GCPhysLast + 1;
1672 }
1673 else
1674 {
1675 /*
1676 * Unassigned address space.
1677 */
1678 size_t cb;
1679 if ( !pRam
1680 || (cb = pRam->GCPhys - GCPhys) >= cbWrite)
1681 goto end;
1682
1683 cbWrite -= cb;
1684 pvBuf = (const char *)pvBuf + cb;
1685 GCPhys += cb;
1686 }
1687 }
1688end:
1689#ifdef IN_RING3
1690 if (fGrabbedLock)
1691 pgmUnlock(pVM);
1692#endif
1693 return;
1694}
1695
1696#ifndef IN_GC /* Ring 0 & 3 only */
1697
1698/**
1699 * Read from guest physical memory by GC physical address, bypassing
1700 * MMIO and access handlers.
1701 *
1702 * @returns VBox status.
1703 * @param pVM VM handle.
1704 * @param pvDst The destination address.
1705 * @param GCPhysSrc The source address (GC physical address).
1706 * @param cb The number of bytes to read.
1707 */
1708PGMDECL(int) PGMPhysReadGCPhys(PVM pVM, void *pvDst, RTGCPHYS GCPhysSrc, size_t cb)
1709{
1710 /*
1711 * Anything to be done?
1712 */
1713 if (!cb)
1714 return VINF_SUCCESS;
1715
1716 /*
1717 * Loop ram ranges.
1718 */
1719 for (PPGMRAMRANGE pRam = CTXALLSUFF(pVM->pgm.s.pRamRanges);
1720 pRam;
1721 pRam = CTXALLSUFF(pRam->pNext))
1722 {
1723 RTGCPHYS off = GCPhysSrc - pRam->GCPhys;
1724 if (off < pRam->cb)
1725 {
1726 if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
1727 {
1728 /* Copy page by page as we're not dealing with a linear HC range. */
1729 for (;;)
1730 {
1731 /* convert */
1732 void *pvSrc;
1733 int rc = pgmRamGCPhys2HCPtrWithRange(pVM, pRam, GCPhysSrc, &pvSrc);
1734 if (VBOX_FAILURE(rc))
1735 return rc;
1736
1737 /* copy */
1738 size_t cbRead = PAGE_SIZE - ((RTGCUINTPTR)GCPhysSrc & PAGE_OFFSET_MASK);
1739 if (cbRead >= cb)
1740 {
1741 memcpy(pvDst, pvSrc, cb);
1742 return VINF_SUCCESS;
1743 }
1744 memcpy(pvDst, pvSrc, cbRead);
1745
1746 /* next */
1747 cb -= cbRead;
1748 pvDst = (uint8_t *)pvDst + cbRead;
1749 GCPhysSrc += cbRead;
1750 }
1751 }
1752 else if (pRam->pvHC)
1753 {
1754 /* read */
1755 size_t cbRead = pRam->cb - off;
1756 if (cbRead >= cb)
1757 {
1758 memcpy(pvDst, (uint8_t *)pRam->pvHC + off, cb);
1759 return VINF_SUCCESS;
1760 }
1761 memcpy(pvDst, (uint8_t *)pRam->pvHC + off, cbRead);
1762
1763 /* next */
1764 cb -= cbRead;
1765 pvDst = (uint8_t *)pvDst + cbRead;
1766 GCPhysSrc += cbRead;
1767 }
1768 else
1769 return VERR_PGM_PHYS_PAGE_RESERVED;
1770 }
1771 else if (GCPhysSrc < pRam->GCPhysLast)
1772 break;
1773 }
1774 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1775}
1776
1777
1778/**
1779 * Write to guest physical memory referenced by GC pointer.
1780 * Write memory to GC physical address in guest physical memory.
1781 *
1782 * This will bypass MMIO and access handlers.
1783 *
1784 * @returns VBox status.
1785 * @param pVM VM handle.
1786 * @param GCPhysDst The GC physical address of the destination.
1787 * @param pvSrc The source buffer.
1788 * @param cb The number of bytes to write.
1789 */
1790PGMDECL(int) PGMPhysWriteGCPhys(PVM pVM, RTGCPHYS GCPhysDst, const void *pvSrc, size_t cb)
1791{
1792 /*
1793 * Anything to be done?
1794 */
1795 if (!cb)
1796 return VINF_SUCCESS;
1797
1798 LogFlow(("PGMPhysWriteGCPhys: %VGp %d\n", GCPhysDst, cb));
1799
1800 /*
1801 * Loop ram ranges.
1802 */
1803 for (PPGMRAMRANGE pRam = CTXALLSUFF(pVM->pgm.s.pRamRanges);
1804 pRam;
1805 pRam = CTXALLSUFF(pRam->pNext))
1806 {
1807 RTGCPHYS off = GCPhysDst - pRam->GCPhys;
1808 if (off < pRam->cb)
1809 {
1810#ifdef VBOX_WITH_NEW_PHYS_CODE
1811/** @todo PGMRamGCPhys2HCPtrWithRange. */
1812#endif
1813 if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
1814 {
1815 /* Copy page by page as we're not dealing with a linear HC range. */
1816 for (;;)
1817 {
1818 /* convert */
1819 void *pvDst;
1820 int rc = pgmRamGCPhys2HCPtrWithRange(pVM, pRam, GCPhysDst, &pvDst);
1821 if (VBOX_FAILURE(rc))
1822 return rc;
1823
1824 /* copy */
1825 size_t cbWrite = PAGE_SIZE - ((RTGCUINTPTR)GCPhysDst & PAGE_OFFSET_MASK);
1826 if (cbWrite >= cb)
1827 {
1828 memcpy(pvDst, pvSrc, cb);
1829 return VINF_SUCCESS;
1830 }
1831 memcpy(pvDst, pvSrc, cbWrite);
1832
1833 /* next */
1834 cb -= cbWrite;
1835 pvSrc = (uint8_t *)pvSrc + cbWrite;
1836 GCPhysDst += cbWrite;
1837 }
1838 }
1839 else if (pRam->pvHC)
1840 {
1841 /* write */
1842 size_t cbWrite = pRam->cb - off;
1843 if (cbWrite >= cb)
1844 {
1845 memcpy((uint8_t *)pRam->pvHC + off, pvSrc, cb);
1846 return VINF_SUCCESS;
1847 }
1848 memcpy((uint8_t *)pRam->pvHC + off, pvSrc, cbWrite);
1849
1850 /* next */
1851 cb -= cbWrite;
1852 GCPhysDst += cbWrite;
1853 pvSrc = (uint8_t *)pvSrc + cbWrite;
1854 }
1855 else
1856 return VERR_PGM_PHYS_PAGE_RESERVED;
1857 }
1858 else if (GCPhysDst < pRam->GCPhysLast)
1859 break;
1860 }
1861 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1862}
1863
1864
1865/**
1866 * Read from guest physical memory referenced by GC pointer.
1867 *
1868 * This function uses the current CR3/CR0/CR4 of the guest and will
1869 * bypass access handlers and not set any accessed bits.
1870 *
1871 * @returns VBox status.
1872 * @param pVM VM handle.
1873 * @param pvDst The destination address.
1874 * @param GCPtrSrc The source address (GC pointer).
1875 * @param cb The number of bytes to read.
1876 */
1877PGMDECL(int) PGMPhysReadGCPtr(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb)
1878{
1879 /*
1880 * Anything to do?
1881 */
1882 if (!cb)
1883 return VINF_SUCCESS;
1884
1885 /*
1886 * Optimize reads within a single page.
1887 */
1888 if (((RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK) + cb <= PAGE_SIZE)
1889 {
1890 void *pvSrc;
1891 int rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrSrc, &pvSrc);
1892 if (VBOX_FAILURE(rc))
1893 return rc;
1894 memcpy(pvDst, pvSrc, cb);
1895 return VINF_SUCCESS;
1896 }
1897
1898 /*
1899 * Page by page.
1900 */
1901 for (;;)
1902 {
1903 /* convert */
1904 void *pvSrc;
1905 int rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrSrc, &pvSrc);
1906 if (VBOX_FAILURE(rc))
1907 return rc;
1908
1909 /* copy */
1910 size_t cbRead = PAGE_SIZE - ((RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK);
1911 if (cbRead >= cb)
1912 {
1913 memcpy(pvDst, pvSrc, cb);
1914 return VINF_SUCCESS;
1915 }
1916 memcpy(pvDst, pvSrc, cbRead);
1917
1918 /* next */
1919 cb -= cbRead;
1920 pvDst = (uint8_t *)pvDst + cbRead;
1921 GCPtrSrc += cbRead;
1922 }
1923}
1924
1925
1926/**
1927 * Write to guest physical memory referenced by GC pointer.
1928 *
1929 * This function uses the current CR3/CR0/CR4 of the guest and will
1930 * bypass access handlers and not set dirty or accessed bits.
1931 *
1932 * @returns VBox status.
1933 * @param pVM VM handle.
1934 * @param GCPtrDst The destination address (GC pointer).
1935 * @param pvSrc The source address.
1936 * @param cb The number of bytes to write.
1937 */
1938PGMDECL(int) PGMPhysWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
1939{
1940 /*
1941 * Anything to do?
1942 */
1943 if (!cb)
1944 return VINF_SUCCESS;
1945
1946 LogFlow(("PGMPhysWriteGCPtr: %VGv %d\n", GCPtrDst, cb));
1947
1948 /*
1949 * Optimize writes within a single page.
1950 */
1951 if (((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK) + cb <= PAGE_SIZE)
1952 {
1953 void *pvDst;
1954 int rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrDst, &pvDst);
1955 if (VBOX_FAILURE(rc))
1956 return rc;
1957 memcpy(pvDst, pvSrc, cb);
1958 return VINF_SUCCESS;
1959 }
1960
1961 /*
1962 * Page by page.
1963 */
1964 for (;;)
1965 {
1966 /* convert */
1967 void *pvDst;
1968 int rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrDst, &pvDst);
1969 if (VBOX_FAILURE(rc))
1970 return rc;
1971
1972 /* copy */
1973 size_t cbWrite = PAGE_SIZE - ((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK);
1974 if (cbWrite >= cb)
1975 {
1976 memcpy(pvDst, pvSrc, cb);
1977 return VINF_SUCCESS;
1978 }
1979 memcpy(pvDst, pvSrc, cbWrite);
1980
1981 /* next */
1982 cb -= cbWrite;
1983 pvSrc = (uint8_t *)pvSrc + cbWrite;
1984 GCPtrDst += cbWrite;
1985 }
1986}
1987
1988/**
1989 * Read from guest physical memory referenced by GC pointer.
1990 *
1991 * This function uses the current CR3/CR0/CR4 of the guest and will
1992 * respect access handlers and set accessed bits.
1993 *
1994 * @returns VBox status.
1995 * @param pVM VM handle.
1996 * @param pvDst The destination address.
1997 * @param GCPtrSrc The source address (GC pointer).
1998 * @param cb The number of bytes to read.
1999 */
2000/** @todo use the PGMPhysReadGCPtr name and rename the unsafe one to something appropriate */
2001PGMDECL(int) PGMPhysReadGCPtrSafe(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb)
2002{
2003 RTGCPHYS GCPhys;
2004 int rc;
2005
2006 /*
2007 * Anything to do?
2008 */
2009 if (!cb)
2010 return VINF_SUCCESS;
2011
2012 LogFlow(("PGMPhysReadGCPtrSafe: %VGv %d\n", GCPtrSrc, cb));
2013
2014 /*
2015 * Optimize reads within a single page.
2016 */
2017 if (((RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK) + cb <= PAGE_SIZE)
2018 {
2019 /* Convert virtual to physical address */
2020 rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrSrc, &GCPhys);
2021 AssertRCReturn(rc, rc);
2022
2023 /* mark the guest page as accessed. */
2024 rc = PGMGstModifyPage(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)(X86_PTE_A));
2025 AssertRC(rc);
2026
2027 PGMPhysRead(pVM, GCPhys, pvDst, cb);
2028 return VINF_SUCCESS;
2029 }
2030
2031 /*
2032 * Page by page.
2033 */
2034 for (;;)
2035 {
2036 /* Convert virtual to physical address */
2037 rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrSrc, &GCPhys);
2038 AssertRCReturn(rc, rc);
2039
2040 /* mark the guest page as accessed. */
2041 int rc = PGMGstModifyPage(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)(X86_PTE_A));
2042 AssertRC(rc);
2043
2044 /* copy */
2045 size_t cbRead = PAGE_SIZE - ((RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK);
2046 if (cbRead >= cb)
2047 {
2048 PGMPhysRead(pVM, GCPhys, pvDst, cb);
2049 return VINF_SUCCESS;
2050 }
2051 PGMPhysRead(pVM, GCPhys, pvDst, cbRead);
2052
2053 /* next */
2054 cb -= cbRead;
2055 pvDst = (uint8_t *)pvDst + cbRead;
2056 GCPtrSrc += cbRead;
2057 }
2058}
2059
2060
2061/**
2062 * Write to guest physical memory referenced by GC pointer.
2063 *
2064 * This function uses the current CR3/CR0/CR4 of the guest and will
2065 * respect access handlers and set dirty and accessed bits.
2066 *
2067 * @returns VBox status.
2068 * @param pVM VM handle.
2069 * @param GCPtrDst The destination address (GC pointer).
2070 * @param pvSrc The source address.
2071 * @param cb The number of bytes to write.
2072 */
2073/** @todo use the PGMPhysWriteGCPtr name and rename the unsafe one to something appropriate */
2074PGMDECL(int) PGMPhysWriteGCPtrSafe(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
2075{
2076 RTGCPHYS GCPhys;
2077 int rc;
2078
2079 /*
2080 * Anything to do?
2081 */
2082 if (!cb)
2083 return VINF_SUCCESS;
2084
2085 LogFlow(("PGMPhysWriteGCPtrSafe: %VGv %d\n", GCPtrDst, cb));
2086
2087 /*
2088 * Optimize writes within a single page.
2089 */
2090 if (((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK) + cb <= PAGE_SIZE)
2091 {
2092 /* Convert virtual to physical address */
2093 rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrDst, &GCPhys);
2094 AssertRCReturn(rc, rc);
2095
2096 /* mark the guest page as accessed and dirty. */
2097 rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
2098 AssertRC(rc);
2099
2100 PGMPhysWrite(pVM, GCPhys, pvSrc, cb);
2101 return VINF_SUCCESS;
2102 }
2103
2104 /*
2105 * Page by page.
2106 */
2107 for (;;)
2108 {
2109 /* Convert virtual to physical address */
2110 rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrDst, &GCPhys);
2111 AssertRCReturn(rc, rc);
2112
2113 /* mark the guest page as accessed and dirty. */
2114 rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
2115 AssertRC(rc);
2116
2117 /* copy */
2118 size_t cbWrite = PAGE_SIZE - ((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK);
2119 if (cbWrite >= cb)
2120 {
2121 PGMPhysWrite(pVM, GCPhys, pvSrc, cb);
2122 return VINF_SUCCESS;
2123 }
2124 PGMPhysWrite(pVM, GCPhys, pvSrc, cbWrite);
2125
2126 /* next */
2127 cb -= cbWrite;
2128 pvSrc = (uint8_t *)pvSrc + cbWrite;
2129 GCPtrDst += cbWrite;
2130 }
2131}
2132
2133/**
2134 * Write to guest physical memory referenced by GC pointer and update the PTE.
2135 *
2136 * This function uses the current CR3/CR0/CR4 of the guest and will
2137 * bypass access handlers and set any dirty and accessed bits in the PTE.
2138 *
2139 * If you don't want to set the dirty bit, use PGMPhysWriteGCPtr().
2140 *
2141 * @returns VBox status.
2142 * @param pVM VM handle.
2143 * @param GCPtrDst The destination address (GC pointer).
2144 * @param pvSrc The source address.
2145 * @param cb The number of bytes to write.
2146 */
2147PGMDECL(int) PGMPhysWriteGCPtrDirty(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
2148{
2149 /*
2150 * Anything to do?
2151 */
2152 if (!cb)
2153 return VINF_SUCCESS;
2154
2155 /*
2156 * Optimize writes within a single page.
2157 */
2158 if (((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK) + cb <= PAGE_SIZE)
2159 {
2160 void *pvDst;
2161 int rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrDst, &pvDst);
2162 if (VBOX_FAILURE(rc))
2163 return rc;
2164 memcpy(pvDst, pvSrc, cb);
2165 rc = PGMGstModifyPage(pVM, GCPtrDst, cb, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
2166 AssertRC(rc);
2167 return VINF_SUCCESS;
2168 }
2169
2170 /*
2171 * Page by page.
2172 */
2173 for (;;)
2174 {
2175 /* convert */
2176 void *pvDst;
2177 int rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrDst, &pvDst);
2178 if (VBOX_FAILURE(rc))
2179 return rc;
2180
2181 /* mark the guest page as accessed and dirty. */
2182 rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
2183 AssertRC(rc);
2184
2185 /* copy */
2186 size_t cbWrite = PAGE_SIZE - ((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK);
2187 if (cbWrite >= cb)
2188 {
2189 memcpy(pvDst, pvSrc, cb);
2190 return VINF_SUCCESS;
2191 }
2192 memcpy(pvDst, pvSrc, cbWrite);
2193
2194 /* next */
2195 cb -= cbWrite;
2196 GCPtrDst += cbWrite;
2197 pvSrc = (char *)pvSrc + cbWrite;
2198 }
2199}
2200
2201#endif /* !IN_GC */
2202
2203
2204
2205/**
2206 * Performs a read of guest virtual memory for instruction emulation.
2207 *
2208 * This will check permissions, raise exceptions and update the access bits.
2209 *
2210 * The current implementation will bypass all access handlers. It may later be
2211 * changed to at least respect MMIO.
2212 *
2213 *
2214 * @returns VBox status code suitable to scheduling.
2215 * @retval VINF_SUCCESS if the read was performed successfully.
2216 * @retval VINF_EM_RAW_GUEST_TRAP if an exception was raised but not dispatched yet.
2217 * @retval VINF_TRPM_XCPT_DISPATCHED if an exception was raised and dispatched.
2218 *
2219 * @param pVM The VM handle.
2220 * @param pCtxCore The context core.
2221 * @param pvDst Where to put the bytes we've read.
2222 * @param GCPtrSrc The source address.
2223 * @param cb The number of bytes to read. Not more than a page.
2224 *
2225 * @remark This function will dynamically map physical pages in GC. This may unmap
2226 * mappings done by the caller. Be careful!
2227 */
2228PGMDECL(int) PGMPhysInterpretedRead(PVM pVM, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCUINTPTR GCPtrSrc, size_t cb)
2229{
2230 Assert(cb <= PAGE_SIZE);
2231
2232/** @todo r=bird: This isn't perfect!
2233 * -# It's not checking for reserved bits being 1.
2234 * -# It's not correctly dealing with the access bit.
2235 * -# It's not respecting MMIO memory or any other access handlers.
2236 */
2237 /*
2238 * 1. Translate virtual to physical. This may fault.
2239 * 2. Map the physical address.
2240 * 3. Do the read operation.
2241 * 4. Set access bits if required.
2242 */
2243 int rc;
2244 unsigned cb1 = PAGE_SIZE - (GCPtrSrc & PAGE_OFFSET_MASK);
2245 if (cb <= cb1)
2246 {
2247 /*
2248 * Not crossing pages.
2249 */
2250 RTGCPHYS GCPhys;
2251 uint64_t fFlags;
2252 rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc, &fFlags, &GCPhys);
2253 if (VBOX_SUCCESS(rc))
2254 {
2255 /** @todo we should check reserved bits ... */
2256 void *pvSrc;
2257 rc = PGM_GCPHYS_2_PTR(pVM, GCPhys, &pvSrc);
2258 switch (rc)
2259 {
2260 case VINF_SUCCESS:
2261Log(("PGMPhysInterpretedRead: pvDst=%p pvSrc=%p cb=%d\n", pvDst, (uint8_t *)pvSrc + (GCPtrSrc & PAGE_OFFSET_MASK), cb));
2262 memcpy(pvDst, (uint8_t *)pvSrc + (GCPtrSrc & PAGE_OFFSET_MASK), cb);
2263 break;
2264 case VERR_PGM_PHYS_PAGE_RESERVED:
2265 case VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS:
2266 memset(pvDst, 0, cb);
2267 break;
2268 default:
2269 return rc;
2270 }
2271
2272 /** @todo access bit emulation isn't 100% correct. */
2273 if (!(fFlags & X86_PTE_A))
2274 {
2275 rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
2276 AssertRC(rc);
2277 }
2278 return VINF_SUCCESS;
2279 }
2280 }
2281 else
2282 {
2283 /*
2284 * Crosses pages.
2285 */
2286 unsigned cb2 = cb - cb1;
2287 uint64_t fFlags1;
2288 RTGCPHYS GCPhys1;
2289 uint64_t fFlags2;
2290 RTGCPHYS GCPhys2;
2291 rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc, &fFlags1, &GCPhys1);
2292 if (VBOX_SUCCESS(rc))
2293 rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc + cb1, &fFlags2, &GCPhys2);
2294 if (VBOX_SUCCESS(rc))
2295 {
2296 /** @todo we should check reserved bits ... */
2297AssertMsgFailed(("cb=%d cb1=%d cb2=%d GCPtrSrc=%VGv\n", cb, cb1, cb2, GCPtrSrc));
2298 void *pvSrc1;
2299 rc = PGM_GCPHYS_2_PTR(pVM, GCPhys1, &pvSrc1);
2300 switch (rc)
2301 {
2302 case VINF_SUCCESS:
2303 memcpy(pvDst, (uint8_t *)pvSrc1 + (GCPtrSrc & PAGE_OFFSET_MASK), cb1);
2304 break;
2305 case VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS:
2306 memset(pvDst, 0, cb1);
2307 break;
2308 default:
2309 return rc;
2310 }
2311
2312 void *pvSrc2;
2313 rc = PGM_GCPHYS_2_PTR(pVM, GCPhys2, &pvSrc2);
2314 switch (rc)
2315 {
2316 case VINF_SUCCESS:
2317 memcpy((uint8_t *)pvDst + cb2, pvSrc2, cb2);
2318 break;
2319 case VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS:
2320 memset((uint8_t *)pvDst + cb2, 0, cb2);
2321 break;
2322 default:
2323 return rc;
2324 }
2325
2326 if (!(fFlags1 & X86_PTE_A))
2327 {
2328 rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
2329 AssertRC(rc);
2330 }
2331 if (!(fFlags2 & X86_PTE_A))
2332 {
2333 rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrSrc + cb1, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
2334 AssertRC(rc);
2335 }
2336 return VINF_SUCCESS;
2337 }
2338 }
2339
2340 /*
2341 * Raise a #PF.
2342 */
2343 uint32_t uErr;
2344
2345 /* Get the current privilege level. */
2346 uint32_t cpl = CPUMGetGuestCPL(pVM, pCtxCore);
2347 switch (rc)
2348 {
2349 case VINF_SUCCESS:
2350 uErr = (cpl >= 2) ? X86_TRAP_PF_RSVD | X86_TRAP_PF_US : X86_TRAP_PF_RSVD;
2351 break;
2352
2353 case VERR_PAGE_NOT_PRESENT:
2354 case VERR_PAGE_TABLE_NOT_PRESENT:
2355 uErr = (cpl >= 2) ? X86_TRAP_PF_US : 0;
2356 break;
2357
2358 default:
2359 AssertMsgFailed(("rc=%Vrc GCPtrSrc=%VGv cb=%#x\n", rc, GCPtrSrc, cb));
2360 return rc;
2361 }
2362 Log(("PGMPhysInterpretedRead: GCPtrSrc=%VGv cb=%#x -> #PF(%#x)\n", GCPtrSrc, cb, uErr));
2363 return TRPMRaiseXcptErrCR2(pVM, pCtxCore, X86_XCPT_PF, uErr, GCPtrSrc);
2364}
2365
2366/// @todo PGMDECL(int) PGMPhysInterpretedWrite(PVM pVM, PCPUMCTXCORE pCtxCore, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
2367
2368
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