PGMAllPool.cpp@ 19602

Last change on this file since 19602 was 19572, checked in by vboxsync, 16 years ago
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1	/* $Id: PGMAllPool.cpp 19572 2009-05-11 11:24:27Z vboxsync $ */
2	/** @file
3	* PGM Shadow Page Pool.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22
23	/*******************************************************************************
24	* Header Files *
25	*******************************************************************************/
26	#define LOG_GROUP LOG_GROUP_PGM_POOL
27	#include <VBox/pgm.h>
28	#include <VBox/mm.h>
29	#include <VBox/em.h>
30	#include <VBox/cpum.h>
31	#ifdef IN_RC
32	# include <VBox/patm.h>
33	#endif
34	#include "PGMInternal.h"
35	#include <VBox/vm.h>
36	#include <VBox/disopcode.h>
37	#include <VBox/hwacc_vmx.h>
38
39	#include <VBox/log.h>
40	#include <VBox/err.h>
41	#include <iprt/asm.h>
42	#include <iprt/string.h>
43
44
45	/*******************************************************************************
46	* Internal Functions *
47	*******************************************************************************/
48	__BEGIN_DECLS
49	static void pgmPoolFlushAllInt(PPGMPOOL pPool);
50	#ifdef PGMPOOL_WITH_USER_TRACKING
51	DECLINLINE(unsigned) pgmPoolTrackGetShadowEntrySize(PGMPOOLKIND enmKind);
52	DECLINLINE(unsigned) pgmPoolTrackGetGuestEntrySize(PGMPOOLKIND enmKind);
53	static void pgmPoolTrackDeref(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
54	#endif
55	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
56	static void pgmPoolTracDerefGCPhysHint(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTHCPHYS HCPhys, RTGCPHYS GCPhysHint);
57	#endif
58	#ifdef PGMPOOL_WITH_CACHE
59	static int pgmPoolTrackAddUser(PPGMPOOL pPool, PPGMPOOLPAGE pPage, uint16_t iUser, uint32_t iUserTable);
60	#endif
61	#ifdef PGMPOOL_WITH_MONITORING
62	static void pgmPoolMonitorModifiedRemove(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
63	#endif
64	#ifndef IN_RING3
65	DECLEXPORT(int) pgmPoolAccessHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser);
66	#endif
67	#ifdef LOG_ENABLED
68	static const char *pgmPoolPoolKindToStr(uint8_t enmKind);
69	#endif
70
71	void pgmPoolTrackFlushGCPhysPT(PVM pVM, PPGMPAGE pPhysPage, uint16_t iShw, uint16_t cRefs);
72	void pgmPoolTrackFlushGCPhysPTs(PVM pVM, PPGMPAGE pPhysPage, uint16_t iPhysExt);
73	int pgmPoolTrackFlushGCPhysPTsSlow(PVM pVM, PPGMPAGE pPhysPage);
74	PPGMPOOLPHYSEXT pgmPoolTrackPhysExtAlloc(PVM pVM, uint16_t *piPhysExt);
75	void pgmPoolTrackPhysExtFree(PVM pVM, uint16_t iPhysExt);
76	void pgmPoolTrackPhysExtFreeList(PVM pVM, uint16_t iPhysExt);
77
78	__END_DECLS
79
80
81	/**
82	* Checks if the specified page pool kind is for a 4MB or 2MB guest page.
83	*
84	* @returns true if it's the shadow of a 4MB or 2MB guest page, otherwise false.
85	* @param enmKind The page kind.
86	*/
87	DECLINLINE(bool) pgmPoolIsBigPage(PGMPOOLKIND enmKind)
88	{
89	switch (enmKind)
90	{
91	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
92	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
93	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
94	return true;
95	default:
96	return false;
97	}
98	}
99
100	/** @def PGMPOOL_PAGE_2_LOCKED_PTR
101	* Maps a pool page pool into the current context and lock it (RC only).
102	*
103	* @returns VBox status code.
104	* @param pVM The VM handle.
105	* @param pPage The pool page.
106	*
107	* @remark In RC this uses PGMGCDynMapHCPage(), so it will consume of the
108	* small page window employeed by that function. Be careful.
109	* @remark There is no need to assert on the result.
110	*/
111	#if defined(IN_RC)
112	DECLINLINE(void *) PGMPOOL_PAGE_2_LOCKED_PTR(PVM pVM, PPGMPOOLPAGE pPage)
113	{
114	void *pv = pgmPoolMapPageInlined(&pVM->pgm.s, pPage);
115
116	/* Make sure the dynamic mapping will not be reused. */
117	if (pv)
118	PGMDynLockHCPage(pVM, (uint8_t *)pv);
119
120	return pv;
121	}
122	#else
123	# define PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage) PGMPOOL_PAGE_2_PTR(pVM, pPage)
124	#endif
125
126	/** @def PGMPOOL_UNLOCK_PTR
127	* Unlock a previously locked dynamic caching (RC only).
128	*
129	* @returns VBox status code.
130	* @param pVM The VM handle.
131	* @param pPage The pool page.
132	*
133	* @remark In RC this uses PGMGCDynMapHCPage(), so it will consume of the
134	* small page window employeed by that function. Be careful.
135	* @remark There is no need to assert on the result.
136	*/
137	#if defined(IN_RC)
138	DECLINLINE(void) PGMPOOL_UNLOCK_PTR(PVM pVM, void *pvPage)
139	{
140	if (pvPage)
141	PGMDynUnlockHCPage(pVM, (uint8_t *)pvPage);
142	}
143	#else
144	# define PGMPOOL_UNLOCK_PTR(pVM, pPage) do {} while (0)
145	#endif
146
147
148	#ifdef PGMPOOL_WITH_MONITORING
149	/**
150	* Determin the size of a write instruction.
151	* @returns number of bytes written.
152	* @param pDis The disassembler state.
153	*/
154	static unsigned pgmPoolDisasWriteSize(PDISCPUSTATE pDis)
155	{
156	/*
157	* This is very crude and possibly wrong for some opcodes,
158	* but since it's not really supposed to be called we can
159	* probably live with that.
160	*/
161	return DISGetParamSize(pDis, &pDis->param1);
162	}
163
164
165	/**
166	* Flushes a chain of pages sharing the same access monitor.
167	*
168	* @returns VBox status code suitable for scheduling.
169	* @param pPool The pool.
170	* @param pPage A page in the chain.
171	*/
172	int pgmPoolMonitorChainFlush(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
173	{
174	LogFlow(("pgmPoolMonitorChainFlush: Flush page %RGp type=%d\n", pPage->GCPhys, pPage->enmKind));
175
176	/*
177	* Find the list head.
178	*/
179	uint16_t idx = pPage->idx;
180	if (pPage->iMonitoredPrev != NIL_PGMPOOL_IDX)
181	{
182	while (pPage->iMonitoredPrev != NIL_PGMPOOL_IDX)
183	{
184	idx = pPage->iMonitoredPrev;
185	Assert(idx != pPage->idx);
186	pPage = &pPool->aPages[idx];
187	}
188	}
189
190	/*
191	* Iterate the list flushing each shadow page.
192	*/
193	int rc = VINF_SUCCESS;
194	for (;;)
195	{
196	idx = pPage->iMonitoredNext;
197	Assert(idx != pPage->idx);
198	if (pPage->idx >= PGMPOOL_IDX_FIRST)
199	{
200	int rc2 = pgmPoolFlushPage(pPool, pPage);
201	AssertRC(rc2);
202	}
203	/* next */
204	if (idx == NIL_PGMPOOL_IDX)
205	break;
206	pPage = &pPool->aPages[idx];
207	}
208	return rc;
209	}
210
211
212	/**
213	* Wrapper for getting the current context pointer to the entry being modified.
214	*
215	* @returns VBox status code suitable for scheduling.
216	* @param pVM VM Handle.
217	* @param pvDst Destination address
218	* @param pvSrc Source guest virtual address.
219	* @param GCPhysSrc The source guest physical address.
220	* @param cb Size of data to read
221	*/
222	DECLINLINE(int) pgmPoolPhysSimpleReadGCPhys(PVM pVM, void *pvDst, CTXTYPE(RTGCPTR, RTHCPTR, RTGCPTR) pvSrc, RTGCPHYS GCPhysSrc, size_t cb)
223	{
224	#if defined(IN_RING3)
225	memcpy(pvDst, (RTHCPTR)((uintptr_t)pvSrc & ~(RTHCUINTPTR)(cb - 1)), cb);
226	return VINF_SUCCESS;
227	#else
228	/* @todo in RC we could attempt to use the virtual address, although this can cause many faults (PAE Windows XP guest). */
229	return PGMPhysSimpleReadGCPhys(pVM, pvDst, GCPhysSrc & ~(RTGCPHYS)(cb - 1), cb);
230	#endif
231	}
232
233	/**
234	* Process shadow entries before they are changed by the guest.
235	*
236	* For PT entries we will clear them. For PD entries, we'll simply check
237	* for mapping conflicts and set the SyncCR3 FF if found.
238	*
239	* @param pVCpu VMCPU handle
240	* @param pPool The pool.
241	* @param pPage The head page.
242	* @param GCPhysFault The guest physical fault address.
243	* @param uAddress In R0 and GC this is the guest context fault address (flat).
244	* In R3 this is the host context 'fault' address.
245	* @param pCpu The disassembler state for figuring out the write size.
246	* This need not be specified if the caller knows we won't do cross entry accesses.
247	*/
248	void pgmPoolMonitorChainChanging(PVMCPU pVCpu, PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTGCPHYS GCPhysFault, CTXTYPE(RTGCPTR, RTHCPTR, RTGCPTR) pvAddress, PDISCPUSTATE pCpu)
249	{
250	Assert(pPage->iMonitoredPrev == NIL_PGMPOOL_IDX);
251	const unsigned off = GCPhysFault & PAGE_OFFSET_MASK;
252	const unsigned cbWrite = (pCpu) ? pgmPoolDisasWriteSize(pCpu) : 0;
253	PVM pVM = pPool->CTX_SUFF(pVM);
254
255	LogFlow(("pgmPoolMonitorChainChanging: %RGv phys=%RGp kind=%s cbWrite=%d\n", (RTGCPTR)pvAddress, GCPhysFault, pgmPoolPoolKindToStr(pPage->enmKind), cbWrite));
256	for (;;)
257	{
258	union
259	{
260	void *pv;
261	PX86PT pPT;
262	PX86PTPAE pPTPae;
263	PX86PD pPD;
264	PX86PDPAE pPDPae;
265	PX86PDPT pPDPT;
266	PX86PML4 pPML4;
267	} uShw;
268
269	uShw.pv = NULL;
270	switch (pPage->enmKind)
271	{
272	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
273	{
274	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
275	const unsigned iShw = off / sizeof(X86PTE);
276	LogFlow(("PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT iShw=%x\n", iShw));
277	if (uShw.pPT->a[iShw].n.u1Present)
278	{
279	# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
280	X86PTE GstPte;
281
282	int rc = pgmPoolPhysSimpleReadGCPhys(pVM, &GstPte, pvAddress, GCPhysFault, sizeof(GstPte));
283	AssertRC(rc);
284	Log4(("pgmPoolMonitorChainChanging 32_32: deref %016RX64 GCPhys %08RX32\n", uShw.pPT->a[iShw].u & X86_PTE_PAE_PG_MASK, GstPte.u & X86_PTE_PG_MASK));
285	pgmPoolTracDerefGCPhysHint(pPool, pPage,
286	uShw.pPT->a[iShw].u & X86_PTE_PAE_PG_MASK,
287	GstPte.u & X86_PTE_PG_MASK);
288	# endif
289	uShw.pPT->a[iShw].u = 0;
290	}
291	break;
292	}
293
294	/* page/2 sized */
295	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
296	{
297	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
298	if (!((off ^ pPage->GCPhys) & (PAGE_SIZE / 2)))
299	{
300	const unsigned iShw = (off / sizeof(X86PTE)) & (X86_PG_PAE_ENTRIES - 1);
301	LogFlow(("PGMPOOLKIND_PAE_PT_FOR_32BIT_PT iShw=%x\n", iShw));
302	if (uShw.pPTPae->a[iShw].n.u1Present)
303	{
304	# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
305	X86PTE GstPte;
306	int rc = pgmPoolPhysSimpleReadGCPhys(pVM, &GstPte, pvAddress, GCPhysFault, sizeof(GstPte));
307	AssertRC(rc);
308
309	Log4(("pgmPoolMonitorChainChanging pae_32: deref %016RX64 GCPhys %08RX32\n", uShw.pPT->a[iShw].u & X86_PTE_PAE_PG_MASK, GstPte.u & X86_PTE_PG_MASK));
310	pgmPoolTracDerefGCPhysHint(pPool, pPage,
311	uShw.pPTPae->a[iShw].u & X86_PTE_PAE_PG_MASK,
312	GstPte.u & X86_PTE_PG_MASK);
313	# endif
314	uShw.pPTPae->a[iShw].u = 0;
315	}
316	}
317	break;
318	}
319
320	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
321	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
322	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
323	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
324	{
325	unsigned iGst = off / sizeof(X86PDE);
326	unsigned iShwPdpt = iGst / 256;
327	unsigned iShw = (iGst % 256) * 2;
328	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
329
330	LogFlow(("pgmPoolMonitorChainChanging PAE for 32 bits: iGst=%x iShw=%x idx = %d page idx=%d\n", iGst, iShw, iShwPdpt, pPage->enmKind - PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD));
331	if (iShwPdpt == pPage->enmKind - (unsigned)PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD)
332	{
333	for (unsigned i = 0; i < 2; i++)
334	{
335	# ifndef IN_RING0
336	if ((uShw.pPDPae->a[iShw + i].u & (PGM_PDFLAGS_MAPPING \| X86_PDE_P)) == (PGM_PDFLAGS_MAPPING \| X86_PDE_P))
337	{
338	Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s));
339	VMCPU_FF_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3);
340	LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShwPdpt=%#x iShw=%#x!\n", iShwPdpt, iShw+i));
341	break;
342	}
343	else
344	# endif /* !IN_RING0 */
345	if (uShw.pPDPae->a[iShw+i].n.u1Present)
346	{
347	LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw=%#x: %RX64 -> freeing it!\n", iShw+i, uShw.pPDPae->a[iShw+i].u));
348	pgmPoolFree(pVM,
349	uShw.pPDPae->a[iShw+i].u & X86_PDE_PAE_PG_MASK,
350	pPage->idx,
351	iShw + i);
352	uShw.pPDPae->a[iShw+i].u = 0;
353	}
354
355	/* paranoia / a bit assumptive. */
356	if ( pCpu
357	&& (off & 3)
358	&& (off & 3) + cbWrite > 4)
359	{
360	const unsigned iShw2 = iShw + 2 + i;
361	if (iShw2 < RT_ELEMENTS(uShw.pPDPae->a))
362	{
363	# ifndef IN_RING0
364	if ((uShw.pPDPae->a[iShw2].u & (PGM_PDFLAGS_MAPPING \| X86_PDE_P)) == (PGM_PDFLAGS_MAPPING \| X86_PDE_P))
365	{
366	Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s));
367	VMCPU_FF_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3);
368	LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShwPdpt=%#x iShw2=%#x!\n", iShwPdpt, iShw2));
369	break;
370	}
371	else
372	# endif /* !IN_RING0 */
373	if (uShw.pPDPae->a[iShw2].n.u1Present)
374	{
375	LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPDPae->a[iShw2].u));
376	pgmPoolFree(pVM,
377	uShw.pPDPae->a[iShw2].u & X86_PDE_PAE_PG_MASK,
378	pPage->idx,
379	iShw2);
380	uShw.pPDPae->a[iShw2].u = 0;
381	}
382	}
383	}
384	}
385	}
386	break;
387	}
388
389	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
390	{
391	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
392	const unsigned iShw = off / sizeof(X86PTEPAE);
393	if (uShw.pPTPae->a[iShw].n.u1Present)
394	{
395	# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
396	X86PTEPAE GstPte;
397	int rc = pgmPoolPhysSimpleReadGCPhys(pVM, &GstPte, pvAddress, GCPhysFault, sizeof(GstPte));
398	AssertRC(rc);
399
400	Log4(("pgmPoolMonitorChainChanging pae: deref %016RX64 GCPhys %016RX64\n", uShw.pPTPae->a[iShw].u & X86_PTE_PAE_PG_MASK, GstPte.u & X86_PTE_PAE_PG_MASK));
401	pgmPoolTracDerefGCPhysHint(pPool, pPage,
402	uShw.pPTPae->a[iShw].u & X86_PTE_PAE_PG_MASK,
403	GstPte.u & X86_PTE_PAE_PG_MASK);
404	# endif
405	uShw.pPTPae->a[iShw].u = 0;
406	}
407
408	/* paranoia / a bit assumptive. */
409	if ( pCpu
410	&& (off & 7)
411	&& (off & 7) + cbWrite > sizeof(X86PTEPAE))
412	{
413	const unsigned iShw2 = (off + cbWrite - 1) / sizeof(X86PTEPAE);
414	AssertBreak(iShw2 < RT_ELEMENTS(uShw.pPTPae->a));
415
416	if (uShw.pPTPae->a[iShw2].n.u1Present)
417	{
418	# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
419	X86PTEPAE GstPte;
420	# ifdef IN_RING3
421	int rc = pgmPoolPhysSimpleReadGCPhys(pVM, &GstPte, (RTHCPTR)((RTHCUINTPTR)pvAddress + sizeof(GstPte)), GCPhysFault + sizeof(GstPte), sizeof(GstPte));
422	# else
423	int rc = pgmPoolPhysSimpleReadGCPhys(pVM, &GstPte, pvAddress + sizeof(GstPte), GCPhysFault + sizeof(GstPte), sizeof(GstPte));
424	# endif
425	AssertRC(rc);
426	Log4(("pgmPoolMonitorChainChanging pae: deref %016RX64 GCPhys %016RX64\n", uShw.pPTPae->a[iShw2].u & X86_PTE_PAE_PG_MASK, GstPte.u & X86_PTE_PAE_PG_MASK));
427	pgmPoolTracDerefGCPhysHint(pPool, pPage,
428	uShw.pPTPae->a[iShw2].u & X86_PTE_PAE_PG_MASK,
429	GstPte.u & X86_PTE_PAE_PG_MASK);
430	# endif
431	uShw.pPTPae->a[iShw2].u = 0;
432	}
433	}
434	break;
435	}
436
437	case PGMPOOLKIND_32BIT_PD:
438	{
439	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
440	const unsigned iShw = off / sizeof(X86PTE); // ASSUMING 32-bit guest paging!
441
442	LogFlow(("pgmPoolMonitorChainChanging: PGMPOOLKIND_32BIT_PD %x\n", iShw));
443	# ifndef IN_RING0
444	if (uShw.pPD->a[iShw].u & PGM_PDFLAGS_MAPPING)
445	{
446	Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s));
447	VMCPU_FF_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3);
448	STAM_COUNTER_INC(&(pVCpu->pgm.s.StatRZGuestCR3WriteConflict));
449	LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShw=%#x!\n", iShw));
450	break;
451	}
452	# endif /* !IN_RING0 */
453	# ifndef IN_RING0
454	else
455	# endif /* !IN_RING0 */
456	{
457	if (uShw.pPD->a[iShw].n.u1Present)
458	{
459	LogFlow(("pgmPoolMonitorChainChanging: 32 bit pd iShw=%#x: %RX64 -> freeing it!\n", iShw, uShw.pPD->a[iShw].u));
460	pgmPoolFree(pVM,
461	uShw.pPD->a[iShw].u & X86_PDE_PAE_PG_MASK,
462	pPage->idx,
463	iShw);
464	uShw.pPD->a[iShw].u = 0;
465	}
466	}
467	/* paranoia / a bit assumptive. */
468	if ( pCpu
469	&& (off & 3)
470	&& (off & 3) + cbWrite > sizeof(X86PTE))
471	{
472	const unsigned iShw2 = (off + cbWrite - 1) / sizeof(X86PTE);
473	if ( iShw2 != iShw
474	&& iShw2 < RT_ELEMENTS(uShw.pPD->a))
475	{
476	# ifndef IN_RING0
477	if (uShw.pPD->a[iShw2].u & PGM_PDFLAGS_MAPPING)
478	{
479	Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s));
480	STAM_COUNTER_INC(&(pVCpu->pgm.s.StatRZGuestCR3WriteConflict));
481	VMCPU_FF_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3);
482	LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShw2=%#x!\n", iShw2));
483	break;
484	}
485	# endif /* !IN_RING0 */
486	# ifndef IN_RING0
487	else
488	# endif /* !IN_RING0 */
489	{
490	if (uShw.pPD->a[iShw2].n.u1Present)
491	{
492	LogFlow(("pgmPoolMonitorChainChanging: 32 bit pd iShw=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPD->a[iShw2].u));
493	pgmPoolFree(pVM,
494	uShw.pPD->a[iShw2].u & X86_PDE_PAE_PG_MASK,
495	pPage->idx,
496	iShw2);
497	uShw.pPD->a[iShw2].u = 0;
498	}
499	}
500	}
501	}
502	#if 0 /* useful when running PGMAssertCR3(), a bit too troublesome for general use (TLBs). */
503	if ( uShw.pPD->a[iShw].n.u1Present
504	&& !VMCPU_FF_ISSET(pVCpu, VMCPU_FF_PGM_SYNC_CR3))
505	{
506	LogFlow(("pgmPoolMonitorChainChanging: iShw=%#x: %RX32 -> freeing it!\n", iShw, uShw.pPD->a[iShw].u));
507	# ifdef IN_RC /* TLB load - we're pushing things a bit... */
508	ASMProbeReadByte(pvAddress);
509	# endif
510	pgmPoolFree(pVM, uShw.pPD->a[iShw].u & X86_PDE_PG_MASK, pPage->idx, iShw);
511	uShw.pPD->a[iShw].u = 0;
512	}
513	#endif
514	break;
515	}
516
517	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
518	{
519	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
520	const unsigned iShw = off / sizeof(X86PDEPAE);
521	#ifndef IN_RING0
522	if (uShw.pPDPae->a[iShw].u & PGM_PDFLAGS_MAPPING)
523	{
524	Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s));
525	VMCPU_FF_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3);
526	STAM_COUNTER_INC(&(pVCpu->pgm.s.StatRZGuestCR3WriteConflict));
527	LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShw=%#x!\n", iShw));
528	break;
529	}
530	#endif /* !IN_RING0 */
531	/*
532	* Causes trouble when the guest uses a PDE to refer to the whole page table level
533	* structure. (Invalidate here; faults later on when it tries to change the page
534	* table entries -> recheck; probably only applies to the RC case.)
535	*/
536	# ifndef IN_RING0
537	else
538	# endif /* !IN_RING0 */
539	{
540	if (uShw.pPDPae->a[iShw].n.u1Present)
541	{
542	LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw=%#x: %RX64 -> freeing it!\n", iShw, uShw.pPDPae->a[iShw].u));
543	pgmPoolFree(pVM,
544	uShw.pPDPae->a[iShw].u & X86_PDE_PAE_PG_MASK,
545	pPage->idx,
546	iShw);
547	uShw.pPDPae->a[iShw].u = 0;
548	}
549	}
550	/* paranoia / a bit assumptive. */
551	if ( pCpu
552	&& (off & 7)
553	&& (off & 7) + cbWrite > sizeof(X86PDEPAE))
554	{
555	const unsigned iShw2 = (off + cbWrite - 1) / sizeof(X86PDEPAE);
556	AssertBreak(iShw2 < RT_ELEMENTS(uShw.pPDPae->a));
557
558	#ifndef IN_RING0
559	if ( iShw2 != iShw
560	&& uShw.pPDPae->a[iShw2].u & PGM_PDFLAGS_MAPPING)
561	{
562	Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s));
563	VMCPU_FF_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3);
564	STAM_COUNTER_INC(&(pVCpu->pgm.s.StatRZGuestCR3WriteConflict));
565	LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShw2=%#x!\n", iShw2));
566	break;
567	}
568	#endif /* !IN_RING0 */
569	# ifndef IN_RING0
570	else
571	# endif /* !IN_RING0 */
572	if (uShw.pPDPae->a[iShw2].n.u1Present)
573	{
574	LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw2=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPDPae->a[iShw2].u));
575	pgmPoolFree(pVM,
576	uShw.pPDPae->a[iShw2].u & X86_PDE_PAE_PG_MASK,
577	pPage->idx,
578	iShw2);
579	uShw.pPDPae->a[iShw2].u = 0;
580	}
581	}
582	break;
583	}
584
585	case PGMPOOLKIND_PAE_PDPT:
586	{
587	/*
588	* Hopefully this doesn't happen very often:
589	* - touching unused parts of the page
590	* - messing with the bits of pd pointers without changing the physical address
591	*/
592	/* PDPT roots are not page aligned; 32 byte only! */
593	const unsigned offPdpt = GCPhysFault - pPage->GCPhys;
594
595	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
596	const unsigned iShw = offPdpt / sizeof(X86PDPE);
597	if (iShw < X86_PG_PAE_PDPE_ENTRIES) /* don't use RT_ELEMENTS(uShw.pPDPT->a), because that's for long mode only */
598	{
599	# ifndef IN_RING0
600	if (uShw.pPDPT->a[iShw].u & PGM_PLXFLAGS_MAPPING)
601	{
602	Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s));
603	STAM_COUNTER_INC(&(pVCpu->pgm.s.StatRZGuestCR3WriteConflict));
604	VMCPU_FF_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3);
605	LogFlow(("pgmPoolMonitorChainChanging: Detected pdpt conflict at iShw=%#x!\n", iShw));
606	break;
607	}
608	# endif /* !IN_RING0 */
609	# ifndef IN_RING0
610	else
611	# endif /* !IN_RING0 */
612	if (uShw.pPDPT->a[iShw].n.u1Present)
613	{
614	LogFlow(("pgmPoolMonitorChainChanging: pae pdpt iShw=%#x: %RX64 -> freeing it!\n", iShw, uShw.pPDPT->a[iShw].u));
615	pgmPoolFree(pVM,
616	uShw.pPDPT->a[iShw].u & X86_PDPE_PG_MASK,
617	pPage->idx,
618	iShw);
619	uShw.pPDPT->a[iShw].u = 0;
620	}
621
622	/* paranoia / a bit assumptive. */
623	if ( pCpu
624	&& (offPdpt & 7)
625	&& (offPdpt & 7) + cbWrite > sizeof(X86PDPE))
626	{
627	const unsigned iShw2 = (offPdpt + cbWrite - 1) / sizeof(X86PDPE);
628	if ( iShw2 != iShw
629	&& iShw2 < X86_PG_PAE_PDPE_ENTRIES)
630	{
631	# ifndef IN_RING0
632	if (uShw.pPDPT->a[iShw2].u & PGM_PLXFLAGS_MAPPING)
633	{
634	Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s));
635	STAM_COUNTER_INC(&(pVCpu->pgm.s.StatRZGuestCR3WriteConflict));
636	VMCPU_FF_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3);
637	LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShw2=%#x!\n", iShw2));
638	break;
639	}
640	# endif /* !IN_RING0 */
641	# ifndef IN_RING0
642	else
643	# endif /* !IN_RING0 */
644	if (uShw.pPDPT->a[iShw2].n.u1Present)
645	{
646	LogFlow(("pgmPoolMonitorChainChanging: pae pdpt iShw=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPDPT->a[iShw2].u));
647	pgmPoolFree(pVM,
648	uShw.pPDPT->a[iShw2].u & X86_PDPE_PG_MASK,
649	pPage->idx,
650	iShw2);
651	uShw.pPDPT->a[iShw2].u = 0;
652	}
653	}
654	}
655	}
656	break;
657	}
658
659	#ifndef IN_RC
660	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
661	{
662	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
663	const unsigned iShw = off / sizeof(X86PDEPAE);
664	Assert(!(uShw.pPDPae->a[iShw].u & PGM_PDFLAGS_MAPPING));
665	if (uShw.pPDPae->a[iShw].n.u1Present)
666	{
667	LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw=%#x: %RX64 -> freeing it!\n", iShw, uShw.pPDPae->a[iShw].u));
668	pgmPoolFree(pVM,
669	uShw.pPDPae->a[iShw].u & X86_PDE_PAE_PG_MASK,
670	pPage->idx,
671	iShw);
672	uShw.pPDPae->a[iShw].u = 0;
673	}
674	/* paranoia / a bit assumptive. */
675	if ( pCpu
676	&& (off & 7)
677	&& (off & 7) + cbWrite > sizeof(X86PDEPAE))
678	{
679	const unsigned iShw2 = (off + cbWrite - 1) / sizeof(X86PDEPAE);
680	AssertBreak(iShw2 < RT_ELEMENTS(uShw.pPDPae->a));
681
682	Assert(!(uShw.pPDPae->a[iShw2].u & PGM_PDFLAGS_MAPPING));
683	if (uShw.pPDPae->a[iShw2].n.u1Present)
684	{
685	LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw2=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPDPae->a[iShw2].u));
686	pgmPoolFree(pVM,
687	uShw.pPDPae->a[iShw2].u & X86_PDE_PAE_PG_MASK,
688	pPage->idx,
689	iShw2);
690	uShw.pPDPae->a[iShw2].u = 0;
691	}
692	}
693	break;
694	}
695
696	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
697	{
698	/*
699	* Hopefully this doesn't happen very often:
700	* - messing with the bits of pd pointers without changing the physical address
701	*/
702	if (!VMCPU_FF_ISSET(pVCpu, VMCPU_FF_PGM_SYNC_CR3))
703	{
704	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
705	const unsigned iShw = off / sizeof(X86PDPE);
706	if (uShw.pPDPT->a[iShw].n.u1Present)
707	{
708	LogFlow(("pgmPoolMonitorChainChanging: pdpt iShw=%#x: %RX64 -> freeing it!\n", iShw, uShw.pPDPT->a[iShw].u));
709	pgmPoolFree(pVM, uShw.pPDPT->a[iShw].u & X86_PDPE_PG_MASK, pPage->idx, iShw);
710	uShw.pPDPT->a[iShw].u = 0;
711	}
712	/* paranoia / a bit assumptive. */
713	if ( pCpu
714	&& (off & 7)
715	&& (off & 7) + cbWrite > sizeof(X86PDPE))
716	{
717	const unsigned iShw2 = (off + cbWrite - 1) / sizeof(X86PDPE);
718	if (uShw.pPDPT->a[iShw2].n.u1Present)
719	{
720	LogFlow(("pgmPoolMonitorChainChanging: pdpt iShw2=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPDPT->a[iShw2].u));
721	pgmPoolFree(pVM, uShw.pPDPT->a[iShw2].u & X86_PDPE_PG_MASK, pPage->idx, iShw2);
722	uShw.pPDPT->a[iShw2].u = 0;
723	}
724	}
725	}
726	break;
727	}
728
729	case PGMPOOLKIND_64BIT_PML4:
730	{
731	/*
732	* Hopefully this doesn't happen very often:
733	* - messing with the bits of pd pointers without changing the physical address
734	*/
735	if (!VMCPU_FF_ISSET(pVCpu, VMCPU_FF_PGM_SYNC_CR3))
736	{
737	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
738	const unsigned iShw = off / sizeof(X86PDPE);
739	if (uShw.pPML4->a[iShw].n.u1Present)
740	{
741	LogFlow(("pgmPoolMonitorChainChanging: pml4 iShw=%#x: %RX64 -> freeing it!\n", iShw, uShw.pPML4->a[iShw].u));
742	pgmPoolFree(pVM, uShw.pPML4->a[iShw].u & X86_PML4E_PG_MASK, pPage->idx, iShw);
743	uShw.pPML4->a[iShw].u = 0;
744	}
745	/* paranoia / a bit assumptive. */
746	if ( pCpu
747	&& (off & 7)
748	&& (off & 7) + cbWrite > sizeof(X86PDPE))
749	{
750	const unsigned iShw2 = (off + cbWrite - 1) / sizeof(X86PML4E);
751	if (uShw.pPML4->a[iShw2].n.u1Present)
752	{
753	LogFlow(("pgmPoolMonitorChainChanging: pml4 iShw2=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPML4->a[iShw2].u));
754	pgmPoolFree(pVM, uShw.pPML4->a[iShw2].u & X86_PML4E_PG_MASK, pPage->idx, iShw2);
755	uShw.pPML4->a[iShw2].u = 0;
756	}
757	}
758	}
759	break;
760	}
761	#endif /* IN_RING0 */
762
763	default:
764	AssertFatalMsgFailed(("enmKind=%d\n", pPage->enmKind));
765	}
766	PGMPOOL_UNLOCK_PTR(pVM, uShw.pv);
767
768	/* next */
769	if (pPage->iMonitoredNext == NIL_PGMPOOL_IDX)
770	return;
771	pPage = &pPool->aPages[pPage->iMonitoredNext];
772	}
773	}
774
775	# ifndef IN_RING3
776	/**
777	* Checks if a access could be a fork operation in progress.
778	*
779	* Meaning, that the guest is setuping up the parent process for Copy-On-Write.
780	*
781	* @returns true if it's likly that we're forking, otherwise false.
782	* @param pPool The pool.
783	* @param pCpu The disassembled instruction.
784	* @param offFault The access offset.
785	*/
786	DECLINLINE(bool) pgmPoolMonitorIsForking(PPGMPOOL pPool, PDISCPUSTATE pCpu, unsigned offFault)
787	{
788	/*
789	* i386 linux is using btr to clear X86_PTE_RW.
790	* The functions involved are (2.6.16 source inspection):
791	* clear_bit
792	* ptep_set_wrprotect
793	* copy_one_pte
794	* copy_pte_range
795	* copy_pmd_range
796	* copy_pud_range
797	* copy_page_range
798	* dup_mmap
799	* dup_mm
800	* copy_mm
801	* copy_process
802	* do_fork
803	*/
804	if ( pCpu->pCurInstr->opcode == OP_BTR
805	&& !(offFault & 4)
806	/** @todo Validate that the bit index is X86_PTE_RW. */
807	)
808	{
809	STAM_COUNTER_INC(&pPool->CTX_MID_Z(StatMonitor,Fork));
810	return true;
811	}
812	return false;
813	}
814
815
816	/**
817	* Determine whether the page is likely to have been reused.
818	*
819	* @returns true if we consider the page as being reused for a different purpose.
820	* @returns false if we consider it to still be a paging page.
821	* @param pVM VM Handle.
822	* @param pPage The page in question.
823	* @param pRegFrame Trap register frame.
824	* @param pCpu The disassembly info for the faulting instruction.
825	* @param pvFault The fault address.
826	*
827	* @remark The REP prefix check is left to the caller because of STOSD/W.
828	*/
829	DECLINLINE(bool) pgmPoolMonitorIsReused(PVM pVM, PPGMPOOLPAGE pPage, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, RTGCPTR pvFault)
830	{
831	#ifndef IN_RC
832	/** @todo could make this general, faulting close to rsp should be safe reuse heuristic. */
833	if ( HWACCMHasPendingIrq(pVM)
834	&& (pRegFrame->rsp - pvFault) < 32)
835	{
836	/* Fault caused by stack writes while trying to inject an interrupt event. */
837	Log(("pgmPoolMonitorIsReused: reused %RGv for interrupt stack (rsp=%RGv).\n", pvFault, pRegFrame->rsp));
838	return true;
839	}
840	#else
841	NOREF(pVM); NOREF(pvFault);
842	#endif
843
844	switch (pCpu->pCurInstr->opcode)
845	{
846	/* call implies the actual push of the return address faulted */
847	case OP_CALL:
848	Log4(("pgmPoolMonitorIsReused: CALL\n"));
849	return true;
850	case OP_PUSH:
851	Log4(("pgmPoolMonitorIsReused: PUSH\n"));
852	return true;
853	case OP_PUSHF:
854	Log4(("pgmPoolMonitorIsReused: PUSHF\n"));
855	return true;
856	case OP_PUSHA:
857	Log4(("pgmPoolMonitorIsReused: PUSHA\n"));
858	return true;
859	case OP_FXSAVE:
860	Log4(("pgmPoolMonitorIsReused: FXSAVE\n"));
861	return true;
862	case OP_MOVNTI: /* solaris - block_zero_no_xmm */
863	Log4(("pgmPoolMonitorIsReused: MOVNTI\n"));
864	return true;
865	case OP_MOVNTDQ: /* solaris - hwblkclr & hwblkpagecopy */
866	Log4(("pgmPoolMonitorIsReused: MOVNTDQ\n"));
867	return true;
868	case OP_MOVSWD:
869	case OP_STOSWD:
870	if ( pCpu->prefix == (PREFIX_REP\|PREFIX_REX)
871	&& pRegFrame->rcx >= 0x40
872	)
873	{
874	Assert(pCpu->mode == CPUMODE_64BIT);
875
876	Log(("pgmPoolMonitorIsReused: OP_STOSQ\n"));
877	return true;
878	}
879	return false;
880	}
881	if ( (pCpu->param1.flags & USE_REG_GEN32)
882	&& (pCpu->param1.base.reg_gen == USE_REG_ESP))
883	{
884	Log4(("pgmPoolMonitorIsReused: ESP\n"));
885	return true;
886	}
887
888	//if (pPage->fCR3Mix)
889	// return false;
890	return false;
891	}
892
893
894	/**
895	* Flushes the page being accessed.
896	*
897	* @returns VBox status code suitable for scheduling.
898	* @param pVM The VM handle.
899	* @param pVCpu The VMCPU handle.
900	* @param pPool The pool.
901	* @param pPage The pool page (head).
902	* @param pCpu The disassembly of the write instruction.
903	* @param pRegFrame The trap register frame.
904	* @param GCPhysFault The fault address as guest physical address.
905	* @param pvFault The fault address.
906	*/
907	static int pgmPoolAccessHandlerFlush(PVM pVM, PVMCPU pVCpu, PPGMPOOL pPool, PPGMPOOLPAGE pPage, PDISCPUSTATE pCpu,
908	PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, RTGCPTR pvFault)
909	{
910	/*
911	* First, do the flushing.
912	*/
913	int rc = pgmPoolMonitorChainFlush(pPool, pPage);
914
915	/*
916	* Emulate the instruction (xp/w2k problem, requires pc/cr2/sp detection).
917	*/
918	uint32_t cbWritten;
919	int rc2 = EMInterpretInstructionCPU(pVM, pVCpu, pCpu, pRegFrame, pvFault, &cbWritten);
920	if (RT_SUCCESS(rc2))
921	pRegFrame->rip += pCpu->opsize;
922	else if (rc2 == VERR_EM_INTERPRETER)
923	{
924	#ifdef IN_RC
925	if (PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip))
926	{
927	LogFlow(("pgmPoolAccessHandlerPTWorker: Interpretation failed for patch code %04x:%RGv, ignoring.\n",
928	pRegFrame->cs, (RTGCPTR)pRegFrame->eip));
929	rc = VINF_SUCCESS;
930	STAM_COUNTER_INC(&pPool->StatMonitorRZIntrFailPatch2);
931	}
932	else
933	#endif
934	{
935	rc = VINF_EM_RAW_EMULATE_INSTR;
936	STAM_COUNTER_INC(&pPool->CTX_MID_Z(StatMonitor,EmulateInstr));
937	}
938	}
939	else
940	rc = rc2;
941
942	/* See use in pgmPoolAccessHandlerSimple(). */
943	PGM_INVL_GUEST_TLBS();
944
945	LogFlow(("pgmPoolAccessHandlerPT: returns %Rrc (flushed)\n", rc));
946	return rc;
947
948	}
949
950
951	/**
952	* Handles the STOSD write accesses.
953	*
954	* @returns VBox status code suitable for scheduling.
955	* @param pVM The VM handle.
956	* @param pPool The pool.
957	* @param pPage The pool page (head).
958	* @param pCpu The disassembly of the write instruction.
959	* @param pRegFrame The trap register frame.
960	* @param GCPhysFault The fault address as guest physical address.
961	* @param pvFault The fault address.
962	*/
963	DECLINLINE(int) pgmPoolAccessHandlerSTOSD(PVM pVM, PPGMPOOL pPool, PPGMPOOLPAGE pPage, PDISCPUSTATE pCpu,
964	PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, RTGCPTR pvFault)
965	{
966	Assert(pCpu->mode == CPUMODE_32BIT);
967
968	Log3(("pgmPoolAccessHandlerSTOSD\n"));
969
970	/*
971	* Increment the modification counter and insert it into the list
972	* of modified pages the first time.
973	*/
974	if (!pPage->cModifications++)
975	pgmPoolMonitorModifiedInsert(pPool, pPage);
976
977	/*
978	* Execute REP STOSD.
979	*
980	* This ASSUMES that we're not invoked by Trap0e on in a out-of-sync
981	* write situation, meaning that it's safe to write here.
982	*/
983	PVMCPU pVCpu = VMMGetCpu(pPool->CTX_SUFF(pVM));
984	RTGCUINTPTR pu32 = (RTGCUINTPTR)pvFault;
985	while (pRegFrame->ecx)
986	{
987	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
988	uint32_t iPrevSubset = PGMDynMapPushAutoSubset(pVCpu);
989	pgmPoolMonitorChainChanging(pVCpu, pPool, pPage, GCPhysFault, (RTGCPTR)pu32, NULL);
990	PGMDynMapPopAutoSubset(pVCpu, iPrevSubset);
991	#else
992	pgmPoolMonitorChainChanging(pVCpu, pPool, pPage, GCPhysFault, (RTGCPTR)pu32, NULL);
993	#endif
994	#ifdef IN_RC
995	(uint32_t )pu32 = pRegFrame->eax;
996	#else
997	PGMPhysSimpleWriteGCPhys(pVM, GCPhysFault, &pRegFrame->eax, 4);
998	#endif
999	pu32 += 4;
1000	GCPhysFault += 4;
1001	pRegFrame->edi += 4;
1002	pRegFrame->ecx--;
1003	}
1004	pRegFrame->rip += pCpu->opsize;
1005
1006	#ifdef IN_RC
1007	/* See use in pgmPoolAccessHandlerSimple(). */
1008	PGM_INVL_GUEST_TLBS();
1009	#endif
1010
1011	LogFlow(("pgmPoolAccessHandlerSTOSD: returns\n"));
1012	return VINF_SUCCESS;
1013	}
1014
1015
1016	/**
1017	* Handles the simple write accesses.
1018	*
1019	* @returns VBox status code suitable for scheduling.
1020	* @param pVM The VM handle.
1021	* @param pVCpu The VMCPU handle.
1022	* @param pPool The pool.
1023	* @param pPage The pool page (head).
1024	* @param pCpu The disassembly of the write instruction.
1025	* @param pRegFrame The trap register frame.
1026	* @param GCPhysFault The fault address as guest physical address.
1027	* @param pvFault The fault address.
1028	*/
1029	DECLINLINE(int) pgmPoolAccessHandlerSimple(PVM pVM, PVMCPU pVCpu, PPGMPOOL pPool, PPGMPOOLPAGE pPage, PDISCPUSTATE pCpu,
1030	PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, RTGCPTR pvFault)
1031	{
1032	Log3(("pgmPoolAccessHandlerSimple\n"));
1033	/*
1034	* Increment the modification counter and insert it into the list
1035	* of modified pages the first time.
1036	*/
1037	if (!pPage->cModifications++)
1038	pgmPoolMonitorModifiedInsert(pPool, pPage);
1039
1040	/*
1041	* Clear all the pages. ASSUMES that pvFault is readable.
1042	*/
1043	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
1044	uint32_t iPrevSubset = PGMDynMapPushAutoSubset(pVCpu);
1045	pgmPoolMonitorChainChanging(pVCpu, pPool, pPage, GCPhysFault, pvFault, pCpu);
1046	PGMDynMapPopAutoSubset(pVCpu, iPrevSubset);
1047	#else
1048	pgmPoolMonitorChainChanging(pVCpu, pPool, pPage, GCPhysFault, pvFault, pCpu);
1049	#endif
1050
1051	/*
1052	* Interpret the instruction.
1053	*/
1054	uint32_t cb;
1055	int rc = EMInterpretInstructionCPU(pVM, pVCpu, pCpu, pRegFrame, pvFault, &cb);
1056	if (RT_SUCCESS(rc))
1057	pRegFrame->rip += pCpu->opsize;
1058	else if (rc == VERR_EM_INTERPRETER)
1059	{
1060	LogFlow(("pgmPoolAccessHandlerPTWorker: Interpretation failed for %04x:%RGv - opcode=%d\n",
1061	pRegFrame->cs, (RTGCPTR)pRegFrame->rip, pCpu->pCurInstr->opcode));
1062	rc = VINF_EM_RAW_EMULATE_INSTR;
1063	STAM_COUNTER_INC(&pPool->CTX_MID_Z(StatMonitor,EmulateInstr));
1064	}
1065
1066	#ifdef IN_RC
1067	/*
1068	* Quick hack, with logging enabled we're getting stale
1069	* code TLBs but no data TLB for EIP and crash in EMInterpretDisasOne.
1070	* Flushing here is BAD and expensive, I think EMInterpretDisasOne will
1071	* have to be fixed to support this. But that'll have to wait till next week.
1072	*
1073	* An alternative is to keep track of the changed PTEs together with the
1074	* GCPhys from the guest PT. This may proove expensive though.
1075	*
1076	* At the moment, it's VITAL that it's done AFTER the instruction interpreting
1077	* because we need the stale TLBs in some cases (XP boot). This MUST be fixed properly!
1078	*/
1079	PGM_INVL_GUEST_TLBS();
1080	#endif
1081
1082	LogFlow(("pgmPoolAccessHandlerSimple: returns %Rrc cb=%d\n", rc, cb));
1083	return rc;
1084	}
1085
1086	/**
1087	* \#PF Handler callback for PT write accesses.
1088	*
1089	* @returns VBox status code (appropriate for GC return).
1090	* @param pVM VM Handle.
1091	* @param uErrorCode CPU Error code.
1092	* @param pRegFrame Trap register frame.
1093	* NULL on DMA and other non CPU access.
1094	* @param pvFault The fault address (cr2).
1095	* @param GCPhysFault The GC physical address corresponding to pvFault.
1096	* @param pvUser User argument.
1097	*/
1098	DECLEXPORT(int) pgmPoolAccessHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser)
1099	{
1100	STAM_PROFILE_START(&pVM->pgm.s.CTX_SUFF(pPool)->CTX_SUFF_Z(StatMonitor), a);
1101	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
1102	PPGMPOOLPAGE pPage = (PPGMPOOLPAGE)pvUser;
1103	PVMCPU pVCpu = VMMGetCpu(pVM);
1104
1105	LogFlow(("pgmPoolAccessHandler: pvFault=%RGv pPage=%p:{.idx=%d} GCPhysFault=%RGp\n", pvFault, pPage, pPage->idx, GCPhysFault));
1106
1107	/*
1108	* We should ALWAYS have the list head as user parameter. This
1109	* is because we use that page to record the changes.
1110	*/
1111	Assert(pPage->iMonitoredPrev == NIL_PGMPOOL_IDX);
1112
1113	/*
1114	* Disassemble the faulting instruction.
1115	*/
1116	DISCPUSTATE Cpu;
1117	int rc = EMInterpretDisasOne(pVM, pVCpu, pRegFrame, &Cpu, NULL);
1118	AssertRCReturn(rc, rc);
1119
1120	/*
1121	* Check if it's worth dealing with.
1122	*/
1123	bool fReused = false;
1124	if ( ( pPage->cModifications < 48 /** @todo #define / /* @todo need to check that it's not mapping EIP. / /* @todo adjust this! */
1125	\|\| pgmPoolIsPageLocked(&pVM->pgm.s, pPage)
1126	)
1127	&& !(fReused = pgmPoolMonitorIsReused(pVM, pPage, pRegFrame, &Cpu, pvFault))
1128	&& !pgmPoolMonitorIsForking(pPool, &Cpu, GCPhysFault & PAGE_OFFSET_MASK))
1129	{
1130	/*
1131	* Simple instructions, no REP prefix.
1132	*/
1133	if (!(Cpu.prefix & (PREFIX_REP \| PREFIX_REPNE)))
1134	{
1135	rc = pgmPoolAccessHandlerSimple(pVM, pVCpu, pPool, pPage, &Cpu, pRegFrame, GCPhysFault, pvFault);
1136	STAM_PROFILE_STOP_EX(&pVM->pgm.s.CTX_SUFF(pPool)->CTX_SUFF_Z(StatMonitor), &pPool->CTX_MID_Z(StatMonitor,Handled), a);
1137	return rc;
1138	}
1139
1140	/*
1141	* Windows is frequently doing small memset() operations (netio test 4k+).
1142	* We have to deal with these or we'll kill the cache and performance.
1143	*/
1144	if ( Cpu.pCurInstr->opcode == OP_STOSWD
1145	&& CPUMGetGuestCPL(pVCpu, pRegFrame) == 0
1146	&& pRegFrame->ecx <= 0x20
1147	&& pRegFrame->ecx * 4 <= PAGE_SIZE - ((uintptr_t)pvFault & PAGE_OFFSET_MASK)
1148	&& !((uintptr_t)pvFault & 3)
1149	&& (pRegFrame->eax == 0 \|\| pRegFrame->eax == 0x80) /* the two values observed. */
1150	&& Cpu.mode == CPUMODE_32BIT
1151	&& Cpu.opmode == CPUMODE_32BIT
1152	&& Cpu.addrmode == CPUMODE_32BIT
1153	&& Cpu.prefix == PREFIX_REP
1154	&& !pRegFrame->eflags.Bits.u1DF
1155	)
1156	{
1157	rc = pgmPoolAccessHandlerSTOSD(pVM, pPool, pPage, &Cpu, pRegFrame, GCPhysFault, pvFault);
1158	STAM_PROFILE_STOP_EX(&pVM->pgm.s.CTX_SUFF(pPool)->CTX_SUFF_Z(StatMonitor), &pPool->CTX_MID_Z(StatMonitor,RepStosd), a);
1159	return rc;
1160	}
1161
1162	/* REP prefix, don't bother. */
1163	STAM_COUNTER_INC(&pPool->CTX_MID_Z(StatMonitor,RepPrefix));
1164	Log4(("pgmPoolAccessHandler: eax=%#x ecx=%#x edi=%#x esi=%#x rip=%RGv opcode=%d prefix=%#x\n",
1165	pRegFrame->eax, pRegFrame->ecx, pRegFrame->edi, pRegFrame->esi, (RTGCPTR)pRegFrame->rip, Cpu.pCurInstr->opcode, Cpu.prefix));
1166	}
1167
1168	/*
1169	* Not worth it, so flush it.
1170	*
1171	* If we considered it to be reused, don't go back to ring-3
1172	* to emulate failed instructions since we usually cannot
1173	* interpret then. This may be a bit risky, in which case
1174	* the reuse detection must be fixed.
1175	*/
1176	rc = pgmPoolAccessHandlerFlush(pVM, pVCpu, pPool, pPage, &Cpu, pRegFrame, GCPhysFault, pvFault);
1177	if (rc == VINF_EM_RAW_EMULATE_INSTR && fReused)
1178	rc = VINF_SUCCESS;
1179	STAM_PROFILE_STOP_EX(&pVM->pgm.s.CTX_SUFF(pPool)->CTX_SUFF_Z(StatMonitor), &pPool->CTX_MID_Z(StatMonitor,FlushPage), a);
1180	return rc;
1181	}
1182
1183	# endif /* !IN_RING3 */
1184	#endif /* PGMPOOL_WITH_MONITORING */
1185
1186	#ifdef PGMPOOL_WITH_CACHE
1187
1188	/**
1189	* Inserts a page into the GCPhys hash table.
1190	*
1191	* @param pPool The pool.
1192	* @param pPage The page.
1193	*/
1194	DECLINLINE(void) pgmPoolHashInsert(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
1195	{
1196	Log3(("pgmPoolHashInsert: %RGp\n", pPage->GCPhys));
1197	Assert(pPage->GCPhys != NIL_RTGCPHYS); Assert(pPage->iNext == NIL_PGMPOOL_IDX);
1198	uint16_t iHash = PGMPOOL_HASH(pPage->GCPhys);
1199	pPage->iNext = pPool->aiHash[iHash];
1200	pPool->aiHash[iHash] = pPage->idx;
1201	}
1202
1203
1204	/**
1205	* Removes a page from the GCPhys hash table.
1206	*
1207	* @param pPool The pool.
1208	* @param pPage The page.
1209	*/
1210	DECLINLINE(void) pgmPoolHashRemove(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
1211	{
1212	Log3(("pgmPoolHashRemove: %RGp\n", pPage->GCPhys));
1213	uint16_t iHash = PGMPOOL_HASH(pPage->GCPhys);
1214	if (pPool->aiHash[iHash] == pPage->idx)
1215	pPool->aiHash[iHash] = pPage->iNext;
1216	else
1217	{
1218	uint16_t iPrev = pPool->aiHash[iHash];
1219	for (;;)
1220	{
1221	const int16_t i = pPool->aPages[iPrev].iNext;
1222	if (i == pPage->idx)
1223	{
1224	pPool->aPages[iPrev].iNext = pPage->iNext;
1225	break;
1226	}
1227	if (i == NIL_PGMPOOL_IDX)
1228	{
1229	AssertReleaseMsgFailed(("GCPhys=%RGp idx=%#x\n", pPage->GCPhys, pPage->idx));
1230	break;
1231	}
1232	iPrev = i;
1233	}
1234	}
1235	pPage->iNext = NIL_PGMPOOL_IDX;
1236	}
1237
1238
1239	/**
1240	* Frees up one cache page.
1241	*
1242	* @returns VBox status code.
1243	* @retval VINF_SUCCESS on success.
1244	* @param pPool The pool.
1245	* @param iUser The user index.
1246	*/
1247	static int pgmPoolCacheFreeOne(PPGMPOOL pPool, uint16_t iUser)
1248	{
1249	#ifndef IN_RC
1250	const PVM pVM = pPool->CTX_SUFF(pVM);
1251	#endif
1252	Assert(pPool->iAgeHead != pPool->iAgeTail); /* We shouldn't be here if there < 2 cached entries! */
1253	STAM_COUNTER_INC(&pPool->StatCacheFreeUpOne);
1254
1255	/*
1256	* Select one page from the tail of the age list.
1257	*/
1258	PPGMPOOLPAGE pPage;
1259	for (unsigned iLoop = 0; ; iLoop++)
1260	{
1261	uint16_t iToFree = pPool->iAgeTail;
1262	if (iToFree == iUser)
1263	iToFree = pPool->aPages[iToFree].iAgePrev;
1264	/* This is the alternative to the SyncCR3 pgmPoolCacheUsed calls.
1265	if (pPool->aPages[iToFree].iUserHead != NIL_PGMPOOL_USER_INDEX)
1266	{
1267	uint16_t i = pPool->aPages[iToFree].iAgePrev;
1268	for (unsigned j = 0; j < 10 && i != NIL_PGMPOOL_USER_INDEX; j++, i = pPool->aPages[i].iAgePrev)
1269	{
1270	if (pPool->aPages[iToFree].iUserHead == NIL_PGMPOOL_USER_INDEX)
1271	continue;
1272	iToFree = i;
1273	break;
1274	}
1275	}
1276	*/
1277	Assert(iToFree != iUser);
1278	AssertRelease(iToFree != NIL_PGMPOOL_IDX);
1279	pPage = &pPool->aPages[iToFree];
1280
1281	/*
1282	* Reject any attempts at flushing the currently active shadow CR3 mapping.
1283	* Call pgmPoolCacheUsed to move the page to the head of the age list.
1284	*/
1285	if (!pgmPoolIsPageLocked(&pPool->CTX_SUFF(pVM)->pgm.s, pPage))
1286	break;
1287	LogFlow(("pgmPoolCacheFreeOne: refuse CR3 mapping\n"));
1288	pgmPoolCacheUsed(pPool, pPage);
1289	AssertLogRelReturn(iLoop < 8192, VERR_INTERNAL_ERROR);
1290	}
1291
1292	/*
1293	* Found a usable page, flush it and return.
1294	*/
1295	int rc = pgmPoolFlushPage(pPool, pPage);
1296	if (rc == VINF_SUCCESS)
1297	PGM_INVL_GUEST_TLBS(); /* see PT handler. */
1298	return rc;
1299	}
1300
1301
1302	/**
1303	* Checks if a kind mismatch is really a page being reused
1304	* or if it's just normal remappings.
1305	*
1306	* @returns true if reused and the cached page (enmKind1) should be flushed
1307	* @returns false if not reused.
1308	* @param enmKind1 The kind of the cached page.
1309	* @param enmKind2 The kind of the requested page.
1310	*/
1311	static bool pgmPoolCacheReusedByKind(PGMPOOLKIND enmKind1, PGMPOOLKIND enmKind2)
1312	{
1313	switch (enmKind1)
1314	{
1315	/*
1316	* Never reuse them. There is no remapping in non-paging mode.
1317	*/
1318	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
1319	case PGMPOOLKIND_32BIT_PD_PHYS:
1320	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
1321	case PGMPOOLKIND_PAE_PD_PHYS:
1322	case PGMPOOLKIND_PAE_PDPT_PHYS:
1323	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
1324	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
1325	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
1326	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
1327	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
1328	case PGMPOOLKIND_PAE_PDPT_FOR_32BIT: /* never reuse them for other types */
1329	return false;
1330
1331	/*
1332	* It's perfectly fine to reuse these, except for PAE and non-paging stuff.
1333	*/
1334	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
1335	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
1336	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
1337	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
1338	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
1339	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
1340	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
1341	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
1342	case PGMPOOLKIND_32BIT_PD:
1343	case PGMPOOLKIND_PAE_PDPT:
1344	switch (enmKind2)
1345	{
1346	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
1347	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
1348	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
1349	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
1350	case PGMPOOLKIND_64BIT_PML4:
1351	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
1352	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
1353	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
1354	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
1355	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
1356	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
1357	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
1358	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
1359	return true;
1360	default:
1361	return false;
1362	}
1363
1364	/*
1365	* It's perfectly fine to reuse these, except for PAE and non-paging stuff.
1366	*/
1367	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
1368	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
1369	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
1370	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
1371	case PGMPOOLKIND_64BIT_PML4:
1372	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
1373	switch (enmKind2)
1374	{
1375	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
1376	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
1377	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
1378	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
1379	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
1380	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
1381	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
1382	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
1383	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
1384	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
1385	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
1386	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
1387	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
1388	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
1389	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
1390	return true;
1391	default:
1392	return false;
1393	}
1394
1395	/*
1396	* These cannot be flushed, and it's common to reuse the PDs as PTs.
1397	*/
1398	case PGMPOOLKIND_ROOT_NESTED:
1399	return false;
1400
1401	default:
1402	AssertFatalMsgFailed(("enmKind1=%d\n", enmKind1));
1403	}
1404	}
1405
1406
1407	/**
1408	* Attempts to satisfy a pgmPoolAlloc request from the cache.
1409	*
1410	* @returns VBox status code.
1411	* @retval VINF_PGM_CACHED_PAGE on success.
1412	* @retval VERR_FILE_NOT_FOUND if not found.
1413	* @param pPool The pool.
1414	* @param GCPhys The GC physical address of the page we're gonna shadow.
1415	* @param enmKind The kind of mapping.
1416	* @param iUser The shadow page pool index of the user table.
1417	* @param iUserTable The index into the user table (shadowed).
1418	* @param ppPage Where to store the pointer to the page.
1419	*/
1420	static int pgmPoolCacheAlloc(PPGMPOOL pPool, RTGCPHYS GCPhys, PGMPOOLKIND enmKind, uint16_t iUser, uint32_t iUserTable, PPPGMPOOLPAGE ppPage)
1421	{
1422	#ifndef IN_RC
1423	const PVM pVM = pPool->CTX_SUFF(pVM);
1424	#endif
1425	/*
1426	* Look up the GCPhys in the hash.
1427	*/
1428	unsigned i = pPool->aiHash[PGMPOOL_HASH(GCPhys)];
1429	Log3(("pgmPoolCacheAlloc: %RGp kind %s iUser=%x iUserTable=%x SLOT=%d\n", GCPhys, pgmPoolPoolKindToStr(enmKind), iUser, iUserTable, i));
1430	if (i != NIL_PGMPOOL_IDX)
1431	{
1432	do
1433	{
1434	PPGMPOOLPAGE pPage = &pPool->aPages[i];
1435	Log4(("pgmPoolCacheAlloc: slot %d found page %RGp\n", i, pPage->GCPhys));
1436	if (pPage->GCPhys == GCPhys)
1437	{
1438	if ((PGMPOOLKIND)pPage->enmKind == enmKind)
1439	{
1440	/* Put it at the start of the use list to make sure pgmPoolTrackAddUser
1441	* doesn't flush it in case there are no more free use records.
1442	*/
1443	pgmPoolCacheUsed(pPool, pPage);
1444
1445	int rc = pgmPoolTrackAddUser(pPool, pPage, iUser, iUserTable);
1446	if (RT_SUCCESS(rc))
1447	{
1448	Assert((PGMPOOLKIND)pPage->enmKind == enmKind);
1449	*ppPage = pPage;
1450	STAM_COUNTER_INC(&pPool->StatCacheHits);
1451	return VINF_PGM_CACHED_PAGE;
1452	}
1453	return rc;
1454	}
1455
1456	/*
1457	* The kind is different. In some cases we should now flush the page
1458	* as it has been reused, but in most cases this is normal remapping
1459	* of PDs as PT or big pages using the GCPhys field in a slightly
1460	* different way than the other kinds.
1461	*/
1462	if (pgmPoolCacheReusedByKind((PGMPOOLKIND)pPage->enmKind, enmKind))
1463	{
1464	STAM_COUNTER_INC(&pPool->StatCacheKindMismatches);
1465	pgmPoolFlushPage(pPool, pPage);
1466	PGM_INVL_GUEST_TLBS(); /* see PT handler. */
1467	break;
1468	}
1469	}
1470
1471	/* next */
1472	i = pPage->iNext;
1473	} while (i != NIL_PGMPOOL_IDX);
1474	}
1475
1476	Log3(("pgmPoolCacheAlloc: Missed GCPhys=%RGp enmKind=%s\n", GCPhys, pgmPoolPoolKindToStr(enmKind)));
1477	STAM_COUNTER_INC(&pPool->StatCacheMisses);
1478	return VERR_FILE_NOT_FOUND;
1479	}
1480
1481
1482	/**
1483	* Inserts a page into the cache.
1484	*
1485	* @param pPool The pool.
1486	* @param pPage The cached page.
1487	* @param fCanBeCached Set if the page is fit for caching from the caller's point of view.
1488	*/
1489	static void pgmPoolCacheInsert(PPGMPOOL pPool, PPGMPOOLPAGE pPage, bool fCanBeCached)
1490	{
1491	/*
1492	* Insert into the GCPhys hash if the page is fit for that.
1493	*/
1494	Assert(!pPage->fCached);
1495	if (fCanBeCached)
1496	{
1497	pPage->fCached = true;
1498	pgmPoolHashInsert(pPool, pPage);
1499	Log3(("pgmPoolCacheInsert: Caching %p:{.Core=%RHp, .idx=%d, .enmKind=%s, GCPhys=%RGp}\n",
1500	pPage, pPage->Core.Key, pPage->idx, pgmPoolPoolKindToStr(pPage->enmKind), pPage->GCPhys));
1501	STAM_COUNTER_INC(&pPool->StatCacheCacheable);
1502	}
1503	else
1504	{
1505	Log3(("pgmPoolCacheInsert: Not caching %p:{.Core=%RHp, .idx=%d, .enmKind=%s, GCPhys=%RGp}\n",
1506	pPage, pPage->Core.Key, pPage->idx, pgmPoolPoolKindToStr(pPage->enmKind), pPage->GCPhys));
1507	STAM_COUNTER_INC(&pPool->StatCacheUncacheable);
1508	}
1509
1510	/*
1511	* Insert at the head of the age list.
1512	*/
1513	pPage->iAgePrev = NIL_PGMPOOL_IDX;
1514	pPage->iAgeNext = pPool->iAgeHead;
1515	if (pPool->iAgeHead != NIL_PGMPOOL_IDX)
1516	pPool->aPages[pPool->iAgeHead].iAgePrev = pPage->idx;
1517	else
1518	pPool->iAgeTail = pPage->idx;
1519	pPool->iAgeHead = pPage->idx;
1520	}
1521
1522
1523	/**
1524	* Flushes a cached page.
1525	*
1526	* @param pPool The pool.
1527	* @param pPage The cached page.
1528	*/
1529	static void pgmPoolCacheFlushPage(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
1530	{
1531	Log3(("pgmPoolCacheFlushPage: %RGp\n", pPage->GCPhys));
1532
1533	/*
1534	* Remove the page from the hash.
1535	*/
1536	if (pPage->fCached)
1537	{
1538	pPage->fCached = false;
1539	pgmPoolHashRemove(pPool, pPage);
1540	}
1541	else
1542	Assert(pPage->iNext == NIL_PGMPOOL_IDX);
1543
1544	/*
1545	* Remove it from the age list.
1546	*/
1547	if (pPage->iAgeNext != NIL_PGMPOOL_IDX)
1548	pPool->aPages[pPage->iAgeNext].iAgePrev = pPage->iAgePrev;
1549	else
1550	pPool->iAgeTail = pPage->iAgePrev;
1551	if (pPage->iAgePrev != NIL_PGMPOOL_IDX)
1552	pPool->aPages[pPage->iAgePrev].iAgeNext = pPage->iAgeNext;
1553	else
1554	pPool->iAgeHead = pPage->iAgeNext;
1555	pPage->iAgeNext = NIL_PGMPOOL_IDX;
1556	pPage->iAgePrev = NIL_PGMPOOL_IDX;
1557	}
1558
1559	#endif /* PGMPOOL_WITH_CACHE */
1560	#ifdef PGMPOOL_WITH_MONITORING
1561
1562	/**
1563	* Looks for pages sharing the monitor.
1564	*
1565	* @returns Pointer to the head page.
1566	* @returns NULL if not found.
1567	* @param pPool The Pool
1568	* @param pNewPage The page which is going to be monitored.
1569	*/
1570	static PPGMPOOLPAGE pgmPoolMonitorGetPageByGCPhys(PPGMPOOL pPool, PPGMPOOLPAGE pNewPage)
1571	{
1572	#ifdef PGMPOOL_WITH_CACHE
1573	/*
1574	* Look up the GCPhys in the hash.
1575	*/
1576	RTGCPHYS GCPhys = pNewPage->GCPhys & ~(RTGCPHYS)(PAGE_SIZE - 1);
1577	unsigned i = pPool->aiHash[PGMPOOL_HASH(GCPhys)];
1578	if (i == NIL_PGMPOOL_IDX)
1579	return NULL;
1580	do
1581	{
1582	PPGMPOOLPAGE pPage = &pPool->aPages[i];
1583	if ( pPage->GCPhys - GCPhys < PAGE_SIZE
1584	&& pPage != pNewPage)
1585	{
1586	switch (pPage->enmKind)
1587	{
1588	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
1589	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
1590	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
1591	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
1592	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
1593	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
1594	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
1595	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
1596	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
1597	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
1598	case PGMPOOLKIND_64BIT_PML4:
1599	case PGMPOOLKIND_32BIT_PD:
1600	case PGMPOOLKIND_PAE_PDPT:
1601	{
1602	/* find the head */
1603	while (pPage->iMonitoredPrev != NIL_PGMPOOL_IDX)
1604	{
1605	Assert(pPage->iMonitoredPrev != pPage->idx);
1606	pPage = &pPool->aPages[pPage->iMonitoredPrev];
1607	}
1608	return pPage;
1609	}
1610
1611	/* ignore, no monitoring. */
1612	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
1613	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
1614	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
1615	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
1616	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
1617	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
1618	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
1619	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
1620	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
1621	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
1622	case PGMPOOLKIND_ROOT_NESTED:
1623	case PGMPOOLKIND_PAE_PD_PHYS:
1624	case PGMPOOLKIND_PAE_PDPT_PHYS:
1625	case PGMPOOLKIND_32BIT_PD_PHYS:
1626	case PGMPOOLKIND_PAE_PDPT_FOR_32BIT:
1627	break;
1628	default:
1629	AssertFatalMsgFailed(("enmKind=%d idx=%d\n", pPage->enmKind, pPage->idx));
1630	}
1631	}
1632
1633	/* next */
1634	i = pPage->iNext;
1635	} while (i != NIL_PGMPOOL_IDX);
1636	#endif
1637	return NULL;
1638	}
1639
1640
1641	/**
1642	* Enabled write monitoring of a guest page.
1643	*
1644	* @returns VBox status code.
1645	* @retval VINF_SUCCESS on success.
1646	* @param pPool The pool.
1647	* @param pPage The cached page.
1648	*/
1649	static int pgmPoolMonitorInsert(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
1650	{
1651	LogFlow(("pgmPoolMonitorInsert %RGp\n", pPage->GCPhys & ~(RTGCPHYS)(PAGE_SIZE - 1)));
1652
1653	/*
1654	* Filter out the relevant kinds.
1655	*/
1656	switch (pPage->enmKind)
1657	{
1658	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
1659	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
1660	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
1661	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
1662	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
1663	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
1664	case PGMPOOLKIND_64BIT_PML4:
1665	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
1666	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
1667	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
1668	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
1669	case PGMPOOLKIND_32BIT_PD:
1670	case PGMPOOLKIND_PAE_PDPT:
1671	break;
1672
1673	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
1674	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
1675	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
1676	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
1677	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
1678	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
1679	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
1680	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
1681	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
1682	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
1683	case PGMPOOLKIND_ROOT_NESTED:
1684	/* Nothing to monitor here. */
1685	return VINF_SUCCESS;
1686
1687	case PGMPOOLKIND_32BIT_PD_PHYS:
1688	case PGMPOOLKIND_PAE_PDPT_PHYS:
1689	case PGMPOOLKIND_PAE_PD_PHYS:
1690	case PGMPOOLKIND_PAE_PDPT_FOR_32BIT:
1691	/* Nothing to monitor here. */
1692	return VINF_SUCCESS;
1693	#ifdef PGMPOOL_WITH_MIXED_PT_CR3
1694	break;
1695	#else
1696	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
1697	#endif
1698	default:
1699	AssertFatalMsgFailed(("This can't happen! enmKind=%d\n", pPage->enmKind));
1700	}
1701
1702	/*
1703	* Install handler.
1704	*/
1705	int rc;
1706	PPGMPOOLPAGE pPageHead = pgmPoolMonitorGetPageByGCPhys(pPool, pPage);
1707	if (pPageHead)
1708	{
1709	Assert(pPageHead != pPage); Assert(pPageHead->iMonitoredNext != pPage->idx);
1710	Assert(pPageHead->iMonitoredPrev != pPage->idx);
1711	pPage->iMonitoredPrev = pPageHead->idx;
1712	pPage->iMonitoredNext = pPageHead->iMonitoredNext;
1713	if (pPageHead->iMonitoredNext != NIL_PGMPOOL_IDX)
1714	pPool->aPages[pPageHead->iMonitoredNext].iMonitoredPrev = pPage->idx;
1715	pPageHead->iMonitoredNext = pPage->idx;
1716	rc = VINF_SUCCESS;
1717	}
1718	else
1719	{
1720	Assert(pPage->iMonitoredNext == NIL_PGMPOOL_IDX); Assert(pPage->iMonitoredPrev == NIL_PGMPOOL_IDX);
1721	PVM pVM = pPool->CTX_SUFF(pVM);
1722	const RTGCPHYS GCPhysPage = pPage->GCPhys & ~(RTGCPHYS)(PAGE_SIZE - 1);
1723	rc = PGMHandlerPhysicalRegisterEx(pVM, PGMPHYSHANDLERTYPE_PHYSICAL_WRITE,
1724	GCPhysPage, GCPhysPage + (PAGE_SIZE - 1),
1725	pPool->pfnAccessHandlerR3, MMHyperCCToR3(pVM, pPage),
1726	pPool->pfnAccessHandlerR0, MMHyperCCToR0(pVM, pPage),
1727	pPool->pfnAccessHandlerRC, MMHyperCCToRC(pVM, pPage),
1728	pPool->pszAccessHandler);
1729	/** @todo we should probably deal with out-of-memory conditions here, but for now increasing
1730	* the heap size should suffice. */
1731	AssertFatalMsgRC(rc, ("PGMHandlerPhysicalRegisterEx %RGp failed with %Rrc\n", GCPhysPage, rc));
1732	Assert(!(pVM->pgm.s.fGlobalSyncFlags & PGM_GLOBAL_SYNC_CLEAR_PGM_POOL) \|\| VMCPU_FF_ISSET(VMMGetCpu(pVM), VMCPU_FF_PGM_SYNC_CR3));
1733	}
1734	pPage->fMonitored = true;
1735	return rc;
1736	}
1737
1738
1739	/**
1740	* Disables write monitoring of a guest page.
1741	*
1742	* @returns VBox status code.
1743	* @retval VINF_SUCCESS on success.
1744	* @param pPool The pool.
1745	* @param pPage The cached page.
1746	*/
1747	static int pgmPoolMonitorFlush(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
1748	{
1749	/*
1750	* Filter out the relevant kinds.
1751	*/
1752	switch (pPage->enmKind)
1753	{
1754	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
1755	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
1756	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
1757	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
1758	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
1759	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
1760	case PGMPOOLKIND_64BIT_PML4:
1761	case PGMPOOLKIND_32BIT_PD:
1762	case PGMPOOLKIND_PAE_PDPT:
1763	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
1764	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
1765	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
1766	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
1767	break;
1768
1769	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
1770	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
1771	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
1772	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
1773	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
1774	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
1775	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
1776	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
1777	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
1778	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
1779	case PGMPOOLKIND_ROOT_NESTED:
1780	case PGMPOOLKIND_PAE_PD_PHYS:
1781	case PGMPOOLKIND_PAE_PDPT_PHYS:
1782	case PGMPOOLKIND_32BIT_PD_PHYS:
1783	/* Nothing to monitor here. */
1784	return VINF_SUCCESS;
1785
1786	#ifdef PGMPOOL_WITH_MIXED_PT_CR3
1787	break;
1788	#endif
1789	default:
1790	AssertFatalMsgFailed(("This can't happen! enmKind=%d\n", pPage->enmKind));
1791	}
1792
1793	/*
1794	* Remove the page from the monitored list or uninstall it if last.
1795	*/
1796	const PVM pVM = pPool->CTX_SUFF(pVM);
1797	int rc;
1798	if ( pPage->iMonitoredNext != NIL_PGMPOOL_IDX
1799	\|\| pPage->iMonitoredPrev != NIL_PGMPOOL_IDX)
1800	{
1801	if (pPage->iMonitoredPrev == NIL_PGMPOOL_IDX)
1802	{
1803	PPGMPOOLPAGE pNewHead = &pPool->aPages[pPage->iMonitoredNext];
1804	pNewHead->iMonitoredPrev = NIL_PGMPOOL_IDX;
1805	rc = PGMHandlerPhysicalChangeCallbacks(pVM, pPage->GCPhys & ~(RTGCPHYS)(PAGE_SIZE - 1),
1806	pPool->pfnAccessHandlerR3, MMHyperCCToR3(pVM, pNewHead),
1807	pPool->pfnAccessHandlerR0, MMHyperCCToR0(pVM, pNewHead),
1808	pPool->pfnAccessHandlerRC, MMHyperCCToRC(pVM, pNewHead),
1809	pPool->pszAccessHandler);
1810	AssertFatalRCSuccess(rc);
1811	pPage->iMonitoredNext = NIL_PGMPOOL_IDX;
1812	}
1813	else
1814	{
1815	pPool->aPages[pPage->iMonitoredPrev].iMonitoredNext = pPage->iMonitoredNext;
1816	if (pPage->iMonitoredNext != NIL_PGMPOOL_IDX)
1817	{
1818	pPool->aPages[pPage->iMonitoredNext].iMonitoredPrev = pPage->iMonitoredPrev;
1819	pPage->iMonitoredNext = NIL_PGMPOOL_IDX;
1820	}
1821	pPage->iMonitoredPrev = NIL_PGMPOOL_IDX;
1822	rc = VINF_SUCCESS;
1823	}
1824	}
1825	else
1826	{
1827	rc = PGMHandlerPhysicalDeregister(pVM, pPage->GCPhys & ~(RTGCPHYS)(PAGE_SIZE - 1));
1828	AssertFatalRC(rc);
1829	AssertMsg(!(pVM->pgm.s.fGlobalSyncFlags & PGM_GLOBAL_SYNC_CLEAR_PGM_POOL) \|\| VMCPU_FF_ISSET(VMMGetCpu(pVM), VMCPU_FF_PGM_SYNC_CR3),
1830	("%#x %#x\n", pVM->pgm.s.fGlobalSyncFlags, pVM->fGlobalForcedActions));
1831	}
1832	pPage->fMonitored = false;
1833
1834	/*
1835	* Remove it from the list of modified pages (if in it).
1836	*/
1837	pgmPoolMonitorModifiedRemove(pPool, pPage);
1838
1839	return rc;
1840	}
1841
1842
1843	/**
1844	* Inserts the page into the list of modified pages.
1845	*
1846	* @param pPool The pool.
1847	* @param pPage The page.
1848	*/
1849	void pgmPoolMonitorModifiedInsert(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
1850	{
1851	Log3(("pgmPoolMonitorModifiedInsert: idx=%d\n", pPage->idx));
1852	AssertMsg( pPage->iModifiedNext == NIL_PGMPOOL_IDX
1853	&& pPage->iModifiedPrev == NIL_PGMPOOL_IDX
1854	&& pPool->iModifiedHead != pPage->idx,
1855	("Next=%d Prev=%d idx=%d cModifications=%d Head=%d cModifiedPages=%d\n",
1856	pPage->iModifiedNext, pPage->iModifiedPrev, pPage->idx, pPage->cModifications,
1857	pPool->iModifiedHead, pPool->cModifiedPages));
1858
1859	pPage->iModifiedNext = pPool->iModifiedHead;
1860	if (pPool->iModifiedHead != NIL_PGMPOOL_IDX)
1861	pPool->aPages[pPool->iModifiedHead].iModifiedPrev = pPage->idx;
1862	pPool->iModifiedHead = pPage->idx;
1863	pPool->cModifiedPages++;
1864	#ifdef VBOX_WITH_STATISTICS
1865	if (pPool->cModifiedPages > pPool->cModifiedPagesHigh)
1866	pPool->cModifiedPagesHigh = pPool->cModifiedPages;
1867	#endif
1868	}
1869
1870
1871	/**
1872	* Removes the page from the list of modified pages and resets the
1873	* moficiation counter.
1874	*
1875	* @param pPool The pool.
1876	* @param pPage The page which is believed to be in the list of modified pages.
1877	*/
1878	static void pgmPoolMonitorModifiedRemove(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
1879	{
1880	Log3(("pgmPoolMonitorModifiedRemove: idx=%d cModifications=%d\n", pPage->idx, pPage->cModifications));
1881	if (pPool->iModifiedHead == pPage->idx)
1882	{
1883	Assert(pPage->iModifiedPrev == NIL_PGMPOOL_IDX);
1884	pPool->iModifiedHead = pPage->iModifiedNext;
1885	if (pPage->iModifiedNext != NIL_PGMPOOL_IDX)
1886	{
1887	pPool->aPages[pPage->iModifiedNext].iModifiedPrev = NIL_PGMPOOL_IDX;
1888	pPage->iModifiedNext = NIL_PGMPOOL_IDX;
1889	}
1890	pPool->cModifiedPages--;
1891	}
1892	else if (pPage->iModifiedPrev != NIL_PGMPOOL_IDX)
1893	{
1894	pPool->aPages[pPage->iModifiedPrev].iModifiedNext = pPage->iModifiedNext;
1895	if (pPage->iModifiedNext != NIL_PGMPOOL_IDX)
1896	{
1897	pPool->aPages[pPage->iModifiedNext].iModifiedPrev = pPage->iModifiedPrev;
1898	pPage->iModifiedNext = NIL_PGMPOOL_IDX;
1899	}
1900	pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
1901	pPool->cModifiedPages--;
1902	}
1903	else
1904	Assert(pPage->iModifiedPrev == NIL_PGMPOOL_IDX);
1905	pPage->cModifications = 0;
1906	}
1907
1908
1909	/**
1910	* Zaps the list of modified pages, resetting their modification counters in the process.
1911	*
1912	* @param pVM The VM handle.
1913	*/
1914	void pgmPoolMonitorModifiedClearAll(PVM pVM)
1915	{
1916	pgmLock(pVM);
1917	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
1918	LogFlow(("pgmPoolMonitorModifiedClearAll: cModifiedPages=%d\n", pPool->cModifiedPages));
1919
1920	unsigned cPages = 0; NOREF(cPages);
1921	uint16_t idx = pPool->iModifiedHead;
1922	pPool->iModifiedHead = NIL_PGMPOOL_IDX;
1923	while (idx != NIL_PGMPOOL_IDX)
1924	{
1925	PPGMPOOLPAGE pPage = &pPool->aPages[idx];
1926	idx = pPage->iModifiedNext;
1927	pPage->iModifiedNext = NIL_PGMPOOL_IDX;
1928	pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
1929	pPage->cModifications = 0;
1930	Assert(++cPages);
1931	}
1932	AssertMsg(cPages == pPool->cModifiedPages, ("%d != %d\n", cPages, pPool->cModifiedPages));
1933	pPool->cModifiedPages = 0;
1934	pgmUnlock(pVM);
1935	}
1936
1937
1938	#ifdef IN_RING3
1939	/**
1940	* Callback to clear all shadow pages and clear all modification counters.
1941	*
1942	* @returns VBox status code.
1943	* @param pVM The VM handle.
1944	* @param pvUser Unused parameter
1945	* @remark Should only be used when monitoring is available, thus placed in
1946	* the PGMPOOL_WITH_MONITORING #ifdef.
1947	*/
1948	DECLCALLBACK(int) pgmPoolClearAll(PVM pVM, void *pvUser)
1949	{
1950	NOREF(pvUser);
1951	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
1952	STAM_PROFILE_START(&pPool->StatClearAll, c);
1953	LogFlow(("pgmPoolClearAll: cUsedPages=%d\n", pPool->cUsedPages));
1954
1955	/*
1956	* Iterate all the pages until we've encountered all that in use.
1957	* This is simple but not quite optimal solution.
1958	*/
1959	unsigned cModifiedPages = 0; NOREF(cModifiedPages);
1960	unsigned cLeft = pPool->cUsedPages;
1961	unsigned iPage = pPool->cCurPages;
1962	while (--iPage >= PGMPOOL_IDX_FIRST)
1963	{
1964	PPGMPOOLPAGE pPage = &pPool->aPages[iPage];
1965	if (pPage->GCPhys != NIL_RTGCPHYS)
1966	{
1967	switch (pPage->enmKind)
1968	{
1969	/*
1970	* We only care about shadow page tables.
1971	*/
1972	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
1973	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
1974	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
1975	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
1976	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
1977	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
1978	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
1979	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
1980	{
1981	#ifdef PGMPOOL_WITH_USER_TRACKING
1982	if (pPage->cPresent)
1983	#endif
1984	{
1985	void *pvShw = PGMPOOL_PAGE_2_PTR(pPool->CTX_SUFF(pVM), pPage);
1986	STAM_PROFILE_START(&pPool->StatZeroPage, z);
1987	ASMMemZeroPage(pvShw);
1988	STAM_PROFILE_STOP(&pPool->StatZeroPage, z);
1989	#ifdef PGMPOOL_WITH_USER_TRACKING
1990	pPage->cPresent = 0;
1991	pPage->iFirstPresent = ~0;
1992	#endif
1993	}
1994	}
1995	/* fall thru */
1996
1997	default:
1998	Assert(!pPage->cModifications \|\| ++cModifiedPages);
1999	Assert(pPage->iModifiedNext == NIL_PGMPOOL_IDX \|\| pPage->cModifications);
2000	Assert(pPage->iModifiedPrev == NIL_PGMPOOL_IDX \|\| pPage->cModifications);
2001	pPage->iModifiedNext = NIL_PGMPOOL_IDX;
2002	pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
2003	pPage->cModifications = 0;
2004	break;
2005
2006	}
2007	if (!--cLeft)
2008	break;
2009	}
2010	}
2011
2012	/* swipe the special pages too. */
2013	for (iPage = PGMPOOL_IDX_FIRST_SPECIAL; iPage < PGMPOOL_IDX_FIRST; iPage++)
2014	{
2015	PPGMPOOLPAGE pPage = &pPool->aPages[iPage];
2016	if (pPage->GCPhys != NIL_RTGCPHYS)
2017	{
2018	Assert(!pPage->cModifications \|\| ++cModifiedPages);
2019	Assert(pPage->iModifiedNext == NIL_PGMPOOL_IDX \|\| pPage->cModifications);
2020	Assert(pPage->iModifiedPrev == NIL_PGMPOOL_IDX \|\| pPage->cModifications);
2021	pPage->iModifiedNext = NIL_PGMPOOL_IDX;
2022	pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
2023	pPage->cModifications = 0;
2024	}
2025	}
2026
2027	#ifndef DEBUG_michael
2028	AssertMsg(cModifiedPages == pPool->cModifiedPages, ("%d != %d\n", cModifiedPages, pPool->cModifiedPages));
2029	#endif
2030	pPool->iModifiedHead = NIL_PGMPOOL_IDX;
2031	pPool->cModifiedPages = 0;
2032
2033	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
2034	/*
2035	* Clear all the GCPhys links and rebuild the phys ext free list.
2036	*/
2037	for (PPGMRAMRANGE pRam = pPool->CTX_SUFF(pVM)->pgm.s.CTX_SUFF(pRamRanges);
2038	pRam;
2039	pRam = pRam->CTX_SUFF(pNext))
2040	{
2041	unsigned iPage = pRam->cb >> PAGE_SHIFT;
2042	while (iPage-- > 0)
2043	PGM_PAGE_SET_TRACKING(&pRam->aPages[iPage], 0);
2044	}
2045
2046	pPool->iPhysExtFreeHead = 0;
2047	PPGMPOOLPHYSEXT paPhysExts = pPool->CTX_SUFF(paPhysExts);
2048	const unsigned cMaxPhysExts = pPool->cMaxPhysExts;
2049	for (unsigned i = 0; i < cMaxPhysExts; i++)
2050	{
2051	paPhysExts[i].iNext = i + 1;
2052	paPhysExts[i].aidx[0] = NIL_PGMPOOL_IDX;
2053	paPhysExts[i].aidx[1] = NIL_PGMPOOL_IDX;
2054	paPhysExts[i].aidx[2] = NIL_PGMPOOL_IDX;
2055	}
2056	paPhysExts[cMaxPhysExts - 1].iNext = NIL_PGMPOOL_PHYSEXT_INDEX;
2057	#endif
2058
2059	pPool->cPresent = 0;
2060	PGM_INVL_GUEST_TLBS();
2061	STAM_PROFILE_STOP(&pPool->StatClearAll, c);
2062	return VINF_SUCCESS;
2063	}
2064	#endif /* IN_RING3 */
2065
2066
2067	/**
2068	* Handle SyncCR3 pool tasks
2069	*
2070	* @returns VBox status code.
2071	* @retval VINF_SUCCESS if successfully added.
2072	* @retval VINF_PGM_SYNC_CR3 is it needs to be deferred to ring 3 (GC only)
2073	* @param pVM The VM handle.
2074	* @remark Should only be used when monitoring is available, thus placed in
2075	* the PGMPOOL_WITH_MONITORING #ifdef.
2076	*/
2077	int pgmPoolSyncCR3(PVM pVM)
2078	{
2079	LogFlow(("pgmPoolSyncCR3\n"));
2080	/*
2081	* When monitoring shadowed pages, we reset the modification counters on CR3 sync.
2082	* Occasionally we will have to clear all the shadow page tables because we wanted
2083	* to monitor a page which was mapped by too many shadowed page tables. This operation
2084	* sometimes refered to as a 'lightweight flush'.
2085	*/
2086	# ifdef IN_RING3 /* Don't flush in ring-0 or raw mode, it's taking too long. */
2087	if (ASMBitTestAndClear(&pVM->pgm.s.fGlobalSyncFlags, PGM_GLOBAL_SYNC_CLEAR_PGM_POOL_BIT))
2088	{
2089	VMMR3AtomicExecuteHandler(pVM, pgmPoolClearAll, NULL);
2090	# else /* !IN_RING3 */
2091	if (pVM->pgm.s.fGlobalSyncFlags & PGM_GLOBAL_SYNC_CLEAR_PGM_POOL)
2092	{
2093	LogFlow(("SyncCR3: PGM_GLOBAL_SYNC_CLEAR_PGM_POOL is set -> VINF_PGM_SYNC_CR3\n"));
2094	VMCPU_FF_SET(VMMGetCpu(pVM), VMCPU_FF_PGM_SYNC_CR3); /** @todo no need to do global sync, right? */
2095	return VINF_PGM_SYNC_CR3;
2096	# endif /* !IN_RING3 */
2097	}
2098	else
2099	pgmPoolMonitorModifiedClearAll(pVM);
2100
2101	return VINF_SUCCESS;
2102	}
2103
2104	#endif /* PGMPOOL_WITH_MONITORING */
2105	#ifdef PGMPOOL_WITH_USER_TRACKING
2106
2107	/**
2108	* Frees up at least one user entry.
2109	*
2110	* @returns VBox status code.
2111	* @retval VINF_SUCCESS if successfully added.
2112	* @retval VERR_PGM_POOL_FLUSHED if the pool was flushed.
2113	* @param pPool The pool.
2114	* @param iUser The user index.
2115	*/
2116	static int pgmPoolTrackFreeOneUser(PPGMPOOL pPool, uint16_t iUser)
2117	{
2118	STAM_COUNTER_INC(&pPool->StatTrackFreeUpOneUser);
2119	#ifdef PGMPOOL_WITH_CACHE
2120	/*
2121	* Just free cached pages in a braindead fashion.
2122	*/
2123	/** @todo walk the age list backwards and free the first with usage. */
2124	int rc = VINF_SUCCESS;
2125	do
2126	{
2127	int rc2 = pgmPoolCacheFreeOne(pPool, iUser);
2128	if (RT_FAILURE(rc2) && rc == VINF_SUCCESS)
2129	rc = rc2;
2130	} while (pPool->iUserFreeHead == NIL_PGMPOOL_USER_INDEX);
2131	return rc;
2132	#else
2133	/*
2134	* Lazy approach.
2135	*/
2136	/* @todo This path no longer works (CR3 root pages will be flushed)!! */
2137	AssertCompileFailed();
2138	Assert(!CPUMIsGuestInLongMode(pVM));
2139	pgmPoolFlushAllInt(pPool);
2140	return VERR_PGM_POOL_FLUSHED;
2141	#endif
2142	}
2143
2144
2145	/**
2146	* Inserts a page into the cache.
2147	*
2148	* This will create user node for the page, insert it into the GCPhys
2149	* hash, and insert it into the age list.
2150	*
2151	* @returns VBox status code.
2152	* @retval VINF_SUCCESS if successfully added.
2153	* @retval VERR_PGM_POOL_FLUSHED if the pool was flushed.
2154	* @param pPool The pool.
2155	* @param pPage The cached page.
2156	* @param GCPhys The GC physical address of the page we're gonna shadow.
2157	* @param iUser The user index.
2158	* @param iUserTable The user table index.
2159	*/
2160	DECLINLINE(int) pgmPoolTrackInsert(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTGCPHYS GCPhys, uint16_t iUser, uint32_t iUserTable)
2161	{
2162	int rc = VINF_SUCCESS;
2163	PPGMPOOLUSER paUsers = pPool->CTX_SUFF(paUsers);
2164
2165	LogFlow(("pgmPoolTrackInsert GCPhys=%RGp iUser %x iUserTable %x\n", GCPhys, iUser, iUserTable));
2166
2167	#ifdef VBOX_STRICT
2168	/*
2169	* Check that the entry doesn't already exists.
2170	*/
2171	if (pPage->iUserHead != NIL_PGMPOOL_USER_INDEX)
2172	{
2173	uint16_t i = pPage->iUserHead;
2174	do
2175	{
2176	Assert(i < pPool->cMaxUsers);
2177	AssertMsg(paUsers[i].iUser != iUser \|\| paUsers[i].iUserTable != iUserTable, ("%x %x vs new %x %x\n", paUsers[i].iUser, paUsers[i].iUserTable, iUser, iUserTable));
2178	i = paUsers[i].iNext;
2179	} while (i != NIL_PGMPOOL_USER_INDEX);
2180	}
2181	#endif
2182
2183	/*
2184	* Find free a user node.
2185	*/
2186	uint16_t i = pPool->iUserFreeHead;
2187	if (i == NIL_PGMPOOL_USER_INDEX)
2188	{
2189	int rc = pgmPoolTrackFreeOneUser(pPool, iUser);
2190	if (RT_FAILURE(rc))
2191	return rc;
2192	i = pPool->iUserFreeHead;
2193	}
2194
2195	/*
2196	* Unlink the user node from the free list,
2197	* initialize and insert it into the user list.
2198	*/
2199	pPool->iUserFreeHead = paUsers[i].iNext;
2200	paUsers[i].iNext = NIL_PGMPOOL_USER_INDEX;
2201	paUsers[i].iUser = iUser;
2202	paUsers[i].iUserTable = iUserTable;
2203	pPage->iUserHead = i;
2204
2205	/*
2206	* Insert into cache and enable monitoring of the guest page if enabled.
2207	*
2208	* Until we implement caching of all levels, including the CR3 one, we'll
2209	* have to make sure we don't try monitor & cache any recursive reuse of
2210	* a monitored CR3 page. Because all windows versions are doing this we'll
2211	* have to be able to do combined access monitoring, CR3 + PT and
2212	* PD + PT (guest PAE).
2213	*
2214	* Update:
2215	* We're now cooperating with the CR3 monitor if an uncachable page is found.
2216	*/
2217	#if defined(PGMPOOL_WITH_MONITORING) \|\| defined(PGMPOOL_WITH_CACHE)
2218	# ifdef PGMPOOL_WITH_MIXED_PT_CR3
2219	const bool fCanBeMonitored = true;
2220	# else
2221	bool fCanBeMonitored = pPool->CTX_SUFF(pVM)->pgm.s.GCPhysGstCR3Monitored == NIL_RTGCPHYS
2222	\|\| (GCPhys & X86_PTE_PAE_PG_MASK) != (pPool->CTX_SUFF(pVM)->pgm.s.GCPhysGstCR3Monitored & X86_PTE_PAE_PG_MASK)
2223	\|\| pgmPoolIsBigPage((PGMPOOLKIND)pPage->enmKind);
2224	# endif
2225	# ifdef PGMPOOL_WITH_CACHE
2226	pgmPoolCacheInsert(pPool, pPage, fCanBeMonitored); /* This can be expanded. */
2227	# endif
2228	if (fCanBeMonitored)
2229	{
2230	# ifdef PGMPOOL_WITH_MONITORING
2231	rc = pgmPoolMonitorInsert(pPool, pPage);
2232	AssertRC(rc);
2233	}
2234	# endif
2235	#endif /* PGMPOOL_WITH_MONITORING */
2236	return rc;
2237	}
2238
2239
2240	# ifdef PGMPOOL_WITH_CACHE /* (only used when the cache is enabled.) */
2241	/**
2242	* Adds a user reference to a page.
2243	*
2244	* This will move the page to the head of the
2245	*
2246	* @returns VBox status code.
2247	* @retval VINF_SUCCESS if successfully added.
2248	* @retval VERR_PGM_POOL_FLUSHED if the pool was flushed.
2249	* @param pPool The pool.
2250	* @param pPage The cached page.
2251	* @param iUser The user index.
2252	* @param iUserTable The user table.
2253	*/
2254	static int pgmPoolTrackAddUser(PPGMPOOL pPool, PPGMPOOLPAGE pPage, uint16_t iUser, uint32_t iUserTable)
2255	{
2256	PPGMPOOLUSER paUsers = pPool->CTX_SUFF(paUsers);
2257
2258	Log3(("pgmPoolTrackAddUser GCPhys = %RGp iUser %x iUserTable %x\n", pPage->GCPhys, iUser, iUserTable));
2259	# ifdef VBOX_STRICT
2260	/*
2261	* Check that the entry doesn't already exists.
2262	*/
2263	if (pPage->iUserHead != NIL_PGMPOOL_USER_INDEX)
2264	{
2265	uint16_t i = pPage->iUserHead;
2266	do
2267	{
2268	Assert(i < pPool->cMaxUsers);
2269	AssertMsg(paUsers[i].iUser != iUser \|\| paUsers[i].iUserTable != iUserTable, ("%x %x vs new %x %x\n", paUsers[i].iUser, paUsers[i].iUserTable, iUser, iUserTable));
2270	i = paUsers[i].iNext;
2271	} while (i != NIL_PGMPOOL_USER_INDEX);
2272	}
2273	# endif
2274
2275	/*
2276	* Allocate a user node.
2277	*/
2278	uint16_t i = pPool->iUserFreeHead;
2279	if (i == NIL_PGMPOOL_USER_INDEX)
2280	{
2281	int rc = pgmPoolTrackFreeOneUser(pPool, iUser);
2282	if (RT_FAILURE(rc))
2283	return rc;
2284	i = pPool->iUserFreeHead;
2285	}
2286	pPool->iUserFreeHead = paUsers[i].iNext;
2287
2288	/*
2289	* Initialize the user node and insert it.
2290	*/
2291	paUsers[i].iNext = pPage->iUserHead;
2292	paUsers[i].iUser = iUser;
2293	paUsers[i].iUserTable = iUserTable;
2294	pPage->iUserHead = i;
2295
2296	# ifdef PGMPOOL_WITH_CACHE
2297	/*
2298	* Tell the cache to update its replacement stats for this page.
2299	*/
2300	pgmPoolCacheUsed(pPool, pPage);
2301	# endif
2302	return VINF_SUCCESS;
2303	}
2304	# endif /* PGMPOOL_WITH_CACHE */
2305
2306
2307	/**
2308	* Frees a user record associated with a page.
2309	*
2310	* This does not clear the entry in the user table, it simply replaces the
2311	* user record to the chain of free records.
2312	*
2313	* @param pPool The pool.
2314	* @param HCPhys The HC physical address of the shadow page.
2315	* @param iUser The shadow page pool index of the user table.
2316	* @param iUserTable The index into the user table (shadowed).
2317	*/
2318	static void pgmPoolTrackFreeUser(PPGMPOOL pPool, PPGMPOOLPAGE pPage, uint16_t iUser, uint32_t iUserTable)
2319	{
2320	/*
2321	* Unlink and free the specified user entry.
2322	*/
2323	PPGMPOOLUSER paUsers = pPool->CTX_SUFF(paUsers);
2324
2325	Log3(("pgmPoolTrackFreeUser %RGp %x %x\n", pPage->GCPhys, iUser, iUserTable));
2326	/* Special: For PAE and 32-bit paging, there is usually no more than one user. */
2327	uint16_t i = pPage->iUserHead;
2328	if ( i != NIL_PGMPOOL_USER_INDEX
2329	&& paUsers[i].iUser == iUser
2330	&& paUsers[i].iUserTable == iUserTable)
2331	{
2332	pPage->iUserHead = paUsers[i].iNext;
2333
2334	paUsers[i].iUser = NIL_PGMPOOL_IDX;
2335	paUsers[i].iNext = pPool->iUserFreeHead;
2336	pPool->iUserFreeHead = i;
2337	return;
2338	}
2339
2340	/* General: Linear search. */
2341	uint16_t iPrev = NIL_PGMPOOL_USER_INDEX;
2342	while (i != NIL_PGMPOOL_USER_INDEX)
2343	{
2344	if ( paUsers[i].iUser == iUser
2345	&& paUsers[i].iUserTable == iUserTable)
2346	{
2347	if (iPrev != NIL_PGMPOOL_USER_INDEX)
2348	paUsers[iPrev].iNext = paUsers[i].iNext;
2349	else
2350	pPage->iUserHead = paUsers[i].iNext;
2351
2352	paUsers[i].iUser = NIL_PGMPOOL_IDX;
2353	paUsers[i].iNext = pPool->iUserFreeHead;
2354	pPool->iUserFreeHead = i;
2355	return;
2356	}
2357	iPrev = i;
2358	i = paUsers[i].iNext;
2359	}
2360
2361	/* Fatal: didn't find it */
2362	AssertFatalMsgFailed(("Didn't find the user entry! iUser=%#x iUserTable=%#x GCPhys=%RGp\n",
2363	iUser, iUserTable, pPage->GCPhys));
2364	}
2365
2366
2367	/**
2368	* Gets the entry size of a shadow table.
2369	*
2370	* @param enmKind The kind of page.
2371	*
2372	* @returns The size of the entry in bytes. That is, 4 or 8.
2373	* @returns If the kind is not for a table, an assertion is raised and 0 is
2374	* returned.
2375	*/
2376	DECLINLINE(unsigned) pgmPoolTrackGetShadowEntrySize(PGMPOOLKIND enmKind)
2377	{
2378	switch (enmKind)
2379	{
2380	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
2381	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
2382	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
2383	case PGMPOOLKIND_32BIT_PD:
2384	case PGMPOOLKIND_32BIT_PD_PHYS:
2385	return 4;
2386
2387	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
2388	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
2389	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
2390	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
2391	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
2392	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
2393	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
2394	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
2395	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
2396	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
2397	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
2398	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
2399	case PGMPOOLKIND_64BIT_PML4:
2400	case PGMPOOLKIND_PAE_PDPT:
2401	case PGMPOOLKIND_ROOT_NESTED:
2402	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
2403	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
2404	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
2405	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
2406	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
2407	case PGMPOOLKIND_PAE_PD_PHYS:
2408	case PGMPOOLKIND_PAE_PDPT_PHYS:
2409	return 8;
2410
2411	default:
2412	AssertFatalMsgFailed(("enmKind=%d\n", enmKind));
2413	}
2414	}
2415
2416
2417	/**
2418	* Gets the entry size of a guest table.
2419	*
2420	* @param enmKind The kind of page.
2421	*
2422	* @returns The size of the entry in bytes. That is, 0, 4 or 8.
2423	* @returns If the kind is not for a table, an assertion is raised and 0 is
2424	* returned.
2425	*/
2426	DECLINLINE(unsigned) pgmPoolTrackGetGuestEntrySize(PGMPOOLKIND enmKind)
2427	{
2428	switch (enmKind)
2429	{
2430	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
2431	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
2432	case PGMPOOLKIND_32BIT_PD:
2433	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
2434	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
2435	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
2436	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
2437	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
2438	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
2439	return 4;
2440
2441	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
2442	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
2443	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
2444	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
2445	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
2446	case PGMPOOLKIND_64BIT_PML4:
2447	case PGMPOOLKIND_PAE_PDPT:
2448	return 8;
2449
2450	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
2451	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
2452	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
2453	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
2454	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
2455	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
2456	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
2457	case PGMPOOLKIND_ROOT_NESTED:
2458	case PGMPOOLKIND_PAE_PD_PHYS:
2459	case PGMPOOLKIND_PAE_PDPT_PHYS:
2460	case PGMPOOLKIND_32BIT_PD_PHYS:
2461	/** @todo can we return 0? (nobody is calling this...) */
2462	AssertFailed();
2463	return 0;
2464
2465	default:
2466	AssertFatalMsgFailed(("enmKind=%d\n", enmKind));
2467	}
2468	}
2469
2470	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
2471
2472	/**
2473	* Scans one shadow page table for mappings of a physical page.
2474	*
2475	* @param pVM The VM handle.
2476	* @param pPhysPage The guest page in question.
2477	* @param iShw The shadow page table.
2478	* @param cRefs The number of references made in that PT.
2479	*/
2480	static void pgmPoolTrackFlushGCPhysPTInt(PVM pVM, PCPGMPAGE pPhysPage, uint16_t iShw, uint16_t cRefs)
2481	{
2482	LogFlow(("pgmPoolTrackFlushGCPhysPT: pPhysPage=%R[pgmpage] iShw=%d cRefs=%d\n", pPhysPage, iShw, cRefs));
2483	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
2484
2485	/*
2486	* Assert sanity.
2487	*/
2488	Assert(cRefs == 1);
2489	AssertFatalMsg(iShw < pPool->cCurPages && iShw != NIL_PGMPOOL_IDX, ("iShw=%d\n", iShw));
2490	PPGMPOOLPAGE pPage = &pPool->aPages[iShw];
2491
2492	/*
2493	* Then, clear the actual mappings to the page in the shadow PT.
2494	*/
2495	switch (pPage->enmKind)
2496	{
2497	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
2498	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
2499	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
2500	{
2501	const uint32_t u32 = PGM_PAGE_GET_HCPHYS(pPhysPage) \| X86_PTE_P;
2502	PX86PT pPT = (PX86PT)PGMPOOL_PAGE_2_PTR(pVM, pPage);
2503	for (unsigned i = pPage->iFirstPresent; i < RT_ELEMENTS(pPT->a); i++)
2504	if ((pPT->a[i].u & (X86_PTE_PG_MASK \| X86_PTE_P)) == u32)
2505	{
2506	Log4(("pgmPoolTrackFlushGCPhysPTs: i=%d pte=%RX32 cRefs=%#x\n", i, pPT->a[i], cRefs));
2507	pPT->a[i].u = 0;
2508	cRefs--;
2509	if (!cRefs)
2510	return;
2511	}
2512	#ifdef LOG_ENABLED
2513	RTLogPrintf("cRefs=%d iFirstPresent=%d cPresent=%d\n", cRefs, pPage->iFirstPresent, pPage->cPresent);
2514	for (unsigned i = 0; i < RT_ELEMENTS(pPT->a); i++)
2515	if ((pPT->a[i].u & (X86_PTE_PG_MASK \| X86_PTE_P)) == u32)
2516	{
2517	RTLogPrintf("i=%d cRefs=%d\n", i, cRefs--);
2518	pPT->a[i].u = 0;
2519	}
2520	#endif
2521	AssertFatalMsgFailed(("cRefs=%d iFirstPresent=%d cPresent=%d\n", cRefs, pPage->iFirstPresent, pPage->cPresent));
2522	break;
2523	}
2524
2525	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
2526	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
2527	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
2528	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
2529	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
2530	{
2531	const uint64_t u64 = PGM_PAGE_GET_HCPHYS(pPhysPage) \| X86_PTE_P;
2532	PX86PTPAE pPT = (PX86PTPAE)PGMPOOL_PAGE_2_PTR(pVM, pPage);
2533	for (unsigned i = pPage->iFirstPresent; i < RT_ELEMENTS(pPT->a); i++)
2534	if ((pPT->a[i].u & (X86_PTE_PAE_PG_MASK \| X86_PTE_P)) == u64)
2535	{
2536	Log4(("pgmPoolTrackFlushGCPhysPTs: i=%d pte=%RX64 cRefs=%#x\n", i, pPT->a[i], cRefs));
2537	pPT->a[i].u = 0;
2538	cRefs--;
2539	if (!cRefs)
2540	return;
2541	}
2542	#ifdef LOG_ENABLED
2543	RTLogPrintf("cRefs=%d iFirstPresent=%d cPresent=%d\n", cRefs, pPage->iFirstPresent, pPage->cPresent);
2544	for (unsigned i = 0; i < RT_ELEMENTS(pPT->a); i++)
2545	if ((pPT->a[i].u & (X86_PTE_PAE_PG_MASK \| X86_PTE_P)) == u64)
2546	{
2547	RTLogPrintf("i=%d cRefs=%d\n", i, cRefs--);
2548	pPT->a[i].u = 0;
2549	}
2550	#endif
2551	AssertFatalMsgFailed(("cRefs=%d iFirstPresent=%d cPresent=%d u64=%RX64\n", cRefs, pPage->iFirstPresent, pPage->cPresent, u64));
2552	break;
2553	}
2554
2555	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
2556	{
2557	const uint64_t u64 = PGM_PAGE_GET_HCPHYS(pPhysPage) \| X86_PTE_P;
2558	PEPTPT pPT = (PEPTPT)PGMPOOL_PAGE_2_PTR(pVM, pPage);
2559	for (unsigned i = pPage->iFirstPresent; i < RT_ELEMENTS(pPT->a); i++)
2560	if ((pPT->a[i].u & (EPT_PTE_PG_MASK \| X86_PTE_P)) == u64)
2561	{
2562	Log4(("pgmPoolTrackFlushGCPhysPTs: i=%d pte=%RX64 cRefs=%#x\n", i, pPT->a[i], cRefs));
2563	pPT->a[i].u = 0;
2564	cRefs--;
2565	if (!cRefs)
2566	return;
2567	}
2568	#ifdef LOG_ENABLED
2569	RTLogPrintf("cRefs=%d iFirstPresent=%d cPresent=%d\n", cRefs, pPage->iFirstPresent, pPage->cPresent);
2570	for (unsigned i = 0; i < RT_ELEMENTS(pPT->a); i++)
2571	if ((pPT->a[i].u & (EPT_PTE_PG_MASK \| X86_PTE_P)) == u64)
2572	{
2573	RTLogPrintf("i=%d cRefs=%d\n", i, cRefs--);
2574	pPT->a[i].u = 0;
2575	}
2576	#endif
2577	AssertFatalMsgFailed(("cRefs=%d iFirstPresent=%d cPresent=%d\n", cRefs, pPage->iFirstPresent, pPage->cPresent));
2578	break;
2579	}
2580
2581	default:
2582	AssertFatalMsgFailed(("enmKind=%d iShw=%d\n", pPage->enmKind, iShw));
2583	}
2584	}
2585
2586
2587	/**
2588	* Scans one shadow page table for mappings of a physical page.
2589	*
2590	* @param pVM The VM handle.
2591	* @param pPhysPage The guest page in question.
2592	* @param iShw The shadow page table.
2593	* @param cRefs The number of references made in that PT.
2594	*/
2595	void pgmPoolTrackFlushGCPhysPT(PVM pVM, PPGMPAGE pPhysPage, uint16_t iShw, uint16_t cRefs)
2596	{
2597	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool); NOREF(pPool);
2598	LogFlow(("pgmPoolTrackFlushGCPhysPT: pPhysPage=%R[pgmpage] iShw=%d cRefs=%d\n", pPhysPage, iShw, cRefs));
2599	STAM_PROFILE_START(&pPool->StatTrackFlushGCPhysPT, f);
2600	pgmPoolTrackFlushGCPhysPTInt(pVM, pPhysPage, iShw, cRefs);
2601	PGM_PAGE_SET_TRACKING(pPhysPage, 0);
2602	STAM_PROFILE_STOP(&pPool->StatTrackFlushGCPhysPT, f);
2603	}
2604
2605
2606	/**
2607	* Flushes a list of shadow page tables mapping the same physical page.
2608	*
2609	* @param pVM The VM handle.
2610	* @param pPhysPage The guest page in question.
2611	* @param iPhysExt The physical cross reference extent list to flush.
2612	*/
2613	void pgmPoolTrackFlushGCPhysPTs(PVM pVM, PPGMPAGE pPhysPage, uint16_t iPhysExt)
2614	{
2615	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
2616	STAM_PROFILE_START(&pPool->StatTrackFlushGCPhysPTs, f);
2617	LogFlow(("pgmPoolTrackFlushGCPhysPTs: pPhysPage=%R[pgmpage] iPhysExt\n", pPhysPage, iPhysExt));
2618
2619	const uint16_t iPhysExtStart = iPhysExt;
2620	PPGMPOOLPHYSEXT pPhysExt;
2621	do
2622	{
2623	Assert(iPhysExt < pPool->cMaxPhysExts);
2624	pPhysExt = &pPool->CTX_SUFF(paPhysExts)[iPhysExt];
2625	for (unsigned i = 0; i < RT_ELEMENTS(pPhysExt->aidx); i++)
2626	if (pPhysExt->aidx[i] != NIL_PGMPOOL_IDX)
2627	{
2628	pgmPoolTrackFlushGCPhysPTInt(pVM, pPhysPage, pPhysExt->aidx[i], 1);
2629	pPhysExt->aidx[i] = NIL_PGMPOOL_IDX;
2630	}
2631
2632	/* next */
2633	iPhysExt = pPhysExt->iNext;
2634	} while (iPhysExt != NIL_PGMPOOL_PHYSEXT_INDEX);
2635
2636	/* insert the list into the free list and clear the ram range entry. */
2637	pPhysExt->iNext = pPool->iPhysExtFreeHead;
2638	pPool->iPhysExtFreeHead = iPhysExtStart;
2639	PGM_PAGE_SET_TRACKING(pPhysPage, 0);
2640
2641	STAM_PROFILE_STOP(&pPool->StatTrackFlushGCPhysPTs, f);
2642	}
2643
2644	#endif /* PGMPOOL_WITH_GCPHYS_TRACKING */
2645
2646	/**
2647	* Flushes all shadow page table mappings of the given guest page.
2648	*
2649	* This is typically called when the host page backing the guest one has been
2650	* replaced or when the page protection was changed due to an access handler.
2651	*
2652	* @returns VBox status code.
2653	* @retval VINF_SUCCESS if all references has been successfully cleared.
2654	* @retval VINF_PGM_SYNC_CR3 if we're better off with a CR3 sync and a page
2655	* pool cleaning. FF and sync flags are set.
2656	*
2657	* @param pVM The VM handle.
2658	* @param pPhysPage The guest page in question.
2659	* @param pfFlushTLBs This is set to @a true if the shadow TLBs should be
2660	* flushed, it is NOT touched if this isn't necessary.
2661	* The caller MUST initialized this to @a false.
2662	*/
2663	int pgmPoolTrackFlushGCPhys(PVM pVM, PPGMPAGE pPhysPage, bool *pfFlushTLBs)
2664	{
2665	int rc = VINF_SUCCESS;
2666	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
2667	const uint16_t u16 = PGM_PAGE_GET_TRACKING(pPhysPage);
2668	if (u16)
2669	{
2670	/*
2671	* The zero page is currently screwing up the tracking and we'll
2672	* have to flush the whole shebang. Unless VBOX_WITH_NEW_LAZY_PAGE_ALLOC
2673	* is defined, zero pages won't normally be mapped. Some kind of solution
2674	* will be needed for this problem of course, but it will have to wait...
2675	*/
2676	if (PGM_PAGE_IS_ZERO(pPhysPage))
2677	rc = VINF_PGM_GCPHYS_ALIASED;
2678	else
2679	{
2680	# ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
2681	/* Start a subset here because pgmPoolTrackFlushGCPhysPTsSlow and
2682	pgmPoolTrackFlushGCPhysPTs will/may kill the pool otherwise. */
2683	PVMCPU pVCpu = VMMGetCpu(pVM);
2684	uint32_t iPrevSubset = PGMDynMapPushAutoSubset(pVCpu);
2685	# endif
2686
2687	if (PGMPOOL_TD_GET_CREFS(u16) != PGMPOOL_TD_CREFS_PHYSEXT)
2688	pgmPoolTrackFlushGCPhysPT(pVM,
2689	pPhysPage,
2690	PGMPOOL_TD_GET_IDX(u16),
2691	PGMPOOL_TD_GET_CREFS(u16));
2692	else if (u16 != PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, PGMPOOL_TD_IDX_OVERFLOWED))
2693	pgmPoolTrackFlushGCPhysPTs(pVM, pPhysPage, PGMPOOL_TD_GET_IDX(u16));
2694	else
2695	rc = pgmPoolTrackFlushGCPhysPTsSlow(pVM, pPhysPage);
2696	*pfFlushTLBs = true;
2697
2698	# ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
2699	PGMDynMapPopAutoSubset(pVCpu, iPrevSubset);
2700	# endif
2701	}
2702	}
2703
2704	#elif defined(PGMPOOL_WITH_CACHE)
2705	if (PGM_PAGE_IS_ZERO(pPhysPage))
2706	rc = VINF_PGM_GCPHYS_ALIASED;
2707	else
2708	{
2709	# ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
2710	/* Start a subset here because pgmPoolTrackFlushGCPhysPTsSlow kill the pool otherwise. */
2711	PVMCPU pVCpu = VMMGetCpu(pVM);
2712	uint32_t iPrevSubset = PGMDynMapPushAutoSubset(pVCpu);
2713	# endif
2714	rc = pgmPoolTrackFlushGCPhysPTsSlow(pVM, pPhysPage);
2715	if (rc == VINF_SUCCESS)
2716	*pfFlushTLBs = true;
2717	}
2718
2719	# ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
2720	PGMDynMapPopAutoSubset(pVCpu, iPrevSubset);
2721	# endif
2722
2723	#else
2724	rc = VINF_PGM_GCPHYS_ALIASED;
2725	#endif
2726
2727	if (rc == VINF_PGM_GCPHYS_ALIASED)
2728	{
2729	pVM->pgm.s.fGlobalSyncFlags \|= PGM_GLOBAL_SYNC_CLEAR_PGM_POOL;
2730	for (unsigned i=0;i<pVM->cCPUs;i++)
2731	{
2732	PVMCPU pVCpu = &pVM->aCpus[i];
2733	VMCPU_FF_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3);
2734	}
2735	rc = VINF_PGM_SYNC_CR3;
2736	}
2737
2738	return rc;
2739	}
2740
2741
2742	/**
2743	* Scans all shadow page tables for mappings of a physical page.
2744	*
2745	* This may be slow, but it's most likely more efficient than cleaning
2746	* out the entire page pool / cache.
2747	*
2748	* @returns VBox status code.
2749	* @retval VINF_SUCCESS if all references has been successfully cleared.
2750	* @retval VINF_PGM_GCPHYS_ALIASED if we're better off with a CR3 sync and
2751	* a page pool cleaning.
2752	*
2753	* @param pVM The VM handle.
2754	* @param pPhysPage The guest page in question.
2755	*/
2756	int pgmPoolTrackFlushGCPhysPTsSlow(PVM pVM, PPGMPAGE pPhysPage)
2757	{
2758	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
2759	STAM_PROFILE_START(&pPool->StatTrackFlushGCPhysPTsSlow, s);
2760	LogFlow(("pgmPoolTrackFlushGCPhysPTsSlow: cUsedPages=%d cPresent=%d pPhysPage=%R[pgmpage]\n",
2761	pPool->cUsedPages, pPool->cPresent, pPhysPage));
2762
2763	#if 1
2764	/*
2765	* There is a limit to what makes sense.
2766	*/
2767	if (pPool->cPresent > 1024)
2768	{
2769	LogFlow(("pgmPoolTrackFlushGCPhysPTsSlow: giving up... (cPresent=%d)\n", pPool->cPresent));
2770	STAM_PROFILE_STOP(&pPool->StatTrackFlushGCPhysPTsSlow, s);
2771	return VINF_PGM_GCPHYS_ALIASED;
2772	}
2773	#endif
2774
2775	/*
2776	* Iterate all the pages until we've encountered all that in use.
2777	* This is simple but not quite optimal solution.
2778	*/
2779	const uint64_t u64 = PGM_PAGE_GET_HCPHYS(pPhysPage) \| X86_PTE_P;
2780	const uint32_t u32 = u64;
2781	unsigned cLeft = pPool->cUsedPages;
2782	unsigned iPage = pPool->cCurPages;
2783	while (--iPage >= PGMPOOL_IDX_FIRST)
2784	{
2785	PPGMPOOLPAGE pPage = &pPool->aPages[iPage];
2786	if (pPage->GCPhys != NIL_RTGCPHYS)
2787	{
2788	switch (pPage->enmKind)
2789	{
2790	/*
2791	* We only care about shadow page tables.
2792	*/
2793	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
2794	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
2795	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
2796	{
2797	unsigned cPresent = pPage->cPresent;
2798	PX86PT pPT = (PX86PT)PGMPOOL_PAGE_2_PTR(pVM, pPage);
2799	for (unsigned i = pPage->iFirstPresent; i < RT_ELEMENTS(pPT->a); i++)
2800	if (pPT->a[i].n.u1Present)
2801	{
2802	if ((pPT->a[i].u & (X86_PTE_PG_MASK \| X86_PTE_P)) == u32)
2803	{
2804	//Log4(("pgmPoolTrackFlushGCPhysPTsSlow: idx=%d i=%d pte=%RX32\n", iPage, i, pPT->a[i]));
2805	pPT->a[i].u = 0;
2806	}
2807	if (!--cPresent)
2808	break;
2809	}
2810	break;
2811	}
2812
2813	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
2814	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
2815	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
2816	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
2817	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
2818	{
2819	unsigned cPresent = pPage->cPresent;
2820	PX86PTPAE pPT = (PX86PTPAE)PGMPOOL_PAGE_2_PTR(pVM, pPage);
2821	for (unsigned i = pPage->iFirstPresent; i < RT_ELEMENTS(pPT->a); i++)
2822	if (pPT->a[i].n.u1Present)
2823	{
2824	if ((pPT->a[i].u & (X86_PTE_PAE_PG_MASK \| X86_PTE_P)) == u64)
2825	{
2826	//Log4(("pgmPoolTrackFlushGCPhysPTsSlow: idx=%d i=%d pte=%RX64\n", iPage, i, pPT->a[i]));
2827	pPT->a[i].u = 0;
2828	}
2829	if (!--cPresent)
2830	break;
2831	}
2832	break;
2833	}
2834	}
2835	if (!--cLeft)
2836	break;
2837	}
2838	}
2839
2840	PGM_PAGE_SET_TRACKING(pPhysPage, 0);
2841	STAM_PROFILE_STOP(&pPool->StatTrackFlushGCPhysPTsSlow, s);
2842	return VINF_SUCCESS;
2843	}
2844
2845
2846	/**
2847	* Clears the user entry in a user table.
2848	*
2849	* This is used to remove all references to a page when flushing it.
2850	*/
2851	static void pgmPoolTrackClearPageUser(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PCPGMPOOLUSER pUser)
2852	{
2853	Assert(pUser->iUser != NIL_PGMPOOL_IDX);
2854	Assert(pUser->iUser < pPool->cCurPages);
2855	uint32_t iUserTable = pUser->iUserTable;
2856
2857	/*
2858	* Map the user page.
2859	*/
2860	PPGMPOOLPAGE pUserPage = &pPool->aPages[pUser->iUser];
2861	union
2862	{
2863	uint64_t *pau64;
2864	uint32_t *pau32;
2865	} u;
2866	u.pau64 = (uint64_t *)PGMPOOL_PAGE_2_PTR(pPool->CTX_SUFF(pVM), pUserPage);
2867
2868	LogFlow(("pgmPoolTrackClearPageUser: clear %x in %s (%RGp) (flushing %s)\n", iUserTable, pgmPoolPoolKindToStr(pUserPage->enmKind), pUserPage->Core.Key, pgmPoolPoolKindToStr(pPage->enmKind)));
2869
2870	/* Safety precaution in case we change the paging for other modes too in the future. */
2871	Assert(!pgmPoolIsPageLocked(&pPool->CTX_SUFF(pVM)->pgm.s, pPage));
2872
2873	#ifdef VBOX_STRICT
2874	/*
2875	* Some sanity checks.
2876	*/
2877	switch (pUserPage->enmKind)
2878	{
2879	case PGMPOOLKIND_32BIT_PD:
2880	case PGMPOOLKIND_32BIT_PD_PHYS:
2881	Assert(iUserTable < X86_PG_ENTRIES);
2882	break;
2883	case PGMPOOLKIND_PAE_PDPT:
2884	case PGMPOOLKIND_PAE_PDPT_FOR_32BIT:
2885	case PGMPOOLKIND_PAE_PDPT_PHYS:
2886	Assert(iUserTable < 4);
2887	Assert(!(u.pau64[iUserTable] & PGM_PLXFLAGS_PERMANENT));
2888	break;
2889	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
2890	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
2891	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
2892	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
2893	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
2894	case PGMPOOLKIND_PAE_PD_PHYS:
2895	Assert(iUserTable < X86_PG_PAE_ENTRIES);
2896	break;
2897	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
2898	Assert(iUserTable < X86_PG_PAE_ENTRIES);
2899	Assert(!(u.pau64[iUserTable] & PGM_PDFLAGS_MAPPING));
2900	break;
2901	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
2902	Assert(iUserTable < X86_PG_PAE_ENTRIES);
2903	Assert(!(u.pau64[iUserTable] & PGM_PLXFLAGS_PERMANENT));
2904	break;
2905	case PGMPOOLKIND_64BIT_PML4:
2906	Assert(!(u.pau64[iUserTable] & PGM_PLXFLAGS_PERMANENT));
2907	/* GCPhys >> PAGE_SHIFT is the index here */
2908	break;
2909	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
2910	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
2911	Assert(iUserTable < X86_PG_PAE_ENTRIES);
2912	break;
2913
2914	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
2915	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
2916	Assert(iUserTable < X86_PG_PAE_ENTRIES);
2917	break;
2918
2919	case PGMPOOLKIND_ROOT_NESTED:
2920	Assert(iUserTable < X86_PG_PAE_ENTRIES);
2921	break;
2922
2923	default:
2924	AssertMsgFailed(("enmKind=%d\n", pUserPage->enmKind));
2925	break;
2926	}
2927	#endif /* VBOX_STRICT */
2928
2929	/*
2930	* Clear the entry in the user page.
2931	*/
2932	switch (pUserPage->enmKind)
2933	{
2934	/* 32-bit entries */
2935	case PGMPOOLKIND_32BIT_PD:
2936	case PGMPOOLKIND_32BIT_PD_PHYS:
2937	u.pau32[iUserTable] = 0;
2938	break;
2939
2940	/* 64-bit entries */
2941	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
2942	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
2943	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
2944	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
2945	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
2946	#if defined(IN_RC)
2947	/* In 32 bits PAE mode we must invalidate the TLB when changing a PDPT entry; the CPU fetches them only during cr3 load, so any
2948	* non-present PDPT will continue to cause page faults.
2949	*/
2950	ASMReloadCR3();
2951	#endif
2952	/* no break */
2953	case PGMPOOLKIND_PAE_PD_PHYS:
2954	case PGMPOOLKIND_PAE_PDPT_PHYS:
2955	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
2956	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
2957	case PGMPOOLKIND_64BIT_PML4:
2958	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
2959	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
2960	case PGMPOOLKIND_PAE_PDPT:
2961	case PGMPOOLKIND_PAE_PDPT_FOR_32BIT:
2962	case PGMPOOLKIND_ROOT_NESTED:
2963	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
2964	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
2965	u.pau64[iUserTable] = 0;
2966	break;
2967
2968	default:
2969	AssertFatalMsgFailed(("enmKind=%d iUser=%#x iUserTable=%#x\n", pUserPage->enmKind, pUser->iUser, pUser->iUserTable));
2970	}
2971	}
2972
2973
2974	/**
2975	* Clears all users of a page.
2976	*/
2977	static void pgmPoolTrackClearPageUsers(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
2978	{
2979	/*
2980	* Free all the user records.
2981	*/
2982	LogFlow(("pgmPoolTrackClearPageUsers %RGp\n", pPage->GCPhys));
2983
2984	PPGMPOOLUSER paUsers = pPool->CTX_SUFF(paUsers);
2985	uint16_t i = pPage->iUserHead;
2986	while (i != NIL_PGMPOOL_USER_INDEX)
2987	{
2988	/* Clear enter in user table. */
2989	pgmPoolTrackClearPageUser(pPool, pPage, &paUsers[i]);
2990
2991	/* Free it. */
2992	const uint16_t iNext = paUsers[i].iNext;
2993	paUsers[i].iUser = NIL_PGMPOOL_IDX;
2994	paUsers[i].iNext = pPool->iUserFreeHead;
2995	pPool->iUserFreeHead = i;
2996
2997	/* Next. */
2998	i = iNext;
2999	}
3000	pPage->iUserHead = NIL_PGMPOOL_USER_INDEX;
3001	}
3002
3003	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
3004
3005	/**
3006	* Allocates a new physical cross reference extent.
3007	*
3008	* @returns Pointer to the allocated extent on success. NULL if we're out of them.
3009	* @param pVM The VM handle.
3010	* @param piPhysExt Where to store the phys ext index.
3011	*/
3012	PPGMPOOLPHYSEXT pgmPoolTrackPhysExtAlloc(PVM pVM, uint16_t *piPhysExt)
3013	{
3014	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
3015	uint16_t iPhysExt = pPool->iPhysExtFreeHead;
3016	if (iPhysExt == NIL_PGMPOOL_PHYSEXT_INDEX)
3017	{
3018	STAM_COUNTER_INC(&pPool->StamTrackPhysExtAllocFailures);
3019	return NULL;
3020	}
3021	PPGMPOOLPHYSEXT pPhysExt = &pPool->CTX_SUFF(paPhysExts)[iPhysExt];
3022	pPool->iPhysExtFreeHead = pPhysExt->iNext;
3023	pPhysExt->iNext = NIL_PGMPOOL_PHYSEXT_INDEX;
3024	*piPhysExt = iPhysExt;
3025	return pPhysExt;
3026	}
3027
3028
3029	/**
3030	* Frees a physical cross reference extent.
3031	*
3032	* @param pVM The VM handle.
3033	* @param iPhysExt The extent to free.
3034	*/
3035	void pgmPoolTrackPhysExtFree(PVM pVM, uint16_t iPhysExt)
3036	{
3037	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
3038	Assert(iPhysExt < pPool->cMaxPhysExts);
3039	PPGMPOOLPHYSEXT pPhysExt = &pPool->CTX_SUFF(paPhysExts)[iPhysExt];
3040	for (unsigned i = 0; i < RT_ELEMENTS(pPhysExt->aidx); i++)
3041	pPhysExt->aidx[i] = NIL_PGMPOOL_IDX;
3042	pPhysExt->iNext = pPool->iPhysExtFreeHead;
3043	pPool->iPhysExtFreeHead = iPhysExt;
3044	}
3045
3046
3047	/**
3048	* Frees a physical cross reference extent.
3049	*
3050	* @param pVM The VM handle.
3051	* @param iPhysExt The extent to free.
3052	*/
3053	void pgmPoolTrackPhysExtFreeList(PVM pVM, uint16_t iPhysExt)
3054	{
3055	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
3056
3057	const uint16_t iPhysExtStart = iPhysExt;
3058	PPGMPOOLPHYSEXT pPhysExt;
3059	do
3060	{
3061	Assert(iPhysExt < pPool->cMaxPhysExts);
3062	pPhysExt = &pPool->CTX_SUFF(paPhysExts)[iPhysExt];
3063	for (unsigned i = 0; i < RT_ELEMENTS(pPhysExt->aidx); i++)
3064	pPhysExt->aidx[i] = NIL_PGMPOOL_IDX;
3065
3066	/* next */
3067	iPhysExt = pPhysExt->iNext;
3068	} while (iPhysExt != NIL_PGMPOOL_PHYSEXT_INDEX);
3069
3070	pPhysExt->iNext = pPool->iPhysExtFreeHead;
3071	pPool->iPhysExtFreeHead = iPhysExtStart;
3072	}
3073
3074
3075	/**
3076	* Insert a reference into a list of physical cross reference extents.
3077	*
3078	* @returns The new tracking data for PGMPAGE.
3079	*
3080	* @param pVM The VM handle.
3081	* @param iPhysExt The physical extent index of the list head.
3082	* @param iShwPT The shadow page table index.
3083	*
3084	*/
3085	static uint16_t pgmPoolTrackPhysExtInsert(PVM pVM, uint16_t iPhysExt, uint16_t iShwPT)
3086	{
3087	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
3088	PPGMPOOLPHYSEXT paPhysExts = pPool->CTX_SUFF(paPhysExts);
3089
3090	/* special common case. */
3091	if (paPhysExts[iPhysExt].aidx[2] == NIL_PGMPOOL_IDX)
3092	{
3093	paPhysExts[iPhysExt].aidx[2] = iShwPT;
3094	STAM_COUNTER_INC(&pVM->pgm.s.StatTrackAliasedMany);
3095	LogFlow(("pgmPoolTrackPhysExtAddref: %d:{,,%d}\n", iPhysExt, iShwPT));
3096	return PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, iPhysExt);
3097	}
3098
3099	/* general treatment. */
3100	const uint16_t iPhysExtStart = iPhysExt;
3101	unsigned cMax = 15;
3102	for (;;)
3103	{
3104	Assert(iPhysExt < pPool->cMaxPhysExts);
3105	for (unsigned i = 0; i < RT_ELEMENTS(paPhysExts[iPhysExt].aidx); i++)
3106	if (paPhysExts[iPhysExt].aidx[i] == NIL_PGMPOOL_IDX)
3107	{
3108	paPhysExts[iPhysExt].aidx[i] = iShwPT;
3109	STAM_COUNTER_INC(&pVM->pgm.s.StatTrackAliasedMany);
3110	LogFlow(("pgmPoolTrackPhysExtAddref: %d:{%d} i=%d cMax=%d\n", iPhysExt, iShwPT, i, cMax));
3111	return PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, iPhysExtStart);
3112	}
3113	if (!--cMax)
3114	{
3115	STAM_COUNTER_INC(&pVM->pgm.s.StatTrackOverflows);
3116	pgmPoolTrackPhysExtFreeList(pVM, iPhysExtStart);
3117	LogFlow(("pgmPoolTrackPhysExtAddref: overflow (1) iShwPT=%d\n", iShwPT));
3118	return PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, PGMPOOL_TD_IDX_OVERFLOWED);
3119	}
3120	}
3121
3122	/* add another extent to the list. */
3123	PPGMPOOLPHYSEXT pNew = pgmPoolTrackPhysExtAlloc(pVM, &iPhysExt);
3124	if (!pNew)
3125	{
3126	STAM_COUNTER_INC(&pVM->pgm.s.StatTrackOverflows);
3127	pgmPoolTrackPhysExtFreeList(pVM, iPhysExtStart);
3128	return PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, PGMPOOL_TD_IDX_OVERFLOWED);
3129	}
3130	pNew->iNext = iPhysExtStart;
3131	pNew->aidx[0] = iShwPT;
3132	LogFlow(("pgmPoolTrackPhysExtAddref: added new extent %d:{%d}->%d\n", iPhysExt, iShwPT, iPhysExtStart));
3133	return PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, iPhysExt);
3134	}
3135
3136
3137	/**
3138	* Add a reference to guest physical page where extents are in use.
3139	*
3140	* @returns The new tracking data for PGMPAGE.
3141	*
3142	* @param pVM The VM handle.
3143	* @param u16 The ram range flags (top 16-bits).
3144	* @param iShwPT The shadow page table index.
3145	*/
3146	uint16_t pgmPoolTrackPhysExtAddref(PVM pVM, uint16_t u16, uint16_t iShwPT)
3147	{
3148	if (PGMPOOL_TD_GET_CREFS(u16) != PGMPOOL_TD_CREFS_PHYSEXT)
3149	{
3150	/*
3151	* Convert to extent list.
3152	*/
3153	Assert(PGMPOOL_TD_GET_CREFS(u16) == 1);
3154	uint16_t iPhysExt;
3155	PPGMPOOLPHYSEXT pPhysExt = pgmPoolTrackPhysExtAlloc(pVM, &iPhysExt);
3156	if (pPhysExt)
3157	{
3158	LogFlow(("pgmPoolTrackPhysExtAddref: new extent: %d:{%d, %d}\n", iPhysExt, PGMPOOL_TD_GET_IDX(u16), iShwPT));
3159	STAM_COUNTER_INC(&pVM->pgm.s.StatTrackAliased);
3160	pPhysExt->aidx[0] = PGMPOOL_TD_GET_IDX(u16);
3161	pPhysExt->aidx[1] = iShwPT;
3162	u16 = PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, iPhysExt);
3163	}
3164	else
3165	u16 = PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, PGMPOOL_TD_IDX_OVERFLOWED);
3166	}
3167	else if (u16 != PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, PGMPOOL_TD_IDX_OVERFLOWED))
3168	{
3169	/*
3170	* Insert into the extent list.
3171	*/
3172	u16 = pgmPoolTrackPhysExtInsert(pVM, PGMPOOL_TD_GET_IDX(u16), iShwPT);
3173	}
3174	else
3175	STAM_COUNTER_INC(&pVM->pgm.s.StatTrackAliasedLots);
3176	return u16;
3177	}
3178
3179
3180	/**
3181	* Clear references to guest physical memory.
3182	*
3183	* @param pPool The pool.
3184	* @param pPage The page.
3185	* @param pPhysPage Pointer to the aPages entry in the ram range.
3186	*/
3187	void pgmPoolTrackPhysExtDerefGCPhys(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PPGMPAGE pPhysPage)
3188	{
3189	const unsigned cRefs = PGM_PAGE_GET_TD_CREFS(pPhysPage);
3190	AssertFatalMsg(cRefs == PGMPOOL_TD_CREFS_PHYSEXT, ("cRefs=%d pPhysPage=%R[pgmpage] pPage=%p:{.idx=%d}\n", cRefs, pPhysPage, pPage, pPage->idx));
3191
3192	uint16_t iPhysExt = PGM_PAGE_GET_TD_IDX(pPhysPage);
3193	if (iPhysExt != PGMPOOL_TD_IDX_OVERFLOWED)
3194	{
3195	uint16_t iPhysExtPrev = NIL_PGMPOOL_PHYSEXT_INDEX;
3196	PPGMPOOLPHYSEXT paPhysExts = pPool->CTX_SUFF(paPhysExts);
3197	do
3198	{
3199	Assert(iPhysExt < pPool->cMaxPhysExts);
3200
3201	/*
3202	* Look for the shadow page and check if it's all freed.
3203	*/
3204	for (unsigned i = 0; i < RT_ELEMENTS(paPhysExts[iPhysExt].aidx); i++)
3205	{
3206	if (paPhysExts[iPhysExt].aidx[i] == pPage->idx)
3207	{
3208	paPhysExts[iPhysExt].aidx[i] = NIL_PGMPOOL_IDX;
3209
3210	for (i = 0; i < RT_ELEMENTS(paPhysExts[iPhysExt].aidx); i++)
3211	if (paPhysExts[iPhysExt].aidx[i] != NIL_PGMPOOL_IDX)
3212	{
3213	Log2(("pgmPoolTrackPhysExtDerefGCPhys: pPhysPage=%R[pgmpage] idx=%d\n", pPhysPage, pPage->idx));
3214	return;
3215	}
3216
3217	/* we can free the node. */
3218	PVM pVM = pPool->CTX_SUFF(pVM);
3219	const uint16_t iPhysExtNext = paPhysExts[iPhysExt].iNext;
3220	if ( iPhysExtPrev == NIL_PGMPOOL_PHYSEXT_INDEX
3221	&& iPhysExtNext == NIL_PGMPOOL_PHYSEXT_INDEX)
3222	{
3223	/* lonely node */
3224	pgmPoolTrackPhysExtFree(pVM, iPhysExt);
3225	Log2(("pgmPoolTrackPhysExtDerefGCPhys: pPhysPage=%R[pgmpage] idx=%d lonely\n", pPhysPage, pPage->idx));
3226	PGM_PAGE_SET_TRACKING(pPhysPage, 0);
3227	}
3228	else if (iPhysExtPrev == NIL_PGMPOOL_PHYSEXT_INDEX)
3229	{
3230	/* head */
3231	Log2(("pgmPoolTrackPhysExtDerefGCPhys: pPhysPage=%R[pgmpage] idx=%d head\n", pPhysPage, pPage->idx));
3232	PGM_PAGE_SET_TRACKING(pPhysPage, PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, iPhysExtNext));
3233	pgmPoolTrackPhysExtFree(pVM, iPhysExt);
3234	}
3235	else
3236	{
3237	/* in list */
3238	Log2(("pgmPoolTrackPhysExtDerefGCPhys: pPhysPage=%R[pgmpage] idx=%d\n", pPhysPage, pPage->idx));
3239	paPhysExts[iPhysExtPrev].iNext = iPhysExtNext;
3240	pgmPoolTrackPhysExtFree(pVM, iPhysExt);
3241	}
3242	iPhysExt = iPhysExtNext;
3243	return;
3244	}
3245	}
3246
3247	/* next */
3248	iPhysExtPrev = iPhysExt;
3249	iPhysExt = paPhysExts[iPhysExt].iNext;
3250	} while (iPhysExt != NIL_PGMPOOL_PHYSEXT_INDEX);
3251
3252	AssertFatalMsgFailed(("not-found! cRefs=%d pPhysPage=%R[pgmpage] pPage=%p:{.idx=%d}\n", cRefs, pPhysPage, pPage, pPage->idx));
3253	}
3254	else /* nothing to do */
3255	Log2(("pgmPoolTrackPhysExtDerefGCPhys: pPhysPage=%R[pgmpage]\n", pPhysPage));
3256	}
3257
3258
3259	/**
3260	* Clear references to guest physical memory.
3261	*
3262	* This is the same as pgmPoolTracDerefGCPhys except that the guest physical address
3263	* is assumed to be correct, so the linear search can be skipped and we can assert
3264	* at an earlier point.
3265	*
3266	* @param pPool The pool.
3267	* @param pPage The page.
3268	* @param HCPhys The host physical address corresponding to the guest page.
3269	* @param GCPhys The guest physical address corresponding to HCPhys.
3270	*/
3271	static void pgmPoolTracDerefGCPhys(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTHCPHYS HCPhys, RTGCPHYS GCPhys)
3272	{
3273	/*
3274	* Walk range list.
3275	*/
3276	PPGMRAMRANGE pRam = pPool->CTX_SUFF(pVM)->pgm.s.CTX_SUFF(pRamRanges);
3277	while (pRam)
3278	{
3279	RTGCPHYS off = GCPhys - pRam->GCPhys;
3280	if (off < pRam->cb)
3281	{
3282	/* does it match? */
3283	const unsigned iPage = off >> PAGE_SHIFT;
3284	Assert(PGM_PAGE_GET_HCPHYS(&pRam->aPages[iPage]));
3285	#ifdef LOG_ENABLED
3286	RTHCPHYS HCPhysPage = PGM_PAGE_GET_HCPHYS(&pRam->aPages[iPage]);
3287	Log2(("pgmPoolTracDerefGCPhys %RHp vs %RHp\n", HCPhysPage, HCPhys));
3288	#endif
3289	if (PGM_PAGE_GET_HCPHYS(&pRam->aPages[iPage]) == HCPhys)
3290	{
3291	pgmTrackDerefGCPhys(pPool, pPage, &pRam->aPages[iPage]);
3292	return;
3293	}
3294	break;
3295	}
3296	pRam = pRam->CTX_SUFF(pNext);
3297	}
3298	AssertFatalMsgFailed(("HCPhys=%RHp GCPhys=%RGp\n", HCPhys, GCPhys));
3299	}
3300
3301
3302	/**
3303	* Clear references to guest physical memory.
3304	*
3305	* @param pPool The pool.
3306	* @param pPage The page.
3307	* @param HCPhys The host physical address corresponding to the guest page.
3308	* @param GCPhysHint The guest physical address which may corresponding to HCPhys.
3309	*/
3310	static void pgmPoolTracDerefGCPhysHint(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTHCPHYS HCPhys, RTGCPHYS GCPhysHint)
3311	{
3312	Log4(("pgmPoolTracDerefGCPhysHint %RHp %RGp\n", HCPhys, GCPhysHint));
3313
3314	/*
3315	* Walk range list.
3316	*/
3317	PPGMRAMRANGE pRam = pPool->CTX_SUFF(pVM)->pgm.s.CTX_SUFF(pRamRanges);
3318	while (pRam)
3319	{
3320	RTGCPHYS off = GCPhysHint - pRam->GCPhys;
3321	if (off < pRam->cb)
3322	{
3323	/* does it match? */
3324	const unsigned iPage = off >> PAGE_SHIFT;
3325	Assert(PGM_PAGE_GET_HCPHYS(&pRam->aPages[iPage]));
3326	if (PGM_PAGE_GET_HCPHYS(&pRam->aPages[iPage]) == HCPhys)
3327	{
3328	pgmTrackDerefGCPhys(pPool, pPage, &pRam->aPages[iPage]);
3329	return;
3330	}
3331	break;
3332	}
3333	pRam = pRam->CTX_SUFF(pNext);
3334	}
3335
3336	/*
3337	* Damn, the hint didn't work. We'll have to do an expensive linear search.
3338	*/
3339	STAM_COUNTER_INC(&pPool->StatTrackLinearRamSearches);
3340	pRam = pPool->CTX_SUFF(pVM)->pgm.s.CTX_SUFF(pRamRanges);
3341	while (pRam)
3342	{
3343	unsigned iPage = pRam->cb >> PAGE_SHIFT;
3344	while (iPage-- > 0)
3345	{
3346	if (PGM_PAGE_GET_HCPHYS(&pRam->aPages[iPage]) == HCPhys)
3347	{
3348	Log4(("pgmPoolTracDerefGCPhysHint: Linear HCPhys=%RHp GCPhysHint=%RGp GCPhysReal=%RGp\n",
3349	HCPhys, GCPhysHint, pRam->GCPhys + (iPage << PAGE_SHIFT)));
3350	pgmTrackDerefGCPhys(pPool, pPage, &pRam->aPages[iPage]);
3351	return;
3352	}
3353	}
3354	pRam = pRam->CTX_SUFF(pNext);
3355	}
3356
3357	AssertFatalMsgFailed(("HCPhys=%RHp GCPhysHint=%RGp\n", HCPhys, GCPhysHint));
3358	}
3359
3360
3361	/**
3362	* Clear references to guest physical memory in a 32-bit / 32-bit page table.
3363	*
3364	* @param pPool The pool.
3365	* @param pPage The page.
3366	* @param pShwPT The shadow page table (mapping of the page).
3367	* @param pGstPT The guest page table.
3368	*/
3369	DECLINLINE(void) pgmPoolTrackDerefPT32Bit32Bit(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PT pShwPT, PCX86PT pGstPT)
3370	{
3371	for (unsigned i = pPage->iFirstPresent; i < RT_ELEMENTS(pShwPT->a); i++)
3372	if (pShwPT->a[i].n.u1Present)
3373	{
3374	Log4(("pgmPoolTrackDerefPT32Bit32Bit: i=%d pte=%RX32 hint=%RX32\n",
3375	i, pShwPT->a[i].u & X86_PTE_PG_MASK, pGstPT->a[i].u & X86_PTE_PG_MASK));
3376	pgmPoolTracDerefGCPhysHint(pPool, pPage, pShwPT->a[i].u & X86_PTE_PG_MASK, pGstPT->a[i].u & X86_PTE_PG_MASK);
3377	if (!--pPage->cPresent)
3378	break;
3379	}
3380	}
3381
3382
3383	/**
3384	* Clear references to guest physical memory in a PAE / 32-bit page table.
3385	*
3386	* @param pPool The pool.
3387	* @param pPage The page.
3388	* @param pShwPT The shadow page table (mapping of the page).
3389	* @param pGstPT The guest page table (just a half one).
3390	*/
3391	DECLINLINE(void) pgmPoolTrackDerefPTPae32Bit(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PTPAE pShwPT, PCX86PT pGstPT)
3392	{
3393	for (unsigned i = 0; i < RT_ELEMENTS(pShwPT->a); i++)
3394	if (pShwPT->a[i].n.u1Present)
3395	{
3396	Log4(("pgmPoolTrackDerefPTPae32Bit: i=%d pte=%RX64 hint=%RX32\n",
3397	i, pShwPT->a[i].u & X86_PTE_PAE_PG_MASK, pGstPT->a[i].u & X86_PTE_PG_MASK));
3398	pgmPoolTracDerefGCPhysHint(pPool, pPage, pShwPT->a[i].u & X86_PTE_PAE_PG_MASK, pGstPT->a[i].u & X86_PTE_PG_MASK);
3399	}
3400	}
3401
3402
3403	/**
3404	* Clear references to guest physical memory in a PAE / PAE page table.
3405	*
3406	* @param pPool The pool.
3407	* @param pPage The page.
3408	* @param pShwPT The shadow page table (mapping of the page).
3409	* @param pGstPT The guest page table.
3410	*/
3411	DECLINLINE(void) pgmPoolTrackDerefPTPaePae(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PTPAE pShwPT, PCX86PTPAE pGstPT)
3412	{
3413	for (unsigned i = 0; i < RT_ELEMENTS(pShwPT->a); i++)
3414	if (pShwPT->a[i].n.u1Present)
3415	{
3416	Log4(("pgmPoolTrackDerefPTPaePae: i=%d pte=%RX32 hint=%RX32\n",
3417	i, pShwPT->a[i].u & X86_PTE_PAE_PG_MASK, pGstPT->a[i].u & X86_PTE_PAE_PG_MASK));
3418	pgmPoolTracDerefGCPhysHint(pPool, pPage, pShwPT->a[i].u & X86_PTE_PAE_PG_MASK, pGstPT->a[i].u & X86_PTE_PAE_PG_MASK);
3419	}
3420	}
3421
3422
3423	/**
3424	* Clear references to guest physical memory in a 32-bit / 4MB page table.
3425	*
3426	* @param pPool The pool.
3427	* @param pPage The page.
3428	* @param pShwPT The shadow page table (mapping of the page).
3429	*/
3430	DECLINLINE(void) pgmPoolTrackDerefPT32Bit4MB(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PT pShwPT)
3431	{
3432	RTGCPHYS GCPhys = pPage->GCPhys;
3433	for (unsigned i = 0; i < RT_ELEMENTS(pShwPT->a); i++, GCPhys += PAGE_SIZE)
3434	if (pShwPT->a[i].n.u1Present)
3435	{
3436	Log4(("pgmPoolTrackDerefPT32Bit4MB: i=%d pte=%RX32 GCPhys=%RGp\n",
3437	i, pShwPT->a[i].u & X86_PTE_PG_MASK, GCPhys));
3438	pgmPoolTracDerefGCPhys(pPool, pPage, pShwPT->a[i].u & X86_PTE_PG_MASK, GCPhys);
3439	}
3440	}
3441
3442
3443	/**
3444	* Clear references to guest physical memory in a PAE / 2/4MB page table.
3445	*
3446	* @param pPool The pool.
3447	* @param pPage The page.
3448	* @param pShwPT The shadow page table (mapping of the page).
3449	*/
3450	DECLINLINE(void) pgmPoolTrackDerefPTPaeBig(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PTPAE pShwPT)
3451	{
3452	RTGCPHYS GCPhys = pPage->GCPhys;
3453	for (unsigned i = 0; i < RT_ELEMENTS(pShwPT->a); i++, GCPhys += PAGE_SIZE)
3454	if (pShwPT->a[i].n.u1Present)
3455	{
3456	Log4(("pgmPoolTrackDerefPTPaeBig: i=%d pte=%RX64 hint=%RGp\n",
3457	i, pShwPT->a[i].u & X86_PTE_PAE_PG_MASK, GCPhys));
3458	pgmPoolTracDerefGCPhys(pPool, pPage, pShwPT->a[i].u & X86_PTE_PAE_PG_MASK, GCPhys);
3459	}
3460	}
3461
3462	#endif /* PGMPOOL_WITH_GCPHYS_TRACKING */
3463
3464
3465	/**
3466	* Clear references to shadowed pages in a 32 bits page directory.
3467	*
3468	* @param pPool The pool.
3469	* @param pPage The page.
3470	* @param pShwPD The shadow page directory (mapping of the page).
3471	*/
3472	DECLINLINE(void) pgmPoolTrackDerefPD(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PD pShwPD)
3473	{
3474	for (unsigned i = 0; i < RT_ELEMENTS(pShwPD->a); i++)
3475	{
3476	if ( pShwPD->a[i].n.u1Present
3477	&& !(pShwPD->a[i].u & PGM_PDFLAGS_MAPPING)
3478	)
3479	{
3480	PPGMPOOLPAGE pSubPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, pShwPD->a[i].u & X86_PDE_PG_MASK);
3481	if (pSubPage)
3482	pgmPoolTrackFreeUser(pPool, pSubPage, pPage->idx, i);
3483	else
3484	AssertFatalMsgFailed(("%x\n", pShwPD->a[i].u & X86_PDE_PG_MASK));
3485	}
3486	}
3487	}
3488
3489	/**
3490	* Clear references to shadowed pages in a PAE (legacy or 64 bits) page directory.
3491	*
3492	* @param pPool The pool.
3493	* @param pPage The page.
3494	* @param pShwPD The shadow page directory (mapping of the page).
3495	*/
3496	DECLINLINE(void) pgmPoolTrackDerefPDPae(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PDPAE pShwPD)
3497	{
3498	for (unsigned i = 0; i < RT_ELEMENTS(pShwPD->a); i++)
3499	{
3500	if ( pShwPD->a[i].n.u1Present
3501	&& !(pShwPD->a[i].u & PGM_PDFLAGS_MAPPING)
3502	)
3503	{
3504	PPGMPOOLPAGE pSubPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, pShwPD->a[i].u & X86_PDE_PAE_PG_MASK);
3505	if (pSubPage)
3506	pgmPoolTrackFreeUser(pPool, pSubPage, pPage->idx, i);
3507	else
3508	AssertFatalMsgFailed(("%RX64\n", pShwPD->a[i].u & X86_PDE_PAE_PG_MASK));
3509	/** @todo 64-bit guests: have to ensure that we're not exhausting the dynamic mappings! */
3510	}
3511	}
3512	}
3513
3514	/**
3515	* Clear references to shadowed pages in a PAE page directory pointer table.
3516	*
3517	* @param pPool The pool.
3518	* @param pPage The page.
3519	* @param pShwPDPT The shadow page directory pointer table (mapping of the page).
3520	*/
3521	DECLINLINE(void) pgmPoolTrackDerefPDPTPae(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PDPT pShwPDPT)
3522	{
3523	for (unsigned i = 0; i < X86_PG_PAE_PDPE_ENTRIES; i++)
3524	{
3525	if ( pShwPDPT->a[i].n.u1Present
3526	&& !(pShwPDPT->a[i].u & PGM_PLXFLAGS_MAPPING)
3527	)
3528	{
3529	PPGMPOOLPAGE pSubPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, pShwPDPT->a[i].u & X86_PDPE_PG_MASK);
3530	if (pSubPage)
3531	pgmPoolTrackFreeUser(pPool, pSubPage, pPage->idx, i);
3532	else
3533	AssertFatalMsgFailed(("%RX64\n", pShwPDPT->a[i].u & X86_PDPE_PG_MASK));
3534	}
3535	}
3536	}
3537
3538
3539	/**
3540	* Clear references to shadowed pages in a 64-bit page directory pointer table.
3541	*
3542	* @param pPool The pool.
3543	* @param pPage The page.
3544	* @param pShwPDPT The shadow page directory pointer table (mapping of the page).
3545	*/
3546	DECLINLINE(void) pgmPoolTrackDerefPDPT64Bit(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PDPT pShwPDPT)
3547	{
3548	for (unsigned i = 0; i < RT_ELEMENTS(pShwPDPT->a); i++)
3549	{
3550	Assert(!(pShwPDPT->a[i].u & PGM_PLXFLAGS_MAPPING));
3551	if (pShwPDPT->a[i].n.u1Present)
3552	{
3553	PPGMPOOLPAGE pSubPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, pShwPDPT->a[i].u & X86_PDPE_PG_MASK);
3554	if (pSubPage)
3555	pgmPoolTrackFreeUser(pPool, pSubPage, pPage->idx, i);
3556	else
3557	AssertFatalMsgFailed(("%RX64\n", pShwPDPT->a[i].u & X86_PDPE_PG_MASK));
3558	/** @todo 64-bit guests: have to ensure that we're not exhausting the dynamic mappings! */
3559	}
3560	}
3561	}
3562
3563
3564	/**
3565	* Clear references to shadowed pages in a 64-bit level 4 page table.
3566	*
3567	* @param pPool The pool.
3568	* @param pPage The page.
3569	* @param pShwPML4 The shadow page directory pointer table (mapping of the page).
3570	*/
3571	DECLINLINE(void) pgmPoolTrackDerefPML464Bit(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PML4 pShwPML4)
3572	{
3573	for (unsigned i = 0; i < RT_ELEMENTS(pShwPML4->a); i++)
3574	{
3575	if (pShwPML4->a[i].n.u1Present)
3576	{
3577	PPGMPOOLPAGE pSubPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, pShwPML4->a[i].u & X86_PDPE_PG_MASK);
3578	if (pSubPage)
3579	pgmPoolTrackFreeUser(pPool, pSubPage, pPage->idx, i);
3580	else
3581	AssertFatalMsgFailed(("%RX64\n", pShwPML4->a[i].u & X86_PML4E_PG_MASK));
3582	/** @todo 64-bit guests: have to ensure that we're not exhausting the dynamic mappings! */
3583	}
3584	}
3585	}
3586
3587
3588	/**
3589	* Clear references to shadowed pages in an EPT page table.
3590	*
3591	* @param pPool The pool.
3592	* @param pPage The page.
3593	* @param pShwPML4 The shadow page directory pointer table (mapping of the page).
3594	*/
3595	DECLINLINE(void) pgmPoolTrackDerefPTEPT(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PEPTPT pShwPT)
3596	{
3597	RTGCPHYS GCPhys = pPage->GCPhys;
3598	for (unsigned i = 0; i < RT_ELEMENTS(pShwPT->a); i++, GCPhys += PAGE_SIZE)
3599	if (pShwPT->a[i].n.u1Present)
3600	{
3601	Log4(("pgmPoolTrackDerefPTEPT: i=%d pte=%RX64 GCPhys=%RX64\n",
3602	i, pShwPT->a[i].u & EPT_PTE_PG_MASK, pPage->GCPhys));
3603	pgmPoolTracDerefGCPhys(pPool, pPage, pShwPT->a[i].u & EPT_PTE_PG_MASK, GCPhys);
3604	}
3605	}
3606
3607
3608	/**
3609	* Clear references to shadowed pages in an EPT page directory.
3610	*
3611	* @param pPool The pool.
3612	* @param pPage The page.
3613	* @param pShwPD The shadow page directory (mapping of the page).
3614	*/
3615	DECLINLINE(void) pgmPoolTrackDerefPDEPT(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PEPTPD pShwPD)
3616	{
3617	for (unsigned i = 0; i < RT_ELEMENTS(pShwPD->a); i++)
3618	{
3619	if (pShwPD->a[i].n.u1Present)
3620	{
3621	PPGMPOOLPAGE pSubPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, pShwPD->a[i].u & EPT_PDE_PG_MASK);
3622	if (pSubPage)
3623	pgmPoolTrackFreeUser(pPool, pSubPage, pPage->idx, i);
3624	else
3625	AssertFatalMsgFailed(("%RX64\n", pShwPD->a[i].u & EPT_PDE_PG_MASK));
3626	/** @todo 64-bit guests: have to ensure that we're not exhausting the dynamic mappings! */
3627	}
3628	}
3629	}
3630
3631
3632	/**
3633	* Clear references to shadowed pages in an EPT page directory pointer table.
3634	*
3635	* @param pPool The pool.
3636	* @param pPage The page.
3637	* @param pShwPDPT The shadow page directory pointer table (mapping of the page).
3638	*/
3639	DECLINLINE(void) pgmPoolTrackDerefPDPTEPT(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PEPTPDPT pShwPDPT)
3640	{
3641	for (unsigned i = 0; i < RT_ELEMENTS(pShwPDPT->a); i++)
3642	{
3643	if (pShwPDPT->a[i].n.u1Present)
3644	{
3645	PPGMPOOLPAGE pSubPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, pShwPDPT->a[i].u & EPT_PDPTE_PG_MASK);
3646	if (pSubPage)
3647	pgmPoolTrackFreeUser(pPool, pSubPage, pPage->idx, i);
3648	else
3649	AssertFatalMsgFailed(("%RX64\n", pShwPDPT->a[i].u & EPT_PDPTE_PG_MASK));
3650	/** @todo 64-bit guests: have to ensure that we're not exhausting the dynamic mappings! */
3651	}
3652	}
3653	}
3654
3655
3656	/**
3657	* Clears all references made by this page.
3658	*
3659	* This includes other shadow pages and GC physical addresses.
3660	*
3661	* @param pPool The pool.
3662	* @param pPage The page.
3663	*/
3664	static void pgmPoolTrackDeref(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
3665	{
3666	/*
3667	* Map the shadow page and take action according to the page kind.
3668	*/
3669	void *pvShw = PGMPOOL_PAGE_2_LOCKED_PTR(pPool->CTX_SUFF(pVM), pPage);
3670	switch (pPage->enmKind)
3671	{
3672	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
3673	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
3674	{
3675	STAM_PROFILE_START(&pPool->StatTrackDerefGCPhys, g);
3676	void *pvGst;
3677	int rc = PGM_GCPHYS_2_PTR(pPool->CTX_SUFF(pVM), pPage->GCPhys, &pvGst); AssertReleaseRC(rc);
3678	pgmPoolTrackDerefPT32Bit32Bit(pPool, pPage, (PX86PT)pvShw, (PCX86PT)pvGst);
3679	STAM_PROFILE_STOP(&pPool->StatTrackDerefGCPhys, g);
3680	break;
3681	}
3682
3683	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
3684	{
3685	STAM_PROFILE_START(&pPool->StatTrackDerefGCPhys, g);
3686	void *pvGst;
3687	int rc = PGM_GCPHYS_2_PTR_EX(pPool->CTX_SUFF(pVM), pPage->GCPhys, &pvGst); AssertReleaseRC(rc);
3688	pgmPoolTrackDerefPTPae32Bit(pPool, pPage, (PX86PTPAE)pvShw, (PCX86PT)pvGst);
3689	STAM_PROFILE_STOP(&pPool->StatTrackDerefGCPhys, g);
3690	break;
3691	}
3692
3693	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
3694	{
3695	STAM_PROFILE_START(&pPool->StatTrackDerefGCPhys, g);
3696	void *pvGst;
3697	int rc = PGM_GCPHYS_2_PTR(pPool->CTX_SUFF(pVM), pPage->GCPhys, &pvGst); AssertReleaseRC(rc);
3698	pgmPoolTrackDerefPTPaePae(pPool, pPage, (PX86PTPAE)pvShw, (PCX86PTPAE)pvGst);
3699	STAM_PROFILE_STOP(&pPool->StatTrackDerefGCPhys, g);
3700	break;
3701	}
3702
3703	case PGMPOOLKIND_32BIT_PT_FOR_PHYS: /* treat it like a 4 MB page */
3704	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
3705	{
3706	STAM_PROFILE_START(&pPool->StatTrackDerefGCPhys, g);
3707	pgmPoolTrackDerefPT32Bit4MB(pPool, pPage, (PX86PT)pvShw);
3708	STAM_PROFILE_STOP(&pPool->StatTrackDerefGCPhys, g);
3709	break;
3710	}
3711
3712	case PGMPOOLKIND_PAE_PT_FOR_PHYS: /* treat it like a 2 MB page */
3713	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
3714	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
3715	{
3716	STAM_PROFILE_START(&pPool->StatTrackDerefGCPhys, g);
3717	pgmPoolTrackDerefPTPaeBig(pPool, pPage, (PX86PTPAE)pvShw);
3718	STAM_PROFILE_STOP(&pPool->StatTrackDerefGCPhys, g);
3719	break;
3720	}
3721
3722	#else /* !PGMPOOL_WITH_GCPHYS_TRACKING */
3723	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
3724	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
3725	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
3726	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
3727	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
3728	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
3729	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
3730	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
3731	break;
3732	#endif /* !PGMPOOL_WITH_GCPHYS_TRACKING */
3733
3734	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
3735	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
3736	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
3737	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
3738	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
3739	case PGMPOOLKIND_PAE_PD_PHYS:
3740	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
3741	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
3742	pgmPoolTrackDerefPDPae(pPool, pPage, (PX86PDPAE)pvShw);
3743	break;
3744
3745	case PGMPOOLKIND_32BIT_PD_PHYS:
3746	case PGMPOOLKIND_32BIT_PD:
3747	pgmPoolTrackDerefPD(pPool, pPage, (PX86PD)pvShw);
3748	break;
3749
3750	case PGMPOOLKIND_PAE_PDPT_FOR_32BIT:
3751	case PGMPOOLKIND_PAE_PDPT:
3752	case PGMPOOLKIND_PAE_PDPT_PHYS:
3753	pgmPoolTrackDerefPDPTPae(pPool, pPage, (PX86PDPT)pvShw);
3754	break;
3755
3756	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
3757	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
3758	pgmPoolTrackDerefPDPT64Bit(pPool, pPage, (PX86PDPT)pvShw);
3759	break;
3760
3761	case PGMPOOLKIND_64BIT_PML4:
3762	pgmPoolTrackDerefPML464Bit(pPool, pPage, (PX86PML4)pvShw);
3763	break;
3764
3765	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
3766	pgmPoolTrackDerefPTEPT(pPool, pPage, (PEPTPT)pvShw);
3767	break;
3768
3769	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
3770	pgmPoolTrackDerefPDEPT(pPool, pPage, (PEPTPD)pvShw);
3771	break;
3772
3773	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
3774	pgmPoolTrackDerefPDPTEPT(pPool, pPage, (PEPTPDPT)pvShw);
3775	break;
3776
3777	default:
3778	AssertFatalMsgFailed(("enmKind=%d\n", pPage->enmKind));
3779	}
3780
3781	/* paranoia, clear the shadow page. Remove this laser (i.e. let Alloc and ClearAll do it). */
3782	STAM_PROFILE_START(&pPool->StatZeroPage, z);
3783	ASMMemZeroPage(pvShw);
3784	STAM_PROFILE_STOP(&pPool->StatZeroPage, z);
3785	pPage->fZeroed = true;
3786	PGMPOOL_UNLOCK_PTR(pPool->CTX_SUFF(pVM), pvShw);
3787	}
3788
3789	#endif /* PGMPOOL_WITH_USER_TRACKING */
3790	#ifdef IN_RING3
3791	/**
3792	* Flushes the entire cache.
3793	*
3794	* It will assert a global CR3 flush (FF) and assumes the caller is aware of this
3795	* and execute this CR3 flush.
3796	*
3797	* @param pPool The pool.
3798	*
3799	* @remark Only used during reset now, we might want to rename and/or move it.
3800	*/
3801	static void pgmPoolFlushAllInt(PPGMPOOL pPool)
3802	{
3803	PVM pVM = pPool->CTX_SUFF(pVM);
3804
3805	STAM_PROFILE_START(&pPool->StatFlushAllInt, a);
3806	LogFlow(("pgmPoolFlushAllInt:\n"));
3807
3808	/*
3809	* If there are no pages in the pool, there is nothing to do.
3810	*/
3811	if (pPool->cCurPages <= PGMPOOL_IDX_FIRST)
3812	{
3813	STAM_PROFILE_STOP(&pPool->StatFlushAllInt, a);
3814	return;
3815	}
3816
3817	/*
3818	* Exit the shadow mode since we're going to clear everything,
3819	* including the root page.
3820	*/
3821	/** @todo Need to synchronize this across all VCPUs! */
3822	Assert(pVM->cCPUs == 1);
3823	for (unsigned i=0;i<pVM->cCPUs;i++)
3824	{
3825	PVMCPU pVCpu = &pVM->aCpus[i];
3826	pgmR3ExitShadowModeBeforePoolFlush(pVM, pVCpu);
3827	}
3828
3829	/*
3830	* Nuke the free list and reinsert all pages into it.
3831	*/
3832	for (unsigned i = pPool->cCurPages - 1; i >= PGMPOOL_IDX_FIRST; i--)
3833	{
3834	PPGMPOOLPAGE pPage = &pPool->aPages[i];
3835
3836	Assert(pPage->Core.Key == MMPage2Phys(pVM, pPage->pvPageR3));
3837	#ifdef PGMPOOL_WITH_MONITORING
3838	if (pPage->fMonitored)
3839	pgmPoolMonitorFlush(pPool, pPage);
3840	pPage->iModifiedNext = NIL_PGMPOOL_IDX;
3841	pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
3842	pPage->iMonitoredNext = NIL_PGMPOOL_IDX;
3843	pPage->iMonitoredPrev = NIL_PGMPOOL_IDX;
3844	pPage->cModifications = 0;
3845	#endif
3846	pPage->GCPhys = NIL_RTGCPHYS;
3847	pPage->enmKind = PGMPOOLKIND_FREE;
3848	Assert(pPage->idx == i);
3849	pPage->iNext = i + 1;
3850	pPage->fZeroed = false; /* This could probably be optimized, but better safe than sorry. */
3851	pPage->fSeenNonGlobal = false;
3852	pPage->fMonitored= false;
3853	pPage->fCached = false;
3854	pPage->fReusedFlushPending = false;
3855	#ifdef PGMPOOL_WITH_USER_TRACKING
3856	pPage->iUserHead = NIL_PGMPOOL_USER_INDEX;
3857	#else
3858	pPage->fCR3Mix = false;
3859	#endif
3860	#ifdef PGMPOOL_WITH_CACHE
3861	pPage->iAgeNext = NIL_PGMPOOL_IDX;
3862	pPage->iAgePrev = NIL_PGMPOOL_IDX;
3863	#endif
3864	pPage->fLocked = false;
3865	}
3866	pPool->aPages[pPool->cCurPages - 1].iNext = NIL_PGMPOOL_IDX;
3867	pPool->iFreeHead = PGMPOOL_IDX_FIRST;
3868	pPool->cUsedPages = 0;
3869
3870	#ifdef PGMPOOL_WITH_USER_TRACKING
3871	/*
3872	* Zap and reinitialize the user records.
3873	*/
3874	pPool->cPresent = 0;
3875	pPool->iUserFreeHead = 0;
3876	PPGMPOOLUSER paUsers = pPool->CTX_SUFF(paUsers);
3877	const unsigned cMaxUsers = pPool->cMaxUsers;
3878	for (unsigned i = 0; i < cMaxUsers; i++)
3879	{
3880	paUsers[i].iNext = i + 1;
3881	paUsers[i].iUser = NIL_PGMPOOL_IDX;
3882	paUsers[i].iUserTable = 0xfffffffe;
3883	}
3884	paUsers[cMaxUsers - 1].iNext = NIL_PGMPOOL_USER_INDEX;
3885	#endif
3886
3887	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
3888	/*
3889	* Clear all the GCPhys links and rebuild the phys ext free list.
3890	*/
3891	for (PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
3892	pRam;
3893	pRam = pRam->CTX_SUFF(pNext))
3894	{
3895	unsigned iPage = pRam->cb >> PAGE_SHIFT;
3896	while (iPage-- > 0)
3897	PGM_PAGE_SET_TRACKING(&pRam->aPages[iPage], 0);
3898	}
3899
3900	pPool->iPhysExtFreeHead = 0;
3901	PPGMPOOLPHYSEXT paPhysExts = pPool->CTX_SUFF(paPhysExts);
3902	const unsigned cMaxPhysExts = pPool->cMaxPhysExts;
3903	for (unsigned i = 0; i < cMaxPhysExts; i++)
3904	{
3905	paPhysExts[i].iNext = i + 1;
3906	paPhysExts[i].aidx[0] = NIL_PGMPOOL_IDX;
3907	paPhysExts[i].aidx[1] = NIL_PGMPOOL_IDX;
3908	paPhysExts[i].aidx[2] = NIL_PGMPOOL_IDX;
3909	}
3910	paPhysExts[cMaxPhysExts - 1].iNext = NIL_PGMPOOL_PHYSEXT_INDEX;
3911	#endif
3912
3913	#ifdef PGMPOOL_WITH_MONITORING
3914	/*
3915	* Just zap the modified list.
3916	*/
3917	pPool->cModifiedPages = 0;
3918	pPool->iModifiedHead = NIL_PGMPOOL_IDX;
3919	#endif
3920
3921	#ifdef PGMPOOL_WITH_CACHE
3922	/*
3923	* Clear the GCPhys hash and the age list.
3924	*/
3925	for (unsigned i = 0; i < RT_ELEMENTS(pPool->aiHash); i++)
3926	pPool->aiHash[i] = NIL_PGMPOOL_IDX;
3927	pPool->iAgeHead = NIL_PGMPOOL_IDX;
3928	pPool->iAgeTail = NIL_PGMPOOL_IDX;
3929	#endif
3930
3931	/*
3932	* Reinsert active pages into the hash and ensure monitoring chains are correct.
3933	*/
3934	for (unsigned i = PGMPOOL_IDX_FIRST_SPECIAL; i < PGMPOOL_IDX_FIRST; i++)
3935	{
3936	PPGMPOOLPAGE pPage = &pPool->aPages[i];
3937	pPage->iNext = NIL_PGMPOOL_IDX;
3938	#ifdef PGMPOOL_WITH_MONITORING
3939	pPage->iModifiedNext = NIL_PGMPOOL_IDX;
3940	pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
3941	pPage->cModifications = 0;
3942	/* ASSUMES that we're not sharing with any of the other special pages (safe for now). */
3943	pPage->iMonitoredNext = NIL_PGMPOOL_IDX;
3944	pPage->iMonitoredPrev = NIL_PGMPOOL_IDX;
3945	if (pPage->fMonitored)
3946	{
3947	int rc = PGMHandlerPhysicalChangeCallbacks(pVM, pPage->GCPhys & ~(RTGCPHYS)(PAGE_SIZE - 1),
3948	pPool->pfnAccessHandlerR3, MMHyperCCToR3(pVM, pPage),
3949	pPool->pfnAccessHandlerR0, MMHyperCCToR0(pVM, pPage),
3950	pPool->pfnAccessHandlerRC, MMHyperCCToRC(pVM, pPage),
3951	pPool->pszAccessHandler);
3952	AssertFatalRCSuccess(rc);
3953	# ifdef PGMPOOL_WITH_CACHE
3954	pgmPoolHashInsert(pPool, pPage);
3955	# endif
3956	}
3957	#endif
3958	#ifdef PGMPOOL_WITH_USER_TRACKING
3959	Assert(pPage->iUserHead == NIL_PGMPOOL_USER_INDEX); /* for now */
3960	#endif
3961	#ifdef PGMPOOL_WITH_CACHE
3962	Assert(pPage->iAgeNext == NIL_PGMPOOL_IDX);
3963	Assert(pPage->iAgePrev == NIL_PGMPOOL_IDX);
3964	#endif
3965	}
3966
3967	for (unsigned i=0;i<pVM->cCPUs;i++)
3968	{
3969	PVMCPU pVCpu = &pVM->aCpus[i];
3970	/*
3971	* Re-enter the shadowing mode and assert Sync CR3 FF.
3972	*/
3973	pgmR3ReEnterShadowModeAfterPoolFlush(pVM, pVCpu);
3974	VMCPU_FF_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3);
3975	}
3976
3977	STAM_PROFILE_STOP(&pPool->StatFlushAllInt, a);
3978	}
3979
3980	#endif /* IN_RING3 */
3981
3982	/**
3983	* Flushes a pool page.
3984	*
3985	* This moves the page to the free list after removing all user references to it.
3986	* In GC this will cause a CR3 reload if the page is traced back to an active root page.
3987	*
3988	* @returns VBox status code.
3989	* @retval VINF_SUCCESS on success.
3990	* @param pPool The pool.
3991	* @param HCPhys The HC physical address of the shadow page.
3992	*/
3993	int pgmPoolFlushPage(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
3994	{
3995	PVM pVM = pPool->CTX_SUFF(pVM);
3996
3997	int rc = VINF_SUCCESS;
3998	STAM_PROFILE_START(&pPool->StatFlushPage, f);
3999	LogFlow(("pgmPoolFlushPage: pPage=%p:{.Key=%RHp, .idx=%d, .enmKind=%s, .GCPhys=%RGp}\n",
4000	pPage, pPage->Core.Key, pPage->idx, pgmPoolPoolKindToStr(pPage->enmKind), pPage->GCPhys));
4001
4002	/*
4003	* Quietly reject any attempts at flushing any of the special root pages.
4004	*/
4005	if (pPage->idx < PGMPOOL_IDX_FIRST)
4006	{
4007	AssertFailed(); /* can no longer happen */
4008	Log(("pgmPoolFlushPage: special root page, rejected. enmKind=%s idx=%d\n", pgmPoolPoolKindToStr(pPage->enmKind), pPage->idx));
4009	return VINF_SUCCESS;
4010	}
4011
4012	pgmLock(pVM);
4013
4014	/*
4015	* Quietly reject any attempts at flushing the currently active shadow CR3 mapping
4016	*/
4017	if (pgmPoolIsPageLocked(&pVM->pgm.s, pPage))
4018	{
4019	AssertMsg( pPage->enmKind == PGMPOOLKIND_64BIT_PML4
4020	\|\| pPage->enmKind == PGMPOOLKIND_PAE_PDPT
4021	\|\| pPage->enmKind == PGMPOOLKIND_PAE_PDPT_FOR_32BIT
4022	\|\| pPage->enmKind == PGMPOOLKIND_32BIT_PD
4023	\|\| pPage->enmKind == PGMPOOLKIND_PAE_PD_FOR_PAE_PD
4024	\|\| pPage->enmKind == PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD
4025	\|\| pPage->enmKind == PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD
4026	\|\| pPage->enmKind == PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD
4027	\|\| pPage->enmKind == PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD,
4028	("Can't free the shadow CR3! (%RHp vs %RHp kind=%d\n", PGMGetHyperCR3(VMMGetCpu(pVM)), pPage->Core.Key, pPage->enmKind));
4029	Log(("pgmPoolFlushPage: current active shadow CR3, rejected. enmKind=%s idx=%d\n", pgmPoolPoolKindToStr(pPage->enmKind), pPage->idx));
4030	pgmUnlock(pVM);
4031	return VINF_SUCCESS;
4032	}
4033
4034	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
4035	/* Start a subset so we won't run out of mapping space. */
4036	PVMCPU pVCpu = VMMGetCpu(pVM);
4037	uint32_t iPrevSubset = PGMDynMapPushAutoSubset(pVCpu);
4038	#endif
4039
4040	/*
4041	* Mark the page as being in need of a ASMMemZeroPage().
4042	*/
4043	pPage->fZeroed = false;
4044
4045	#ifdef PGMPOOL_WITH_USER_TRACKING
4046	/*
4047	* Clear the page.
4048	*/
4049	pgmPoolTrackClearPageUsers(pPool, pPage);
4050	STAM_PROFILE_START(&pPool->StatTrackDeref,a);
4051	pgmPoolTrackDeref(pPool, pPage);
4052	STAM_PROFILE_STOP(&pPool->StatTrackDeref,a);
4053	#endif
4054
4055	#ifdef PGMPOOL_WITH_CACHE
4056	/*
4057	* Flush it from the cache.
4058	*/
4059	pgmPoolCacheFlushPage(pPool, pPage);
4060	#endif /* PGMPOOL_WITH_CACHE */
4061
4062	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
4063	/* Heavy stuff done. */
4064	PGMDynMapPopAutoSubset(pVCpu, iPrevSubset);
4065	#endif
4066
4067	#ifdef PGMPOOL_WITH_MONITORING
4068	/*
4069	* Deregistering the monitoring.
4070	*/
4071	if (pPage->fMonitored)
4072	rc = pgmPoolMonitorFlush(pPool, pPage);
4073	#endif
4074
4075	/*
4076	* Free the page.
4077	*/
4078	Assert(pPage->iNext == NIL_PGMPOOL_IDX);
4079	pPage->iNext = pPool->iFreeHead;
4080	pPool->iFreeHead = pPage->idx;
4081	pPage->enmKind = PGMPOOLKIND_FREE;
4082	pPage->GCPhys = NIL_RTGCPHYS;
4083	pPage->fReusedFlushPending = false;
4084
4085	pPool->cUsedPages--;
4086	pgmUnlock(pVM);
4087	STAM_PROFILE_STOP(&pPool->StatFlushPage, f);
4088	return rc;
4089	}
4090
4091
4092	/**
4093	* Frees a usage of a pool page.
4094	*
4095	* The caller is responsible to updating the user table so that it no longer
4096	* references the shadow page.
4097	*
4098	* @param pPool The pool.
4099	* @param HCPhys The HC physical address of the shadow page.
4100	* @param iUser The shadow page pool index of the user table.
4101	* @param iUserTable The index into the user table (shadowed).
4102	*/
4103	void pgmPoolFreeByPage(PPGMPOOL pPool, PPGMPOOLPAGE pPage, uint16_t iUser, uint32_t iUserTable)
4104	{
4105	PVM pVM = pPool->CTX_SUFF(pVM);
4106
4107	STAM_PROFILE_START(&pPool->StatFree, a);
4108	LogFlow(("pgmPoolFreeByPage: pPage=%p:{.Key=%RHp, .idx=%d, enmKind=%s} iUser=%#x iUserTable=%#x\n",
4109	pPage, pPage->Core.Key, pPage->idx, pgmPoolPoolKindToStr(pPage->enmKind), iUser, iUserTable));
4110	Assert(pPage->idx >= PGMPOOL_IDX_FIRST);
4111	pgmLock(pVM);
4112	#ifdef PGMPOOL_WITH_USER_TRACKING
4113	pgmPoolTrackFreeUser(pPool, pPage, iUser, iUserTable);
4114	#endif
4115	#ifdef PGMPOOL_WITH_CACHE
4116	if (!pPage->fCached)
4117	#endif
4118	pgmPoolFlushPage(pPool, pPage);
4119	pgmUnlock(pVM);
4120	STAM_PROFILE_STOP(&pPool->StatFree, a);
4121	}
4122
4123
4124	/**
4125	* Makes one or more free page free.
4126	*
4127	* @returns VBox status code.
4128	* @retval VINF_SUCCESS on success.
4129	* @retval VERR_PGM_POOL_FLUSHED if the pool was flushed.
4130	*
4131	* @param pPool The pool.
4132	* @param enmKind Page table kind
4133	* @param iUser The user of the page.
4134	*/
4135	static int pgmPoolMakeMoreFreePages(PPGMPOOL pPool, PGMPOOLKIND enmKind, uint16_t iUser)
4136	{
4137	LogFlow(("pgmPoolMakeMoreFreePages: iUser=%#x\n", iUser));
4138
4139	/*
4140	* If the pool isn't full grown yet, expand it.
4141	*/
4142	if ( pPool->cCurPages < pPool->cMaxPages
4143	#if defined(IN_RC)
4144	/* Hack alert: we can't deal with jumps to ring 3 when called from MapCR3 and allocating pages for PAE PDs. */
4145	&& enmKind != PGMPOOLKIND_PAE_PD_FOR_PAE_PD
4146	&& (enmKind < PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD \|\| enmKind > PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD)
4147	#endif
4148	)
4149	{
4150	STAM_PROFILE_ADV_SUSPEND(&pPool->StatAlloc, a);
4151	#ifdef IN_RING3
4152	int rc = PGMR3PoolGrow(pPool->pVMR3);
4153	#else
4154	int rc = CTXALLMID(VMM, CallHost)(pPool->CTX_SUFF(pVM), VMMCALLHOST_PGM_POOL_GROW, 0);
4155	#endif
4156	if (RT_FAILURE(rc))
4157	return rc;
4158	STAM_PROFILE_ADV_RESUME(&pPool->StatAlloc, a);
4159	if (pPool->iFreeHead != NIL_PGMPOOL_IDX)
4160	return VINF_SUCCESS;
4161	}
4162
4163	#ifdef PGMPOOL_WITH_CACHE
4164	/*
4165	* Free one cached page.
4166	*/
4167	return pgmPoolCacheFreeOne(pPool, iUser);
4168	#else
4169	/*
4170	* Flush the pool.
4171	*
4172	* If we have tracking enabled, it should be possible to come up with
4173	* a cheap replacement strategy...
4174	*/
4175	/* @todo This path no longer works (CR3 root pages will be flushed)!! */
4176	AssertCompileFailed();
4177	Assert(!CPUMIsGuestInLongMode(pVM));
4178	pgmPoolFlushAllInt(pPool);
4179	return VERR_PGM_POOL_FLUSHED;
4180	#endif
4181	}
4182
4183
4184	/**
4185	* Allocates a page from the pool.
4186	*
4187	* This page may actually be a cached page and not in need of any processing
4188	* on the callers part.
4189	*
4190	* @returns VBox status code.
4191	* @retval VINF_SUCCESS if a NEW page was allocated.
4192	* @retval VINF_PGM_CACHED_PAGE if a CACHED page was returned.
4193	* @retval VERR_PGM_POOL_FLUSHED if the pool was flushed.
4194	* @param pVM The VM handle.
4195	* @param GCPhys The GC physical address of the page we're gonna shadow.
4196	* For 4MB and 2MB PD entries, it's the first address the
4197	* shadow PT is covering.
4198	* @param enmKind The kind of mapping.
4199	* @param iUser The shadow page pool index of the user table.
4200	* @param iUserTable The index into the user table (shadowed).
4201	* @param ppPage Where to store the pointer to the page. NULL is stored here on failure.
4202	*/
4203	int pgmPoolAlloc(PVM pVM, RTGCPHYS GCPhys, PGMPOOLKIND enmKind, uint16_t iUser, uint32_t iUserTable, PPPGMPOOLPAGE ppPage)
4204	{
4205	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
4206	STAM_PROFILE_ADV_START(&pPool->StatAlloc, a);
4207	LogFlow(("pgmPoolAlloc: GCPhys=%RGp enmKind=%s iUser=%#x iUserTable=%#x\n", GCPhys, pgmPoolPoolKindToStr(enmKind), iUser, iUserTable));
4208	*ppPage = NULL;
4209	/** @todo CSAM/PGMPrefetchPage messes up here during CSAMR3CheckGates
4210	* (TRPMR3SyncIDT) because of FF priority. Try fix that?
4211	* Assert(!(pVM->pgm.s.fGlobalSyncFlags & PGM_GLOBAL_SYNC_CLEAR_PGM_POOL)); */
4212
4213	#ifdef PGMPOOL_WITH_CACHE
4214	if (pPool->fCacheEnabled)
4215	{
4216	int rc2 = pgmPoolCacheAlloc(pPool, GCPhys, enmKind, iUser, iUserTable, ppPage);
4217	if (RT_SUCCESS(rc2))
4218	{
4219	STAM_PROFILE_ADV_STOP(&pPool->StatAlloc, a);
4220	LogFlow(("pgmPoolAlloc: cached returns %Rrc ppPage=%p:{.Key=%RHp, .idx=%d}\n", rc2, ppPage, (ppPage)->Core.Key, (ppPage)->idx));
4221	return rc2;
4222	}
4223	}
4224	#endif
4225
4226	/*
4227	* Allocate a new one.
4228	*/
4229	int rc = VINF_SUCCESS;
4230	uint16_t iNew = pPool->iFreeHead;
4231	if (iNew == NIL_PGMPOOL_IDX)
4232	{
4233	rc = pgmPoolMakeMoreFreePages(pPool, enmKind, iUser);
4234	if (RT_FAILURE(rc))
4235	{
4236	Log(("pgmPoolAlloc: returns %Rrc (Free)\n", rc));
4237	STAM_PROFILE_ADV_STOP(&pPool->StatAlloc, a);
4238	return rc;
4239	}
4240	iNew = pPool->iFreeHead;
4241	AssertReleaseReturn(iNew != NIL_PGMPOOL_IDX, VERR_INTERNAL_ERROR);
4242	}
4243
4244	/* unlink the free head */
4245	PPGMPOOLPAGE pPage = &pPool->aPages[iNew];
4246	pPool->iFreeHead = pPage->iNext;
4247	pPage->iNext = NIL_PGMPOOL_IDX;
4248
4249	/*
4250	* Initialize it.
4251	*/
4252	pPool->cUsedPages++; /* physical handler registration / pgmPoolTrackFlushGCPhysPTsSlow requirement. */
4253	pPage->enmKind = enmKind;
4254	pPage->GCPhys = GCPhys;
4255	pPage->fSeenNonGlobal = false; /* Set this to 'true' to disable this feature. */
4256	pPage->fMonitored = false;
4257	pPage->fCached = false;
4258	pPage->fReusedFlushPending = false;
4259	#ifdef PGMPOOL_WITH_MONITORING
4260	pPage->cModifications = 0;
4261	pPage->iModifiedNext = NIL_PGMPOOL_IDX;
4262	pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
4263	#else
4264	pPage->fCR3Mix = false;
4265	#endif
4266	#ifdef PGMPOOL_WITH_USER_TRACKING
4267	pPage->cPresent = 0;
4268	pPage->iFirstPresent = ~0;
4269
4270	/*
4271	* Insert into the tracking and cache. If this fails, free the page.
4272	*/
4273	int rc3 = pgmPoolTrackInsert(pPool, pPage, GCPhys, iUser, iUserTable);
4274	if (RT_FAILURE(rc3))
4275	{
4276	pPool->cUsedPages--;
4277	pPage->enmKind = PGMPOOLKIND_FREE;
4278	pPage->GCPhys = NIL_RTGCPHYS;
4279	pPage->iNext = pPool->iFreeHead;
4280	pPool->iFreeHead = pPage->idx;
4281	STAM_PROFILE_ADV_STOP(&pPool->StatAlloc, a);
4282	Log(("pgmPoolAlloc: returns %Rrc (Insert)\n", rc3));
4283	return rc3;
4284	}
4285	#endif /* PGMPOOL_WITH_USER_TRACKING */
4286
4287	/*
4288	* Commit the allocation, clear the page and return.
4289	*/
4290	#ifdef VBOX_WITH_STATISTICS
4291	if (pPool->cUsedPages > pPool->cUsedPagesHigh)
4292	pPool->cUsedPagesHigh = pPool->cUsedPages;
4293	#endif
4294
4295	if (!pPage->fZeroed)
4296	{
4297	STAM_PROFILE_START(&pPool->StatZeroPage, z);
4298	void *pv = PGMPOOL_PAGE_2_PTR(pVM, pPage);
4299	ASMMemZeroPage(pv);
4300	STAM_PROFILE_STOP(&pPool->StatZeroPage, z);
4301	}
4302
4303	*ppPage = pPage;
4304	LogFlow(("pgmPoolAlloc: returns %Rrc *ppPage=%p:{.Key=%RHp, .idx=%d, .fCached=%RTbool, .fMonitored=%RTbool}\n",
4305	rc, pPage, pPage->Core.Key, pPage->idx, pPage->fCached, pPage->fMonitored));
4306	STAM_PROFILE_ADV_STOP(&pPool->StatAlloc, a);
4307	return rc;
4308	}
4309
4310
4311	/**
4312	* Frees a usage of a pool page.
4313	*
4314	* @param pVM The VM handle.
4315	* @param HCPhys The HC physical address of the shadow page.
4316	* @param iUser The shadow page pool index of the user table.
4317	* @param iUserTable The index into the user table (shadowed).
4318	*/
4319	void pgmPoolFree(PVM pVM, RTHCPHYS HCPhys, uint16_t iUser, uint32_t iUserTable)
4320	{
4321	LogFlow(("pgmPoolFree: HCPhys=%RHp iUser=%#x iUserTable=%#x\n", HCPhys, iUser, iUserTable));
4322	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
4323	pgmPoolFreeByPage(pPool, pgmPoolGetPage(pPool, HCPhys), iUser, iUserTable);
4324	}
4325
4326
4327	#ifdef IN_RING3
4328	/**
4329	* Flushes the entire cache.
4330	*
4331	* It will assert a global CR3 flush (FF) and assumes the caller is aware of this
4332	* and execute this CR3 flush.
4333	*
4334	* @param pPool The pool.
4335	*/
4336	void pgmPoolFlushAll(PVM pVM)
4337	{
4338	LogFlow(("pgmPoolFlushAll:\n"));
4339	pgmPoolFlushAllInt(pVM->pgm.s.CTX_SUFF(pPool));
4340	}
4341	#endif /* IN_RING3 */
4342
4343	#ifdef LOG_ENABLED
4344	static const char *pgmPoolPoolKindToStr(uint8_t enmKind)
4345	{
4346	switch(enmKind)
4347	{
4348	case PGMPOOLKIND_INVALID:
4349	return "PGMPOOLKIND_INVALID";
4350	case PGMPOOLKIND_FREE:
4351	return "PGMPOOLKIND_FREE";
4352	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
4353	return "PGMPOOLKIND_32BIT_PT_FOR_PHYS";
4354	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
4355	return "PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT";
4356	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
4357	return "PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB";
4358	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
4359	return "PGMPOOLKIND_PAE_PT_FOR_PHYS";
4360	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
4361	return "PGMPOOLKIND_PAE_PT_FOR_32BIT_PT";
4362	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
4363	return "PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB";
4364	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
4365	return "PGMPOOLKIND_PAE_PT_FOR_PAE_PT";
4366	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
4367	return "PGMPOOLKIND_PAE_PT_FOR_PAE_2MB";
4368	case PGMPOOLKIND_32BIT_PD:
4369	return "PGMPOOLKIND_32BIT_PD";
4370	case PGMPOOLKIND_32BIT_PD_PHYS:
4371	return "PGMPOOLKIND_32BIT_PD_PHYS";
4372	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
4373	return "PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD";
4374	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
4375	return "PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD";
4376	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
4377	return "PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD";
4378	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
4379	return "PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD";
4380	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
4381	return "PGMPOOLKIND_PAE_PD_FOR_PAE_PD";
4382	case PGMPOOLKIND_PAE_PD_PHYS:
4383	return "PGMPOOLKIND_PAE_PD_PHYS";
4384	case PGMPOOLKIND_PAE_PDPT_FOR_32BIT:
4385	return "PGMPOOLKIND_PAE_PDPT_FOR_32BIT";
4386	case PGMPOOLKIND_PAE_PDPT:
4387	return "PGMPOOLKIND_PAE_PDPT";
4388	case PGMPOOLKIND_PAE_PDPT_PHYS:
4389	return "PGMPOOLKIND_PAE_PDPT_PHYS";
4390	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
4391	return "PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT";
4392	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
4393	return "PGMPOOLKIND_64BIT_PDPT_FOR_PHYS";
4394	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
4395	return "PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD";
4396	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
4397	return "PGMPOOLKIND_64BIT_PD_FOR_PHYS";
4398	case PGMPOOLKIND_64BIT_PML4:
4399	return "PGMPOOLKIND_64BIT_PML4";
4400	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
4401	return "PGMPOOLKIND_EPT_PDPT_FOR_PHYS";
4402	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
4403	return "PGMPOOLKIND_EPT_PD_FOR_PHYS";
4404	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
4405	return "PGMPOOLKIND_EPT_PT_FOR_PHYS";
4406	case PGMPOOLKIND_ROOT_NESTED:
4407	return "PGMPOOLKIND_ROOT_NESTED";
4408	}
4409	return "Unknown kind!";
4410	}
4411	#endif /* LOG_ENABLED*/

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source: vbox/trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp@ 19602

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