PGMAllPool.cpp@ 17586

Last change on this file since 17586 was 17586, checked in by vboxsync, 16 years ago
Removed all dead non-VBOX_WITH_PGMPOOL_PAGING_ONLY code.
Property svn:eol-style set to `native` Property svn:keywords set to `Id`
File size: 159.6 KB

Line
1	/* $Id: PGMAllPool.cpp 17586 2009-03-09 15:28:25Z vboxsync $ */
2	/** @file
3	* PGM Shadow Page Pool.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22
23	/*******************************************************************************
24	* Header Files *
25	*******************************************************************************/
26	#define LOG_GROUP LOG_GROUP_PGM_POOL
27	#include <VBox/pgm.h>
28	#include <VBox/mm.h>
29	#include <VBox/em.h>
30	#include <VBox/cpum.h>
31	#ifdef IN_RC
32	# include <VBox/patm.h>
33	#endif
34	#include "PGMInternal.h"
35	#include <VBox/vm.h>
36	#include <VBox/disopcode.h>
37	#include <VBox/hwacc_vmx.h>
38
39	#include <VBox/log.h>
40	#include <VBox/err.h>
41	#include <iprt/asm.h>
42	#include <iprt/string.h>
43
44
45	/*******************************************************************************
46	* Internal Functions *
47	*******************************************************************************/
48	__BEGIN_DECLS
49	static void pgmPoolFlushAllInt(PPGMPOOL pPool);
50	#ifdef PGMPOOL_WITH_USER_TRACKING
51	DECLINLINE(unsigned) pgmPoolTrackGetShadowEntrySize(PGMPOOLKIND enmKind);
52	DECLINLINE(unsigned) pgmPoolTrackGetGuestEntrySize(PGMPOOLKIND enmKind);
53	static void pgmPoolTrackDeref(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
54	#endif
55	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
56	static void pgmPoolTracDerefGCPhysHint(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTHCPHYS HCPhys, RTGCPHYS GCPhysHint);
57	#endif
58	#ifdef PGMPOOL_WITH_CACHE
59	static int pgmPoolTrackAddUser(PPGMPOOL pPool, PPGMPOOLPAGE pPage, uint16_t iUser, uint32_t iUserTable);
60	#endif
61	#ifdef PGMPOOL_WITH_MONITORING
62	static void pgmPoolMonitorModifiedRemove(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
63	#endif
64	#ifndef IN_RING3
65	DECLEXPORT(int) pgmPoolAccessHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser);
66	#endif
67	#ifdef LOG_ENABLED
68	static const char *pgmPoolPoolKindToStr(uint8_t enmKind);
69	#endif
70	__END_DECLS
71
72
73	/**
74	* Checks if the specified page pool kind is for a 4MB or 2MB guest page.
75	*
76	* @returns true if it's the shadow of a 4MB or 2MB guest page, otherwise false.
77	* @param enmKind The page kind.
78	*/
79	DECLINLINE(bool) pgmPoolIsBigPage(PGMPOOLKIND enmKind)
80	{
81	switch (enmKind)
82	{
83	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
84	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
85	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
86	return true;
87	default:
88	return false;
89	}
90	}
91
92	/** @def PGMPOOL_PAGE_2_LOCKED_PTR
93	* Maps a pool page pool into the current context and lock it (RC only).
94	*
95	* @returns VBox status code.
96	* @param pVM The VM handle.
97	* @param pPage The pool page.
98	*
99	* @remark In RC this uses PGMGCDynMapHCPage(), so it will consume of the
100	* small page window employeed by that function. Be careful.
101	* @remark There is no need to assert on the result.
102	*/
103	#if defined(IN_RC)
104	DECLINLINE(void *) PGMPOOL_PAGE_2_LOCKED_PTR(PVM pVM, PPGMPOOLPAGE pPage)
105	{
106	void *pv = pgmPoolMapPageInlined(&pVM->pgm.s, pPage);
107
108	/* Make sure the dynamic mapping will not be reused. */
109	if (pv)
110	PGMDynLockHCPage(pVM, (uint8_t *)pv);
111
112	return pv;
113	}
114	#else
115	# define PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage) PGMPOOL_PAGE_2_PTR(pVM, pPage)
116	#endif
117
118	/** @def PGMPOOL_UNLOCK_PTR
119	* Unlock a previously locked dynamic caching (RC only).
120	*
121	* @returns VBox status code.
122	* @param pVM The VM handle.
123	* @param pPage The pool page.
124	*
125	* @remark In RC this uses PGMGCDynMapHCPage(), so it will consume of the
126	* small page window employeed by that function. Be careful.
127	* @remark There is no need to assert on the result.
128	*/
129	#if defined(IN_RC)
130	DECLINLINE(void) PGMPOOL_UNLOCK_PTR(PVM pVM, void *pvPage)
131	{
132	if (pvPage)
133	PGMDynUnlockHCPage(pVM, (uint8_t *)pvPage);
134	}
135	#else
136	# define PGMPOOL_UNLOCK_PTR(pVM, pPage) do {} while (0)
137	#endif
138
139
140	#ifdef PGMPOOL_WITH_MONITORING
141	/**
142	* Determin the size of a write instruction.
143	* @returns number of bytes written.
144	* @param pDis The disassembler state.
145	*/
146	static unsigned pgmPoolDisasWriteSize(PDISCPUSTATE pDis)
147	{
148	/*
149	* This is very crude and possibly wrong for some opcodes,
150	* but since it's not really supposed to be called we can
151	* probably live with that.
152	*/
153	return DISGetParamSize(pDis, &pDis->param1);
154	}
155
156
157	/**
158	* Flushes a chain of pages sharing the same access monitor.
159	*
160	* @returns VBox status code suitable for scheduling.
161	* @param pPool The pool.
162	* @param pPage A page in the chain.
163	*/
164	int pgmPoolMonitorChainFlush(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
165	{
166	LogFlow(("pgmPoolMonitorChainFlush: Flush page %RGp type=%d\n", pPage->GCPhys, pPage->enmKind));
167
168	/*
169	* Find the list head.
170	*/
171	uint16_t idx = pPage->idx;
172	if (pPage->iMonitoredPrev != NIL_PGMPOOL_IDX)
173	{
174	while (pPage->iMonitoredPrev != NIL_PGMPOOL_IDX)
175	{
176	idx = pPage->iMonitoredPrev;
177	Assert(idx != pPage->idx);
178	pPage = &pPool->aPages[idx];
179	}
180	}
181
182	/*
183	* Iterate the list flushing each shadow page.
184	*/
185	int rc = VINF_SUCCESS;
186	for (;;)
187	{
188	idx = pPage->iMonitoredNext;
189	Assert(idx != pPage->idx);
190	if (pPage->idx >= PGMPOOL_IDX_FIRST)
191	{
192	int rc2 = pgmPoolFlushPage(pPool, pPage);
193	if (rc2 == VERR_PGM_POOL_CLEARED && rc == VINF_SUCCESS)
194	rc = VINF_PGM_SYNC_CR3;
195	}
196	/* next */
197	if (idx == NIL_PGMPOOL_IDX)
198	break;
199	pPage = &pPool->aPages[idx];
200	}
201	return rc;
202	}
203
204
205	/**
206	* Wrapper for getting the current context pointer to the entry being modified.
207	*
208	* @returns VBox status code suitable for scheduling.
209	* @param pVM VM Handle.
210	* @param pvDst Destination address
211	* @param pvSrc Source guest virtual address.
212	* @param GCPhysSrc The source guest physical address.
213	* @param cb Size of data to read
214	*/
215	DECLINLINE(int) pgmPoolPhysSimpleReadGCPhys(PVM pVM, void *pvDst, CTXTYPE(RTGCPTR, RTHCPTR, RTGCPTR) pvSrc, RTGCPHYS GCPhysSrc, size_t cb)
216	{
217	#if defined(IN_RING3)
218	memcpy(pvDst, (RTHCPTR)((uintptr_t)pvSrc & ~(RTHCUINTPTR)(cb - 1)), cb);
219	return VINF_SUCCESS;
220	#else
221	/* @todo in RC we could attempt to use the virtual address, although this can cause many faults (PAE Windows XP guest). */
222	return PGMPhysSimpleReadGCPhys(pVM, pvDst, GCPhysSrc & ~(RTGCPHYS)(cb - 1), cb);
223	#endif
224	}
225
226	/**
227	* Process shadow entries before they are changed by the guest.
228	*
229	* For PT entries we will clear them. For PD entries, we'll simply check
230	* for mapping conflicts and set the SyncCR3 FF if found.
231	*
232	* @param pPool The pool.
233	* @param pPage The head page.
234	* @param GCPhysFault The guest physical fault address.
235	* @param uAddress In R0 and GC this is the guest context fault address (flat).
236	* In R3 this is the host context 'fault' address.
237	* @param pCpu The disassembler state for figuring out the write size.
238	* This need not be specified if the caller knows we won't do cross entry accesses.
239	*/
240	void pgmPoolMonitorChainChanging(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTGCPHYS GCPhysFault, CTXTYPE(RTGCPTR, RTHCPTR, RTGCPTR) pvAddress, PDISCPUSTATE pCpu)
241	{
242	Assert(pPage->iMonitoredPrev == NIL_PGMPOOL_IDX);
243	const unsigned off = GCPhysFault & PAGE_OFFSET_MASK;
244	const unsigned cbWrite = (pCpu) ? pgmPoolDisasWriteSize(pCpu) : 0;
245	PVM pVM = pPool->CTX_SUFF(pVM);
246
247	LogFlow(("pgmPoolMonitorChainChanging: %RGv phys=%RGp kind=%s cbWrite=%d\n", (RTGCPTR)pvAddress, GCPhysFault, pgmPoolPoolKindToStr(pPage->enmKind), cbWrite));
248	for (;;)
249	{
250	union
251	{
252	void *pv;
253	PX86PT pPT;
254	PX86PTPAE pPTPae;
255	PX86PD pPD;
256	PX86PDPAE pPDPae;
257	PX86PDPT pPDPT;
258	PX86PML4 pPML4;
259	} uShw;
260
261	uShw.pv = NULL;
262	switch (pPage->enmKind)
263	{
264	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
265	{
266	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
267	const unsigned iShw = off / sizeof(X86PTE);
268	LogFlow(("PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT iShw=%x\n", iShw));
269	if (uShw.pPT->a[iShw].n.u1Present)
270	{
271	# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
272	X86PTE GstPte;
273
274	int rc = pgmPoolPhysSimpleReadGCPhys(pVM, &GstPte, pvAddress, GCPhysFault, sizeof(GstPte));
275	AssertRC(rc);
276	Log4(("pgmPoolMonitorChainChanging 32_32: deref %016RX64 GCPhys %08RX32\n", uShw.pPT->a[iShw].u & X86_PTE_PAE_PG_MASK, GstPte.u & X86_PTE_PG_MASK));
277	pgmPoolTracDerefGCPhysHint(pPool, pPage,
278	uShw.pPT->a[iShw].u & X86_PTE_PAE_PG_MASK,
279	GstPte.u & X86_PTE_PG_MASK);
280	# endif
281	uShw.pPT->a[iShw].u = 0;
282	}
283	break;
284	}
285
286	/* page/2 sized */
287	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
288	{
289	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
290	if (!((off ^ pPage->GCPhys) & (PAGE_SIZE / 2)))
291	{
292	const unsigned iShw = (off / sizeof(X86PTE)) & (X86_PG_PAE_ENTRIES - 1);
293	LogFlow(("PGMPOOLKIND_PAE_PT_FOR_32BIT_PT iShw=%x\n", iShw));
294	if (uShw.pPTPae->a[iShw].n.u1Present)
295	{
296	# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
297	X86PTE GstPte;
298	int rc = pgmPoolPhysSimpleReadGCPhys(pVM, &GstPte, pvAddress, GCPhysFault, sizeof(GstPte));
299	AssertRC(rc);
300
301	Log4(("pgmPoolMonitorChainChanging pae_32: deref %016RX64 GCPhys %08RX32\n", uShw.pPT->a[iShw].u & X86_PTE_PAE_PG_MASK, GstPte.u & X86_PTE_PG_MASK));
302	pgmPoolTracDerefGCPhysHint(pPool, pPage,
303	uShw.pPTPae->a[iShw].u & X86_PTE_PAE_PG_MASK,
304	GstPte.u & X86_PTE_PG_MASK);
305	# endif
306	uShw.pPTPae->a[iShw].u = 0;
307	}
308	}
309	break;
310	}
311
312	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
313	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
314	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
315	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
316	{
317	unsigned iGst = off / sizeof(X86PDE);
318	unsigned iShwPdpt = iGst / 256;
319	unsigned iShw = (iGst % 256) * 2;
320	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
321
322	LogFlow(("pgmPoolMonitorChainChanging PAE for 32 bits: iGst=%x iShw=%x idx = %d page idx=%d\n", iGst, iShw, iShwPdpt, pPage->enmKind - PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD));
323	if (iShwPdpt == pPage->enmKind - (unsigned)PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD)
324	{
325	for (unsigned i = 0; i < 2; i++)
326	{
327	# ifndef IN_RING0
328	if ((uShw.pPDPae->a[iShw + i].u & (PGM_PDFLAGS_MAPPING \| X86_PDE_P)) == (PGM_PDFLAGS_MAPPING \| X86_PDE_P))
329	{
330	Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s));
331	VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
332	LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShwPdpt=%#x iShw=%#x!\n", iShwPdpt, iShw+i));
333	break;
334	}
335	else
336	# endif /* !IN_RING0 */
337	if (uShw.pPDPae->a[iShw+i].n.u1Present)
338	{
339	LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw=%#x: %RX64 -> freeing it!\n", iShw+i, uShw.pPDPae->a[iShw+i].u));
340	pgmPoolFree(pVM,
341	uShw.pPDPae->a[iShw+i].u & X86_PDE_PAE_PG_MASK,
342	pPage->idx,
343	iShw + i);
344	uShw.pPDPae->a[iShw+i].u = 0;
345	}
346
347	/* paranoia / a bit assumptive. */
348	if ( pCpu
349	&& (off & 3)
350	&& (off & 3) + cbWrite > 4)
351	{
352	const unsigned iShw2 = iShw + 2 + i;
353	if (iShw2 < RT_ELEMENTS(uShw.pPDPae->a))
354	{
355	# ifndef IN_RING0
356	if ((uShw.pPDPae->a[iShw2].u & (PGM_PDFLAGS_MAPPING \| X86_PDE_P)) == (PGM_PDFLAGS_MAPPING \| X86_PDE_P))
357	{
358	Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s));
359	VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
360	LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShwPdpt=%#x iShw2=%#x!\n", iShwPdpt, iShw2));
361	break;
362	}
363	else
364	# endif /* !IN_RING0 */
365	if (uShw.pPDPae->a[iShw2].n.u1Present)
366	{
367	LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPDPae->a[iShw2].u));
368	pgmPoolFree(pVM,
369	uShw.pPDPae->a[iShw2].u & X86_PDE_PAE_PG_MASK,
370	pPage->idx,
371	iShw2);
372	uShw.pPDPae->a[iShw2].u = 0;
373	}
374	}
375	}
376	}
377	}
378	break;
379	}
380
381	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
382	{
383	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
384	const unsigned iShw = off / sizeof(X86PTEPAE);
385	if (uShw.pPTPae->a[iShw].n.u1Present)
386	{
387	# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
388	X86PTEPAE GstPte;
389	int rc = pgmPoolPhysSimpleReadGCPhys(pVM, &GstPte, pvAddress, GCPhysFault, sizeof(GstPte));
390	AssertRC(rc);
391
392	Log4(("pgmPoolMonitorChainChanging pae: deref %016RX64 GCPhys %016RX64\n", uShw.pPTPae->a[iShw].u & X86_PTE_PAE_PG_MASK, GstPte.u & X86_PTE_PAE_PG_MASK));
393	pgmPoolTracDerefGCPhysHint(pPool, pPage,
394	uShw.pPTPae->a[iShw].u & X86_PTE_PAE_PG_MASK,
395	GstPte.u & X86_PTE_PAE_PG_MASK);
396	# endif
397	uShw.pPTPae->a[iShw].u = 0;
398	}
399
400	/* paranoia / a bit assumptive. */
401	if ( pCpu
402	&& (off & 7)
403	&& (off & 7) + cbWrite > sizeof(X86PTEPAE))
404	{
405	const unsigned iShw2 = (off + cbWrite - 1) / sizeof(X86PTEPAE);
406	AssertBreak(iShw2 < RT_ELEMENTS(uShw.pPTPae->a));
407
408	if (uShw.pPTPae->a[iShw2].n.u1Present)
409	{
410	# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
411	X86PTEPAE GstPte;
412	# ifdef IN_RING3
413	int rc = pgmPoolPhysSimpleReadGCPhys(pVM, &GstPte, (RTHCPTR)((RTHCUINTPTR)pvAddress + sizeof(GstPte)), GCPhysFault + sizeof(GstPte), sizeof(GstPte));
414	# else
415	int rc = pgmPoolPhysSimpleReadGCPhys(pVM, &GstPte, pvAddress + sizeof(GstPte), GCPhysFault + sizeof(GstPte), sizeof(GstPte));
416	# endif
417	AssertRC(rc);
418	Log4(("pgmPoolMonitorChainChanging pae: deref %016RX64 GCPhys %016RX64\n", uShw.pPTPae->a[iShw2].u & X86_PTE_PAE_PG_MASK, GstPte.u & X86_PTE_PAE_PG_MASK));
419	pgmPoolTracDerefGCPhysHint(pPool, pPage,
420	uShw.pPTPae->a[iShw2].u & X86_PTE_PAE_PG_MASK,
421	GstPte.u & X86_PTE_PAE_PG_MASK);
422	# endif
423	uShw.pPTPae->a[iShw2].u = 0;
424	}
425	}
426	break;
427	}
428
429	case PGMPOOLKIND_32BIT_PD:
430	{
431	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
432	const unsigned iShw = off / sizeof(X86PTE); // ASSUMING 32-bit guest paging!
433
434	LogFlow(("pgmPoolMonitorChainChanging: PGMPOOLKIND_32BIT_PD %x\n", iShw));
435	# ifndef IN_RING0
436	if (uShw.pPD->a[iShw].u & PGM_PDFLAGS_MAPPING)
437	{
438	Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s));
439	VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
440	STAM_COUNTER_INC(&(pVM->pgm.s.StatRZGuestCR3WriteConflict));
441	LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShw=%#x!\n", iShw));
442	break;
443	}
444	# endif /* !IN_RING0 */
445	# ifndef IN_RING0
446	else
447	# endif /* !IN_RING0 */
448	{
449	if (uShw.pPD->a[iShw].n.u1Present)
450	{
451	LogFlow(("pgmPoolMonitorChainChanging: 32 bit pd iShw=%#x: %RX64 -> freeing it!\n", iShw, uShw.pPD->a[iShw].u));
452	pgmPoolFree(pVM,
453	uShw.pPD->a[iShw].u & X86_PDE_PAE_PG_MASK,
454	pPage->idx,
455	iShw);
456	uShw.pPD->a[iShw].u = 0;
457	}
458	}
459	/* paranoia / a bit assumptive. */
460	if ( pCpu
461	&& (off & 3)
462	&& (off & 3) + cbWrite > sizeof(X86PTE))
463	{
464	const unsigned iShw2 = (off + cbWrite - 1) / sizeof(X86PTE);
465	if ( iShw2 != iShw
466	&& iShw2 < RT_ELEMENTS(uShw.pPD->a))
467	{
468	# ifndef IN_RING0
469	if (uShw.pPD->a[iShw2].u & PGM_PDFLAGS_MAPPING)
470	{
471	Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s));
472	STAM_COUNTER_INC(&(pVM->pgm.s.StatRZGuestCR3WriteConflict));
473	VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
474	LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShw2=%#x!\n", iShw2));
475	}
476	# endif /* !IN_RING0 */
477	# ifndef IN_RING0
478	else
479	# endif /* !IN_RING0 */
480	{
481	if (uShw.pPD->a[iShw2].n.u1Present)
482	{
483	LogFlow(("pgmPoolMonitorChainChanging: 32 bit pd iShw=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPD->a[iShw2].u));
484	pgmPoolFree(pVM,
485	uShw.pPD->a[iShw2].u & X86_PDE_PAE_PG_MASK,
486	pPage->idx,
487	iShw2);
488	uShw.pPD->a[iShw2].u = 0;
489	}
490	}
491	}
492	}
493	#if 0 /* useful when running PGMAssertCR3(), a bit too troublesome for general use (TLBs). */
494	if ( uShw.pPD->a[iShw].n.u1Present
495	&& !VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3))
496	{
497	LogFlow(("pgmPoolMonitorChainChanging: iShw=%#x: %RX32 -> freeing it!\n", iShw, uShw.pPD->a[iShw].u));
498	# ifdef IN_RC /* TLB load - we're pushing things a bit... */
499	ASMProbeReadByte(pvAddress);
500	# endif
501	pgmPoolFree(pVM, uShw.pPD->a[iShw].u & X86_PDE_PG_MASK, pPage->idx, iShw);
502	uShw.pPD->a[iShw].u = 0;
503	}
504	#endif
505	break;
506	}
507
508	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
509	{
510	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
511	const unsigned iShw = off / sizeof(X86PDEPAE);
512	#ifndef IN_RING0
513	if (uShw.pPDPae->a[iShw].u & PGM_PDFLAGS_MAPPING)
514	{
515	Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s));
516	VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
517	STAM_COUNTER_INC(&(pVM->pgm.s.StatRZGuestCR3WriteConflict));
518	LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShw=%#x!\n", iShw));
519	break;
520	}
521	#endif /* !IN_RING0 */
522	/*
523	* Causes trouble when the guest uses a PDE to refer to the whole page table level
524	* structure. (Invalidate here; faults later on when it tries to change the page
525	* table entries -> recheck; probably only applies to the RC case.)
526	*/
527	# ifndef IN_RING0
528	else
529	# endif /* !IN_RING0 */
530	{
531	if (uShw.pPDPae->a[iShw].n.u1Present)
532	{
533	LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw=%#x: %RX64 -> freeing it!\n", iShw, uShw.pPDPae->a[iShw].u));
534	pgmPoolFree(pVM,
535	uShw.pPDPae->a[iShw].u & X86_PDE_PAE_PG_MASK,
536	pPage->idx,
537	iShw);
538	uShw.pPDPae->a[iShw].u = 0;
539	}
540	}
541	/* paranoia / a bit assumptive. */
542	if ( pCpu
543	&& (off & 7)
544	&& (off & 7) + cbWrite > sizeof(X86PDEPAE))
545	{
546	const unsigned iShw2 = (off + cbWrite - 1) / sizeof(X86PDEPAE);
547	AssertBreak(iShw2 < RT_ELEMENTS(uShw.pPDPae->a));
548
549	#ifndef IN_RING0
550	if ( iShw2 != iShw
551	&& uShw.pPDPae->a[iShw2].u & PGM_PDFLAGS_MAPPING)
552	{
553	Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s));
554	VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
555	STAM_COUNTER_INC(&(pVM->pgm.s.StatRZGuestCR3WriteConflict));
556	LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShw2=%#x!\n", iShw2));
557	}
558	#endif /* !IN_RING0 */
559	# ifndef IN_RING0
560	else
561	# endif /* !IN_RING0 */
562	if (uShw.pPDPae->a[iShw2].n.u1Present)
563	{
564	LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw2=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPDPae->a[iShw2].u));
565	pgmPoolFree(pVM,
566	uShw.pPDPae->a[iShw2].u & X86_PDE_PAE_PG_MASK,
567	pPage->idx,
568	iShw2);
569	uShw.pPDPae->a[iShw2].u = 0;
570	}
571	}
572	break;
573	}
574
575	case PGMPOOLKIND_PAE_PDPT:
576	{
577	/*
578	* Hopefully this doesn't happen very often:
579	* - touching unused parts of the page
580	* - messing with the bits of pd pointers without changing the physical address
581	*/
582	/* PDPT roots are not page aligned; 32 byte only! */
583	const unsigned offPdpt = GCPhysFault - pPage->GCPhys;
584
585	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
586	const unsigned iShw = offPdpt / sizeof(X86PDPE);
587	if (iShw < X86_PG_PAE_PDPE_ENTRIES) /* don't use RT_ELEMENTS(uShw.pPDPT->a), because that's for long mode only */
588	{
589	# ifndef IN_RING0
590	if (uShw.pPDPT->a[iShw].u & PGM_PLXFLAGS_MAPPING)
591	{
592	Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s));
593	STAM_COUNTER_INC(&(pVM->pgm.s.StatRZGuestCR3WriteConflict));
594	VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
595	LogFlow(("pgmPoolMonitorChainChanging: Detected pdpt conflict at iShw=%#x!\n", iShw));
596	break;
597	}
598	# endif /* !IN_RING0 */
599	# ifndef IN_RING0
600	else
601	# endif /* !IN_RING0 */
602	if (uShw.pPDPT->a[iShw].n.u1Present)
603	{
604	LogFlow(("pgmPoolMonitorChainChanging: pae pdpt iShw=%#x: %RX64 -> freeing it!\n", iShw, uShw.pPDPT->a[iShw].u));
605	pgmPoolFree(pVM,
606	uShw.pPDPT->a[iShw].u & X86_PDPE_PG_MASK,
607	pPage->idx,
608	iShw);
609	uShw.pPDPT->a[iShw].u = 0;
610	}
611
612	/* paranoia / a bit assumptive. */
613	if ( pCpu
614	&& (offPdpt & 7)
615	&& (offPdpt & 7) + cbWrite > sizeof(X86PDPE))
616	{
617	const unsigned iShw2 = (offPdpt + cbWrite - 1) / sizeof(X86PDPE);
618	if ( iShw2 != iShw
619	&& iShw2 < X86_PG_PAE_PDPE_ENTRIES)
620	{
621	# ifndef IN_RING0
622	if (uShw.pPDPT->a[iShw2].u & PGM_PLXFLAGS_MAPPING)
623	{
624	Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s));
625	STAM_COUNTER_INC(&(pVM->pgm.s.StatRZGuestCR3WriteConflict));
626	VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
627	LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShw2=%#x!\n", iShw2));
628	}
629	# endif /* !IN_RING0 */
630	# ifndef IN_RING0
631	else
632	# endif /* !IN_RING0 */
633	if (uShw.pPDPT->a[iShw2].n.u1Present)
634	{
635	LogFlow(("pgmPoolMonitorChainChanging: pae pdpt iShw=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPDPT->a[iShw2].u));
636	pgmPoolFree(pVM,
637	uShw.pPDPT->a[iShw2].u & X86_PDPE_PG_MASK,
638	pPage->idx,
639	iShw2);
640	uShw.pPDPT->a[iShw2].u = 0;
641	}
642	}
643	}
644	}
645	break;
646	}
647
648	#ifndef IN_RC
649	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
650	{
651	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
652	const unsigned iShw = off / sizeof(X86PDEPAE);
653	Assert(!(uShw.pPDPae->a[iShw].u & PGM_PDFLAGS_MAPPING));
654	if (uShw.pPDPae->a[iShw].n.u1Present)
655	{
656	LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw=%#x: %RX64 -> freeing it!\n", iShw, uShw.pPDPae->a[iShw].u));
657	pgmPoolFree(pVM,
658	uShw.pPDPae->a[iShw].u & X86_PDE_PAE_PG_MASK,
659	pPage->idx,
660	iShw);
661	uShw.pPDPae->a[iShw].u = 0;
662	}
663	/* paranoia / a bit assumptive. */
664	if ( pCpu
665	&& (off & 7)
666	&& (off & 7) + cbWrite > sizeof(X86PDEPAE))
667	{
668	const unsigned iShw2 = (off + cbWrite - 1) / sizeof(X86PDEPAE);
669	AssertBreak(iShw2 < RT_ELEMENTS(uShw.pPDPae->a));
670
671	Assert(!(uShw.pPDPae->a[iShw2].u & PGM_PDFLAGS_MAPPING));
672	if (uShw.pPDPae->a[iShw2].n.u1Present)
673	{
674	LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw2=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPDPae->a[iShw2].u));
675	pgmPoolFree(pVM,
676	uShw.pPDPae->a[iShw2].u & X86_PDE_PAE_PG_MASK,
677	pPage->idx,
678	iShw2);
679	uShw.pPDPae->a[iShw2].u = 0;
680	}
681	}
682	break;
683	}
684
685	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
686	{
687	/*
688	* Hopefully this doesn't happen very often:
689	* - messing with the bits of pd pointers without changing the physical address
690	*/
691	if (!VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3))
692	{
693	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
694	const unsigned iShw = off / sizeof(X86PDPE);
695	if (uShw.pPDPT->a[iShw].n.u1Present)
696	{
697	LogFlow(("pgmPoolMonitorChainChanging: pdpt iShw=%#x: %RX64 -> freeing it!\n", iShw, uShw.pPDPT->a[iShw].u));
698	pgmPoolFree(pVM, uShw.pPDPT->a[iShw].u & X86_PDPE_PG_MASK, pPage->idx, iShw);
699	uShw.pPDPT->a[iShw].u = 0;
700	}
701	/* paranoia / a bit assumptive. */
702	if ( pCpu
703	&& (off & 7)
704	&& (off & 7) + cbWrite > sizeof(X86PDPE))
705	{
706	const unsigned iShw2 = (off + cbWrite - 1) / sizeof(X86PDPE);
707	if (uShw.pPDPT->a[iShw2].n.u1Present)
708	{
709	LogFlow(("pgmPoolMonitorChainChanging: pdpt iShw2=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPDPT->a[iShw2].u));
710	pgmPoolFree(pVM, uShw.pPDPT->a[iShw2].u & X86_PDPE_PG_MASK, pPage->idx, iShw2);
711	uShw.pPDPT->a[iShw2].u = 0;
712	}
713	}
714	}
715	break;
716	}
717
718	case PGMPOOLKIND_64BIT_PML4:
719	{
720	/*
721	* Hopefully this doesn't happen very often:
722	* - messing with the bits of pd pointers without changing the physical address
723	*/
724	if (!VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3))
725	{
726	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
727	const unsigned iShw = off / sizeof(X86PDPE);
728	if (uShw.pPML4->a[iShw].n.u1Present)
729	{
730	LogFlow(("pgmPoolMonitorChainChanging: pml4 iShw=%#x: %RX64 -> freeing it!\n", iShw, uShw.pPML4->a[iShw].u));
731	pgmPoolFree(pVM, uShw.pPML4->a[iShw].u & X86_PML4E_PG_MASK, pPage->idx, iShw);
732	uShw.pPML4->a[iShw].u = 0;
733	}
734	/* paranoia / a bit assumptive. */
735	if ( pCpu
736	&& (off & 7)
737	&& (off & 7) + cbWrite > sizeof(X86PDPE))
738	{
739	const unsigned iShw2 = (off + cbWrite - 1) / sizeof(X86PML4E);
740	if (uShw.pPML4->a[iShw2].n.u1Present)
741	{
742	LogFlow(("pgmPoolMonitorChainChanging: pml4 iShw2=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPML4->a[iShw2].u));
743	pgmPoolFree(pVM, uShw.pPML4->a[iShw2].u & X86_PML4E_PG_MASK, pPage->idx, iShw2);
744	uShw.pPML4->a[iShw2].u = 0;
745	}
746	}
747	}
748	break;
749	}
750	#endif /* IN_RING0 */
751
752	default:
753	AssertFatalMsgFailed(("enmKind=%d\n", pPage->enmKind));
754	}
755	PGMPOOL_UNLOCK_PTR(pVM, uShw.pv);
756
757	/* next */
758	if (pPage->iMonitoredNext == NIL_PGMPOOL_IDX)
759	return;
760	pPage = &pPool->aPages[pPage->iMonitoredNext];
761	}
762	}
763
764	# ifndef IN_RING3
765	/**
766	* Checks if a access could be a fork operation in progress.
767	*
768	* Meaning, that the guest is setuping up the parent process for Copy-On-Write.
769	*
770	* @returns true if it's likly that we're forking, otherwise false.
771	* @param pPool The pool.
772	* @param pCpu The disassembled instruction.
773	* @param offFault The access offset.
774	*/
775	DECLINLINE(bool) pgmPoolMonitorIsForking(PPGMPOOL pPool, PDISCPUSTATE pCpu, unsigned offFault)
776	{
777	/*
778	* i386 linux is using btr to clear X86_PTE_RW.
779	* The functions involved are (2.6.16 source inspection):
780	* clear_bit
781	* ptep_set_wrprotect
782	* copy_one_pte
783	* copy_pte_range
784	* copy_pmd_range
785	* copy_pud_range
786	* copy_page_range
787	* dup_mmap
788	* dup_mm
789	* copy_mm
790	* copy_process
791	* do_fork
792	*/
793	if ( pCpu->pCurInstr->opcode == OP_BTR
794	&& !(offFault & 4)
795	/** @todo Validate that the bit index is X86_PTE_RW. */
796	)
797	{
798	STAM_COUNTER_INC(&pPool->CTX_MID_Z(StatMonitor,Fork));
799	return true;
800	}
801	return false;
802	}
803
804
805	/**
806	* Determine whether the page is likely to have been reused.
807	*
808	* @returns true if we consider the page as being reused for a different purpose.
809	* @returns false if we consider it to still be a paging page.
810	* @param pVM VM Handle.
811	* @param pPage The page in question.
812	* @param pRegFrame Trap register frame.
813	* @param pCpu The disassembly info for the faulting instruction.
814	* @param pvFault The fault address.
815	*
816	* @remark The REP prefix check is left to the caller because of STOSD/W.
817	*/
818	DECLINLINE(bool) pgmPoolMonitorIsReused(PVM pVM, PPGMPOOLPAGE pPage, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, RTGCPTR pvFault)
819	{
820	#ifndef IN_RC
821	/** @todo could make this general, faulting close to rsp should be safe reuse heuristic. */
822	if ( HWACCMHasPendingIrq(pVM)
823	&& (pRegFrame->rsp - pvFault) < 32)
824	{
825	/* Fault caused by stack writes while trying to inject an interrupt event. */
826	Log(("pgmPoolMonitorIsReused: reused %RGv for interrupt stack (rsp=%RGv).\n", pvFault, pRegFrame->rsp));
827	return true;
828	}
829	#else
830	NOREF(pVM); NOREF(pvFault);
831	#endif
832
833	switch (pCpu->pCurInstr->opcode)
834	{
835	/* call implies the actual push of the return address faulted */
836	case OP_CALL:
837	Log4(("pgmPoolMonitorIsReused: CALL\n"));
838	return true;
839	case OP_PUSH:
840	Log4(("pgmPoolMonitorIsReused: PUSH\n"));
841	return true;
842	case OP_PUSHF:
843	Log4(("pgmPoolMonitorIsReused: PUSHF\n"));
844	return true;
845	case OP_PUSHA:
846	Log4(("pgmPoolMonitorIsReused: PUSHA\n"));
847	return true;
848	case OP_FXSAVE:
849	Log4(("pgmPoolMonitorIsReused: FXSAVE\n"));
850	return true;
851	case OP_MOVNTI: /* solaris - block_zero_no_xmm */
852	Log4(("pgmPoolMonitorIsReused: MOVNTI\n"));
853	return true;
854	case OP_MOVNTDQ: /* solaris - hwblkclr & hwblkpagecopy */
855	Log4(("pgmPoolMonitorIsReused: MOVNTDQ\n"));
856	return true;
857	case OP_MOVSWD:
858	case OP_STOSWD:
859	if ( pCpu->prefix == (PREFIX_REP\|PREFIX_REX)
860	&& pRegFrame->rcx >= 0x40
861	)
862	{
863	Assert(pCpu->mode == CPUMODE_64BIT);
864
865	Log(("pgmPoolMonitorIsReused: OP_STOSQ\n"));
866	return true;
867	}
868	return false;
869	}
870	if ( (pCpu->param1.flags & USE_REG_GEN32)
871	&& (pCpu->param1.base.reg_gen == USE_REG_ESP))
872	{
873	Log4(("pgmPoolMonitorIsReused: ESP\n"));
874	return true;
875	}
876
877	//if (pPage->fCR3Mix)
878	// return false;
879	return false;
880	}
881
882
883	/**
884	* Flushes the page being accessed.
885	*
886	* @returns VBox status code suitable for scheduling.
887	* @param pVM The VM handle.
888	* @param pPool The pool.
889	* @param pPage The pool page (head).
890	* @param pCpu The disassembly of the write instruction.
891	* @param pRegFrame The trap register frame.
892	* @param GCPhysFault The fault address as guest physical address.
893	* @param pvFault The fault address.
894	*/
895	static int pgmPoolAccessHandlerFlush(PVM pVM, PPGMPOOL pPool, PPGMPOOLPAGE pPage, PDISCPUSTATE pCpu,
896	PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, RTGCPTR pvFault)
897	{
898	/*
899	* First, do the flushing.
900	*/
901	int rc = pgmPoolMonitorChainFlush(pPool, pPage);
902
903	/*
904	* Emulate the instruction (xp/w2k problem, requires pc/cr2/sp detection).
905	*/
906	uint32_t cbWritten;
907	int rc2 = EMInterpretInstructionCPU(pVM, pCpu, pRegFrame, pvFault, &cbWritten);
908	if (RT_SUCCESS(rc2))
909	pRegFrame->rip += pCpu->opsize;
910	else if (rc2 == VERR_EM_INTERPRETER)
911	{
912	#ifdef IN_RC
913	if (PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip))
914	{
915	LogFlow(("pgmPoolAccessHandlerPTWorker: Interpretation failed for patch code %04x:%RGv, ignoring.\n",
916	pRegFrame->cs, (RTGCPTR)pRegFrame->eip));
917	rc = VINF_SUCCESS;
918	STAM_COUNTER_INC(&pPool->StatMonitorRZIntrFailPatch2);
919	}
920	else
921	#endif
922	{
923	rc = VINF_EM_RAW_EMULATE_INSTR;
924	STAM_COUNTER_INC(&pPool->CTX_MID_Z(StatMonitor,EmulateInstr));
925	}
926	}
927	else
928	rc = rc2;
929
930	/* See use in pgmPoolAccessHandlerSimple(). */
931	PGM_INVL_GUEST_TLBS();
932
933	LogFlow(("pgmPoolAccessHandlerPT: returns %Rrc (flushed)\n", rc));
934	return rc;
935
936	}
937
938
939	/**
940	* Handles the STOSD write accesses.
941	*
942	* @returns VBox status code suitable for scheduling.
943	* @param pVM The VM handle.
944	* @param pPool The pool.
945	* @param pPage The pool page (head).
946	* @param pCpu The disassembly of the write instruction.
947	* @param pRegFrame The trap register frame.
948	* @param GCPhysFault The fault address as guest physical address.
949	* @param pvFault The fault address.
950	*/
951	DECLINLINE(int) pgmPoolAccessHandlerSTOSD(PVM pVM, PPGMPOOL pPool, PPGMPOOLPAGE pPage, PDISCPUSTATE pCpu,
952	PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, RTGCPTR pvFault)
953	{
954	Assert(pCpu->mode == CPUMODE_32BIT);
955
956	Log3(("pgmPoolAccessHandlerSTOSD\n"));
957
958	/*
959	* Increment the modification counter and insert it into the list
960	* of modified pages the first time.
961	*/
962	if (!pPage->cModifications++)
963	pgmPoolMonitorModifiedInsert(pPool, pPage);
964
965	/*
966	* Execute REP STOSD.
967	*
968	* This ASSUMES that we're not invoked by Trap0e on in a out-of-sync
969	* write situation, meaning that it's safe to write here.
970	*/
971	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
972	PVMCPU pVCpu = VMMGetCpu(pPool->CTX_SUFF(pVM));
973	#endif
974	RTGCUINTPTR pu32 = (RTGCUINTPTR)pvFault;
975	while (pRegFrame->ecx)
976	{
977	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
978	uint32_t iPrevSubset = PGMDynMapPushAutoSubset(pVCpu);
979	pgmPoolMonitorChainChanging(pPool, pPage, GCPhysFault, (RTGCPTR)pu32, NULL);
980	PGMDynMapPopAutoSubset(pVCpu, iPrevSubset);
981	#else
982	pgmPoolMonitorChainChanging(pPool, pPage, GCPhysFault, (RTGCPTR)pu32, NULL);
983	#endif
984	#ifdef IN_RC
985	(uint32_t )pu32 = pRegFrame->eax;
986	#else
987	PGMPhysSimpleWriteGCPhys(pVM, GCPhysFault, &pRegFrame->eax, 4);
988	#endif
989	pu32 += 4;
990	GCPhysFault += 4;
991	pRegFrame->edi += 4;
992	pRegFrame->ecx--;
993	}
994	pRegFrame->rip += pCpu->opsize;
995
996	#ifdef IN_RC
997	/* See use in pgmPoolAccessHandlerSimple(). */
998	PGM_INVL_GUEST_TLBS();
999	#endif
1000
1001	LogFlow(("pgmPoolAccessHandlerSTOSD: returns\n"));
1002	return VINF_SUCCESS;
1003	}
1004
1005
1006	/**
1007	* Handles the simple write accesses.
1008	*
1009	* @returns VBox status code suitable for scheduling.
1010	* @param pVM The VM handle.
1011	* @param pPool The pool.
1012	* @param pPage The pool page (head).
1013	* @param pCpu The disassembly of the write instruction.
1014	* @param pRegFrame The trap register frame.
1015	* @param GCPhysFault The fault address as guest physical address.
1016	* @param pvFault The fault address.
1017	*/
1018	DECLINLINE(int) pgmPoolAccessHandlerSimple(PVM pVM, PPGMPOOL pPool, PPGMPOOLPAGE pPage, PDISCPUSTATE pCpu,
1019	PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, RTGCPTR pvFault)
1020	{
1021	Log3(("pgmPoolAccessHandlerSimple\n"));
1022	/*
1023	* Increment the modification counter and insert it into the list
1024	* of modified pages the first time.
1025	*/
1026	if (!pPage->cModifications++)
1027	pgmPoolMonitorModifiedInsert(pPool, pPage);
1028
1029	/*
1030	* Clear all the pages. ASSUMES that pvFault is readable.
1031	*/
1032	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
1033	PVMCPU pVCpu = VMMGetCpu(pPool->CTX_SUFF(pVM));
1034	uint32_t iPrevSubset = PGMDynMapPushAutoSubset(pVCpu);
1035	pgmPoolMonitorChainChanging(pPool, pPage, GCPhysFault, pvFault, pCpu);
1036	PGMDynMapPopAutoSubset(pVCpu, iPrevSubset);
1037	#else
1038	pgmPoolMonitorChainChanging(pPool, pPage, GCPhysFault, pvFault, pCpu);
1039	#endif
1040
1041	/*
1042	* Interpret the instruction.
1043	*/
1044	uint32_t cb;
1045	int rc = EMInterpretInstructionCPU(pVM, pCpu, pRegFrame, pvFault, &cb);
1046	if (RT_SUCCESS(rc))
1047	pRegFrame->rip += pCpu->opsize;
1048	else if (rc == VERR_EM_INTERPRETER)
1049	{
1050	LogFlow(("pgmPoolAccessHandlerPTWorker: Interpretation failed for %04x:%RGv - opcode=%d\n",
1051	pRegFrame->cs, (RTGCPTR)pRegFrame->rip, pCpu->pCurInstr->opcode));
1052	rc = VINF_EM_RAW_EMULATE_INSTR;
1053	STAM_COUNTER_INC(&pPool->CTX_MID_Z(StatMonitor,EmulateInstr));
1054	}
1055
1056	#ifdef IN_RC
1057	/*
1058	* Quick hack, with logging enabled we're getting stale
1059	* code TLBs but no data TLB for EIP and crash in EMInterpretDisasOne.
1060	* Flushing here is BAD and expensive, I think EMInterpretDisasOne will
1061	* have to be fixed to support this. But that'll have to wait till next week.
1062	*
1063	* An alternative is to keep track of the changed PTEs together with the
1064	* GCPhys from the guest PT. This may proove expensive though.
1065	*
1066	* At the moment, it's VITAL that it's done AFTER the instruction interpreting
1067	* because we need the stale TLBs in some cases (XP boot). This MUST be fixed properly!
1068	*/
1069	PGM_INVL_GUEST_TLBS();
1070	#endif
1071
1072	LogFlow(("pgmPoolAccessHandlerSimple: returns %Rrc cb=%d\n", rc, cb));
1073	return rc;
1074	}
1075
1076	/**
1077	* \#PF Handler callback for PT write accesses.
1078	*
1079	* @returns VBox status code (appropriate for GC return).
1080	* @param pVM VM Handle.
1081	* @param uErrorCode CPU Error code.
1082	* @param pRegFrame Trap register frame.
1083	* NULL on DMA and other non CPU access.
1084	* @param pvFault The fault address (cr2).
1085	* @param GCPhysFault The GC physical address corresponding to pvFault.
1086	* @param pvUser User argument.
1087	*/
1088	DECLEXPORT(int) pgmPoolAccessHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser)
1089	{
1090	STAM_PROFILE_START(&pVM->pgm.s.CTX_SUFF(pPool)->CTX_SUFF_Z(StatMonitor), a);
1091	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
1092	PPGMPOOLPAGE pPage = (PPGMPOOLPAGE)pvUser;
1093	LogFlow(("pgmPoolAccessHandler: pvFault=%RGv pPage=%p:{.idx=%d} GCPhysFault=%RGp\n", pvFault, pPage, pPage->idx, GCPhysFault));
1094
1095	/*
1096	* We should ALWAYS have the list head as user parameter. This
1097	* is because we use that page to record the changes.
1098	*/
1099	Assert(pPage->iMonitoredPrev == NIL_PGMPOOL_IDX);
1100
1101	/*
1102	* Disassemble the faulting instruction.
1103	*/
1104	DISCPUSTATE Cpu;
1105	int rc = EMInterpretDisasOne(pVM, pRegFrame, &Cpu, NULL);
1106	AssertRCReturn(rc, rc);
1107
1108	/*
1109	* Check if it's worth dealing with.
1110	*/
1111	bool fReused = false;
1112	if ( ( pPage->cModifications < 48 /** @todo #define / /* @todo need to check that it's not mapping EIP. / /* @todo adjust this! */
1113	\|\| pgmPoolIsPageLocked(&pVM->pgm.s, pPage)
1114	)
1115	&& !(fReused = pgmPoolMonitorIsReused(pVM, pPage, pRegFrame, &Cpu, pvFault))
1116	&& !pgmPoolMonitorIsForking(pPool, &Cpu, GCPhysFault & PAGE_OFFSET_MASK))
1117	{
1118	/*
1119	* Simple instructions, no REP prefix.
1120	*/
1121	if (!(Cpu.prefix & (PREFIX_REP \| PREFIX_REPNE)))
1122	{
1123	rc = pgmPoolAccessHandlerSimple(pVM, pPool, pPage, &Cpu, pRegFrame, GCPhysFault, pvFault);
1124	STAM_PROFILE_STOP_EX(&pVM->pgm.s.CTX_SUFF(pPool)->CTX_SUFF_Z(StatMonitor), &pPool->CTX_MID_Z(StatMonitor,Handled), a);
1125	return rc;
1126	}
1127
1128	/*
1129	* Windows is frequently doing small memset() operations (netio test 4k+).
1130	* We have to deal with these or we'll kill the cache and performance.
1131	*/
1132	if ( Cpu.pCurInstr->opcode == OP_STOSWD
1133	&& CPUMGetGuestCPL(pVM, pRegFrame) == 0
1134	&& pRegFrame->ecx <= 0x20
1135	&& pRegFrame->ecx * 4 <= PAGE_SIZE - ((uintptr_t)pvFault & PAGE_OFFSET_MASK)
1136	&& !((uintptr_t)pvFault & 3)
1137	&& (pRegFrame->eax == 0 \|\| pRegFrame->eax == 0x80) /* the two values observed. */
1138	&& Cpu.mode == CPUMODE_32BIT
1139	&& Cpu.opmode == CPUMODE_32BIT
1140	&& Cpu.addrmode == CPUMODE_32BIT
1141	&& Cpu.prefix == PREFIX_REP
1142	&& !pRegFrame->eflags.Bits.u1DF
1143	)
1144	{
1145	rc = pgmPoolAccessHandlerSTOSD(pVM, pPool, pPage, &Cpu, pRegFrame, GCPhysFault, pvFault);
1146	STAM_PROFILE_STOP_EX(&pVM->pgm.s.CTX_SUFF(pPool)->CTX_SUFF_Z(StatMonitor), &pPool->CTX_MID_Z(StatMonitor,RepStosd), a);
1147	return rc;
1148	}
1149
1150	/* REP prefix, don't bother. */
1151	STAM_COUNTER_INC(&pPool->CTX_MID_Z(StatMonitor,RepPrefix));
1152	Log4(("pgmPoolAccessHandler: eax=%#x ecx=%#x edi=%#x esi=%#x rip=%RGv opcode=%d prefix=%#x\n",
1153	pRegFrame->eax, pRegFrame->ecx, pRegFrame->edi, pRegFrame->esi, (RTGCPTR)pRegFrame->rip, Cpu.pCurInstr->opcode, Cpu.prefix));
1154	}
1155
1156	/*
1157	* Not worth it, so flush it.
1158	*
1159	* If we considered it to be reused, don't to back to ring-3
1160	* to emulate failed instructions since we usually cannot
1161	* interpret then. This may be a bit risky, in which case
1162	* the reuse detection must be fixed.
1163	*/
1164	rc = pgmPoolAccessHandlerFlush(pVM, pPool, pPage, &Cpu, pRegFrame, GCPhysFault, pvFault);
1165	if (rc == VINF_EM_RAW_EMULATE_INSTR && fReused)
1166	rc = VINF_SUCCESS;
1167	STAM_PROFILE_STOP_EX(&pVM->pgm.s.CTX_SUFF(pPool)->CTX_SUFF_Z(StatMonitor), &pPool->CTX_MID_Z(StatMonitor,FlushPage), a);
1168	return rc;
1169	}
1170
1171	# endif /* !IN_RING3 */
1172	#endif /* PGMPOOL_WITH_MONITORING */
1173
1174	#ifdef PGMPOOL_WITH_CACHE
1175
1176	/**
1177	* Inserts a page into the GCPhys hash table.
1178	*
1179	* @param pPool The pool.
1180	* @param pPage The page.
1181	*/
1182	DECLINLINE(void) pgmPoolHashInsert(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
1183	{
1184	Log3(("pgmPoolHashInsert: %RGp\n", pPage->GCPhys));
1185	Assert(pPage->GCPhys != NIL_RTGCPHYS); Assert(pPage->iNext == NIL_PGMPOOL_IDX);
1186	uint16_t iHash = PGMPOOL_HASH(pPage->GCPhys);
1187	pPage->iNext = pPool->aiHash[iHash];
1188	pPool->aiHash[iHash] = pPage->idx;
1189	}
1190
1191
1192	/**
1193	* Removes a page from the GCPhys hash table.
1194	*
1195	* @param pPool The pool.
1196	* @param pPage The page.
1197	*/
1198	DECLINLINE(void) pgmPoolHashRemove(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
1199	{
1200	Log3(("pgmPoolHashRemove: %RGp\n", pPage->GCPhys));
1201	uint16_t iHash = PGMPOOL_HASH(pPage->GCPhys);
1202	if (pPool->aiHash[iHash] == pPage->idx)
1203	pPool->aiHash[iHash] = pPage->iNext;
1204	else
1205	{
1206	uint16_t iPrev = pPool->aiHash[iHash];
1207	for (;;)
1208	{
1209	const int16_t i = pPool->aPages[iPrev].iNext;
1210	if (i == pPage->idx)
1211	{
1212	pPool->aPages[iPrev].iNext = pPage->iNext;
1213	break;
1214	}
1215	if (i == NIL_PGMPOOL_IDX)
1216	{
1217	AssertReleaseMsgFailed(("GCPhys=%RGp idx=%#x\n", pPage->GCPhys, pPage->idx));
1218	break;
1219	}
1220	iPrev = i;
1221	}
1222	}
1223	pPage->iNext = NIL_PGMPOOL_IDX;
1224	}
1225
1226
1227	/**
1228	* Frees up one cache page.
1229	*
1230	* @returns VBox status code.
1231	* @retval VINF_SUCCESS on success.
1232	* @retval VERR_PGM_POOL_CLEARED if the deregistration of a physical handler will cause a light weight pool flush.
1233	* @param pPool The pool.
1234	* @param iUser The user index.
1235	*/
1236	static int pgmPoolCacheFreeOne(PPGMPOOL pPool, uint16_t iUser)
1237	{
1238	#ifndef IN_RC
1239	const PVM pVM = pPool->CTX_SUFF(pVM);
1240	#endif
1241	Assert(pPool->iAgeHead != pPool->iAgeTail); /* We shouldn't be here if there < 2 cached entries! */
1242	STAM_COUNTER_INC(&pPool->StatCacheFreeUpOne);
1243
1244	/*
1245	* Select one page from the tail of the age list.
1246	*/
1247	uint16_t iToFree = pPool->iAgeTail;
1248	if (iToFree == iUser)
1249	iToFree = pPool->aPages[iToFree].iAgePrev;
1250	/* This is the alternative to the SyncCR3 pgmPoolCacheUsed calls.
1251	if (pPool->aPages[iToFree].iUserHead != NIL_PGMPOOL_USER_INDEX)
1252	{
1253	uint16_t i = pPool->aPages[iToFree].iAgePrev;
1254	for (unsigned j = 0; j < 10 && i != NIL_PGMPOOL_USER_INDEX; j++, i = pPool->aPages[i].iAgePrev)
1255	{
1256	if (pPool->aPages[iToFree].iUserHead == NIL_PGMPOOL_USER_INDEX)
1257	continue;
1258	iToFree = i;
1259	break;
1260	}
1261	}
1262	*/
1263
1264	Assert(iToFree != iUser);
1265	AssertRelease(iToFree != NIL_PGMPOOL_IDX);
1266
1267	PPGMPOOLPAGE pPage = &pPool->aPages[iToFree];
1268
1269	/*
1270	* Reject any attempts at flushing the currently active shadow CR3 mapping
1271	*/
1272	if (pgmPoolIsPageLocked(&pPool->CTX_SUFF(pVM)->pgm.s, pPage))
1273	{
1274	/* Refresh the cr3 mapping by putting it at the head of the age list. */
1275	LogFlow(("pgmPoolCacheFreeOne refuse CR3 mapping\n"));
1276	pgmPoolCacheUsed(pPool, pPage);
1277	return pgmPoolCacheFreeOne(pPool, iUser);
1278	}
1279
1280	int rc = pgmPoolFlushPage(pPool, pPage);
1281	if (rc == VINF_SUCCESS)
1282	PGM_INVL_GUEST_TLBS(); /* see PT handler. */
1283	return rc;
1284	}
1285
1286
1287	/**
1288	* Checks if a kind mismatch is really a page being reused
1289	* or if it's just normal remappings.
1290	*
1291	* @returns true if reused and the cached page (enmKind1) should be flushed
1292	* @returns false if not reused.
1293	* @param enmKind1 The kind of the cached page.
1294	* @param enmKind2 The kind of the requested page.
1295	*/
1296	static bool pgmPoolCacheReusedByKind(PGMPOOLKIND enmKind1, PGMPOOLKIND enmKind2)
1297	{
1298	switch (enmKind1)
1299	{
1300	/*
1301	* Never reuse them. There is no remapping in non-paging mode.
1302	*/
1303	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
1304	case PGMPOOLKIND_32BIT_PD_PHYS:
1305	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
1306	case PGMPOOLKIND_PAE_PD_PHYS:
1307	case PGMPOOLKIND_PAE_PDPT_PHYS:
1308	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
1309	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
1310	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
1311	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
1312	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
1313	case PGMPOOLKIND_PAE_PDPT_FOR_32BIT: /* never reuse them for other types */
1314	return false;
1315
1316	/*
1317	* It's perfectly fine to reuse these, except for PAE and non-paging stuff.
1318	*/
1319	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
1320	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
1321	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
1322	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
1323	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
1324	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
1325	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
1326	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
1327	case PGMPOOLKIND_32BIT_PD:
1328	case PGMPOOLKIND_PAE_PDPT:
1329	switch (enmKind2)
1330	{
1331	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
1332	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
1333	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
1334	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
1335	case PGMPOOLKIND_64BIT_PML4:
1336	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
1337	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
1338	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
1339	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
1340	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
1341	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
1342	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
1343	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
1344	return true;
1345	default:
1346	return false;
1347	}
1348
1349	/*
1350	* It's perfectly fine to reuse these, except for PAE and non-paging stuff.
1351	*/
1352	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
1353	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
1354	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
1355	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
1356	case PGMPOOLKIND_64BIT_PML4:
1357	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
1358	switch (enmKind2)
1359	{
1360	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
1361	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
1362	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
1363	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
1364	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
1365	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
1366	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
1367	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
1368	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
1369	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
1370	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
1371	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
1372	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
1373	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
1374	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
1375	return true;
1376	default:
1377	return false;
1378	}
1379
1380	/*
1381	* These cannot be flushed, and it's common to reuse the PDs as PTs.
1382	*/
1383	case PGMPOOLKIND_ROOT_NESTED:
1384	return false;
1385
1386	default:
1387	AssertFatalMsgFailed(("enmKind1=%d\n", enmKind1));
1388	}
1389	}
1390
1391
1392	/**
1393	* Attempts to satisfy a pgmPoolAlloc request from the cache.
1394	*
1395	* @returns VBox status code.
1396	* @retval VINF_PGM_CACHED_PAGE on success.
1397	* @retval VERR_FILE_NOT_FOUND if not found.
1398	* @param pPool The pool.
1399	* @param GCPhys The GC physical address of the page we're gonna shadow.
1400	* @param enmKind The kind of mapping.
1401	* @param iUser The shadow page pool index of the user table.
1402	* @param iUserTable The index into the user table (shadowed).
1403	* @param ppPage Where to store the pointer to the page.
1404	*/
1405	static int pgmPoolCacheAlloc(PPGMPOOL pPool, RTGCPHYS GCPhys, PGMPOOLKIND enmKind, uint16_t iUser, uint32_t iUserTable, PPPGMPOOLPAGE ppPage)
1406	{
1407	#ifndef IN_RC
1408	const PVM pVM = pPool->CTX_SUFF(pVM);
1409	#endif
1410	/*
1411	* Look up the GCPhys in the hash.
1412	*/
1413	unsigned i = pPool->aiHash[PGMPOOL_HASH(GCPhys)];
1414	Log3(("pgmPoolCacheAlloc: %RGp kind %s iUser=%x iUserTable=%x SLOT=%d\n", GCPhys, pgmPoolPoolKindToStr(enmKind), iUser, iUserTable, i));
1415	if (i != NIL_PGMPOOL_IDX)
1416	{
1417	do
1418	{
1419	PPGMPOOLPAGE pPage = &pPool->aPages[i];
1420	Log4(("pgmPoolCacheAlloc: slot %d found page %RGp\n", i, pPage->GCPhys));
1421	if (pPage->GCPhys == GCPhys)
1422	{
1423	if ((PGMPOOLKIND)pPage->enmKind == enmKind)
1424	{
1425	/* Put it at the start of the use list to make sure pgmPoolTrackAddUser
1426	* doesn't flush it in case there are no more free use records.
1427	*/
1428	pgmPoolCacheUsed(pPool, pPage);
1429
1430	int rc = pgmPoolTrackAddUser(pPool, pPage, iUser, iUserTable);
1431	if (RT_SUCCESS(rc))
1432	{
1433	Assert((PGMPOOLKIND)pPage->enmKind == enmKind);
1434	*ppPage = pPage;
1435	STAM_COUNTER_INC(&pPool->StatCacheHits);
1436	return VINF_PGM_CACHED_PAGE;
1437	}
1438	return rc;
1439	}
1440
1441	/*
1442	* The kind is different. In some cases we should now flush the page
1443	* as it has been reused, but in most cases this is normal remapping
1444	* of PDs as PT or big pages using the GCPhys field in a slightly
1445	* different way than the other kinds.
1446	*/
1447	if (pgmPoolCacheReusedByKind((PGMPOOLKIND)pPage->enmKind, enmKind))
1448	{
1449	STAM_COUNTER_INC(&pPool->StatCacheKindMismatches);
1450	pgmPoolFlushPage(pPool, pPage); /* ASSUMES that VERR_PGM_POOL_CLEARED will be returned by pgmPoolTracInsert. */
1451	PGM_INVL_GUEST_TLBS(); /* see PT handler. */
1452	break;
1453	}
1454	}
1455
1456	/* next */
1457	i = pPage->iNext;
1458	} while (i != NIL_PGMPOOL_IDX);
1459	}
1460
1461	Log3(("pgmPoolCacheAlloc: Missed GCPhys=%RGp enmKind=%s\n", GCPhys, pgmPoolPoolKindToStr(enmKind)));
1462	STAM_COUNTER_INC(&pPool->StatCacheMisses);
1463	return VERR_FILE_NOT_FOUND;
1464	}
1465
1466
1467	/**
1468	* Inserts a page into the cache.
1469	*
1470	* @param pPool The pool.
1471	* @param pPage The cached page.
1472	* @param fCanBeCached Set if the page is fit for caching from the caller's point of view.
1473	*/
1474	static void pgmPoolCacheInsert(PPGMPOOL pPool, PPGMPOOLPAGE pPage, bool fCanBeCached)
1475	{
1476	/*
1477	* Insert into the GCPhys hash if the page is fit for that.
1478	*/
1479	Assert(!pPage->fCached);
1480	if (fCanBeCached)
1481	{
1482	pPage->fCached = true;
1483	pgmPoolHashInsert(pPool, pPage);
1484	Log3(("pgmPoolCacheInsert: Caching %p:{.Core=%RHp, .idx=%d, .enmKind=%s, GCPhys=%RGp}\n",
1485	pPage, pPage->Core.Key, pPage->idx, pgmPoolPoolKindToStr(pPage->enmKind), pPage->GCPhys));
1486	STAM_COUNTER_INC(&pPool->StatCacheCacheable);
1487	}
1488	else
1489	{
1490	Log3(("pgmPoolCacheInsert: Not caching %p:{.Core=%RHp, .idx=%d, .enmKind=%s, GCPhys=%RGp}\n",
1491	pPage, pPage->Core.Key, pPage->idx, pgmPoolPoolKindToStr(pPage->enmKind), pPage->GCPhys));
1492	STAM_COUNTER_INC(&pPool->StatCacheUncacheable);
1493	}
1494
1495	/*
1496	* Insert at the head of the age list.
1497	*/
1498	pPage->iAgePrev = NIL_PGMPOOL_IDX;
1499	pPage->iAgeNext = pPool->iAgeHead;
1500	if (pPool->iAgeHead != NIL_PGMPOOL_IDX)
1501	pPool->aPages[pPool->iAgeHead].iAgePrev = pPage->idx;
1502	else
1503	pPool->iAgeTail = pPage->idx;
1504	pPool->iAgeHead = pPage->idx;
1505	}
1506
1507
1508	/**
1509	* Flushes a cached page.
1510	*
1511	* @param pPool The pool.
1512	* @param pPage The cached page.
1513	*/
1514	static void pgmPoolCacheFlushPage(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
1515	{
1516	Log3(("pgmPoolCacheFlushPage: %RGp\n", pPage->GCPhys));
1517
1518	/*
1519	* Remove the page from the hash.
1520	*/
1521	if (pPage->fCached)
1522	{
1523	pPage->fCached = false;
1524	pgmPoolHashRemove(pPool, pPage);
1525	}
1526	else
1527	Assert(pPage->iNext == NIL_PGMPOOL_IDX);
1528
1529	/*
1530	* Remove it from the age list.
1531	*/
1532	if (pPage->iAgeNext != NIL_PGMPOOL_IDX)
1533	pPool->aPages[pPage->iAgeNext].iAgePrev = pPage->iAgePrev;
1534	else
1535	pPool->iAgeTail = pPage->iAgePrev;
1536	if (pPage->iAgePrev != NIL_PGMPOOL_IDX)
1537	pPool->aPages[pPage->iAgePrev].iAgeNext = pPage->iAgeNext;
1538	else
1539	pPool->iAgeHead = pPage->iAgeNext;
1540	pPage->iAgeNext = NIL_PGMPOOL_IDX;
1541	pPage->iAgePrev = NIL_PGMPOOL_IDX;
1542	}
1543
1544	#endif /* PGMPOOL_WITH_CACHE */
1545	#ifdef PGMPOOL_WITH_MONITORING
1546
1547	/**
1548	* Looks for pages sharing the monitor.
1549	*
1550	* @returns Pointer to the head page.
1551	* @returns NULL if not found.
1552	* @param pPool The Pool
1553	* @param pNewPage The page which is going to be monitored.
1554	*/
1555	static PPGMPOOLPAGE pgmPoolMonitorGetPageByGCPhys(PPGMPOOL pPool, PPGMPOOLPAGE pNewPage)
1556	{
1557	#ifdef PGMPOOL_WITH_CACHE
1558	/*
1559	* Look up the GCPhys in the hash.
1560	*/
1561	RTGCPHYS GCPhys = pNewPage->GCPhys & ~(RTGCPHYS)(PAGE_SIZE - 1);
1562	unsigned i = pPool->aiHash[PGMPOOL_HASH(GCPhys)];
1563	if (i == NIL_PGMPOOL_IDX)
1564	return NULL;
1565	do
1566	{
1567	PPGMPOOLPAGE pPage = &pPool->aPages[i];
1568	if ( pPage->GCPhys - GCPhys < PAGE_SIZE
1569	&& pPage != pNewPage)
1570	{
1571	switch (pPage->enmKind)
1572	{
1573	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
1574	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
1575	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
1576	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
1577	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
1578	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
1579	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
1580	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
1581	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
1582	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
1583	case PGMPOOLKIND_64BIT_PML4:
1584	case PGMPOOLKIND_32BIT_PD:
1585	case PGMPOOLKIND_PAE_PDPT:
1586	{
1587	/* find the head */
1588	while (pPage->iMonitoredPrev != NIL_PGMPOOL_IDX)
1589	{
1590	Assert(pPage->iMonitoredPrev != pPage->idx);
1591	pPage = &pPool->aPages[pPage->iMonitoredPrev];
1592	}
1593	return pPage;
1594	}
1595
1596	/* ignore, no monitoring. */
1597	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
1598	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
1599	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
1600	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
1601	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
1602	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
1603	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
1604	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
1605	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
1606	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
1607	case PGMPOOLKIND_ROOT_NESTED:
1608	case PGMPOOLKIND_PAE_PD_PHYS:
1609	case PGMPOOLKIND_PAE_PDPT_PHYS:
1610	case PGMPOOLKIND_32BIT_PD_PHYS:
1611	case PGMPOOLKIND_PAE_PDPT_FOR_32BIT:
1612	break;
1613	default:
1614	AssertFatalMsgFailed(("enmKind=%d idx=%d\n", pPage->enmKind, pPage->idx));
1615	}
1616	}
1617
1618	/* next */
1619	i = pPage->iNext;
1620	} while (i != NIL_PGMPOOL_IDX);
1621	#endif
1622	return NULL;
1623	}
1624
1625
1626	/**
1627	* Enabled write monitoring of a guest page.
1628	*
1629	* @returns VBox status code.
1630	* @retval VINF_SUCCESS on success.
1631	* @retval VERR_PGM_POOL_CLEARED if the registration of the physical handler will cause a light weight pool flush.
1632	* @param pPool The pool.
1633	* @param pPage The cached page.
1634	*/
1635	static int pgmPoolMonitorInsert(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
1636	{
1637	LogFlow(("pgmPoolMonitorInsert %RGp\n", pPage->GCPhys & ~(RTGCPHYS)(PAGE_SIZE - 1)));
1638
1639	/*
1640	* Filter out the relevant kinds.
1641	*/
1642	switch (pPage->enmKind)
1643	{
1644	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
1645	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
1646	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
1647	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
1648	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
1649	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
1650	case PGMPOOLKIND_64BIT_PML4:
1651	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
1652	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
1653	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
1654	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
1655	case PGMPOOLKIND_32BIT_PD:
1656	case PGMPOOLKIND_PAE_PDPT:
1657	break;
1658
1659	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
1660	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
1661	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
1662	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
1663	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
1664	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
1665	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
1666	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
1667	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
1668	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
1669	case PGMPOOLKIND_ROOT_NESTED:
1670	/* Nothing to monitor here. */
1671	return VINF_SUCCESS;
1672
1673	case PGMPOOLKIND_32BIT_PD_PHYS:
1674	case PGMPOOLKIND_PAE_PDPT_PHYS:
1675	case PGMPOOLKIND_PAE_PD_PHYS:
1676	case PGMPOOLKIND_PAE_PDPT_FOR_32BIT:
1677	/* Nothing to monitor here. */
1678	return VINF_SUCCESS;
1679	#ifdef PGMPOOL_WITH_MIXED_PT_CR3
1680	break;
1681	#else
1682	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
1683	#endif
1684	default:
1685	AssertFatalMsgFailed(("This can't happen! enmKind=%d\n", pPage->enmKind));
1686	}
1687
1688	/*
1689	* Install handler.
1690	*/
1691	int rc;
1692	PPGMPOOLPAGE pPageHead = pgmPoolMonitorGetPageByGCPhys(pPool, pPage);
1693	if (pPageHead)
1694	{
1695	Assert(pPageHead != pPage); Assert(pPageHead->iMonitoredNext != pPage->idx);
1696	Assert(pPageHead->iMonitoredPrev != pPage->idx);
1697	pPage->iMonitoredPrev = pPageHead->idx;
1698	pPage->iMonitoredNext = pPageHead->iMonitoredNext;
1699	if (pPageHead->iMonitoredNext != NIL_PGMPOOL_IDX)
1700	pPool->aPages[pPageHead->iMonitoredNext].iMonitoredPrev = pPage->idx;
1701	pPageHead->iMonitoredNext = pPage->idx;
1702	rc = VINF_SUCCESS;
1703	}
1704	else
1705	{
1706	Assert(pPage->iMonitoredNext == NIL_PGMPOOL_IDX); Assert(pPage->iMonitoredPrev == NIL_PGMPOOL_IDX);
1707	PVM pVM = pPool->CTX_SUFF(pVM);
1708	const RTGCPHYS GCPhysPage = pPage->GCPhys & ~(RTGCPHYS)(PAGE_SIZE - 1);
1709	rc = PGMHandlerPhysicalRegisterEx(pVM, PGMPHYSHANDLERTYPE_PHYSICAL_WRITE,
1710	GCPhysPage, GCPhysPage + (PAGE_SIZE - 1),
1711	pPool->pfnAccessHandlerR3, MMHyperCCToR3(pVM, pPage),
1712	pPool->pfnAccessHandlerR0, MMHyperCCToR0(pVM, pPage),
1713	pPool->pfnAccessHandlerRC, MMHyperCCToRC(pVM, pPage),
1714	pPool->pszAccessHandler);
1715	/** @todo we should probably deal with out-of-memory conditions here, but for now increasing
1716	* the heap size should suffice. */
1717	AssertFatalRC(rc);
1718	if (pVM->pgm.s.fSyncFlags & PGM_SYNC_CLEAR_PGM_POOL)
1719	rc = VERR_PGM_POOL_CLEARED;
1720	}
1721	pPage->fMonitored = true;
1722	return rc;
1723	}
1724
1725
1726	/**
1727	* Disables write monitoring of a guest page.
1728	*
1729	* @returns VBox status code.
1730	* @retval VINF_SUCCESS on success.
1731	* @retval VERR_PGM_POOL_CLEARED if the deregistration of the physical handler will cause a light weight pool flush.
1732	* @param pPool The pool.
1733	* @param pPage The cached page.
1734	*/
1735	static int pgmPoolMonitorFlush(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
1736	{
1737	/*
1738	* Filter out the relevant kinds.
1739	*/
1740	switch (pPage->enmKind)
1741	{
1742	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
1743	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
1744	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
1745	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
1746	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
1747	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
1748	case PGMPOOLKIND_64BIT_PML4:
1749	case PGMPOOLKIND_32BIT_PD:
1750	case PGMPOOLKIND_PAE_PDPT:
1751	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
1752	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
1753	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
1754	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
1755	break;
1756
1757	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
1758	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
1759	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
1760	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
1761	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
1762	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
1763	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
1764	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
1765	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
1766	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
1767	case PGMPOOLKIND_ROOT_NESTED:
1768	case PGMPOOLKIND_PAE_PD_PHYS:
1769	case PGMPOOLKIND_PAE_PDPT_PHYS:
1770	case PGMPOOLKIND_32BIT_PD_PHYS:
1771	/* Nothing to monitor here. */
1772	return VINF_SUCCESS;
1773
1774	#ifdef PGMPOOL_WITH_MIXED_PT_CR3
1775	break;
1776	#endif
1777	default:
1778	AssertFatalMsgFailed(("This can't happen! enmKind=%d\n", pPage->enmKind));
1779	}
1780
1781	/*
1782	* Remove the page from the monitored list or uninstall it if last.
1783	*/
1784	const PVM pVM = pPool->CTX_SUFF(pVM);
1785	int rc;
1786	if ( pPage->iMonitoredNext != NIL_PGMPOOL_IDX
1787	\|\| pPage->iMonitoredPrev != NIL_PGMPOOL_IDX)
1788	{
1789	if (pPage->iMonitoredPrev == NIL_PGMPOOL_IDX)
1790	{
1791	PPGMPOOLPAGE pNewHead = &pPool->aPages[pPage->iMonitoredNext];
1792	pNewHead->iMonitoredPrev = NIL_PGMPOOL_IDX;
1793	rc = PGMHandlerPhysicalChangeCallbacks(pVM, pPage->GCPhys & ~(RTGCPHYS)(PAGE_SIZE - 1),
1794	pPool->pfnAccessHandlerR3, MMHyperCCToR3(pVM, pNewHead),
1795	pPool->pfnAccessHandlerR0, MMHyperCCToR0(pVM, pNewHead),
1796	pPool->pfnAccessHandlerRC, MMHyperCCToRC(pVM, pNewHead),
1797	pPool->pszAccessHandler);
1798	AssertFatalRCSuccess(rc);
1799	pPage->iMonitoredNext = NIL_PGMPOOL_IDX;
1800	}
1801	else
1802	{
1803	pPool->aPages[pPage->iMonitoredPrev].iMonitoredNext = pPage->iMonitoredNext;
1804	if (pPage->iMonitoredNext != NIL_PGMPOOL_IDX)
1805	{
1806	pPool->aPages[pPage->iMonitoredNext].iMonitoredPrev = pPage->iMonitoredPrev;
1807	pPage->iMonitoredNext = NIL_PGMPOOL_IDX;
1808	}
1809	pPage->iMonitoredPrev = NIL_PGMPOOL_IDX;
1810	rc = VINF_SUCCESS;
1811	}
1812	}
1813	else
1814	{
1815	rc = PGMHandlerPhysicalDeregister(pVM, pPage->GCPhys & ~(RTGCPHYS)(PAGE_SIZE - 1));
1816	AssertFatalRC(rc);
1817	if (pVM->pgm.s.fSyncFlags & PGM_SYNC_CLEAR_PGM_POOL)
1818	rc = VERR_PGM_POOL_CLEARED;
1819	}
1820	pPage->fMonitored = false;
1821
1822	/*
1823	* Remove it from the list of modified pages (if in it).
1824	*/
1825	pgmPoolMonitorModifiedRemove(pPool, pPage);
1826
1827	return rc;
1828	}
1829
1830
1831	/**
1832	* Inserts the page into the list of modified pages.
1833	*
1834	* @param pPool The pool.
1835	* @param pPage The page.
1836	*/
1837	void pgmPoolMonitorModifiedInsert(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
1838	{
1839	Log3(("pgmPoolMonitorModifiedInsert: idx=%d\n", pPage->idx));
1840	AssertMsg( pPage->iModifiedNext == NIL_PGMPOOL_IDX
1841	&& pPage->iModifiedPrev == NIL_PGMPOOL_IDX
1842	&& pPool->iModifiedHead != pPage->idx,
1843	("Next=%d Prev=%d idx=%d cModifications=%d Head=%d cModifiedPages=%d\n",
1844	pPage->iModifiedNext, pPage->iModifiedPrev, pPage->idx, pPage->cModifications,
1845	pPool->iModifiedHead, pPool->cModifiedPages));
1846
1847	pPage->iModifiedNext = pPool->iModifiedHead;
1848	if (pPool->iModifiedHead != NIL_PGMPOOL_IDX)
1849	pPool->aPages[pPool->iModifiedHead].iModifiedPrev = pPage->idx;
1850	pPool->iModifiedHead = pPage->idx;
1851	pPool->cModifiedPages++;
1852	#ifdef VBOX_WITH_STATISTICS
1853	if (pPool->cModifiedPages > pPool->cModifiedPagesHigh)
1854	pPool->cModifiedPagesHigh = pPool->cModifiedPages;
1855	#endif
1856	}
1857
1858
1859	/**
1860	* Removes the page from the list of modified pages and resets the
1861	* moficiation counter.
1862	*
1863	* @param pPool The pool.
1864	* @param pPage The page which is believed to be in the list of modified pages.
1865	*/
1866	static void pgmPoolMonitorModifiedRemove(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
1867	{
1868	Log3(("pgmPoolMonitorModifiedRemove: idx=%d cModifications=%d\n", pPage->idx, pPage->cModifications));
1869	if (pPool->iModifiedHead == pPage->idx)
1870	{
1871	Assert(pPage->iModifiedPrev == NIL_PGMPOOL_IDX);
1872	pPool->iModifiedHead = pPage->iModifiedNext;
1873	if (pPage->iModifiedNext != NIL_PGMPOOL_IDX)
1874	{
1875	pPool->aPages[pPage->iModifiedNext].iModifiedPrev = NIL_PGMPOOL_IDX;
1876	pPage->iModifiedNext = NIL_PGMPOOL_IDX;
1877	}
1878	pPool->cModifiedPages--;
1879	}
1880	else if (pPage->iModifiedPrev != NIL_PGMPOOL_IDX)
1881	{
1882	pPool->aPages[pPage->iModifiedPrev].iModifiedNext = pPage->iModifiedNext;
1883	if (pPage->iModifiedNext != NIL_PGMPOOL_IDX)
1884	{
1885	pPool->aPages[pPage->iModifiedNext].iModifiedPrev = pPage->iModifiedPrev;
1886	pPage->iModifiedNext = NIL_PGMPOOL_IDX;
1887	}
1888	pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
1889	pPool->cModifiedPages--;
1890	}
1891	else
1892	Assert(pPage->iModifiedPrev == NIL_PGMPOOL_IDX);
1893	pPage->cModifications = 0;
1894	}
1895
1896
1897	/**
1898	* Zaps the list of modified pages, resetting their modification counters in the process.
1899	*
1900	* @param pVM The VM handle.
1901	*/
1902	void pgmPoolMonitorModifiedClearAll(PVM pVM)
1903	{
1904	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
1905	LogFlow(("pgmPoolMonitorModifiedClearAll: cModifiedPages=%d\n", pPool->cModifiedPages));
1906
1907	unsigned cPages = 0; NOREF(cPages);
1908	uint16_t idx = pPool->iModifiedHead;
1909	pPool->iModifiedHead = NIL_PGMPOOL_IDX;
1910	while (idx != NIL_PGMPOOL_IDX)
1911	{
1912	PPGMPOOLPAGE pPage = &pPool->aPages[idx];
1913	idx = pPage->iModifiedNext;
1914	pPage->iModifiedNext = NIL_PGMPOOL_IDX;
1915	pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
1916	pPage->cModifications = 0;
1917	Assert(++cPages);
1918	}
1919	AssertMsg(cPages == pPool->cModifiedPages, ("%d != %d\n", cPages, pPool->cModifiedPages));
1920	pPool->cModifiedPages = 0;
1921	}
1922
1923
1924	#ifdef IN_RING3
1925	/**
1926	* Clear all shadow pages and clear all modification counters.
1927	*
1928	* @param pVM The VM handle.
1929	* @remark Should only be used when monitoring is available, thus placed in
1930	* the PGMPOOL_WITH_MONITORING #ifdef.
1931	*/
1932	void pgmPoolClearAll(PVM pVM)
1933	{
1934	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
1935	STAM_PROFILE_START(&pPool->StatClearAll, c);
1936	LogFlow(("pgmPoolClearAll: cUsedPages=%d\n", pPool->cUsedPages));
1937
1938	/*
1939	* Iterate all the pages until we've encountered all that in use.
1940	* This is simple but not quite optimal solution.
1941	*/
1942	unsigned cModifiedPages = 0; NOREF(cModifiedPages);
1943	unsigned cLeft = pPool->cUsedPages;
1944	unsigned iPage = pPool->cCurPages;
1945	while (--iPage >= PGMPOOL_IDX_FIRST)
1946	{
1947	PPGMPOOLPAGE pPage = &pPool->aPages[iPage];
1948	if (pPage->GCPhys != NIL_RTGCPHYS)
1949	{
1950	switch (pPage->enmKind)
1951	{
1952	/*
1953	* We only care about shadow page tables.
1954	*/
1955	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
1956	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
1957	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
1958	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
1959	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
1960	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
1961	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
1962	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
1963	{
1964	#ifdef PGMPOOL_WITH_USER_TRACKING
1965	if (pPage->cPresent)
1966	#endif
1967	{
1968	void *pvShw = PGMPOOL_PAGE_2_PTR(pPool->CTX_SUFF(pVM), pPage);
1969	STAM_PROFILE_START(&pPool->StatZeroPage, z);
1970	ASMMemZeroPage(pvShw);
1971	STAM_PROFILE_STOP(&pPool->StatZeroPage, z);
1972	#ifdef PGMPOOL_WITH_USER_TRACKING
1973	pPage->cPresent = 0;
1974	pPage->iFirstPresent = ~0;
1975	#endif
1976	}
1977	}
1978	/* fall thru */
1979
1980	default:
1981	Assert(!pPage->cModifications \|\| ++cModifiedPages);
1982	Assert(pPage->iModifiedNext == NIL_PGMPOOL_IDX \|\| pPage->cModifications);
1983	Assert(pPage->iModifiedPrev == NIL_PGMPOOL_IDX \|\| pPage->cModifications);
1984	pPage->iModifiedNext = NIL_PGMPOOL_IDX;
1985	pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
1986	pPage->cModifications = 0;
1987	break;
1988
1989	}
1990	if (!--cLeft)
1991	break;
1992	}
1993	}
1994
1995	/* swipe the special pages too. */
1996	for (iPage = PGMPOOL_IDX_FIRST_SPECIAL; iPage < PGMPOOL_IDX_FIRST; iPage++)
1997	{
1998	PPGMPOOLPAGE pPage = &pPool->aPages[iPage];
1999	if (pPage->GCPhys != NIL_RTGCPHYS)
2000	{
2001	Assert(!pPage->cModifications \|\| ++cModifiedPages);
2002	Assert(pPage->iModifiedNext == NIL_PGMPOOL_IDX \|\| pPage->cModifications);
2003	Assert(pPage->iModifiedPrev == NIL_PGMPOOL_IDX \|\| pPage->cModifications);
2004	pPage->iModifiedNext = NIL_PGMPOOL_IDX;
2005	pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
2006	pPage->cModifications = 0;
2007	}
2008	}
2009
2010	#ifndef DEBUG_michael
2011	AssertMsg(cModifiedPages == pPool->cModifiedPages, ("%d != %d\n", cModifiedPages, pPool->cModifiedPages));
2012	#endif
2013	pPool->iModifiedHead = NIL_PGMPOOL_IDX;
2014	pPool->cModifiedPages = 0;
2015
2016	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
2017	/*
2018	* Clear all the GCPhys links and rebuild the phys ext free list.
2019	*/
2020	for (PPGMRAMRANGE pRam = pPool->CTX_SUFF(pVM)->pgm.s.CTX_SUFF(pRamRanges);
2021	pRam;
2022	pRam = pRam->CTX_SUFF(pNext))
2023	{
2024	unsigned iPage = pRam->cb >> PAGE_SHIFT;
2025	while (iPage-- > 0)
2026	PGM_PAGE_SET_TRACKING(&pRam->aPages[iPage], 0);
2027	}
2028
2029	pPool->iPhysExtFreeHead = 0;
2030	PPGMPOOLPHYSEXT paPhysExts = pPool->CTX_SUFF(paPhysExts);
2031	const unsigned cMaxPhysExts = pPool->cMaxPhysExts;
2032	for (unsigned i = 0; i < cMaxPhysExts; i++)
2033	{
2034	paPhysExts[i].iNext = i + 1;
2035	paPhysExts[i].aidx[0] = NIL_PGMPOOL_IDX;
2036	paPhysExts[i].aidx[1] = NIL_PGMPOOL_IDX;
2037	paPhysExts[i].aidx[2] = NIL_PGMPOOL_IDX;
2038	}
2039	paPhysExts[cMaxPhysExts - 1].iNext = NIL_PGMPOOL_PHYSEXT_INDEX;
2040	#endif
2041
2042
2043	pPool->cPresent = 0;
2044	STAM_PROFILE_STOP(&pPool->StatClearAll, c);
2045	}
2046	#endif /* IN_RING3 */
2047
2048
2049	/**
2050	* Handle SyncCR3 pool tasks
2051	*
2052	* @returns VBox status code.
2053	* @retval VINF_SUCCESS if successfully added.
2054	* @retval VINF_PGM_SYNC_CR3 is it needs to be deferred to ring 3 (GC only)
2055	* @param pVM The VM handle.
2056	* @remark Should only be used when monitoring is available, thus placed in
2057	* the PGMPOOL_WITH_MONITORING #ifdef.
2058	*/
2059	int pgmPoolSyncCR3(PVM pVM)
2060	{
2061	LogFlow(("pgmPoolSyncCR3\n"));
2062	/*
2063	* When monitoring shadowed pages, we reset the modification counters on CR3 sync.
2064	* Occasionally we will have to clear all the shadow page tables because we wanted
2065	* to monitor a page which was mapped by too many shadowed page tables. This operation
2066	* sometimes refered to as a 'lightweight flush'.
2067	*/
2068	if (!(pVM->pgm.s.fSyncFlags & PGM_SYNC_CLEAR_PGM_POOL))
2069	pgmPoolMonitorModifiedClearAll(pVM);
2070	else
2071	{
2072	# ifdef IN_RING3 /* Don't flush in ring-0 or raw mode, it's taking too long. */
2073	pVM->pgm.s.fSyncFlags &= ~PGM_SYNC_CLEAR_PGM_POOL;
2074	pgmPoolClearAll(pVM);
2075	# else /* !IN_RING3 */
2076	LogFlow(("SyncCR3: PGM_SYNC_CLEAR_PGM_POOL is set -> VINF_PGM_SYNC_CR3\n"));
2077	VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3); /** @todo no need to do global sync, right? */
2078	return VINF_PGM_SYNC_CR3;
2079	# endif /* !IN_RING3 */
2080	}
2081	return VINF_SUCCESS;
2082	}
2083
2084	#endif /* PGMPOOL_WITH_MONITORING */
2085	#ifdef PGMPOOL_WITH_USER_TRACKING
2086
2087	/**
2088	* Frees up at least one user entry.
2089	*
2090	* @returns VBox status code.
2091	* @retval VINF_SUCCESS if successfully added.
2092	* @retval VERR_PGM_POOL_FLUSHED if the pool was flushed.
2093	* @param pPool The pool.
2094	* @param iUser The user index.
2095	*/
2096	static int pgmPoolTrackFreeOneUser(PPGMPOOL pPool, uint16_t iUser)
2097	{
2098	STAM_COUNTER_INC(&pPool->StatTrackFreeUpOneUser);
2099	#ifdef PGMPOOL_WITH_CACHE
2100	/*
2101	* Just free cached pages in a braindead fashion.
2102	*/
2103	/** @todo walk the age list backwards and free the first with usage. */
2104	int rc = VINF_SUCCESS;
2105	do
2106	{
2107	int rc2 = pgmPoolCacheFreeOne(pPool, iUser);
2108	if (RT_FAILURE(rc2) && rc == VINF_SUCCESS)
2109	rc = rc2;
2110	} while (pPool->iUserFreeHead == NIL_PGMPOOL_USER_INDEX);
2111	return rc;
2112	#else
2113	/*
2114	* Lazy approach.
2115	*/
2116	/* @todo incompatible with long mode paging (cr3 root will be flushed) */
2117	Assert(!CPUMIsGuestInLongMode(pVM));
2118	pgmPoolFlushAllInt(pPool);
2119	return VERR_PGM_POOL_FLUSHED;
2120	#endif
2121	}
2122
2123
2124	/**
2125	* Inserts a page into the cache.
2126	*
2127	* This will create user node for the page, insert it into the GCPhys
2128	* hash, and insert it into the age list.
2129	*
2130	* @returns VBox status code.
2131	* @retval VINF_SUCCESS if successfully added.
2132	* @retval VERR_PGM_POOL_FLUSHED if the pool was flushed.
2133	* @retval VERR_PGM_POOL_CLEARED if the deregistration of the physical handler will cause a light weight pool flush.
2134	* @param pPool The pool.
2135	* @param pPage The cached page.
2136	* @param GCPhys The GC physical address of the page we're gonna shadow.
2137	* @param iUser The user index.
2138	* @param iUserTable The user table index.
2139	*/
2140	DECLINLINE(int) pgmPoolTrackInsert(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTGCPHYS GCPhys, uint16_t iUser, uint32_t iUserTable)
2141	{
2142	int rc = VINF_SUCCESS;
2143	PPGMPOOLUSER paUsers = pPool->CTX_SUFF(paUsers);
2144
2145	LogFlow(("pgmPoolTrackInsert GCPhys=%RGp iUser %x iUserTable %x\n", GCPhys, iUser, iUserTable));
2146
2147	#ifdef VBOX_STRICT
2148	/*
2149	* Check that the entry doesn't already exists.
2150	*/
2151	if (pPage->iUserHead != NIL_PGMPOOL_USER_INDEX)
2152	{
2153	uint16_t i = pPage->iUserHead;
2154	do
2155	{
2156	Assert(i < pPool->cMaxUsers);
2157	AssertMsg(paUsers[i].iUser != iUser \|\| paUsers[i].iUserTable != iUserTable, ("%x %x vs new %x %x\n", paUsers[i].iUser, paUsers[i].iUserTable, iUser, iUserTable));
2158	i = paUsers[i].iNext;
2159	} while (i != NIL_PGMPOOL_USER_INDEX);
2160	}
2161	#endif
2162
2163	/*
2164	* Find free a user node.
2165	*/
2166	uint16_t i = pPool->iUserFreeHead;
2167	if (i == NIL_PGMPOOL_USER_INDEX)
2168	{
2169	int rc = pgmPoolTrackFreeOneUser(pPool, iUser);
2170	if (RT_FAILURE(rc))
2171	return rc;
2172	i = pPool->iUserFreeHead;
2173	}
2174
2175	/*
2176	* Unlink the user node from the free list,
2177	* initialize and insert it into the user list.
2178	*/
2179	pPool->iUserFreeHead = paUsers[i].iNext;
2180	paUsers[i].iNext = NIL_PGMPOOL_USER_INDEX;
2181	paUsers[i].iUser = iUser;
2182	paUsers[i].iUserTable = iUserTable;
2183	pPage->iUserHead = i;
2184
2185	/*
2186	* Insert into cache and enable monitoring of the guest page if enabled.
2187	*
2188	* Until we implement caching of all levels, including the CR3 one, we'll
2189	* have to make sure we don't try monitor & cache any recursive reuse of
2190	* a monitored CR3 page. Because all windows versions are doing this we'll
2191	* have to be able to do combined access monitoring, CR3 + PT and
2192	* PD + PT (guest PAE).
2193	*
2194	* Update:
2195	* We're now cooperating with the CR3 monitor if an uncachable page is found.
2196	*/
2197	#if defined(PGMPOOL_WITH_MONITORING) \|\| defined(PGMPOOL_WITH_CACHE)
2198	# ifdef PGMPOOL_WITH_MIXED_PT_CR3
2199	const bool fCanBeMonitored = true;
2200	# else
2201	bool fCanBeMonitored = pPool->CTX_SUFF(pVM)->pgm.s.GCPhysGstCR3Monitored == NIL_RTGCPHYS
2202	\|\| (GCPhys & X86_PTE_PAE_PG_MASK) != (pPool->CTX_SUFF(pVM)->pgm.s.GCPhysGstCR3Monitored & X86_PTE_PAE_PG_MASK)
2203	\|\| pgmPoolIsBigPage((PGMPOOLKIND)pPage->enmKind);
2204	# endif
2205	# ifdef PGMPOOL_WITH_CACHE
2206	pgmPoolCacheInsert(pPool, pPage, fCanBeMonitored); /* This can be expanded. */
2207	# endif
2208	if (fCanBeMonitored)
2209	{
2210	# ifdef PGMPOOL_WITH_MONITORING
2211	rc = pgmPoolMonitorInsert(pPool, pPage);
2212	if (rc == VERR_PGM_POOL_CLEARED)
2213	{
2214	/* 'Failed' - free the usage, and keep it in the cache (if enabled). */
2215	# ifndef PGMPOOL_WITH_CACHE
2216	pgmPoolMonitorFlush(pPool, pPage);
2217	rc = VERR_PGM_POOL_FLUSHED;
2218	# endif
2219	pPage->iUserHead = NIL_PGMPOOL_USER_INDEX;
2220	paUsers[i].iNext = pPool->iUserFreeHead;
2221	paUsers[i].iUser = NIL_PGMPOOL_IDX;
2222	pPool->iUserFreeHead = i;
2223	}
2224	}
2225	# endif
2226	#endif /* PGMPOOL_WITH_MONITORING */
2227	return rc;
2228	}
2229
2230
2231	# ifdef PGMPOOL_WITH_CACHE /* (only used when the cache is enabled.) */
2232	/**
2233	* Adds a user reference to a page.
2234	*
2235	* This will move the page to the head of the
2236	*
2237	* @returns VBox status code.
2238	* @retval VINF_SUCCESS if successfully added.
2239	* @retval VERR_PGM_POOL_FLUSHED if the pool was flushed.
2240	* @param pPool The pool.
2241	* @param pPage The cached page.
2242	* @param iUser The user index.
2243	* @param iUserTable The user table.
2244	*/
2245	static int pgmPoolTrackAddUser(PPGMPOOL pPool, PPGMPOOLPAGE pPage, uint16_t iUser, uint32_t iUserTable)
2246	{
2247	PPGMPOOLUSER paUsers = pPool->CTX_SUFF(paUsers);
2248
2249	Log3(("pgmPoolTrackAddUser GCPhys = %RGp iUser %x iUserTable %x\n", pPage->GCPhys, iUser, iUserTable));
2250	# ifdef VBOX_STRICT
2251	/*
2252	* Check that the entry doesn't already exists.
2253	*/
2254	if (pPage->iUserHead != NIL_PGMPOOL_USER_INDEX)
2255	{
2256	uint16_t i = pPage->iUserHead;
2257	do
2258	{
2259	Assert(i < pPool->cMaxUsers);
2260	AssertMsg(paUsers[i].iUser != iUser \|\| paUsers[i].iUserTable != iUserTable, ("%x %x vs new %x %x\n", paUsers[i].iUser, paUsers[i].iUserTable, iUser, iUserTable));
2261	i = paUsers[i].iNext;
2262	} while (i != NIL_PGMPOOL_USER_INDEX);
2263	}
2264	# endif
2265
2266	/*
2267	* Allocate a user node.
2268	*/
2269	uint16_t i = pPool->iUserFreeHead;
2270	if (i == NIL_PGMPOOL_USER_INDEX)
2271	{
2272	int rc = pgmPoolTrackFreeOneUser(pPool, iUser);
2273	if (RT_FAILURE(rc))
2274	return rc;
2275	i = pPool->iUserFreeHead;
2276	}
2277	pPool->iUserFreeHead = paUsers[i].iNext;
2278
2279	/*
2280	* Initialize the user node and insert it.
2281	*/
2282	paUsers[i].iNext = pPage->iUserHead;
2283	paUsers[i].iUser = iUser;
2284	paUsers[i].iUserTable = iUserTable;
2285	pPage->iUserHead = i;
2286
2287	# ifdef PGMPOOL_WITH_CACHE
2288	/*
2289	* Tell the cache to update its replacement stats for this page.
2290	*/
2291	pgmPoolCacheUsed(pPool, pPage);
2292	# endif
2293	return VINF_SUCCESS;
2294	}
2295	# endif /* PGMPOOL_WITH_CACHE */
2296
2297
2298	/**
2299	* Frees a user record associated with a page.
2300	*
2301	* This does not clear the entry in the user table, it simply replaces the
2302	* user record to the chain of free records.
2303	*
2304	* @param pPool The pool.
2305	* @param HCPhys The HC physical address of the shadow page.
2306	* @param iUser The shadow page pool index of the user table.
2307	* @param iUserTable The index into the user table (shadowed).
2308	*/
2309	static void pgmPoolTrackFreeUser(PPGMPOOL pPool, PPGMPOOLPAGE pPage, uint16_t iUser, uint32_t iUserTable)
2310	{
2311	/*
2312	* Unlink and free the specified user entry.
2313	*/
2314	PPGMPOOLUSER paUsers = pPool->CTX_SUFF(paUsers);
2315
2316	Log3(("pgmPoolTrackFreeUser %RGp %x %x\n", pPage->GCPhys, iUser, iUserTable));
2317	/* Special: For PAE and 32-bit paging, there is usually no more than one user. */
2318	uint16_t i = pPage->iUserHead;
2319	if ( i != NIL_PGMPOOL_USER_INDEX
2320	&& paUsers[i].iUser == iUser
2321	&& paUsers[i].iUserTable == iUserTable)
2322	{
2323	pPage->iUserHead = paUsers[i].iNext;
2324
2325	paUsers[i].iUser = NIL_PGMPOOL_IDX;
2326	paUsers[i].iNext = pPool->iUserFreeHead;
2327	pPool->iUserFreeHead = i;
2328	return;
2329	}
2330
2331	/* General: Linear search. */
2332	uint16_t iPrev = NIL_PGMPOOL_USER_INDEX;
2333	while (i != NIL_PGMPOOL_USER_INDEX)
2334	{
2335	if ( paUsers[i].iUser == iUser
2336	&& paUsers[i].iUserTable == iUserTable)
2337	{
2338	if (iPrev != NIL_PGMPOOL_USER_INDEX)
2339	paUsers[iPrev].iNext = paUsers[i].iNext;
2340	else
2341	pPage->iUserHead = paUsers[i].iNext;
2342
2343	paUsers[i].iUser = NIL_PGMPOOL_IDX;
2344	paUsers[i].iNext = pPool->iUserFreeHead;
2345	pPool->iUserFreeHead = i;
2346	return;
2347	}
2348	iPrev = i;
2349	i = paUsers[i].iNext;
2350	}
2351
2352	/* Fatal: didn't find it */
2353	AssertFatalMsgFailed(("Didn't find the user entry! iUser=%#x iUserTable=%#x GCPhys=%RGp\n",
2354	iUser, iUserTable, pPage->GCPhys));
2355	}
2356
2357
2358	/**
2359	* Gets the entry size of a shadow table.
2360	*
2361	* @param enmKind The kind of page.
2362	*
2363	* @returns The size of the entry in bytes. That is, 4 or 8.
2364	* @returns If the kind is not for a table, an assertion is raised and 0 is
2365	* returned.
2366	*/
2367	DECLINLINE(unsigned) pgmPoolTrackGetShadowEntrySize(PGMPOOLKIND enmKind)
2368	{
2369	switch (enmKind)
2370	{
2371	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
2372	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
2373	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
2374	case PGMPOOLKIND_32BIT_PD:
2375	case PGMPOOLKIND_32BIT_PD_PHYS:
2376	return 4;
2377
2378	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
2379	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
2380	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
2381	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
2382	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
2383	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
2384	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
2385	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
2386	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
2387	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
2388	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
2389	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
2390	case PGMPOOLKIND_64BIT_PML4:
2391	case PGMPOOLKIND_PAE_PDPT:
2392	case PGMPOOLKIND_ROOT_NESTED:
2393	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
2394	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
2395	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
2396	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
2397	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
2398	case PGMPOOLKIND_PAE_PD_PHYS:
2399	case PGMPOOLKIND_PAE_PDPT_PHYS:
2400	return 8;
2401
2402	default:
2403	AssertFatalMsgFailed(("enmKind=%d\n", enmKind));
2404	}
2405	}
2406
2407
2408	/**
2409	* Gets the entry size of a guest table.
2410	*
2411	* @param enmKind The kind of page.
2412	*
2413	* @returns The size of the entry in bytes. That is, 0, 4 or 8.
2414	* @returns If the kind is not for a table, an assertion is raised and 0 is
2415	* returned.
2416	*/
2417	DECLINLINE(unsigned) pgmPoolTrackGetGuestEntrySize(PGMPOOLKIND enmKind)
2418	{
2419	switch (enmKind)
2420	{
2421	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
2422	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
2423	case PGMPOOLKIND_32BIT_PD:
2424	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
2425	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
2426	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
2427	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
2428	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
2429	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
2430	return 4;
2431
2432	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
2433	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
2434	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
2435	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
2436	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
2437	case PGMPOOLKIND_64BIT_PML4:
2438	case PGMPOOLKIND_PAE_PDPT:
2439	return 8;
2440
2441	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
2442	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
2443	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
2444	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
2445	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
2446	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
2447	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
2448	case PGMPOOLKIND_ROOT_NESTED:
2449	case PGMPOOLKIND_PAE_PD_PHYS:
2450	case PGMPOOLKIND_PAE_PDPT_PHYS:
2451	case PGMPOOLKIND_32BIT_PD_PHYS:
2452	/** @todo can we return 0? (nobody is calling this...) */
2453	AssertFailed();
2454	return 0;
2455
2456	default:
2457	AssertFatalMsgFailed(("enmKind=%d\n", enmKind));
2458	}
2459	}
2460
2461	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
2462
2463	/**
2464	* Scans one shadow page table for mappings of a physical page.
2465	*
2466	* @param pVM The VM handle.
2467	* @param pPhysPage The guest page in question.
2468	* @param iShw The shadow page table.
2469	* @param cRefs The number of references made in that PT.
2470	*/
2471	static void pgmPoolTrackFlushGCPhysPTInt(PVM pVM, PCPGMPAGE pPhysPage, uint16_t iShw, uint16_t cRefs)
2472	{
2473	LogFlow(("pgmPoolTrackFlushGCPhysPT: pPhysPage=%R[pgmpage] iShw=%d cRefs=%d\n", pPhysPage, iShw, cRefs));
2474	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
2475
2476	/*
2477	* Assert sanity.
2478	*/
2479	Assert(cRefs == 1);
2480	AssertFatalMsg(iShw < pPool->cCurPages && iShw != NIL_PGMPOOL_IDX, ("iShw=%d\n", iShw));
2481	PPGMPOOLPAGE pPage = &pPool->aPages[iShw];
2482
2483	/*
2484	* Then, clear the actual mappings to the page in the shadow PT.
2485	*/
2486	switch (pPage->enmKind)
2487	{
2488	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
2489	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
2490	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
2491	{
2492	const uint32_t u32 = PGM_PAGE_GET_HCPHYS(pPhysPage) \| X86_PTE_P;
2493	PX86PT pPT = (PX86PT)PGMPOOL_PAGE_2_PTR(pVM, pPage);
2494	for (unsigned i = pPage->iFirstPresent; i < RT_ELEMENTS(pPT->a); i++)
2495	if ((pPT->a[i].u & (X86_PTE_PG_MASK \| X86_PTE_P)) == u32)
2496	{
2497	Log4(("pgmPoolTrackFlushGCPhysPTs: i=%d pte=%RX32 cRefs=%#x\n", i, pPT->a[i], cRefs));
2498	pPT->a[i].u = 0;
2499	cRefs--;
2500	if (!cRefs)
2501	return;
2502	}
2503	#ifdef LOG_ENABLED
2504	RTLogPrintf("cRefs=%d iFirstPresent=%d cPresent=%d\n", cRefs, pPage->iFirstPresent, pPage->cPresent);
2505	for (unsigned i = 0; i < RT_ELEMENTS(pPT->a); i++)
2506	if ((pPT->a[i].u & (X86_PTE_PG_MASK \| X86_PTE_P)) == u32)
2507	{
2508	RTLogPrintf("i=%d cRefs=%d\n", i, cRefs--);
2509	pPT->a[i].u = 0;
2510	}
2511	#endif
2512	AssertFatalMsgFailed(("cRefs=%d iFirstPresent=%d cPresent=%d\n", cRefs, pPage->iFirstPresent, pPage->cPresent));
2513	break;
2514	}
2515
2516	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
2517	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
2518	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
2519	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
2520	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
2521	{
2522	const uint64_t u64 = PGM_PAGE_GET_HCPHYS(pPhysPage) \| X86_PTE_P;
2523	PX86PTPAE pPT = (PX86PTPAE)PGMPOOL_PAGE_2_PTR(pVM, pPage);
2524	for (unsigned i = pPage->iFirstPresent; i < RT_ELEMENTS(pPT->a); i++)
2525	if ((pPT->a[i].u & (X86_PTE_PAE_PG_MASK \| X86_PTE_P)) == u64)
2526	{
2527	Log4(("pgmPoolTrackFlushGCPhysPTs: i=%d pte=%RX64 cRefs=%#x\n", i, pPT->a[i], cRefs));
2528	pPT->a[i].u = 0;
2529	cRefs--;
2530	if (!cRefs)
2531	return;
2532	}
2533	#ifdef LOG_ENABLED
2534	RTLogPrintf("cRefs=%d iFirstPresent=%d cPresent=%d\n", cRefs, pPage->iFirstPresent, pPage->cPresent);
2535	for (unsigned i = 0; i < RT_ELEMENTS(pPT->a); i++)
2536	if ((pPT->a[i].u & (X86_PTE_PAE_PG_MASK \| X86_PTE_P)) == u64)
2537	{
2538	RTLogPrintf("i=%d cRefs=%d\n", i, cRefs--);
2539	pPT->a[i].u = 0;
2540	}
2541	#endif
2542	AssertFatalMsgFailed(("cRefs=%d iFirstPresent=%d cPresent=%d u64=%RX64\n", cRefs, pPage->iFirstPresent, pPage->cPresent, u64));
2543	break;
2544	}
2545
2546	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
2547	{
2548	const uint64_t u64 = PGM_PAGE_GET_HCPHYS(pPhysPage) \| X86_PTE_P;
2549	PEPTPT pPT = (PEPTPT)PGMPOOL_PAGE_2_PTR(pVM, pPage);
2550	for (unsigned i = pPage->iFirstPresent; i < RT_ELEMENTS(pPT->a); i++)
2551	if ((pPT->a[i].u & (EPT_PTE_PG_MASK \| X86_PTE_P)) == u64)
2552	{
2553	Log4(("pgmPoolTrackFlushGCPhysPTs: i=%d pte=%RX64 cRefs=%#x\n", i, pPT->a[i], cRefs));
2554	pPT->a[i].u = 0;
2555	cRefs--;
2556	if (!cRefs)
2557	return;
2558	}
2559	#ifdef LOG_ENABLED
2560	RTLogPrintf("cRefs=%d iFirstPresent=%d cPresent=%d\n", cRefs, pPage->iFirstPresent, pPage->cPresent);
2561	for (unsigned i = 0; i < RT_ELEMENTS(pPT->a); i++)
2562	if ((pPT->a[i].u & (EPT_PTE_PG_MASK \| X86_PTE_P)) == u64)
2563	{
2564	RTLogPrintf("i=%d cRefs=%d\n", i, cRefs--);
2565	pPT->a[i].u = 0;
2566	}
2567	#endif
2568	AssertFatalMsgFailed(("cRefs=%d iFirstPresent=%d cPresent=%d\n", cRefs, pPage->iFirstPresent, pPage->cPresent));
2569	break;
2570	}
2571
2572	default:
2573	AssertFatalMsgFailed(("enmKind=%d iShw=%d\n", pPage->enmKind, iShw));
2574	}
2575	}
2576
2577
2578	/**
2579	* Scans one shadow page table for mappings of a physical page.
2580	*
2581	* @param pVM The VM handle.
2582	* @param pPhysPage The guest page in question.
2583	* @param iShw The shadow page table.
2584	* @param cRefs The number of references made in that PT.
2585	*/
2586	void pgmPoolTrackFlushGCPhysPT(PVM pVM, PPGMPAGE pPhysPage, uint16_t iShw, uint16_t cRefs)
2587	{
2588	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool); NOREF(pPool);
2589	LogFlow(("pgmPoolTrackFlushGCPhysPT: pPhysPage=%R[pgmpage] iShw=%d cRefs=%d\n", pPhysPage, iShw, cRefs));
2590	STAM_PROFILE_START(&pPool->StatTrackFlushGCPhysPT, f);
2591	pgmPoolTrackFlushGCPhysPTInt(pVM, pPhysPage, iShw, cRefs);
2592	PGM_PAGE_SET_TRACKING(pPhysPage, 0);
2593	STAM_PROFILE_STOP(&pPool->StatTrackFlushGCPhysPT, f);
2594	}
2595
2596
2597	/**
2598	* Flushes a list of shadow page tables mapping the same physical page.
2599	*
2600	* @param pVM The VM handle.
2601	* @param pPhysPage The guest page in question.
2602	* @param iPhysExt The physical cross reference extent list to flush.
2603	*/
2604	void pgmPoolTrackFlushGCPhysPTs(PVM pVM, PPGMPAGE pPhysPage, uint16_t iPhysExt)
2605	{
2606	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
2607	STAM_PROFILE_START(&pPool->StatTrackFlushGCPhysPTs, f);
2608	LogFlow(("pgmPoolTrackFlushGCPhysPTs: pPhysPage=%R[pgmpage] iPhysExt\n", pPhysPage, iPhysExt));
2609
2610	const uint16_t iPhysExtStart = iPhysExt;
2611	PPGMPOOLPHYSEXT pPhysExt;
2612	do
2613	{
2614	Assert(iPhysExt < pPool->cMaxPhysExts);
2615	pPhysExt = &pPool->CTX_SUFF(paPhysExts)[iPhysExt];
2616	for (unsigned i = 0; i < RT_ELEMENTS(pPhysExt->aidx); i++)
2617	if (pPhysExt->aidx[i] != NIL_PGMPOOL_IDX)
2618	{
2619	pgmPoolTrackFlushGCPhysPTInt(pVM, pPhysPage, pPhysExt->aidx[i], 1);
2620	pPhysExt->aidx[i] = NIL_PGMPOOL_IDX;
2621	}
2622
2623	/* next */
2624	iPhysExt = pPhysExt->iNext;
2625	} while (iPhysExt != NIL_PGMPOOL_PHYSEXT_INDEX);
2626
2627	/* insert the list into the free list and clear the ram range entry. */
2628	pPhysExt->iNext = pPool->iPhysExtFreeHead;
2629	pPool->iPhysExtFreeHead = iPhysExtStart;
2630	PGM_PAGE_SET_TRACKING(pPhysPage, 0);
2631
2632	STAM_PROFILE_STOP(&pPool->StatTrackFlushGCPhysPTs, f);
2633	}
2634
2635	#endif /* PGMPOOL_WITH_GCPHYS_TRACKING */
2636
2637	/**
2638	* Flushes all shadow page table mappings of the given guest page.
2639	*
2640	* This is typically called when the host page backing the guest one has been
2641	* replaced or when the page protection was changed due to an access handler.
2642	*
2643	* @returns VBox status code.
2644	* @retval VINF_SUCCESS if all references has been successfully cleared.
2645	* @retval VINF_PGM_GCPHYS_ALIASED if we're better off with a CR3 sync and
2646	* a page pool cleaning.
2647	*
2648	* @param pVM The VM handle.
2649	* @param pPhysPage The guest page in question.
2650	* @param pfFlushTLBs This is set to @a true if the shadow TLBs should be
2651	* flushed, it is NOT touched if this isn't necessary.
2652	* The caller MUST initialized this to @a false.
2653	*/
2654	int pgmPoolTrackFlushGCPhys(PVM pVM, PPGMPAGE pPhysPage, bool *pfFlushTLBs)
2655	{
2656	int rc = VINF_SUCCESS;
2657	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
2658	const uint16_t u16 = PGM_PAGE_GET_TRACKING(pPhysPage);
2659	if (u16)
2660	{
2661	# ifdef VBOX_WITH_NEW_PHYS_CODE
2662	/*
2663	* The zero page is currently screwing up the tracking and we'll
2664	* have to flush the whole shebang. Unless VBOX_WITH_NEW_LAZY_PAGE_ALLOC
2665	* is defined, zero pages won't normally be mapped. Some kind of solution
2666	* will be needed for this problem of course, but it will have to wait...
2667	*/
2668	if (PGM_PAGE_IS_ZERO(pPhysPage))
2669	rc = VINF_PGM_GCPHYS_ALIASED;
2670	else
2671	# endif
2672	{
2673	# ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
2674	/* Start a subset here because pgmPoolTrackFlushGCPhysPTsSlow and
2675	pgmPoolTrackFlushGCPhysPTs will/may kill the pool otherwise. */
2676	PVMCPU pVCpu = VMMGetCpu(pVM);
2677	uint32_t iPrevSubset = PGMDynMapPushAutoSubset(pVCpu);
2678	# endif
2679
2680	if (PGMPOOL_TD_GET_CREFS(u16) != PGMPOOL_TD_CREFS_PHYSEXT)
2681	pgmPoolTrackFlushGCPhysPT(pVM,
2682	pPhysPage,
2683	PGMPOOL_TD_GET_IDX(u16),
2684	PGMPOOL_TD_GET_CREFS(u16));
2685	else if (u16 != PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, PGMPOOL_TD_IDX_OVERFLOWED))
2686	pgmPoolTrackFlushGCPhysPTs(pVM, pPhysPage, PGMPOOL_TD_GET_IDX(u16));
2687	else
2688	rc = pgmPoolTrackFlushGCPhysPTsSlow(pVM, pPhysPage);
2689	*pfFlushTLBs = true;
2690
2691	# ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
2692	PGMDynMapPopAutoSubset(pVCpu, iPrevSubset);
2693	# endif
2694	}
2695	}
2696
2697	#elif defined(PGMPOOL_WITH_CACHE)
2698	# ifdef VBOX_WITH_NEW_PHYS_CODE
2699	if (PGM_PAGE_IS_ZERO(pPhysPage))
2700	rc = VINF_PGM_GCPHYS_ALIASED;
2701	else
2702	# endif
2703	{
2704	# ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
2705	/* Start a subset here because pgmPoolTrackFlushGCPhysPTsSlow kill the pool otherwise. */
2706	PVMCPU pVCpu = VMMGetCpu(pVM);
2707	uint32_t iPrevSubset = PGMDynMapPushAutoSubset(pVCpu);
2708	# endif
2709	rc = pgmPoolTrackFlushGCPhysPTsSlow(pVM, pPhysPage);
2710	if (rc == VINF_SUCCESS)
2711	*pfFlushTLBs = true;
2712	}
2713
2714	# ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
2715	PGMDynMapPopAutoSubset(pVCpu, iPrevSubset);
2716	# endif
2717
2718	#else
2719	rc = VINF_PGM_GCPHYS_ALIASED;
2720	#endif
2721
2722	return rc;
2723	}
2724
2725
2726	/**
2727	* Scans all shadow page tables for mappings of a physical page.
2728	*
2729	* This may be slow, but it's most likely more efficient than cleaning
2730	* out the entire page pool / cache.
2731	*
2732	* @returns VBox status code.
2733	* @retval VINF_SUCCESS if all references has been successfully cleared.
2734	* @retval VINF_PGM_GCPHYS_ALIASED if we're better off with a CR3 sync and
2735	* a page pool cleaning.
2736	*
2737	* @param pVM The VM handle.
2738	* @param pPhysPage The guest page in question.
2739	*/
2740	int pgmPoolTrackFlushGCPhysPTsSlow(PVM pVM, PPGMPAGE pPhysPage)
2741	{
2742	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
2743	STAM_PROFILE_START(&pPool->StatTrackFlushGCPhysPTsSlow, s);
2744	LogFlow(("pgmPoolTrackFlushGCPhysPTsSlow: cUsedPages=%d cPresent=%d pPhysPage=%R[pgmpage]\n",
2745	pPool->cUsedPages, pPool->cPresent, pPhysPage));
2746
2747	#if 1
2748	/*
2749	* There is a limit to what makes sense.
2750	*/
2751	if (pPool->cPresent > 1024)
2752	{
2753	LogFlow(("pgmPoolTrackFlushGCPhysPTsSlow: giving up... (cPresent=%d)\n", pPool->cPresent));
2754	STAM_PROFILE_STOP(&pPool->StatTrackFlushGCPhysPTsSlow, s);
2755	return VINF_PGM_GCPHYS_ALIASED;
2756	}
2757	#endif
2758
2759	/*
2760	* Iterate all the pages until we've encountered all that in use.
2761	* This is simple but not quite optimal solution.
2762	*/
2763	const uint64_t u64 = PGM_PAGE_GET_HCPHYS(pPhysPage) \| X86_PTE_P;
2764	const uint32_t u32 = u64;
2765	unsigned cLeft = pPool->cUsedPages;
2766	unsigned iPage = pPool->cCurPages;
2767	while (--iPage >= PGMPOOL_IDX_FIRST)
2768	{
2769	PPGMPOOLPAGE pPage = &pPool->aPages[iPage];
2770	if (pPage->GCPhys != NIL_RTGCPHYS)
2771	{
2772	switch (pPage->enmKind)
2773	{
2774	/*
2775	* We only care about shadow page tables.
2776	*/
2777	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
2778	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
2779	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
2780	{
2781	unsigned cPresent = pPage->cPresent;
2782	PX86PT pPT = (PX86PT)PGMPOOL_PAGE_2_PTR(pVM, pPage);
2783	for (unsigned i = pPage->iFirstPresent; i < RT_ELEMENTS(pPT->a); i++)
2784	if (pPT->a[i].n.u1Present)
2785	{
2786	if ((pPT->a[i].u & (X86_PTE_PG_MASK \| X86_PTE_P)) == u32)
2787	{
2788	//Log4(("pgmPoolTrackFlushGCPhysPTsSlow: idx=%d i=%d pte=%RX32\n", iPage, i, pPT->a[i]));
2789	pPT->a[i].u = 0;
2790	}
2791	if (!--cPresent)
2792	break;
2793	}
2794	break;
2795	}
2796
2797	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
2798	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
2799	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
2800	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
2801	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
2802	{
2803	unsigned cPresent = pPage->cPresent;
2804	PX86PTPAE pPT = (PX86PTPAE)PGMPOOL_PAGE_2_PTR(pVM, pPage);
2805	for (unsigned i = pPage->iFirstPresent; i < RT_ELEMENTS(pPT->a); i++)
2806	if (pPT->a[i].n.u1Present)
2807	{
2808	if ((pPT->a[i].u & (X86_PTE_PAE_PG_MASK \| X86_PTE_P)) == u64)
2809	{
2810	//Log4(("pgmPoolTrackFlushGCPhysPTsSlow: idx=%d i=%d pte=%RX64\n", iPage, i, pPT->a[i]));
2811	pPT->a[i].u = 0;
2812	}
2813	if (!--cPresent)
2814	break;
2815	}
2816	break;
2817	}
2818	}
2819	if (!--cLeft)
2820	break;
2821	}
2822	}
2823
2824	PGM_PAGE_SET_TRACKING(pPhysPage, 0);
2825	STAM_PROFILE_STOP(&pPool->StatTrackFlushGCPhysPTsSlow, s);
2826	return VINF_SUCCESS;
2827	}
2828
2829
2830	/**
2831	* Clears the user entry in a user table.
2832	*
2833	* This is used to remove all references to a page when flushing it.
2834	*/
2835	static void pgmPoolTrackClearPageUser(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PCPGMPOOLUSER pUser)
2836	{
2837	Assert(pUser->iUser != NIL_PGMPOOL_IDX);
2838	Assert(pUser->iUser < pPool->cCurPages);
2839	uint32_t iUserTable = pUser->iUserTable;
2840
2841	/*
2842	* Map the user page.
2843	*/
2844	PPGMPOOLPAGE pUserPage = &pPool->aPages[pUser->iUser];
2845	union
2846	{
2847	uint64_t *pau64;
2848	uint32_t *pau32;
2849	} u;
2850	u.pau64 = (uint64_t *)PGMPOOL_PAGE_2_PTR(pPool->CTX_SUFF(pVM), pUserPage);
2851
2852	LogFlow(("pgmPoolTrackClearPageUser: clear %x in %s (%RGp) (flushing %s)\n", iUserTable, pgmPoolPoolKindToStr(pUserPage->enmKind), pUserPage->Core.Key, pgmPoolPoolKindToStr(pPage->enmKind)));
2853
2854	/* Safety precaution in case we change the paging for other modes too in the future. */
2855	Assert(!pgmPoolIsPageLocked(&pPool->CTX_SUFF(pVM)->pgm.s, pPage));
2856
2857	#ifdef VBOX_STRICT
2858	/*
2859	* Some sanity checks.
2860	*/
2861	switch (pUserPage->enmKind)
2862	{
2863	case PGMPOOLKIND_32BIT_PD:
2864	case PGMPOOLKIND_32BIT_PD_PHYS:
2865	Assert(iUserTable < X86_PG_ENTRIES);
2866	break;
2867	case PGMPOOLKIND_PAE_PDPT:
2868	case PGMPOOLKIND_PAE_PDPT_FOR_32BIT:
2869	case PGMPOOLKIND_PAE_PDPT_PHYS:
2870	Assert(iUserTable < 4);
2871	Assert(!(u.pau64[iUserTable] & PGM_PLXFLAGS_PERMANENT));
2872	break;
2873	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
2874	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
2875	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
2876	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
2877	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
2878	case PGMPOOLKIND_PAE_PD_PHYS:
2879	Assert(iUserTable < X86_PG_PAE_ENTRIES);
2880	break;
2881	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
2882	Assert(iUserTable < X86_PG_PAE_ENTRIES);
2883	Assert(!(u.pau64[iUserTable] & PGM_PDFLAGS_MAPPING));
2884	break;
2885	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
2886	Assert(iUserTable < X86_PG_PAE_ENTRIES);
2887	Assert(!(u.pau64[iUserTable] & PGM_PLXFLAGS_PERMANENT));
2888	break;
2889	case PGMPOOLKIND_64BIT_PML4:
2890	Assert(!(u.pau64[iUserTable] & PGM_PLXFLAGS_PERMANENT));
2891	/* GCPhys >> PAGE_SHIFT is the index here */
2892	break;
2893	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
2894	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
2895	Assert(iUserTable < X86_PG_PAE_ENTRIES);
2896	break;
2897
2898	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
2899	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
2900	Assert(iUserTable < X86_PG_PAE_ENTRIES);
2901	break;
2902
2903	case PGMPOOLKIND_ROOT_NESTED:
2904	Assert(iUserTable < X86_PG_PAE_ENTRIES);
2905	break;
2906
2907	default:
2908	AssertMsgFailed(("enmKind=%d\n", pUserPage->enmKind));
2909	break;
2910	}
2911	#endif /* VBOX_STRICT */
2912
2913	/*
2914	* Clear the entry in the user page.
2915	*/
2916	switch (pUserPage->enmKind)
2917	{
2918	/* 32-bit entries */
2919	case PGMPOOLKIND_32BIT_PD:
2920	case PGMPOOLKIND_32BIT_PD_PHYS:
2921	u.pau32[iUserTable] = 0;
2922	break;
2923
2924	/* 64-bit entries */
2925	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
2926	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
2927	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
2928	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
2929	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
2930	#if defined(IN_RC)
2931	/* In 32 bits PAE mode we must invalidate the TLB when changing a PDPT entry; the CPU fetches them only during cr3 load, so any
2932	* non-present PDPT will continue to cause page faults.
2933	*/
2934	ASMReloadCR3();
2935	#endif
2936	/* no break */
2937	case PGMPOOLKIND_PAE_PD_PHYS:
2938	case PGMPOOLKIND_PAE_PDPT_PHYS:
2939	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
2940	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
2941	case PGMPOOLKIND_64BIT_PML4:
2942	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
2943	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
2944	case PGMPOOLKIND_PAE_PDPT:
2945	case PGMPOOLKIND_PAE_PDPT_FOR_32BIT:
2946	case PGMPOOLKIND_ROOT_NESTED:
2947	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
2948	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
2949	u.pau64[iUserTable] = 0;
2950	break;
2951
2952	default:
2953	AssertFatalMsgFailed(("enmKind=%d iUser=%#x iUserTable=%#x\n", pUserPage->enmKind, pUser->iUser, pUser->iUserTable));
2954	}
2955	}
2956
2957
2958	/**
2959	* Clears all users of a page.
2960	*/
2961	static void pgmPoolTrackClearPageUsers(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
2962	{
2963	/*
2964	* Free all the user records.
2965	*/
2966	LogFlow(("pgmPoolTrackClearPageUsers %RGp\n", pPage->GCPhys));
2967
2968	PPGMPOOLUSER paUsers = pPool->CTX_SUFF(paUsers);
2969	uint16_t i = pPage->iUserHead;
2970	while (i != NIL_PGMPOOL_USER_INDEX)
2971	{
2972	/* Clear enter in user table. */
2973	pgmPoolTrackClearPageUser(pPool, pPage, &paUsers[i]);
2974
2975	/* Free it. */
2976	const uint16_t iNext = paUsers[i].iNext;
2977	paUsers[i].iUser = NIL_PGMPOOL_IDX;
2978	paUsers[i].iNext = pPool->iUserFreeHead;
2979	pPool->iUserFreeHead = i;
2980
2981	/* Next. */
2982	i = iNext;
2983	}
2984	pPage->iUserHead = NIL_PGMPOOL_USER_INDEX;
2985	}
2986
2987	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
2988
2989	/**
2990	* Allocates a new physical cross reference extent.
2991	*
2992	* @returns Pointer to the allocated extent on success. NULL if we're out of them.
2993	* @param pVM The VM handle.
2994	* @param piPhysExt Where to store the phys ext index.
2995	*/
2996	PPGMPOOLPHYSEXT pgmPoolTrackPhysExtAlloc(PVM pVM, uint16_t *piPhysExt)
2997	{
2998	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
2999	uint16_t iPhysExt = pPool->iPhysExtFreeHead;
3000	if (iPhysExt == NIL_PGMPOOL_PHYSEXT_INDEX)
3001	{
3002	STAM_COUNTER_INC(&pPool->StamTrackPhysExtAllocFailures);
3003	return NULL;
3004	}
3005	PPGMPOOLPHYSEXT pPhysExt = &pPool->CTX_SUFF(paPhysExts)[iPhysExt];
3006	pPool->iPhysExtFreeHead = pPhysExt->iNext;
3007	pPhysExt->iNext = NIL_PGMPOOL_PHYSEXT_INDEX;
3008	*piPhysExt = iPhysExt;
3009	return pPhysExt;
3010	}
3011
3012
3013	/**
3014	* Frees a physical cross reference extent.
3015	*
3016	* @param pVM The VM handle.
3017	* @param iPhysExt The extent to free.
3018	*/
3019	void pgmPoolTrackPhysExtFree(PVM pVM, uint16_t iPhysExt)
3020	{
3021	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
3022	Assert(iPhysExt < pPool->cMaxPhysExts);
3023	PPGMPOOLPHYSEXT pPhysExt = &pPool->CTX_SUFF(paPhysExts)[iPhysExt];
3024	for (unsigned i = 0; i < RT_ELEMENTS(pPhysExt->aidx); i++)
3025	pPhysExt->aidx[i] = NIL_PGMPOOL_IDX;
3026	pPhysExt->iNext = pPool->iPhysExtFreeHead;
3027	pPool->iPhysExtFreeHead = iPhysExt;
3028	}
3029
3030
3031	/**
3032	* Frees a physical cross reference extent.
3033	*
3034	* @param pVM The VM handle.
3035	* @param iPhysExt The extent to free.
3036	*/
3037	void pgmPoolTrackPhysExtFreeList(PVM pVM, uint16_t iPhysExt)
3038	{
3039	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
3040
3041	const uint16_t iPhysExtStart = iPhysExt;
3042	PPGMPOOLPHYSEXT pPhysExt;
3043	do
3044	{
3045	Assert(iPhysExt < pPool->cMaxPhysExts);
3046	pPhysExt = &pPool->CTX_SUFF(paPhysExts)[iPhysExt];
3047	for (unsigned i = 0; i < RT_ELEMENTS(pPhysExt->aidx); i++)
3048	pPhysExt->aidx[i] = NIL_PGMPOOL_IDX;
3049
3050	/* next */
3051	iPhysExt = pPhysExt->iNext;
3052	} while (iPhysExt != NIL_PGMPOOL_PHYSEXT_INDEX);
3053
3054	pPhysExt->iNext = pPool->iPhysExtFreeHead;
3055	pPool->iPhysExtFreeHead = iPhysExtStart;
3056	}
3057
3058
3059	/**
3060	* Insert a reference into a list of physical cross reference extents.
3061	*
3062	* @returns The new tracking data for PGMPAGE.
3063	*
3064	* @param pVM The VM handle.
3065	* @param iPhysExt The physical extent index of the list head.
3066	* @param iShwPT The shadow page table index.
3067	*
3068	*/
3069	static uint16_t pgmPoolTrackPhysExtInsert(PVM pVM, uint16_t iPhysExt, uint16_t iShwPT)
3070	{
3071	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
3072	PPGMPOOLPHYSEXT paPhysExts = pPool->CTX_SUFF(paPhysExts);
3073
3074	/* special common case. */
3075	if (paPhysExts[iPhysExt].aidx[2] == NIL_PGMPOOL_IDX)
3076	{
3077	paPhysExts[iPhysExt].aidx[2] = iShwPT;
3078	STAM_COUNTER_INC(&pVM->pgm.s.StatTrackAliasedMany);
3079	LogFlow(("pgmPoolTrackPhysExtAddref: %d:{,,%d}\n", iPhysExt, iShwPT));
3080	return PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, iPhysExt);
3081	}
3082
3083	/* general treatment. */
3084	const uint16_t iPhysExtStart = iPhysExt;
3085	unsigned cMax = 15;
3086	for (;;)
3087	{
3088	Assert(iPhysExt < pPool->cMaxPhysExts);
3089	for (unsigned i = 0; i < RT_ELEMENTS(paPhysExts[iPhysExt].aidx); i++)
3090	if (paPhysExts[iPhysExt].aidx[i] == NIL_PGMPOOL_IDX)
3091	{
3092	paPhysExts[iPhysExt].aidx[i] = iShwPT;
3093	STAM_COUNTER_INC(&pVM->pgm.s.StatTrackAliasedMany);
3094	LogFlow(("pgmPoolTrackPhysExtAddref: %d:{%d} i=%d cMax=%d\n", iPhysExt, iShwPT, i, cMax));
3095	return PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, iPhysExtStart);
3096	}
3097	if (!--cMax)
3098	{
3099	STAM_COUNTER_INC(&pVM->pgm.s.StatTrackOverflows);
3100	pgmPoolTrackPhysExtFreeList(pVM, iPhysExtStart);
3101	LogFlow(("pgmPoolTrackPhysExtAddref: overflow (1) iShwPT=%d\n", iShwPT));
3102	return PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, PGMPOOL_TD_IDX_OVERFLOWED);
3103	}
3104	}
3105
3106	/* add another extent to the list. */
3107	PPGMPOOLPHYSEXT pNew = pgmPoolTrackPhysExtAlloc(pVM, &iPhysExt);
3108	if (!pNew)
3109	{
3110	STAM_COUNTER_INC(&pVM->pgm.s.StatTrackOverflows);
3111	pgmPoolTrackPhysExtFreeList(pVM, iPhysExtStart);
3112	return PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, PGMPOOL_TD_IDX_OVERFLOWED);
3113	}
3114	pNew->iNext = iPhysExtStart;
3115	pNew->aidx[0] = iShwPT;
3116	LogFlow(("pgmPoolTrackPhysExtAddref: added new extent %d:{%d}->%d\n", iPhysExt, iShwPT, iPhysExtStart));
3117	return PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, iPhysExt);
3118	}
3119
3120
3121	/**
3122	* Add a reference to guest physical page where extents are in use.
3123	*
3124	* @returns The new tracking data for PGMPAGE.
3125	*
3126	* @param pVM The VM handle.
3127	* @param u16 The ram range flags (top 16-bits).
3128	* @param iShwPT The shadow page table index.
3129	*/
3130	uint16_t pgmPoolTrackPhysExtAddref(PVM pVM, uint16_t u16, uint16_t iShwPT)
3131	{
3132	if (PGMPOOL_TD_GET_CREFS(u16) != PGMPOOL_TD_CREFS_PHYSEXT)
3133	{
3134	/*
3135	* Convert to extent list.
3136	*/
3137	Assert(PGMPOOL_TD_GET_CREFS(u16) == 1);
3138	uint16_t iPhysExt;
3139	PPGMPOOLPHYSEXT pPhysExt = pgmPoolTrackPhysExtAlloc(pVM, &iPhysExt);
3140	if (pPhysExt)
3141	{
3142	LogFlow(("pgmPoolTrackPhysExtAddref: new extent: %d:{%d, %d}\n", iPhysExt, PGMPOOL_TD_GET_IDX(u16), iShwPT));
3143	STAM_COUNTER_INC(&pVM->pgm.s.StatTrackAliased);
3144	pPhysExt->aidx[0] = PGMPOOL_TD_GET_IDX(u16);
3145	pPhysExt->aidx[1] = iShwPT;
3146	u16 = PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, iPhysExt);
3147	}
3148	else
3149	u16 = PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, PGMPOOL_TD_IDX_OVERFLOWED);
3150	}
3151	else if (u16 != PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, PGMPOOL_TD_IDX_OVERFLOWED))
3152	{
3153	/*
3154	* Insert into the extent list.
3155	*/
3156	u16 = pgmPoolTrackPhysExtInsert(pVM, PGMPOOL_TD_GET_IDX(u16), iShwPT);
3157	}
3158	else
3159	STAM_COUNTER_INC(&pVM->pgm.s.StatTrackAliasedLots);
3160	return u16;
3161	}
3162
3163
3164	/**
3165	* Clear references to guest physical memory.
3166	*
3167	* @param pPool The pool.
3168	* @param pPage The page.
3169	* @param pPhysPage Pointer to the aPages entry in the ram range.
3170	*/
3171	void pgmPoolTrackPhysExtDerefGCPhys(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PPGMPAGE pPhysPage)
3172	{
3173	const unsigned cRefs = PGM_PAGE_GET_TD_CREFS(pPhysPage);
3174	AssertFatalMsg(cRefs == PGMPOOL_TD_CREFS_PHYSEXT, ("cRefs=%d pPhysPage=%R[pgmpage] pPage=%p:{.idx=%d}\n", cRefs, pPhysPage, pPage, pPage->idx));
3175
3176	uint16_t iPhysExt = PGM_PAGE_GET_TD_IDX(pPhysPage);
3177	if (iPhysExt != PGMPOOL_TD_IDX_OVERFLOWED)
3178	{
3179	uint16_t iPhysExtPrev = NIL_PGMPOOL_PHYSEXT_INDEX;
3180	PPGMPOOLPHYSEXT paPhysExts = pPool->CTX_SUFF(paPhysExts);
3181	do
3182	{
3183	Assert(iPhysExt < pPool->cMaxPhysExts);
3184
3185	/*
3186	* Look for the shadow page and check if it's all freed.
3187	*/
3188	for (unsigned i = 0; i < RT_ELEMENTS(paPhysExts[iPhysExt].aidx); i++)
3189	{
3190	if (paPhysExts[iPhysExt].aidx[i] == pPage->idx)
3191	{
3192	paPhysExts[iPhysExt].aidx[i] = NIL_PGMPOOL_IDX;
3193
3194	for (i = 0; i < RT_ELEMENTS(paPhysExts[iPhysExt].aidx); i++)
3195	if (paPhysExts[iPhysExt].aidx[i] != NIL_PGMPOOL_IDX)
3196	{
3197	Log2(("pgmPoolTrackPhysExtDerefGCPhys: pPhysPage=%R[pgmpage] idx=%d\n", pPhysPage, pPage->idx));
3198	return;
3199	}
3200
3201	/* we can free the node. */
3202	PVM pVM = pPool->CTX_SUFF(pVM);
3203	const uint16_t iPhysExtNext = paPhysExts[iPhysExt].iNext;
3204	if ( iPhysExtPrev == NIL_PGMPOOL_PHYSEXT_INDEX
3205	&& iPhysExtNext == NIL_PGMPOOL_PHYSEXT_INDEX)
3206	{
3207	/* lonely node */
3208	pgmPoolTrackPhysExtFree(pVM, iPhysExt);
3209	Log2(("pgmPoolTrackPhysExtDerefGCPhys: pPhysPage=%R[pgmpage] idx=%d lonely\n", pPhysPage, pPage->idx));
3210	PGM_PAGE_SET_TRACKING(pPhysPage, 0);
3211	}
3212	else if (iPhysExtPrev == NIL_PGMPOOL_PHYSEXT_INDEX)
3213	{
3214	/* head */
3215	Log2(("pgmPoolTrackPhysExtDerefGCPhys: pPhysPage=%R[pgmpage] idx=%d head\n", pPhysPage, pPage->idx));
3216	PGM_PAGE_SET_TRACKING(pPhysPage, PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, iPhysExtNext));
3217	pgmPoolTrackPhysExtFree(pVM, iPhysExt);
3218	}
3219	else
3220	{
3221	/* in list */
3222	Log2(("pgmPoolTrackPhysExtDerefGCPhys: pPhysPage=%R[pgmpage] idx=%d\n", pPhysPage, pPage->idx));
3223	paPhysExts[iPhysExtPrev].iNext = iPhysExtNext;
3224	pgmPoolTrackPhysExtFree(pVM, iPhysExt);
3225	}
3226	iPhysExt = iPhysExtNext;
3227	return;
3228	}
3229	}
3230
3231	/* next */
3232	iPhysExtPrev = iPhysExt;
3233	iPhysExt = paPhysExts[iPhysExt].iNext;
3234	} while (iPhysExt != NIL_PGMPOOL_PHYSEXT_INDEX);
3235
3236	AssertFatalMsgFailed(("not-found! cRefs=%d pPhysPage=%R[pgmpage] pPage=%p:{.idx=%d}\n", cRefs, pPhysPage, pPage, pPage->idx));
3237	}
3238	else /* nothing to do */
3239	Log2(("pgmPoolTrackPhysExtDerefGCPhys: pPhysPage=%R[pgmpage]\n", pPhysPage));
3240	}
3241
3242
3243	/**
3244	* Clear references to guest physical memory.
3245	*
3246	* This is the same as pgmPoolTracDerefGCPhys except that the guest physical address
3247	* is assumed to be correct, so the linear search can be skipped and we can assert
3248	* at an earlier point.
3249	*
3250	* @param pPool The pool.
3251	* @param pPage The page.
3252	* @param HCPhys The host physical address corresponding to the guest page.
3253	* @param GCPhys The guest physical address corresponding to HCPhys.
3254	*/
3255	static void pgmPoolTracDerefGCPhys(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTHCPHYS HCPhys, RTGCPHYS GCPhys)
3256	{
3257	/*
3258	* Walk range list.
3259	*/
3260	PPGMRAMRANGE pRam = pPool->CTX_SUFF(pVM)->pgm.s.CTX_SUFF(pRamRanges);
3261	while (pRam)
3262	{
3263	RTGCPHYS off = GCPhys - pRam->GCPhys;
3264	if (off < pRam->cb)
3265	{
3266	/* does it match? */
3267	const unsigned iPage = off >> PAGE_SHIFT;
3268	Assert(PGM_PAGE_GET_HCPHYS(&pRam->aPages[iPage]));
3269	#ifdef LOG_ENABLED
3270	RTHCPHYS HCPhysPage = PGM_PAGE_GET_HCPHYS(&pRam->aPages[iPage]);
3271	Log2(("pgmPoolTracDerefGCPhys %RHp vs %RHp\n", HCPhysPage, HCPhys));
3272	#endif
3273	if (PGM_PAGE_GET_HCPHYS(&pRam->aPages[iPage]) == HCPhys)
3274	{
3275	pgmTrackDerefGCPhys(pPool, pPage, &pRam->aPages[iPage]);
3276	return;
3277	}
3278	break;
3279	}
3280	pRam = pRam->CTX_SUFF(pNext);
3281	}
3282	AssertFatalMsgFailed(("HCPhys=%RHp GCPhys=%RGp\n", HCPhys, GCPhys));
3283	}
3284
3285
3286	/**
3287	* Clear references to guest physical memory.
3288	*
3289	* @param pPool The pool.
3290	* @param pPage The page.
3291	* @param HCPhys The host physical address corresponding to the guest page.
3292	* @param GCPhysHint The guest physical address which may corresponding to HCPhys.
3293	*/
3294	static void pgmPoolTracDerefGCPhysHint(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTHCPHYS HCPhys, RTGCPHYS GCPhysHint)
3295	{
3296	Log4(("pgmPoolTracDerefGCPhysHint %RHp %RGp\n", HCPhys, GCPhysHint));
3297
3298	/*
3299	* Walk range list.
3300	*/
3301	PPGMRAMRANGE pRam = pPool->CTX_SUFF(pVM)->pgm.s.CTX_SUFF(pRamRanges);
3302	while (pRam)
3303	{
3304	RTGCPHYS off = GCPhysHint - pRam->GCPhys;
3305	if (off < pRam->cb)
3306	{
3307	/* does it match? */
3308	const unsigned iPage = off >> PAGE_SHIFT;
3309	Assert(PGM_PAGE_GET_HCPHYS(&pRam->aPages[iPage]));
3310	if (PGM_PAGE_GET_HCPHYS(&pRam->aPages[iPage]) == HCPhys)
3311	{
3312	pgmTrackDerefGCPhys(pPool, pPage, &pRam->aPages[iPage]);
3313	return;
3314	}
3315	break;
3316	}
3317	pRam = pRam->CTX_SUFF(pNext);
3318	}
3319
3320	/*
3321	* Damn, the hint didn't work. We'll have to do an expensive linear search.
3322	*/
3323	STAM_COUNTER_INC(&pPool->StatTrackLinearRamSearches);
3324	pRam = pPool->CTX_SUFF(pVM)->pgm.s.CTX_SUFF(pRamRanges);
3325	while (pRam)
3326	{
3327	unsigned iPage = pRam->cb >> PAGE_SHIFT;
3328	while (iPage-- > 0)
3329	{
3330	if (PGM_PAGE_GET_HCPHYS(&pRam->aPages[iPage]) == HCPhys)
3331	{
3332	Log4(("pgmPoolTracDerefGCPhysHint: Linear HCPhys=%RHp GCPhysHint=%RGp GCPhysReal=%RGp\n",
3333	HCPhys, GCPhysHint, pRam->GCPhys + (iPage << PAGE_SHIFT)));
3334	pgmTrackDerefGCPhys(pPool, pPage, &pRam->aPages[iPage]);
3335	return;
3336	}
3337	}
3338	pRam = pRam->CTX_SUFF(pNext);
3339	}
3340
3341	AssertFatalMsgFailed(("HCPhys=%RHp GCPhysHint=%RGp\n", HCPhys, GCPhysHint));
3342	}
3343
3344
3345	/**
3346	* Clear references to guest physical memory in a 32-bit / 32-bit page table.
3347	*
3348	* @param pPool The pool.
3349	* @param pPage The page.
3350	* @param pShwPT The shadow page table (mapping of the page).
3351	* @param pGstPT The guest page table.
3352	*/
3353	DECLINLINE(void) pgmPoolTrackDerefPT32Bit32Bit(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PT pShwPT, PCX86PT pGstPT)
3354	{
3355	for (unsigned i = pPage->iFirstPresent; i < RT_ELEMENTS(pShwPT->a); i++)
3356	if (pShwPT->a[i].n.u1Present)
3357	{
3358	Log4(("pgmPoolTrackDerefPT32Bit32Bit: i=%d pte=%RX32 hint=%RX32\n",
3359	i, pShwPT->a[i].u & X86_PTE_PG_MASK, pGstPT->a[i].u & X86_PTE_PG_MASK));
3360	pgmPoolTracDerefGCPhysHint(pPool, pPage, pShwPT->a[i].u & X86_PTE_PG_MASK, pGstPT->a[i].u & X86_PTE_PG_MASK);
3361	if (!--pPage->cPresent)
3362	break;
3363	}
3364	}
3365
3366
3367	/**
3368	* Clear references to guest physical memory in a PAE / 32-bit page table.
3369	*
3370	* @param pPool The pool.
3371	* @param pPage The page.
3372	* @param pShwPT The shadow page table (mapping of the page).
3373	* @param pGstPT The guest page table (just a half one).
3374	*/
3375	DECLINLINE(void) pgmPoolTrackDerefPTPae32Bit(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PTPAE pShwPT, PCX86PT pGstPT)
3376	{
3377	for (unsigned i = 0; i < RT_ELEMENTS(pShwPT->a); i++)
3378	if (pShwPT->a[i].n.u1Present)
3379	{
3380	Log4(("pgmPoolTrackDerefPTPae32Bit: i=%d pte=%RX64 hint=%RX32\n",
3381	i, pShwPT->a[i].u & X86_PTE_PAE_PG_MASK, pGstPT->a[i].u & X86_PTE_PG_MASK));
3382	pgmPoolTracDerefGCPhysHint(pPool, pPage, pShwPT->a[i].u & X86_PTE_PAE_PG_MASK, pGstPT->a[i].u & X86_PTE_PG_MASK);
3383	}
3384	}
3385
3386
3387	/**
3388	* Clear references to guest physical memory in a PAE / PAE page table.
3389	*
3390	* @param pPool The pool.
3391	* @param pPage The page.
3392	* @param pShwPT The shadow page table (mapping of the page).
3393	* @param pGstPT The guest page table.
3394	*/
3395	DECLINLINE(void) pgmPoolTrackDerefPTPaePae(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PTPAE pShwPT, PCX86PTPAE pGstPT)
3396	{
3397	for (unsigned i = 0; i < RT_ELEMENTS(pShwPT->a); i++)
3398	if (pShwPT->a[i].n.u1Present)
3399	{
3400	Log4(("pgmPoolTrackDerefPTPaePae: i=%d pte=%RX32 hint=%RX32\n",
3401	i, pShwPT->a[i].u & X86_PTE_PAE_PG_MASK, pGstPT->a[i].u & X86_PTE_PAE_PG_MASK));
3402	pgmPoolTracDerefGCPhysHint(pPool, pPage, pShwPT->a[i].u & X86_PTE_PAE_PG_MASK, pGstPT->a[i].u & X86_PTE_PAE_PG_MASK);
3403	}
3404	}
3405
3406
3407	/**
3408	* Clear references to guest physical memory in a 32-bit / 4MB page table.
3409	*
3410	* @param pPool The pool.
3411	* @param pPage The page.
3412	* @param pShwPT The shadow page table (mapping of the page).
3413	*/
3414	DECLINLINE(void) pgmPoolTrackDerefPT32Bit4MB(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PT pShwPT)
3415	{
3416	RTGCPHYS GCPhys = pPage->GCPhys;
3417	for (unsigned i = 0; i < RT_ELEMENTS(pShwPT->a); i++, GCPhys += PAGE_SIZE)
3418	if (pShwPT->a[i].n.u1Present)
3419	{
3420	Log4(("pgmPoolTrackDerefPT32Bit4MB: i=%d pte=%RX32 GCPhys=%RGp\n",
3421	i, pShwPT->a[i].u & X86_PTE_PG_MASK, GCPhys));
3422	pgmPoolTracDerefGCPhys(pPool, pPage, pShwPT->a[i].u & X86_PTE_PG_MASK, GCPhys);
3423	}
3424	}
3425
3426
3427	/**
3428	* Clear references to guest physical memory in a PAE / 2/4MB page table.
3429	*
3430	* @param pPool The pool.
3431	* @param pPage The page.
3432	* @param pShwPT The shadow page table (mapping of the page).
3433	*/
3434	DECLINLINE(void) pgmPoolTrackDerefPTPaeBig(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PTPAE pShwPT)
3435	{
3436	RTGCPHYS GCPhys = pPage->GCPhys;
3437	for (unsigned i = 0; i < RT_ELEMENTS(pShwPT->a); i++, GCPhys += PAGE_SIZE)
3438	if (pShwPT->a[i].n.u1Present)
3439	{
3440	Log4(("pgmPoolTrackDerefPTPaeBig: i=%d pte=%RX64 hint=%RGp\n",
3441	i, pShwPT->a[i].u & X86_PTE_PAE_PG_MASK, GCPhys));
3442	pgmPoolTracDerefGCPhys(pPool, pPage, pShwPT->a[i].u & X86_PTE_PAE_PG_MASK, GCPhys);
3443	}
3444	}
3445
3446	#endif /* PGMPOOL_WITH_GCPHYS_TRACKING */
3447
3448
3449	/**
3450	* Clear references to shadowed pages in a 32 bits page directory.
3451	*
3452	* @param pPool The pool.
3453	* @param pPage The page.
3454	* @param pShwPD The shadow page directory (mapping of the page).
3455	*/
3456	DECLINLINE(void) pgmPoolTrackDerefPD(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PD pShwPD)
3457	{
3458	for (unsigned i = 0; i < RT_ELEMENTS(pShwPD->a); i++)
3459	{
3460	if ( pShwPD->a[i].n.u1Present
3461	&& !(pShwPD->a[i].u & PGM_PDFLAGS_MAPPING)
3462	)
3463	{
3464	PPGMPOOLPAGE pSubPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, pShwPD->a[i].u & X86_PDE_PG_MASK);
3465	if (pSubPage)
3466	pgmPoolTrackFreeUser(pPool, pSubPage, pPage->idx, i);
3467	else
3468	AssertFatalMsgFailed(("%x\n", pShwPD->a[i].u & X86_PDE_PG_MASK));
3469	}
3470	}
3471	}
3472
3473	/**
3474	* Clear references to shadowed pages in a PAE (legacy or 64 bits) page directory.
3475	*
3476	* @param pPool The pool.
3477	* @param pPage The page.
3478	* @param pShwPD The shadow page directory (mapping of the page).
3479	*/
3480	DECLINLINE(void) pgmPoolTrackDerefPDPae(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PDPAE pShwPD)
3481	{
3482	for (unsigned i = 0; i < RT_ELEMENTS(pShwPD->a); i++)
3483	{
3484	if ( pShwPD->a[i].n.u1Present
3485	&& !(pShwPD->a[i].u & PGM_PDFLAGS_MAPPING)
3486	)
3487	{
3488	PPGMPOOLPAGE pSubPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, pShwPD->a[i].u & X86_PDE_PAE_PG_MASK);
3489	if (pSubPage)
3490	pgmPoolTrackFreeUser(pPool, pSubPage, pPage->idx, i);
3491	else
3492	AssertFatalMsgFailed(("%RX64\n", pShwPD->a[i].u & X86_PDE_PAE_PG_MASK));
3493	/** @todo 64-bit guests: have to ensure that we're not exhausting the dynamic mappings! */
3494	}
3495	}
3496	}
3497
3498
3499	/**
3500	* Clear references to shadowed pages in a 64-bit page directory pointer table.
3501	*
3502	* @param pPool The pool.
3503	* @param pPage The page.
3504	* @param pShwPDPT The shadow page directory pointer table (mapping of the page).
3505	*/
3506	DECLINLINE(void) pgmPoolTrackDerefPDPT64Bit(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PDPT pShwPDPT)
3507	{
3508	for (unsigned i = 0; i < RT_ELEMENTS(pShwPDPT->a); i++)
3509	{
3510	if ( pShwPDPT->a[i].n.u1Present
3511	&& !(pShwPDPT->a[i].u & PGM_PLXFLAGS_MAPPING)
3512	)
3513	{
3514	PPGMPOOLPAGE pSubPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, pShwPDPT->a[i].u & X86_PDPE_PG_MASK);
3515	if (pSubPage)
3516	pgmPoolTrackFreeUser(pPool, pSubPage, pPage->idx, i);
3517	else
3518	AssertFatalMsgFailed(("%RX64\n", pShwPDPT->a[i].u & X86_PDPE_PG_MASK));
3519	/** @todo 64-bit guests: have to ensure that we're not exhausting the dynamic mappings! */
3520	}
3521	}
3522	}
3523
3524
3525	/**
3526	* Clear references to shadowed pages in a 64-bit level 4 page table.
3527	*
3528	* @param pPool The pool.
3529	* @param pPage The page.
3530	* @param pShwPML4 The shadow page directory pointer table (mapping of the page).
3531	*/
3532	DECLINLINE(void) pgmPoolTrackDerefPML464Bit(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PML4 pShwPML4)
3533	{
3534	for (unsigned i = 0; i < RT_ELEMENTS(pShwPML4->a); i++)
3535	{
3536	if (pShwPML4->a[i].n.u1Present)
3537	{
3538	PPGMPOOLPAGE pSubPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, pShwPML4->a[i].u & X86_PDPE_PG_MASK);
3539	if (pSubPage)
3540	pgmPoolTrackFreeUser(pPool, pSubPage, pPage->idx, i);
3541	else
3542	AssertFatalMsgFailed(("%RX64\n", pShwPML4->a[i].u & X86_PML4E_PG_MASK));
3543	/** @todo 64-bit guests: have to ensure that we're not exhausting the dynamic mappings! */
3544	}
3545	}
3546	}
3547
3548
3549	/**
3550	* Clear references to shadowed pages in an EPT page table.
3551	*
3552	* @param pPool The pool.
3553	* @param pPage The page.
3554	* @param pShwPML4 The shadow page directory pointer table (mapping of the page).
3555	*/
3556	DECLINLINE(void) pgmPoolTrackDerefPTEPT(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PEPTPT pShwPT)
3557	{
3558	RTGCPHYS GCPhys = pPage->GCPhys;
3559	for (unsigned i = 0; i < RT_ELEMENTS(pShwPT->a); i++, GCPhys += PAGE_SIZE)
3560	if (pShwPT->a[i].n.u1Present)
3561	{
3562	Log4(("pgmPoolTrackDerefPTEPT: i=%d pte=%RX64 GCPhys=%RX64\n",
3563	i, pShwPT->a[i].u & EPT_PTE_PG_MASK, pPage->GCPhys));
3564	pgmPoolTracDerefGCPhys(pPool, pPage, pShwPT->a[i].u & EPT_PTE_PG_MASK, GCPhys);
3565	}
3566	}
3567
3568
3569	/**
3570	* Clear references to shadowed pages in an EPT page directory.
3571	*
3572	* @param pPool The pool.
3573	* @param pPage The page.
3574	* @param pShwPD The shadow page directory (mapping of the page).
3575	*/
3576	DECLINLINE(void) pgmPoolTrackDerefPDEPT(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PEPTPD pShwPD)
3577	{
3578	for (unsigned i = 0; i < RT_ELEMENTS(pShwPD->a); i++)
3579	{
3580	if (pShwPD->a[i].n.u1Present)
3581	{
3582	PPGMPOOLPAGE pSubPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, pShwPD->a[i].u & EPT_PDE_PG_MASK);
3583	if (pSubPage)
3584	pgmPoolTrackFreeUser(pPool, pSubPage, pPage->idx, i);
3585	else
3586	AssertFatalMsgFailed(("%RX64\n", pShwPD->a[i].u & EPT_PDE_PG_MASK));
3587	/** @todo 64-bit guests: have to ensure that we're not exhausting the dynamic mappings! */
3588	}
3589	}
3590	}
3591
3592
3593	/**
3594	* Clear references to shadowed pages in an EPT page directory pointer table.
3595	*
3596	* @param pPool The pool.
3597	* @param pPage The page.
3598	* @param pShwPDPT The shadow page directory pointer table (mapping of the page).
3599	*/
3600	DECLINLINE(void) pgmPoolTrackDerefPDPTEPT(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PEPTPDPT pShwPDPT)
3601	{
3602	for (unsigned i = 0; i < RT_ELEMENTS(pShwPDPT->a); i++)
3603	{
3604	if (pShwPDPT->a[i].n.u1Present)
3605	{
3606	PPGMPOOLPAGE pSubPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, pShwPDPT->a[i].u & EPT_PDPTE_PG_MASK);
3607	if (pSubPage)
3608	pgmPoolTrackFreeUser(pPool, pSubPage, pPage->idx, i);
3609	else
3610	AssertFatalMsgFailed(("%RX64\n", pShwPDPT->a[i].u & EPT_PDPTE_PG_MASK));
3611	/** @todo 64-bit guests: have to ensure that we're not exhausting the dynamic mappings! */
3612	}
3613	}
3614	}
3615
3616
3617	/**
3618	* Clears all references made by this page.
3619	*
3620	* This includes other shadow pages and GC physical addresses.
3621	*
3622	* @param pPool The pool.
3623	* @param pPage The page.
3624	*/
3625	static void pgmPoolTrackDeref(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
3626	{
3627	/*
3628	* Map the shadow page and take action according to the page kind.
3629	*/
3630	void *pvShw = PGMPOOL_PAGE_2_LOCKED_PTR(pPool->CTX_SUFF(pVM), pPage);
3631	switch (pPage->enmKind)
3632	{
3633	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
3634	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
3635	{
3636	STAM_PROFILE_START(&pPool->StatTrackDerefGCPhys, g);
3637	void *pvGst;
3638	int rc = PGM_GCPHYS_2_PTR(pPool->CTX_SUFF(pVM), pPage->GCPhys, &pvGst); AssertReleaseRC(rc);
3639	pgmPoolTrackDerefPT32Bit32Bit(pPool, pPage, (PX86PT)pvShw, (PCX86PT)pvGst);
3640	STAM_PROFILE_STOP(&pPool->StatTrackDerefGCPhys, g);
3641	break;
3642	}
3643
3644	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
3645	{
3646	STAM_PROFILE_START(&pPool->StatTrackDerefGCPhys, g);
3647	void *pvGst;
3648	int rc = PGM_GCPHYS_2_PTR_EX(pPool->CTX_SUFF(pVM), pPage->GCPhys, &pvGst); AssertReleaseRC(rc);
3649	pgmPoolTrackDerefPTPae32Bit(pPool, pPage, (PX86PTPAE)pvShw, (PCX86PT)pvGst);
3650	STAM_PROFILE_STOP(&pPool->StatTrackDerefGCPhys, g);
3651	break;
3652	}
3653
3654	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
3655	{
3656	STAM_PROFILE_START(&pPool->StatTrackDerefGCPhys, g);
3657	void *pvGst;
3658	int rc = PGM_GCPHYS_2_PTR(pPool->CTX_SUFF(pVM), pPage->GCPhys, &pvGst); AssertReleaseRC(rc);
3659	pgmPoolTrackDerefPTPaePae(pPool, pPage, (PX86PTPAE)pvShw, (PCX86PTPAE)pvGst);
3660	STAM_PROFILE_STOP(&pPool->StatTrackDerefGCPhys, g);
3661	break;
3662	}
3663
3664	case PGMPOOLKIND_32BIT_PT_FOR_PHYS: /* treat it like a 4 MB page */
3665	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
3666	{
3667	STAM_PROFILE_START(&pPool->StatTrackDerefGCPhys, g);
3668	pgmPoolTrackDerefPT32Bit4MB(pPool, pPage, (PX86PT)pvShw);
3669	STAM_PROFILE_STOP(&pPool->StatTrackDerefGCPhys, g);
3670	break;
3671	}
3672
3673	case PGMPOOLKIND_PAE_PT_FOR_PHYS: /* treat it like a 2 MB page */
3674	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
3675	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
3676	{
3677	STAM_PROFILE_START(&pPool->StatTrackDerefGCPhys, g);
3678	pgmPoolTrackDerefPTPaeBig(pPool, pPage, (PX86PTPAE)pvShw);
3679	STAM_PROFILE_STOP(&pPool->StatTrackDerefGCPhys, g);
3680	break;
3681	}
3682
3683	#else /* !PGMPOOL_WITH_GCPHYS_TRACKING */
3684	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
3685	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
3686	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
3687	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
3688	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
3689	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
3690	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
3691	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
3692	break;
3693	#endif /* !PGMPOOL_WITH_GCPHYS_TRACKING */
3694
3695	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
3696	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
3697	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
3698	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
3699	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
3700	case PGMPOOLKIND_PAE_PD_PHYS:
3701	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
3702	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
3703	pgmPoolTrackDerefPDPae(pPool, pPage, (PX86PDPAE)pvShw);
3704	break;
3705
3706	case PGMPOOLKIND_32BIT_PD_PHYS:
3707	case PGMPOOLKIND_32BIT_PD:
3708	pgmPoolTrackDerefPD(pPool, pPage, (PX86PD)pvShw);
3709	break;
3710
3711	case PGMPOOLKIND_PAE_PDPT_FOR_32BIT:
3712	case PGMPOOLKIND_PAE_PDPT:
3713	case PGMPOOLKIND_PAE_PDPT_PHYS:
3714	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
3715	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
3716	pgmPoolTrackDerefPDPT64Bit(pPool, pPage, (PX86PDPT)pvShw);
3717	break;
3718
3719	case PGMPOOLKIND_64BIT_PML4:
3720	pgmPoolTrackDerefPML464Bit(pPool, pPage, (PX86PML4)pvShw);
3721	break;
3722
3723	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
3724	pgmPoolTrackDerefPTEPT(pPool, pPage, (PEPTPT)pvShw);
3725	break;
3726
3727	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
3728	pgmPoolTrackDerefPDEPT(pPool, pPage, (PEPTPD)pvShw);
3729	break;
3730
3731	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
3732	pgmPoolTrackDerefPDPTEPT(pPool, pPage, (PEPTPDPT)pvShw);
3733	break;
3734
3735	default:
3736	AssertFatalMsgFailed(("enmKind=%d\n", pPage->enmKind));
3737	}
3738
3739	/* paranoia, clear the shadow page. Remove this laser (i.e. let Alloc and ClearAll do it). */
3740	STAM_PROFILE_START(&pPool->StatZeroPage, z);
3741	ASMMemZeroPage(pvShw);
3742	STAM_PROFILE_STOP(&pPool->StatZeroPage, z);
3743	pPage->fZeroed = true;
3744	PGMPOOL_UNLOCK_PTR(pPool->CTX_SUFF(pVM), pvShw);
3745	}
3746
3747	#endif /* PGMPOOL_WITH_USER_TRACKING */
3748
3749
3750	#ifdef IN_RING3
3751	/**
3752	* Flushes all the special root pages as part of a pgmPoolFlushAllInt operation.
3753	*
3754	* @param pPool The pool.
3755	*/
3756	static void pgmPoolFlushAllSpecialRoots(PPGMPOOL pPool)
3757	{
3758	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
3759	/* Start a subset so we won't run out of mapping space. */
3760	PVMCPU pVCpu = VMMGetCpu(pPool->CTX_SUFF(pVM));
3761	uint32_t iPrevSubset = PGMDynMapPushAutoSubset(pVCpu);
3762	#endif
3763
3764	/*
3765	* These special pages are all mapped into the indexes 1..PGMPOOL_IDX_FIRST.
3766	*/
3767	Assert(NIL_PGMPOOL_IDX == 0);
3768
3769	/*
3770	* Paranoia (to be removed), flag a global CR3 sync.
3771	*/
3772	VM_FF_SET(pPool->CTX_SUFF(pVM), VM_FF_PGM_SYNC_CR3);
3773
3774	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
3775	/* Pop the subset. */
3776	PGMDynMapPopAutoSubset(pVCpu, iPrevSubset);
3777	#endif
3778	}
3779
3780
3781	/**
3782	* Flushes the entire cache.
3783	*
3784	* It will assert a global CR3 flush (FF) and assumes the caller is aware of this
3785	* and execute this CR3 flush.
3786	*
3787	* @param pPool The pool.
3788	*/
3789	static void pgmPoolFlushAllInt(PPGMPOOL pPool)
3790	{
3791	PVM pVM = pPool->CTX_SUFF(pVM);
3792
3793	STAM_PROFILE_START(&pPool->StatFlushAllInt, a);
3794	LogFlow(("pgmPoolFlushAllInt:\n"));
3795
3796	/*
3797	* If there are no pages in the pool, there is nothing to do.
3798	*/
3799	if (pPool->cCurPages <= PGMPOOL_IDX_FIRST)
3800	{
3801	STAM_PROFILE_STOP(&pPool->StatFlushAllInt, a);
3802	return;
3803	}
3804
3805	/* Unmap the old CR3 value before flushing everything. */
3806	int rc = PGM_BTH_PFN(UnmapCR3, pVM)(pVM);
3807	AssertRC(rc);
3808
3809	/* Exit the current shadow paging mode as well; nested paging and EPT use a root CR3 which will get flushed here. */
3810	rc = PGM_SHW_PFN(Exit, pVM)(pVM);
3811	AssertRC(rc);
3812
3813	/*
3814	* Nuke the free list and reinsert all pages into it.
3815	*/
3816	for (unsigned i = pPool->cCurPages - 1; i >= PGMPOOL_IDX_FIRST; i--)
3817	{
3818	PPGMPOOLPAGE pPage = &pPool->aPages[i];
3819
3820	#ifdef IN_RING3
3821	Assert(pPage->Core.Key == MMPage2Phys(pVM, pPage->pvPageR3));
3822	#endif
3823	#ifdef PGMPOOL_WITH_MONITORING
3824	if (pPage->fMonitored)
3825	pgmPoolMonitorFlush(pPool, pPage);
3826	pPage->iModifiedNext = NIL_PGMPOOL_IDX;
3827	pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
3828	pPage->iMonitoredNext = NIL_PGMPOOL_IDX;
3829	pPage->iMonitoredPrev = NIL_PGMPOOL_IDX;
3830	pPage->cModifications = 0;
3831	#endif
3832	pPage->GCPhys = NIL_RTGCPHYS;
3833	pPage->enmKind = PGMPOOLKIND_FREE;
3834	Assert(pPage->idx == i);
3835	pPage->iNext = i + 1;
3836	pPage->fZeroed = false; /* This could probably be optimized, but better safe than sorry. */
3837	pPage->fSeenNonGlobal = false;
3838	pPage->fMonitored= false;
3839	pPage->fCached = false;
3840	pPage->fReusedFlushPending = false;
3841	#ifdef PGMPOOL_WITH_USER_TRACKING
3842	pPage->iUserHead = NIL_PGMPOOL_USER_INDEX;
3843	#else
3844	pPage->fCR3Mix = false;
3845	#endif
3846	#ifdef PGMPOOL_WITH_CACHE
3847	pPage->iAgeNext = NIL_PGMPOOL_IDX;
3848	pPage->iAgePrev = NIL_PGMPOOL_IDX;
3849	#endif
3850	pPage->fLocked = false;
3851	}
3852	pPool->aPages[pPool->cCurPages - 1].iNext = NIL_PGMPOOL_IDX;
3853	pPool->iFreeHead = PGMPOOL_IDX_FIRST;
3854	pPool->cUsedPages = 0;
3855
3856	#ifdef PGMPOOL_WITH_USER_TRACKING
3857	/*
3858	* Zap and reinitialize the user records.
3859	*/
3860	pPool->cPresent = 0;
3861	pPool->iUserFreeHead = 0;
3862	PPGMPOOLUSER paUsers = pPool->CTX_SUFF(paUsers);
3863	const unsigned cMaxUsers = pPool->cMaxUsers;
3864	for (unsigned i = 0; i < cMaxUsers; i++)
3865	{
3866	paUsers[i].iNext = i + 1;
3867	paUsers[i].iUser = NIL_PGMPOOL_IDX;
3868	paUsers[i].iUserTable = 0xfffffffe;
3869	}
3870	paUsers[cMaxUsers - 1].iNext = NIL_PGMPOOL_USER_INDEX;
3871	#endif
3872
3873	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
3874	/*
3875	* Clear all the GCPhys links and rebuild the phys ext free list.
3876	*/
3877	for (PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
3878	pRam;
3879	pRam = pRam->CTX_SUFF(pNext))
3880	{
3881	unsigned iPage = pRam->cb >> PAGE_SHIFT;
3882	while (iPage-- > 0)
3883	PGM_PAGE_SET_TRACKING(&pRam->aPages[iPage], 0);
3884	}
3885
3886	pPool->iPhysExtFreeHead = 0;
3887	PPGMPOOLPHYSEXT paPhysExts = pPool->CTX_SUFF(paPhysExts);
3888	const unsigned cMaxPhysExts = pPool->cMaxPhysExts;
3889	for (unsigned i = 0; i < cMaxPhysExts; i++)
3890	{
3891	paPhysExts[i].iNext = i + 1;
3892	paPhysExts[i].aidx[0] = NIL_PGMPOOL_IDX;
3893	paPhysExts[i].aidx[1] = NIL_PGMPOOL_IDX;
3894	paPhysExts[i].aidx[2] = NIL_PGMPOOL_IDX;
3895	}
3896	paPhysExts[cMaxPhysExts - 1].iNext = NIL_PGMPOOL_PHYSEXT_INDEX;
3897	#endif
3898
3899	#ifdef PGMPOOL_WITH_MONITORING
3900	/*
3901	* Just zap the modified list.
3902	*/
3903	pPool->cModifiedPages = 0;
3904	pPool->iModifiedHead = NIL_PGMPOOL_IDX;
3905	#endif
3906
3907	#ifdef PGMPOOL_WITH_CACHE
3908	/*
3909	* Clear the GCPhys hash and the age list.
3910	*/
3911	for (unsigned i = 0; i < RT_ELEMENTS(pPool->aiHash); i++)
3912	pPool->aiHash[i] = NIL_PGMPOOL_IDX;
3913	pPool->iAgeHead = NIL_PGMPOOL_IDX;
3914	pPool->iAgeTail = NIL_PGMPOOL_IDX;
3915	#endif
3916
3917	/*
3918	* Flush all the special root pages.
3919	* Reinsert active pages into the hash and ensure monitoring chains are correct.
3920	*/
3921	pgmPoolFlushAllSpecialRoots(pPool);
3922	for (unsigned i = PGMPOOL_IDX_FIRST_SPECIAL; i < PGMPOOL_IDX_FIRST; i++)
3923	{
3924	PPGMPOOLPAGE pPage = &pPool->aPages[i];
3925	pPage->iNext = NIL_PGMPOOL_IDX;
3926	#ifdef PGMPOOL_WITH_MONITORING
3927	pPage->iModifiedNext = NIL_PGMPOOL_IDX;
3928	pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
3929	pPage->cModifications = 0;
3930	/* ASSUMES that we're not sharing with any of the other special pages (safe for now). */
3931	pPage->iMonitoredNext = NIL_PGMPOOL_IDX;
3932	pPage->iMonitoredPrev = NIL_PGMPOOL_IDX;
3933	if (pPage->fMonitored)
3934	{
3935	int rc = PGMHandlerPhysicalChangeCallbacks(pVM, pPage->GCPhys & ~(RTGCPHYS)(PAGE_SIZE - 1),
3936	pPool->pfnAccessHandlerR3, MMHyperCCToR3(pVM, pPage),
3937	pPool->pfnAccessHandlerR0, MMHyperCCToR0(pVM, pPage),
3938	pPool->pfnAccessHandlerRC, MMHyperCCToRC(pVM, pPage),
3939	pPool->pszAccessHandler);
3940	AssertFatalRCSuccess(rc);
3941	# ifdef PGMPOOL_WITH_CACHE
3942	pgmPoolHashInsert(pPool, pPage);
3943	# endif
3944	}
3945	#endif
3946	#ifdef PGMPOOL_WITH_USER_TRACKING
3947	Assert(pPage->iUserHead == NIL_PGMPOOL_USER_INDEX); /* for now */
3948	#endif
3949	#ifdef PGMPOOL_WITH_CACHE
3950	Assert(pPage->iAgeNext == NIL_PGMPOOL_IDX);
3951	Assert(pPage->iAgePrev == NIL_PGMPOOL_IDX);
3952	#endif
3953	}
3954
3955	/* Force a shadow mode reinit (necessary for nested paging and ept). */
3956	pVM->pgm.s.enmShadowMode = PGMMODE_INVALID;
3957
3958	/* Reinit the current shadow paging mode as well; nested paging and EPT use a root CR3 which will get flushed here. */
3959	rc = PGMR3ChangeMode(pVM, PGMGetGuestMode(pVM));
3960	AssertRC(rc);
3961
3962	/*
3963	* Finally, assert the FF.
3964	*/
3965	VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
3966
3967	STAM_PROFILE_STOP(&pPool->StatFlushAllInt, a);
3968	}
3969	#endif /* IN_RING3 */
3970
3971	/**
3972	* Flushes a pool page.
3973	*
3974	* This moves the page to the free list after removing all user references to it.
3975	* In GC this will cause a CR3 reload if the page is traced back to an active root page.
3976	*
3977	* @returns VBox status code.
3978	* @retval VINF_SUCCESS on success.
3979	* @retval VERR_PGM_POOL_CLEARED if the deregistration of the physical handler will cause a light weight pool flush.
3980	* @param pPool The pool.
3981	* @param HCPhys The HC physical address of the shadow page.
3982	*/
3983	int pgmPoolFlushPage(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
3984	{
3985	int rc = VINF_SUCCESS;
3986	STAM_PROFILE_START(&pPool->StatFlushPage, f);
3987	LogFlow(("pgmPoolFlushPage: pPage=%p:{.Key=%RHp, .idx=%d, .enmKind=%s, .GCPhys=%RGp}\n",
3988	pPage, pPage->Core.Key, pPage->idx, pgmPoolPoolKindToStr(pPage->enmKind), pPage->GCPhys));
3989
3990	/*
3991	* Quietly reject any attempts at flushing any of the special root pages.
3992	*/
3993	if (pPage->idx < PGMPOOL_IDX_FIRST)
3994	{
3995	Log(("pgmPoolFlushPage: special root page, rejected. enmKind=%s idx=%d\n", pgmPoolPoolKindToStr(pPage->enmKind), pPage->idx));
3996	return VINF_SUCCESS;
3997	}
3998
3999	/*
4000	* Quietly reject any attempts at flushing the currently active shadow CR3 mapping
4001	*/
4002	if (pgmPoolIsPageLocked(&pPool->CTX_SUFF(pVM)->pgm.s, pPage))
4003	{
4004	AssertMsg( pPage->enmKind == PGMPOOLKIND_64BIT_PML4
4005	\|\| pPage->enmKind == PGMPOOLKIND_PAE_PDPT
4006	\|\| pPage->enmKind == PGMPOOLKIND_PAE_PDPT_FOR_32BIT
4007	\|\| pPage->enmKind == PGMPOOLKIND_32BIT_PD
4008	\|\| pPage->enmKind == PGMPOOLKIND_PAE_PD_FOR_PAE_PD
4009	\|\| pPage->enmKind == PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD
4010	\|\| pPage->enmKind == PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD
4011	\|\| pPage->enmKind == PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD
4012	\|\| pPage->enmKind == PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD,
4013	("Can't free the shadow CR3! (%RHp vs %RHp kind=%d\n", PGMGetHyperCR3(pPool->CTX_SUFF(pVM)), pPage->Core.Key, pPage->enmKind));
4014	Log(("pgmPoolFlushPage: current active shadow CR3, rejected. enmKind=%s idx=%d\n", pgmPoolPoolKindToStr(pPage->enmKind), pPage->idx));
4015	return VINF_SUCCESS;
4016	}
4017
4018	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
4019	/* Start a subset so we won't run out of mapping space. */
4020	PVMCPU pVCpu = VMMGetCpu(pPool->CTX_SUFF(pVM));
4021	uint32_t iPrevSubset = PGMDynMapPushAutoSubset(pVCpu);
4022	#endif
4023
4024	/*
4025	* Mark the page as being in need of a ASMMemZeroPage().
4026	*/
4027	pPage->fZeroed = false;
4028
4029	#ifdef PGMPOOL_WITH_USER_TRACKING
4030	/*
4031	* Clear the page.
4032	*/
4033	pgmPoolTrackClearPageUsers(pPool, pPage);
4034	STAM_PROFILE_START(&pPool->StatTrackDeref,a);
4035	pgmPoolTrackDeref(pPool, pPage);
4036	STAM_PROFILE_STOP(&pPool->StatTrackDeref,a);
4037	#endif
4038
4039	#ifdef PGMPOOL_WITH_CACHE
4040	/*
4041	* Flush it from the cache.
4042	*/
4043	pgmPoolCacheFlushPage(pPool, pPage);
4044	#endif /* PGMPOOL_WITH_CACHE */
4045
4046	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
4047	/* Heavy stuff done. */
4048	PGMDynMapPopAutoSubset(pVCpu, iPrevSubset);
4049	#endif
4050
4051	#ifdef PGMPOOL_WITH_MONITORING
4052	/*
4053	* Deregistering the monitoring.
4054	*/
4055	if (pPage->fMonitored)
4056	rc = pgmPoolMonitorFlush(pPool, pPage);
4057	#endif
4058
4059	/*
4060	* Free the page.
4061	*/
4062	Assert(pPage->iNext == NIL_PGMPOOL_IDX);
4063	pPage->iNext = pPool->iFreeHead;
4064	pPool->iFreeHead = pPage->idx;
4065	pPage->enmKind = PGMPOOLKIND_FREE;
4066	pPage->GCPhys = NIL_RTGCPHYS;
4067	pPage->fReusedFlushPending = false;
4068
4069	pPool->cUsedPages--;
4070	STAM_PROFILE_STOP(&pPool->StatFlushPage, f);
4071	return rc;
4072	}
4073
4074
4075	/**
4076	* Frees a usage of a pool page.
4077	*
4078	* The caller is responsible to updating the user table so that it no longer
4079	* references the shadow page.
4080	*
4081	* @param pPool The pool.
4082	* @param HCPhys The HC physical address of the shadow page.
4083	* @param iUser The shadow page pool index of the user table.
4084	* @param iUserTable The index into the user table (shadowed).
4085	*/
4086	void pgmPoolFreeByPage(PPGMPOOL pPool, PPGMPOOLPAGE pPage, uint16_t iUser, uint32_t iUserTable)
4087	{
4088	STAM_PROFILE_START(&pPool->StatFree, a);
4089	LogFlow(("pgmPoolFreeByPage: pPage=%p:{.Key=%RHp, .idx=%d, enmKind=%s} iUser=%#x iUserTable=%#x\n",
4090	pPage, pPage->Core.Key, pPage->idx, pgmPoolPoolKindToStr(pPage->enmKind), iUser, iUserTable));
4091	Assert(pPage->idx >= PGMPOOL_IDX_FIRST);
4092	#ifdef PGMPOOL_WITH_USER_TRACKING
4093	pgmPoolTrackFreeUser(pPool, pPage, iUser, iUserTable);
4094	#endif
4095	#ifdef PGMPOOL_WITH_CACHE
4096	if (!pPage->fCached)
4097	#endif
4098	pgmPoolFlushPage(pPool, pPage); /* ASSUMES that VERR_PGM_POOL_CLEARED can be ignored here. */
4099	STAM_PROFILE_STOP(&pPool->StatFree, a);
4100	}
4101
4102
4103	/**
4104	* Makes one or more free page free.
4105	*
4106	* @returns VBox status code.
4107	* @retval VINF_SUCCESS on success.
4108	* @retval VERR_PGM_POOL_FLUSHED if the pool was flushed.
4109	*
4110	* @param pPool The pool.
4111	* @param enmKind Page table kind
4112	* @param iUser The user of the page.
4113	*/
4114	static int pgmPoolMakeMoreFreePages(PPGMPOOL pPool, PGMPOOLKIND enmKind, uint16_t iUser)
4115	{
4116	LogFlow(("pgmPoolMakeMoreFreePages: iUser=%#x\n", iUser));
4117
4118	/*
4119	* If the pool isn't full grown yet, expand it.
4120	*/
4121	if ( pPool->cCurPages < pPool->cMaxPages
4122	#if defined(IN_RC)
4123	/* Hack alert: we can't deal with jumps to ring 3 when called from MapCR3 and allocating pages for PAE PDs. */
4124	&& enmKind != PGMPOOLKIND_PAE_PD_FOR_PAE_PD
4125	&& (enmKind < PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD \|\| enmKind > PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD)
4126	#endif
4127	)
4128	{
4129	STAM_PROFILE_ADV_SUSPEND(&pPool->StatAlloc, a);
4130	#ifdef IN_RING3
4131	int rc = PGMR3PoolGrow(pPool->pVMR3);
4132	#else
4133	int rc = CTXALLMID(VMM, CallHost)(pPool->CTX_SUFF(pVM), VMMCALLHOST_PGM_POOL_GROW, 0);
4134	#endif
4135	if (RT_FAILURE(rc))
4136	return rc;
4137	STAM_PROFILE_ADV_RESUME(&pPool->StatAlloc, a);
4138	if (pPool->iFreeHead != NIL_PGMPOOL_IDX)
4139	return VINF_SUCCESS;
4140	}
4141
4142	#ifdef PGMPOOL_WITH_CACHE
4143	/*
4144	* Free one cached page.
4145	*/
4146	return pgmPoolCacheFreeOne(pPool, iUser);
4147	#else
4148	/*
4149	* Flush the pool.
4150	*
4151	* If we have tracking enabled, it should be possible to come up with
4152	* a cheap replacement strategy...
4153	*/
4154	/* @todo incompatible with long mode paging (cr3 root will be flushed) */
4155	Assert(!CPUMIsGuestInLongMode(pVM));
4156	pgmPoolFlushAllInt(pPool);
4157	return VERR_PGM_POOL_FLUSHED;
4158	#endif
4159	}
4160
4161
4162	/**
4163	* Allocates a page from the pool.
4164	*
4165	* This page may actually be a cached page and not in need of any processing
4166	* on the callers part.
4167	*
4168	* @returns VBox status code.
4169	* @retval VINF_SUCCESS if a NEW page was allocated.
4170	* @retval VINF_PGM_CACHED_PAGE if a CACHED page was returned.
4171	* @retval VERR_PGM_POOL_FLUSHED if the pool was flushed.
4172	* @param pVM The VM handle.
4173	* @param GCPhys The GC physical address of the page we're gonna shadow.
4174	* For 4MB and 2MB PD entries, it's the first address the
4175	* shadow PT is covering.
4176	* @param enmKind The kind of mapping.
4177	* @param iUser The shadow page pool index of the user table.
4178	* @param iUserTable The index into the user table (shadowed).
4179	* @param ppPage Where to store the pointer to the page. NULL is stored here on failure.
4180	*/
4181	int pgmPoolAlloc(PVM pVM, RTGCPHYS GCPhys, PGMPOOLKIND enmKind, uint16_t iUser, uint32_t iUserTable, PPPGMPOOLPAGE ppPage)
4182	{
4183	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
4184	STAM_PROFILE_ADV_START(&pPool->StatAlloc, a);
4185	LogFlow(("pgmPoolAlloc: GCPhys=%RGp enmKind=%s iUser=%#x iUserTable=%#x\n", GCPhys, pgmPoolPoolKindToStr(enmKind), iUser, iUserTable));
4186	*ppPage = NULL;
4187	/** @todo CSAM/PGMPrefetchPage messes up here during CSAMR3CheckGates
4188	* (TRPMR3SyncIDT) because of FF priority. Try fix that?
4189	* Assert(!(pVM->pgm.s.fSyncFlags & PGM_SYNC_CLEAR_PGM_POOL)); */
4190
4191	#ifdef PGMPOOL_WITH_CACHE
4192	if (pPool->fCacheEnabled)
4193	{
4194	int rc2 = pgmPoolCacheAlloc(pPool, GCPhys, enmKind, iUser, iUserTable, ppPage);
4195	if (RT_SUCCESS(rc2))
4196	{
4197	STAM_PROFILE_ADV_STOP(&pPool->StatAlloc, a);
4198	LogFlow(("pgmPoolAlloc: cached returns %Rrc ppPage=%p:{.Key=%RHp, .idx=%d}\n", rc2, ppPage, (ppPage)->Core.Key, (ppPage)->idx));
4199	return rc2;
4200	}
4201	}
4202	#endif
4203
4204	/*
4205	* Allocate a new one.
4206	*/
4207	int rc = VINF_SUCCESS;
4208	uint16_t iNew = pPool->iFreeHead;
4209	if (iNew == NIL_PGMPOOL_IDX)
4210	{
4211	rc = pgmPoolMakeMoreFreePages(pPool, enmKind, iUser);
4212	if (RT_FAILURE(rc))
4213	{
4214	if (rc != VERR_PGM_POOL_CLEARED)
4215	{
4216	Log(("pgmPoolAlloc: returns %Rrc (Free)\n", rc));
4217	STAM_PROFILE_ADV_STOP(&pPool->StatAlloc, a);
4218	return rc;
4219	}
4220	Log(("pgmPoolMakeMoreFreePages failed with %Rrc -> return VERR_PGM_POOL_FLUSHED\n", rc));
4221	rc = VERR_PGM_POOL_FLUSHED;
4222	}
4223	iNew = pPool->iFreeHead;
4224	AssertReleaseReturn(iNew != NIL_PGMPOOL_IDX, VERR_INTERNAL_ERROR);
4225	}
4226
4227	/* unlink the free head */
4228	PPGMPOOLPAGE pPage = &pPool->aPages[iNew];
4229	pPool->iFreeHead = pPage->iNext;
4230	pPage->iNext = NIL_PGMPOOL_IDX;
4231
4232	/*
4233	* Initialize it.
4234	*/
4235	pPool->cUsedPages++; /* physical handler registration / pgmPoolTrackFlushGCPhysPTsSlow requirement. */
4236	pPage->enmKind = enmKind;
4237	pPage->GCPhys = GCPhys;
4238	pPage->fSeenNonGlobal = false; /* Set this to 'true' to disable this feature. */
4239	pPage->fMonitored = false;
4240	pPage->fCached = false;
4241	pPage->fReusedFlushPending = false;
4242	#ifdef PGMPOOL_WITH_MONITORING
4243	pPage->cModifications = 0;
4244	pPage->iModifiedNext = NIL_PGMPOOL_IDX;
4245	pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
4246	#else
4247	pPage->fCR3Mix = false;
4248	#endif
4249	#ifdef PGMPOOL_WITH_USER_TRACKING
4250	pPage->cPresent = 0;
4251	pPage->iFirstPresent = ~0;
4252
4253	/*
4254	* Insert into the tracking and cache. If this fails, free the page.
4255	*/
4256	int rc3 = pgmPoolTrackInsert(pPool, pPage, GCPhys, iUser, iUserTable);
4257	if (RT_FAILURE(rc3))
4258	{
4259	if (rc3 != VERR_PGM_POOL_CLEARED)
4260	{
4261	pPool->cUsedPages--;
4262	pPage->enmKind = PGMPOOLKIND_FREE;
4263	pPage->GCPhys = NIL_RTGCPHYS;
4264	pPage->iNext = pPool->iFreeHead;
4265	pPool->iFreeHead = pPage->idx;
4266	STAM_PROFILE_ADV_STOP(&pPool->StatAlloc, a);
4267	Log(("pgmPoolAlloc: returns %Rrc (Insert)\n", rc3));
4268	return rc3;
4269	}
4270	Log(("pgmPoolTrackInsert failed with %Rrc -> return VERR_PGM_POOL_FLUSHED\n", rc3));
4271	rc = VERR_PGM_POOL_FLUSHED;
4272	}
4273	#endif /* PGMPOOL_WITH_USER_TRACKING */
4274
4275	/*
4276	* Commit the allocation, clear the page and return.
4277	*/
4278	#ifdef VBOX_WITH_STATISTICS
4279	if (pPool->cUsedPages > pPool->cUsedPagesHigh)
4280	pPool->cUsedPagesHigh = pPool->cUsedPages;
4281	#endif
4282
4283	if (!pPage->fZeroed)
4284	{
4285	STAM_PROFILE_START(&pPool->StatZeroPage, z);
4286	void *pv = PGMPOOL_PAGE_2_PTR(pVM, pPage);
4287	ASMMemZeroPage(pv);
4288	STAM_PROFILE_STOP(&pPool->StatZeroPage, z);
4289	}
4290
4291	*ppPage = pPage;
4292	LogFlow(("pgmPoolAlloc: returns %Rrc *ppPage=%p:{.Key=%RHp, .idx=%d, .fCached=%RTbool, .fMonitored=%RTbool}\n",
4293	rc, pPage, pPage->Core.Key, pPage->idx, pPage->fCached, pPage->fMonitored));
4294	STAM_PROFILE_ADV_STOP(&pPool->StatAlloc, a);
4295	return rc;
4296	}
4297
4298
4299	/**
4300	* Frees a usage of a pool page.
4301	*
4302	* @param pVM The VM handle.
4303	* @param HCPhys The HC physical address of the shadow page.
4304	* @param iUser The shadow page pool index of the user table.
4305	* @param iUserTable The index into the user table (shadowed).
4306	*/
4307	void pgmPoolFree(PVM pVM, RTHCPHYS HCPhys, uint16_t iUser, uint32_t iUserTable)
4308	{
4309	LogFlow(("pgmPoolFree: HCPhys=%RHp iUser=%#x iUserTable=%#x\n", HCPhys, iUser, iUserTable));
4310	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
4311	pgmPoolFreeByPage(pPool, pgmPoolGetPage(pPool, HCPhys), iUser, iUserTable);
4312	}
4313
4314
4315	/**
4316	* Gets a in-use page in the pool by it's physical address.
4317	*
4318	* @returns Pointer to the page.
4319	* @param pVM The VM handle.
4320	* @param HCPhys The HC physical address of the shadow page.
4321	* @remark This function will NEVER return NULL. It will assert if HCPhys is invalid.
4322	*/
4323	PPGMPOOLPAGE pgmPoolGetPageByHCPhys(PVM pVM, RTHCPHYS HCPhys)
4324	{
4325	/** @todo profile this! */
4326	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
4327	PPGMPOOLPAGE pPage = pgmPoolGetPage(pPool, HCPhys);
4328	Log4(("pgmPoolGetPageByHCPhys: HCPhys=%RHp -> %p:{.idx=%d .GCPhys=%RGp .enmKind=%s}\n",
4329	HCPhys, pPage, pPage->idx, pPage->GCPhys, pgmPoolPoolKindToStr(pPage->enmKind)));
4330	return pPage;
4331	}
4332
4333	#ifdef IN_RING3
4334	/**
4335	* Flushes the entire cache.
4336	*
4337	* It will assert a global CR3 flush (FF) and assumes the caller is aware of this
4338	* and execute this CR3 flush.
4339	*
4340	* @param pPool The pool.
4341	*/
4342	void pgmPoolFlushAll(PVM pVM)
4343	{
4344	LogFlow(("pgmPoolFlushAll:\n"));
4345	pgmPoolFlushAllInt(pVM->pgm.s.CTX_SUFF(pPool));
4346	}
4347	#endif
4348
4349	#ifdef LOG_ENABLED
4350	static const char *pgmPoolPoolKindToStr(uint8_t enmKind)
4351	{
4352	switch(enmKind)
4353	{
4354	case PGMPOOLKIND_INVALID:
4355	return "PGMPOOLKIND_INVALID";
4356	case PGMPOOLKIND_FREE:
4357	return "PGMPOOLKIND_FREE";
4358	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
4359	return "PGMPOOLKIND_32BIT_PT_FOR_PHYS";
4360	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
4361	return "PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT";
4362	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
4363	return "PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB";
4364	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
4365	return "PGMPOOLKIND_PAE_PT_FOR_PHYS";
4366	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
4367	return "PGMPOOLKIND_PAE_PT_FOR_32BIT_PT";
4368	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
4369	return "PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB";
4370	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
4371	return "PGMPOOLKIND_PAE_PT_FOR_PAE_PT";
4372	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
4373	return "PGMPOOLKIND_PAE_PT_FOR_PAE_2MB";
4374	case PGMPOOLKIND_32BIT_PD:
4375	return "PGMPOOLKIND_32BIT_PD";
4376	case PGMPOOLKIND_32BIT_PD_PHYS:
4377	return "PGMPOOLKIND_32BIT_PD_PHYS";
4378	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
4379	return "PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD";
4380	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
4381	return "PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD";
4382	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
4383	return "PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD";
4384	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
4385	return "PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD";
4386	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
4387	return "PGMPOOLKIND_PAE_PD_FOR_PAE_PD";
4388	case PGMPOOLKIND_PAE_PD_PHYS:
4389	return "PGMPOOLKIND_PAE_PD_PHYS";
4390	case PGMPOOLKIND_PAE_PDPT_FOR_32BIT:
4391	return "PGMPOOLKIND_PAE_PDPT_FOR_32BIT";
4392	case PGMPOOLKIND_PAE_PDPT:
4393	return "PGMPOOLKIND_PAE_PDPT";
4394	case PGMPOOLKIND_PAE_PDPT_PHYS:
4395	return "PGMPOOLKIND_PAE_PDPT_PHYS";
4396	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
4397	return "PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT";
4398	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
4399	return "PGMPOOLKIND_64BIT_PDPT_FOR_PHYS";
4400	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
4401	return "PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD";
4402	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
4403	return "PGMPOOLKIND_64BIT_PD_FOR_PHYS";
4404	case PGMPOOLKIND_64BIT_PML4:
4405	return "PGMPOOLKIND_64BIT_PML4";
4406	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
4407	return "PGMPOOLKIND_EPT_PDPT_FOR_PHYS";
4408	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
4409	return "PGMPOOLKIND_EPT_PD_FOR_PHYS";
4410	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
4411	return "PGMPOOLKIND_EPT_PT_FOR_PHYS";
4412	case PGMPOOLKIND_ROOT_NESTED:
4413	return "PGMPOOLKIND_ROOT_NESTED";
4414	}
4415	return "Unknown kind!";
4416	}
4417	#endif

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source: vbox/trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp@ 17586

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