PGMAllPool.cpp@ 17787

Last change on this file since 17787 was 17667, checked in by vboxsync, 16 years ago
pgmPoolAlloc no longer fails with non-fatal errors.
Property svn:eol-style set to `native` Property svn:keywords set to `Id`
File size: 158.8 KB

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1	/* $Id: PGMAllPool.cpp 17667 2009-03-11 09:35:22Z vboxsync $ */
2	/** @file
3	* PGM Shadow Page Pool.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22
23	/*******************************************************************************
24	* Header Files *
25	*******************************************************************************/
26	#define LOG_GROUP LOG_GROUP_PGM_POOL
27	#include <VBox/pgm.h>
28	#include <VBox/mm.h>
29	#include <VBox/em.h>
30	#include <VBox/cpum.h>
31	#ifdef IN_RC
32	# include <VBox/patm.h>
33	#endif
34	#include "PGMInternal.h"
35	#include <VBox/vm.h>
36	#include <VBox/disopcode.h>
37	#include <VBox/hwacc_vmx.h>
38
39	#include <VBox/log.h>
40	#include <VBox/err.h>
41	#include <iprt/asm.h>
42	#include <iprt/string.h>
43
44
45	/*******************************************************************************
46	* Internal Functions *
47	*******************************************************************************/
48	__BEGIN_DECLS
49	static void pgmPoolFlushAllInt(PPGMPOOL pPool);
50	#ifdef PGMPOOL_WITH_USER_TRACKING
51	DECLINLINE(unsigned) pgmPoolTrackGetShadowEntrySize(PGMPOOLKIND enmKind);
52	DECLINLINE(unsigned) pgmPoolTrackGetGuestEntrySize(PGMPOOLKIND enmKind);
53	static void pgmPoolTrackDeref(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
54	#endif
55	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
56	static void pgmPoolTracDerefGCPhysHint(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTHCPHYS HCPhys, RTGCPHYS GCPhysHint);
57	#endif
58	#ifdef PGMPOOL_WITH_CACHE
59	static int pgmPoolTrackAddUser(PPGMPOOL pPool, PPGMPOOLPAGE pPage, uint16_t iUser, uint32_t iUserTable);
60	#endif
61	#ifdef PGMPOOL_WITH_MONITORING
62	static void pgmPoolMonitorModifiedRemove(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
63	#endif
64	#ifndef IN_RING3
65	DECLEXPORT(int) pgmPoolAccessHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser);
66	#endif
67	#ifdef LOG_ENABLED
68	static const char *pgmPoolPoolKindToStr(uint8_t enmKind);
69	#endif
70	__END_DECLS
71
72
73	/**
74	* Checks if the specified page pool kind is for a 4MB or 2MB guest page.
75	*
76	* @returns true if it's the shadow of a 4MB or 2MB guest page, otherwise false.
77	* @param enmKind The page kind.
78	*/
79	DECLINLINE(bool) pgmPoolIsBigPage(PGMPOOLKIND enmKind)
80	{
81	switch (enmKind)
82	{
83	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
84	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
85	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
86	return true;
87	default:
88	return false;
89	}
90	}
91
92	/** @def PGMPOOL_PAGE_2_LOCKED_PTR
93	* Maps a pool page pool into the current context and lock it (RC only).
94	*
95	* @returns VBox status code.
96	* @param pVM The VM handle.
97	* @param pPage The pool page.
98	*
99	* @remark In RC this uses PGMGCDynMapHCPage(), so it will consume of the
100	* small page window employeed by that function. Be careful.
101	* @remark There is no need to assert on the result.
102	*/
103	#if defined(IN_RC)
104	DECLINLINE(void *) PGMPOOL_PAGE_2_LOCKED_PTR(PVM pVM, PPGMPOOLPAGE pPage)
105	{
106	void *pv = pgmPoolMapPageInlined(&pVM->pgm.s, pPage);
107
108	/* Make sure the dynamic mapping will not be reused. */
109	if (pv)
110	PGMDynLockHCPage(pVM, (uint8_t *)pv);
111
112	return pv;
113	}
114	#else
115	# define PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage) PGMPOOL_PAGE_2_PTR(pVM, pPage)
116	#endif
117
118	/** @def PGMPOOL_UNLOCK_PTR
119	* Unlock a previously locked dynamic caching (RC only).
120	*
121	* @returns VBox status code.
122	* @param pVM The VM handle.
123	* @param pPage The pool page.
124	*
125	* @remark In RC this uses PGMGCDynMapHCPage(), so it will consume of the
126	* small page window employeed by that function. Be careful.
127	* @remark There is no need to assert on the result.
128	*/
129	#if defined(IN_RC)
130	DECLINLINE(void) PGMPOOL_UNLOCK_PTR(PVM pVM, void *pvPage)
131	{
132	if (pvPage)
133	PGMDynUnlockHCPage(pVM, (uint8_t *)pvPage);
134	}
135	#else
136	# define PGMPOOL_UNLOCK_PTR(pVM, pPage) do {} while (0)
137	#endif
138
139
140	#ifdef PGMPOOL_WITH_MONITORING
141	/**
142	* Determin the size of a write instruction.
143	* @returns number of bytes written.
144	* @param pDis The disassembler state.
145	*/
146	static unsigned pgmPoolDisasWriteSize(PDISCPUSTATE pDis)
147	{
148	/*
149	* This is very crude and possibly wrong for some opcodes,
150	* but since it's not really supposed to be called we can
151	* probably live with that.
152	*/
153	return DISGetParamSize(pDis, &pDis->param1);
154	}
155
156
157	/**
158	* Flushes a chain of pages sharing the same access monitor.
159	*
160	* @returns VBox status code suitable for scheduling.
161	* @param pPool The pool.
162	* @param pPage A page in the chain.
163	*/
164	int pgmPoolMonitorChainFlush(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
165	{
166	LogFlow(("pgmPoolMonitorChainFlush: Flush page %RGp type=%d\n", pPage->GCPhys, pPage->enmKind));
167
168	/*
169	* Find the list head.
170	*/
171	uint16_t idx = pPage->idx;
172	if (pPage->iMonitoredPrev != NIL_PGMPOOL_IDX)
173	{
174	while (pPage->iMonitoredPrev != NIL_PGMPOOL_IDX)
175	{
176	idx = pPage->iMonitoredPrev;
177	Assert(idx != pPage->idx);
178	pPage = &pPool->aPages[idx];
179	}
180	}
181
182	/*
183	* Iterate the list flushing each shadow page.
184	*/
185	int rc = VINF_SUCCESS;
186	for (;;)
187	{
188	idx = pPage->iMonitoredNext;
189	Assert(idx != pPage->idx);
190	if (pPage->idx >= PGMPOOL_IDX_FIRST)
191	{
192	int rc2 = pgmPoolFlushPage(pPool, pPage);
193	AssertRC(rc2);
194	}
195	/* next */
196	if (idx == NIL_PGMPOOL_IDX)
197	break;
198	pPage = &pPool->aPages[idx];
199	}
200	return rc;
201	}
202
203
204	/**
205	* Wrapper for getting the current context pointer to the entry being modified.
206	*
207	* @returns VBox status code suitable for scheduling.
208	* @param pVM VM Handle.
209	* @param pvDst Destination address
210	* @param pvSrc Source guest virtual address.
211	* @param GCPhysSrc The source guest physical address.
212	* @param cb Size of data to read
213	*/
214	DECLINLINE(int) pgmPoolPhysSimpleReadGCPhys(PVM pVM, void *pvDst, CTXTYPE(RTGCPTR, RTHCPTR, RTGCPTR) pvSrc, RTGCPHYS GCPhysSrc, size_t cb)
215	{
216	#if defined(IN_RING3)
217	memcpy(pvDst, (RTHCPTR)((uintptr_t)pvSrc & ~(RTHCUINTPTR)(cb - 1)), cb);
218	return VINF_SUCCESS;
219	#else
220	/* @todo in RC we could attempt to use the virtual address, although this can cause many faults (PAE Windows XP guest). */
221	return PGMPhysSimpleReadGCPhys(pVM, pvDst, GCPhysSrc & ~(RTGCPHYS)(cb - 1), cb);
222	#endif
223	}
224
225	/**
226	* Process shadow entries before they are changed by the guest.
227	*
228	* For PT entries we will clear them. For PD entries, we'll simply check
229	* for mapping conflicts and set the SyncCR3 FF if found.
230	*
231	* @param pPool The pool.
232	* @param pPage The head page.
233	* @param GCPhysFault The guest physical fault address.
234	* @param uAddress In R0 and GC this is the guest context fault address (flat).
235	* In R3 this is the host context 'fault' address.
236	* @param pCpu The disassembler state for figuring out the write size.
237	* This need not be specified if the caller knows we won't do cross entry accesses.
238	*/
239	void pgmPoolMonitorChainChanging(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTGCPHYS GCPhysFault, CTXTYPE(RTGCPTR, RTHCPTR, RTGCPTR) pvAddress, PDISCPUSTATE pCpu)
240	{
241	Assert(pPage->iMonitoredPrev == NIL_PGMPOOL_IDX);
242	const unsigned off = GCPhysFault & PAGE_OFFSET_MASK;
243	const unsigned cbWrite = (pCpu) ? pgmPoolDisasWriteSize(pCpu) : 0;
244	PVM pVM = pPool->CTX_SUFF(pVM);
245
246	LogFlow(("pgmPoolMonitorChainChanging: %RGv phys=%RGp kind=%s cbWrite=%d\n", (RTGCPTR)pvAddress, GCPhysFault, pgmPoolPoolKindToStr(pPage->enmKind), cbWrite));
247	for (;;)
248	{
249	union
250	{
251	void *pv;
252	PX86PT pPT;
253	PX86PTPAE pPTPae;
254	PX86PD pPD;
255	PX86PDPAE pPDPae;
256	PX86PDPT pPDPT;
257	PX86PML4 pPML4;
258	} uShw;
259
260	uShw.pv = NULL;
261	switch (pPage->enmKind)
262	{
263	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
264	{
265	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
266	const unsigned iShw = off / sizeof(X86PTE);
267	LogFlow(("PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT iShw=%x\n", iShw));
268	if (uShw.pPT->a[iShw].n.u1Present)
269	{
270	# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
271	X86PTE GstPte;
272
273	int rc = pgmPoolPhysSimpleReadGCPhys(pVM, &GstPte, pvAddress, GCPhysFault, sizeof(GstPte));
274	AssertRC(rc);
275	Log4(("pgmPoolMonitorChainChanging 32_32: deref %016RX64 GCPhys %08RX32\n", uShw.pPT->a[iShw].u & X86_PTE_PAE_PG_MASK, GstPte.u & X86_PTE_PG_MASK));
276	pgmPoolTracDerefGCPhysHint(pPool, pPage,
277	uShw.pPT->a[iShw].u & X86_PTE_PAE_PG_MASK,
278	GstPte.u & X86_PTE_PG_MASK);
279	# endif
280	uShw.pPT->a[iShw].u = 0;
281	}
282	break;
283	}
284
285	/* page/2 sized */
286	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
287	{
288	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
289	if (!((off ^ pPage->GCPhys) & (PAGE_SIZE / 2)))
290	{
291	const unsigned iShw = (off / sizeof(X86PTE)) & (X86_PG_PAE_ENTRIES - 1);
292	LogFlow(("PGMPOOLKIND_PAE_PT_FOR_32BIT_PT iShw=%x\n", iShw));
293	if (uShw.pPTPae->a[iShw].n.u1Present)
294	{
295	# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
296	X86PTE GstPte;
297	int rc = pgmPoolPhysSimpleReadGCPhys(pVM, &GstPte, pvAddress, GCPhysFault, sizeof(GstPte));
298	AssertRC(rc);
299
300	Log4(("pgmPoolMonitorChainChanging pae_32: deref %016RX64 GCPhys %08RX32\n", uShw.pPT->a[iShw].u & X86_PTE_PAE_PG_MASK, GstPte.u & X86_PTE_PG_MASK));
301	pgmPoolTracDerefGCPhysHint(pPool, pPage,
302	uShw.pPTPae->a[iShw].u & X86_PTE_PAE_PG_MASK,
303	GstPte.u & X86_PTE_PG_MASK);
304	# endif
305	uShw.pPTPae->a[iShw].u = 0;
306	}
307	}
308	break;
309	}
310
311	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
312	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
313	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
314	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
315	{
316	unsigned iGst = off / sizeof(X86PDE);
317	unsigned iShwPdpt = iGst / 256;
318	unsigned iShw = (iGst % 256) * 2;
319	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
320
321	LogFlow(("pgmPoolMonitorChainChanging PAE for 32 bits: iGst=%x iShw=%x idx = %d page idx=%d\n", iGst, iShw, iShwPdpt, pPage->enmKind - PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD));
322	if (iShwPdpt == pPage->enmKind - (unsigned)PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD)
323	{
324	for (unsigned i = 0; i < 2; i++)
325	{
326	# ifndef IN_RING0
327	if ((uShw.pPDPae->a[iShw + i].u & (PGM_PDFLAGS_MAPPING \| X86_PDE_P)) == (PGM_PDFLAGS_MAPPING \| X86_PDE_P))
328	{
329	Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s));
330	VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
331	LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShwPdpt=%#x iShw=%#x!\n", iShwPdpt, iShw+i));
332	break;
333	}
334	else
335	# endif /* !IN_RING0 */
336	if (uShw.pPDPae->a[iShw+i].n.u1Present)
337	{
338	LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw=%#x: %RX64 -> freeing it!\n", iShw+i, uShw.pPDPae->a[iShw+i].u));
339	pgmPoolFree(pVM,
340	uShw.pPDPae->a[iShw+i].u & X86_PDE_PAE_PG_MASK,
341	pPage->idx,
342	iShw + i);
343	uShw.pPDPae->a[iShw+i].u = 0;
344	}
345
346	/* paranoia / a bit assumptive. */
347	if ( pCpu
348	&& (off & 3)
349	&& (off & 3) + cbWrite > 4)
350	{
351	const unsigned iShw2 = iShw + 2 + i;
352	if (iShw2 < RT_ELEMENTS(uShw.pPDPae->a))
353	{
354	# ifndef IN_RING0
355	if ((uShw.pPDPae->a[iShw2].u & (PGM_PDFLAGS_MAPPING \| X86_PDE_P)) == (PGM_PDFLAGS_MAPPING \| X86_PDE_P))
356	{
357	Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s));
358	VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
359	LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShwPdpt=%#x iShw2=%#x!\n", iShwPdpt, iShw2));
360	break;
361	}
362	else
363	# endif /* !IN_RING0 */
364	if (uShw.pPDPae->a[iShw2].n.u1Present)
365	{
366	LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPDPae->a[iShw2].u));
367	pgmPoolFree(pVM,
368	uShw.pPDPae->a[iShw2].u & X86_PDE_PAE_PG_MASK,
369	pPage->idx,
370	iShw2);
371	uShw.pPDPae->a[iShw2].u = 0;
372	}
373	}
374	}
375	}
376	}
377	break;
378	}
379
380	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
381	{
382	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
383	const unsigned iShw = off / sizeof(X86PTEPAE);
384	if (uShw.pPTPae->a[iShw].n.u1Present)
385	{
386	# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
387	X86PTEPAE GstPte;
388	int rc = pgmPoolPhysSimpleReadGCPhys(pVM, &GstPte, pvAddress, GCPhysFault, sizeof(GstPte));
389	AssertRC(rc);
390
391	Log4(("pgmPoolMonitorChainChanging pae: deref %016RX64 GCPhys %016RX64\n", uShw.pPTPae->a[iShw].u & X86_PTE_PAE_PG_MASK, GstPte.u & X86_PTE_PAE_PG_MASK));
392	pgmPoolTracDerefGCPhysHint(pPool, pPage,
393	uShw.pPTPae->a[iShw].u & X86_PTE_PAE_PG_MASK,
394	GstPte.u & X86_PTE_PAE_PG_MASK);
395	# endif
396	uShw.pPTPae->a[iShw].u = 0;
397	}
398
399	/* paranoia / a bit assumptive. */
400	if ( pCpu
401	&& (off & 7)
402	&& (off & 7) + cbWrite > sizeof(X86PTEPAE))
403	{
404	const unsigned iShw2 = (off + cbWrite - 1) / sizeof(X86PTEPAE);
405	AssertBreak(iShw2 < RT_ELEMENTS(uShw.pPTPae->a));
406
407	if (uShw.pPTPae->a[iShw2].n.u1Present)
408	{
409	# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
410	X86PTEPAE GstPte;
411	# ifdef IN_RING3
412	int rc = pgmPoolPhysSimpleReadGCPhys(pVM, &GstPte, (RTHCPTR)((RTHCUINTPTR)pvAddress + sizeof(GstPte)), GCPhysFault + sizeof(GstPte), sizeof(GstPte));
413	# else
414	int rc = pgmPoolPhysSimpleReadGCPhys(pVM, &GstPte, pvAddress + sizeof(GstPte), GCPhysFault + sizeof(GstPte), sizeof(GstPte));
415	# endif
416	AssertRC(rc);
417	Log4(("pgmPoolMonitorChainChanging pae: deref %016RX64 GCPhys %016RX64\n", uShw.pPTPae->a[iShw2].u & X86_PTE_PAE_PG_MASK, GstPte.u & X86_PTE_PAE_PG_MASK));
418	pgmPoolTracDerefGCPhysHint(pPool, pPage,
419	uShw.pPTPae->a[iShw2].u & X86_PTE_PAE_PG_MASK,
420	GstPte.u & X86_PTE_PAE_PG_MASK);
421	# endif
422	uShw.pPTPae->a[iShw2].u = 0;
423	}
424	}
425	break;
426	}
427
428	case PGMPOOLKIND_32BIT_PD:
429	{
430	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
431	const unsigned iShw = off / sizeof(X86PTE); // ASSUMING 32-bit guest paging!
432
433	LogFlow(("pgmPoolMonitorChainChanging: PGMPOOLKIND_32BIT_PD %x\n", iShw));
434	# ifndef IN_RING0
435	if (uShw.pPD->a[iShw].u & PGM_PDFLAGS_MAPPING)
436	{
437	Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s));
438	VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
439	STAM_COUNTER_INC(&(pVM->pgm.s.StatRZGuestCR3WriteConflict));
440	LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShw=%#x!\n", iShw));
441	break;
442	}
443	# endif /* !IN_RING0 */
444	# ifndef IN_RING0
445	else
446	# endif /* !IN_RING0 */
447	{
448	if (uShw.pPD->a[iShw].n.u1Present)
449	{
450	LogFlow(("pgmPoolMonitorChainChanging: 32 bit pd iShw=%#x: %RX64 -> freeing it!\n", iShw, uShw.pPD->a[iShw].u));
451	pgmPoolFree(pVM,
452	uShw.pPD->a[iShw].u & X86_PDE_PAE_PG_MASK,
453	pPage->idx,
454	iShw);
455	uShw.pPD->a[iShw].u = 0;
456	}
457	}
458	/* paranoia / a bit assumptive. */
459	if ( pCpu
460	&& (off & 3)
461	&& (off & 3) + cbWrite > sizeof(X86PTE))
462	{
463	const unsigned iShw2 = (off + cbWrite - 1) / sizeof(X86PTE);
464	if ( iShw2 != iShw
465	&& iShw2 < RT_ELEMENTS(uShw.pPD->a))
466	{
467	# ifndef IN_RING0
468	if (uShw.pPD->a[iShw2].u & PGM_PDFLAGS_MAPPING)
469	{
470	Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s));
471	STAM_COUNTER_INC(&(pVM->pgm.s.StatRZGuestCR3WriteConflict));
472	VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
473	LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShw2=%#x!\n", iShw2));
474	break;
475	}
476	# endif /* !IN_RING0 */
477	# ifndef IN_RING0
478	else
479	# endif /* !IN_RING0 */
480	{
481	if (uShw.pPD->a[iShw2].n.u1Present)
482	{
483	LogFlow(("pgmPoolMonitorChainChanging: 32 bit pd iShw=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPD->a[iShw2].u));
484	pgmPoolFree(pVM,
485	uShw.pPD->a[iShw2].u & X86_PDE_PAE_PG_MASK,
486	pPage->idx,
487	iShw2);
488	uShw.pPD->a[iShw2].u = 0;
489	}
490	}
491	}
492	}
493	#if 0 /* useful when running PGMAssertCR3(), a bit too troublesome for general use (TLBs). */
494	if ( uShw.pPD->a[iShw].n.u1Present
495	&& !VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3))
496	{
497	LogFlow(("pgmPoolMonitorChainChanging: iShw=%#x: %RX32 -> freeing it!\n", iShw, uShw.pPD->a[iShw].u));
498	# ifdef IN_RC /* TLB load - we're pushing things a bit... */
499	ASMProbeReadByte(pvAddress);
500	# endif
501	pgmPoolFree(pVM, uShw.pPD->a[iShw].u & X86_PDE_PG_MASK, pPage->idx, iShw);
502	uShw.pPD->a[iShw].u = 0;
503	}
504	#endif
505	break;
506	}
507
508	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
509	{
510	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
511	const unsigned iShw = off / sizeof(X86PDEPAE);
512	#ifndef IN_RING0
513	if (uShw.pPDPae->a[iShw].u & PGM_PDFLAGS_MAPPING)
514	{
515	Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s));
516	VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
517	STAM_COUNTER_INC(&(pVM->pgm.s.StatRZGuestCR3WriteConflict));
518	LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShw=%#x!\n", iShw));
519	break;
520	}
521	#endif /* !IN_RING0 */
522	/*
523	* Causes trouble when the guest uses a PDE to refer to the whole page table level
524	* structure. (Invalidate here; faults later on when it tries to change the page
525	* table entries -> recheck; probably only applies to the RC case.)
526	*/
527	# ifndef IN_RING0
528	else
529	# endif /* !IN_RING0 */
530	{
531	if (uShw.pPDPae->a[iShw].n.u1Present)
532	{
533	LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw=%#x: %RX64 -> freeing it!\n", iShw, uShw.pPDPae->a[iShw].u));
534	pgmPoolFree(pVM,
535	uShw.pPDPae->a[iShw].u & X86_PDE_PAE_PG_MASK,
536	pPage->idx,
537	iShw);
538	uShw.pPDPae->a[iShw].u = 0;
539	}
540	}
541	/* paranoia / a bit assumptive. */
542	if ( pCpu
543	&& (off & 7)
544	&& (off & 7) + cbWrite > sizeof(X86PDEPAE))
545	{
546	const unsigned iShw2 = (off + cbWrite - 1) / sizeof(X86PDEPAE);
547	AssertBreak(iShw2 < RT_ELEMENTS(uShw.pPDPae->a));
548
549	#ifndef IN_RING0
550	if ( iShw2 != iShw
551	&& uShw.pPDPae->a[iShw2].u & PGM_PDFLAGS_MAPPING)
552	{
553	Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s));
554	VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
555	STAM_COUNTER_INC(&(pVM->pgm.s.StatRZGuestCR3WriteConflict));
556	LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShw2=%#x!\n", iShw2));
557	break;
558	}
559	#endif /* !IN_RING0 */
560	# ifndef IN_RING0
561	else
562	# endif /* !IN_RING0 */
563	if (uShw.pPDPae->a[iShw2].n.u1Present)
564	{
565	LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw2=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPDPae->a[iShw2].u));
566	pgmPoolFree(pVM,
567	uShw.pPDPae->a[iShw2].u & X86_PDE_PAE_PG_MASK,
568	pPage->idx,
569	iShw2);
570	uShw.pPDPae->a[iShw2].u = 0;
571	}
572	}
573	break;
574	}
575
576	case PGMPOOLKIND_PAE_PDPT:
577	{
578	/*
579	* Hopefully this doesn't happen very often:
580	* - touching unused parts of the page
581	* - messing with the bits of pd pointers without changing the physical address
582	*/
583	/* PDPT roots are not page aligned; 32 byte only! */
584	const unsigned offPdpt = GCPhysFault - pPage->GCPhys;
585
586	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
587	const unsigned iShw = offPdpt / sizeof(X86PDPE);
588	if (iShw < X86_PG_PAE_PDPE_ENTRIES) /* don't use RT_ELEMENTS(uShw.pPDPT->a), because that's for long mode only */
589	{
590	# ifndef IN_RING0
591	if (uShw.pPDPT->a[iShw].u & PGM_PLXFLAGS_MAPPING)
592	{
593	Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s));
594	STAM_COUNTER_INC(&(pVM->pgm.s.StatRZGuestCR3WriteConflict));
595	VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
596	LogFlow(("pgmPoolMonitorChainChanging: Detected pdpt conflict at iShw=%#x!\n", iShw));
597	break;
598	}
599	# endif /* !IN_RING0 */
600	# ifndef IN_RING0
601	else
602	# endif /* !IN_RING0 */
603	if (uShw.pPDPT->a[iShw].n.u1Present)
604	{
605	LogFlow(("pgmPoolMonitorChainChanging: pae pdpt iShw=%#x: %RX64 -> freeing it!\n", iShw, uShw.pPDPT->a[iShw].u));
606	pgmPoolFree(pVM,
607	uShw.pPDPT->a[iShw].u & X86_PDPE_PG_MASK,
608	pPage->idx,
609	iShw);
610	uShw.pPDPT->a[iShw].u = 0;
611	}
612
613	/* paranoia / a bit assumptive. */
614	if ( pCpu
615	&& (offPdpt & 7)
616	&& (offPdpt & 7) + cbWrite > sizeof(X86PDPE))
617	{
618	const unsigned iShw2 = (offPdpt + cbWrite - 1) / sizeof(X86PDPE);
619	if ( iShw2 != iShw
620	&& iShw2 < X86_PG_PAE_PDPE_ENTRIES)
621	{
622	# ifndef IN_RING0
623	if (uShw.pPDPT->a[iShw2].u & PGM_PLXFLAGS_MAPPING)
624	{
625	Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s));
626	STAM_COUNTER_INC(&(pVM->pgm.s.StatRZGuestCR3WriteConflict));
627	VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
628	LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShw2=%#x!\n", iShw2));
629	break;
630	}
631	# endif /* !IN_RING0 */
632	# ifndef IN_RING0
633	else
634	# endif /* !IN_RING0 */
635	if (uShw.pPDPT->a[iShw2].n.u1Present)
636	{
637	LogFlow(("pgmPoolMonitorChainChanging: pae pdpt iShw=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPDPT->a[iShw2].u));
638	pgmPoolFree(pVM,
639	uShw.pPDPT->a[iShw2].u & X86_PDPE_PG_MASK,
640	pPage->idx,
641	iShw2);
642	uShw.pPDPT->a[iShw2].u = 0;
643	}
644	}
645	}
646	}
647	break;
648	}
649
650	#ifndef IN_RC
651	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
652	{
653	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
654	const unsigned iShw = off / sizeof(X86PDEPAE);
655	Assert(!(uShw.pPDPae->a[iShw].u & PGM_PDFLAGS_MAPPING));
656	if (uShw.pPDPae->a[iShw].n.u1Present)
657	{
658	LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw=%#x: %RX64 -> freeing it!\n", iShw, uShw.pPDPae->a[iShw].u));
659	pgmPoolFree(pVM,
660	uShw.pPDPae->a[iShw].u & X86_PDE_PAE_PG_MASK,
661	pPage->idx,
662	iShw);
663	uShw.pPDPae->a[iShw].u = 0;
664	}
665	/* paranoia / a bit assumptive. */
666	if ( pCpu
667	&& (off & 7)
668	&& (off & 7) + cbWrite > sizeof(X86PDEPAE))
669	{
670	const unsigned iShw2 = (off + cbWrite - 1) / sizeof(X86PDEPAE);
671	AssertBreak(iShw2 < RT_ELEMENTS(uShw.pPDPae->a));
672
673	Assert(!(uShw.pPDPae->a[iShw2].u & PGM_PDFLAGS_MAPPING));
674	if (uShw.pPDPae->a[iShw2].n.u1Present)
675	{
676	LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw2=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPDPae->a[iShw2].u));
677	pgmPoolFree(pVM,
678	uShw.pPDPae->a[iShw2].u & X86_PDE_PAE_PG_MASK,
679	pPage->idx,
680	iShw2);
681	uShw.pPDPae->a[iShw2].u = 0;
682	}
683	}
684	break;
685	}
686
687	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
688	{
689	/*
690	* Hopefully this doesn't happen very often:
691	* - messing with the bits of pd pointers without changing the physical address
692	*/
693	if (!VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3))
694	{
695	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
696	const unsigned iShw = off / sizeof(X86PDPE);
697	if (uShw.pPDPT->a[iShw].n.u1Present)
698	{
699	LogFlow(("pgmPoolMonitorChainChanging: pdpt iShw=%#x: %RX64 -> freeing it!\n", iShw, uShw.pPDPT->a[iShw].u));
700	pgmPoolFree(pVM, uShw.pPDPT->a[iShw].u & X86_PDPE_PG_MASK, pPage->idx, iShw);
701	uShw.pPDPT->a[iShw].u = 0;
702	}
703	/* paranoia / a bit assumptive. */
704	if ( pCpu
705	&& (off & 7)
706	&& (off & 7) + cbWrite > sizeof(X86PDPE))
707	{
708	const unsigned iShw2 = (off + cbWrite - 1) / sizeof(X86PDPE);
709	if (uShw.pPDPT->a[iShw2].n.u1Present)
710	{
711	LogFlow(("pgmPoolMonitorChainChanging: pdpt iShw2=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPDPT->a[iShw2].u));
712	pgmPoolFree(pVM, uShw.pPDPT->a[iShw2].u & X86_PDPE_PG_MASK, pPage->idx, iShw2);
713	uShw.pPDPT->a[iShw2].u = 0;
714	}
715	}
716	}
717	break;
718	}
719
720	case PGMPOOLKIND_64BIT_PML4:
721	{
722	/*
723	* Hopefully this doesn't happen very often:
724	* - messing with the bits of pd pointers without changing the physical address
725	*/
726	if (!VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3))
727	{
728	uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage);
729	const unsigned iShw = off / sizeof(X86PDPE);
730	if (uShw.pPML4->a[iShw].n.u1Present)
731	{
732	LogFlow(("pgmPoolMonitorChainChanging: pml4 iShw=%#x: %RX64 -> freeing it!\n", iShw, uShw.pPML4->a[iShw].u));
733	pgmPoolFree(pVM, uShw.pPML4->a[iShw].u & X86_PML4E_PG_MASK, pPage->idx, iShw);
734	uShw.pPML4->a[iShw].u = 0;
735	}
736	/* paranoia / a bit assumptive. */
737	if ( pCpu
738	&& (off & 7)
739	&& (off & 7) + cbWrite > sizeof(X86PDPE))
740	{
741	const unsigned iShw2 = (off + cbWrite - 1) / sizeof(X86PML4E);
742	if (uShw.pPML4->a[iShw2].n.u1Present)
743	{
744	LogFlow(("pgmPoolMonitorChainChanging: pml4 iShw2=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPML4->a[iShw2].u));
745	pgmPoolFree(pVM, uShw.pPML4->a[iShw2].u & X86_PML4E_PG_MASK, pPage->idx, iShw2);
746	uShw.pPML4->a[iShw2].u = 0;
747	}
748	}
749	}
750	break;
751	}
752	#endif /* IN_RING0 */
753
754	default:
755	AssertFatalMsgFailed(("enmKind=%d\n", pPage->enmKind));
756	}
757	PGMPOOL_UNLOCK_PTR(pVM, uShw.pv);
758
759	/* next */
760	if (pPage->iMonitoredNext == NIL_PGMPOOL_IDX)
761	return;
762	pPage = &pPool->aPages[pPage->iMonitoredNext];
763	}
764	}
765
766	# ifndef IN_RING3
767	/**
768	* Checks if a access could be a fork operation in progress.
769	*
770	* Meaning, that the guest is setuping up the parent process for Copy-On-Write.
771	*
772	* @returns true if it's likly that we're forking, otherwise false.
773	* @param pPool The pool.
774	* @param pCpu The disassembled instruction.
775	* @param offFault The access offset.
776	*/
777	DECLINLINE(bool) pgmPoolMonitorIsForking(PPGMPOOL pPool, PDISCPUSTATE pCpu, unsigned offFault)
778	{
779	/*
780	* i386 linux is using btr to clear X86_PTE_RW.
781	* The functions involved are (2.6.16 source inspection):
782	* clear_bit
783	* ptep_set_wrprotect
784	* copy_one_pte
785	* copy_pte_range
786	* copy_pmd_range
787	* copy_pud_range
788	* copy_page_range
789	* dup_mmap
790	* dup_mm
791	* copy_mm
792	* copy_process
793	* do_fork
794	*/
795	if ( pCpu->pCurInstr->opcode == OP_BTR
796	&& !(offFault & 4)
797	/** @todo Validate that the bit index is X86_PTE_RW. */
798	)
799	{
800	STAM_COUNTER_INC(&pPool->CTX_MID_Z(StatMonitor,Fork));
801	return true;
802	}
803	return false;
804	}
805
806
807	/**
808	* Determine whether the page is likely to have been reused.
809	*
810	* @returns true if we consider the page as being reused for a different purpose.
811	* @returns false if we consider it to still be a paging page.
812	* @param pVM VM Handle.
813	* @param pPage The page in question.
814	* @param pRegFrame Trap register frame.
815	* @param pCpu The disassembly info for the faulting instruction.
816	* @param pvFault The fault address.
817	*
818	* @remark The REP prefix check is left to the caller because of STOSD/W.
819	*/
820	DECLINLINE(bool) pgmPoolMonitorIsReused(PVM pVM, PPGMPOOLPAGE pPage, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, RTGCPTR pvFault)
821	{
822	#ifndef IN_RC
823	/** @todo could make this general, faulting close to rsp should be safe reuse heuristic. */
824	if ( HWACCMHasPendingIrq(pVM)
825	&& (pRegFrame->rsp - pvFault) < 32)
826	{
827	/* Fault caused by stack writes while trying to inject an interrupt event. */
828	Log(("pgmPoolMonitorIsReused: reused %RGv for interrupt stack (rsp=%RGv).\n", pvFault, pRegFrame->rsp));
829	return true;
830	}
831	#else
832	NOREF(pVM); NOREF(pvFault);
833	#endif
834
835	switch (pCpu->pCurInstr->opcode)
836	{
837	/* call implies the actual push of the return address faulted */
838	case OP_CALL:
839	Log4(("pgmPoolMonitorIsReused: CALL\n"));
840	return true;
841	case OP_PUSH:
842	Log4(("pgmPoolMonitorIsReused: PUSH\n"));
843	return true;
844	case OP_PUSHF:
845	Log4(("pgmPoolMonitorIsReused: PUSHF\n"));
846	return true;
847	case OP_PUSHA:
848	Log4(("pgmPoolMonitorIsReused: PUSHA\n"));
849	return true;
850	case OP_FXSAVE:
851	Log4(("pgmPoolMonitorIsReused: FXSAVE\n"));
852	return true;
853	case OP_MOVNTI: /* solaris - block_zero_no_xmm */
854	Log4(("pgmPoolMonitorIsReused: MOVNTI\n"));
855	return true;
856	case OP_MOVNTDQ: /* solaris - hwblkclr & hwblkpagecopy */
857	Log4(("pgmPoolMonitorIsReused: MOVNTDQ\n"));
858	return true;
859	case OP_MOVSWD:
860	case OP_STOSWD:
861	if ( pCpu->prefix == (PREFIX_REP\|PREFIX_REX)
862	&& pRegFrame->rcx >= 0x40
863	)
864	{
865	Assert(pCpu->mode == CPUMODE_64BIT);
866
867	Log(("pgmPoolMonitorIsReused: OP_STOSQ\n"));
868	return true;
869	}
870	return false;
871	}
872	if ( (pCpu->param1.flags & USE_REG_GEN32)
873	&& (pCpu->param1.base.reg_gen == USE_REG_ESP))
874	{
875	Log4(("pgmPoolMonitorIsReused: ESP\n"));
876	return true;
877	}
878
879	//if (pPage->fCR3Mix)
880	// return false;
881	return false;
882	}
883
884
885	/**
886	* Flushes the page being accessed.
887	*
888	* @returns VBox status code suitable for scheduling.
889	* @param pVM The VM handle.
890	* @param pPool The pool.
891	* @param pPage The pool page (head).
892	* @param pCpu The disassembly of the write instruction.
893	* @param pRegFrame The trap register frame.
894	* @param GCPhysFault The fault address as guest physical address.
895	* @param pvFault The fault address.
896	*/
897	static int pgmPoolAccessHandlerFlush(PVM pVM, PPGMPOOL pPool, PPGMPOOLPAGE pPage, PDISCPUSTATE pCpu,
898	PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, RTGCPTR pvFault)
899	{
900	/*
901	* First, do the flushing.
902	*/
903	int rc = pgmPoolMonitorChainFlush(pPool, pPage);
904
905	/*
906	* Emulate the instruction (xp/w2k problem, requires pc/cr2/sp detection).
907	*/
908	uint32_t cbWritten;
909	int rc2 = EMInterpretInstructionCPU(pVM, pCpu, pRegFrame, pvFault, &cbWritten);
910	if (RT_SUCCESS(rc2))
911	pRegFrame->rip += pCpu->opsize;
912	else if (rc2 == VERR_EM_INTERPRETER)
913	{
914	#ifdef IN_RC
915	if (PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip))
916	{
917	LogFlow(("pgmPoolAccessHandlerPTWorker: Interpretation failed for patch code %04x:%RGv, ignoring.\n",
918	pRegFrame->cs, (RTGCPTR)pRegFrame->eip));
919	rc = VINF_SUCCESS;
920	STAM_COUNTER_INC(&pPool->StatMonitorRZIntrFailPatch2);
921	}
922	else
923	#endif
924	{
925	rc = VINF_EM_RAW_EMULATE_INSTR;
926	STAM_COUNTER_INC(&pPool->CTX_MID_Z(StatMonitor,EmulateInstr));
927	}
928	}
929	else
930	rc = rc2;
931
932	/* See use in pgmPoolAccessHandlerSimple(). */
933	PGM_INVL_GUEST_TLBS();
934
935	LogFlow(("pgmPoolAccessHandlerPT: returns %Rrc (flushed)\n", rc));
936	return rc;
937
938	}
939
940
941	/**
942	* Handles the STOSD write accesses.
943	*
944	* @returns VBox status code suitable for scheduling.
945	* @param pVM The VM handle.
946	* @param pPool The pool.
947	* @param pPage The pool page (head).
948	* @param pCpu The disassembly of the write instruction.
949	* @param pRegFrame The trap register frame.
950	* @param GCPhysFault The fault address as guest physical address.
951	* @param pvFault The fault address.
952	*/
953	DECLINLINE(int) pgmPoolAccessHandlerSTOSD(PVM pVM, PPGMPOOL pPool, PPGMPOOLPAGE pPage, PDISCPUSTATE pCpu,
954	PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, RTGCPTR pvFault)
955	{
956	Assert(pCpu->mode == CPUMODE_32BIT);
957
958	Log3(("pgmPoolAccessHandlerSTOSD\n"));
959
960	/*
961	* Increment the modification counter and insert it into the list
962	* of modified pages the first time.
963	*/
964	if (!pPage->cModifications++)
965	pgmPoolMonitorModifiedInsert(pPool, pPage);
966
967	/*
968	* Execute REP STOSD.
969	*
970	* This ASSUMES that we're not invoked by Trap0e on in a out-of-sync
971	* write situation, meaning that it's safe to write here.
972	*/
973	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
974	PVMCPU pVCpu = VMMGetCpu(pPool->CTX_SUFF(pVM));
975	#endif
976	RTGCUINTPTR pu32 = (RTGCUINTPTR)pvFault;
977	while (pRegFrame->ecx)
978	{
979	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
980	uint32_t iPrevSubset = PGMDynMapPushAutoSubset(pVCpu);
981	pgmPoolMonitorChainChanging(pPool, pPage, GCPhysFault, (RTGCPTR)pu32, NULL);
982	PGMDynMapPopAutoSubset(pVCpu, iPrevSubset);
983	#else
984	pgmPoolMonitorChainChanging(pPool, pPage, GCPhysFault, (RTGCPTR)pu32, NULL);
985	#endif
986	#ifdef IN_RC
987	(uint32_t )pu32 = pRegFrame->eax;
988	#else
989	PGMPhysSimpleWriteGCPhys(pVM, GCPhysFault, &pRegFrame->eax, 4);
990	#endif
991	pu32 += 4;
992	GCPhysFault += 4;
993	pRegFrame->edi += 4;
994	pRegFrame->ecx--;
995	}
996	pRegFrame->rip += pCpu->opsize;
997
998	#ifdef IN_RC
999	/* See use in pgmPoolAccessHandlerSimple(). */
1000	PGM_INVL_GUEST_TLBS();
1001	#endif
1002
1003	LogFlow(("pgmPoolAccessHandlerSTOSD: returns\n"));
1004	return VINF_SUCCESS;
1005	}
1006
1007
1008	/**
1009	* Handles the simple write accesses.
1010	*
1011	* @returns VBox status code suitable for scheduling.
1012	* @param pVM The VM handle.
1013	* @param pPool The pool.
1014	* @param pPage The pool page (head).
1015	* @param pCpu The disassembly of the write instruction.
1016	* @param pRegFrame The trap register frame.
1017	* @param GCPhysFault The fault address as guest physical address.
1018	* @param pvFault The fault address.
1019	*/
1020	DECLINLINE(int) pgmPoolAccessHandlerSimple(PVM pVM, PPGMPOOL pPool, PPGMPOOLPAGE pPage, PDISCPUSTATE pCpu,
1021	PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, RTGCPTR pvFault)
1022	{
1023	Log3(("pgmPoolAccessHandlerSimple\n"));
1024	/*
1025	* Increment the modification counter and insert it into the list
1026	* of modified pages the first time.
1027	*/
1028	if (!pPage->cModifications++)
1029	pgmPoolMonitorModifiedInsert(pPool, pPage);
1030
1031	/*
1032	* Clear all the pages. ASSUMES that pvFault is readable.
1033	*/
1034	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
1035	PVMCPU pVCpu = VMMGetCpu(pPool->CTX_SUFF(pVM));
1036	uint32_t iPrevSubset = PGMDynMapPushAutoSubset(pVCpu);
1037	pgmPoolMonitorChainChanging(pPool, pPage, GCPhysFault, pvFault, pCpu);
1038	PGMDynMapPopAutoSubset(pVCpu, iPrevSubset);
1039	#else
1040	pgmPoolMonitorChainChanging(pPool, pPage, GCPhysFault, pvFault, pCpu);
1041	#endif
1042
1043	/*
1044	* Interpret the instruction.
1045	*/
1046	uint32_t cb;
1047	int rc = EMInterpretInstructionCPU(pVM, pCpu, pRegFrame, pvFault, &cb);
1048	if (RT_SUCCESS(rc))
1049	pRegFrame->rip += pCpu->opsize;
1050	else if (rc == VERR_EM_INTERPRETER)
1051	{
1052	LogFlow(("pgmPoolAccessHandlerPTWorker: Interpretation failed for %04x:%RGv - opcode=%d\n",
1053	pRegFrame->cs, (RTGCPTR)pRegFrame->rip, pCpu->pCurInstr->opcode));
1054	rc = VINF_EM_RAW_EMULATE_INSTR;
1055	STAM_COUNTER_INC(&pPool->CTX_MID_Z(StatMonitor,EmulateInstr));
1056	}
1057
1058	#ifdef IN_RC
1059	/*
1060	* Quick hack, with logging enabled we're getting stale
1061	* code TLBs but no data TLB for EIP and crash in EMInterpretDisasOne.
1062	* Flushing here is BAD and expensive, I think EMInterpretDisasOne will
1063	* have to be fixed to support this. But that'll have to wait till next week.
1064	*
1065	* An alternative is to keep track of the changed PTEs together with the
1066	* GCPhys from the guest PT. This may proove expensive though.
1067	*
1068	* At the moment, it's VITAL that it's done AFTER the instruction interpreting
1069	* because we need the stale TLBs in some cases (XP boot). This MUST be fixed properly!
1070	*/
1071	PGM_INVL_GUEST_TLBS();
1072	#endif
1073
1074	LogFlow(("pgmPoolAccessHandlerSimple: returns %Rrc cb=%d\n", rc, cb));
1075	return rc;
1076	}
1077
1078	/**
1079	* \#PF Handler callback for PT write accesses.
1080	*
1081	* @returns VBox status code (appropriate for GC return).
1082	* @param pVM VM Handle.
1083	* @param uErrorCode CPU Error code.
1084	* @param pRegFrame Trap register frame.
1085	* NULL on DMA and other non CPU access.
1086	* @param pvFault The fault address (cr2).
1087	* @param GCPhysFault The GC physical address corresponding to pvFault.
1088	* @param pvUser User argument.
1089	*/
1090	DECLEXPORT(int) pgmPoolAccessHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser)
1091	{
1092	STAM_PROFILE_START(&pVM->pgm.s.CTX_SUFF(pPool)->CTX_SUFF_Z(StatMonitor), a);
1093	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
1094	PPGMPOOLPAGE pPage = (PPGMPOOLPAGE)pvUser;
1095	LogFlow(("pgmPoolAccessHandler: pvFault=%RGv pPage=%p:{.idx=%d} GCPhysFault=%RGp\n", pvFault, pPage, pPage->idx, GCPhysFault));
1096
1097	/*
1098	* We should ALWAYS have the list head as user parameter. This
1099	* is because we use that page to record the changes.
1100	*/
1101	Assert(pPage->iMonitoredPrev == NIL_PGMPOOL_IDX);
1102
1103	/*
1104	* Disassemble the faulting instruction.
1105	*/
1106	DISCPUSTATE Cpu;
1107	int rc = EMInterpretDisasOne(pVM, pRegFrame, &Cpu, NULL);
1108	AssertRCReturn(rc, rc);
1109
1110	/*
1111	* Check if it's worth dealing with.
1112	*/
1113	bool fReused = false;
1114	if ( ( pPage->cModifications < 48 /** @todo #define / /* @todo need to check that it's not mapping EIP. / /* @todo adjust this! */
1115	\|\| pgmPoolIsPageLocked(&pVM->pgm.s, pPage)
1116	)
1117	&& !(fReused = pgmPoolMonitorIsReused(pVM, pPage, pRegFrame, &Cpu, pvFault))
1118	&& !pgmPoolMonitorIsForking(pPool, &Cpu, GCPhysFault & PAGE_OFFSET_MASK))
1119	{
1120	/*
1121	* Simple instructions, no REP prefix.
1122	*/
1123	if (!(Cpu.prefix & (PREFIX_REP \| PREFIX_REPNE)))
1124	{
1125	rc = pgmPoolAccessHandlerSimple(pVM, pPool, pPage, &Cpu, pRegFrame, GCPhysFault, pvFault);
1126	STAM_PROFILE_STOP_EX(&pVM->pgm.s.CTX_SUFF(pPool)->CTX_SUFF_Z(StatMonitor), &pPool->CTX_MID_Z(StatMonitor,Handled), a);
1127	return rc;
1128	}
1129
1130	/*
1131	* Windows is frequently doing small memset() operations (netio test 4k+).
1132	* We have to deal with these or we'll kill the cache and performance.
1133	*/
1134	if ( Cpu.pCurInstr->opcode == OP_STOSWD
1135	&& CPUMGetGuestCPL(pVM, pRegFrame) == 0
1136	&& pRegFrame->ecx <= 0x20
1137	&& pRegFrame->ecx * 4 <= PAGE_SIZE - ((uintptr_t)pvFault & PAGE_OFFSET_MASK)
1138	&& !((uintptr_t)pvFault & 3)
1139	&& (pRegFrame->eax == 0 \|\| pRegFrame->eax == 0x80) /* the two values observed. */
1140	&& Cpu.mode == CPUMODE_32BIT
1141	&& Cpu.opmode == CPUMODE_32BIT
1142	&& Cpu.addrmode == CPUMODE_32BIT
1143	&& Cpu.prefix == PREFIX_REP
1144	&& !pRegFrame->eflags.Bits.u1DF
1145	)
1146	{
1147	rc = pgmPoolAccessHandlerSTOSD(pVM, pPool, pPage, &Cpu, pRegFrame, GCPhysFault, pvFault);
1148	STAM_PROFILE_STOP_EX(&pVM->pgm.s.CTX_SUFF(pPool)->CTX_SUFF_Z(StatMonitor), &pPool->CTX_MID_Z(StatMonitor,RepStosd), a);
1149	return rc;
1150	}
1151
1152	/* REP prefix, don't bother. */
1153	STAM_COUNTER_INC(&pPool->CTX_MID_Z(StatMonitor,RepPrefix));
1154	Log4(("pgmPoolAccessHandler: eax=%#x ecx=%#x edi=%#x esi=%#x rip=%RGv opcode=%d prefix=%#x\n",
1155	pRegFrame->eax, pRegFrame->ecx, pRegFrame->edi, pRegFrame->esi, (RTGCPTR)pRegFrame->rip, Cpu.pCurInstr->opcode, Cpu.prefix));
1156	}
1157
1158	/*
1159	* Not worth it, so flush it.
1160	*
1161	* If we considered it to be reused, don't to back to ring-3
1162	* to emulate failed instructions since we usually cannot
1163	* interpret then. This may be a bit risky, in which case
1164	* the reuse detection must be fixed.
1165	*/
1166	rc = pgmPoolAccessHandlerFlush(pVM, pPool, pPage, &Cpu, pRegFrame, GCPhysFault, pvFault);
1167	if (rc == VINF_EM_RAW_EMULATE_INSTR && fReused)
1168	rc = VINF_SUCCESS;
1169	STAM_PROFILE_STOP_EX(&pVM->pgm.s.CTX_SUFF(pPool)->CTX_SUFF_Z(StatMonitor), &pPool->CTX_MID_Z(StatMonitor,FlushPage), a);
1170	return rc;
1171	}
1172
1173	# endif /* !IN_RING3 */
1174	#endif /* PGMPOOL_WITH_MONITORING */
1175
1176	#ifdef PGMPOOL_WITH_CACHE
1177
1178	/**
1179	* Inserts a page into the GCPhys hash table.
1180	*
1181	* @param pPool The pool.
1182	* @param pPage The page.
1183	*/
1184	DECLINLINE(void) pgmPoolHashInsert(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
1185	{
1186	Log3(("pgmPoolHashInsert: %RGp\n", pPage->GCPhys));
1187	Assert(pPage->GCPhys != NIL_RTGCPHYS); Assert(pPage->iNext == NIL_PGMPOOL_IDX);
1188	uint16_t iHash = PGMPOOL_HASH(pPage->GCPhys);
1189	pPage->iNext = pPool->aiHash[iHash];
1190	pPool->aiHash[iHash] = pPage->idx;
1191	}
1192
1193
1194	/**
1195	* Removes a page from the GCPhys hash table.
1196	*
1197	* @param pPool The pool.
1198	* @param pPage The page.
1199	*/
1200	DECLINLINE(void) pgmPoolHashRemove(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
1201	{
1202	Log3(("pgmPoolHashRemove: %RGp\n", pPage->GCPhys));
1203	uint16_t iHash = PGMPOOL_HASH(pPage->GCPhys);
1204	if (pPool->aiHash[iHash] == pPage->idx)
1205	pPool->aiHash[iHash] = pPage->iNext;
1206	else
1207	{
1208	uint16_t iPrev = pPool->aiHash[iHash];
1209	for (;;)
1210	{
1211	const int16_t i = pPool->aPages[iPrev].iNext;
1212	if (i == pPage->idx)
1213	{
1214	pPool->aPages[iPrev].iNext = pPage->iNext;
1215	break;
1216	}
1217	if (i == NIL_PGMPOOL_IDX)
1218	{
1219	AssertReleaseMsgFailed(("GCPhys=%RGp idx=%#x\n", pPage->GCPhys, pPage->idx));
1220	break;
1221	}
1222	iPrev = i;
1223	}
1224	}
1225	pPage->iNext = NIL_PGMPOOL_IDX;
1226	}
1227
1228
1229	/**
1230	* Frees up one cache page.
1231	*
1232	* @returns VBox status code.
1233	* @retval VINF_SUCCESS on success.
1234	* @param pPool The pool.
1235	* @param iUser The user index.
1236	*/
1237	static int pgmPoolCacheFreeOne(PPGMPOOL pPool, uint16_t iUser)
1238	{
1239	#ifndef IN_RC
1240	const PVM pVM = pPool->CTX_SUFF(pVM);
1241	#endif
1242	Assert(pPool->iAgeHead != pPool->iAgeTail); /* We shouldn't be here if there < 2 cached entries! */
1243	STAM_COUNTER_INC(&pPool->StatCacheFreeUpOne);
1244
1245	/*
1246	* Select one page from the tail of the age list.
1247	*/
1248	uint16_t iToFree = pPool->iAgeTail;
1249	if (iToFree == iUser)
1250	iToFree = pPool->aPages[iToFree].iAgePrev;
1251	/* This is the alternative to the SyncCR3 pgmPoolCacheUsed calls.
1252	if (pPool->aPages[iToFree].iUserHead != NIL_PGMPOOL_USER_INDEX)
1253	{
1254	uint16_t i = pPool->aPages[iToFree].iAgePrev;
1255	for (unsigned j = 0; j < 10 && i != NIL_PGMPOOL_USER_INDEX; j++, i = pPool->aPages[i].iAgePrev)
1256	{
1257	if (pPool->aPages[iToFree].iUserHead == NIL_PGMPOOL_USER_INDEX)
1258	continue;
1259	iToFree = i;
1260	break;
1261	}
1262	}
1263	*/
1264
1265	Assert(iToFree != iUser);
1266	AssertRelease(iToFree != NIL_PGMPOOL_IDX);
1267
1268	PPGMPOOLPAGE pPage = &pPool->aPages[iToFree];
1269
1270	/*
1271	* Reject any attempts at flushing the currently active shadow CR3 mapping
1272	*/
1273	if (pgmPoolIsPageLocked(&pPool->CTX_SUFF(pVM)->pgm.s, pPage))
1274	{
1275	/* Refresh the cr3 mapping by putting it at the head of the age list. */
1276	LogFlow(("pgmPoolCacheFreeOne refuse CR3 mapping\n"));
1277	pgmPoolCacheUsed(pPool, pPage);
1278	return pgmPoolCacheFreeOne(pPool, iUser);
1279	}
1280
1281	int rc = pgmPoolFlushPage(pPool, pPage);
1282	if (rc == VINF_SUCCESS)
1283	PGM_INVL_GUEST_TLBS(); /* see PT handler. */
1284	return rc;
1285	}
1286
1287
1288	/**
1289	* Checks if a kind mismatch is really a page being reused
1290	* or if it's just normal remappings.
1291	*
1292	* @returns true if reused and the cached page (enmKind1) should be flushed
1293	* @returns false if not reused.
1294	* @param enmKind1 The kind of the cached page.
1295	* @param enmKind2 The kind of the requested page.
1296	*/
1297	static bool pgmPoolCacheReusedByKind(PGMPOOLKIND enmKind1, PGMPOOLKIND enmKind2)
1298	{
1299	switch (enmKind1)
1300	{
1301	/*
1302	* Never reuse them. There is no remapping in non-paging mode.
1303	*/
1304	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
1305	case PGMPOOLKIND_32BIT_PD_PHYS:
1306	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
1307	case PGMPOOLKIND_PAE_PD_PHYS:
1308	case PGMPOOLKIND_PAE_PDPT_PHYS:
1309	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
1310	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
1311	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
1312	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
1313	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
1314	case PGMPOOLKIND_PAE_PDPT_FOR_32BIT: /* never reuse them for other types */
1315	return false;
1316
1317	/*
1318	* It's perfectly fine to reuse these, except for PAE and non-paging stuff.
1319	*/
1320	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
1321	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
1322	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
1323	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
1324	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
1325	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
1326	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
1327	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
1328	case PGMPOOLKIND_32BIT_PD:
1329	case PGMPOOLKIND_PAE_PDPT:
1330	switch (enmKind2)
1331	{
1332	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
1333	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
1334	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
1335	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
1336	case PGMPOOLKIND_64BIT_PML4:
1337	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
1338	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
1339	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
1340	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
1341	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
1342	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
1343	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
1344	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
1345	return true;
1346	default:
1347	return false;
1348	}
1349
1350	/*
1351	* It's perfectly fine to reuse these, except for PAE and non-paging stuff.
1352	*/
1353	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
1354	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
1355	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
1356	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
1357	case PGMPOOLKIND_64BIT_PML4:
1358	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
1359	switch (enmKind2)
1360	{
1361	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
1362	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
1363	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
1364	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
1365	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
1366	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
1367	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
1368	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
1369	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
1370	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
1371	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
1372	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
1373	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
1374	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
1375	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
1376	return true;
1377	default:
1378	return false;
1379	}
1380
1381	/*
1382	* These cannot be flushed, and it's common to reuse the PDs as PTs.
1383	*/
1384	case PGMPOOLKIND_ROOT_NESTED:
1385	return false;
1386
1387	default:
1388	AssertFatalMsgFailed(("enmKind1=%d\n", enmKind1));
1389	}
1390	}
1391
1392
1393	/**
1394	* Attempts to satisfy a pgmPoolAlloc request from the cache.
1395	*
1396	* @returns VBox status code.
1397	* @retval VINF_PGM_CACHED_PAGE on success.
1398	* @retval VERR_FILE_NOT_FOUND if not found.
1399	* @param pPool The pool.
1400	* @param GCPhys The GC physical address of the page we're gonna shadow.
1401	* @param enmKind The kind of mapping.
1402	* @param iUser The shadow page pool index of the user table.
1403	* @param iUserTable The index into the user table (shadowed).
1404	* @param ppPage Where to store the pointer to the page.
1405	*/
1406	static int pgmPoolCacheAlloc(PPGMPOOL pPool, RTGCPHYS GCPhys, PGMPOOLKIND enmKind, uint16_t iUser, uint32_t iUserTable, PPPGMPOOLPAGE ppPage)
1407	{
1408	#ifndef IN_RC
1409	const PVM pVM = pPool->CTX_SUFF(pVM);
1410	#endif
1411	/*
1412	* Look up the GCPhys in the hash.
1413	*/
1414	unsigned i = pPool->aiHash[PGMPOOL_HASH(GCPhys)];
1415	Log3(("pgmPoolCacheAlloc: %RGp kind %s iUser=%x iUserTable=%x SLOT=%d\n", GCPhys, pgmPoolPoolKindToStr(enmKind), iUser, iUserTable, i));
1416	if (i != NIL_PGMPOOL_IDX)
1417	{
1418	do
1419	{
1420	PPGMPOOLPAGE pPage = &pPool->aPages[i];
1421	Log4(("pgmPoolCacheAlloc: slot %d found page %RGp\n", i, pPage->GCPhys));
1422	if (pPage->GCPhys == GCPhys)
1423	{
1424	if ((PGMPOOLKIND)pPage->enmKind == enmKind)
1425	{
1426	/* Put it at the start of the use list to make sure pgmPoolTrackAddUser
1427	* doesn't flush it in case there are no more free use records.
1428	*/
1429	pgmPoolCacheUsed(pPool, pPage);
1430
1431	int rc = pgmPoolTrackAddUser(pPool, pPage, iUser, iUserTable);
1432	if (RT_SUCCESS(rc))
1433	{
1434	Assert((PGMPOOLKIND)pPage->enmKind == enmKind);
1435	*ppPage = pPage;
1436	STAM_COUNTER_INC(&pPool->StatCacheHits);
1437	return VINF_PGM_CACHED_PAGE;
1438	}
1439	return rc;
1440	}
1441
1442	/*
1443	* The kind is different. In some cases we should now flush the page
1444	* as it has been reused, but in most cases this is normal remapping
1445	* of PDs as PT or big pages using the GCPhys field in a slightly
1446	* different way than the other kinds.
1447	*/
1448	if (pgmPoolCacheReusedByKind((PGMPOOLKIND)pPage->enmKind, enmKind))
1449	{
1450	STAM_COUNTER_INC(&pPool->StatCacheKindMismatches);
1451	pgmPoolFlushPage(pPool, pPage);
1452	PGM_INVL_GUEST_TLBS(); /* see PT handler. */
1453	break;
1454	}
1455	}
1456
1457	/* next */
1458	i = pPage->iNext;
1459	} while (i != NIL_PGMPOOL_IDX);
1460	}
1461
1462	Log3(("pgmPoolCacheAlloc: Missed GCPhys=%RGp enmKind=%s\n", GCPhys, pgmPoolPoolKindToStr(enmKind)));
1463	STAM_COUNTER_INC(&pPool->StatCacheMisses);
1464	return VERR_FILE_NOT_FOUND;
1465	}
1466
1467
1468	/**
1469	* Inserts a page into the cache.
1470	*
1471	* @param pPool The pool.
1472	* @param pPage The cached page.
1473	* @param fCanBeCached Set if the page is fit for caching from the caller's point of view.
1474	*/
1475	static void pgmPoolCacheInsert(PPGMPOOL pPool, PPGMPOOLPAGE pPage, bool fCanBeCached)
1476	{
1477	/*
1478	* Insert into the GCPhys hash if the page is fit for that.
1479	*/
1480	Assert(!pPage->fCached);
1481	if (fCanBeCached)
1482	{
1483	pPage->fCached = true;
1484	pgmPoolHashInsert(pPool, pPage);
1485	Log3(("pgmPoolCacheInsert: Caching %p:{.Core=%RHp, .idx=%d, .enmKind=%s, GCPhys=%RGp}\n",
1486	pPage, pPage->Core.Key, pPage->idx, pgmPoolPoolKindToStr(pPage->enmKind), pPage->GCPhys));
1487	STAM_COUNTER_INC(&pPool->StatCacheCacheable);
1488	}
1489	else
1490	{
1491	Log3(("pgmPoolCacheInsert: Not caching %p:{.Core=%RHp, .idx=%d, .enmKind=%s, GCPhys=%RGp}\n",
1492	pPage, pPage->Core.Key, pPage->idx, pgmPoolPoolKindToStr(pPage->enmKind), pPage->GCPhys));
1493	STAM_COUNTER_INC(&pPool->StatCacheUncacheable);
1494	}
1495
1496	/*
1497	* Insert at the head of the age list.
1498	*/
1499	pPage->iAgePrev = NIL_PGMPOOL_IDX;
1500	pPage->iAgeNext = pPool->iAgeHead;
1501	if (pPool->iAgeHead != NIL_PGMPOOL_IDX)
1502	pPool->aPages[pPool->iAgeHead].iAgePrev = pPage->idx;
1503	else
1504	pPool->iAgeTail = pPage->idx;
1505	pPool->iAgeHead = pPage->idx;
1506	}
1507
1508
1509	/**
1510	* Flushes a cached page.
1511	*
1512	* @param pPool The pool.
1513	* @param pPage The cached page.
1514	*/
1515	static void pgmPoolCacheFlushPage(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
1516	{
1517	Log3(("pgmPoolCacheFlushPage: %RGp\n", pPage->GCPhys));
1518
1519	/*
1520	* Remove the page from the hash.
1521	*/
1522	if (pPage->fCached)
1523	{
1524	pPage->fCached = false;
1525	pgmPoolHashRemove(pPool, pPage);
1526	}
1527	else
1528	Assert(pPage->iNext == NIL_PGMPOOL_IDX);
1529
1530	/*
1531	* Remove it from the age list.
1532	*/
1533	if (pPage->iAgeNext != NIL_PGMPOOL_IDX)
1534	pPool->aPages[pPage->iAgeNext].iAgePrev = pPage->iAgePrev;
1535	else
1536	pPool->iAgeTail = pPage->iAgePrev;
1537	if (pPage->iAgePrev != NIL_PGMPOOL_IDX)
1538	pPool->aPages[pPage->iAgePrev].iAgeNext = pPage->iAgeNext;
1539	else
1540	pPool->iAgeHead = pPage->iAgeNext;
1541	pPage->iAgeNext = NIL_PGMPOOL_IDX;
1542	pPage->iAgePrev = NIL_PGMPOOL_IDX;
1543	}
1544
1545	#endif /* PGMPOOL_WITH_CACHE */
1546	#ifdef PGMPOOL_WITH_MONITORING
1547
1548	/**
1549	* Looks for pages sharing the monitor.
1550	*
1551	* @returns Pointer to the head page.
1552	* @returns NULL if not found.
1553	* @param pPool The Pool
1554	* @param pNewPage The page which is going to be monitored.
1555	*/
1556	static PPGMPOOLPAGE pgmPoolMonitorGetPageByGCPhys(PPGMPOOL pPool, PPGMPOOLPAGE pNewPage)
1557	{
1558	#ifdef PGMPOOL_WITH_CACHE
1559	/*
1560	* Look up the GCPhys in the hash.
1561	*/
1562	RTGCPHYS GCPhys = pNewPage->GCPhys & ~(RTGCPHYS)(PAGE_SIZE - 1);
1563	unsigned i = pPool->aiHash[PGMPOOL_HASH(GCPhys)];
1564	if (i == NIL_PGMPOOL_IDX)
1565	return NULL;
1566	do
1567	{
1568	PPGMPOOLPAGE pPage = &pPool->aPages[i];
1569	if ( pPage->GCPhys - GCPhys < PAGE_SIZE
1570	&& pPage != pNewPage)
1571	{
1572	switch (pPage->enmKind)
1573	{
1574	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
1575	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
1576	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
1577	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
1578	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
1579	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
1580	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
1581	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
1582	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
1583	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
1584	case PGMPOOLKIND_64BIT_PML4:
1585	case PGMPOOLKIND_32BIT_PD:
1586	case PGMPOOLKIND_PAE_PDPT:
1587	{
1588	/* find the head */
1589	while (pPage->iMonitoredPrev != NIL_PGMPOOL_IDX)
1590	{
1591	Assert(pPage->iMonitoredPrev != pPage->idx);
1592	pPage = &pPool->aPages[pPage->iMonitoredPrev];
1593	}
1594	return pPage;
1595	}
1596
1597	/* ignore, no monitoring. */
1598	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
1599	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
1600	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
1601	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
1602	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
1603	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
1604	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
1605	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
1606	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
1607	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
1608	case PGMPOOLKIND_ROOT_NESTED:
1609	case PGMPOOLKIND_PAE_PD_PHYS:
1610	case PGMPOOLKIND_PAE_PDPT_PHYS:
1611	case PGMPOOLKIND_32BIT_PD_PHYS:
1612	case PGMPOOLKIND_PAE_PDPT_FOR_32BIT:
1613	break;
1614	default:
1615	AssertFatalMsgFailed(("enmKind=%d idx=%d\n", pPage->enmKind, pPage->idx));
1616	}
1617	}
1618
1619	/* next */
1620	i = pPage->iNext;
1621	} while (i != NIL_PGMPOOL_IDX);
1622	#endif
1623	return NULL;
1624	}
1625
1626
1627	/**
1628	* Enabled write monitoring of a guest page.
1629	*
1630	* @returns VBox status code.
1631	* @retval VINF_SUCCESS on success.
1632	* @param pPool The pool.
1633	* @param pPage The cached page.
1634	*/
1635	static int pgmPoolMonitorInsert(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
1636	{
1637	LogFlow(("pgmPoolMonitorInsert %RGp\n", pPage->GCPhys & ~(RTGCPHYS)(PAGE_SIZE - 1)));
1638
1639	/*
1640	* Filter out the relevant kinds.
1641	*/
1642	switch (pPage->enmKind)
1643	{
1644	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
1645	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
1646	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
1647	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
1648	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
1649	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
1650	case PGMPOOLKIND_64BIT_PML4:
1651	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
1652	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
1653	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
1654	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
1655	case PGMPOOLKIND_32BIT_PD:
1656	case PGMPOOLKIND_PAE_PDPT:
1657	break;
1658
1659	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
1660	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
1661	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
1662	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
1663	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
1664	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
1665	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
1666	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
1667	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
1668	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
1669	case PGMPOOLKIND_ROOT_NESTED:
1670	/* Nothing to monitor here. */
1671	return VINF_SUCCESS;
1672
1673	case PGMPOOLKIND_32BIT_PD_PHYS:
1674	case PGMPOOLKIND_PAE_PDPT_PHYS:
1675	case PGMPOOLKIND_PAE_PD_PHYS:
1676	case PGMPOOLKIND_PAE_PDPT_FOR_32BIT:
1677	/* Nothing to monitor here. */
1678	return VINF_SUCCESS;
1679	#ifdef PGMPOOL_WITH_MIXED_PT_CR3
1680	break;
1681	#else
1682	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
1683	#endif
1684	default:
1685	AssertFatalMsgFailed(("This can't happen! enmKind=%d\n", pPage->enmKind));
1686	}
1687
1688	/*
1689	* Install handler.
1690	*/
1691	int rc;
1692	PPGMPOOLPAGE pPageHead = pgmPoolMonitorGetPageByGCPhys(pPool, pPage);
1693	if (pPageHead)
1694	{
1695	Assert(pPageHead != pPage); Assert(pPageHead->iMonitoredNext != pPage->idx);
1696	Assert(pPageHead->iMonitoredPrev != pPage->idx);
1697	pPage->iMonitoredPrev = pPageHead->idx;
1698	pPage->iMonitoredNext = pPageHead->iMonitoredNext;
1699	if (pPageHead->iMonitoredNext != NIL_PGMPOOL_IDX)
1700	pPool->aPages[pPageHead->iMonitoredNext].iMonitoredPrev = pPage->idx;
1701	pPageHead->iMonitoredNext = pPage->idx;
1702	rc = VINF_SUCCESS;
1703	}
1704	else
1705	{
1706	Assert(pPage->iMonitoredNext == NIL_PGMPOOL_IDX); Assert(pPage->iMonitoredPrev == NIL_PGMPOOL_IDX);
1707	PVM pVM = pPool->CTX_SUFF(pVM);
1708	const RTGCPHYS GCPhysPage = pPage->GCPhys & ~(RTGCPHYS)(PAGE_SIZE - 1);
1709	rc = PGMHandlerPhysicalRegisterEx(pVM, PGMPHYSHANDLERTYPE_PHYSICAL_WRITE,
1710	GCPhysPage, GCPhysPage + (PAGE_SIZE - 1),
1711	pPool->pfnAccessHandlerR3, MMHyperCCToR3(pVM, pPage),
1712	pPool->pfnAccessHandlerR0, MMHyperCCToR0(pVM, pPage),
1713	pPool->pfnAccessHandlerRC, MMHyperCCToRC(pVM, pPage),
1714	pPool->pszAccessHandler);
1715	/** @todo we should probably deal with out-of-memory conditions here, but for now increasing
1716	* the heap size should suffice. */
1717	AssertFatalRC(rc);
1718	Assert(!(pVM->pgm.s.fSyncFlags & PGM_SYNC_CLEAR_PGM_POOL) \|\| VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3));
1719	}
1720	pPage->fMonitored = true;
1721	return rc;
1722	}
1723
1724
1725	/**
1726	* Disables write monitoring of a guest page.
1727	*
1728	* @returns VBox status code.
1729	* @retval VINF_SUCCESS on success.
1730	* @param pPool The pool.
1731	* @param pPage The cached page.
1732	*/
1733	static int pgmPoolMonitorFlush(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
1734	{
1735	/*
1736	* Filter out the relevant kinds.
1737	*/
1738	switch (pPage->enmKind)
1739	{
1740	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
1741	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
1742	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
1743	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
1744	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
1745	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
1746	case PGMPOOLKIND_64BIT_PML4:
1747	case PGMPOOLKIND_32BIT_PD:
1748	case PGMPOOLKIND_PAE_PDPT:
1749	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
1750	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
1751	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
1752	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
1753	break;
1754
1755	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
1756	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
1757	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
1758	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
1759	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
1760	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
1761	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
1762	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
1763	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
1764	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
1765	case PGMPOOLKIND_ROOT_NESTED:
1766	case PGMPOOLKIND_PAE_PD_PHYS:
1767	case PGMPOOLKIND_PAE_PDPT_PHYS:
1768	case PGMPOOLKIND_32BIT_PD_PHYS:
1769	/* Nothing to monitor here. */
1770	return VINF_SUCCESS;
1771
1772	#ifdef PGMPOOL_WITH_MIXED_PT_CR3
1773	break;
1774	#endif
1775	default:
1776	AssertFatalMsgFailed(("This can't happen! enmKind=%d\n", pPage->enmKind));
1777	}
1778
1779	/*
1780	* Remove the page from the monitored list or uninstall it if last.
1781	*/
1782	const PVM pVM = pPool->CTX_SUFF(pVM);
1783	int rc;
1784	if ( pPage->iMonitoredNext != NIL_PGMPOOL_IDX
1785	\|\| pPage->iMonitoredPrev != NIL_PGMPOOL_IDX)
1786	{
1787	if (pPage->iMonitoredPrev == NIL_PGMPOOL_IDX)
1788	{
1789	PPGMPOOLPAGE pNewHead = &pPool->aPages[pPage->iMonitoredNext];
1790	pNewHead->iMonitoredPrev = NIL_PGMPOOL_IDX;
1791	rc = PGMHandlerPhysicalChangeCallbacks(pVM, pPage->GCPhys & ~(RTGCPHYS)(PAGE_SIZE - 1),
1792	pPool->pfnAccessHandlerR3, MMHyperCCToR3(pVM, pNewHead),
1793	pPool->pfnAccessHandlerR0, MMHyperCCToR0(pVM, pNewHead),
1794	pPool->pfnAccessHandlerRC, MMHyperCCToRC(pVM, pNewHead),
1795	pPool->pszAccessHandler);
1796	AssertFatalRCSuccess(rc);
1797	pPage->iMonitoredNext = NIL_PGMPOOL_IDX;
1798	}
1799	else
1800	{
1801	pPool->aPages[pPage->iMonitoredPrev].iMonitoredNext = pPage->iMonitoredNext;
1802	if (pPage->iMonitoredNext != NIL_PGMPOOL_IDX)
1803	{
1804	pPool->aPages[pPage->iMonitoredNext].iMonitoredPrev = pPage->iMonitoredPrev;
1805	pPage->iMonitoredNext = NIL_PGMPOOL_IDX;
1806	}
1807	pPage->iMonitoredPrev = NIL_PGMPOOL_IDX;
1808	rc = VINF_SUCCESS;
1809	}
1810	}
1811	else
1812	{
1813	rc = PGMHandlerPhysicalDeregister(pVM, pPage->GCPhys & ~(RTGCPHYS)(PAGE_SIZE - 1));
1814	AssertFatalRC(rc);
1815	Assert(!(pVM->pgm.s.fSyncFlags & PGM_SYNC_CLEAR_PGM_POOL) \|\| VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3));
1816	}
1817	pPage->fMonitored = false;
1818
1819	/*
1820	* Remove it from the list of modified pages (if in it).
1821	*/
1822	pgmPoolMonitorModifiedRemove(pPool, pPage);
1823
1824	return rc;
1825	}
1826
1827
1828	/**
1829	* Inserts the page into the list of modified pages.
1830	*
1831	* @param pPool The pool.
1832	* @param pPage The page.
1833	*/
1834	void pgmPoolMonitorModifiedInsert(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
1835	{
1836	Log3(("pgmPoolMonitorModifiedInsert: idx=%d\n", pPage->idx));
1837	AssertMsg( pPage->iModifiedNext == NIL_PGMPOOL_IDX
1838	&& pPage->iModifiedPrev == NIL_PGMPOOL_IDX
1839	&& pPool->iModifiedHead != pPage->idx,
1840	("Next=%d Prev=%d idx=%d cModifications=%d Head=%d cModifiedPages=%d\n",
1841	pPage->iModifiedNext, pPage->iModifiedPrev, pPage->idx, pPage->cModifications,
1842	pPool->iModifiedHead, pPool->cModifiedPages));
1843
1844	pPage->iModifiedNext = pPool->iModifiedHead;
1845	if (pPool->iModifiedHead != NIL_PGMPOOL_IDX)
1846	pPool->aPages[pPool->iModifiedHead].iModifiedPrev = pPage->idx;
1847	pPool->iModifiedHead = pPage->idx;
1848	pPool->cModifiedPages++;
1849	#ifdef VBOX_WITH_STATISTICS
1850	if (pPool->cModifiedPages > pPool->cModifiedPagesHigh)
1851	pPool->cModifiedPagesHigh = pPool->cModifiedPages;
1852	#endif
1853	}
1854
1855
1856	/**
1857	* Removes the page from the list of modified pages and resets the
1858	* moficiation counter.
1859	*
1860	* @param pPool The pool.
1861	* @param pPage The page which is believed to be in the list of modified pages.
1862	*/
1863	static void pgmPoolMonitorModifiedRemove(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
1864	{
1865	Log3(("pgmPoolMonitorModifiedRemove: idx=%d cModifications=%d\n", pPage->idx, pPage->cModifications));
1866	if (pPool->iModifiedHead == pPage->idx)
1867	{
1868	Assert(pPage->iModifiedPrev == NIL_PGMPOOL_IDX);
1869	pPool->iModifiedHead = pPage->iModifiedNext;
1870	if (pPage->iModifiedNext != NIL_PGMPOOL_IDX)
1871	{
1872	pPool->aPages[pPage->iModifiedNext].iModifiedPrev = NIL_PGMPOOL_IDX;
1873	pPage->iModifiedNext = NIL_PGMPOOL_IDX;
1874	}
1875	pPool->cModifiedPages--;
1876	}
1877	else if (pPage->iModifiedPrev != NIL_PGMPOOL_IDX)
1878	{
1879	pPool->aPages[pPage->iModifiedPrev].iModifiedNext = pPage->iModifiedNext;
1880	if (pPage->iModifiedNext != NIL_PGMPOOL_IDX)
1881	{
1882	pPool->aPages[pPage->iModifiedNext].iModifiedPrev = pPage->iModifiedPrev;
1883	pPage->iModifiedNext = NIL_PGMPOOL_IDX;
1884	}
1885	pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
1886	pPool->cModifiedPages--;
1887	}
1888	else
1889	Assert(pPage->iModifiedPrev == NIL_PGMPOOL_IDX);
1890	pPage->cModifications = 0;
1891	}
1892
1893
1894	/**
1895	* Zaps the list of modified pages, resetting their modification counters in the process.
1896	*
1897	* @param pVM The VM handle.
1898	*/
1899	void pgmPoolMonitorModifiedClearAll(PVM pVM)
1900	{
1901	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
1902	LogFlow(("pgmPoolMonitorModifiedClearAll: cModifiedPages=%d\n", pPool->cModifiedPages));
1903
1904	unsigned cPages = 0; NOREF(cPages);
1905	uint16_t idx = pPool->iModifiedHead;
1906	pPool->iModifiedHead = NIL_PGMPOOL_IDX;
1907	while (idx != NIL_PGMPOOL_IDX)
1908	{
1909	PPGMPOOLPAGE pPage = &pPool->aPages[idx];
1910	idx = pPage->iModifiedNext;
1911	pPage->iModifiedNext = NIL_PGMPOOL_IDX;
1912	pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
1913	pPage->cModifications = 0;
1914	Assert(++cPages);
1915	}
1916	AssertMsg(cPages == pPool->cModifiedPages, ("%d != %d\n", cPages, pPool->cModifiedPages));
1917	pPool->cModifiedPages = 0;
1918	}
1919
1920
1921	#ifdef IN_RING3
1922	/**
1923	* Clear all shadow pages and clear all modification counters.
1924	*
1925	* @param pVM The VM handle.
1926	* @remark Should only be used when monitoring is available, thus placed in
1927	* the PGMPOOL_WITH_MONITORING #ifdef.
1928	*/
1929	void pgmPoolClearAll(PVM pVM)
1930	{
1931	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
1932	STAM_PROFILE_START(&pPool->StatClearAll, c);
1933	LogFlow(("pgmPoolClearAll: cUsedPages=%d\n", pPool->cUsedPages));
1934
1935	/*
1936	* Iterate all the pages until we've encountered all that in use.
1937	* This is simple but not quite optimal solution.
1938	*/
1939	unsigned cModifiedPages = 0; NOREF(cModifiedPages);
1940	unsigned cLeft = pPool->cUsedPages;
1941	unsigned iPage = pPool->cCurPages;
1942	while (--iPage >= PGMPOOL_IDX_FIRST)
1943	{
1944	PPGMPOOLPAGE pPage = &pPool->aPages[iPage];
1945	if (pPage->GCPhys != NIL_RTGCPHYS)
1946	{
1947	switch (pPage->enmKind)
1948	{
1949	/*
1950	* We only care about shadow page tables.
1951	*/
1952	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
1953	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
1954	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
1955	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
1956	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
1957	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
1958	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
1959	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
1960	{
1961	#ifdef PGMPOOL_WITH_USER_TRACKING
1962	if (pPage->cPresent)
1963	#endif
1964	{
1965	void *pvShw = PGMPOOL_PAGE_2_PTR(pPool->CTX_SUFF(pVM), pPage);
1966	STAM_PROFILE_START(&pPool->StatZeroPage, z);
1967	ASMMemZeroPage(pvShw);
1968	STAM_PROFILE_STOP(&pPool->StatZeroPage, z);
1969	#ifdef PGMPOOL_WITH_USER_TRACKING
1970	pPage->cPresent = 0;
1971	pPage->iFirstPresent = ~0;
1972	#endif
1973	}
1974	}
1975	/* fall thru */
1976
1977	default:
1978	Assert(!pPage->cModifications \|\| ++cModifiedPages);
1979	Assert(pPage->iModifiedNext == NIL_PGMPOOL_IDX \|\| pPage->cModifications);
1980	Assert(pPage->iModifiedPrev == NIL_PGMPOOL_IDX \|\| pPage->cModifications);
1981	pPage->iModifiedNext = NIL_PGMPOOL_IDX;
1982	pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
1983	pPage->cModifications = 0;
1984	break;
1985
1986	}
1987	if (!--cLeft)
1988	break;
1989	}
1990	}
1991
1992	/* swipe the special pages too. */
1993	for (iPage = PGMPOOL_IDX_FIRST_SPECIAL; iPage < PGMPOOL_IDX_FIRST; iPage++)
1994	{
1995	PPGMPOOLPAGE pPage = &pPool->aPages[iPage];
1996	if (pPage->GCPhys != NIL_RTGCPHYS)
1997	{
1998	Assert(!pPage->cModifications \|\| ++cModifiedPages);
1999	Assert(pPage->iModifiedNext == NIL_PGMPOOL_IDX \|\| pPage->cModifications);
2000	Assert(pPage->iModifiedPrev == NIL_PGMPOOL_IDX \|\| pPage->cModifications);
2001	pPage->iModifiedNext = NIL_PGMPOOL_IDX;
2002	pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
2003	pPage->cModifications = 0;
2004	}
2005	}
2006
2007	#ifndef DEBUG_michael
2008	AssertMsg(cModifiedPages == pPool->cModifiedPages, ("%d != %d\n", cModifiedPages, pPool->cModifiedPages));
2009	#endif
2010	pPool->iModifiedHead = NIL_PGMPOOL_IDX;
2011	pPool->cModifiedPages = 0;
2012
2013	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
2014	/*
2015	* Clear all the GCPhys links and rebuild the phys ext free list.
2016	*/
2017	for (PPGMRAMRANGE pRam = pPool->CTX_SUFF(pVM)->pgm.s.CTX_SUFF(pRamRanges);
2018	pRam;
2019	pRam = pRam->CTX_SUFF(pNext))
2020	{
2021	unsigned iPage = pRam->cb >> PAGE_SHIFT;
2022	while (iPage-- > 0)
2023	PGM_PAGE_SET_TRACKING(&pRam->aPages[iPage], 0);
2024	}
2025
2026	pPool->iPhysExtFreeHead = 0;
2027	PPGMPOOLPHYSEXT paPhysExts = pPool->CTX_SUFF(paPhysExts);
2028	const unsigned cMaxPhysExts = pPool->cMaxPhysExts;
2029	for (unsigned i = 0; i < cMaxPhysExts; i++)
2030	{
2031	paPhysExts[i].iNext = i + 1;
2032	paPhysExts[i].aidx[0] = NIL_PGMPOOL_IDX;
2033	paPhysExts[i].aidx[1] = NIL_PGMPOOL_IDX;
2034	paPhysExts[i].aidx[2] = NIL_PGMPOOL_IDX;
2035	}
2036	paPhysExts[cMaxPhysExts - 1].iNext = NIL_PGMPOOL_PHYSEXT_INDEX;
2037	#endif
2038
2039
2040	pPool->cPresent = 0;
2041	STAM_PROFILE_STOP(&pPool->StatClearAll, c);
2042	}
2043	#endif /* IN_RING3 */
2044
2045
2046	/**
2047	* Handle SyncCR3 pool tasks
2048	*
2049	* @returns VBox status code.
2050	* @retval VINF_SUCCESS if successfully added.
2051	* @retval VINF_PGM_SYNC_CR3 is it needs to be deferred to ring 3 (GC only)
2052	* @param pVM The VM handle.
2053	* @remark Should only be used when monitoring is available, thus placed in
2054	* the PGMPOOL_WITH_MONITORING #ifdef.
2055	*/
2056	int pgmPoolSyncCR3(PVM pVM)
2057	{
2058	LogFlow(("pgmPoolSyncCR3\n"));
2059	/*
2060	* When monitoring shadowed pages, we reset the modification counters on CR3 sync.
2061	* Occasionally we will have to clear all the shadow page tables because we wanted
2062	* to monitor a page which was mapped by too many shadowed page tables. This operation
2063	* sometimes refered to as a 'lightweight flush'.
2064	*/
2065	if (!(pVM->pgm.s.fSyncFlags & PGM_SYNC_CLEAR_PGM_POOL))
2066	pgmPoolMonitorModifiedClearAll(pVM);
2067	else
2068	{
2069	# ifdef IN_RING3 /* Don't flush in ring-0 or raw mode, it's taking too long. */
2070	pVM->pgm.s.fSyncFlags &= ~PGM_SYNC_CLEAR_PGM_POOL;
2071	pgmPoolClearAll(pVM);
2072	# else /* !IN_RING3 */
2073	LogFlow(("SyncCR3: PGM_SYNC_CLEAR_PGM_POOL is set -> VINF_PGM_SYNC_CR3\n"));
2074	VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3); /** @todo no need to do global sync, right? */
2075	return VINF_PGM_SYNC_CR3;
2076	# endif /* !IN_RING3 */
2077	}
2078	return VINF_SUCCESS;
2079	}
2080
2081	#endif /* PGMPOOL_WITH_MONITORING */
2082	#ifdef PGMPOOL_WITH_USER_TRACKING
2083
2084	/**
2085	* Frees up at least one user entry.
2086	*
2087	* @returns VBox status code.
2088	* @retval VINF_SUCCESS if successfully added.
2089	* @retval VERR_PGM_POOL_FLUSHED if the pool was flushed.
2090	* @param pPool The pool.
2091	* @param iUser The user index.
2092	*/
2093	static int pgmPoolTrackFreeOneUser(PPGMPOOL pPool, uint16_t iUser)
2094	{
2095	STAM_COUNTER_INC(&pPool->StatTrackFreeUpOneUser);
2096	#ifdef PGMPOOL_WITH_CACHE
2097	/*
2098	* Just free cached pages in a braindead fashion.
2099	*/
2100	/** @todo walk the age list backwards and free the first with usage. */
2101	int rc = VINF_SUCCESS;
2102	do
2103	{
2104	int rc2 = pgmPoolCacheFreeOne(pPool, iUser);
2105	if (RT_FAILURE(rc2) && rc == VINF_SUCCESS)
2106	rc = rc2;
2107	} while (pPool->iUserFreeHead == NIL_PGMPOOL_USER_INDEX);
2108	return rc;
2109	#else
2110	/*
2111	* Lazy approach.
2112	*/
2113	/* @todo This path no longer works (CR3 root pages will be flushed)!! */
2114	AssertCompileFailed();
2115	Assert(!CPUMIsGuestInLongMode(pVM));
2116	pgmPoolFlushAllInt(pPool);
2117	return VERR_PGM_POOL_FLUSHED;
2118	#endif
2119	}
2120
2121
2122	/**
2123	* Inserts a page into the cache.
2124	*
2125	* This will create user node for the page, insert it into the GCPhys
2126	* hash, and insert it into the age list.
2127	*
2128	* @returns VBox status code.
2129	* @retval VINF_SUCCESS if successfully added.
2130	* @retval VERR_PGM_POOL_FLUSHED if the pool was flushed.
2131	* @param pPool The pool.
2132	* @param pPage The cached page.
2133	* @param GCPhys The GC physical address of the page we're gonna shadow.
2134	* @param iUser The user index.
2135	* @param iUserTable The user table index.
2136	*/
2137	DECLINLINE(int) pgmPoolTrackInsert(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTGCPHYS GCPhys, uint16_t iUser, uint32_t iUserTable)
2138	{
2139	int rc = VINF_SUCCESS;
2140	PPGMPOOLUSER paUsers = pPool->CTX_SUFF(paUsers);
2141
2142	LogFlow(("pgmPoolTrackInsert GCPhys=%RGp iUser %x iUserTable %x\n", GCPhys, iUser, iUserTable));
2143
2144	#ifdef VBOX_STRICT
2145	/*
2146	* Check that the entry doesn't already exists.
2147	*/
2148	if (pPage->iUserHead != NIL_PGMPOOL_USER_INDEX)
2149	{
2150	uint16_t i = pPage->iUserHead;
2151	do
2152	{
2153	Assert(i < pPool->cMaxUsers);
2154	AssertMsg(paUsers[i].iUser != iUser \|\| paUsers[i].iUserTable != iUserTable, ("%x %x vs new %x %x\n", paUsers[i].iUser, paUsers[i].iUserTable, iUser, iUserTable));
2155	i = paUsers[i].iNext;
2156	} while (i != NIL_PGMPOOL_USER_INDEX);
2157	}
2158	#endif
2159
2160	/*
2161	* Find free a user node.
2162	*/
2163	uint16_t i = pPool->iUserFreeHead;
2164	if (i == NIL_PGMPOOL_USER_INDEX)
2165	{
2166	int rc = pgmPoolTrackFreeOneUser(pPool, iUser);
2167	if (RT_FAILURE(rc))
2168	return rc;
2169	i = pPool->iUserFreeHead;
2170	}
2171
2172	/*
2173	* Unlink the user node from the free list,
2174	* initialize and insert it into the user list.
2175	*/
2176	pPool->iUserFreeHead = paUsers[i].iNext;
2177	paUsers[i].iNext = NIL_PGMPOOL_USER_INDEX;
2178	paUsers[i].iUser = iUser;
2179	paUsers[i].iUserTable = iUserTable;
2180	pPage->iUserHead = i;
2181
2182	/*
2183	* Insert into cache and enable monitoring of the guest page if enabled.
2184	*
2185	* Until we implement caching of all levels, including the CR3 one, we'll
2186	* have to make sure we don't try monitor & cache any recursive reuse of
2187	* a monitored CR3 page. Because all windows versions are doing this we'll
2188	* have to be able to do combined access monitoring, CR3 + PT and
2189	* PD + PT (guest PAE).
2190	*
2191	* Update:
2192	* We're now cooperating with the CR3 monitor if an uncachable page is found.
2193	*/
2194	#if defined(PGMPOOL_WITH_MONITORING) \|\| defined(PGMPOOL_WITH_CACHE)
2195	# ifdef PGMPOOL_WITH_MIXED_PT_CR3
2196	const bool fCanBeMonitored = true;
2197	# else
2198	bool fCanBeMonitored = pPool->CTX_SUFF(pVM)->pgm.s.GCPhysGstCR3Monitored == NIL_RTGCPHYS
2199	\|\| (GCPhys & X86_PTE_PAE_PG_MASK) != (pPool->CTX_SUFF(pVM)->pgm.s.GCPhysGstCR3Monitored & X86_PTE_PAE_PG_MASK)
2200	\|\| pgmPoolIsBigPage((PGMPOOLKIND)pPage->enmKind);
2201	# endif
2202	# ifdef PGMPOOL_WITH_CACHE
2203	pgmPoolCacheInsert(pPool, pPage, fCanBeMonitored); /* This can be expanded. */
2204	# endif
2205	if (fCanBeMonitored)
2206	{
2207	# ifdef PGMPOOL_WITH_MONITORING
2208	rc = pgmPoolMonitorInsert(pPool, pPage);
2209	AssertRC(rc);
2210	}
2211	# endif
2212	#endif /* PGMPOOL_WITH_MONITORING */
2213	return rc;
2214	}
2215
2216
2217	# ifdef PGMPOOL_WITH_CACHE /* (only used when the cache is enabled.) */
2218	/**
2219	* Adds a user reference to a page.
2220	*
2221	* This will move the page to the head of the
2222	*
2223	* @returns VBox status code.
2224	* @retval VINF_SUCCESS if successfully added.
2225	* @retval VERR_PGM_POOL_FLUSHED if the pool was flushed.
2226	* @param pPool The pool.
2227	* @param pPage The cached page.
2228	* @param iUser The user index.
2229	* @param iUserTable The user table.
2230	*/
2231	static int pgmPoolTrackAddUser(PPGMPOOL pPool, PPGMPOOLPAGE pPage, uint16_t iUser, uint32_t iUserTable)
2232	{
2233	PPGMPOOLUSER paUsers = pPool->CTX_SUFF(paUsers);
2234
2235	Log3(("pgmPoolTrackAddUser GCPhys = %RGp iUser %x iUserTable %x\n", pPage->GCPhys, iUser, iUserTable));
2236	# ifdef VBOX_STRICT
2237	/*
2238	* Check that the entry doesn't already exists.
2239	*/
2240	if (pPage->iUserHead != NIL_PGMPOOL_USER_INDEX)
2241	{
2242	uint16_t i = pPage->iUserHead;
2243	do
2244	{
2245	Assert(i < pPool->cMaxUsers);
2246	AssertMsg(paUsers[i].iUser != iUser \|\| paUsers[i].iUserTable != iUserTable, ("%x %x vs new %x %x\n", paUsers[i].iUser, paUsers[i].iUserTable, iUser, iUserTable));
2247	i = paUsers[i].iNext;
2248	} while (i != NIL_PGMPOOL_USER_INDEX);
2249	}
2250	# endif
2251
2252	/*
2253	* Allocate a user node.
2254	*/
2255	uint16_t i = pPool->iUserFreeHead;
2256	if (i == NIL_PGMPOOL_USER_INDEX)
2257	{
2258	int rc = pgmPoolTrackFreeOneUser(pPool, iUser);
2259	if (RT_FAILURE(rc))
2260	return rc;
2261	i = pPool->iUserFreeHead;
2262	}
2263	pPool->iUserFreeHead = paUsers[i].iNext;
2264
2265	/*
2266	* Initialize the user node and insert it.
2267	*/
2268	paUsers[i].iNext = pPage->iUserHead;
2269	paUsers[i].iUser = iUser;
2270	paUsers[i].iUserTable = iUserTable;
2271	pPage->iUserHead = i;
2272
2273	# ifdef PGMPOOL_WITH_CACHE
2274	/*
2275	* Tell the cache to update its replacement stats for this page.
2276	*/
2277	pgmPoolCacheUsed(pPool, pPage);
2278	# endif
2279	return VINF_SUCCESS;
2280	}
2281	# endif /* PGMPOOL_WITH_CACHE */
2282
2283
2284	/**
2285	* Frees a user record associated with a page.
2286	*
2287	* This does not clear the entry in the user table, it simply replaces the
2288	* user record to the chain of free records.
2289	*
2290	* @param pPool The pool.
2291	* @param HCPhys The HC physical address of the shadow page.
2292	* @param iUser The shadow page pool index of the user table.
2293	* @param iUserTable The index into the user table (shadowed).
2294	*/
2295	static void pgmPoolTrackFreeUser(PPGMPOOL pPool, PPGMPOOLPAGE pPage, uint16_t iUser, uint32_t iUserTable)
2296	{
2297	/*
2298	* Unlink and free the specified user entry.
2299	*/
2300	PPGMPOOLUSER paUsers = pPool->CTX_SUFF(paUsers);
2301
2302	Log3(("pgmPoolTrackFreeUser %RGp %x %x\n", pPage->GCPhys, iUser, iUserTable));
2303	/* Special: For PAE and 32-bit paging, there is usually no more than one user. */
2304	uint16_t i = pPage->iUserHead;
2305	if ( i != NIL_PGMPOOL_USER_INDEX
2306	&& paUsers[i].iUser == iUser
2307	&& paUsers[i].iUserTable == iUserTable)
2308	{
2309	pPage->iUserHead = paUsers[i].iNext;
2310
2311	paUsers[i].iUser = NIL_PGMPOOL_IDX;
2312	paUsers[i].iNext = pPool->iUserFreeHead;
2313	pPool->iUserFreeHead = i;
2314	return;
2315	}
2316
2317	/* General: Linear search. */
2318	uint16_t iPrev = NIL_PGMPOOL_USER_INDEX;
2319	while (i != NIL_PGMPOOL_USER_INDEX)
2320	{
2321	if ( paUsers[i].iUser == iUser
2322	&& paUsers[i].iUserTable == iUserTable)
2323	{
2324	if (iPrev != NIL_PGMPOOL_USER_INDEX)
2325	paUsers[iPrev].iNext = paUsers[i].iNext;
2326	else
2327	pPage->iUserHead = paUsers[i].iNext;
2328
2329	paUsers[i].iUser = NIL_PGMPOOL_IDX;
2330	paUsers[i].iNext = pPool->iUserFreeHead;
2331	pPool->iUserFreeHead = i;
2332	return;
2333	}
2334	iPrev = i;
2335	i = paUsers[i].iNext;
2336	}
2337
2338	/* Fatal: didn't find it */
2339	AssertFatalMsgFailed(("Didn't find the user entry! iUser=%#x iUserTable=%#x GCPhys=%RGp\n",
2340	iUser, iUserTable, pPage->GCPhys));
2341	}
2342
2343
2344	/**
2345	* Gets the entry size of a shadow table.
2346	*
2347	* @param enmKind The kind of page.
2348	*
2349	* @returns The size of the entry in bytes. That is, 4 or 8.
2350	* @returns If the kind is not for a table, an assertion is raised and 0 is
2351	* returned.
2352	*/
2353	DECLINLINE(unsigned) pgmPoolTrackGetShadowEntrySize(PGMPOOLKIND enmKind)
2354	{
2355	switch (enmKind)
2356	{
2357	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
2358	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
2359	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
2360	case PGMPOOLKIND_32BIT_PD:
2361	case PGMPOOLKIND_32BIT_PD_PHYS:
2362	return 4;
2363
2364	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
2365	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
2366	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
2367	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
2368	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
2369	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
2370	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
2371	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
2372	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
2373	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
2374	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
2375	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
2376	case PGMPOOLKIND_64BIT_PML4:
2377	case PGMPOOLKIND_PAE_PDPT:
2378	case PGMPOOLKIND_ROOT_NESTED:
2379	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
2380	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
2381	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
2382	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
2383	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
2384	case PGMPOOLKIND_PAE_PD_PHYS:
2385	case PGMPOOLKIND_PAE_PDPT_PHYS:
2386	return 8;
2387
2388	default:
2389	AssertFatalMsgFailed(("enmKind=%d\n", enmKind));
2390	}
2391	}
2392
2393
2394	/**
2395	* Gets the entry size of a guest table.
2396	*
2397	* @param enmKind The kind of page.
2398	*
2399	* @returns The size of the entry in bytes. That is, 0, 4 or 8.
2400	* @returns If the kind is not for a table, an assertion is raised and 0 is
2401	* returned.
2402	*/
2403	DECLINLINE(unsigned) pgmPoolTrackGetGuestEntrySize(PGMPOOLKIND enmKind)
2404	{
2405	switch (enmKind)
2406	{
2407	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
2408	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
2409	case PGMPOOLKIND_32BIT_PD:
2410	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
2411	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
2412	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
2413	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
2414	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
2415	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
2416	return 4;
2417
2418	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
2419	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
2420	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
2421	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
2422	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
2423	case PGMPOOLKIND_64BIT_PML4:
2424	case PGMPOOLKIND_PAE_PDPT:
2425	return 8;
2426
2427	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
2428	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
2429	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
2430	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
2431	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
2432	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
2433	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
2434	case PGMPOOLKIND_ROOT_NESTED:
2435	case PGMPOOLKIND_PAE_PD_PHYS:
2436	case PGMPOOLKIND_PAE_PDPT_PHYS:
2437	case PGMPOOLKIND_32BIT_PD_PHYS:
2438	/** @todo can we return 0? (nobody is calling this...) */
2439	AssertFailed();
2440	return 0;
2441
2442	default:
2443	AssertFatalMsgFailed(("enmKind=%d\n", enmKind));
2444	}
2445	}
2446
2447	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
2448
2449	/**
2450	* Scans one shadow page table for mappings of a physical page.
2451	*
2452	* @param pVM The VM handle.
2453	* @param pPhysPage The guest page in question.
2454	* @param iShw The shadow page table.
2455	* @param cRefs The number of references made in that PT.
2456	*/
2457	static void pgmPoolTrackFlushGCPhysPTInt(PVM pVM, PCPGMPAGE pPhysPage, uint16_t iShw, uint16_t cRefs)
2458	{
2459	LogFlow(("pgmPoolTrackFlushGCPhysPT: pPhysPage=%R[pgmpage] iShw=%d cRefs=%d\n", pPhysPage, iShw, cRefs));
2460	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
2461
2462	/*
2463	* Assert sanity.
2464	*/
2465	Assert(cRefs == 1);
2466	AssertFatalMsg(iShw < pPool->cCurPages && iShw != NIL_PGMPOOL_IDX, ("iShw=%d\n", iShw));
2467	PPGMPOOLPAGE pPage = &pPool->aPages[iShw];
2468
2469	/*
2470	* Then, clear the actual mappings to the page in the shadow PT.
2471	*/
2472	switch (pPage->enmKind)
2473	{
2474	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
2475	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
2476	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
2477	{
2478	const uint32_t u32 = PGM_PAGE_GET_HCPHYS(pPhysPage) \| X86_PTE_P;
2479	PX86PT pPT = (PX86PT)PGMPOOL_PAGE_2_PTR(pVM, pPage);
2480	for (unsigned i = pPage->iFirstPresent; i < RT_ELEMENTS(pPT->a); i++)
2481	if ((pPT->a[i].u & (X86_PTE_PG_MASK \| X86_PTE_P)) == u32)
2482	{
2483	Log4(("pgmPoolTrackFlushGCPhysPTs: i=%d pte=%RX32 cRefs=%#x\n", i, pPT->a[i], cRefs));
2484	pPT->a[i].u = 0;
2485	cRefs--;
2486	if (!cRefs)
2487	return;
2488	}
2489	#ifdef LOG_ENABLED
2490	RTLogPrintf("cRefs=%d iFirstPresent=%d cPresent=%d\n", cRefs, pPage->iFirstPresent, pPage->cPresent);
2491	for (unsigned i = 0; i < RT_ELEMENTS(pPT->a); i++)
2492	if ((pPT->a[i].u & (X86_PTE_PG_MASK \| X86_PTE_P)) == u32)
2493	{
2494	RTLogPrintf("i=%d cRefs=%d\n", i, cRefs--);
2495	pPT->a[i].u = 0;
2496	}
2497	#endif
2498	AssertFatalMsgFailed(("cRefs=%d iFirstPresent=%d cPresent=%d\n", cRefs, pPage->iFirstPresent, pPage->cPresent));
2499	break;
2500	}
2501
2502	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
2503	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
2504	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
2505	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
2506	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
2507	{
2508	const uint64_t u64 = PGM_PAGE_GET_HCPHYS(pPhysPage) \| X86_PTE_P;
2509	PX86PTPAE pPT = (PX86PTPAE)PGMPOOL_PAGE_2_PTR(pVM, pPage);
2510	for (unsigned i = pPage->iFirstPresent; i < RT_ELEMENTS(pPT->a); i++)
2511	if ((pPT->a[i].u & (X86_PTE_PAE_PG_MASK \| X86_PTE_P)) == u64)
2512	{
2513	Log4(("pgmPoolTrackFlushGCPhysPTs: i=%d pte=%RX64 cRefs=%#x\n", i, pPT->a[i], cRefs));
2514	pPT->a[i].u = 0;
2515	cRefs--;
2516	if (!cRefs)
2517	return;
2518	}
2519	#ifdef LOG_ENABLED
2520	RTLogPrintf("cRefs=%d iFirstPresent=%d cPresent=%d\n", cRefs, pPage->iFirstPresent, pPage->cPresent);
2521	for (unsigned i = 0; i < RT_ELEMENTS(pPT->a); i++)
2522	if ((pPT->a[i].u & (X86_PTE_PAE_PG_MASK \| X86_PTE_P)) == u64)
2523	{
2524	RTLogPrintf("i=%d cRefs=%d\n", i, cRefs--);
2525	pPT->a[i].u = 0;
2526	}
2527	#endif
2528	AssertFatalMsgFailed(("cRefs=%d iFirstPresent=%d cPresent=%d u64=%RX64\n", cRefs, pPage->iFirstPresent, pPage->cPresent, u64));
2529	break;
2530	}
2531
2532	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
2533	{
2534	const uint64_t u64 = PGM_PAGE_GET_HCPHYS(pPhysPage) \| X86_PTE_P;
2535	PEPTPT pPT = (PEPTPT)PGMPOOL_PAGE_2_PTR(pVM, pPage);
2536	for (unsigned i = pPage->iFirstPresent; i < RT_ELEMENTS(pPT->a); i++)
2537	if ((pPT->a[i].u & (EPT_PTE_PG_MASK \| X86_PTE_P)) == u64)
2538	{
2539	Log4(("pgmPoolTrackFlushGCPhysPTs: i=%d pte=%RX64 cRefs=%#x\n", i, pPT->a[i], cRefs));
2540	pPT->a[i].u = 0;
2541	cRefs--;
2542	if (!cRefs)
2543	return;
2544	}
2545	#ifdef LOG_ENABLED
2546	RTLogPrintf("cRefs=%d iFirstPresent=%d cPresent=%d\n", cRefs, pPage->iFirstPresent, pPage->cPresent);
2547	for (unsigned i = 0; i < RT_ELEMENTS(pPT->a); i++)
2548	if ((pPT->a[i].u & (EPT_PTE_PG_MASK \| X86_PTE_P)) == u64)
2549	{
2550	RTLogPrintf("i=%d cRefs=%d\n", i, cRefs--);
2551	pPT->a[i].u = 0;
2552	}
2553	#endif
2554	AssertFatalMsgFailed(("cRefs=%d iFirstPresent=%d cPresent=%d\n", cRefs, pPage->iFirstPresent, pPage->cPresent));
2555	break;
2556	}
2557
2558	default:
2559	AssertFatalMsgFailed(("enmKind=%d iShw=%d\n", pPage->enmKind, iShw));
2560	}
2561	}
2562
2563
2564	/**
2565	* Scans one shadow page table for mappings of a physical page.
2566	*
2567	* @param pVM The VM handle.
2568	* @param pPhysPage The guest page in question.
2569	* @param iShw The shadow page table.
2570	* @param cRefs The number of references made in that PT.
2571	*/
2572	void pgmPoolTrackFlushGCPhysPT(PVM pVM, PPGMPAGE pPhysPage, uint16_t iShw, uint16_t cRefs)
2573	{
2574	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool); NOREF(pPool);
2575	LogFlow(("pgmPoolTrackFlushGCPhysPT: pPhysPage=%R[pgmpage] iShw=%d cRefs=%d\n", pPhysPage, iShw, cRefs));
2576	STAM_PROFILE_START(&pPool->StatTrackFlushGCPhysPT, f);
2577	pgmPoolTrackFlushGCPhysPTInt(pVM, pPhysPage, iShw, cRefs);
2578	PGM_PAGE_SET_TRACKING(pPhysPage, 0);
2579	STAM_PROFILE_STOP(&pPool->StatTrackFlushGCPhysPT, f);
2580	}
2581
2582
2583	/**
2584	* Flushes a list of shadow page tables mapping the same physical page.
2585	*
2586	* @param pVM The VM handle.
2587	* @param pPhysPage The guest page in question.
2588	* @param iPhysExt The physical cross reference extent list to flush.
2589	*/
2590	void pgmPoolTrackFlushGCPhysPTs(PVM pVM, PPGMPAGE pPhysPage, uint16_t iPhysExt)
2591	{
2592	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
2593	STAM_PROFILE_START(&pPool->StatTrackFlushGCPhysPTs, f);
2594	LogFlow(("pgmPoolTrackFlushGCPhysPTs: pPhysPage=%R[pgmpage] iPhysExt\n", pPhysPage, iPhysExt));
2595
2596	const uint16_t iPhysExtStart = iPhysExt;
2597	PPGMPOOLPHYSEXT pPhysExt;
2598	do
2599	{
2600	Assert(iPhysExt < pPool->cMaxPhysExts);
2601	pPhysExt = &pPool->CTX_SUFF(paPhysExts)[iPhysExt];
2602	for (unsigned i = 0; i < RT_ELEMENTS(pPhysExt->aidx); i++)
2603	if (pPhysExt->aidx[i] != NIL_PGMPOOL_IDX)
2604	{
2605	pgmPoolTrackFlushGCPhysPTInt(pVM, pPhysPage, pPhysExt->aidx[i], 1);
2606	pPhysExt->aidx[i] = NIL_PGMPOOL_IDX;
2607	}
2608
2609	/* next */
2610	iPhysExt = pPhysExt->iNext;
2611	} while (iPhysExt != NIL_PGMPOOL_PHYSEXT_INDEX);
2612
2613	/* insert the list into the free list and clear the ram range entry. */
2614	pPhysExt->iNext = pPool->iPhysExtFreeHead;
2615	pPool->iPhysExtFreeHead = iPhysExtStart;
2616	PGM_PAGE_SET_TRACKING(pPhysPage, 0);
2617
2618	STAM_PROFILE_STOP(&pPool->StatTrackFlushGCPhysPTs, f);
2619	}
2620
2621	#endif /* PGMPOOL_WITH_GCPHYS_TRACKING */
2622
2623	/**
2624	* Flushes all shadow page table mappings of the given guest page.
2625	*
2626	* This is typically called when the host page backing the guest one has been
2627	* replaced or when the page protection was changed due to an access handler.
2628	*
2629	* @returns VBox status code.
2630	* @retval VINF_SUCCESS if all references has been successfully cleared.
2631	* @retval VINF_PGM_GCPHYS_ALIASED if we're better off with a CR3 sync and
2632	* a page pool cleaning.
2633	*
2634	* @param pVM The VM handle.
2635	* @param pPhysPage The guest page in question.
2636	* @param pfFlushTLBs This is set to @a true if the shadow TLBs should be
2637	* flushed, it is NOT touched if this isn't necessary.
2638	* The caller MUST initialized this to @a false.
2639	*/
2640	int pgmPoolTrackFlushGCPhys(PVM pVM, PPGMPAGE pPhysPage, bool *pfFlushTLBs)
2641	{
2642	int rc = VINF_SUCCESS;
2643	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
2644	const uint16_t u16 = PGM_PAGE_GET_TRACKING(pPhysPage);
2645	if (u16)
2646	{
2647	# ifdef VBOX_WITH_NEW_PHYS_CODE
2648	/*
2649	* The zero page is currently screwing up the tracking and we'll
2650	* have to flush the whole shebang. Unless VBOX_WITH_NEW_LAZY_PAGE_ALLOC
2651	* is defined, zero pages won't normally be mapped. Some kind of solution
2652	* will be needed for this problem of course, but it will have to wait...
2653	*/
2654	if (PGM_PAGE_IS_ZERO(pPhysPage))
2655	rc = VINF_PGM_GCPHYS_ALIASED;
2656	else
2657	# endif
2658	{
2659	# ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
2660	/* Start a subset here because pgmPoolTrackFlushGCPhysPTsSlow and
2661	pgmPoolTrackFlushGCPhysPTs will/may kill the pool otherwise. */
2662	PVMCPU pVCpu = VMMGetCpu(pVM);
2663	uint32_t iPrevSubset = PGMDynMapPushAutoSubset(pVCpu);
2664	# endif
2665
2666	if (PGMPOOL_TD_GET_CREFS(u16) != PGMPOOL_TD_CREFS_PHYSEXT)
2667	pgmPoolTrackFlushGCPhysPT(pVM,
2668	pPhysPage,
2669	PGMPOOL_TD_GET_IDX(u16),
2670	PGMPOOL_TD_GET_CREFS(u16));
2671	else if (u16 != PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, PGMPOOL_TD_IDX_OVERFLOWED))
2672	pgmPoolTrackFlushGCPhysPTs(pVM, pPhysPage, PGMPOOL_TD_GET_IDX(u16));
2673	else
2674	rc = pgmPoolTrackFlushGCPhysPTsSlow(pVM, pPhysPage);
2675	*pfFlushTLBs = true;
2676
2677	# ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
2678	PGMDynMapPopAutoSubset(pVCpu, iPrevSubset);
2679	# endif
2680	}
2681	}
2682
2683	#elif defined(PGMPOOL_WITH_CACHE)
2684	# ifdef VBOX_WITH_NEW_PHYS_CODE
2685	if (PGM_PAGE_IS_ZERO(pPhysPage))
2686	rc = VINF_PGM_GCPHYS_ALIASED;
2687	else
2688	# endif
2689	{
2690	# ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
2691	/* Start a subset here because pgmPoolTrackFlushGCPhysPTsSlow kill the pool otherwise. */
2692	PVMCPU pVCpu = VMMGetCpu(pVM);
2693	uint32_t iPrevSubset = PGMDynMapPushAutoSubset(pVCpu);
2694	# endif
2695	rc = pgmPoolTrackFlushGCPhysPTsSlow(pVM, pPhysPage);
2696	if (rc == VINF_SUCCESS)
2697	*pfFlushTLBs = true;
2698	}
2699
2700	# ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
2701	PGMDynMapPopAutoSubset(pVCpu, iPrevSubset);
2702	# endif
2703
2704	#else
2705	rc = VINF_PGM_GCPHYS_ALIASED;
2706	#endif
2707
2708	return rc;
2709	}
2710
2711
2712	/**
2713	* Scans all shadow page tables for mappings of a physical page.
2714	*
2715	* This may be slow, but it's most likely more efficient than cleaning
2716	* out the entire page pool / cache.
2717	*
2718	* @returns VBox status code.
2719	* @retval VINF_SUCCESS if all references has been successfully cleared.
2720	* @retval VINF_PGM_GCPHYS_ALIASED if we're better off with a CR3 sync and
2721	* a page pool cleaning.
2722	*
2723	* @param pVM The VM handle.
2724	* @param pPhysPage The guest page in question.
2725	*/
2726	int pgmPoolTrackFlushGCPhysPTsSlow(PVM pVM, PPGMPAGE pPhysPage)
2727	{
2728	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
2729	STAM_PROFILE_START(&pPool->StatTrackFlushGCPhysPTsSlow, s);
2730	LogFlow(("pgmPoolTrackFlushGCPhysPTsSlow: cUsedPages=%d cPresent=%d pPhysPage=%R[pgmpage]\n",
2731	pPool->cUsedPages, pPool->cPresent, pPhysPage));
2732
2733	#if 1
2734	/*
2735	* There is a limit to what makes sense.
2736	*/
2737	if (pPool->cPresent > 1024)
2738	{
2739	LogFlow(("pgmPoolTrackFlushGCPhysPTsSlow: giving up... (cPresent=%d)\n", pPool->cPresent));
2740	STAM_PROFILE_STOP(&pPool->StatTrackFlushGCPhysPTsSlow, s);
2741	return VINF_PGM_GCPHYS_ALIASED;
2742	}
2743	#endif
2744
2745	/*
2746	* Iterate all the pages until we've encountered all that in use.
2747	* This is simple but not quite optimal solution.
2748	*/
2749	const uint64_t u64 = PGM_PAGE_GET_HCPHYS(pPhysPage) \| X86_PTE_P;
2750	const uint32_t u32 = u64;
2751	unsigned cLeft = pPool->cUsedPages;
2752	unsigned iPage = pPool->cCurPages;
2753	while (--iPage >= PGMPOOL_IDX_FIRST)
2754	{
2755	PPGMPOOLPAGE pPage = &pPool->aPages[iPage];
2756	if (pPage->GCPhys != NIL_RTGCPHYS)
2757	{
2758	switch (pPage->enmKind)
2759	{
2760	/*
2761	* We only care about shadow page tables.
2762	*/
2763	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
2764	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
2765	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
2766	{
2767	unsigned cPresent = pPage->cPresent;
2768	PX86PT pPT = (PX86PT)PGMPOOL_PAGE_2_PTR(pVM, pPage);
2769	for (unsigned i = pPage->iFirstPresent; i < RT_ELEMENTS(pPT->a); i++)
2770	if (pPT->a[i].n.u1Present)
2771	{
2772	if ((pPT->a[i].u & (X86_PTE_PG_MASK \| X86_PTE_P)) == u32)
2773	{
2774	//Log4(("pgmPoolTrackFlushGCPhysPTsSlow: idx=%d i=%d pte=%RX32\n", iPage, i, pPT->a[i]));
2775	pPT->a[i].u = 0;
2776	}
2777	if (!--cPresent)
2778	break;
2779	}
2780	break;
2781	}
2782
2783	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
2784	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
2785	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
2786	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
2787	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
2788	{
2789	unsigned cPresent = pPage->cPresent;
2790	PX86PTPAE pPT = (PX86PTPAE)PGMPOOL_PAGE_2_PTR(pVM, pPage);
2791	for (unsigned i = pPage->iFirstPresent; i < RT_ELEMENTS(pPT->a); i++)
2792	if (pPT->a[i].n.u1Present)
2793	{
2794	if ((pPT->a[i].u & (X86_PTE_PAE_PG_MASK \| X86_PTE_P)) == u64)
2795	{
2796	//Log4(("pgmPoolTrackFlushGCPhysPTsSlow: idx=%d i=%d pte=%RX64\n", iPage, i, pPT->a[i]));
2797	pPT->a[i].u = 0;
2798	}
2799	if (!--cPresent)
2800	break;
2801	}
2802	break;
2803	}
2804	}
2805	if (!--cLeft)
2806	break;
2807	}
2808	}
2809
2810	PGM_PAGE_SET_TRACKING(pPhysPage, 0);
2811	STAM_PROFILE_STOP(&pPool->StatTrackFlushGCPhysPTsSlow, s);
2812	return VINF_SUCCESS;
2813	}
2814
2815
2816	/**
2817	* Clears the user entry in a user table.
2818	*
2819	* This is used to remove all references to a page when flushing it.
2820	*/
2821	static void pgmPoolTrackClearPageUser(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PCPGMPOOLUSER pUser)
2822	{
2823	Assert(pUser->iUser != NIL_PGMPOOL_IDX);
2824	Assert(pUser->iUser < pPool->cCurPages);
2825	uint32_t iUserTable = pUser->iUserTable;
2826
2827	/*
2828	* Map the user page.
2829	*/
2830	PPGMPOOLPAGE pUserPage = &pPool->aPages[pUser->iUser];
2831	union
2832	{
2833	uint64_t *pau64;
2834	uint32_t *pau32;
2835	} u;
2836	u.pau64 = (uint64_t *)PGMPOOL_PAGE_2_PTR(pPool->CTX_SUFF(pVM), pUserPage);
2837
2838	LogFlow(("pgmPoolTrackClearPageUser: clear %x in %s (%RGp) (flushing %s)\n", iUserTable, pgmPoolPoolKindToStr(pUserPage->enmKind), pUserPage->Core.Key, pgmPoolPoolKindToStr(pPage->enmKind)));
2839
2840	/* Safety precaution in case we change the paging for other modes too in the future. */
2841	Assert(!pgmPoolIsPageLocked(&pPool->CTX_SUFF(pVM)->pgm.s, pPage));
2842
2843	#ifdef VBOX_STRICT
2844	/*
2845	* Some sanity checks.
2846	*/
2847	switch (pUserPage->enmKind)
2848	{
2849	case PGMPOOLKIND_32BIT_PD:
2850	case PGMPOOLKIND_32BIT_PD_PHYS:
2851	Assert(iUserTable < X86_PG_ENTRIES);
2852	break;
2853	case PGMPOOLKIND_PAE_PDPT:
2854	case PGMPOOLKIND_PAE_PDPT_FOR_32BIT:
2855	case PGMPOOLKIND_PAE_PDPT_PHYS:
2856	Assert(iUserTable < 4);
2857	Assert(!(u.pau64[iUserTable] & PGM_PLXFLAGS_PERMANENT));
2858	break;
2859	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
2860	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
2861	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
2862	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
2863	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
2864	case PGMPOOLKIND_PAE_PD_PHYS:
2865	Assert(iUserTable < X86_PG_PAE_ENTRIES);
2866	break;
2867	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
2868	Assert(iUserTable < X86_PG_PAE_ENTRIES);
2869	Assert(!(u.pau64[iUserTable] & PGM_PDFLAGS_MAPPING));
2870	break;
2871	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
2872	Assert(iUserTable < X86_PG_PAE_ENTRIES);
2873	Assert(!(u.pau64[iUserTable] & PGM_PLXFLAGS_PERMANENT));
2874	break;
2875	case PGMPOOLKIND_64BIT_PML4:
2876	Assert(!(u.pau64[iUserTable] & PGM_PLXFLAGS_PERMANENT));
2877	/* GCPhys >> PAGE_SHIFT is the index here */
2878	break;
2879	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
2880	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
2881	Assert(iUserTable < X86_PG_PAE_ENTRIES);
2882	break;
2883
2884	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
2885	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
2886	Assert(iUserTable < X86_PG_PAE_ENTRIES);
2887	break;
2888
2889	case PGMPOOLKIND_ROOT_NESTED:
2890	Assert(iUserTable < X86_PG_PAE_ENTRIES);
2891	break;
2892
2893	default:
2894	AssertMsgFailed(("enmKind=%d\n", pUserPage->enmKind));
2895	break;
2896	}
2897	#endif /* VBOX_STRICT */
2898
2899	/*
2900	* Clear the entry in the user page.
2901	*/
2902	switch (pUserPage->enmKind)
2903	{
2904	/* 32-bit entries */
2905	case PGMPOOLKIND_32BIT_PD:
2906	case PGMPOOLKIND_32BIT_PD_PHYS:
2907	u.pau32[iUserTable] = 0;
2908	break;
2909
2910	/* 64-bit entries */
2911	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
2912	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
2913	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
2914	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
2915	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
2916	#if defined(IN_RC)
2917	/* In 32 bits PAE mode we must invalidate the TLB when changing a PDPT entry; the CPU fetches them only during cr3 load, so any
2918	* non-present PDPT will continue to cause page faults.
2919	*/
2920	ASMReloadCR3();
2921	#endif
2922	/* no break */
2923	case PGMPOOLKIND_PAE_PD_PHYS:
2924	case PGMPOOLKIND_PAE_PDPT_PHYS:
2925	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
2926	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
2927	case PGMPOOLKIND_64BIT_PML4:
2928	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
2929	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
2930	case PGMPOOLKIND_PAE_PDPT:
2931	case PGMPOOLKIND_PAE_PDPT_FOR_32BIT:
2932	case PGMPOOLKIND_ROOT_NESTED:
2933	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
2934	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
2935	u.pau64[iUserTable] = 0;
2936	break;
2937
2938	default:
2939	AssertFatalMsgFailed(("enmKind=%d iUser=%#x iUserTable=%#x\n", pUserPage->enmKind, pUser->iUser, pUser->iUserTable));
2940	}
2941	}
2942
2943
2944	/**
2945	* Clears all users of a page.
2946	*/
2947	static void pgmPoolTrackClearPageUsers(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
2948	{
2949	/*
2950	* Free all the user records.
2951	*/
2952	LogFlow(("pgmPoolTrackClearPageUsers %RGp\n", pPage->GCPhys));
2953
2954	PPGMPOOLUSER paUsers = pPool->CTX_SUFF(paUsers);
2955	uint16_t i = pPage->iUserHead;
2956	while (i != NIL_PGMPOOL_USER_INDEX)
2957	{
2958	/* Clear enter in user table. */
2959	pgmPoolTrackClearPageUser(pPool, pPage, &paUsers[i]);
2960
2961	/* Free it. */
2962	const uint16_t iNext = paUsers[i].iNext;
2963	paUsers[i].iUser = NIL_PGMPOOL_IDX;
2964	paUsers[i].iNext = pPool->iUserFreeHead;
2965	pPool->iUserFreeHead = i;
2966
2967	/* Next. */
2968	i = iNext;
2969	}
2970	pPage->iUserHead = NIL_PGMPOOL_USER_INDEX;
2971	}
2972
2973	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
2974
2975	/**
2976	* Allocates a new physical cross reference extent.
2977	*
2978	* @returns Pointer to the allocated extent on success. NULL if we're out of them.
2979	* @param pVM The VM handle.
2980	* @param piPhysExt Where to store the phys ext index.
2981	*/
2982	PPGMPOOLPHYSEXT pgmPoolTrackPhysExtAlloc(PVM pVM, uint16_t *piPhysExt)
2983	{
2984	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
2985	uint16_t iPhysExt = pPool->iPhysExtFreeHead;
2986	if (iPhysExt == NIL_PGMPOOL_PHYSEXT_INDEX)
2987	{
2988	STAM_COUNTER_INC(&pPool->StamTrackPhysExtAllocFailures);
2989	return NULL;
2990	}
2991	PPGMPOOLPHYSEXT pPhysExt = &pPool->CTX_SUFF(paPhysExts)[iPhysExt];
2992	pPool->iPhysExtFreeHead = pPhysExt->iNext;
2993	pPhysExt->iNext = NIL_PGMPOOL_PHYSEXT_INDEX;
2994	*piPhysExt = iPhysExt;
2995	return pPhysExt;
2996	}
2997
2998
2999	/**
3000	* Frees a physical cross reference extent.
3001	*
3002	* @param pVM The VM handle.
3003	* @param iPhysExt The extent to free.
3004	*/
3005	void pgmPoolTrackPhysExtFree(PVM pVM, uint16_t iPhysExt)
3006	{
3007	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
3008	Assert(iPhysExt < pPool->cMaxPhysExts);
3009	PPGMPOOLPHYSEXT pPhysExt = &pPool->CTX_SUFF(paPhysExts)[iPhysExt];
3010	for (unsigned i = 0; i < RT_ELEMENTS(pPhysExt->aidx); i++)
3011	pPhysExt->aidx[i] = NIL_PGMPOOL_IDX;
3012	pPhysExt->iNext = pPool->iPhysExtFreeHead;
3013	pPool->iPhysExtFreeHead = iPhysExt;
3014	}
3015
3016
3017	/**
3018	* Frees a physical cross reference extent.
3019	*
3020	* @param pVM The VM handle.
3021	* @param iPhysExt The extent to free.
3022	*/
3023	void pgmPoolTrackPhysExtFreeList(PVM pVM, uint16_t iPhysExt)
3024	{
3025	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
3026
3027	const uint16_t iPhysExtStart = iPhysExt;
3028	PPGMPOOLPHYSEXT pPhysExt;
3029	do
3030	{
3031	Assert(iPhysExt < pPool->cMaxPhysExts);
3032	pPhysExt = &pPool->CTX_SUFF(paPhysExts)[iPhysExt];
3033	for (unsigned i = 0; i < RT_ELEMENTS(pPhysExt->aidx); i++)
3034	pPhysExt->aidx[i] = NIL_PGMPOOL_IDX;
3035
3036	/* next */
3037	iPhysExt = pPhysExt->iNext;
3038	} while (iPhysExt != NIL_PGMPOOL_PHYSEXT_INDEX);
3039
3040	pPhysExt->iNext = pPool->iPhysExtFreeHead;
3041	pPool->iPhysExtFreeHead = iPhysExtStart;
3042	}
3043
3044
3045	/**
3046	* Insert a reference into a list of physical cross reference extents.
3047	*
3048	* @returns The new tracking data for PGMPAGE.
3049	*
3050	* @param pVM The VM handle.
3051	* @param iPhysExt The physical extent index of the list head.
3052	* @param iShwPT The shadow page table index.
3053	*
3054	*/
3055	static uint16_t pgmPoolTrackPhysExtInsert(PVM pVM, uint16_t iPhysExt, uint16_t iShwPT)
3056	{
3057	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
3058	PPGMPOOLPHYSEXT paPhysExts = pPool->CTX_SUFF(paPhysExts);
3059
3060	/* special common case. */
3061	if (paPhysExts[iPhysExt].aidx[2] == NIL_PGMPOOL_IDX)
3062	{
3063	paPhysExts[iPhysExt].aidx[2] = iShwPT;
3064	STAM_COUNTER_INC(&pVM->pgm.s.StatTrackAliasedMany);
3065	LogFlow(("pgmPoolTrackPhysExtAddref: %d:{,,%d}\n", iPhysExt, iShwPT));
3066	return PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, iPhysExt);
3067	}
3068
3069	/* general treatment. */
3070	const uint16_t iPhysExtStart = iPhysExt;
3071	unsigned cMax = 15;
3072	for (;;)
3073	{
3074	Assert(iPhysExt < pPool->cMaxPhysExts);
3075	for (unsigned i = 0; i < RT_ELEMENTS(paPhysExts[iPhysExt].aidx); i++)
3076	if (paPhysExts[iPhysExt].aidx[i] == NIL_PGMPOOL_IDX)
3077	{
3078	paPhysExts[iPhysExt].aidx[i] = iShwPT;
3079	STAM_COUNTER_INC(&pVM->pgm.s.StatTrackAliasedMany);
3080	LogFlow(("pgmPoolTrackPhysExtAddref: %d:{%d} i=%d cMax=%d\n", iPhysExt, iShwPT, i, cMax));
3081	return PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, iPhysExtStart);
3082	}
3083	if (!--cMax)
3084	{
3085	STAM_COUNTER_INC(&pVM->pgm.s.StatTrackOverflows);
3086	pgmPoolTrackPhysExtFreeList(pVM, iPhysExtStart);
3087	LogFlow(("pgmPoolTrackPhysExtAddref: overflow (1) iShwPT=%d\n", iShwPT));
3088	return PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, PGMPOOL_TD_IDX_OVERFLOWED);
3089	}
3090	}
3091
3092	/* add another extent to the list. */
3093	PPGMPOOLPHYSEXT pNew = pgmPoolTrackPhysExtAlloc(pVM, &iPhysExt);
3094	if (!pNew)
3095	{
3096	STAM_COUNTER_INC(&pVM->pgm.s.StatTrackOverflows);
3097	pgmPoolTrackPhysExtFreeList(pVM, iPhysExtStart);
3098	return PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, PGMPOOL_TD_IDX_OVERFLOWED);
3099	}
3100	pNew->iNext = iPhysExtStart;
3101	pNew->aidx[0] = iShwPT;
3102	LogFlow(("pgmPoolTrackPhysExtAddref: added new extent %d:{%d}->%d\n", iPhysExt, iShwPT, iPhysExtStart));
3103	return PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, iPhysExt);
3104	}
3105
3106
3107	/**
3108	* Add a reference to guest physical page where extents are in use.
3109	*
3110	* @returns The new tracking data for PGMPAGE.
3111	*
3112	* @param pVM The VM handle.
3113	* @param u16 The ram range flags (top 16-bits).
3114	* @param iShwPT The shadow page table index.
3115	*/
3116	uint16_t pgmPoolTrackPhysExtAddref(PVM pVM, uint16_t u16, uint16_t iShwPT)
3117	{
3118	if (PGMPOOL_TD_GET_CREFS(u16) != PGMPOOL_TD_CREFS_PHYSEXT)
3119	{
3120	/*
3121	* Convert to extent list.
3122	*/
3123	Assert(PGMPOOL_TD_GET_CREFS(u16) == 1);
3124	uint16_t iPhysExt;
3125	PPGMPOOLPHYSEXT pPhysExt = pgmPoolTrackPhysExtAlloc(pVM, &iPhysExt);
3126	if (pPhysExt)
3127	{
3128	LogFlow(("pgmPoolTrackPhysExtAddref: new extent: %d:{%d, %d}\n", iPhysExt, PGMPOOL_TD_GET_IDX(u16), iShwPT));
3129	STAM_COUNTER_INC(&pVM->pgm.s.StatTrackAliased);
3130	pPhysExt->aidx[0] = PGMPOOL_TD_GET_IDX(u16);
3131	pPhysExt->aidx[1] = iShwPT;
3132	u16 = PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, iPhysExt);
3133	}
3134	else
3135	u16 = PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, PGMPOOL_TD_IDX_OVERFLOWED);
3136	}
3137	else if (u16 != PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, PGMPOOL_TD_IDX_OVERFLOWED))
3138	{
3139	/*
3140	* Insert into the extent list.
3141	*/
3142	u16 = pgmPoolTrackPhysExtInsert(pVM, PGMPOOL_TD_GET_IDX(u16), iShwPT);
3143	}
3144	else
3145	STAM_COUNTER_INC(&pVM->pgm.s.StatTrackAliasedLots);
3146	return u16;
3147	}
3148
3149
3150	/**
3151	* Clear references to guest physical memory.
3152	*
3153	* @param pPool The pool.
3154	* @param pPage The page.
3155	* @param pPhysPage Pointer to the aPages entry in the ram range.
3156	*/
3157	void pgmPoolTrackPhysExtDerefGCPhys(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PPGMPAGE pPhysPage)
3158	{
3159	const unsigned cRefs = PGM_PAGE_GET_TD_CREFS(pPhysPage);
3160	AssertFatalMsg(cRefs == PGMPOOL_TD_CREFS_PHYSEXT, ("cRefs=%d pPhysPage=%R[pgmpage] pPage=%p:{.idx=%d}\n", cRefs, pPhysPage, pPage, pPage->idx));
3161
3162	uint16_t iPhysExt = PGM_PAGE_GET_TD_IDX(pPhysPage);
3163	if (iPhysExt != PGMPOOL_TD_IDX_OVERFLOWED)
3164	{
3165	uint16_t iPhysExtPrev = NIL_PGMPOOL_PHYSEXT_INDEX;
3166	PPGMPOOLPHYSEXT paPhysExts = pPool->CTX_SUFF(paPhysExts);
3167	do
3168	{
3169	Assert(iPhysExt < pPool->cMaxPhysExts);
3170
3171	/*
3172	* Look for the shadow page and check if it's all freed.
3173	*/
3174	for (unsigned i = 0; i < RT_ELEMENTS(paPhysExts[iPhysExt].aidx); i++)
3175	{
3176	if (paPhysExts[iPhysExt].aidx[i] == pPage->idx)
3177	{
3178	paPhysExts[iPhysExt].aidx[i] = NIL_PGMPOOL_IDX;
3179
3180	for (i = 0; i < RT_ELEMENTS(paPhysExts[iPhysExt].aidx); i++)
3181	if (paPhysExts[iPhysExt].aidx[i] != NIL_PGMPOOL_IDX)
3182	{
3183	Log2(("pgmPoolTrackPhysExtDerefGCPhys: pPhysPage=%R[pgmpage] idx=%d\n", pPhysPage, pPage->idx));
3184	return;
3185	}
3186
3187	/* we can free the node. */
3188	PVM pVM = pPool->CTX_SUFF(pVM);
3189	const uint16_t iPhysExtNext = paPhysExts[iPhysExt].iNext;
3190	if ( iPhysExtPrev == NIL_PGMPOOL_PHYSEXT_INDEX
3191	&& iPhysExtNext == NIL_PGMPOOL_PHYSEXT_INDEX)
3192	{
3193	/* lonely node */
3194	pgmPoolTrackPhysExtFree(pVM, iPhysExt);
3195	Log2(("pgmPoolTrackPhysExtDerefGCPhys: pPhysPage=%R[pgmpage] idx=%d lonely\n", pPhysPage, pPage->idx));
3196	PGM_PAGE_SET_TRACKING(pPhysPage, 0);
3197	}
3198	else if (iPhysExtPrev == NIL_PGMPOOL_PHYSEXT_INDEX)
3199	{
3200	/* head */
3201	Log2(("pgmPoolTrackPhysExtDerefGCPhys: pPhysPage=%R[pgmpage] idx=%d head\n", pPhysPage, pPage->idx));
3202	PGM_PAGE_SET_TRACKING(pPhysPage, PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, iPhysExtNext));
3203	pgmPoolTrackPhysExtFree(pVM, iPhysExt);
3204	}
3205	else
3206	{
3207	/* in list */
3208	Log2(("pgmPoolTrackPhysExtDerefGCPhys: pPhysPage=%R[pgmpage] idx=%d\n", pPhysPage, pPage->idx));
3209	paPhysExts[iPhysExtPrev].iNext = iPhysExtNext;
3210	pgmPoolTrackPhysExtFree(pVM, iPhysExt);
3211	}
3212	iPhysExt = iPhysExtNext;
3213	return;
3214	}
3215	}
3216
3217	/* next */
3218	iPhysExtPrev = iPhysExt;
3219	iPhysExt = paPhysExts[iPhysExt].iNext;
3220	} while (iPhysExt != NIL_PGMPOOL_PHYSEXT_INDEX);
3221
3222	AssertFatalMsgFailed(("not-found! cRefs=%d pPhysPage=%R[pgmpage] pPage=%p:{.idx=%d}\n", cRefs, pPhysPage, pPage, pPage->idx));
3223	}
3224	else /* nothing to do */
3225	Log2(("pgmPoolTrackPhysExtDerefGCPhys: pPhysPage=%R[pgmpage]\n", pPhysPage));
3226	}
3227
3228
3229	/**
3230	* Clear references to guest physical memory.
3231	*
3232	* This is the same as pgmPoolTracDerefGCPhys except that the guest physical address
3233	* is assumed to be correct, so the linear search can be skipped and we can assert
3234	* at an earlier point.
3235	*
3236	* @param pPool The pool.
3237	* @param pPage The page.
3238	* @param HCPhys The host physical address corresponding to the guest page.
3239	* @param GCPhys The guest physical address corresponding to HCPhys.
3240	*/
3241	static void pgmPoolTracDerefGCPhys(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTHCPHYS HCPhys, RTGCPHYS GCPhys)
3242	{
3243	/*
3244	* Walk range list.
3245	*/
3246	PPGMRAMRANGE pRam = pPool->CTX_SUFF(pVM)->pgm.s.CTX_SUFF(pRamRanges);
3247	while (pRam)
3248	{
3249	RTGCPHYS off = GCPhys - pRam->GCPhys;
3250	if (off < pRam->cb)
3251	{
3252	/* does it match? */
3253	const unsigned iPage = off >> PAGE_SHIFT;
3254	Assert(PGM_PAGE_GET_HCPHYS(&pRam->aPages[iPage]));
3255	#ifdef LOG_ENABLED
3256	RTHCPHYS HCPhysPage = PGM_PAGE_GET_HCPHYS(&pRam->aPages[iPage]);
3257	Log2(("pgmPoolTracDerefGCPhys %RHp vs %RHp\n", HCPhysPage, HCPhys));
3258	#endif
3259	if (PGM_PAGE_GET_HCPHYS(&pRam->aPages[iPage]) == HCPhys)
3260	{
3261	pgmTrackDerefGCPhys(pPool, pPage, &pRam->aPages[iPage]);
3262	return;
3263	}
3264	break;
3265	}
3266	pRam = pRam->CTX_SUFF(pNext);
3267	}
3268	AssertFatalMsgFailed(("HCPhys=%RHp GCPhys=%RGp\n", HCPhys, GCPhys));
3269	}
3270
3271
3272	/**
3273	* Clear references to guest physical memory.
3274	*
3275	* @param pPool The pool.
3276	* @param pPage The page.
3277	* @param HCPhys The host physical address corresponding to the guest page.
3278	* @param GCPhysHint The guest physical address which may corresponding to HCPhys.
3279	*/
3280	static void pgmPoolTracDerefGCPhysHint(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTHCPHYS HCPhys, RTGCPHYS GCPhysHint)
3281	{
3282	Log4(("pgmPoolTracDerefGCPhysHint %RHp %RGp\n", HCPhys, GCPhysHint));
3283
3284	/*
3285	* Walk range list.
3286	*/
3287	PPGMRAMRANGE pRam = pPool->CTX_SUFF(pVM)->pgm.s.CTX_SUFF(pRamRanges);
3288	while (pRam)
3289	{
3290	RTGCPHYS off = GCPhysHint - pRam->GCPhys;
3291	if (off < pRam->cb)
3292	{
3293	/* does it match? */
3294	const unsigned iPage = off >> PAGE_SHIFT;
3295	Assert(PGM_PAGE_GET_HCPHYS(&pRam->aPages[iPage]));
3296	if (PGM_PAGE_GET_HCPHYS(&pRam->aPages[iPage]) == HCPhys)
3297	{
3298	pgmTrackDerefGCPhys(pPool, pPage, &pRam->aPages[iPage]);
3299	return;
3300	}
3301	break;
3302	}
3303	pRam = pRam->CTX_SUFF(pNext);
3304	}
3305
3306	/*
3307	* Damn, the hint didn't work. We'll have to do an expensive linear search.
3308	*/
3309	STAM_COUNTER_INC(&pPool->StatTrackLinearRamSearches);
3310	pRam = pPool->CTX_SUFF(pVM)->pgm.s.CTX_SUFF(pRamRanges);
3311	while (pRam)
3312	{
3313	unsigned iPage = pRam->cb >> PAGE_SHIFT;
3314	while (iPage-- > 0)
3315	{
3316	if (PGM_PAGE_GET_HCPHYS(&pRam->aPages[iPage]) == HCPhys)
3317	{
3318	Log4(("pgmPoolTracDerefGCPhysHint: Linear HCPhys=%RHp GCPhysHint=%RGp GCPhysReal=%RGp\n",
3319	HCPhys, GCPhysHint, pRam->GCPhys + (iPage << PAGE_SHIFT)));
3320	pgmTrackDerefGCPhys(pPool, pPage, &pRam->aPages[iPage]);
3321	return;
3322	}
3323	}
3324	pRam = pRam->CTX_SUFF(pNext);
3325	}
3326
3327	AssertFatalMsgFailed(("HCPhys=%RHp GCPhysHint=%RGp\n", HCPhys, GCPhysHint));
3328	}
3329
3330
3331	/**
3332	* Clear references to guest physical memory in a 32-bit / 32-bit page table.
3333	*
3334	* @param pPool The pool.
3335	* @param pPage The page.
3336	* @param pShwPT The shadow page table (mapping of the page).
3337	* @param pGstPT The guest page table.
3338	*/
3339	DECLINLINE(void) pgmPoolTrackDerefPT32Bit32Bit(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PT pShwPT, PCX86PT pGstPT)
3340	{
3341	for (unsigned i = pPage->iFirstPresent; i < RT_ELEMENTS(pShwPT->a); i++)
3342	if (pShwPT->a[i].n.u1Present)
3343	{
3344	Log4(("pgmPoolTrackDerefPT32Bit32Bit: i=%d pte=%RX32 hint=%RX32\n",
3345	i, pShwPT->a[i].u & X86_PTE_PG_MASK, pGstPT->a[i].u & X86_PTE_PG_MASK));
3346	pgmPoolTracDerefGCPhysHint(pPool, pPage, pShwPT->a[i].u & X86_PTE_PG_MASK, pGstPT->a[i].u & X86_PTE_PG_MASK);
3347	if (!--pPage->cPresent)
3348	break;
3349	}
3350	}
3351
3352
3353	/**
3354	* Clear references to guest physical memory in a PAE / 32-bit page table.
3355	*
3356	* @param pPool The pool.
3357	* @param pPage The page.
3358	* @param pShwPT The shadow page table (mapping of the page).
3359	* @param pGstPT The guest page table (just a half one).
3360	*/
3361	DECLINLINE(void) pgmPoolTrackDerefPTPae32Bit(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PTPAE pShwPT, PCX86PT pGstPT)
3362	{
3363	for (unsigned i = 0; i < RT_ELEMENTS(pShwPT->a); i++)
3364	if (pShwPT->a[i].n.u1Present)
3365	{
3366	Log4(("pgmPoolTrackDerefPTPae32Bit: i=%d pte=%RX64 hint=%RX32\n",
3367	i, pShwPT->a[i].u & X86_PTE_PAE_PG_MASK, pGstPT->a[i].u & X86_PTE_PG_MASK));
3368	pgmPoolTracDerefGCPhysHint(pPool, pPage, pShwPT->a[i].u & X86_PTE_PAE_PG_MASK, pGstPT->a[i].u & X86_PTE_PG_MASK);
3369	}
3370	}
3371
3372
3373	/**
3374	* Clear references to guest physical memory in a PAE / PAE page table.
3375	*
3376	* @param pPool The pool.
3377	* @param pPage The page.
3378	* @param pShwPT The shadow page table (mapping of the page).
3379	* @param pGstPT The guest page table.
3380	*/
3381	DECLINLINE(void) pgmPoolTrackDerefPTPaePae(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PTPAE pShwPT, PCX86PTPAE pGstPT)
3382	{
3383	for (unsigned i = 0; i < RT_ELEMENTS(pShwPT->a); i++)
3384	if (pShwPT->a[i].n.u1Present)
3385	{
3386	Log4(("pgmPoolTrackDerefPTPaePae: i=%d pte=%RX32 hint=%RX32\n",
3387	i, pShwPT->a[i].u & X86_PTE_PAE_PG_MASK, pGstPT->a[i].u & X86_PTE_PAE_PG_MASK));
3388	pgmPoolTracDerefGCPhysHint(pPool, pPage, pShwPT->a[i].u & X86_PTE_PAE_PG_MASK, pGstPT->a[i].u & X86_PTE_PAE_PG_MASK);
3389	}
3390	}
3391
3392
3393	/**
3394	* Clear references to guest physical memory in a 32-bit / 4MB page table.
3395	*
3396	* @param pPool The pool.
3397	* @param pPage The page.
3398	* @param pShwPT The shadow page table (mapping of the page).
3399	*/
3400	DECLINLINE(void) pgmPoolTrackDerefPT32Bit4MB(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PT pShwPT)
3401	{
3402	RTGCPHYS GCPhys = pPage->GCPhys;
3403	for (unsigned i = 0; i < RT_ELEMENTS(pShwPT->a); i++, GCPhys += PAGE_SIZE)
3404	if (pShwPT->a[i].n.u1Present)
3405	{
3406	Log4(("pgmPoolTrackDerefPT32Bit4MB: i=%d pte=%RX32 GCPhys=%RGp\n",
3407	i, pShwPT->a[i].u & X86_PTE_PG_MASK, GCPhys));
3408	pgmPoolTracDerefGCPhys(pPool, pPage, pShwPT->a[i].u & X86_PTE_PG_MASK, GCPhys);
3409	}
3410	}
3411
3412
3413	/**
3414	* Clear references to guest physical memory in a PAE / 2/4MB page table.
3415	*
3416	* @param pPool The pool.
3417	* @param pPage The page.
3418	* @param pShwPT The shadow page table (mapping of the page).
3419	*/
3420	DECLINLINE(void) pgmPoolTrackDerefPTPaeBig(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PTPAE pShwPT)
3421	{
3422	RTGCPHYS GCPhys = pPage->GCPhys;
3423	for (unsigned i = 0; i < RT_ELEMENTS(pShwPT->a); i++, GCPhys += PAGE_SIZE)
3424	if (pShwPT->a[i].n.u1Present)
3425	{
3426	Log4(("pgmPoolTrackDerefPTPaeBig: i=%d pte=%RX64 hint=%RGp\n",
3427	i, pShwPT->a[i].u & X86_PTE_PAE_PG_MASK, GCPhys));
3428	pgmPoolTracDerefGCPhys(pPool, pPage, pShwPT->a[i].u & X86_PTE_PAE_PG_MASK, GCPhys);
3429	}
3430	}
3431
3432	#endif /* PGMPOOL_WITH_GCPHYS_TRACKING */
3433
3434
3435	/**
3436	* Clear references to shadowed pages in a 32 bits page directory.
3437	*
3438	* @param pPool The pool.
3439	* @param pPage The page.
3440	* @param pShwPD The shadow page directory (mapping of the page).
3441	*/
3442	DECLINLINE(void) pgmPoolTrackDerefPD(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PD pShwPD)
3443	{
3444	for (unsigned i = 0; i < RT_ELEMENTS(pShwPD->a); i++)
3445	{
3446	if ( pShwPD->a[i].n.u1Present
3447	&& !(pShwPD->a[i].u & PGM_PDFLAGS_MAPPING)
3448	)
3449	{
3450	PPGMPOOLPAGE pSubPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, pShwPD->a[i].u & X86_PDE_PG_MASK);
3451	if (pSubPage)
3452	pgmPoolTrackFreeUser(pPool, pSubPage, pPage->idx, i);
3453	else
3454	AssertFatalMsgFailed(("%x\n", pShwPD->a[i].u & X86_PDE_PG_MASK));
3455	}
3456	}
3457	}
3458
3459	/**
3460	* Clear references to shadowed pages in a PAE (legacy or 64 bits) page directory.
3461	*
3462	* @param pPool The pool.
3463	* @param pPage The page.
3464	* @param pShwPD The shadow page directory (mapping of the page).
3465	*/
3466	DECLINLINE(void) pgmPoolTrackDerefPDPae(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PDPAE pShwPD)
3467	{
3468	for (unsigned i = 0; i < RT_ELEMENTS(pShwPD->a); i++)
3469	{
3470	if ( pShwPD->a[i].n.u1Present
3471	&& !(pShwPD->a[i].u & PGM_PDFLAGS_MAPPING)
3472	)
3473	{
3474	PPGMPOOLPAGE pSubPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, pShwPD->a[i].u & X86_PDE_PAE_PG_MASK);
3475	if (pSubPage)
3476	pgmPoolTrackFreeUser(pPool, pSubPage, pPage->idx, i);
3477	else
3478	AssertFatalMsgFailed(("%RX64\n", pShwPD->a[i].u & X86_PDE_PAE_PG_MASK));
3479	/** @todo 64-bit guests: have to ensure that we're not exhausting the dynamic mappings! */
3480	}
3481	}
3482	}
3483
3484	/**
3485	* Clear references to shadowed pages in a PAE page directory pointer table.
3486	*
3487	* @param pPool The pool.
3488	* @param pPage The page.
3489	* @param pShwPDPT The shadow page directory pointer table (mapping of the page).
3490	*/
3491	DECLINLINE(void) pgmPoolTrackDerefPDPTPae(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PDPT pShwPDPT)
3492	{
3493	for (unsigned i = 0; i < X86_PG_PAE_PDPE_ENTRIES; i++)
3494	{
3495	if ( pShwPDPT->a[i].n.u1Present
3496	&& !(pShwPDPT->a[i].u & PGM_PLXFLAGS_MAPPING)
3497	)
3498	{
3499	PPGMPOOLPAGE pSubPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, pShwPDPT->a[i].u & X86_PDPE_PG_MASK);
3500	if (pSubPage)
3501	pgmPoolTrackFreeUser(pPool, pSubPage, pPage->idx, i);
3502	else
3503	AssertFatalMsgFailed(("%RX64\n", pShwPDPT->a[i].u & X86_PDPE_PG_MASK));
3504	}
3505	}
3506	}
3507
3508
3509	/**
3510	* Clear references to shadowed pages in a 64-bit page directory pointer table.
3511	*
3512	* @param pPool The pool.
3513	* @param pPage The page.
3514	* @param pShwPDPT The shadow page directory pointer table (mapping of the page).
3515	*/
3516	DECLINLINE(void) pgmPoolTrackDerefPDPT64Bit(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PDPT pShwPDPT)
3517	{
3518	for (unsigned i = 0; i < RT_ELEMENTS(pShwPDPT->a); i++)
3519	{
3520	Assert(!(pShwPDPT->a[i].u & PGM_PLXFLAGS_MAPPING));
3521	if (pShwPDPT->a[i].n.u1Present)
3522	{
3523	PPGMPOOLPAGE pSubPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, pShwPDPT->a[i].u & X86_PDPE_PG_MASK);
3524	if (pSubPage)
3525	pgmPoolTrackFreeUser(pPool, pSubPage, pPage->idx, i);
3526	else
3527	AssertFatalMsgFailed(("%RX64\n", pShwPDPT->a[i].u & X86_PDPE_PG_MASK));
3528	/** @todo 64-bit guests: have to ensure that we're not exhausting the dynamic mappings! */
3529	}
3530	}
3531	}
3532
3533
3534	/**
3535	* Clear references to shadowed pages in a 64-bit level 4 page table.
3536	*
3537	* @param pPool The pool.
3538	* @param pPage The page.
3539	* @param pShwPML4 The shadow page directory pointer table (mapping of the page).
3540	*/
3541	DECLINLINE(void) pgmPoolTrackDerefPML464Bit(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PML4 pShwPML4)
3542	{
3543	for (unsigned i = 0; i < RT_ELEMENTS(pShwPML4->a); i++)
3544	{
3545	if (pShwPML4->a[i].n.u1Present)
3546	{
3547	PPGMPOOLPAGE pSubPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, pShwPML4->a[i].u & X86_PDPE_PG_MASK);
3548	if (pSubPage)
3549	pgmPoolTrackFreeUser(pPool, pSubPage, pPage->idx, i);
3550	else
3551	AssertFatalMsgFailed(("%RX64\n", pShwPML4->a[i].u & X86_PML4E_PG_MASK));
3552	/** @todo 64-bit guests: have to ensure that we're not exhausting the dynamic mappings! */
3553	}
3554	}
3555	}
3556
3557
3558	/**
3559	* Clear references to shadowed pages in an EPT page table.
3560	*
3561	* @param pPool The pool.
3562	* @param pPage The page.
3563	* @param pShwPML4 The shadow page directory pointer table (mapping of the page).
3564	*/
3565	DECLINLINE(void) pgmPoolTrackDerefPTEPT(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PEPTPT pShwPT)
3566	{
3567	RTGCPHYS GCPhys = pPage->GCPhys;
3568	for (unsigned i = 0; i < RT_ELEMENTS(pShwPT->a); i++, GCPhys += PAGE_SIZE)
3569	if (pShwPT->a[i].n.u1Present)
3570	{
3571	Log4(("pgmPoolTrackDerefPTEPT: i=%d pte=%RX64 GCPhys=%RX64\n",
3572	i, pShwPT->a[i].u & EPT_PTE_PG_MASK, pPage->GCPhys));
3573	pgmPoolTracDerefGCPhys(pPool, pPage, pShwPT->a[i].u & EPT_PTE_PG_MASK, GCPhys);
3574	}
3575	}
3576
3577
3578	/**
3579	* Clear references to shadowed pages in an EPT page directory.
3580	*
3581	* @param pPool The pool.
3582	* @param pPage The page.
3583	* @param pShwPD The shadow page directory (mapping of the page).
3584	*/
3585	DECLINLINE(void) pgmPoolTrackDerefPDEPT(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PEPTPD pShwPD)
3586	{
3587	for (unsigned i = 0; i < RT_ELEMENTS(pShwPD->a); i++)
3588	{
3589	if (pShwPD->a[i].n.u1Present)
3590	{
3591	PPGMPOOLPAGE pSubPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, pShwPD->a[i].u & EPT_PDE_PG_MASK);
3592	if (pSubPage)
3593	pgmPoolTrackFreeUser(pPool, pSubPage, pPage->idx, i);
3594	else
3595	AssertFatalMsgFailed(("%RX64\n", pShwPD->a[i].u & EPT_PDE_PG_MASK));
3596	/** @todo 64-bit guests: have to ensure that we're not exhausting the dynamic mappings! */
3597	}
3598	}
3599	}
3600
3601
3602	/**
3603	* Clear references to shadowed pages in an EPT page directory pointer table.
3604	*
3605	* @param pPool The pool.
3606	* @param pPage The page.
3607	* @param pShwPDPT The shadow page directory pointer table (mapping of the page).
3608	*/
3609	DECLINLINE(void) pgmPoolTrackDerefPDPTEPT(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PEPTPDPT pShwPDPT)
3610	{
3611	for (unsigned i = 0; i < RT_ELEMENTS(pShwPDPT->a); i++)
3612	{
3613	if (pShwPDPT->a[i].n.u1Present)
3614	{
3615	PPGMPOOLPAGE pSubPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, pShwPDPT->a[i].u & EPT_PDPTE_PG_MASK);
3616	if (pSubPage)
3617	pgmPoolTrackFreeUser(pPool, pSubPage, pPage->idx, i);
3618	else
3619	AssertFatalMsgFailed(("%RX64\n", pShwPDPT->a[i].u & EPT_PDPTE_PG_MASK));
3620	/** @todo 64-bit guests: have to ensure that we're not exhausting the dynamic mappings! */
3621	}
3622	}
3623	}
3624
3625
3626	/**
3627	* Clears all references made by this page.
3628	*
3629	* This includes other shadow pages and GC physical addresses.
3630	*
3631	* @param pPool The pool.
3632	* @param pPage The page.
3633	*/
3634	static void pgmPoolTrackDeref(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
3635	{
3636	/*
3637	* Map the shadow page and take action according to the page kind.
3638	*/
3639	void *pvShw = PGMPOOL_PAGE_2_LOCKED_PTR(pPool->CTX_SUFF(pVM), pPage);
3640	switch (pPage->enmKind)
3641	{
3642	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
3643	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
3644	{
3645	STAM_PROFILE_START(&pPool->StatTrackDerefGCPhys, g);
3646	void *pvGst;
3647	int rc = PGM_GCPHYS_2_PTR(pPool->CTX_SUFF(pVM), pPage->GCPhys, &pvGst); AssertReleaseRC(rc);
3648	pgmPoolTrackDerefPT32Bit32Bit(pPool, pPage, (PX86PT)pvShw, (PCX86PT)pvGst);
3649	STAM_PROFILE_STOP(&pPool->StatTrackDerefGCPhys, g);
3650	break;
3651	}
3652
3653	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
3654	{
3655	STAM_PROFILE_START(&pPool->StatTrackDerefGCPhys, g);
3656	void *pvGst;
3657	int rc = PGM_GCPHYS_2_PTR_EX(pPool->CTX_SUFF(pVM), pPage->GCPhys, &pvGst); AssertReleaseRC(rc);
3658	pgmPoolTrackDerefPTPae32Bit(pPool, pPage, (PX86PTPAE)pvShw, (PCX86PT)pvGst);
3659	STAM_PROFILE_STOP(&pPool->StatTrackDerefGCPhys, g);
3660	break;
3661	}
3662
3663	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
3664	{
3665	STAM_PROFILE_START(&pPool->StatTrackDerefGCPhys, g);
3666	void *pvGst;
3667	int rc = PGM_GCPHYS_2_PTR(pPool->CTX_SUFF(pVM), pPage->GCPhys, &pvGst); AssertReleaseRC(rc);
3668	pgmPoolTrackDerefPTPaePae(pPool, pPage, (PX86PTPAE)pvShw, (PCX86PTPAE)pvGst);
3669	STAM_PROFILE_STOP(&pPool->StatTrackDerefGCPhys, g);
3670	break;
3671	}
3672
3673	case PGMPOOLKIND_32BIT_PT_FOR_PHYS: /* treat it like a 4 MB page */
3674	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
3675	{
3676	STAM_PROFILE_START(&pPool->StatTrackDerefGCPhys, g);
3677	pgmPoolTrackDerefPT32Bit4MB(pPool, pPage, (PX86PT)pvShw);
3678	STAM_PROFILE_STOP(&pPool->StatTrackDerefGCPhys, g);
3679	break;
3680	}
3681
3682	case PGMPOOLKIND_PAE_PT_FOR_PHYS: /* treat it like a 2 MB page */
3683	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
3684	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
3685	{
3686	STAM_PROFILE_START(&pPool->StatTrackDerefGCPhys, g);
3687	pgmPoolTrackDerefPTPaeBig(pPool, pPage, (PX86PTPAE)pvShw);
3688	STAM_PROFILE_STOP(&pPool->StatTrackDerefGCPhys, g);
3689	break;
3690	}
3691
3692	#else /* !PGMPOOL_WITH_GCPHYS_TRACKING */
3693	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
3694	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
3695	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
3696	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
3697	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
3698	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
3699	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
3700	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
3701	break;
3702	#endif /* !PGMPOOL_WITH_GCPHYS_TRACKING */
3703
3704	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
3705	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
3706	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
3707	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
3708	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
3709	case PGMPOOLKIND_PAE_PD_PHYS:
3710	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
3711	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
3712	pgmPoolTrackDerefPDPae(pPool, pPage, (PX86PDPAE)pvShw);
3713	break;
3714
3715	case PGMPOOLKIND_32BIT_PD_PHYS:
3716	case PGMPOOLKIND_32BIT_PD:
3717	pgmPoolTrackDerefPD(pPool, pPage, (PX86PD)pvShw);
3718	break;
3719
3720	case PGMPOOLKIND_PAE_PDPT_FOR_32BIT:
3721	case PGMPOOLKIND_PAE_PDPT:
3722	case PGMPOOLKIND_PAE_PDPT_PHYS:
3723	pgmPoolTrackDerefPDPTPae(pPool, pPage, (PX86PDPT)pvShw);
3724	break;
3725
3726	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
3727	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
3728	pgmPoolTrackDerefPDPT64Bit(pPool, pPage, (PX86PDPT)pvShw);
3729	break;
3730
3731	case PGMPOOLKIND_64BIT_PML4:
3732	pgmPoolTrackDerefPML464Bit(pPool, pPage, (PX86PML4)pvShw);
3733	break;
3734
3735	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
3736	pgmPoolTrackDerefPTEPT(pPool, pPage, (PEPTPT)pvShw);
3737	break;
3738
3739	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
3740	pgmPoolTrackDerefPDEPT(pPool, pPage, (PEPTPD)pvShw);
3741	break;
3742
3743	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
3744	pgmPoolTrackDerefPDPTEPT(pPool, pPage, (PEPTPDPT)pvShw);
3745	break;
3746
3747	default:
3748	AssertFatalMsgFailed(("enmKind=%d\n", pPage->enmKind));
3749	}
3750
3751	/* paranoia, clear the shadow page. Remove this laser (i.e. let Alloc and ClearAll do it). */
3752	STAM_PROFILE_START(&pPool->StatZeroPage, z);
3753	ASMMemZeroPage(pvShw);
3754	STAM_PROFILE_STOP(&pPool->StatZeroPage, z);
3755	pPage->fZeroed = true;
3756	PGMPOOL_UNLOCK_PTR(pPool->CTX_SUFF(pVM), pvShw);
3757	}
3758
3759	#endif /* PGMPOOL_WITH_USER_TRACKING */
3760	#ifdef IN_RING3
3761
3762	/**
3763	* Flushes all the special root pages as part of a pgmPoolFlushAllInt operation.
3764	*
3765	* @param pPool The pool.
3766	*/
3767	static void pgmPoolFlushAllSpecialRoots(PPGMPOOL pPool)
3768	{
3769	/*
3770	* These special pages are all mapped into the indexes 1..PGMPOOL_IDX_FIRST.
3771	*/
3772	Assert(NIL_PGMPOOL_IDX == 0);
3773
3774	/*
3775	* Paranoia (to be removed), flag a global CR3 sync.
3776	*/
3777	VM_FF_SET(pPool->CTX_SUFF(pVM), VM_FF_PGM_SYNC_CR3);
3778	}
3779
3780
3781	/**
3782	* Flushes the entire cache.
3783	*
3784	* It will assert a global CR3 flush (FF) and assumes the caller is aware of this
3785	* and execute this CR3 flush.
3786	*
3787	* @param pPool The pool.
3788	*/
3789	static void pgmPoolFlushAllInt(PPGMPOOL pPool)
3790	{
3791	PVM pVM = pPool->CTX_SUFF(pVM);
3792
3793	STAM_PROFILE_START(&pPool->StatFlushAllInt, a);
3794	LogFlow(("pgmPoolFlushAllInt:\n"));
3795
3796	/*
3797	* If there are no pages in the pool, there is nothing to do.
3798	*/
3799	if (pPool->cCurPages <= PGMPOOL_IDX_FIRST)
3800	{
3801	STAM_PROFILE_STOP(&pPool->StatFlushAllInt, a);
3802	return;
3803	}
3804
3805	/* Unmap the old CR3 value before flushing everything. */
3806	int rc = PGM_BTH_PFN(UnmapCR3, pVM)(pVM);
3807	AssertRC(rc);
3808
3809	/* Exit the current shadow paging mode as well; nested paging and EPT use a root CR3 which will get flushed here. */
3810	rc = PGM_SHW_PFN(Exit, pVM)(pVM);
3811	AssertRC(rc);
3812
3813	/*
3814	* Nuke the free list and reinsert all pages into it.
3815	*/
3816	for (unsigned i = pPool->cCurPages - 1; i >= PGMPOOL_IDX_FIRST; i--)
3817	{
3818	PPGMPOOLPAGE pPage = &pPool->aPages[i];
3819
3820	#ifdef IN_RING3
3821	Assert(pPage->Core.Key == MMPage2Phys(pVM, pPage->pvPageR3));
3822	#endif
3823	#ifdef PGMPOOL_WITH_MONITORING
3824	if (pPage->fMonitored)
3825	pgmPoolMonitorFlush(pPool, pPage);
3826	pPage->iModifiedNext = NIL_PGMPOOL_IDX;
3827	pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
3828	pPage->iMonitoredNext = NIL_PGMPOOL_IDX;
3829	pPage->iMonitoredPrev = NIL_PGMPOOL_IDX;
3830	pPage->cModifications = 0;
3831	#endif
3832	pPage->GCPhys = NIL_RTGCPHYS;
3833	pPage->enmKind = PGMPOOLKIND_FREE;
3834	Assert(pPage->idx == i);
3835	pPage->iNext = i + 1;
3836	pPage->fZeroed = false; /* This could probably be optimized, but better safe than sorry. */
3837	pPage->fSeenNonGlobal = false;
3838	pPage->fMonitored= false;
3839	pPage->fCached = false;
3840	pPage->fReusedFlushPending = false;
3841	#ifdef PGMPOOL_WITH_USER_TRACKING
3842	pPage->iUserHead = NIL_PGMPOOL_USER_INDEX;
3843	#else
3844	pPage->fCR3Mix = false;
3845	#endif
3846	#ifdef PGMPOOL_WITH_CACHE
3847	pPage->iAgeNext = NIL_PGMPOOL_IDX;
3848	pPage->iAgePrev = NIL_PGMPOOL_IDX;
3849	#endif
3850	pPage->fLocked = false;
3851	}
3852	pPool->aPages[pPool->cCurPages - 1].iNext = NIL_PGMPOOL_IDX;
3853	pPool->iFreeHead = PGMPOOL_IDX_FIRST;
3854	pPool->cUsedPages = 0;
3855
3856	#ifdef PGMPOOL_WITH_USER_TRACKING
3857	/*
3858	* Zap and reinitialize the user records.
3859	*/
3860	pPool->cPresent = 0;
3861	pPool->iUserFreeHead = 0;
3862	PPGMPOOLUSER paUsers = pPool->CTX_SUFF(paUsers);
3863	const unsigned cMaxUsers = pPool->cMaxUsers;
3864	for (unsigned i = 0; i < cMaxUsers; i++)
3865	{
3866	paUsers[i].iNext = i + 1;
3867	paUsers[i].iUser = NIL_PGMPOOL_IDX;
3868	paUsers[i].iUserTable = 0xfffffffe;
3869	}
3870	paUsers[cMaxUsers - 1].iNext = NIL_PGMPOOL_USER_INDEX;
3871	#endif
3872
3873	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
3874	/*
3875	* Clear all the GCPhys links and rebuild the phys ext free list.
3876	*/
3877	for (PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
3878	pRam;
3879	pRam = pRam->CTX_SUFF(pNext))
3880	{
3881	unsigned iPage = pRam->cb >> PAGE_SHIFT;
3882	while (iPage-- > 0)
3883	PGM_PAGE_SET_TRACKING(&pRam->aPages[iPage], 0);
3884	}
3885
3886	pPool->iPhysExtFreeHead = 0;
3887	PPGMPOOLPHYSEXT paPhysExts = pPool->CTX_SUFF(paPhysExts);
3888	const unsigned cMaxPhysExts = pPool->cMaxPhysExts;
3889	for (unsigned i = 0; i < cMaxPhysExts; i++)
3890	{
3891	paPhysExts[i].iNext = i + 1;
3892	paPhysExts[i].aidx[0] = NIL_PGMPOOL_IDX;
3893	paPhysExts[i].aidx[1] = NIL_PGMPOOL_IDX;
3894	paPhysExts[i].aidx[2] = NIL_PGMPOOL_IDX;
3895	}
3896	paPhysExts[cMaxPhysExts - 1].iNext = NIL_PGMPOOL_PHYSEXT_INDEX;
3897	#endif
3898
3899	#ifdef PGMPOOL_WITH_MONITORING
3900	/*
3901	* Just zap the modified list.
3902	*/
3903	pPool->cModifiedPages = 0;
3904	pPool->iModifiedHead = NIL_PGMPOOL_IDX;
3905	#endif
3906
3907	#ifdef PGMPOOL_WITH_CACHE
3908	/*
3909	* Clear the GCPhys hash and the age list.
3910	*/
3911	for (unsigned i = 0; i < RT_ELEMENTS(pPool->aiHash); i++)
3912	pPool->aiHash[i] = NIL_PGMPOOL_IDX;
3913	pPool->iAgeHead = NIL_PGMPOOL_IDX;
3914	pPool->iAgeTail = NIL_PGMPOOL_IDX;
3915	#endif
3916
3917	/*
3918	* Flush all the special root pages.
3919	* Reinsert active pages into the hash and ensure monitoring chains are correct.
3920	*/
3921	pgmPoolFlushAllSpecialRoots(pPool);
3922	for (unsigned i = PGMPOOL_IDX_FIRST_SPECIAL; i < PGMPOOL_IDX_FIRST; i++)
3923	{
3924	PPGMPOOLPAGE pPage = &pPool->aPages[i];
3925	pPage->iNext = NIL_PGMPOOL_IDX;
3926	#ifdef PGMPOOL_WITH_MONITORING
3927	pPage->iModifiedNext = NIL_PGMPOOL_IDX;
3928	pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
3929	pPage->cModifications = 0;
3930	/* ASSUMES that we're not sharing with any of the other special pages (safe for now). */
3931	pPage->iMonitoredNext = NIL_PGMPOOL_IDX;
3932	pPage->iMonitoredPrev = NIL_PGMPOOL_IDX;
3933	if (pPage->fMonitored)
3934	{
3935	int rc = PGMHandlerPhysicalChangeCallbacks(pVM, pPage->GCPhys & ~(RTGCPHYS)(PAGE_SIZE - 1),
3936	pPool->pfnAccessHandlerR3, MMHyperCCToR3(pVM, pPage),
3937	pPool->pfnAccessHandlerR0, MMHyperCCToR0(pVM, pPage),
3938	pPool->pfnAccessHandlerRC, MMHyperCCToRC(pVM, pPage),
3939	pPool->pszAccessHandler);
3940	AssertFatalRCSuccess(rc);
3941	# ifdef PGMPOOL_WITH_CACHE
3942	pgmPoolHashInsert(pPool, pPage);
3943	# endif
3944	}
3945	#endif
3946	#ifdef PGMPOOL_WITH_USER_TRACKING
3947	Assert(pPage->iUserHead == NIL_PGMPOOL_USER_INDEX); /* for now */
3948	#endif
3949	#ifdef PGMPOOL_WITH_CACHE
3950	Assert(pPage->iAgeNext == NIL_PGMPOOL_IDX);
3951	Assert(pPage->iAgePrev == NIL_PGMPOOL_IDX);
3952	#endif
3953	}
3954
3955	/* Force a shadow mode reinit (necessary for nested paging and ept). */
3956	pVM->pgm.s.enmShadowMode = PGMMODE_INVALID;
3957
3958	/* Reinit the current shadow paging mode as well; nested paging and EPT use a root CR3 which will get flushed here. */
3959	rc = PGMR3ChangeMode(pVM, PGMGetGuestMode(pVM));
3960	AssertRC(rc);
3961
3962	/*
3963	* Finally, assert the FF.
3964	*/
3965	VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
3966
3967	STAM_PROFILE_STOP(&pPool->StatFlushAllInt, a);
3968	}
3969
3970	#endif /* IN_RING3 */
3971
3972	/**
3973	* Flushes a pool page.
3974	*
3975	* This moves the page to the free list after removing all user references to it.
3976	* In GC this will cause a CR3 reload if the page is traced back to an active root page.
3977	*
3978	* @returns VBox status code.
3979	* @retval VINF_SUCCESS on success.
3980	* @param pPool The pool.
3981	* @param HCPhys The HC physical address of the shadow page.
3982	*/
3983	int pgmPoolFlushPage(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
3984	{
3985	int rc = VINF_SUCCESS;
3986	STAM_PROFILE_START(&pPool->StatFlushPage, f);
3987	LogFlow(("pgmPoolFlushPage: pPage=%p:{.Key=%RHp, .idx=%d, .enmKind=%s, .GCPhys=%RGp}\n",
3988	pPage, pPage->Core.Key, pPage->idx, pgmPoolPoolKindToStr(pPage->enmKind), pPage->GCPhys));
3989
3990	/*
3991	* Quietly reject any attempts at flushing any of the special root pages.
3992	*/
3993	if (pPage->idx < PGMPOOL_IDX_FIRST)
3994	{
3995	AssertFailed(); /* can no longer happen */
3996	Log(("pgmPoolFlushPage: special root page, rejected. enmKind=%s idx=%d\n", pgmPoolPoolKindToStr(pPage->enmKind), pPage->idx));
3997	return VINF_SUCCESS;
3998	}
3999
4000	/*
4001	* Quietly reject any attempts at flushing the currently active shadow CR3 mapping
4002	*/
4003	if (pgmPoolIsPageLocked(&pPool->CTX_SUFF(pVM)->pgm.s, pPage))
4004	{
4005	AssertMsg( pPage->enmKind == PGMPOOLKIND_64BIT_PML4
4006	\|\| pPage->enmKind == PGMPOOLKIND_PAE_PDPT
4007	\|\| pPage->enmKind == PGMPOOLKIND_PAE_PDPT_FOR_32BIT
4008	\|\| pPage->enmKind == PGMPOOLKIND_32BIT_PD
4009	\|\| pPage->enmKind == PGMPOOLKIND_PAE_PD_FOR_PAE_PD
4010	\|\| pPage->enmKind == PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD
4011	\|\| pPage->enmKind == PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD
4012	\|\| pPage->enmKind == PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD
4013	\|\| pPage->enmKind == PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD,
4014	("Can't free the shadow CR3! (%RHp vs %RHp kind=%d\n", PGMGetHyperCR3(pPool->CTX_SUFF(pVM)), pPage->Core.Key, pPage->enmKind));
4015	Log(("pgmPoolFlushPage: current active shadow CR3, rejected. enmKind=%s idx=%d\n", pgmPoolPoolKindToStr(pPage->enmKind), pPage->idx));
4016	return VINF_SUCCESS;
4017	}
4018
4019	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
4020	/* Start a subset so we won't run out of mapping space. */
4021	PVMCPU pVCpu = VMMGetCpu(pPool->CTX_SUFF(pVM));
4022	uint32_t iPrevSubset = PGMDynMapPushAutoSubset(pVCpu);
4023	#endif
4024
4025	/*
4026	* Mark the page as being in need of a ASMMemZeroPage().
4027	*/
4028	pPage->fZeroed = false;
4029
4030	#ifdef PGMPOOL_WITH_USER_TRACKING
4031	/*
4032	* Clear the page.
4033	*/
4034	pgmPoolTrackClearPageUsers(pPool, pPage);
4035	STAM_PROFILE_START(&pPool->StatTrackDeref,a);
4036	pgmPoolTrackDeref(pPool, pPage);
4037	STAM_PROFILE_STOP(&pPool->StatTrackDeref,a);
4038	#endif
4039
4040	#ifdef PGMPOOL_WITH_CACHE
4041	/*
4042	* Flush it from the cache.
4043	*/
4044	pgmPoolCacheFlushPage(pPool, pPage);
4045	#endif /* PGMPOOL_WITH_CACHE */
4046
4047	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
4048	/* Heavy stuff done. */
4049	PGMDynMapPopAutoSubset(pVCpu, iPrevSubset);
4050	#endif
4051
4052	#ifdef PGMPOOL_WITH_MONITORING
4053	/*
4054	* Deregistering the monitoring.
4055	*/
4056	if (pPage->fMonitored)
4057	rc = pgmPoolMonitorFlush(pPool, pPage);
4058	#endif
4059
4060	/*
4061	* Free the page.
4062	*/
4063	Assert(pPage->iNext == NIL_PGMPOOL_IDX);
4064	pPage->iNext = pPool->iFreeHead;
4065	pPool->iFreeHead = pPage->idx;
4066	pPage->enmKind = PGMPOOLKIND_FREE;
4067	pPage->GCPhys = NIL_RTGCPHYS;
4068	pPage->fReusedFlushPending = false;
4069
4070	pPool->cUsedPages--;
4071	STAM_PROFILE_STOP(&pPool->StatFlushPage, f);
4072	return rc;
4073	}
4074
4075
4076	/**
4077	* Frees a usage of a pool page.
4078	*
4079	* The caller is responsible to updating the user table so that it no longer
4080	* references the shadow page.
4081	*
4082	* @param pPool The pool.
4083	* @param HCPhys The HC physical address of the shadow page.
4084	* @param iUser The shadow page pool index of the user table.
4085	* @param iUserTable The index into the user table (shadowed).
4086	*/
4087	void pgmPoolFreeByPage(PPGMPOOL pPool, PPGMPOOLPAGE pPage, uint16_t iUser, uint32_t iUserTable)
4088	{
4089	STAM_PROFILE_START(&pPool->StatFree, a);
4090	LogFlow(("pgmPoolFreeByPage: pPage=%p:{.Key=%RHp, .idx=%d, enmKind=%s} iUser=%#x iUserTable=%#x\n",
4091	pPage, pPage->Core.Key, pPage->idx, pgmPoolPoolKindToStr(pPage->enmKind), iUser, iUserTable));
4092	Assert(pPage->idx >= PGMPOOL_IDX_FIRST);
4093	#ifdef PGMPOOL_WITH_USER_TRACKING
4094	pgmPoolTrackFreeUser(pPool, pPage, iUser, iUserTable);
4095	#endif
4096	#ifdef PGMPOOL_WITH_CACHE
4097	if (!pPage->fCached)
4098	#endif
4099	pgmPoolFlushPage(pPool, pPage);
4100	STAM_PROFILE_STOP(&pPool->StatFree, a);
4101	}
4102
4103
4104	/**
4105	* Makes one or more free page free.
4106	*
4107	* @returns VBox status code.
4108	* @retval VINF_SUCCESS on success.
4109	* @retval VERR_PGM_POOL_FLUSHED if the pool was flushed.
4110	*
4111	* @param pPool The pool.
4112	* @param enmKind Page table kind
4113	* @param iUser The user of the page.
4114	*/
4115	static int pgmPoolMakeMoreFreePages(PPGMPOOL pPool, PGMPOOLKIND enmKind, uint16_t iUser)
4116	{
4117	LogFlow(("pgmPoolMakeMoreFreePages: iUser=%#x\n", iUser));
4118
4119	/*
4120	* If the pool isn't full grown yet, expand it.
4121	*/
4122	if ( pPool->cCurPages < pPool->cMaxPages
4123	#if defined(IN_RC)
4124	/* Hack alert: we can't deal with jumps to ring 3 when called from MapCR3 and allocating pages for PAE PDs. */
4125	&& enmKind != PGMPOOLKIND_PAE_PD_FOR_PAE_PD
4126	&& (enmKind < PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD \|\| enmKind > PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD)
4127	#endif
4128	)
4129	{
4130	STAM_PROFILE_ADV_SUSPEND(&pPool->StatAlloc, a);
4131	#ifdef IN_RING3
4132	int rc = PGMR3PoolGrow(pPool->pVMR3);
4133	#else
4134	int rc = CTXALLMID(VMM, CallHost)(pPool->CTX_SUFF(pVM), VMMCALLHOST_PGM_POOL_GROW, 0);
4135	#endif
4136	if (RT_FAILURE(rc))
4137	return rc;
4138	STAM_PROFILE_ADV_RESUME(&pPool->StatAlloc, a);
4139	if (pPool->iFreeHead != NIL_PGMPOOL_IDX)
4140	return VINF_SUCCESS;
4141	}
4142
4143	#ifdef PGMPOOL_WITH_CACHE
4144	/*
4145	* Free one cached page.
4146	*/
4147	return pgmPoolCacheFreeOne(pPool, iUser);
4148	#else
4149	/*
4150	* Flush the pool.
4151	*
4152	* If we have tracking enabled, it should be possible to come up with
4153	* a cheap replacement strategy...
4154	*/
4155	/* @todo This path no longer works (CR3 root pages will be flushed)!! */
4156	AssertCompileFailed();
4157	Assert(!CPUMIsGuestInLongMode(pVM));
4158	pgmPoolFlushAllInt(pPool);
4159	return VERR_PGM_POOL_FLUSHED;
4160	#endif
4161	}
4162
4163
4164	/**
4165	* Allocates a page from the pool.
4166	*
4167	* This page may actually be a cached page and not in need of any processing
4168	* on the callers part.
4169	*
4170	* @returns VBox status code.
4171	* @retval VINF_SUCCESS if a NEW page was allocated.
4172	* @retval VINF_PGM_CACHED_PAGE if a CACHED page was returned.
4173	* @retval VERR_PGM_POOL_FLUSHED if the pool was flushed.
4174	* @param pVM The VM handle.
4175	* @param GCPhys The GC physical address of the page we're gonna shadow.
4176	* For 4MB and 2MB PD entries, it's the first address the
4177	* shadow PT is covering.
4178	* @param enmKind The kind of mapping.
4179	* @param iUser The shadow page pool index of the user table.
4180	* @param iUserTable The index into the user table (shadowed).
4181	* @param ppPage Where to store the pointer to the page. NULL is stored here on failure.
4182	*/
4183	int pgmPoolAlloc(PVM pVM, RTGCPHYS GCPhys, PGMPOOLKIND enmKind, uint16_t iUser, uint32_t iUserTable, PPPGMPOOLPAGE ppPage)
4184	{
4185	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
4186	STAM_PROFILE_ADV_START(&pPool->StatAlloc, a);
4187	LogFlow(("pgmPoolAlloc: GCPhys=%RGp enmKind=%s iUser=%#x iUserTable=%#x\n", GCPhys, pgmPoolPoolKindToStr(enmKind), iUser, iUserTable));
4188	*ppPage = NULL;
4189	/** @todo CSAM/PGMPrefetchPage messes up here during CSAMR3CheckGates
4190	* (TRPMR3SyncIDT) because of FF priority. Try fix that?
4191	* Assert(!(pVM->pgm.s.fSyncFlags & PGM_SYNC_CLEAR_PGM_POOL)); */
4192
4193	#ifdef PGMPOOL_WITH_CACHE
4194	if (pPool->fCacheEnabled)
4195	{
4196	int rc2 = pgmPoolCacheAlloc(pPool, GCPhys, enmKind, iUser, iUserTable, ppPage);
4197	if (RT_SUCCESS(rc2))
4198	{
4199	STAM_PROFILE_ADV_STOP(&pPool->StatAlloc, a);
4200	LogFlow(("pgmPoolAlloc: cached returns %Rrc ppPage=%p:{.Key=%RHp, .idx=%d}\n", rc2, ppPage, (ppPage)->Core.Key, (ppPage)->idx));
4201	return rc2;
4202	}
4203	}
4204	#endif
4205
4206	/*
4207	* Allocate a new one.
4208	*/
4209	int rc = VINF_SUCCESS;
4210	uint16_t iNew = pPool->iFreeHead;
4211	if (iNew == NIL_PGMPOOL_IDX)
4212	{
4213	rc = pgmPoolMakeMoreFreePages(pPool, enmKind, iUser);
4214	if (RT_FAILURE(rc))
4215	{
4216	Log(("pgmPoolAlloc: returns %Rrc (Free)\n", rc));
4217	STAM_PROFILE_ADV_STOP(&pPool->StatAlloc, a);
4218	return rc;
4219	}
4220	iNew = pPool->iFreeHead;
4221	AssertReleaseReturn(iNew != NIL_PGMPOOL_IDX, VERR_INTERNAL_ERROR);
4222	}
4223
4224	/* unlink the free head */
4225	PPGMPOOLPAGE pPage = &pPool->aPages[iNew];
4226	pPool->iFreeHead = pPage->iNext;
4227	pPage->iNext = NIL_PGMPOOL_IDX;
4228
4229	/*
4230	* Initialize it.
4231	*/
4232	pPool->cUsedPages++; /* physical handler registration / pgmPoolTrackFlushGCPhysPTsSlow requirement. */
4233	pPage->enmKind = enmKind;
4234	pPage->GCPhys = GCPhys;
4235	pPage->fSeenNonGlobal = false; /* Set this to 'true' to disable this feature. */
4236	pPage->fMonitored = false;
4237	pPage->fCached = false;
4238	pPage->fReusedFlushPending = false;
4239	#ifdef PGMPOOL_WITH_MONITORING
4240	pPage->cModifications = 0;
4241	pPage->iModifiedNext = NIL_PGMPOOL_IDX;
4242	pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
4243	#else
4244	pPage->fCR3Mix = false;
4245	#endif
4246	#ifdef PGMPOOL_WITH_USER_TRACKING
4247	pPage->cPresent = 0;
4248	pPage->iFirstPresent = ~0;
4249
4250	/*
4251	* Insert into the tracking and cache. If this fails, free the page.
4252	*/
4253	int rc3 = pgmPoolTrackInsert(pPool, pPage, GCPhys, iUser, iUserTable);
4254	if (RT_FAILURE(rc3))
4255	{
4256	pPool->cUsedPages--;
4257	pPage->enmKind = PGMPOOLKIND_FREE;
4258	pPage->GCPhys = NIL_RTGCPHYS;
4259	pPage->iNext = pPool->iFreeHead;
4260	pPool->iFreeHead = pPage->idx;
4261	STAM_PROFILE_ADV_STOP(&pPool->StatAlloc, a);
4262	Log(("pgmPoolAlloc: returns %Rrc (Insert)\n", rc3));
4263	return rc3;
4264	}
4265	#endif /* PGMPOOL_WITH_USER_TRACKING */
4266
4267	/*
4268	* Commit the allocation, clear the page and return.
4269	*/
4270	#ifdef VBOX_WITH_STATISTICS
4271	if (pPool->cUsedPages > pPool->cUsedPagesHigh)
4272	pPool->cUsedPagesHigh = pPool->cUsedPages;
4273	#endif
4274
4275	if (!pPage->fZeroed)
4276	{
4277	STAM_PROFILE_START(&pPool->StatZeroPage, z);
4278	void *pv = PGMPOOL_PAGE_2_PTR(pVM, pPage);
4279	ASMMemZeroPage(pv);
4280	STAM_PROFILE_STOP(&pPool->StatZeroPage, z);
4281	}
4282
4283	*ppPage = pPage;
4284	LogFlow(("pgmPoolAlloc: returns %Rrc *ppPage=%p:{.Key=%RHp, .idx=%d, .fCached=%RTbool, .fMonitored=%RTbool}\n",
4285	rc, pPage, pPage->Core.Key, pPage->idx, pPage->fCached, pPage->fMonitored));
4286	STAM_PROFILE_ADV_STOP(&pPool->StatAlloc, a);
4287	return rc;
4288	}
4289
4290
4291	/**
4292	* Frees a usage of a pool page.
4293	*
4294	* @param pVM The VM handle.
4295	* @param HCPhys The HC physical address of the shadow page.
4296	* @param iUser The shadow page pool index of the user table.
4297	* @param iUserTable The index into the user table (shadowed).
4298	*/
4299	void pgmPoolFree(PVM pVM, RTHCPHYS HCPhys, uint16_t iUser, uint32_t iUserTable)
4300	{
4301	LogFlow(("pgmPoolFree: HCPhys=%RHp iUser=%#x iUserTable=%#x\n", HCPhys, iUser, iUserTable));
4302	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
4303	pgmPoolFreeByPage(pPool, pgmPoolGetPage(pPool, HCPhys), iUser, iUserTable);
4304	}
4305
4306
4307	/**
4308	* Gets a in-use page in the pool by it's physical address.
4309	*
4310	* @returns Pointer to the page.
4311	* @param pVM The VM handle.
4312	* @param HCPhys The HC physical address of the shadow page.
4313	* @remark This function will NEVER return NULL. It will assert if HCPhys is invalid.
4314	*/
4315	PPGMPOOLPAGE pgmPoolGetPageByHCPhys(PVM pVM, RTHCPHYS HCPhys)
4316	{
4317	/** @todo profile this! */
4318	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
4319	PPGMPOOLPAGE pPage = pgmPoolGetPage(pPool, HCPhys);
4320	Log4(("pgmPoolGetPageByHCPhys: HCPhys=%RHp -> %p:{.idx=%d .GCPhys=%RGp .enmKind=%s}\n",
4321	HCPhys, pPage, pPage->idx, pPage->GCPhys, pgmPoolPoolKindToStr(pPage->enmKind)));
4322	return pPage;
4323	}
4324
4325	#ifdef IN_RING3
4326	/**
4327	* Flushes the entire cache.
4328	*
4329	* It will assert a global CR3 flush (FF) and assumes the caller is aware of this
4330	* and execute this CR3 flush.
4331	*
4332	* @param pPool The pool.
4333	*/
4334	void pgmPoolFlushAll(PVM pVM)
4335	{
4336	LogFlow(("pgmPoolFlushAll:\n"));
4337	pgmPoolFlushAllInt(pVM->pgm.s.CTX_SUFF(pPool));
4338	}
4339	#endif /* IN_RING3 */
4340
4341	#ifdef LOG_ENABLED
4342	static const char *pgmPoolPoolKindToStr(uint8_t enmKind)
4343	{
4344	switch(enmKind)
4345	{
4346	case PGMPOOLKIND_INVALID:
4347	return "PGMPOOLKIND_INVALID";
4348	case PGMPOOLKIND_FREE:
4349	return "PGMPOOLKIND_FREE";
4350	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
4351	return "PGMPOOLKIND_32BIT_PT_FOR_PHYS";
4352	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
4353	return "PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT";
4354	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
4355	return "PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB";
4356	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
4357	return "PGMPOOLKIND_PAE_PT_FOR_PHYS";
4358	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
4359	return "PGMPOOLKIND_PAE_PT_FOR_32BIT_PT";
4360	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
4361	return "PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB";
4362	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
4363	return "PGMPOOLKIND_PAE_PT_FOR_PAE_PT";
4364	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
4365	return "PGMPOOLKIND_PAE_PT_FOR_PAE_2MB";
4366	case PGMPOOLKIND_32BIT_PD:
4367	return "PGMPOOLKIND_32BIT_PD";
4368	case PGMPOOLKIND_32BIT_PD_PHYS:
4369	return "PGMPOOLKIND_32BIT_PD_PHYS";
4370	case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
4371	return "PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD";
4372	case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
4373	return "PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD";
4374	case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
4375	return "PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD";
4376	case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
4377	return "PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD";
4378	case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
4379	return "PGMPOOLKIND_PAE_PD_FOR_PAE_PD";
4380	case PGMPOOLKIND_PAE_PD_PHYS:
4381	return "PGMPOOLKIND_PAE_PD_PHYS";
4382	case PGMPOOLKIND_PAE_PDPT_FOR_32BIT:
4383	return "PGMPOOLKIND_PAE_PDPT_FOR_32BIT";
4384	case PGMPOOLKIND_PAE_PDPT:
4385	return "PGMPOOLKIND_PAE_PDPT";
4386	case PGMPOOLKIND_PAE_PDPT_PHYS:
4387	return "PGMPOOLKIND_PAE_PDPT_PHYS";
4388	case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
4389	return "PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT";
4390	case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
4391	return "PGMPOOLKIND_64BIT_PDPT_FOR_PHYS";
4392	case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
4393	return "PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD";
4394	case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
4395	return "PGMPOOLKIND_64BIT_PD_FOR_PHYS";
4396	case PGMPOOLKIND_64BIT_PML4:
4397	return "PGMPOOLKIND_64BIT_PML4";
4398	case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
4399	return "PGMPOOLKIND_EPT_PDPT_FOR_PHYS";
4400	case PGMPOOLKIND_EPT_PD_FOR_PHYS:
4401	return "PGMPOOLKIND_EPT_PD_FOR_PHYS";
4402	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
4403	return "PGMPOOLKIND_EPT_PT_FOR_PHYS";
4404	case PGMPOOLKIND_ROOT_NESTED:
4405	return "PGMPOOLKIND_ROOT_NESTED";
4406	}
4407	return "Unknown kind!";
4408	}
4409	#endif /* LOG_ENABLED*/

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source: vbox/trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp@ 17787

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