TMAllCpu.cpp@ 87626

Last change on this file since 87626 was 87292, checked in by vboxsync, 4 years ago
TMAllCpu: > 4GHz CPU fun. Adjustments for bugref:9898.
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1	/* $Id: TMAllCpu.cpp 87292 2021-01-16 12:15:01Z vboxsync $ */
2	/** @file
3	* TM - Timeout Manager, CPU Time, All Contexts.
4	*/
5
6	/*
7	* Copyright (C) 2006-2020 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_TM
23	#include <VBox/vmm/tm.h>
24	#include <VBox/vmm/gim.h>
25	#include <VBox/vmm/dbgf.h>
26	#include <VBox/vmm/nem.h>
27	#if defined(RT_ARCH_AMD64) \|\| defined(RT_ARCH_X86)
28	# include <iprt/asm-amd64-x86.h> /* for SUPGetCpuHzFromGIP; ASMReadTSC */
29	#elif defined(RT_ARCH_ARM64) \|\| defined(RT_ARCH_ARM32)
30	# include <iprt/asm-arm.h>
31	#endif
32	#include "TMInternal.h"
33	#include <VBox/vmm/vmcc.h>
34	#include <VBox/sup.h>
35
36	#include <VBox/param.h>
37	#include <VBox/err.h>
38	#include <iprt/asm-math.h>
39	#include <iprt/assert.h>
40	#include <VBox/log.h>
41
42
43
44	/**
45	* Converts from virtual time to raw CPU ticks.
46	*
47	* Mainly to have the ASMMultU64ByU32DivByU32 overflow trickery in one place.
48	*
49	* @returns raw CPU ticks.
50	* @param pVM The cross context VM structure.
51	* @param u64VirtualTime The virtual time to convert.
52	*/
53	DECLINLINE(uint64_t) tmCpuTickCalcFromVirtual(PVMCC pVM, uint64_t u64VirtualTime)
54	{
55	if (pVM->tm.s.cTSCTicksPerSecond <= UINT32_MAX)
56	return ASMMultU64ByU32DivByU32(u64VirtualTime, (uint32_t)pVM->tm.s.cTSCTicksPerSecond, TMCLOCK_FREQ_VIRTUAL);
57	Assert(pVM->tm.s.cTSCTicksPerSecond <= ((uint64_t)UINT32_MAX << 2)); /* <= 15.99 GHz */
58	return ASMMultU64ByU32DivByU32(u64VirtualTime, (uint32_t)(pVM->tm.s.cTSCTicksPerSecond >> 2), TMCLOCK_FREQ_VIRTUAL >> 2);
59	}
60
61
62	/**
63	* Gets the raw cpu tick from current virtual time.
64	*
65	* @param pVM The cross context VM structure.
66	* @param fCheckTimers Whether to check timers.
67	*/
68	DECLINLINE(uint64_t) tmCpuTickGetRawVirtual(PVMCC pVM, bool fCheckTimers)
69	{
70	if (fCheckTimers)
71	return tmCpuTickCalcFromVirtual(pVM, TMVirtualSyncGet(pVM));
72	return tmCpuTickCalcFromVirtual(pVM, TMVirtualSyncGetNoCheck(pVM));
73	}
74
75
76	#ifdef IN_RING3
77	/**
78	* Used by tmR3CpuTickParavirtEnable and tmR3CpuTickParavirtDisable.
79	*
80	* @param pVM The cross context VM structure.
81	*/
82	uint64_t tmR3CpuTickGetRawVirtualNoCheck(PVM pVM)
83	{
84	return tmCpuTickGetRawVirtual(pVM, false /fCheckTimers/);
85	}
86	#endif
87
88
89	/**
90	* Resumes the CPU timestamp counter ticking.
91	*
92	* @returns VBox status code.
93	* @param pVM The cross context VM structure.
94	* @param pVCpu The cross context virtual CPU structure.
95	* @internal
96	*/
97	int tmCpuTickResume(PVMCC pVM, PVMCPUCC pVCpu)
98	{
99	if (!pVCpu->tm.s.fTSCTicking)
100	{
101	pVCpu->tm.s.fTSCTicking = true;
102
103	/** @todo Test that pausing and resuming doesn't cause lag! (I.e. that we're
104	* unpaused before the virtual time and stopped after it. */
105	switch (pVM->tm.s.enmTSCMode)
106	{
107	case TMTSCMODE_REAL_TSC_OFFSET:
108	pVCpu->tm.s.offTSCRawSrc = SUPReadTsc() - pVCpu->tm.s.u64TSC;
109	break;
110	case TMTSCMODE_VIRT_TSC_EMULATED:
111	case TMTSCMODE_DYNAMIC:
112	pVCpu->tm.s.offTSCRawSrc = tmCpuTickGetRawVirtual(pVM, false /* don't check for pending timers */)
113	- pVCpu->tm.s.u64TSC;
114	break;
115	case TMTSCMODE_NATIVE_API:
116	pVCpu->tm.s.offTSCRawSrc = 0; /** @todo ?? */
117	/* Looks like this is only used by weird modes and MSR TSC writes. We cannot support either on NEM/win. */
118	break;
119	default:
120	AssertFailedReturn(VERR_IPE_NOT_REACHED_DEFAULT_CASE);
121	}
122	return VINF_SUCCESS;
123	}
124	AssertFailed();
125	return VERR_TM_TSC_ALREADY_TICKING;
126	}
127
128
129	/**
130	* Resumes the CPU timestamp counter ticking.
131	*
132	* @returns VINF_SUCCESS or VERR_TM_VIRTUAL_TICKING_IPE (asserted).
133	* @param pVM The cross context VM structure.
134	* @param pVCpu The cross context virtual CPU structure.
135	*/
136	int tmCpuTickResumeLocked(PVMCC pVM, PVMCPUCC pVCpu)
137	{
138	if (!pVCpu->tm.s.fTSCTicking)
139	{
140	/* TSC must be ticking before calling tmCpuTickGetRawVirtual()! */
141	pVCpu->tm.s.fTSCTicking = true;
142	uint32_t c = ASMAtomicIncU32(&pVM->tm.s.cTSCsTicking);
143	AssertMsgReturn(c <= pVM->cCpus, ("%u vs %u\n", c, pVM->cCpus), VERR_TM_VIRTUAL_TICKING_IPE);
144	if (c == 1)
145	{
146	/* The first VCPU to resume. */
147	uint64_t offTSCRawSrcOld = pVCpu->tm.s.offTSCRawSrc;
148
149	STAM_COUNTER_INC(&pVM->tm.s.StatTSCResume);
150
151	/* When resuming, use the TSC value of the last stopped VCPU to avoid the TSC going back. */
152	switch (pVM->tm.s.enmTSCMode)
153	{
154	case TMTSCMODE_REAL_TSC_OFFSET:
155	pVCpu->tm.s.offTSCRawSrc = SUPReadTsc() - pVM->tm.s.u64LastPausedTSC;
156	break;
157	case TMTSCMODE_VIRT_TSC_EMULATED:
158	case TMTSCMODE_DYNAMIC:
159	pVCpu->tm.s.offTSCRawSrc = tmCpuTickGetRawVirtual(pVM, false /* don't check for pending timers */)
160	- pVM->tm.s.u64LastPausedTSC;
161	break;
162	case TMTSCMODE_NATIVE_API:
163	{
164	int rc = NEMHCResumeCpuTickOnAll(pVM, pVCpu, pVM->tm.s.u64LastPausedTSC);
165	AssertRCReturn(rc, rc);
166	pVCpu->tm.s.offTSCRawSrc = offTSCRawSrcOld = 0;
167	break;
168	}
169	default:
170	AssertFailedReturn(VERR_IPE_NOT_REACHED_DEFAULT_CASE);
171	}
172
173	/* Calculate the offset addendum for other VCPUs to use. */
174	pVM->tm.s.offTSCPause = pVCpu->tm.s.offTSCRawSrc - offTSCRawSrcOld;
175	}
176	else
177	{
178	/* All other VCPUs (if any). */
179	pVCpu->tm.s.offTSCRawSrc += pVM->tm.s.offTSCPause;
180	}
181	}
182	return VINF_SUCCESS;
183	}
184
185
186	/**
187	* Pauses the CPU timestamp counter ticking.
188	*
189	* @returns VBox status code.
190	* @param pVCpu The cross context virtual CPU structure.
191	* @internal
192	*/
193	int tmCpuTickPause(PVMCPUCC pVCpu)
194	{
195	if (pVCpu->tm.s.fTSCTicking)
196	{
197	pVCpu->tm.s.u64TSC = TMCpuTickGetNoCheck(pVCpu);
198	pVCpu->tm.s.fTSCTicking = false;
199	return VINF_SUCCESS;
200	}
201	AssertFailed();
202	return VERR_TM_TSC_ALREADY_PAUSED;
203	}
204
205
206	/**
207	* Pauses the CPU timestamp counter ticking.
208	*
209	* @returns VBox status code.
210	* @param pVM The cross context VM structure.
211	* @param pVCpu The cross context virtual CPU structure.
212	* @internal
213	*/
214	int tmCpuTickPauseLocked(PVMCC pVM, PVMCPUCC pVCpu)
215	{
216	if (pVCpu->tm.s.fTSCTicking)
217	{
218	pVCpu->tm.s.u64TSC = TMCpuTickGetNoCheck(pVCpu);
219	pVCpu->tm.s.fTSCTicking = false;
220
221	uint32_t c = ASMAtomicDecU32(&pVM->tm.s.cTSCsTicking);
222	AssertMsgReturn(c < pVM->cCpus, ("%u vs %u\n", c, pVM->cCpus), VERR_TM_VIRTUAL_TICKING_IPE);
223	if (c == 0)
224	{
225	/* When the last TSC stops, remember the value. */
226	STAM_COUNTER_INC(&pVM->tm.s.StatTSCPause);
227	pVM->tm.s.u64LastPausedTSC = pVCpu->tm.s.u64TSC;
228	}
229	return VINF_SUCCESS;
230	}
231	AssertFailed();
232	return VERR_TM_TSC_ALREADY_PAUSED;
233	}
234
235
236	#ifdef VBOX_WITH_STATISTICS
237	/**
238	* Record why we refused to use offsetted TSC.
239	*
240	* Used by TMCpuTickCanUseRealTSC() and TMCpuTickGetDeadlineAndTscOffset().
241	*
242	* @param pVM The cross context VM structure.
243	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
244	*/
245	DECLINLINE(void) tmCpuTickRecordOffsettedTscRefusal(PVM pVM, PVMCPU pVCpu)
246	{
247	/* Sample the reason for refusing. */
248	if (pVM->tm.s.enmTSCMode != TMTSCMODE_DYNAMIC)
249	STAM_COUNTER_INC(&pVM->tm.s.StatTSCNotFixed);
250	else if (!pVCpu->tm.s.fTSCTicking)
251	STAM_COUNTER_INC(&pVM->tm.s.StatTSCNotTicking);
252	else if (pVM->tm.s.enmTSCMode != TMTSCMODE_REAL_TSC_OFFSET)
253	{
254	if (pVM->tm.s.fVirtualSyncCatchUp)
255	{
256	if (pVM->tm.s.u32VirtualSyncCatchUpPercentage <= 10)
257	STAM_COUNTER_INC(&pVM->tm.s.StatTSCCatchupLE010);
258	else if (pVM->tm.s.u32VirtualSyncCatchUpPercentage <= 25)
259	STAM_COUNTER_INC(&pVM->tm.s.StatTSCCatchupLE025);
260	else if (pVM->tm.s.u32VirtualSyncCatchUpPercentage <= 100)
261	STAM_COUNTER_INC(&pVM->tm.s.StatTSCCatchupLE100);
262	else
263	STAM_COUNTER_INC(&pVM->tm.s.StatTSCCatchupOther);
264	}
265	else if (!pVM->tm.s.fVirtualSyncTicking)
266	STAM_COUNTER_INC(&pVM->tm.s.StatTSCSyncNotTicking);
267	else if (pVM->tm.s.fVirtualWarpDrive)
268	STAM_COUNTER_INC(&pVM->tm.s.StatTSCWarp);
269	}
270	}
271	#endif /* VBOX_WITH_STATISTICS */
272
273
274	/**
275	* Checks if AMD-V / VT-x can use an offsetted hardware TSC or not.
276	*
277	* @returns true/false accordingly.
278	* @param pVM The cross context VM structure.
279	* @param pVCpu The cross context virtual CPU structure.
280	* @param poffRealTsc The offset against the TSC of the current host CPU,
281	* if pfOffsettedTsc is set to true.
282	* @param pfParavirtTsc Where to return whether paravirt TSC is enabled.
283	*
284	* @thread EMT(pVCpu).
285	* @see TMCpuTickGetDeadlineAndTscOffset().
286	*/
287	VMM_INT_DECL(bool) TMCpuTickCanUseRealTSC(PVMCC pVM, PVMCPUCC pVCpu, uint64_t poffRealTsc, bool pfParavirtTsc)
288	{
289	Assert(pVCpu->tm.s.fTSCTicking \|\| DBGFIsStepping(pVCpu));
290
291	*pfParavirtTsc = pVM->tm.s.fParavirtTscEnabled;
292
293	/*
294	* In real TSC mode it's easy, we just need the delta & offTscRawSrc and
295	* the CPU will add them to RDTSC and RDTSCP at runtime.
296	*
297	* In tmCpuTickGetInternal we do:
298	* SUPReadTsc() - pVCpu->tm.s.offTSCRawSrc;
299	* Where SUPReadTsc() does:
300	* ASMReadTSC() - pGipCpu->i64TscDelta;
301	* Which means tmCpuTickGetInternal actually does:
302	* ASMReadTSC() - pGipCpu->i64TscDelta - pVCpu->tm.s.offTSCRawSrc;
303	* So, the offset to be ADDED to RDTSC[P] is:
304	* offRealTsc = -(pGipCpu->i64TscDelta + pVCpu->tm.s.offTSCRawSrc)
305	*/
306	if (pVM->tm.s.enmTSCMode == TMTSCMODE_REAL_TSC_OFFSET)
307	{
308	/** @todo We should negate both deltas! It's soo weird that we do the
309	* exact opposite of what the hardware implements. */
310	#ifdef IN_RING3
311	*poffRealTsc = (uint64_t)0 - pVCpu->tm.s.offTSCRawSrc - (uint64_t)SUPGetTscDelta();
312	#else
313	*poffRealTsc = (uint64_t)0 - pVCpu->tm.s.offTSCRawSrc - (uint64_t)SUPGetTscDeltaByCpuSetIndex(pVCpu->iHostCpuSet);
314	#endif
315	return true;
316	}
317
318	/*
319	* We require:
320	* 1. A fixed TSC, this is checked at init time.
321	* 2. That the TSC is ticking (we shouldn't be here if it isn't)
322	* 3. Either that we're using the real TSC as time source or
323	* a) we don't have any lag to catch up, and
324	* b) the virtual sync clock hasn't been halted by an expired timer, and
325	* c) we're not using warp drive (accelerated virtual guest time).
326	*/
327	if ( pVM->tm.s.enmTSCMode == TMTSCMODE_DYNAMIC
328	&& !pVM->tm.s.fVirtualSyncCatchUp
329	&& RT_LIKELY(pVM->tm.s.fVirtualSyncTicking)
330	&& !pVM->tm.s.fVirtualWarpDrive)
331	{
332	/* The source is the timer synchronous virtual clock. */
333	uint64_t u64Now = tmCpuTickGetRawVirtual(pVM, false /* don't check for pending timers */)
334	- pVCpu->tm.s.offTSCRawSrc;
335	/** @todo When we start collecting statistics on how much time we spend executing
336	* guest code before exiting, we should check this against the next virtual sync
337	* timer timeout. If it's lower than the avg. length, we should trap rdtsc to increase
338	* the chance that we'll get interrupted right after the timer expired. */
339	if (u64Now >= pVCpu->tm.s.u64TSCLastSeen)
340	{
341	*poffRealTsc = u64Now - ASMReadTSC();
342	return true; /** @todo count this? */
343	}
344	}
345
346	#ifdef VBOX_WITH_STATISTICS
347	tmCpuTickRecordOffsettedTscRefusal(pVM, pVCpu);
348	#endif
349	return false;
350	}
351
352
353	/**
354	* Calculates the number of host CPU ticks till the next virtual sync deadline.
355	*
356	* @note To save work, this function will not bother calculating the accurate
357	* tick count for deadlines that are more than a second ahead.
358	*
359	* @returns The number of host cpu ticks to the next deadline. Max one second.
360	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
361	* @param cNsToDeadline The number of nano seconds to the next virtual
362	* sync deadline.
363	*/
364	DECLINLINE(uint64_t) tmCpuCalcTicksToDeadline(PVMCPU pVCpu, uint64_t cNsToDeadline)
365	{
366	AssertCompile(TMCLOCK_FREQ_VIRTUAL <= _4G);
367	#ifdef IN_RING3
368	RT_NOREF_PV(pVCpu);
369	uint64_t uCpuHz = SUPGetCpuHzFromGip(g_pSUPGlobalInfoPage);
370	#else
371	uint64_t uCpuHz = SUPGetCpuHzFromGipBySetIndex(g_pSUPGlobalInfoPage, pVCpu->iHostCpuSet);
372	#endif
373	if (RT_UNLIKELY(cNsToDeadline >= TMCLOCK_FREQ_VIRTUAL))
374	return uCpuHz;
375	AssertCompile(TMCLOCK_FREQ_VIRTUAL <= UINT32_MAX);
376	uint64_t cTicks = ASMMultU64ByU32DivByU32(uCpuHz, (uint32_t)cNsToDeadline, TMCLOCK_FREQ_VIRTUAL);
377	if (cTicks > 4000)
378	cTicks -= 4000; /* fudge to account for overhead */
379	else
380	cTicks >>= 1;
381	return cTicks;
382	}
383
384
385	/**
386	* Gets the next deadline in host CPU clock ticks and the TSC offset if we can
387	* use the raw TSC.
388	*
389	* @returns The number of host CPU clock ticks to the next timer deadline.
390	* @param pVM The cross context VM structure.
391	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
392	* @param poffRealTsc The offset against the TSC of the current host CPU,
393	* if pfOffsettedTsc is set to true.
394	* @param pfOffsettedTsc Where to return whether TSC offsetting can be used.
395	* @param pfParavirtTsc Where to return whether paravirt TSC is enabled.
396	*
397	* @thread EMT(pVCpu).
398	* @see TMCpuTickCanUseRealTSC().
399	*/
400	VMM_INT_DECL(uint64_t) TMCpuTickGetDeadlineAndTscOffset(PVMCC pVM, PVMCPUCC pVCpu, uint64_t *poffRealTsc,
401	bool pfOffsettedTsc, bool pfParavirtTsc)
402	{
403	Assert(pVCpu->tm.s.fTSCTicking \|\| DBGFIsStepping(pVCpu));
404
405	*pfParavirtTsc = pVM->tm.s.fParavirtTscEnabled;
406
407	/*
408	* Same logic as in TMCpuTickCanUseRealTSC.
409	*/
410	if (pVM->tm.s.enmTSCMode == TMTSCMODE_REAL_TSC_OFFSET)
411	{
412	/** @todo We should negate both deltas! It's soo weird that we do the
413	* exact opposite of what the hardware implements. */
414	#ifdef IN_RING3
415	*poffRealTsc = (uint64_t)0 - pVCpu->tm.s.offTSCRawSrc - (uint64_t)SUPGetTscDelta();
416	#else
417	*poffRealTsc = (uint64_t)0 - pVCpu->tm.s.offTSCRawSrc - (uint64_t)SUPGetTscDeltaByCpuSetIndex(pVCpu->iHostCpuSet);
418	#endif
419	*pfOffsettedTsc = true;
420	return tmCpuCalcTicksToDeadline(pVCpu, TMVirtualSyncGetNsToDeadline(pVM));
421	}
422
423	/*
424	* Same logic as in TMCpuTickCanUseRealTSC.
425	*/
426	if ( pVM->tm.s.enmTSCMode == TMTSCMODE_DYNAMIC
427	&& !pVM->tm.s.fVirtualSyncCatchUp
428	&& RT_LIKELY(pVM->tm.s.fVirtualSyncTicking)
429	&& !pVM->tm.s.fVirtualWarpDrive)
430	{
431	/* The source is the timer synchronous virtual clock. */
432	uint64_t cNsToDeadline;
433	uint64_t u64NowVirtSync = TMVirtualSyncGetWithDeadlineNoCheck(pVM, &cNsToDeadline);
434	uint64_t u64Now = tmCpuTickCalcFromVirtual(pVM, u64NowVirtSync);
435	u64Now -= pVCpu->tm.s.offTSCRawSrc;
436	*poffRealTsc = u64Now - ASMReadTSC();
437	*pfOffsettedTsc = u64Now >= pVCpu->tm.s.u64TSCLastSeen;
438	return tmCpuCalcTicksToDeadline(pVCpu, cNsToDeadline);
439	}
440
441	#ifdef VBOX_WITH_STATISTICS
442	tmCpuTickRecordOffsettedTscRefusal(pVM, pVCpu);
443	#endif
444	*pfOffsettedTsc = false;
445	*poffRealTsc = 0;
446	return tmCpuCalcTicksToDeadline(pVCpu, TMVirtualSyncGetNsToDeadline(pVM));
447	}
448
449
450	/**
451	* Read the current CPU timestamp counter.
452	*
453	* @returns Gets the CPU tsc.
454	* @param pVCpu The cross context virtual CPU structure.
455	* @param fCheckTimers Whether to check timers.
456	*/
457	DECLINLINE(uint64_t) tmCpuTickGetInternal(PVMCPUCC pVCpu, bool fCheckTimers)
458	{
459	uint64_t u64;
460
461	if (RT_LIKELY(pVCpu->tm.s.fTSCTicking))
462	{
463	PVMCC pVM = pVCpu->CTX_SUFF(pVM);
464	switch (pVM->tm.s.enmTSCMode)
465	{
466	case TMTSCMODE_REAL_TSC_OFFSET:
467	u64 = SUPReadTsc();
468	break;
469	case TMTSCMODE_VIRT_TSC_EMULATED:
470	case TMTSCMODE_DYNAMIC:
471	u64 = tmCpuTickGetRawVirtual(pVM, fCheckTimers);
472	break;
473	case TMTSCMODE_NATIVE_API:
474	{
475	u64 = 0;
476	int rcNem = NEMHCQueryCpuTick(pVCpu, &u64, NULL);
477	AssertLogRelRCReturn(rcNem, SUPReadTsc());
478	break;
479	}
480	default:
481	AssertFailedBreakStmt(u64 = SUPReadTsc());
482	}
483	u64 -= pVCpu->tm.s.offTSCRawSrc;
484
485	/* Always return a value higher than what the guest has already seen. */
486	if (RT_LIKELY(u64 > pVCpu->tm.s.u64TSCLastSeen))
487	pVCpu->tm.s.u64TSCLastSeen = u64;
488	else
489	{
490	STAM_COUNTER_INC(&pVM->tm.s.StatTSCUnderflow);
491	pVCpu->tm.s.u64TSCLastSeen += 64; /** @todo choose a good increment here */
492	u64 = pVCpu->tm.s.u64TSCLastSeen;
493	}
494	}
495	else
496	u64 = pVCpu->tm.s.u64TSC;
497	return u64;
498	}
499
500
501	/**
502	* Read the current CPU timestamp counter.
503	*
504	* @returns Gets the CPU tsc.
505	* @param pVCpu The cross context virtual CPU structure.
506	*/
507	VMMDECL(uint64_t) TMCpuTickGet(PVMCPUCC pVCpu)
508	{
509	return tmCpuTickGetInternal(pVCpu, true /* fCheckTimers */);
510	}
511
512
513	/**
514	* Read the current CPU timestamp counter, don't check for expired timers.
515	*
516	* @returns Gets the CPU tsc.
517	* @param pVCpu The cross context virtual CPU structure.
518	*/
519	VMM_INT_DECL(uint64_t) TMCpuTickGetNoCheck(PVMCPUCC pVCpu)
520	{
521	return tmCpuTickGetInternal(pVCpu, false /* fCheckTimers */);
522	}
523
524
525	/**
526	* Sets the current CPU timestamp counter.
527	*
528	* @returns VBox status code.
529	* @param pVM The cross context VM structure.
530	* @param pVCpu The cross context virtual CPU structure.
531	* @param u64Tick The new timestamp value.
532	*
533	* @thread EMT which TSC is to be set.
534	*/
535	VMM_INT_DECL(int) TMCpuTickSet(PVMCC pVM, PVMCPUCC pVCpu, uint64_t u64Tick)
536	{
537	VMCPU_ASSERT_EMT(pVCpu);
538	STAM_COUNTER_INC(&pVM->tm.s.StatTSCSet);
539
540	/*
541	* This is easier to do when the TSC is paused since resume will
542	* do all the calculations for us. Actually, we don't need to
543	* call tmCpuTickPause here since we overwrite u64TSC anyway.
544	*/
545	bool fTSCTicking = pVCpu->tm.s.fTSCTicking;
546	pVCpu->tm.s.fTSCTicking = false;
547	pVCpu->tm.s.u64TSC = u64Tick;
548	pVCpu->tm.s.u64TSCLastSeen = u64Tick;
549	if (fTSCTicking)
550	tmCpuTickResume(pVM, pVCpu);
551	/** @todo Try help synchronizing it better among the virtual CPUs? */
552
553	return VINF_SUCCESS;
554	}
555
556	/**
557	* Sets the last seen CPU timestamp counter.
558	*
559	* @returns VBox status code.
560	* @param pVCpu The cross context virtual CPU structure.
561	* @param u64LastSeenTick The last seen timestamp value.
562	*
563	* @thread EMT which TSC is to be set.
564	*/
565	VMM_INT_DECL(int) TMCpuTickSetLastSeen(PVMCPUCC pVCpu, uint64_t u64LastSeenTick)
566	{
567	VMCPU_ASSERT_EMT(pVCpu);
568
569	LogFlow(("TMCpuTickSetLastSeen %RX64\n", u64LastSeenTick));
570	if (pVCpu->tm.s.u64TSCLastSeen < u64LastSeenTick)
571	pVCpu->tm.s.u64TSCLastSeen = u64LastSeenTick;
572	return VINF_SUCCESS;
573	}
574
575	/**
576	* Gets the last seen CPU timestamp counter of the guest.
577	*
578	* @returns the last seen TSC.
579	* @param pVCpu The cross context virtual CPU structure.
580	*
581	* @thread EMT(pVCpu).
582	*/
583	VMM_INT_DECL(uint64_t) TMCpuTickGetLastSeen(PVMCPUCC pVCpu)
584	{
585	VMCPU_ASSERT_EMT(pVCpu);
586
587	return pVCpu->tm.s.u64TSCLastSeen;
588	}
589
590
591	/**
592	* Get the timestamp frequency.
593	*
594	* @returns Number of ticks per second.
595	* @param pVM The cross context VM structure.
596	*/
597	VMMDECL(uint64_t) TMCpuTicksPerSecond(PVMCC pVM)
598	{
599	if ( pVM->tm.s.enmTSCMode == TMTSCMODE_REAL_TSC_OFFSET
600	&& g_pSUPGlobalInfoPage->u32Mode != SUPGIPMODE_INVARIANT_TSC)
601	{
602	#ifdef IN_RING3
603	uint64_t cTSCTicksPerSecond = SUPGetCpuHzFromGip(g_pSUPGlobalInfoPage);
604	#elif defined(IN_RING0)
605	uint64_t cTSCTicksPerSecond = SUPGetCpuHzFromGipBySetIndex(g_pSUPGlobalInfoPage, (uint32_t)RTMpCpuIdToSetIndex(RTMpCpuId()));
606	#else
607	uint64_t cTSCTicksPerSecond = SUPGetCpuHzFromGipBySetIndex(g_pSUPGlobalInfoPage, VMMGetCpu(pVM)->iHostCpuSet);
608	#endif
609	if (RT_LIKELY(cTSCTicksPerSecond != ~(uint64_t)0))
610	return cTSCTicksPerSecond;
611	}
612	return pVM->tm.s.cTSCTicksPerSecond;
613	}
614
615
616	/**
617	* Whether the TSC is ticking for the VCPU.
618	*
619	* @returns true if ticking, false otherwise.
620	* @param pVCpu The cross context virtual CPU structure.
621	*/
622	VMM_INT_DECL(bool) TMCpuTickIsTicking(PVMCPUCC pVCpu)
623	{
624	return pVCpu->tm.s.fTSCTicking;
625	}
626

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source: vbox/trunk/src/VBox/VMM/VMMAll/TMAllCpu.cpp@ 87626

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