TRPMAll.cpp@ 28875

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1	/* $Id: TRPMAll.cpp 28800 2010-04-27 08:22:32Z vboxsync $ */
2	/** @file
3	* TRPM - Trap Monitor - Any Context.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*******************************************************************************
20	* Header Files *
21	*******************************************************************************/
22	#define LOG_GROUP LOG_GROUP_TRPM
23	#include <VBox/trpm.h>
24	#include <VBox/pgm.h>
25	#include <VBox/mm.h>
26	#include <VBox/patm.h>
27	#include <VBox/selm.h>
28	#include <VBox/stam.h>
29	#include "TRPMInternal.h"
30	#include <VBox/vm.h>
31	#include <VBox/err.h>
32	#include <VBox/x86.h>
33	#include <VBox/em.h>
34
35	#include <VBox/log.h>
36	#include <iprt/assert.h>
37	#include <iprt/asm.h>
38	#include <iprt/param.h>
39
40
41
42	/**
43	* Query info about the current active trap/interrupt.
44	* If no trap is active active an error code is returned.
45	*
46	* @returns VBox status code.
47	* @param pVCpu VMCPU handle.
48	* @param pu8TrapNo Where to store the trap number.
49	* @param pEnmType Where to store the trap type
50	*/
51	VMMDECL(int) TRPMQueryTrap(PVMCPU pVCpu, uint8_t pu8TrapNo, TRPMEVENT pEnmType)
52	{
53	/*
54	* Check if we have a trap at present.
55	*/
56	if (pVCpu->trpm.s.uActiveVector != ~0U)
57	{
58	if (pu8TrapNo)
59	*pu8TrapNo = (uint8_t)pVCpu->trpm.s.uActiveVector;
60	if (pEnmType)
61	*pEnmType = pVCpu->trpm.s.enmActiveType;
62	return VINF_SUCCESS;
63	}
64
65	return VERR_TRPM_NO_ACTIVE_TRAP;
66	}
67
68
69	/**
70	* Gets the trap number for the current trap.
71	*
72	* The caller is responsible for making sure there is an active trap which
73	* takes an error code when making this request.
74	*
75	* @returns The current trap number.
76	* @param pVCpu VMCPU handle.
77	*/
78	VMMDECL(uint8_t) TRPMGetTrapNo(PVMCPU pVCpu)
79	{
80	AssertMsg(pVCpu->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
81	return (uint8_t)pVCpu->trpm.s.uActiveVector;
82	}
83
84
85	/**
86	* Gets the error code for the current trap.
87	*
88	* The caller is responsible for making sure there is an active trap which
89	* takes an error code when making this request.
90	*
91	* @returns Error code.
92	* @param pVCpu VMCPU handle.
93	*/
94	VMMDECL(RTGCUINT) TRPMGetErrorCode(PVMCPU pVCpu)
95	{
96	AssertMsg(pVCpu->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
97	#ifdef VBOX_STRICT
98	switch (pVCpu->trpm.s.uActiveVector)
99	{
100	case 0x0a:
101	case 0x0b:
102	case 0x0c:
103	case 0x0d:
104	case 0x0e:
105	case 0x11:
106	case 0x08:
107	break;
108	default:
109	AssertMsgFailed(("This trap (%#x) doesn't have any error code\n", pVCpu->trpm.s.uActiveVector));
110	break;
111	}
112	#endif
113	return pVCpu->trpm.s.uActiveErrorCode;
114	}
115
116
117	/**
118	* Gets the fault address for the current trap.
119	*
120	* The caller is responsible for making sure there is an active trap 0x0e when
121	* making this request.
122	*
123	* @returns Fault address associated with the trap.
124	* @param pVCpu VMCPU handle.
125	*/
126	VMMDECL(RTGCUINTPTR) TRPMGetFaultAddress(PVMCPU pVCpu)
127	{
128	AssertMsg(pVCpu->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
129	AssertMsg(pVCpu->trpm.s.uActiveVector == 0xe, ("Not trap 0e!\n"));
130	return pVCpu->trpm.s.uActiveCR2;
131	}
132
133
134	/**
135	* Clears the current active trap/exception/interrupt.
136	*
137	* The caller is responsible for making sure there is an active trap
138	* when making this request.
139	*
140	* @returns VBox status code.
141	* @param pVCpu VMCPU handle.
142	*/
143	VMMDECL(int) TRPMResetTrap(PVMCPU pVCpu)
144	{
145	/*
146	* Cannot reset non-existing trap!
147	*/
148	if (pVCpu->trpm.s.uActiveVector == ~0U)
149	{
150	AssertMsgFailed(("No active trap!\n"));
151	return VERR_TRPM_NO_ACTIVE_TRAP;
152	}
153
154	/*
155	* Reset it.
156	*/
157	pVCpu->trpm.s.uActiveVector = ~0U;
158	return VINF_SUCCESS;
159	}
160
161
162	/**
163	* Assert trap/exception/interrupt.
164	*
165	* The caller is responsible for making sure there is no active trap
166	* when making this request.
167	*
168	* @returns VBox status code.
169	* @param pVCpu VMCPU handle.
170	* @param u8TrapNo The trap vector to assert.
171	* @param enmType Trap type.
172	*/
173	VMMDECL(int) TRPMAssertTrap(PVMCPU pVCpu, uint8_t u8TrapNo, TRPMEVENT enmType)
174	{
175	Log2(("TRPMAssertTrap: u8TrapNo=%02x type=%d\n", u8TrapNo, enmType));
176
177	/*
178	* Cannot assert a trap when one is already active.
179	*/
180	if (pVCpu->trpm.s.uActiveVector != ~0U)
181	{
182	AssertMsgFailed(("CPU%d: Active trap %#x\n", pVCpu->idCpu, pVCpu->trpm.s.uActiveVector));
183	return VERR_TRPM_ACTIVE_TRAP;
184	}
185
186	pVCpu->trpm.s.uActiveVector = u8TrapNo;
187	pVCpu->trpm.s.enmActiveType = enmType;
188	pVCpu->trpm.s.uActiveErrorCode = ~0;
189	pVCpu->trpm.s.uActiveCR2 = 0xdeadface;
190	return VINF_SUCCESS;
191	}
192
193
194	/**
195	* Sets the error code of the current trap.
196	* (This function is for use in trap handlers and such.)
197	*
198	* The caller is responsible for making sure there is an active trap
199	* which takes an errorcode when making this request.
200	*
201	* @param pVCpu VMCPU handle.
202	* @param uErrorCode The new error code.
203	*/
204	VMMDECL(void) TRPMSetErrorCode(PVMCPU pVCpu, RTGCUINT uErrorCode)
205	{
206	Log2(("TRPMSetErrorCode: uErrorCode=%RGv\n", uErrorCode)); /** @todo RTGCUINT mess! */
207	AssertMsg(pVCpu->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
208	pVCpu->trpm.s.uActiveErrorCode = uErrorCode;
209	#ifdef VBOX_STRICT
210	switch (pVCpu->trpm.s.uActiveVector)
211	{
212	case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e:
213	AssertMsg(uErrorCode != ~(RTGCUINT)0, ("Invalid uErrorCode=%#x u8TrapNo=%d\n", uErrorCode, pVCpu->trpm.s.uActiveVector));
214	break;
215	case 0x11: case 0x08:
216	AssertMsg(uErrorCode == 0, ("Invalid uErrorCode=%#x u8TrapNo=%d\n", uErrorCode, pVCpu->trpm.s.uActiveVector));
217	break;
218	default:
219	AssertMsg(uErrorCode == ~(RTGCUINT)0, ("Invalid uErrorCode=%#x u8TrapNo=%d\n", uErrorCode, pVCpu->trpm.s.uActiveVector));
220	break;
221	}
222	#endif
223	}
224
225
226	/**
227	* Sets the error code of the current trap.
228	* (This function is for use in trap handlers and such.)
229	*
230	* The caller is responsible for making sure there is an active trap 0e
231	* when making this request.
232	*
233	* @param pVCpu VMCPU handle.
234	* @param uCR2 The new fault address (cr2 register).
235	*/
236	VMMDECL(void) TRPMSetFaultAddress(PVMCPU pVCpu, RTGCUINTPTR uCR2)
237	{
238	Log2(("TRPMSetFaultAddress: uCR2=%RGv\n", uCR2));
239	AssertMsg(pVCpu->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
240	AssertMsg(pVCpu->trpm.s.uActiveVector == 0xe, ("Not trap 0e!\n"));
241	pVCpu->trpm.s.uActiveCR2 = uCR2;
242	}
243
244
245	/**
246	* Checks if the current active trap/interrupt/exception/fault/whatever is a software
247	* interrupt or not.
248	*
249	* The caller is responsible for making sure there is an active trap
250	* when making this request.
251	*
252	* @returns true if software interrupt, false if not.
253	*
254	* @param pVCpu VMCPU handle.
255	*/
256	VMMDECL(bool) TRPMIsSoftwareInterrupt(PVMCPU pVCpu)
257	{
258	AssertMsg(pVCpu->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
259	return (pVCpu->trpm.s.enmActiveType == TRPM_SOFTWARE_INT);
260	}
261
262
263	/**
264	* Check if there is an active trap.
265	*
266	* @returns true if trap active, false if not.
267	* @param pVCpu VMCPU handle.
268	*/
269	VMMDECL(bool) TRPMHasTrap(PVMCPU pVCpu)
270	{
271	return pVCpu->trpm.s.uActiveVector != ~0U;
272	}
273
274
275	/**
276	* Query all info about the current active trap/interrupt.
277	* If no trap is active active an error code is returned.
278	*
279	* @returns VBox status code.
280	* @param pVCpu VMCPU handle.
281	* @param pu8TrapNo Where to store the trap number.
282	* @param pEnmType Where to store the trap type
283	* @param puErrorCode Where to store the error code associated with some traps.
284	* ~0U is stored if the trap has no error code.
285	* @param puCR2 Where to store the CR2 associated with a trap 0E.
286	*/
287	VMMDECL(int) TRPMQueryTrapAll(PVMCPU pVCpu, uint8_t pu8TrapNo, TRPMEVENT pEnmType, PRTGCUINT puErrorCode, PRTGCUINTPTR puCR2)
288	{
289	/*
290	* Check if we have a trap at present.
291	*/
292	if (pVCpu->trpm.s.uActiveVector == ~0U)
293	return VERR_TRPM_NO_ACTIVE_TRAP;
294
295	if (pu8TrapNo)
296	*pu8TrapNo = (uint8_t)pVCpu->trpm.s.uActiveVector;
297	if (pEnmType)
298	*pEnmType = pVCpu->trpm.s.enmActiveType;
299	if (puErrorCode)
300	*puErrorCode = pVCpu->trpm.s.uActiveErrorCode;
301	if (puCR2)
302	*puCR2 = pVCpu->trpm.s.uActiveCR2;
303
304	return VINF_SUCCESS;
305	}
306
307
308	/**
309	* Save the active trap.
310	*
311	* This routine useful when doing try/catch in the hypervisor.
312	* Any function which uses temporary trap handlers should
313	* probably also use this facility to save the original trap.
314	*
315	* @param pVM VM handle.
316	*/
317	VMMDECL(void) TRPMSaveTrap(PVMCPU pVCpu)
318	{
319	pVCpu->trpm.s.uSavedVector = pVCpu->trpm.s.uActiveVector;
320	pVCpu->trpm.s.enmSavedType = pVCpu->trpm.s.enmActiveType;
321	pVCpu->trpm.s.uSavedErrorCode = pVCpu->trpm.s.uActiveErrorCode;
322	pVCpu->trpm.s.uSavedCR2 = pVCpu->trpm.s.uActiveCR2;
323	}
324
325
326	/**
327	* Restore a saved trap.
328	*
329	* Multiple restores of a saved trap is possible.
330	*
331	* @param pVM VM handle.
332	*/
333	VMMDECL(void) TRPMRestoreTrap(PVMCPU pVCpu)
334	{
335	pVCpu->trpm.s.uActiveVector = pVCpu->trpm.s.uSavedVector;
336	pVCpu->trpm.s.enmActiveType = pVCpu->trpm.s.enmSavedType;
337	pVCpu->trpm.s.uActiveErrorCode = pVCpu->trpm.s.uSavedErrorCode;
338	pVCpu->trpm.s.uActiveCR2 = pVCpu->trpm.s.uSavedCR2;
339	}
340
341
342	#ifndef IN_RING0
343	/**
344	* Forward trap or interrupt to the guest's handler
345	*
346	*
347	* @returns VBox status code.
348	* or does not return at all (when the trap is actually forwarded)
349	*
350	* @param pVM The VM to operate on.
351	* @param pRegFrame Pointer to the register frame for the trap.
352	* @param iGate Trap or interrupt gate number
353	* @param opsize Instruction size (only relevant for software interrupts)
354	* @param enmError TRPM_TRAP_HAS_ERRORCODE or TRPM_TRAP_NO_ERRORCODE.
355	* @param enmType TRPM event type
356	* @param iOrgTrap The original trap.
357	* @internal
358	*/
359	VMMDECL(int) TRPMForwardTrap(PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t iGate, uint32_t opsize, TRPMERRORCODE enmError, TRPMEVENT enmType, int32_t iOrgTrap)
360	{
361	#ifdef TRPM_FORWARD_TRAPS_IN_GC
362	PVM pVM = pVCpu->CTX_SUFF(pVM);
363	X86EFLAGS eflags;
364	Assert(pVM->cCpus == 1);
365
366	STAM_PROFILE_ADV_START(&pVM->trpm.s.CTX_SUFF_Z(StatForwardProf), a);
367
368	# if defined(VBOX_STRICT) \|\| defined(LOG_ENABLED)
369	if (pRegFrame->eflags.Bits.u1VM)
370	Log(("TRPMForwardTrap-VM: eip=%04X:%04X iGate=%d\n", pRegFrame->cs, pRegFrame->eip, iGate));
371	else
372	Log(("TRPMForwardTrap: eip=%04X:%08X iGate=%d\n", pRegFrame->cs, pRegFrame->eip, iGate));
373
374	switch (iGate) {
375	case 14:
376	if (pRegFrame->eip == pVCpu->trpm.s.uActiveCR2)
377	{
378	int rc;
379	RTGCPTR pCallerGC;
380	# ifdef IN_RC
381	rc = MMGCRamRead(pVM, &pCallerGC, (void *)pRegFrame->esp, sizeof(pCallerGC));
382	# else
383	rc = PGMPhysSimpleReadGCPtr(pVCpu, &pCallerGC, (RTGCPTR)pRegFrame->esp, sizeof(pCallerGC));
384	# endif
385	if (RT_SUCCESS(rc))
386	Log(("TRPMForwardTrap: caller=%RGv\n", pCallerGC));
387	}
388	/* no break */
389	case 8:
390	case 10:
391	case 11:
392	case 12:
393	case 13:
394	case 17:
395	Assert(enmError == TRPM_TRAP_HAS_ERRORCODE \|\| enmType == TRPM_SOFTWARE_INT);
396	break;
397
398	default:
399	Assert(enmError == TRPM_TRAP_NO_ERRORCODE);
400	break;
401	}
402	# endif /* VBOX_STRICT \|\| LOG_ENABLED */
403
404	/* Retrieve the eflags including the virtualized bits. */
405	/* Note: hackish as the cpumctxcore structure doesn't contain the right value */
406	eflags.u32 = CPUMRawGetEFlags(pVCpu, pRegFrame);
407
408	/* VMCPU_FF_INHIBIT_INTERRUPTS should be cleared upfront or don't call this function at all for dispatching hardware interrupts. */
409	Assert(enmType != TRPM_HARDWARE_INT \|\| !VMCPU_FF_ISSET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS));
410
411	/*
412	* If it's a real guest trap and the guest's page fault handler is marked as safe for GC execution, then we call it directly.
413	* Well, only if the IF flag is set.
414	*/
415	/** @todo if the trap handler was modified and marked invalid, then we should now go back to the host context and install a new patch. */
416	if ( pVM->trpm.s.aGuestTrapHandler[iGate]
417	&& (eflags.Bits.u1IF)
418	#ifndef VBOX_RAW_V86
419	&& !(eflags.Bits.u1VM) /** @todo implement when needed (illegal for same privilege level transfers). */
420	#endif
421	&& !PATMIsPatchGCAddr(pVM, pRegFrame->eip)
422	)
423	{
424	uint16_t cbIDT;
425	RTGCPTR GCPtrIDT = (RTGCPTR)CPUMGetGuestIDTR(pVCpu, &cbIDT);
426	uint32_t cpl;
427	VBOXIDTE GuestIdte;
428	RTGCPTR pIDTEntry;
429	int rc;
430
431	Assert(PATMAreInterruptsEnabledByCtxCore(pVM, pRegFrame));
432	Assert(!VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT \| VMCPU_FF_TRPM_SYNC_IDT \| VMCPU_FF_SELM_SYNC_TSS));
433
434	if (GCPtrIDT && iGate * sizeof(VBOXIDTE) >= cbIDT)
435	goto failure;
436
437	/* Get the current privilege level. */
438	cpl = CPUMGetGuestCPL(pVCpu, pRegFrame);
439
440	/*
441	* BIG TODO: The checks are not complete. see trap and interrupt dispatching section in Intel docs for details
442	* All very obscure, but still necessary.
443	* Currently only some CS & TSS selector checks are missing.
444	*
445	*/
446	pIDTEntry = (RTGCPTR)((RTGCUINTPTR)GCPtrIDT + sizeof(VBOXIDTE) * iGate);
447	#ifdef IN_RC
448	rc = MMGCRamRead(pVM, &GuestIdte, (void *)(uintptr_t)pIDTEntry, sizeof(GuestIdte));
449	#else
450	rc = PGMPhysSimpleReadGCPtr(pVCpu, &GuestIdte, pIDTEntry, sizeof(GuestIdte));
451	#endif
452	if (RT_FAILURE(rc))
453	{
454	/* The page might be out of sync. / /* @todo might cross a page boundary) */
455	Log(("Page %RGv out of sync -> prefetch and try again\n", pIDTEntry));
456	rc = PGMPrefetchPage(pVCpu, pIDTEntry); /** @todo r=bird: rainy day: this isn't entirely safe because of access bit virtualiziation and CSAM. */
457	if (rc != VINF_SUCCESS)
458	{
459	Log(("TRPMForwardTrap: PGMPrefetchPage failed with rc=%Rrc\n", rc));
460	goto failure;
461	}
462	#ifdef IN_RC
463	rc = MMGCRamRead(pVM, &GuestIdte, (void *)(uintptr_t)pIDTEntry, sizeof(GuestIdte));
464	#else
465	rc = PGMPhysSimpleReadGCPtr(pVCpu, &GuestIdte, pIDTEntry, sizeof(GuestIdte));
466	#endif
467	}
468	if ( RT_SUCCESS(rc)
469	&& GuestIdte.Gen.u1Present
470	&& (GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32 \|\| GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_INT_32)
471	&& (GuestIdte.Gen.u2DPL == 3 \|\| GuestIdte.Gen.u2DPL == 0)
472	&& (GuestIdte.Gen.u16SegSel & 0xfffc) /* must not be zero */
473	&& (enmType == TRPM_TRAP \|\| enmType == TRPM_HARDWARE_INT \|\| cpl <= GuestIdte.Gen.u2DPL) /* CPL <= DPL if software int */
474	)
475	{
476	RTGCPTR pHandler, dummy;
477	RTGCPTR pTrapStackGC;
478
479	pHandler = (RTGCPTR)VBOXIDTE_OFFSET(GuestIdte);
480
481	/* Note: SELMValidateAndConvertCSAddr checks for code type, memory type, selector validity. */
482	/** @todo dpl <= cpl else GPF */
483
484	/* Note: don't use current eflags as we might be in V86 mode and the IDT always contains protected mode selectors */
485	X86EFLAGS fakeflags;
486	fakeflags.u32 = 0;
487
488	rc = SELMValidateAndConvertCSAddr(pVM, fakeflags, 0, GuestIdte.Gen.u16SegSel, NULL, pHandler, &dummy);
489	if (rc == VINF_SUCCESS)
490	{
491	VBOXGDTR gdtr = {0, 0};
492	bool fConforming = false;
493	int idx = 0;
494	uint32_t dpl;
495	uint32_t ss_r0;
496	uint32_t esp_r0;
497	X86DESC Desc;
498	RTGCPTR pGdtEntry;
499
500	CPUMGetGuestGDTR(pVCpu, &gdtr);
501	Assert(gdtr.pGdt && gdtr.cbGdt > GuestIdte.Gen.u16SegSel);
502
503	if (!gdtr.pGdt)
504	goto failure;
505
506	pGdtEntry = gdtr.pGdt + (GuestIdte.Gen.u16SegSel >> X86_SEL_SHIFT) * sizeof(X86DESC);
507	#ifdef IN_RC
508	rc = MMGCRamRead(pVM, &Desc, (void *)(uintptr_t)pGdtEntry, sizeof(Desc));
509	#else
510	rc = PGMPhysSimpleReadGCPtr(pVCpu, &Desc, pGdtEntry, sizeof(Desc));
511	#endif
512	if (RT_FAILURE(rc))
513	{
514	/* The page might be out of sync. / /* @todo might cross a page boundary) */
515	Log(("Page %RGv out of sync -> prefetch and try again\n", pGdtEntry));
516	rc = PGMPrefetchPage(pVCpu, pGdtEntry); /** @todo r=bird: rainy day: this isn't entirely safe because of access bit virtualiziation and CSAM. */
517	if (rc != VINF_SUCCESS)
518	{
519	Log(("PGMPrefetchPage failed with rc=%Rrc\n", rc));
520	goto failure;
521	}
522	#ifdef IN_RC
523	rc = MMGCRamRead(pVM, &Desc, (void *)(uintptr_t)pGdtEntry, sizeof(Desc));
524	#else
525	rc = PGMPhysSimpleReadGCPtr(pVCpu, &Desc, pGdtEntry, sizeof(Desc));
526	#endif
527	if (RT_FAILURE(rc))
528	{
529	Log(("MMGCRamRead failed with %Rrc\n", rc));
530	goto failure;
531	}
532	}
533
534	if (Desc.Gen.u4Type & X86_SEL_TYPE_CONF)
535	{
536	Log(("Conforming code selector\n"));
537	fConforming = true;
538	}
539	/** @todo check descriptor type!! */
540
541	dpl = Desc.Gen.u2Dpl;
542
543	if (!fConforming && dpl < cpl) /* to inner privilege level */
544	{
545	rc = SELMGetRing1Stack(pVM, &ss_r0, &esp_r0);
546	if (RT_FAILURE(rc))
547	goto failure;
548
549	Assert((ss_r0 & X86_SEL_RPL) == 1);
550
551	if ( !esp_r0
552	\|\| !ss_r0
553	\|\| (ss_r0 & X86_SEL_RPL) != ((dpl == 0) ? 1 : dpl)
554	\|\| SELMToFlatBySelEx(pVM, fakeflags, ss_r0, (RTGCPTR)esp_r0, NULL, SELMTOFLAT_FLAGS_CPL1, (PRTGCPTR)&pTrapStackGC, NULL) != VINF_SUCCESS
555	)
556	{
557	Log(("Invalid ring 0 stack %04X:%08RX32\n", ss_r0, esp_r0));
558	goto failure;
559	}
560	}
561	else
562	if (fConforming \|\| dpl == cpl) /* to the same privilege level */
563	{
564	ss_r0 = pRegFrame->ss;
565	esp_r0 = pRegFrame->esp;
566
567	if ( eflags.Bits.u1VM /* illegal */
568	\|\| SELMToFlatBySelEx(pVM, fakeflags, ss_r0, (RTGCPTR)esp_r0, NULL, SELMTOFLAT_FLAGS_CPL1, (PRTGCPTR)&pTrapStackGC, NULL) != VINF_SUCCESS)
569	{
570	AssertMsgFailed(("Invalid stack %04X:%08RX32??? (VM=%d)\n", ss_r0, esp_r0, eflags.Bits.u1VM));
571	goto failure;
572	}
573	}
574	else
575	{
576	Log(("Invalid cpl-dpl combo %d vs %d\n", cpl, dpl));
577	goto failure;
578	}
579	/*
580	* Build trap stack frame on guest handler's stack
581	*/
582	uint32_t *pTrapStack;
583	#ifdef IN_RC
584	Assert(eflags.Bits.u1VM \|\| (pRegFrame->ss & X86_SEL_RPL) != 0);
585	/* Check maximum amount we need (10 when executing in V86 mode) */
586	rc = PGMVerifyAccess(pVCpu, (RTGCUINTPTR)pTrapStackGC - 10sizeof(uint32_t), 10 sizeof(uint32_t), X86_PTE_RW);
587	pTrapStack = (uint32_t *)(uintptr_t)pTrapStackGC;
588	#else
589	Assert(eflags.Bits.u1VM \|\| (pRegFrame->ss & X86_SEL_RPL) == 0 \|\| (pRegFrame->ss & X86_SEL_RPL) == 3);
590	/* Check maximum amount we need (10 when executing in V86 mode) */
591	if ((pTrapStackGC >> PAGE_SHIFT) != ((pTrapStackGC - 10sizeof(uint32_t)) >> PAGE_SHIFT)) / fail if we cross a page boundary */
592	goto failure;
593	PGMPAGEMAPLOCK PageMappingLock;
594	rc = PGMPhysGCPtr2CCPtr(pVCpu, pTrapStackGC, (void **)&pTrapStack, &PageMappingLock);
595	if (RT_FAILURE(rc))
596	{
597	AssertRC(rc);
598	goto failure;
599	}
600	#endif
601	if (rc == VINF_SUCCESS)
602	{
603	/** if eflags.Bits.u1VM then push gs, fs, ds, es */
604	if (eflags.Bits.u1VM)
605	{
606	Log(("TRAP%02X: (VM) Handler %04X:%RGv Stack %04X:%08X RPL=%d CR2=%08X\n", iGate, GuestIdte.Gen.u16SegSel, pHandler, ss_r0, esp_r0, (pRegFrame->ss & X86_SEL_RPL), pVCpu->trpm.s.uActiveCR2));
607	pTrapStack[--idx] = pRegFrame->gs;
608	pTrapStack[--idx] = pRegFrame->fs;
609	pTrapStack[--idx] = pRegFrame->ds;
610	pTrapStack[--idx] = pRegFrame->es;
611
612	/* clear ds, es, fs & gs in current context */
613	pRegFrame->ds = pRegFrame->es = pRegFrame->fs = pRegFrame->gs = 0;
614	}
615	else
616	Log(("TRAP%02X: Handler %04X:%RGv Stack %04X:%08X RPL=%d CR2=%08X\n", iGate, GuestIdte.Gen.u16SegSel, pHandler, ss_r0, esp_r0, (pRegFrame->ss & X86_SEL_RPL), pVCpu->trpm.s.uActiveCR2));
617
618	if (!fConforming && dpl < cpl)
619	{
620	if ((pRegFrame->ss & X86_SEL_RPL) == 1 && !eflags.Bits.u1VM)
621	pTrapStack[--idx] = pRegFrame->ss & ~1; /* Mask away traces of raw ring execution (ring 1). */
622	else
623	pTrapStack[--idx] = pRegFrame->ss;
624
625	pTrapStack[--idx] = pRegFrame->esp;
626	}
627
628	/* Note: We use the eflags copy, that includes the virtualized bits! */
629	/* Note: Not really necessary as we grab include those bits in the trap/irq handler trampoline */
630	pTrapStack[--idx] = eflags.u32;
631
632	if ((pRegFrame->cs & X86_SEL_RPL) == 1 && !eflags.Bits.u1VM)
633	pTrapStack[--idx] = pRegFrame->cs & ~1; /* Mask away traces of raw ring execution (ring 1). */
634	else
635	pTrapStack[--idx] = pRegFrame->cs;
636
637	if (enmType == TRPM_SOFTWARE_INT)
638	{
639	Assert(opsize);
640	pTrapStack[--idx] = pRegFrame->eip + opsize; /* return address = next instruction */
641	}
642	else
643	pTrapStack[--idx] = pRegFrame->eip;
644
645	if (enmError == TRPM_TRAP_HAS_ERRORCODE)
646	{
647	pTrapStack[--idx] = pVCpu->trpm.s.uActiveErrorCode;
648	}
649
650	Assert(esp_r0 > -idx*sizeof(uint32_t));
651	/* Adjust ESP accordingly */
652	esp_r0 += idx*sizeof(uint32_t);
653
654	/* Mask away dangerous flags for the trap/interrupt handler. */
655	eflags.u32 &= ~(X86_EFL_TF \| X86_EFL_VM \| X86_EFL_RF \| X86_EFL_NT);
656	#ifdef DEBUG
657	for (int j = idx; j < 0; j++)
658	Log4(("Stack %RRv pos %02d: %08x\n", &pTrapStack[j], j, pTrapStack[j]));
659
660	Log4(("eax=%08x ebx=%08x ecx=%08x edx=%08x esi=%08x edi=%08x\n"
661	"eip=%08x esp=%08x ebp=%08x iopl=%d\n"
662	"cs=%04x ds=%04x es=%04x fs=%04x gs=%04x eflags=%08x\n",
663	pRegFrame->eax, pRegFrame->ebx, pRegFrame->ecx, pRegFrame->edx, pRegFrame->esi, pRegFrame->edi,
664	pRegFrame->eip, pRegFrame->esp, pRegFrame->ebp, eflags.Bits.u2IOPL,
665	(RTSEL)pRegFrame->cs, (RTSEL)pRegFrame->ds, (RTSEL)pRegFrame->es,
666	(RTSEL)pRegFrame->fs, (RTSEL)pRegFrame->gs, eflags.u32));
667	#endif
668
669	Log(("PATM Handler %RRv Adjusted stack %08X new EFLAGS=%08X idx=%d dpl=%d cpl=%d\n", pVM->trpm.s.aGuestTrapHandler[iGate], esp_r0, eflags.u32, idx, dpl, cpl));
670
671	/* Make sure the internal guest context structure is up-to-date. */
672	CPUMSetGuestCR2(pVCpu, pVCpu->trpm.s.uActiveCR2);
673
674	#ifdef IN_RC
675	/* Note: shouldn't be necessary */
676	ASMSetCR2(pVCpu->trpm.s.uActiveCR2);
677
678	/* Turn off interrupts for interrupt gates. */
679	if (GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_INT_32)
680	CPUMRawSetEFlags(pVCpu, pRegFrame, eflags.u32 & ~X86_EFL_IF);
681
682	/* The virtualized bits must be removed again!! */
683	eflags.Bits.u1IF = 1;
684	eflags.Bits.u2IOPL = 0;
685
686	Assert(eflags.Bits.u1IF);
687	Assert(eflags.Bits.u2IOPL == 0);
688	STAM_COUNTER_INC(&pVM->trpm.s.CTX_SUFF(paStatForwardedIRQ)[iGate]);
689	STAM_PROFILE_ADV_STOP(&pVM->trpm.s.CTX_SUFF_Z(StatForwardProf), a);
690	if (iOrgTrap >= 0 && iOrgTrap < (int)RT_ELEMENTS(pVM->trpm.s.aStatGCTraps))
691	STAM_PROFILE_ADV_STOP(&pVM->trpm.s.aStatGCTraps[iOrgTrap], o);
692
693	CPUMGCCallGuestTrapHandler(pRegFrame, GuestIdte.Gen.u16SegSel \| 1, pVM->trpm.s.aGuestTrapHandler[iGate], eflags.u32, ss_r0, (RTRCPTR)esp_r0);
694	/* does not return */
695	#else
696	/* Turn off interrupts for interrupt gates. */
697	if (GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_INT_32)
698	eflags.Bits.u1IF = 0;
699
700	pRegFrame->eflags.u32 = eflags.u32;
701
702	pRegFrame->eip = pVM->trpm.s.aGuestTrapHandler[iGate];
703	pRegFrame->cs = GuestIdte.Gen.u16SegSel;
704	pRegFrame->esp = esp_r0;
705	pRegFrame->ss = ss_r0 & ~X86_SEL_RPL; /* set rpl to ring 0 */
706	STAM_PROFILE_ADV_STOP(&pVM->trpm.s.CTX_SUFF_Z(StatForwardProf), a);
707	PGMPhysReleasePageMappingLock(pVM, &PageMappingLock);
708	return VINF_SUCCESS;
709	#endif
710	}
711	else
712	Log(("TRAP%02X: PGMVerifyAccess %RGv failed with %Rrc -> forward to REM\n", iGate, pTrapStackGC, rc));
713	}
714	else
715	Log(("SELMValidateAndConvertCSAddr failed with %Rrc\n", rc));
716	}
717	else
718	Log(("MMRamRead %RGv size %d failed with %Rrc\n", (RTGCUINTPTR)GCPtrIDT + sizeof(VBOXIDTE) * iGate, sizeof(GuestIdte), rc));
719	}
720	else
721	{
722	Log(("Refused to forward trap: eflags=%08x IF=%d\n", eflags.u32, eflags.Bits.u1IF));
723	#ifdef VBOX_WITH_STATISTICS
724	if (pVM->trpm.s.aGuestTrapHandler[iGate] == TRPM_INVALID_HANDLER)
725	STAM_COUNTER_INC(&pVM->trpm.s.StatForwardFailNoHandler);
726	else if (PATMIsPatchGCAddr(pVM, pRegFrame->eip))
727	STAM_COUNTER_INC(&pVM->trpm.s.StatForwardFailPatchAddr);
728	#endif
729	}
730	failure:
731	STAM_COUNTER_INC(&pVM->trpm.s.CTX_SUFF_Z(StatForwardFail));
732	STAM_PROFILE_ADV_STOP(&pVM->trpm.s.CTX_SUFF_Z(StatForwardProf), a);
733
734	Log(("TRAP%02X: forwarding to REM (ss rpl=%d eflags=%08X VMIF=%d handler=%08X\n", iGate, pRegFrame->ss & X86_SEL_RPL, pRegFrame->eflags.u32, PATMAreInterruptsEnabledByCtxCore(pVM, pRegFrame), pVM->trpm.s.aGuestTrapHandler[iGate]));
735	#endif
736	return VINF_EM_RAW_GUEST_TRAP;
737	}
738	#endif /* !IN_RING0 */
739
740
741	/**
742	* Raises a cpu exception which doesn't take an error code.
743	*
744	* This function may or may not dispatch the exception before returning.
745	*
746	* @returns VBox status code fit for scheduling.
747	* @retval VINF_EM_RAW_GUEST_TRAP if the exception was left pending.
748	* @retval VINF_TRPM_XCPT_DISPATCHED if the exception was raised and dispatched for raw-mode execution.
749	* @retval VINF_EM_RESCHEDULE_REM if the exception was dispatched and cannot be executed in raw-mode.
750	*
751	* @param pVM The VM handle.
752	* @param pCtxCore The CPU context core.
753	* @param enmXcpt The exception.
754	*/
755	VMMDECL(int) TRPMRaiseXcpt(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, X86XCPT enmXcpt)
756	{
757	LogFlow(("TRPMRaiseXcptErr: cs:eip=%RTsel:%RX32 enmXcpt=%#x\n", pCtxCore->cs, pCtxCore->eip, enmXcpt));
758	/** @todo dispatch the trap. */
759	pVCpu->trpm.s.uActiveVector = enmXcpt;
760	pVCpu->trpm.s.enmActiveType = TRPM_TRAP;
761	pVCpu->trpm.s.uActiveErrorCode = 0xdeadbeef;
762	pVCpu->trpm.s.uActiveCR2 = 0xdeadface;
763	return VINF_EM_RAW_GUEST_TRAP;
764	}
765
766
767	/**
768	* Raises a cpu exception with an errorcode.
769	*
770	* This function may or may not dispatch the exception before returning.
771	*
772	* @returns VBox status code fit for scheduling.
773	* @retval VINF_EM_RAW_GUEST_TRAP if the exception was left pending.
774	* @retval VINF_TRPM_XCPT_DISPATCHED if the exception was raised and dispatched for raw-mode execution.
775	* @retval VINF_EM_RESCHEDULE_REM if the exception was dispatched and cannot be executed in raw-mode.
776	*
777	* @param pVM The VM handle.
778	* @param pCtxCore The CPU context core.
779	* @param enmXcpt The exception.
780	* @param uErr The error code.
781	*/
782	VMMDECL(int) TRPMRaiseXcptErr(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, X86XCPT enmXcpt, uint32_t uErr)
783	{
784	LogFlow(("TRPMRaiseXcptErr: cs:eip=%RTsel:%RX32 enmXcpt=%#x uErr=%RX32\n", pCtxCore->cs, pCtxCore->eip, enmXcpt, uErr));
785	/** @todo dispatch the trap. */
786	pVCpu->trpm.s.uActiveVector = enmXcpt;
787	pVCpu->trpm.s.enmActiveType = TRPM_TRAP;
788	pVCpu->trpm.s.uActiveErrorCode = uErr;
789	pVCpu->trpm.s.uActiveCR2 = 0xdeadface;
790	return VINF_EM_RAW_GUEST_TRAP;
791	}
792
793
794	/**
795	* Raises a cpu exception with an errorcode and CR2.
796	*
797	* This function may or may not dispatch the exception before returning.
798	*
799	* @returns VBox status code fit for scheduling.
800	* @retval VINF_EM_RAW_GUEST_TRAP if the exception was left pending.
801	* @retval VINF_TRPM_XCPT_DISPATCHED if the exception was raised and dispatched for raw-mode execution.
802	* @retval VINF_EM_RESCHEDULE_REM if the exception was dispatched and cannot be executed in raw-mode.
803	*
804	* @param pVM The VM handle.
805	* @param pCtxCore The CPU context core.
806	* @param enmXcpt The exception.
807	* @param uErr The error code.
808	* @param uCR2 The CR2 value.
809	*/
810	VMMDECL(int) TRPMRaiseXcptErrCR2(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, X86XCPT enmXcpt, uint32_t uErr, RTGCUINTPTR uCR2)
811	{
812	LogFlow(("TRPMRaiseXcptErr: cs:eip=%RTsel:%RX32 enmXcpt=%#x uErr=%RX32 uCR2=%RGv\n", pCtxCore->cs, pCtxCore->eip, enmXcpt, uErr, uCR2));
813	/** @todo dispatch the trap. */
814	pVCpu->trpm.s.uActiveVector = enmXcpt;
815	pVCpu->trpm.s.enmActiveType = TRPM_TRAP;
816	pVCpu->trpm.s.uActiveErrorCode = uErr;
817	pVCpu->trpm.s.uActiveCR2 = uCR2;
818	return VINF_EM_RAW_GUEST_TRAP;
819	}
820
821
822	/**
823	* Clear guest trap/interrupt gate handler
824	*
825	* @returns VBox status code.
826	* @param pVM The VM to operate on.
827	* @param iTrap Interrupt/trap number.
828	*/
829	VMMDECL(int) trpmClearGuestTrapHandler(PVM pVM, unsigned iTrap)
830	{
831	/*
832	* Validate.
833	*/
834	if (iTrap >= RT_ELEMENTS(pVM->trpm.s.aIdt))
835	{
836	AssertMsg(iTrap < TRPM_HANDLER_INT_BASE, ("Illegal gate number %d!\n", iTrap));
837	return VERR_INVALID_PARAMETER;
838	}
839
840	if (ASMBitTest(&pVM->trpm.s.au32IdtPatched[0], iTrap))
841	#ifdef IN_RING3
842	trpmR3ClearPassThroughHandler(pVM, iTrap);
843	#else
844	AssertFailed();
845	#endif
846
847	pVM->trpm.s.aGuestTrapHandler[iTrap] = TRPM_INVALID_HANDLER;
848	return VINF_SUCCESS;
849	}
850

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source: vbox/trunk/src/VBox/VMM/VMMAll/TRPMAll.cpp@ 28875

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