| 1 | ; $Id: CPUMGCA.asm 19 2007-01-15 13:07:05Z vboxsync $
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| 2 | ;; @file
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| 3 | ;
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| 4 | ; CPUM - Guest Context Assembly Routines.
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| 5 |
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| 6 | ; Copyright (C) 2006 InnoTek Systemberatung GmbH
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| 7 | ;
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| 8 | ; This file is part of VirtualBox Open Source Edition (OSE), as
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| 9 | ; available from http://www.virtualbox.org. This file is free software;
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| 10 | ; you can redistribute it and/or modify it under the terms of the GNU
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| 11 | ; General Public License as published by the Free Software Foundation,
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| 12 | ; in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
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| 13 | ; distribution. VirtualBox OSE is distributed in the hope that it will
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| 14 | ; be useful, but WITHOUT ANY WARRANTY of any kind.
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| 15 | ;
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| 16 | ; If you received this file as part of a commercial VirtualBox
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| 17 | ; distribution, then only the terms of your commercial VirtualBox
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| 18 | ; license agreement apply instead of the previous paragraph.
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| 19 |
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| 20 | ;*******************************************************************************
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| 21 | ;* Header Files *
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| 22 | ;*******************************************************************************
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| 23 | %include "VMMGC.mac"
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| 24 | %include "VBox/vm.mac"
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| 25 | %include "VBox/err.mac"
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| 26 | %include "VBox/stam.mac"
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| 27 | %include "CPUMInternal.mac"
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| 28 | %include "VBox/x86.mac"
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| 29 | %include "VBox/cpum.mac"
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| 30 |
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| 31 |
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| 32 | ;*******************************************************************************
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| 33 | ;* External Symbols *
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| 34 | ;*******************************************************************************
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| 35 | extern IMPNAME(g_CPUM) ; VMM GC Builtin import
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| 36 | extern IMPNAME(g_VM) ; VMM GC Builtin import
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| 37 | extern NAME(cpumGCHandleNPAndGP) ; CPUMGC.cpp
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| 38 |
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| 39 | ;
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| 40 | ; Enables write protection of Hypervisor memory pages.
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| 41 | ; !note! Must be commented out for Trap8 debug handler.
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| 42 | ;
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| 43 | %define ENABLE_WRITE_PROTECTION 1
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| 44 |
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| 45 | BEGINCODE
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| 46 |
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| 47 |
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| 48 | ;;
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| 49 | ; Restores GC context before doing iret.
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| 50 | ;
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| 51 | ; @param [esp + 4] Pointer to interrupt stack frame, i.e. pointer
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| 52 | ; to the a struct with this layout:
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| 53 | ; 00h eip
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| 54 | ; 04h cs
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| 55 | ; 08h eflags
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| 56 | ; 0ch esp
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| 57 | ; 10h ss
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| 58 | ; 14h es (V86 only)
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| 59 | ; 18h ds (V86 only)
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| 60 | ; 1Ch fs (V86 only)
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| 61 | ; 20h gs (V86 only)
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| 62 | ;
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| 63 | ; @uses everything but cs, ss, esp, and eflags.
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| 64 | ;
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| 65 | ; @remark Assumes we're restoring in Ring-0 a context which is not Ring-0.
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| 66 | ; Further assumes flat stack and valid ds.
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| 67 |
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| 68 | BEGINPROC CPUMGCRestoreInt
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| 69 | ;
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| 70 | ; Update iret frame.
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| 71 | ;
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| 72 | mov eax, [esp + 4] ; get argument
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| 73 | mov edx, IMP(g_CPUM)
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| 74 |
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| 75 | mov ecx, [edx + CPUM.Guest.eip]
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| 76 | mov [eax + 0h], ecx
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| 77 | mov ecx, [edx + CPUM.Guest.cs]
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| 78 | mov [eax + 4h], ecx
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| 79 | mov ecx, [edx + CPUM.Guest.eflags]
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| 80 | mov [eax + 8h], ecx
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| 81 | mov ecx, [edx + CPUM.Guest.esp]
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| 82 | mov [eax + 0ch], ecx
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| 83 | mov ecx, [edx + CPUM.Guest.ss]
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| 84 | mov [eax + 10h], ecx
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| 85 |
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| 86 | test dword [edx + CPUM.Guest.eflags], X86_EFL_VM
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| 87 | jnz short CPUMGCRestoreInt_V86
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| 88 |
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| 89 | ;
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| 90 | ; Load registers.
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| 91 | ;
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| 92 | ; todo: potential trouble loading invalid es,fs,gs,ds because
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| 93 | ; of a VMM imposed exception?
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| 94 | mov es, [edx + CPUM.Guest.es]
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| 95 | mov fs, [edx + CPUM.Guest.fs]
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| 96 | mov gs, [edx + CPUM.Guest.gs]
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| 97 | mov esi, [edx + CPUM.Guest.esi]
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| 98 | mov edi, [edx + CPUM.Guest.edi]
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| 99 | mov ebp, [edx + CPUM.Guest.ebp]
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| 100 | mov ebx, [edx + CPUM.Guest.ebx]
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| 101 | mov ecx, [edx + CPUM.Guest.ecx]
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| 102 | mov eax, [edx + CPUM.Guest.eax]
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| 103 | push dword [edx + CPUM.Guest.ds]
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| 104 | mov edx, [edx + CPUM.Guest.edx]
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| 105 | pop ds
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| 106 |
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| 107 | ret
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| 108 |
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| 109 | CPUMGCRestoreInt_V86:
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| 110 | ; iret restores ds, es, fs & gs
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| 111 | mov ecx, [edx + CPUM.Guest.es]
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| 112 | mov [eax + 14h], ecx
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| 113 | mov ecx, [edx + CPUM.Guest.ds]
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| 114 | mov [eax + 18h], ecx
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| 115 | mov ecx, [edx + CPUM.Guest.fs]
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| 116 | mov [eax + 1Ch], ecx
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| 117 | mov ecx, [edx + CPUM.Guest.gs]
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| 118 | mov [eax + 20h], ecx
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| 119 | mov esi, [edx + CPUM.Guest.esi]
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| 120 | mov edi, [edx + CPUM.Guest.edi]
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| 121 | mov ebp, [edx + CPUM.Guest.ebp]
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| 122 | mov ebx, [edx + CPUM.Guest.ebx]
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| 123 | mov ecx, [edx + CPUM.Guest.ecx]
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| 124 | mov eax, [edx + CPUM.Guest.eax]
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| 125 | mov edx, [edx + CPUM.Guest.edx]
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| 126 | ret
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| 127 |
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| 128 | ENDPROC CPUMGCRestoreInt
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| 129 |
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| 130 |
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| 131 | ;;
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| 132 | ; Calls a guest trap/interrupt handler directly
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| 133 | ; Assumes a trap stack frame has already been setup on the guest's stack!
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| 134 | ;
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| 135 | ; @param pRegFrame [esp + 4] Original trap/interrupt context
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| 136 | ; @param selCS [esp + 8] Code selector of handler
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| 137 | ; @param pHandler [esp + 12] GC virtual address of handler
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| 138 | ; @param eflags [esp + 16] Callee's EFLAGS
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| 139 | ; @param selSS [esp + 20] Stack selector for handler
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| 140 | ; @param pEsp [esp + 24] Stack address for handler
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| 141 | ;
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| 142 | ; @remark This call never returns!
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| 143 | ;
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| 144 | ; CPUMGCDECL(void) CPUMGCCallGuestTrapHandler(PCPUMCTXCORE pRegFrame, uint32_t selCS, RTGCPTR pHandler, uint32_t eflags, uint32_t selSS, RTGCPTR pEsp);
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| 145 | align 16
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| 146 | BEGINPROC_EXPORTED CPUMGCCallGuestTrapHandler
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| 147 | mov ebp, esp
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| 148 |
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| 149 | ; construct iret stack frame
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| 150 | push dword [ebp + 20] ; SS
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| 151 | push dword [ebp + 24] ; ESP
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| 152 | push dword [ebp + 16] ; EFLAGS
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| 153 | push dword [ebp + 8] ; CS
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| 154 | push dword [ebp + 12] ; EIP
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| 155 |
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| 156 | ;
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| 157 | ; enable WP
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| 158 | ;
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| 159 | %ifdef ENABLE_WRITE_PROTECTION
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| 160 | mov eax, cr0
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| 161 | or eax, X86_CR0_WRITE_PROTECT
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| 162 | mov cr0, eax
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| 163 | %endif
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| 164 |
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| 165 | ; restore CPU context (all except cs, eip, ss, esp & eflags; which are restored or overwritten by iret)
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| 166 | mov ebp, [ebp + 4] ; pRegFrame
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| 167 | mov ebx, [ebp + CPUMCTXCORE.ebx]
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| 168 | mov ecx, [ebp + CPUMCTXCORE.ecx]
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| 169 | mov edx, [ebp + CPUMCTXCORE.edx]
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| 170 | mov esi, [ebp + CPUMCTXCORE.esi]
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| 171 | mov edi, [ebp + CPUMCTXCORE.edi]
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| 172 |
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| 173 | ;; @todo load segment registers *before* enabling WP.
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| 174 | TRPM_NP_GP_HANDLER NAME(cpumGCHandleNPAndGP), CPUM_HANDLER_GS | CPUM_HANDLER_CORECTX_IN_EBP
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| 175 | mov gs, [ebp + CPUMCTXCORE.gs]
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| 176 | TRPM_NP_GP_HANDLER NAME(cpumGCHandleNPAndGP), CPUM_HANDLER_FS | CPUM_HANDLER_CORECTX_IN_EBP
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| 177 | mov fs, [ebp + CPUMCTXCORE.fs]
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| 178 | TRPM_NP_GP_HANDLER NAME(cpumGCHandleNPAndGP), CPUM_HANDLER_ES | CPUM_HANDLER_CORECTX_IN_EBP
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| 179 | mov es, [ebp + CPUMCTXCORE.es]
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| 180 | TRPM_NP_GP_HANDLER NAME(cpumGCHandleNPAndGP), CPUM_HANDLER_DS | CPUM_HANDLER_CORECTX_IN_EBP
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| 181 | mov ds, [ebp + CPUMCTXCORE.ds]
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| 182 |
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| 183 | mov eax, [ebp + CPUMCTXCORE.eax]
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| 184 | mov ebp, [ebp + CPUMCTXCORE.ebp]
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| 185 |
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| 186 | TRPM_NP_GP_HANDLER NAME(cpumGCHandleNPAndGP), CPUM_HANDLER_IRET
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| 187 | iret
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| 188 |
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| 189 | ENDPROC CPUMGCCallGuestTrapHandler
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| 190 |
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| 191 |
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| 192 | ;;
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| 193 | ; This is a main entry point for resuming (or starting) guest
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| 194 | ; code execution.
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| 195 | ;
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| 196 | ; We get here directly from VMMSwitcher.asm (jmp at the end
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| 197 | ; of VMMSwitcher_HostToGuest).
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| 198 | ;
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| 199 | ; This call never returns!
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| 200 | ;
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| 201 | ; @param edx Pointer to CPUM structure.
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| 202 | ;
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| 203 | align 16
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| 204 | BEGINPROC_EXPORTED CPUMGCResumeGuest
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| 205 | ;
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| 206 | ; Setup iretd
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| 207 | ;
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| 208 | push dword [edx + CPUM.Guest.ss]
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| 209 | push dword [edx + CPUM.Guest.esp]
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| 210 | push dword [edx + CPUM.Guest.eflags]
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| 211 | push dword [edx + CPUM.Guest.cs]
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| 212 | push dword [edx + CPUM.Guest.eip]
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| 213 |
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| 214 | ;
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| 215 | ; Restore registers.
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| 216 | ;
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| 217 | TRPM_NP_GP_HANDLER NAME(cpumGCHandleNPAndGP), CPUM_HANDLER_ES
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| 218 | mov es, [edx + CPUM.Guest.es]
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| 219 | TRPM_NP_GP_HANDLER NAME(cpumGCHandleNPAndGP), CPUM_HANDLER_FS
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| 220 | mov fs, [edx + CPUM.Guest.fs]
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| 221 | TRPM_NP_GP_HANDLER NAME(cpumGCHandleNPAndGP), CPUM_HANDLER_GS
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| 222 | mov gs, [edx + CPUM.Guest.gs]
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| 223 |
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| 224 | %ifdef VBOX_WITH_STATISTICS
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| 225 | ;
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| 226 | ; Statistics.
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| 227 | ;
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| 228 | push edx
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| 229 | mov edx, IMP(g_VM)
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| 230 | lea edx, [edx + VM.StatTotalQemuToGC]
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| 231 | STAM_PROFILE_ADV_STOP edx
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| 232 |
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| 233 | mov edx, IMP(g_VM)
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| 234 | lea edx, [edx + VM.StatTotalInGC]
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| 235 | STAM_PROFILE_ADV_START edx
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| 236 | pop edx
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| 237 | %endif
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| 238 |
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| 239 | ;
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| 240 | ; enable WP
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| 241 | ;
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| 242 | %ifdef ENABLE_WRITE_PROTECTION
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| 243 | mov eax, cr0
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| 244 | or eax, X86_CR0_WRITE_PROTECT
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| 245 | mov cr0, eax
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| 246 | %endif
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| 247 |
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| 248 | ;
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| 249 | ; Continue restore.
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| 250 | ;
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| 251 | mov esi, [edx + CPUM.Guest.esi]
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| 252 | mov edi, [edx + CPUM.Guest.edi]
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| 253 | mov ebp, [edx + CPUM.Guest.ebp]
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| 254 | mov ebx, [edx + CPUM.Guest.ebx]
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| 255 | mov ecx, [edx + CPUM.Guest.ecx]
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| 256 | mov eax, [edx + CPUM.Guest.eax]
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| 257 | push dword [edx + CPUM.Guest.ds]
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| 258 | mov edx, [edx + CPUM.Guest.edx]
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| 259 | TRPM_NP_GP_HANDLER NAME(cpumGCHandleNPAndGP), CPUM_HANDLER_DS
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| 260 | pop ds
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| 261 |
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| 262 | ; restart execution.
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| 263 | TRPM_NP_GP_HANDLER NAME(cpumGCHandleNPAndGP), CPUM_HANDLER_IRET
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| 264 | iretd
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| 265 | ENDPROC CPUMGCResumeGuest
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| 266 |
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| 267 |
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| 268 | ;;
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| 269 | ; This is a main entry point for resuming (or starting) guest
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| 270 | ; code execution for raw V86 mode
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| 271 | ;
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| 272 | ; We get here directly from VMMSwitcher.asm (jmp at the end
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| 273 | ; of VMMSwitcher_HostToGuest).
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| 274 | ;
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| 275 | ; This call never returns!
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| 276 | ;
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| 277 | ; @param edx Pointer to CPUM structure.
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| 278 | ;
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| 279 | align 16
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| 280 | BEGINPROC_EXPORTED CPUMGCResumeGuestV86
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| 281 | ;
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| 282 | ; Setup iretd
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| 283 | ;
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| 284 | push dword [edx + CPUM.Guest.gs]
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| 285 | push dword [edx + CPUM.Guest.fs]
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| 286 | push dword [edx + CPUM.Guest.ds]
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| 287 | push dword [edx + CPUM.Guest.es]
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| 288 |
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| 289 | push dword [edx + CPUM.Guest.ss]
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| 290 | push dword [edx + CPUM.Guest.esp]
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| 291 |
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| 292 | push dword [edx + CPUM.Guest.eflags]
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| 293 | push dword [edx + CPUM.Guest.cs]
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| 294 | push dword [edx + CPUM.Guest.eip]
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| 295 |
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| 296 | ;
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| 297 | ; Restore registers.
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| 298 | ;
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| 299 |
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| 300 | %ifdef VBOX_WITH_STATISTICS
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| 301 | ;
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| 302 | ; Statistics.
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| 303 | ;
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| 304 | push edx
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| 305 | mov edx, IMP(g_VM)
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| 306 | lea edx, [edx + VM.StatTotalQemuToGC]
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| 307 | STAM_PROFILE_ADV_STOP edx
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| 308 |
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| 309 | mov edx, IMP(g_VM)
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| 310 | lea edx, [edx + VM.StatTotalInGC]
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| 311 | STAM_PROFILE_ADV_START edx
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| 312 | pop edx
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| 313 | %endif
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| 314 |
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| 315 | ;
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| 316 | ; enable WP
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| 317 | ;
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| 318 | %ifdef ENABLE_WRITE_PROTECTION
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| 319 | mov eax, cr0
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| 320 | or eax, X86_CR0_WRITE_PROTECT
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| 321 | mov cr0, eax
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| 322 | %endif
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| 323 |
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| 324 | ;
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| 325 | ; Continue restore.
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| 326 | ;
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| 327 | mov esi, [edx + CPUM.Guest.esi]
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| 328 | mov edi, [edx + CPUM.Guest.edi]
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| 329 | mov ebp, [edx + CPUM.Guest.ebp]
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| 330 | mov ecx, [edx + CPUM.Guest.ecx]
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| 331 | mov ebx, [edx + CPUM.Guest.ebx]
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| 332 | mov eax, [edx + CPUM.Guest.eax]
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| 333 | mov edx, [edx + CPUM.Guest.edx]
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| 334 |
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| 335 | ; restart execution.
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| 336 | TRPM_NP_GP_HANDLER NAME(cpumGCHandleNPAndGP), CPUM_HANDLER_IRET
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| 337 | iretd
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| 338 | ENDPROC CPUMGCResumeGuestV86
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| 339 |
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| 340 |
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| 341 | ;;
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| 342 | ; Set the Guest CPU CR2 register.
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| 343 | ;
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| 344 | ; @param eax cr2
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| 345 | ; @uses edx
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| 346 | ;
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| 347 | align 16
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| 348 | BEGINPROC CPUMGCSetGuestCR2Asm
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| 349 | mov edx, IMP(g_CPUM)
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| 350 | mov [edx + CPUM.Guest.cr2], eax
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| 351 | ret
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| 352 | ENDPROC CPUMGCSetGuestCR2Asm
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| 353 |
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| 354 |
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| 355 | ;;
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| 356 | ; Get the Guest CPU CR0 register.
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| 357 | ;
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| 358 | ; @returns cr0 in eax
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| 359 | ; @uses eax
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| 360 | ;
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| 361 | align 16
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| 362 | BEGINPROC CPUMGCGetGuestCR0
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| 363 | mov eax, IMP(g_CPUM)
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| 364 | mov eax, [eax + CPUM.Guest.cr0]
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| 365 | ret
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| 366 | ENDPROC CPUMGCGetGuestCR0
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| 367 |
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| 368 |
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| 369 |
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