| 1 | ; $Id: HWACCMGCA.asm 15576 2008-12-16 12:01:10Z vboxsync $
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| 2 | ;; @file
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| 3 | ; VMXM - GC vmx helpers
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| 4 | ;
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| 5 |
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| 6 | ;
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| 7 | ; Copyright (C) 2006-2007 Sun Microsystems, Inc.
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| 8 | ;
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| 9 | ; This file is part of VirtualBox Open Source Edition (OSE), as
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| 10 | ; available from http://www.virtualbox.org. This file is free software;
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| 11 | ; you can redistribute it and/or modify it under the terms of the GNU
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| 12 | ; General Public License (GPL) as published by the Free Software
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| 13 | ; Foundation, in version 2 as it comes in the "COPYING" file of the
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| 14 | ; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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| 15 | ; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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| 16 | ;
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| 17 | ; Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
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| 18 | ; Clara, CA 95054 USA or visit http://www.sun.com if you need
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| 19 | ; additional information or have any questions.
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| 20 | ;
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| 21 |
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| 22 | ;*******************************************************************************
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| 23 | ;* Header Files *
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| 24 | ;*******************************************************************************
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| 25 | %undef RT_ARCH_X86
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| 26 | %define RT_ARCH_AMD64
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| 27 | %include "VBox/asmdefs.mac"
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| 28 | %include "VBox/err.mac"
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| 29 | %include "VBox/hwacc_vmx.mac"
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| 30 | %include "VBox/cpum.mac"
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| 31 | %include "VBox/x86.mac"
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| 32 | %include "../HWACCMInternal.mac"
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| 33 |
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| 34 | %ifdef RT_OS_OS2 ;; @todo fix OMF support in yasm and kick nasm out completely.
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| 35 | %macro vmwrite 2,
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| 36 | int3
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| 37 | %endmacro
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| 38 | %define vmlaunch int3
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| 39 | %define vmresume int3
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| 40 | %define vmsave int3
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| 41 | %define vmload int3
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| 42 | %define vmrun int3
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| 43 | %define clgi int3
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| 44 | %define stgi int3
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| 45 | %macro invlpga 2,
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| 46 | int3
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| 47 | %endmacro
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| 48 | %endif
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| 49 |
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| 50 | ;; @def MYPUSHSEGS
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| 51 | ; Macro saving all segment registers on the stack.
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| 52 | ; @param 1 full width register name
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| 53 |
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| 54 | ;; @def MYPOPSEGS
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| 55 | ; Macro restoring all segment registers on the stack
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| 56 | ; @param 1 full width register name
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| 57 |
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| 58 | ; Load the corresponding guest MSR (trashes rdx & rcx)
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| 59 | %macro LOADGUESTMSR 2
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| 60 | mov rcx, %1
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| 61 | mov edx, dword [rsi + %2 + 4]
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| 62 | mov eax, dword [rsi + %2]
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| 63 | wrmsr
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| 64 | %endmacro
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| 65 |
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| 66 | ; Save a guest MSR (trashes rdx & rcx)
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| 67 | ; Only really useful for gs kernel base as that one can be changed behind our back (swapgs)
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| 68 | %macro SAVEGUESTMSR 2
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| 69 | mov rcx, %1
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| 70 | rdmsr
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| 71 | mov dword [rsi + %2], eax
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| 72 | mov dword [rsi + %2 + 4], edx
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| 73 | %endmacro
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| 74 |
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| 75 | %macro MYPUSHSEGS 1
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| 76 | mov %1, es
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| 77 | push %1
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| 78 | mov %1, ds
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| 79 | push %1
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| 80 | %endmacro
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| 81 |
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| 82 | %macro MYPOPSEGS 1
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| 83 | pop %1
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| 84 | mov ds, %1
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| 85 | pop %1
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| 86 | mov es, %1
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| 87 | %endmacro
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| 88 |
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| 89 | BEGINCODE
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| 90 | BITS 64
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| 91 |
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| 92 |
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| 93 | ;/**
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| 94 | ; * Prepares for and executes VMLAUNCH/VMRESUME (64 bits guest mode)
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| 95 | ; *
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| 96 | ; * @returns VBox status code
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| 97 | ; * @param pPageCpuPhys VMXON physical address [rsp+8]
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| 98 | ; * @param pVMCSPhys VMCS physical address [rsp+16]
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| 99 | ; * @param pCache VMCS cache [rsp+24]
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| 100 | ; * @param pCtx Guest context (rsi)
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| 101 | ; */
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| 102 | BEGINPROC VMXGCStartVM64
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| 103 | push rbp
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| 104 | mov rbp, rsp
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| 105 |
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| 106 | ; Make sure VT-x instructions are allowed
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| 107 | mov rax, cr4
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| 108 | or rax, X86_CR4_VMXE
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| 109 | mov cr4, rax
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| 110 |
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| 111 | ;/* Enter VMX Root Mode */
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| 112 | vmxon [rbp + 8 + 8]
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| 113 | jnc .vmxon_success
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| 114 | mov rax, VERR_VMX_INVALID_VMXON_PTR
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| 115 | jmp .vmstart64_vmxon_failed
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| 116 |
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| 117 | .vmxon_success:
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| 118 | ; Activate the VMCS pointer
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| 119 | vmptrld [rbp + 16 + 8]
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| 120 | jnc .vmptrld_success
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| 121 | mov rax, VERR_VMX_INVALID_VMCS_PTR
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| 122 | jmp .vmstart64_vmoff_end
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| 123 |
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| 124 | .vmptrld_success:
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| 125 |
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| 126 | ; Save the VMCS pointer on the stack
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| 127 | push qword [rbp + 16 + 8];
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| 128 |
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| 129 | ;/* Save segment registers */
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| 130 | MYPUSHSEGS rax
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| 131 |
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| 132 | %ifdef VMX_USE_CACHED_VMCS_ACCESSES
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| 133 | ; Flush the VMCS write cache first (before any other vmreads/vmwrites!)
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| 134 | mov rbx, [rbp + 24 + 8] ; pCache
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| 135 |
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| 136 | %ifdef DEBUG
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| 137 | mov rax, [rbp + 8 + 8] ; pPageCpuPhys
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| 138 | mov [rbx + VMCSCACHE.TestIn.pPageCpuPhys], rax
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| 139 | mov rax, [rbp + 16 + 8] ; pVMCSPhys
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| 140 | mov [rbx + VMCSCACHE.TestIn.pVMCSPhys], rax
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| 141 | mov [rbx + VMCSCACHE.TestIn.pCache], rbx
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| 142 | mov [rbx + VMCSCACHE.TestIn.pCtx], rsi
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| 143 | %endif
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| 144 |
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| 145 | mov ecx, [xBX + VMCSCACHE.Write.cValidEntries]
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| 146 | cmp ecx, 0
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| 147 | je .no_cached_writes
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| 148 | mov edx, ecx
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| 149 | mov ecx, 0
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| 150 | jmp .cached_write
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| 151 |
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| 152 | ALIGN(16)
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| 153 | .cached_write:
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| 154 | mov eax, [xBX + VMCSCACHE.Write.aField + xCX*4]
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| 155 | vmwrite xAX, qword [xBX + VMCSCACHE.Write.aFieldVal + xCX*8]
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| 156 | inc xCX
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| 157 | cmp xCX, xDX
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| 158 | jl .cached_write
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| 159 |
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| 160 | mov dword [xBX + VMCSCACHE.Write.cValidEntries], 0
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| 161 | .no_cached_writes:
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| 162 |
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| 163 | ; Save the pCache pointer
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| 164 | push xBX
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| 165 | %endif
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| 166 |
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| 167 | ; Save the host state that's relevant in the temporary 64 bits mode
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| 168 | mov rdx, cr0
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| 169 | mov eax, VMX_VMCS_HOST_CR0
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| 170 | vmwrite rax, rdx
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| 171 |
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| 172 | mov rdx, cr3
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| 173 | mov eax, VMX_VMCS_HOST_CR3
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| 174 | vmwrite rax, rdx
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| 175 |
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| 176 | mov rdx, cr4
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| 177 | mov eax, VMX_VMCS_HOST_CR4
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| 178 | vmwrite rax, rdx
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| 179 |
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| 180 | mov rdx, cs
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| 181 | mov eax, VMX_VMCS_HOST_FIELD_CS
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| 182 | vmwrite rax, rdx
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| 183 |
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| 184 | mov rdx, ss
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| 185 | mov eax, VMX_VMCS_HOST_FIELD_SS
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| 186 | vmwrite rax, rdx
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| 187 |
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| 188 | sub rsp, 8*2
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| 189 | sgdt [rsp]
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| 190 | mov eax, VMX_VMCS_HOST_GDTR_BASE
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| 191 | vmwrite rax, [rsp+2]
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| 192 | add rsp, 8*2
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| 193 |
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| 194 | ; hopefully we can ignore TR (we restore it anyway on the way back to 32 bits mode)
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| 195 |
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| 196 | ;/* First we have to save some final CPU context registers. */
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| 197 | lea rdx, [.vmlaunch64_done wrt rip]
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| 198 | mov rax, VMX_VMCS_HOST_RIP ;/* return address (too difficult to continue after VMLAUNCH?) */
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| 199 | vmwrite rax, rdx
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| 200 | ;/* Note: assumes success... */
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| 201 |
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| 202 | ;/* Manual save and restore:
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| 203 | ; * - General purpose registers except RIP, RSP
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| 204 | ; *
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| 205 | ; * Trashed:
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| 206 | ; * - CR2 (we don't care)
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| 207 | ; * - LDTR (reset to 0)
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| 208 | ; * - DRx (presumably not changed at all)
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| 209 | ; * - DR7 (reset to 0x400)
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| 210 | ; * - EFLAGS (reset to RT_BIT(1); not relevant)
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| 211 | ; *
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| 212 | ; */
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| 213 |
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| 214 | ; Load the guest LSTAR, CSTAR, SFMASK & KERNEL_GSBASE MSRs
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| 215 | ;; @todo use the automatic load feature for MSRs
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| 216 | LOADGUESTMSR MSR_K8_LSTAR, CPUMCTX.msrLSTAR
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| 217 | %if 0 ; not supported on Intel CPUs
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| 218 | LOADGUESTMSR MSR_K8_CSTAR, CPUMCTX.msrCSTAR
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| 219 | %endif
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| 220 | LOADGUESTMSR MSR_K6_STAR, CPUMCTX.msrSTAR
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| 221 | LOADGUESTMSR MSR_K8_SF_MASK, CPUMCTX.msrSFMASK
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| 222 | LOADGUESTMSR MSR_K8_KERNEL_GS_BASE, CPUMCTX.msrKERNELGSBASE
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| 223 |
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| 224 | ; Save the pCtx pointer
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| 225 | push rsi
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| 226 |
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| 227 | ; Restore CR2
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| 228 | mov rbx, qword [rsi + CPUMCTX.cr2]
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| 229 | mov cr2, rbx
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| 230 |
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| 231 | mov eax, VMX_VMCS_HOST_RSP
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| 232 | vmwrite rax, rsp
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| 233 | ;/* Note: assumes success... */
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| 234 | ;/* Don't mess with ESP anymore!! */
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| 235 |
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| 236 | ;/* Restore Guest's general purpose registers. */
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| 237 | mov rax, qword [rsi + CPUMCTX.eax]
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| 238 | mov rbx, qword [rsi + CPUMCTX.ebx]
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| 239 | mov rcx, qword [rsi + CPUMCTX.ecx]
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| 240 | mov rdx, qword [rsi + CPUMCTX.edx]
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| 241 | mov rbp, qword [rsi + CPUMCTX.ebp]
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| 242 | mov r8, qword [rsi + CPUMCTX.r8]
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| 243 | mov r9, qword [rsi + CPUMCTX.r9]
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| 244 | mov r10, qword [rsi + CPUMCTX.r10]
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| 245 | mov r11, qword [rsi + CPUMCTX.r11]
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| 246 | mov r12, qword [rsi + CPUMCTX.r12]
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| 247 | mov r13, qword [rsi + CPUMCTX.r13]
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| 248 | mov r14, qword [rsi + CPUMCTX.r14]
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| 249 | mov r15, qword [rsi + CPUMCTX.r15]
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| 250 |
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| 251 | ;/* Restore rdi & rsi. */
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| 252 | mov rdi, qword [rsi + CPUMCTX.edi]
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| 253 | mov rsi, qword [rsi + CPUMCTX.esi]
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| 254 |
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| 255 | vmlaunch
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| 256 | jmp .vmlaunch64_done; ;/* here if vmlaunch detected a failure. */
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| 257 |
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| 258 | ALIGNCODE(16)
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| 259 | .vmlaunch64_done:
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| 260 | jc near .vmstart64_invalid_vmxon_ptr
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| 261 | jz near .vmstart64_start_failed
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| 262 |
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| 263 | push rdi
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| 264 | mov rdi, [rsp + 8] ; pCtx
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| 265 |
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| 266 | mov qword [rdi + CPUMCTX.eax], rax
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| 267 | mov qword [rdi + CPUMCTX.ebx], rbx
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| 268 | mov qword [rdi + CPUMCTX.ecx], rcx
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| 269 | mov qword [rdi + CPUMCTX.edx], rdx
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| 270 | mov qword [rdi + CPUMCTX.esi], rsi
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| 271 | mov qword [rdi + CPUMCTX.ebp], rbp
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| 272 | mov qword [rdi + CPUMCTX.r8], r8
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| 273 | mov qword [rdi + CPUMCTX.r9], r9
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| 274 | mov qword [rdi + CPUMCTX.r10], r10
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| 275 | mov qword [rdi + CPUMCTX.r11], r11
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| 276 | mov qword [rdi + CPUMCTX.r12], r12
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| 277 | mov qword [rdi + CPUMCTX.r13], r13
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| 278 | mov qword [rdi + CPUMCTX.r14], r14
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| 279 | mov qword [rdi + CPUMCTX.r15], r15
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| 280 |
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| 281 | pop rax ; the guest edi we pushed above
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| 282 | mov qword [rdi + CPUMCTX.edi], rax
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| 283 |
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| 284 | pop rsi ; pCtx (needed in rsi by the macros below)
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| 285 |
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| 286 | ;; @todo use the automatic load feature for MSRs
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| 287 | SAVEGUESTMSR MSR_K8_KERNEL_GS_BASE, CPUMCTX.msrKERNELGSBASE
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| 288 |
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| 289 | %ifdef VMX_USE_CACHED_VMCS_ACCESSES
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| 290 | pop rdi ; saved pCache
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| 291 |
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| 292 | %ifdef DEBUG
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| 293 | mov [rdi + VMCSCACHE.TestOut.pCache], rdi
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| 294 | mov [rdi + VMCSCACHE.TestOut.pCtx], rsi
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| 295 | %endif
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| 296 |
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| 297 | mov ecx, [rdi + VMCSCACHE.Read.cValidEntries]
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| 298 | cmp ecx, 0 ; can't happen
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| 299 | je .no_cached_reads
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| 300 | jmp .cached_read
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| 301 |
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| 302 | ALIGN(16)
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| 303 | .cached_read:
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| 304 | dec xCX
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| 305 | mov eax, [rdi + VMCSCACHE.Read.aField + xCX*4]
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| 306 | vmread qword [rdi + VMCSCACHE.Read.aFieldVal + xCX*8], xAX
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| 307 | cmp xCX, 0
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| 308 | jnz .cached_read
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| 309 | .no_cached_reads:
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| 310 |
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| 311 | ; Save CR2 for EPT
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| 312 | mov rax, cr2
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| 313 | mov [rdi + VMCSCACHE.cr2], rax
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| 314 | %endif
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| 315 |
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| 316 | ; Restore segment registers
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| 317 | MYPOPSEGS rax
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| 318 |
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| 319 | mov eax, VINF_SUCCESS
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| 320 |
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| 321 | .vmstart64_end:
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| 322 |
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| 323 | %ifdef VMX_USE_CACHED_VMCS_ACCESSES
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| 324 | %ifdef DEBUG
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| 325 | mov rdx, [rsp] ; pVMCSPhys
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| 326 | mov [rdi + VMCSCACHE.TestOut.pVMCSPhys], rdx
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| 327 | %endif
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| 328 | %endif
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| 329 |
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| 330 | ; Write back the data and disable the VMCS
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| 331 | vmclear qword [rsp] ;Pushed pVMCS
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| 332 | add rsp, 8
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| 333 |
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| 334 | .vmstart64_vmoff_end:
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| 335 | ; Disable VMX root mode
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| 336 | vmxoff
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| 337 | .vmstart64_vmxon_failed:
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| 338 | %ifdef VMX_USE_CACHED_VMCS_ACCESSES
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| 339 | %ifdef DEBUG
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| 340 | cmp eax, VINF_SUCCESS
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| 341 | jne .skip_flags_save
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| 342 |
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| 343 | pushf
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| 344 | pop rdx
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| 345 | mov [rdi + VMCSCACHE.TestOut.eflags], rdx
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| 346 | .skip_flags_save:
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| 347 | %endif
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| 348 | %endif
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| 349 | pop rbp
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| 350 | ret
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| 351 |
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| 352 |
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| 353 | .vmstart64_invalid_vmxon_ptr:
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| 354 | pop rsi ; pCtx (needed in rsi by the macros below)
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| 355 |
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| 356 | %ifdef VMX_USE_CACHED_VMCS_ACCESSES
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| 357 | pop rdi ; pCache
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| 358 |
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| 359 | %ifdef DEBUG
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| 360 | mov [rdi + VMCSCACHE.TestOut.pCache], rdi
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| 361 | mov [rdi + VMCSCACHE.TestOut.pCtx], rsi
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| 362 | %endif
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| 363 |
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| 364 | %endif
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| 365 |
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| 366 | ; Restore segment registers
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| 367 | MYPOPSEGS rax
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| 368 |
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| 369 | ; Restore all general purpose host registers.
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| 370 | mov eax, VERR_VMX_INVALID_VMXON_PTR
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| 371 | jmp .vmstart64_end
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| 372 |
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| 373 | .vmstart64_start_failed:
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| 374 | pop rsi ; pCtx (needed in rsi by the macros below)
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| 375 |
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| 376 | %ifdef VMX_USE_CACHED_VMCS_ACCESSES
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| 377 | pop rdi ; pCache
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| 378 |
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| 379 | %ifdef DEBUG
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| 380 | mov [rdi + VMCSCACHE.TestOut.pCache], rdi
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| 381 | mov [rdi + VMCSCACHE.TestOut.pCtx], rsi
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| 382 | %endif
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| 383 |
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| 384 | %endif
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| 385 |
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| 386 | ; Restore segment registers
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| 387 | MYPOPSEGS rax
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| 388 |
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| 389 | ; Restore all general purpose host registers.
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| 390 | mov eax, VERR_VMX_UNABLE_TO_START_VM
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| 391 | jmp .vmstart64_end
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| 392 | ENDPROC VMXGCStartVM64
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| 393 |
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| 394 |
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| 395 | ;/**
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| 396 | ; * Prepares for and executes VMRUN (64 bits guests)
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| 397 | ; *
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| 398 | ; * @returns VBox status code
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| 399 | ; * @param HCPhysVMCB Physical address of host VMCB (rsp+8)
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| 400 | ; * @param HCPhysVMCB Physical address of guest VMCB (rsp+16)
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| 401 | ; * @param pCtx Guest context (rsi)
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| 402 | ; */
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| 403 | BEGINPROC SVMGCVMRun64
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| 404 | push rbp
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| 405 | mov rbp, rsp
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| 406 | pushf
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| 407 |
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| 408 | ;/* Manual save and restore:
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| 409 | ; * - General purpose registers except RIP, RSP, RAX
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| 410 | ; *
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| 411 | ; * Trashed:
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| 412 | ; * - CR2 (we don't care)
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| 413 | ; * - LDTR (reset to 0)
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| 414 | ; * - DRx (presumably not changed at all)
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| 415 | ; * - DR7 (reset to 0x400)
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| 416 | ; */
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| 417 |
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| 418 | ;/* Save the Guest CPU context pointer. */
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| 419 | push rsi ; push for saving the state at the end
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| 420 |
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| 421 | ; save host fs, gs, sysenter msr etc
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| 422 | mov rax, [rbp + 8 + 8] ; pVMCBHostPhys (64 bits physical address)
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| 423 | push rax ; save for the vmload after vmrun
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| 424 | vmsave
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| 425 |
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| 426 | ; setup eax for VMLOAD
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| 427 | mov rax, [rbp + 8 + 8 + RTHCPHYS_CB] ; pVMCBPhys (64 bits physical address)
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| 428 |
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| 429 | ;/* Restore Guest's general purpose registers. */
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| 430 | ;/* RAX is loaded from the VMCB by VMRUN */
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| 431 | mov rbx, qword [rsi + CPUMCTX.ebx]
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| 432 | mov rcx, qword [rsi + CPUMCTX.ecx]
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| 433 | mov rdx, qword [rsi + CPUMCTX.edx]
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| 434 | mov rdi, qword [rsi + CPUMCTX.edi]
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| 435 | mov rbp, qword [rsi + CPUMCTX.ebp]
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| 436 | mov r8, qword [rsi + CPUMCTX.r8]
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| 437 | mov r9, qword [rsi + CPUMCTX.r9]
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| 438 | mov r10, qword [rsi + CPUMCTX.r10]
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| 439 | mov r11, qword [rsi + CPUMCTX.r11]
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| 440 | mov r12, qword [rsi + CPUMCTX.r12]
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| 441 | mov r13, qword [rsi + CPUMCTX.r13]
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| 442 | mov r14, qword [rsi + CPUMCTX.r14]
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| 443 | mov r15, qword [rsi + CPUMCTX.r15]
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| 444 | mov rsi, qword [rsi + CPUMCTX.esi]
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| 445 |
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| 446 | ; Clear the global interrupt flag & execute sti to make sure external interrupts cause a world switch
|
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| 447 | clgi
|
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| 448 | sti
|
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| 449 |
|
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| 450 | ; load guest fs, gs, sysenter msr etc
|
|---|
| 451 | vmload
|
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| 452 | ; run the VM
|
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| 453 | vmrun
|
|---|
| 454 |
|
|---|
| 455 | ;/* RAX is in the VMCB already; we can use it here. */
|
|---|
| 456 |
|
|---|
| 457 | ; save guest fs, gs, sysenter msr etc
|
|---|
| 458 | vmsave
|
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| 459 |
|
|---|
| 460 | ; load host fs, gs, sysenter msr etc
|
|---|
| 461 | pop rax ; pushed above
|
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| 462 | vmload
|
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| 463 |
|
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| 464 | ; Set the global interrupt flag again, but execute cli to make sure IF=0.
|
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| 465 | cli
|
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| 466 | stgi
|
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| 467 |
|
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| 468 | pop rax ; pCtx
|
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| 469 |
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|---|
| 470 | mov qword [rax + CPUMCTX.ebx], rbx
|
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| 471 | mov qword [rax + CPUMCTX.ecx], rcx
|
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| 472 | mov qword [rax + CPUMCTX.edx], rdx
|
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| 473 | mov qword [rax + CPUMCTX.esi], rsi
|
|---|
| 474 | mov qword [rax + CPUMCTX.edi], rdi
|
|---|
| 475 | mov qword [rax + CPUMCTX.ebp], rbp
|
|---|
| 476 | mov qword [rax + CPUMCTX.r8], r8
|
|---|
| 477 | mov qword [rax + CPUMCTX.r9], r9
|
|---|
| 478 | mov qword [rax + CPUMCTX.r10], r10
|
|---|
| 479 | mov qword [rax + CPUMCTX.r11], r11
|
|---|
| 480 | mov qword [rax + CPUMCTX.r12], r12
|
|---|
| 481 | mov qword [rax + CPUMCTX.r13], r13
|
|---|
| 482 | mov qword [rax + CPUMCTX.r14], r14
|
|---|
| 483 | mov qword [rax + CPUMCTX.r15], r15
|
|---|
| 484 |
|
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| 485 | mov eax, VINF_SUCCESS
|
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| 486 |
|
|---|
| 487 | popf
|
|---|
| 488 | pop rbp
|
|---|
| 489 | ret
|
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| 490 | ENDPROC SVMGCVMRun64
|
|---|
| 491 |
|
|---|
| 492 | ;/**
|
|---|
| 493 | ; * Saves the guest FPU context
|
|---|
| 494 | ; *
|
|---|
| 495 | ; * @returns VBox status code
|
|---|
| 496 | ; * @param pCtx Guest context [rsi]
|
|---|
| 497 | ; */
|
|---|
| 498 | BEGINPROC HWACCMSaveGuestFPU64
|
|---|
| 499 | mov rax, cr0
|
|---|
| 500 | mov rcx, rax ; save old CR0
|
|---|
| 501 | and rax, ~(X86_CR0_TS | X86_CR0_EM)
|
|---|
| 502 | mov cr0, rax
|
|---|
| 503 |
|
|---|
| 504 | fxsave [rsi + CPUMCTX.fpu]
|
|---|
| 505 |
|
|---|
| 506 | mov cr0, rcx ; and restore old CR0 again
|
|---|
| 507 |
|
|---|
| 508 | mov eax, VINF_SUCCESS
|
|---|
| 509 | ret
|
|---|
| 510 | ENDPROC HWACCMSaveGuestFPU64
|
|---|
| 511 |
|
|---|
| 512 | ;/**
|
|---|
| 513 | ; * Saves the guest debug context (DR0-3, DR6)
|
|---|
| 514 | ; *
|
|---|
| 515 | ; * @returns VBox status code
|
|---|
| 516 | ; * @param pCtx Guest context [rsi]
|
|---|
| 517 | ; */
|
|---|
| 518 | BEGINPROC HWACCMSaveGuestDebug64
|
|---|
| 519 | mov rax, dr0
|
|---|
| 520 | mov qword [rsi + CPUMCTX.dr + 0*8], rax
|
|---|
| 521 | mov rax, dr1
|
|---|
| 522 | mov qword [rsi + CPUMCTX.dr + 1*8], rax
|
|---|
| 523 | mov rax, dr2
|
|---|
| 524 | mov qword [rsi + CPUMCTX.dr + 2*8], rax
|
|---|
| 525 | mov rax, dr3
|
|---|
| 526 | mov qword [rsi + CPUMCTX.dr + 3*8], rax
|
|---|
| 527 | mov rax, dr6
|
|---|
| 528 | mov qword [rsi + CPUMCTX.dr + 6*8], rax
|
|---|
| 529 | mov eax, VINF_SUCCESS
|
|---|
| 530 | ret
|
|---|
| 531 | ENDPROC HWACCMSaveGuestDebug64
|
|---|
| 532 |
|
|---|
| 533 | ;/**
|
|---|
| 534 | ; * Dummy callback handler
|
|---|
| 535 | ; *
|
|---|
| 536 | ; * @returns VBox status code
|
|---|
| 537 | ; * @param param1 Parameter 1 [rsp+8]
|
|---|
| 538 | ; * @param param2 Parameter 2 [rsp+12]
|
|---|
| 539 | ; * @param param3 Parameter 3 [rsp+16]
|
|---|
| 540 | ; * @param param4 Parameter 4 [rsp+20]
|
|---|
| 541 | ; * @param param5 Parameter 5 [rsp+24]
|
|---|
| 542 | ; * @param pCtx Guest context [rsi]
|
|---|
| 543 | ; */
|
|---|
| 544 | BEGINPROC HWACCMTestSwitcher64
|
|---|
| 545 | mov eax, [rsp+8]
|
|---|
| 546 | ret
|
|---|
| 547 | ENDPROC HWACCMTestSwitcher64
|
|---|
