VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMGC/PDMGCDevice.cpp@ 17236

Last change on this file since 17236 was 13824, checked in by vboxsync, 16 years ago

VMM: %VGp -> %RGp
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
File size: 20.3 KB
Line 
1/* $Id: PDMGCDevice.cpp 13824 2008-11-05 01:11:24Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, GC Device parts.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22
23/*******************************************************************************
24* Header Files *
25*******************************************************************************/
26#define LOG_GROUP LOG_GROUP_PDM_DEVICE
27#include "PDMInternal.h"
28#include <VBox/pdm.h>
29#include <VBox/pgm.h>
30#include <VBox/mm.h>
31#include <VBox/vm.h>
32#include <VBox/patm.h>
33
34#include <VBox/log.h>
35#include <VBox/err.h>
36#include <iprt/asm.h>
37#include <iprt/assert.h>
38#include <iprt/string.h>
39
40
41/*******************************************************************************
42* Global Variables *
43*******************************************************************************/
44__BEGIN_DECLS
45extern DECLEXPORT(const PDMDEVHLPRC) g_pdmRCDevHlp;
46extern DECLEXPORT(const PDMPICHLPRC) g_pdmRCPicHlp;
47extern DECLEXPORT(const PDMAPICHLPRC) g_pdmRCApicHlp;
48extern DECLEXPORT(const PDMIOAPICHLPRC) g_pdmRCIoApicHlp;
49extern DECLEXPORT(const PDMPCIHLPRC) g_pdmRCPciHlp;
50__END_DECLS
51
52
53/*******************************************************************************
54* Internal Functions *
55*******************************************************************************/
56/** @name GC Device Helpers
57 * @{
58 */
59static DECLCALLBACK(void) pdmGCDevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
60static DECLCALLBACK(void) pdmGCDevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
61static DECLCALLBACK(void) pdmGCDevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead);
62static DECLCALLBACK(void) pdmGCDevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite);
63static DECLCALLBACK(bool) pdmGCDevHlp_A20IsEnabled(PPDMDEVINS pDevIns);
64static DECLCALLBACK(int) pdmGCDevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...);
65static DECLCALLBACK(int) pdmGCDevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va);
66static DECLCALLBACK(int) pdmGCDevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...);
67static DECLCALLBACK(int) pdmGCDevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va);
68static DECLCALLBACK(int) pdmGCDevHlp_PATMSetMMIOPatchInfo(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData);
69static DECLCALLBACK(PVM) pdmGCDevHlp_GetVM(PPDMDEVINS pDevIns);
70/** @} */
71
72
73/** @name PIC GC Helpers
74 * @{
75 */
76static DECLCALLBACK(void) pdmRCPicHlp_SetInterruptFF(PPDMDEVINS pDevIns);
77static DECLCALLBACK(void) pdmRCPicHlp_ClearInterruptFF(PPDMDEVINS pDevIns);
78static DECLCALLBACK(int) pdmRCPicHlp_Lock(PPDMDEVINS pDevIns, int rc);
79static DECLCALLBACK(void) pdmRCPicHlp_Unlock(PPDMDEVINS pDevIns);
80/** @} */
81
82
83/** @name APIC RC Helpers
84 * @{
85 */
86static DECLCALLBACK(void) pdmRCApicHlp_SetInterruptFF(PPDMDEVINS pDevIns, VMCPUID idCpu);
87static DECLCALLBACK(void) pdmRCApicHlp_ClearInterruptFF(PPDMDEVINS pDevIns, VMCPUID idCpu);
88static DECLCALLBACK(void) pdmRCApicHlp_ChangeFeature(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion);
89static DECLCALLBACK(int) pdmRCApicHlp_Lock(PPDMDEVINS pDevIns, int rc);
90static DECLCALLBACK(void) pdmRCApicHlp_Unlock(PPDMDEVINS pDevIns);
91static DECLCALLBACK(VMCPUID) pdmRCApicHlp_GetCpuId(PPDMDEVINS pDevIns);
92/** @} */
93
94
95/** @name I/O APIC RC Helpers
96 * @{
97 */
98static DECLCALLBACK(void) pdmRCIoApicHlp_ApicBusDeliver(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
99 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode);
100static DECLCALLBACK(int) pdmRCIoApicHlp_Lock(PPDMDEVINS pDevIns, int rc);
101static DECLCALLBACK(void) pdmRCIoApicHlp_Unlock(PPDMDEVINS pDevIns);
102/** @} */
103
104
105/** @name PCI Bus RC Helpers
106 * @{
107 */
108static DECLCALLBACK(void) pdmRCPciHlp_IsaSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
109static DECLCALLBACK(void) pdmRCPciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
110static DECLCALLBACK(int) pdmRCPciHlp_Lock(PPDMDEVINS pDevIns, int rc);
111static DECLCALLBACK(void) pdmRCPciHlp_Unlock(PPDMDEVINS pDevIns);
112/** @} */
113
114
115static void pdmGCIsaSetIrq(PVM pVM, int iIrq, int iLevel);
116static void pdmGCIoApicSetIrq(PVM pVM, int iIrq, int iLevel);
117
118
119
120/**
121 * The Guest Context Device Helper Callbacks.
122 */
123extern DECLEXPORT(const PDMDEVHLPRC) g_pdmRCDevHlp =
124{
125 PDM_DEVHLPRC_VERSION,
126 pdmGCDevHlp_PCISetIrq,
127 pdmGCDevHlp_ISASetIrq,
128 pdmGCDevHlp_PhysRead,
129 pdmGCDevHlp_PhysWrite,
130 pdmGCDevHlp_A20IsEnabled,
131 pdmGCDevHlp_VMSetError,
132 pdmGCDevHlp_VMSetErrorV,
133 pdmGCDevHlp_VMSetRuntimeError,
134 pdmGCDevHlp_VMSetRuntimeErrorV,
135 pdmGCDevHlp_PATMSetMMIOPatchInfo,
136 pdmGCDevHlp_GetVM,
137 PDM_DEVHLPRC_VERSION
138};
139
140/**
141 * The Raw-Mode Context PIC Helper Callbacks.
142 */
143extern DECLEXPORT(const PDMPICHLPRC) g_pdmRCPicHlp =
144{
145 PDM_PICHLPRC_VERSION,
146 pdmRCPicHlp_SetInterruptFF,
147 pdmRCPicHlp_ClearInterruptFF,
148 pdmRCPicHlp_Lock,
149 pdmRCPicHlp_Unlock,
150 PDM_PICHLPRC_VERSION
151};
152
153
154/**
155 * The Raw-Mode Context APIC Helper Callbacks.
156 */
157extern DECLEXPORT(const PDMAPICHLPRC) g_pdmRCApicHlp =
158{
159 PDM_APICHLPRC_VERSION,
160 pdmRCApicHlp_SetInterruptFF,
161 pdmRCApicHlp_ClearInterruptFF,
162 pdmRCApicHlp_ChangeFeature,
163 pdmRCApicHlp_Lock,
164 pdmRCApicHlp_Unlock,
165 pdmRCApicHlp_GetCpuId,
166 PDM_APICHLPRC_VERSION
167};
168
169
170/**
171 * The Raw-Mode Context I/O APIC Helper Callbacks.
172 */
173extern DECLEXPORT(const PDMIOAPICHLPRC) g_pdmRCIoApicHlp =
174{
175 PDM_IOAPICHLPRC_VERSION,
176 pdmRCIoApicHlp_ApicBusDeliver,
177 pdmRCIoApicHlp_Lock,
178 pdmRCIoApicHlp_Unlock,
179 PDM_IOAPICHLPRC_VERSION
180};
181
182
183/**
184 * The Raw-Mode Context PCI Bus Helper Callbacks.
185 */
186extern DECLEXPORT(const PDMPCIHLPRC) g_pdmRCPciHlp =
187{
188 PDM_PCIHLPRC_VERSION,
189 pdmRCPciHlp_IsaSetIrq,
190 pdmRCPciHlp_IoApicSetIrq,
191 pdmRCPciHlp_Lock,
192 pdmRCPciHlp_Unlock,
193 PDM_PCIHLPRC_VERSION, /* the end */
194};
195
196
197
198
199/** @copydoc PDMDEVHLPRC::pfnPCISetIrq */
200static DECLCALLBACK(void) pdmGCDevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
201{
202 PDMDEV_ASSERT_DEVINS(pDevIns);
203 LogFlow(("pdmGCDevHlp_PCISetIrq: caller=%p/%d: iIrq=%d iLevel=%d\n", pDevIns, pDevIns->iInstance, iIrq, iLevel));
204
205 PVM pVM = pDevIns->Internal.s.pVMRC;
206 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceRC;
207 PPDMPCIBUS pPciBus = pDevIns->Internal.s.pPciBusRC;
208 if ( pPciDev
209 && pPciBus
210 && pPciBus->pDevInsRC)
211 {
212 pdmLock(pVM);
213 pPciBus->pfnSetIrqRC(pPciBus->pDevInsRC, pPciDev, iIrq, iLevel);
214 pdmUnlock(pVM);
215 }
216 else
217 {
218 /* queue for ring-3 execution. */
219 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)PDMQueueAlloc(pVM->pdm.s.pDevHlpQueueRC);
220 if (pTask)
221 {
222 pTask->enmOp = PDMDEVHLPTASKOP_PCI_SET_IRQ;
223 pTask->pDevInsR3 = PDMDEVINS_2_R3PTR(pDevIns);
224 pTask->u.SetIRQ.iIrq = iIrq;
225 pTask->u.SetIRQ.iLevel = iLevel;
226
227 PDMQueueInsertEx(pVM->pdm.s.pDevHlpQueueRC, &pTask->Core, 0);
228 }
229 else
230 AssertMsgFailed(("We're out of devhlp queue items!!!\n"));
231 }
232
233 LogFlow(("pdmGCDevHlp_PCISetIrq: caller=%p/%d: returns void\n", pDevIns, pDevIns->iInstance));
234}
235
236
237/** @copydoc PDMDEVHLPRC::pfnPCISetIrq */
238static DECLCALLBACK(void) pdmGCDevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
239{
240 PDMDEV_ASSERT_DEVINS(pDevIns);
241 LogFlow(("pdmGCDevHlp_ISASetIrq: caller=%p/%d: iIrq=%d iLevel=%d\n", pDevIns, pDevIns->iInstance, iIrq, iLevel));
242
243 pdmGCIsaSetIrq(pDevIns->Internal.s.pVMRC, iIrq, iLevel);
244
245 LogFlow(("pdmGCDevHlp_ISASetIrq: caller=%p/%d: returns void\n", pDevIns, pDevIns->iInstance));
246}
247
248
249/** @copydoc PDMDEVHLPRC::pfnPhysRead */
250static DECLCALLBACK(void) pdmGCDevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
251{
252 PDMDEV_ASSERT_DEVINS(pDevIns);
253 LogFlow(("pdmGCDevHlp_PhysRead: caller=%p/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n",
254 pDevIns, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
255
256 PGMPhysRead(pDevIns->Internal.s.pVMRC, GCPhys, pvBuf, cbRead);
257
258 Log(("pdmGCDevHlp_PhysRead: caller=%p/%d: returns void\n", pDevIns, pDevIns->iInstance));
259}
260
261
262/** @copydoc PDMDEVHLPRC::pfnPhysWrite */
263static DECLCALLBACK(void) pdmGCDevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
264{
265 PDMDEV_ASSERT_DEVINS(pDevIns);
266 LogFlow(("pdmGCDevHlp_PhysWrite: caller=%p/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n",
267 pDevIns, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
268
269 PGMPhysWrite(pDevIns->Internal.s.pVMRC, GCPhys, pvBuf, cbWrite);
270
271 Log(("pdmGCDevHlp_PhysWrite: caller=%p/%d: returns void\n", pDevIns, pDevIns->iInstance));
272}
273
274
275/** @copydoc PDMDEVHLPRC::pfnA20IsEnabled */
276static DECLCALLBACK(bool) pdmGCDevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
277{
278 PDMDEV_ASSERT_DEVINS(pDevIns);
279 LogFlow(("pdmGCDevHlp_A20IsEnabled: caller=%p/%d:\n", pDevIns, pDevIns->iInstance));
280
281 bool fEnabled = PGMPhysIsA20Enabled(pDevIns->Internal.s.pVMRC);
282
283 Log(("pdmGCDevHlp_A20IsEnabled: caller=%p/%d: returns %RTbool\n", pDevIns, pDevIns->iInstance, fEnabled));
284 return fEnabled;
285}
286
287
288/** @copydoc PDMDEVHLPRC::pfnVMSetError */
289static DECLCALLBACK(int) pdmGCDevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
290{
291 PDMDEV_ASSERT_DEVINS(pDevIns);
292 va_list args;
293 va_start(args, pszFormat);
294 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMRC, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
295 va_end(args);
296 return rc;
297}
298
299
300/** @copydoc PDMDEVHLPRC::pfnVMSetErrorV */
301static DECLCALLBACK(int) pdmGCDevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
302{
303 PDMDEV_ASSERT_DEVINS(pDevIns);
304 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMRC, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
305 return rc;
306}
307
308
309/** @copydoc PDMDEVHLPRC::pfnVMSetRuntimeError */
310static DECLCALLBACK(int) pdmGCDevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...)
311{
312 PDMDEV_ASSERT_DEVINS(pDevIns);
313 va_list args;
314 va_start(args, pszFormat);
315 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMRC, fFatal, pszErrorID, pszFormat, args);
316 va_end(args);
317 return rc;
318}
319
320
321/** @copydoc PDMDEVHLPRC::pfnVMSetErrorV */
322static DECLCALLBACK(int) pdmGCDevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va)
323{
324 PDMDEV_ASSERT_DEVINS(pDevIns);
325 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMRC, fFatal, pszErrorID, pszFormat, va);
326 return rc;
327}
328
329
330/** @copydoc PDMDEVHLPRC::pfnPATMSetMMIOPatchInfo */
331static DECLCALLBACK(int) pdmGCDevHlp_PATMSetMMIOPatchInfo(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData)
332{
333 PDMDEV_ASSERT_DEVINS(pDevIns);
334 LogFlow(("pdmGCDevHlp_PATMSetMMIOPatchInfo: caller=%p/%d:\n", pDevIns, pDevIns->iInstance));
335
336 return PATMSetMMIOPatchInfo(pDevIns->Internal.s.pVMRC, GCPhys, (RTRCPTR)pCachedData);
337}
338
339
340/** @copydoc PDMDEVHLPRC::pfnGetVM */
341static DECLCALLBACK(PVM) pdmGCDevHlp_GetVM(PPDMDEVINS pDevIns)
342{
343 PDMDEV_ASSERT_DEVINS(pDevIns);
344 LogFlow(("pdmGCDevHlp_GetVM: caller='%p'/%d\n", pDevIns, pDevIns->iInstance));
345 return pDevIns->Internal.s.pVMRC;
346}
347
348
349
350
351/** @copydoc PDMPICHLPGC::pfnSetInterruptFF */
352static DECLCALLBACK(void) pdmRCPicHlp_SetInterruptFF(PPDMDEVINS pDevIns)
353{
354 PDMDEV_ASSERT_DEVINS(pDevIns);
355 LogFlow(("pdmRCPicHlp_SetInterruptFF: caller=%p/%d: VM_FF_INTERRUPT_PIC %d -> 1\n",
356 pDevIns, pDevIns->iInstance, VMCPU_FF_ISSET(pDevIns->Internal.s.pVMRC, 0, VM_FF_INTERRUPT_PIC)));
357 /* for PIC we always deliver to CPU 0, MP use APIC */
358 VMCPU_FF_SET(pDevIns->Internal.s.pVMRC, 0, VM_FF_INTERRUPT_PIC);
359}
360
361
362/** @copydoc PDMPICHLPGC::pfnClearInterruptFF */
363static DECLCALLBACK(void) pdmRCPicHlp_ClearInterruptFF(PPDMDEVINS pDevIns)
364{
365 PDMDEV_ASSERT_DEVINS(pDevIns);
366 LogFlow(("pdmRCPicHlp_ClearInterruptFF: caller=%p/%d: VM_FF_INTERRUPT_PIC %d -> 0\n",
367 pDevIns, pDevIns->iInstance, VMCPU_FF_ISSET(pDevIns->Internal.s.pVMRC, 0, VM_FF_INTERRUPT_PIC)));
368 /* for PIC we always deliver to CPU 0, MP use APIC */
369 VMCPU_FF_CLEAR(pDevIns->Internal.s.pVMRC, 0, VM_FF_INTERRUPT_PIC);
370}
371
372
373/** @copydoc PDMPICHLPGC::pfnLock */
374static DECLCALLBACK(int) pdmRCPicHlp_Lock(PPDMDEVINS pDevIns, int rc)
375{
376 PDMDEV_ASSERT_DEVINS(pDevIns);
377 return pdmLockEx(pDevIns->Internal.s.pVMRC, rc);
378}
379
380
381/** @copydoc PDMPICHLPGC::pfnUnlock */
382static DECLCALLBACK(void) pdmRCPicHlp_Unlock(PPDMDEVINS pDevIns)
383{
384 PDMDEV_ASSERT_DEVINS(pDevIns);
385 pdmUnlock(pDevIns->Internal.s.pVMRC);
386}
387
388
389
390
391/** @copydoc PDMAPICHLPRC::pfnSetInterruptFF */
392static DECLCALLBACK(void) pdmRCApicHlp_SetInterruptFF(PPDMDEVINS pDevIns, VMCPUID idCpu)
393{
394 PDMDEV_ASSERT_DEVINS(pDevIns);
395 LogFlow(("pdmRCApicHlp_SetInterruptFF: caller=%p/%d: VM_FF_INTERRUPT %d -> 1\n",
396 pDevIns, pDevIns->iInstance, VMCPU_FF_ISSET(pDevIns->Internal.s.pVMRC, idCpu, VM_FF_INTERRUPT_APIC)));
397 VMCPU_FF_SET(pDevIns->Internal.s.pVMRC, idCpu, VM_FF_INTERRUPT_APIC);
398}
399
400
401/** @copydoc PDMAPICHLPRC::pfnClearInterruptFF */
402static DECLCALLBACK(void) pdmRCApicHlp_ClearInterruptFF(PPDMDEVINS pDevIns, VMCPUID idCpu)
403{
404 PDMDEV_ASSERT_DEVINS(pDevIns);
405 LogFlow(("pdmRCApicHlp_ClearInterruptFF: caller=%p/%d: VM_FF_INTERRUPT %d -> 0\n",
406 pDevIns, pDevIns->iInstance, VMCPU_FF_ISSET(pDevIns->Internal.s.pVMRC, idCpu, VM_FF_INTERRUPT_APIC)));
407 VMCPU_FF_CLEAR(pDevIns->Internal.s.pVMRC, idCpu, VM_FF_INTERRUPT_APIC);
408}
409
410
411/** @copydoc PDMAPICHLPRC::pfnChangeFeature */
412static DECLCALLBACK(void) pdmRCApicHlp_ChangeFeature(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion)
413{
414 PDMDEV_ASSERT_DEVINS(pDevIns);
415 LogFlow(("pdmRCApicHlp_ChangeFeature: caller=%p/%d: version=%d\n", pDevIns, pDevIns->iInstance, (int)enmVersion));
416 switch (enmVersion)
417 {
418 case PDMAPICVERSION_NONE:
419 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMRC, CPUMCPUIDFEATURE_APIC);
420 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMRC, CPUMCPUIDFEATURE_X2APIC);
421 break;
422 case PDMAPICVERSION_APIC:
423 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMRC, CPUMCPUIDFEATURE_APIC);
424 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMRC, CPUMCPUIDFEATURE_X2APIC);
425 break;
426 case PDMAPICVERSION_X2APIC:
427 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMRC, CPUMCPUIDFEATURE_X2APIC);
428 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMRC, CPUMCPUIDFEATURE_APIC);
429 break;
430 default:
431 AssertMsgFailed(("Unknown APIC version: %d\n", (int)enmVersion));
432 }
433}
434
435
436/** @copydoc PDMAPICHLPRC::pfnLock */
437static DECLCALLBACK(int) pdmRCApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
438{
439 PDMDEV_ASSERT_DEVINS(pDevIns);
440 return pdmLockEx(pDevIns->Internal.s.pVMRC, rc);
441}
442
443
444/** @copydoc PDMAPICHLPRC::pfnUnlock */
445static DECLCALLBACK(void) pdmRCApicHlp_Unlock(PPDMDEVINS pDevIns)
446{
447 PDMDEV_ASSERT_DEVINS(pDevIns);
448 pdmUnlock(pDevIns->Internal.s.pVMRC);
449}
450
451
452/** @copydoc PDMAPICHLPRC::pfnGetCpuId */
453static DECLCALLBACK(VMCPUID) pdmRCApicHlp_GetCpuId(PPDMDEVINS pDevIns)
454{
455 PDMDEV_ASSERT_DEVINS(pDevIns);
456 return VMMGetCpuId(pDevIns->Internal.s.pVMRC);
457}
458
459/** @copydoc PDMIOAPICHLPRC::pfnApicBusDeliver */
460static DECLCALLBACK(void) pdmRCIoApicHlp_ApicBusDeliver(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
461 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode)
462{
463 PDMDEV_ASSERT_DEVINS(pDevIns);
464 PVM pVM = pDevIns->Internal.s.pVMRC;
465 LogFlow(("pdmRCIoApicHlp_ApicBusDeliver: caller=%p/%d: u8Dest=%RX8 u8DestMode=%RX8 u8DeliveryMode=%RX8 iVector=%RX8 u8Polarity=%RX8 u8TriggerMode=%RX8\n",
466 pDevIns, pDevIns->iInstance, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode));
467 if (pVM->pdm.s.Apic.pfnBusDeliverRC)
468 pVM->pdm.s.Apic.pfnBusDeliverRC(pVM->pdm.s.Apic.pDevInsRC, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode);
469}
470
471
472/** @copydoc PDMIOAPICHLPRC::pfnLock */
473static DECLCALLBACK(int) pdmRCIoApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
474{
475 PDMDEV_ASSERT_DEVINS(pDevIns);
476 return pdmLockEx(pDevIns->Internal.s.pVMRC, rc);
477}
478
479
480/** @copydoc PDMIOAPICHLPRC::pfnUnlock */
481static DECLCALLBACK(void) pdmRCIoApicHlp_Unlock(PPDMDEVINS pDevIns)
482{
483 PDMDEV_ASSERT_DEVINS(pDevIns);
484 pdmUnlock(pDevIns->Internal.s.pVMRC);
485}
486
487
488
489
490/** @copydoc PDMPCIHLPRC::pfnIsaSetIrq */
491static DECLCALLBACK(void) pdmRCPciHlp_IsaSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
492{
493 PDMDEV_ASSERT_DEVINS(pDevIns);
494 Log4(("pdmRCPciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
495 pdmGCIsaSetIrq(pDevIns->Internal.s.pVMRC, iIrq, iLevel);
496}
497
498
499/** @copydoc PDMPCIHLPRC::pfnIoApicSetIrq */
500static DECLCALLBACK(void) pdmRCPciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
501{
502 PDMDEV_ASSERT_DEVINS(pDevIns);
503 Log4(("pdmRCPciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
504 pdmGCIoApicSetIrq(pDevIns->Internal.s.pVMRC, iIrq, iLevel);
505}
506
507
508/** @copydoc PDMPCIHLPRC::pfnLock */
509static DECLCALLBACK(int) pdmRCPciHlp_Lock(PPDMDEVINS pDevIns, int rc)
510{
511 PDMDEV_ASSERT_DEVINS(pDevIns);
512 return pdmLockEx(pDevIns->Internal.s.pVMRC, rc);
513}
514
515
516/** @copydoc PDMPCIHLPRC::pfnUnlock */
517static DECLCALLBACK(void) pdmRCPciHlp_Unlock(PPDMDEVINS pDevIns)
518{
519 PDMDEV_ASSERT_DEVINS(pDevIns);
520 pdmUnlock(pDevIns->Internal.s.pVMRC);
521}
522
523
524
525
526/**
527 * Sets an irq on the I/O APIC.
528 *
529 * @param pVM The VM handle.
530 * @param iIrq The irq.
531 * @param iLevel The new level.
532 */
533static void pdmGCIsaSetIrq(PVM pVM, int iIrq, int iLevel)
534{
535 if ( ( pVM->pdm.s.IoApic.pDevInsRC
536 || !pVM->pdm.s.IoApic.pDevInsR3)
537 && ( pVM->pdm.s.Pic.pDevInsRC
538 || !pVM->pdm.s.Pic.pDevInsR3))
539 {
540 pdmLock(pVM);
541 if (pVM->pdm.s.Pic.pDevInsRC)
542 pVM->pdm.s.Pic.pfnSetIrqRC(pVM->pdm.s.Pic.pDevInsRC, iIrq, iLevel);
543 if (pVM->pdm.s.IoApic.pDevInsRC)
544 pVM->pdm.s.IoApic.pfnSetIrqRC(pVM->pdm.s.IoApic.pDevInsRC, iIrq, iLevel);
545 pdmUnlock(pVM);
546 }
547 else
548 {
549 /* queue for ring-3 execution. */
550 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)PDMQueueAlloc(pVM->pdm.s.pDevHlpQueueRC);
551 if (pTask)
552 {
553 pTask->enmOp = PDMDEVHLPTASKOP_ISA_SET_IRQ;
554 pTask->pDevInsR3 = NIL_RTR3PTR; /* not required */
555 pTask->u.SetIRQ.iIrq = iIrq;
556 pTask->u.SetIRQ.iLevel = iLevel;
557
558 PDMQueueInsertEx(pVM->pdm.s.pDevHlpQueueRC, &pTask->Core, 0);
559 }
560 else
561 AssertMsgFailed(("We're out of devhlp queue items!!!\n"));
562 }
563}
564
565
566/**
567 * Sets an irq on the I/O APIC.
568 *
569 * @param pVM The VM handle.
570 * @param iIrq The irq.
571 * @param iLevel The new level.
572 */
573static void pdmGCIoApicSetIrq(PVM pVM, int iIrq, int iLevel)
574{
575 if (pVM->pdm.s.IoApic.pDevInsRC)
576 {
577 pdmLock(pVM);
578 pVM->pdm.s.IoApic.pfnSetIrqRC(pVM->pdm.s.IoApic.pDevInsRC, iIrq, iLevel);
579 pdmUnlock(pVM);
580 }
581 else if (pVM->pdm.s.IoApic.pDevInsR3)
582 {
583 /* queue for ring-3 execution. */
584 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)PDMQueueAlloc(pVM->pdm.s.pDevHlpQueueRC);
585 if (pTask)
586 {
587 pTask->enmOp = PDMDEVHLPTASKOP_IOAPIC_SET_IRQ;
588 pTask->pDevInsR3 = NIL_RTR3PTR; /* not required */
589 pTask->u.SetIRQ.iIrq = iIrq;
590 pTask->u.SetIRQ.iLevel = iLevel;
591
592 PDMQueueInsertEx(pVM->pdm.s.pDevHlpQueueRC, &pTask->Core, 0);
593 }
594 else
595 AssertMsgFailed(("We're out of devhlp queue items!!!\n"));
596 }
597}
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette