VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMGC/PDMGCDevice.cpp@ 11224

Last change on this file since 11224 was 11224, checked in by vboxsync, 16 years ago

PDM: GC->RC, HC->R3 wrt PCI bus registration.
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1/* $Id: PDMGCDevice.cpp 11224 2008-08-07 18:25:15Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, GC Device parts.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22
23/*******************************************************************************
24* Header Files *
25*******************************************************************************/
26#define LOG_GROUP LOG_GROUP_PDM_DEVICE
27#include "PDMInternal.h"
28#include <VBox/pdm.h>
29#include <VBox/pgm.h>
30#include <VBox/mm.h>
31#include <VBox/vm.h>
32#include <VBox/patm.h>
33
34#include <VBox/log.h>
35#include <VBox/err.h>
36#include <iprt/asm.h>
37#include <iprt/assert.h>
38#include <iprt/string.h>
39
40
41/*******************************************************************************
42* Defined Constants And Macros *
43*******************************************************************************/
44/** @def PDMDEV_ASSERT_DEVINS
45 * Asserts the validity of the driver instance.
46 */
47#ifdef VBOX_STRICT
48# define PDMDEV_ASSERT_DEVINS(pDevIns) do { Assert(VALID_PTR(pDevIns)); \
49 Assert(pDevIns->u32Version == PDM_DEVINS_VERSION); \
50 Assert(pDevIns->pvInstanceDataGC == (void *)&pDevIns->achInstanceData[0]); \
51 } while (0)
52#else
53# define PDMDEV_ASSERT_DEVINS(pDevIns) do { } while (0)
54#endif
55
56
57/*******************************************************************************
58* Global Variables *
59*******************************************************************************/
60__BEGIN_DECLS
61extern DECLEXPORT(const PDMDEVHLPGC) g_pdmGCDevHlp;
62extern DECLEXPORT(const PDMPICHLPGC) g_pdmGCPicHlp;
63extern DECLEXPORT(const PDMAPICHLPRC) g_pdmRCApicHlp;
64extern DECLEXPORT(const PDMIOAPICHLPRC) g_pdmRCIoApicHlp;
65extern DECLEXPORT(const PDMPCIHLPRC) g_pdmRCPciHlp;
66__END_DECLS
67
68
69/*******************************************************************************
70* Internal Functions *
71*******************************************************************************/
72/** @name GC Device Helpers
73 * @{
74 */
75static DECLCALLBACK(void) pdmGCDevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
76static DECLCALLBACK(void) pdmGCDevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
77static DECLCALLBACK(void) pdmGCDevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead);
78static DECLCALLBACK(void) pdmGCDevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite);
79static DECLCALLBACK(bool) pdmGCDevHlp_A20IsEnabled(PPDMDEVINS pDevIns);
80static DECLCALLBACK(int) pdmGCDevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...);
81static DECLCALLBACK(int) pdmGCDevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va);
82static DECLCALLBACK(int) pdmGCDevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...);
83static DECLCALLBACK(int) pdmGCDevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va);
84static DECLCALLBACK(int) pdmGCDevHlp_PATMSetMMIOPatchInfo(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData);
85/** @} */
86
87
88/** @name PIC GC Helpers
89 * @{
90 */
91static DECLCALLBACK(void) pdmGCPicHlp_SetInterruptFF(PPDMDEVINS pDevIns);
92static DECLCALLBACK(void) pdmGCPicHlp_ClearInterruptFF(PPDMDEVINS pDevIns);
93static DECLCALLBACK(int) pdmGCPicHlp_Lock(PPDMDEVINS pDevIns, int rc);
94static DECLCALLBACK(void) pdmGCPicHlp_Unlock(PPDMDEVINS pDevIns);
95/** @} */
96
97
98/** @name APIC RC Helpers
99 * @{
100 */
101static DECLCALLBACK(void) pdmRCApicHlp_SetInterruptFF(PPDMDEVINS pDevIns);
102static DECLCALLBACK(void) pdmRCApicHlp_ClearInterruptFF(PPDMDEVINS pDevIns);
103static DECLCALLBACK(void) pdmRCApicHlp_ChangeFeature(PPDMDEVINS pDevIns, bool fEnabled);
104static DECLCALLBACK(int) pdmRCApicHlp_Lock(PPDMDEVINS pDevIns, int rc);
105static DECLCALLBACK(void) pdmRCApicHlp_Unlock(PPDMDEVINS pDevIns);
106/** @} */
107
108
109/** @name I/O APIC RC Helpers
110 * @{
111 */
112static DECLCALLBACK(void) pdmRCIoApicHlp_ApicBusDeliver(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
113 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode);
114static DECLCALLBACK(int) pdmRCIoApicHlp_Lock(PPDMDEVINS pDevIns, int rc);
115static DECLCALLBACK(void) pdmRCIoApicHlp_Unlock(PPDMDEVINS pDevIns);
116/** @} */
117
118
119/** @name PCI Bus RC Helpers
120 * @{
121 */
122static DECLCALLBACK(void) pdmRCPciHlp_IsaSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
123static DECLCALLBACK(void) pdmRCPciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
124static DECLCALLBACK(int) pdmRCPciHlp_Lock(PPDMDEVINS pDevIns, int rc);
125static DECLCALLBACK(void) pdmRCPciHlp_Unlock(PPDMDEVINS pDevIns);
126/** @} */
127
128
129static void pdmGCIsaSetIrq(PVM pVM, int iIrq, int iLevel);
130static void pdmGCIoApicSetIrq(PVM pVM, int iIrq, int iLevel);
131
132
133
134/**
135 * The Guest Context Device Helper Callbacks.
136 */
137extern DECLEXPORT(const PDMDEVHLPGC) g_pdmGCDevHlp =
138{
139 PDM_DEVHLPGC_VERSION,
140 pdmGCDevHlp_PCISetIrq,
141 pdmGCDevHlp_ISASetIrq,
142 pdmGCDevHlp_PhysRead,
143 pdmGCDevHlp_PhysWrite,
144 pdmGCDevHlp_A20IsEnabled,
145 pdmGCDevHlp_VMSetError,
146 pdmGCDevHlp_VMSetErrorV,
147 pdmGCDevHlp_VMSetRuntimeError,
148 pdmGCDevHlp_VMSetRuntimeErrorV,
149 pdmGCDevHlp_PATMSetMMIOPatchInfo,
150 PDM_DEVHLPGC_VERSION
151};
152
153/**
154 * The Guest Context PIC Helper Callbacks.
155 */
156extern DECLEXPORT(const PDMPICHLPGC) g_pdmGCPicHlp =
157{
158 PDM_PICHLPGC_VERSION,
159 pdmGCPicHlp_SetInterruptFF,
160 pdmGCPicHlp_ClearInterruptFF,
161 pdmGCPicHlp_Lock,
162 pdmGCPicHlp_Unlock,
163 PDM_PICHLPGC_VERSION
164};
165
166
167/**
168 * The Raw-Mode Context APIC Helper Callbacks.
169 */
170extern DECLEXPORT(const PDMAPICHLPRC) g_pdmRCApicHlp =
171{
172 PDM_APICHLPRC_VERSION,
173 pdmRCApicHlp_SetInterruptFF,
174 pdmRCApicHlp_ClearInterruptFF,
175 pdmRCApicHlp_ChangeFeature,
176 pdmRCApicHlp_Lock,
177 pdmRCApicHlp_Unlock,
178 PDM_APICHLPRC_VERSION
179};
180
181
182/**
183 * The Raw-Mode Context I/O APIC Helper Callbacks.
184 */
185extern DECLEXPORT(const PDMIOAPICHLPRC) g_pdmRCIoApicHlp =
186{
187 PDM_IOAPICHLPRC_VERSION,
188 pdmRCIoApicHlp_ApicBusDeliver,
189 pdmRCIoApicHlp_Lock,
190 pdmRCIoApicHlp_Unlock,
191 PDM_IOAPICHLPRC_VERSION
192};
193
194
195/**
196 * The Raw-Mode Context PCI Bus Helper Callbacks.
197 */
198extern DECLEXPORT(const PDMPCIHLPRC) g_pdmRCPciHlp =
199{
200 PDM_PCIHLPRC_VERSION,
201 pdmRCPciHlp_IsaSetIrq,
202 pdmRCPciHlp_IoApicSetIrq,
203 pdmRCPciHlp_Lock,
204 pdmRCPciHlp_Unlock,
205 PDM_PCIHLPRC_VERSION, /* the end */
206};
207
208
209
210
211/** @copydoc PDMDEVHLPGC::pfnPCISetIrq */
212static DECLCALLBACK(void) pdmGCDevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
213{
214 PDMDEV_ASSERT_DEVINS(pDevIns);
215 LogFlow(("pdmGCDevHlp_PCISetIrq: caller=%p/%d: iIrq=%d iLevel=%d\n", pDevIns, pDevIns->iInstance, iIrq, iLevel));
216
217 PVM pVM = pDevIns->Internal.s.pVMGC;
218 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceGC;
219 PPDMPCIBUS pPciBus = pDevIns->Internal.s.pPciBusGC;
220 if ( pPciDev
221 && pPciBus
222 && pPciBus->pDevInsRC)
223 {
224 pdmLock(pVM);
225 pPciBus->pfnSetIrqRC(pPciBus->pDevInsRC, pPciDev, iIrq, iLevel);
226 pdmUnlock(pVM);
227 }
228 else
229 {
230 /* queue for ring-3 execution. */
231 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)PDMQueueAlloc(pVM->pdm.s.pDevHlpQueueGC);
232 if (pTask)
233 {
234 pTask->enmOp = PDMDEVHLPTASKOP_PCI_SET_IRQ;
235 pTask->pDevInsHC = MMHyperGC2HC(pVM, pDevIns);
236 pTask->u.SetIRQ.iIrq = iIrq;
237 pTask->u.SetIRQ.iLevel = iLevel;
238
239 PDMQueueInsertEx(pVM->pdm.s.pDevHlpQueueGC, &pTask->Core, 0);
240 }
241 else
242 AssertMsgFailed(("We're out of devhlp queue items!!!\n"));
243 }
244
245 LogFlow(("pdmGCDevHlp_PCISetIrq: caller=%p/%d: returns void\n", pDevIns, pDevIns->iInstance));
246}
247
248
249/** @copydoc PDMDEVHLPGC::pfnPCISetIrq */
250static DECLCALLBACK(void) pdmGCDevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
251{
252 PDMDEV_ASSERT_DEVINS(pDevIns);
253 LogFlow(("pdmGCDevHlp_ISASetIrq: caller=%p/%d: iIrq=%d iLevel=%d\n", pDevIns, pDevIns->iInstance, iIrq, iLevel));
254
255 pdmGCIsaSetIrq(pDevIns->Internal.s.pVMGC, iIrq, iLevel);
256
257 LogFlow(("pdmGCDevHlp_ISASetIrq: caller=%p/%d: returns void\n", pDevIns, pDevIns->iInstance));
258}
259
260
261/** @copydoc PDMDEVHLPGC::pfnPhysRead */
262static DECLCALLBACK(void) pdmGCDevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
263{
264 PDMDEV_ASSERT_DEVINS(pDevIns);
265 LogFlow(("pdmGCDevHlp_PhysRead: caller=%p/%d: GCPhys=%VGp pvBuf=%p cbRead=%#x\n",
266 pDevIns, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
267
268 PGMPhysRead(pDevIns->Internal.s.pVMGC, GCPhys, pvBuf, cbRead);
269
270 Log(("pdmGCDevHlp_PhysRead: caller=%p/%d: returns void\n", pDevIns, pDevIns->iInstance));
271}
272
273
274/** @copydoc PDMDEVHLPGC::pfnPhysWrite */
275static DECLCALLBACK(void) pdmGCDevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
276{
277 PDMDEV_ASSERT_DEVINS(pDevIns);
278 LogFlow(("pdmGCDevHlp_PhysWrite: caller=%p/%d: GCPhys=%VGp pvBuf=%p cbWrite=%#x\n",
279 pDevIns, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
280
281 PGMPhysWrite(pDevIns->Internal.s.pVMGC, GCPhys, pvBuf, cbWrite);
282
283 Log(("pdmGCDevHlp_PhysWrite: caller=%p/%d: returns void\n", pDevIns, pDevIns->iInstance));
284}
285
286
287/** @copydoc PDMDEVHLPGC::pfnA20IsEnabled */
288static DECLCALLBACK(bool) pdmGCDevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
289{
290 PDMDEV_ASSERT_DEVINS(pDevIns);
291 LogFlow(("pdmGCDevHlp_A20IsEnabled: caller=%p/%d:\n", pDevIns, pDevIns->iInstance));
292
293 bool fEnabled = PGMPhysIsA20Enabled(pDevIns->Internal.s.pVMGC);
294
295 Log(("pdmGCDevHlp_A20IsEnabled: caller=%p/%d: returns %RTbool\n", pDevIns, pDevIns->iInstance, fEnabled));
296 return fEnabled;
297}
298
299
300/** @copydoc PDMDEVHLPGC::pfnVMSetError */
301static DECLCALLBACK(int) pdmGCDevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
302{
303 PDMDEV_ASSERT_DEVINS(pDevIns);
304 va_list args;
305 va_start(args, pszFormat);
306 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMGC, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
307 va_end(args);
308 return rc;
309}
310
311
312/** @copydoc PDMDEVHLPGC::pfnVMSetErrorV */
313static DECLCALLBACK(int) pdmGCDevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
314{
315 PDMDEV_ASSERT_DEVINS(pDevIns);
316 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMGC, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
317 return rc;
318}
319
320
321/** @copydoc PDMDEVHLPGC::pfnVMSetRuntimeError */
322static DECLCALLBACK(int) pdmGCDevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...)
323{
324 PDMDEV_ASSERT_DEVINS(pDevIns);
325 va_list args;
326 va_start(args, pszFormat);
327 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMGC, fFatal, pszErrorID, pszFormat, args);
328 va_end(args);
329 return rc;
330}
331
332
333/** @copydoc PDMDEVHLPGC::pfnVMSetErrorV */
334static DECLCALLBACK(int) pdmGCDevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va)
335{
336 PDMDEV_ASSERT_DEVINS(pDevIns);
337 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMGC, fFatal, pszErrorID, pszFormat, va);
338 return rc;
339}
340
341
342/** @copydoc PDMDEVHLPGC::pdmGCDevHlp_PATMSetMMIOPatchInfo */
343static DECLCALLBACK(int) pdmGCDevHlp_PATMSetMMIOPatchInfo(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData)
344{
345 PDMDEV_ASSERT_DEVINS(pDevIns);
346 LogFlow(("pdmGCDevHlp_PATMSetMMIOPatchInfo: caller=%p/%d:\n", pDevIns, pDevIns->iInstance));
347
348 return PATMSetMMIOPatchInfo(pDevIns->Internal.s.pVMGC, GCPhys, (RTRCPTR)pCachedData);
349}
350
351
352
353
354/** @copydoc PDMPICHLPGC::pfnSetInterruptFF */
355static DECLCALLBACK(void) pdmGCPicHlp_SetInterruptFF(PPDMDEVINS pDevIns)
356{
357 PDMDEV_ASSERT_DEVINS(pDevIns);
358 LogFlow(("pdmGCPicHlp_SetInterruptFF: caller=%p/%d: VM_FF_INTERRUPT_PIC %d -> 1\n",
359 pDevIns, pDevIns->iInstance, VM_FF_ISSET(pDevIns->Internal.s.pVMGC, VM_FF_INTERRUPT_PIC)));
360 VM_FF_SET(pDevIns->Internal.s.pVMGC, VM_FF_INTERRUPT_PIC);
361}
362
363
364/** @copydoc PDMPICHLPGC::pfnClearInterruptFF */
365static DECLCALLBACK(void) pdmGCPicHlp_ClearInterruptFF(PPDMDEVINS pDevIns)
366{
367 PDMDEV_ASSERT_DEVINS(pDevIns);
368 LogFlow(("pdmGCPicHlp_ClearInterruptFF: caller=%p/%d: VM_FF_INTERRUPT_PIC %d -> 0\n",
369 pDevIns, pDevIns->iInstance, VM_FF_ISSET(pDevIns->Internal.s.pVMGC, VM_FF_INTERRUPT_PIC)));
370 VM_FF_CLEAR(pDevIns->Internal.s.pVMGC, VM_FF_INTERRUPT_PIC);
371}
372
373
374/** @copydoc PDMPICHLPGC::pfnLock */
375static DECLCALLBACK(int) pdmGCPicHlp_Lock(PPDMDEVINS pDevIns, int rc)
376{
377 PDMDEV_ASSERT_DEVINS(pDevIns);
378 return pdmLockEx(pDevIns->Internal.s.pVMGC, rc);
379}
380
381
382/** @copydoc PDMPICHLPGC::pfnUnlock */
383static DECLCALLBACK(void) pdmGCPicHlp_Unlock(PPDMDEVINS pDevIns)
384{
385 PDMDEV_ASSERT_DEVINS(pDevIns);
386 pdmUnlock(pDevIns->Internal.s.pVMGC);
387}
388
389
390
391
392/** @copydoc PDMAPICHLPGC::pfnSetInterruptFF */
393static DECLCALLBACK(void) pdmRCApicHlp_SetInterruptFF(PPDMDEVINS pDevIns)
394{
395 PDMDEV_ASSERT_DEVINS(pDevIns);
396 LogFlow(("pdmRCApicHlp_SetInterruptFF: caller=%p/%d: VM_FF_INTERRUPT %d -> 1\n",
397 pDevIns, pDevIns->iInstance, VM_FF_ISSET(pDevIns->Internal.s.pVMGC, VM_FF_INTERRUPT_APIC)));
398 VM_FF_SET(pDevIns->Internal.s.pVMGC, VM_FF_INTERRUPT_APIC);
399}
400
401
402/** @copydoc PDMAPICHLPGC::pfnClearInterruptFF */
403static DECLCALLBACK(void) pdmRCApicHlp_ClearInterruptFF(PPDMDEVINS pDevIns)
404{
405 PDMDEV_ASSERT_DEVINS(pDevIns);
406 LogFlow(("pdmRCApicHlp_ClearInterruptFF: caller=%p/%d: VM_FF_INTERRUPT %d -> 0\n",
407 pDevIns, pDevIns->iInstance, VM_FF_ISSET(pDevIns->Internal.s.pVMGC, VM_FF_INTERRUPT_APIC)));
408 VM_FF_CLEAR(pDevIns->Internal.s.pVMGC, VM_FF_INTERRUPT_APIC);
409}
410
411
412/** @copydoc PDMAPICHLPGC::pfnChangeFeature */
413static DECLCALLBACK(void) pdmRCApicHlp_ChangeFeature(PPDMDEVINS pDevIns, bool fEnabled)
414{
415 PDMDEV_ASSERT_DEVINS(pDevIns);
416 LogFlow(("pdmRCApicHlp_ChangeFeature: caller=%p/%d: fEnabled=%RTbool\n", pDevIns, pDevIns->iInstance, fEnabled));
417 if (fEnabled)
418 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMGC, CPUMCPUIDFEATURE_APIC);
419 else
420 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMGC, CPUMCPUIDFEATURE_APIC);
421}
422
423
424/** @copydoc PDMAPICHLPGC::pfnLock */
425static DECLCALLBACK(int) pdmRCApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
426{
427 PDMDEV_ASSERT_DEVINS(pDevIns);
428 return pdmLockEx(pDevIns->Internal.s.pVMGC, rc);
429}
430
431
432/** @copydoc PDMAPICHLPGC::pfnUnlock */
433static DECLCALLBACK(void) pdmRCApicHlp_Unlock(PPDMDEVINS pDevIns)
434{
435 PDMDEV_ASSERT_DEVINS(pDevIns);
436 pdmUnlock(pDevIns->Internal.s.pVMGC);
437}
438
439
440
441
442/** @copydoc PDMIOAPICHLPGC::pfnApicBusDeliver */
443static DECLCALLBACK(void) pdmRCIoApicHlp_ApicBusDeliver(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
444 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode)
445{
446 PDMDEV_ASSERT_DEVINS(pDevIns);
447 PVM pVM = pDevIns->Internal.s.pVMGC;
448 LogFlow(("pdmRCIoApicHlp_ApicBusDeliver: caller=%p/%d: u8Dest=%RX8 u8DestMode=%RX8 u8DeliveryMode=%RX8 iVector=%RX8 u8Polarity=%RX8 u8TriggerMode=%RX8\n",
449 pDevIns, pDevIns->iInstance, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode));
450 if (pVM->pdm.s.Apic.pfnBusDeliverRC)
451 pVM->pdm.s.Apic.pfnBusDeliverRC(pVM->pdm.s.Apic.pDevInsRC, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode);
452}
453
454
455/** @copydoc PDMIOAPICHLPGC::pfnLock */
456static DECLCALLBACK(int) pdmRCIoApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
457{
458 PDMDEV_ASSERT_DEVINS(pDevIns);
459 return pdmLockEx(pDevIns->Internal.s.pVMGC, rc);
460}
461
462
463/** @copydoc PDMIOAPICHLPGC::pfnUnlock */
464static DECLCALLBACK(void) pdmRCIoApicHlp_Unlock(PPDMDEVINS pDevIns)
465{
466 PDMDEV_ASSERT_DEVINS(pDevIns);
467 pdmUnlock(pDevIns->Internal.s.pVMGC);
468}
469
470
471
472
473/** @copydoc PDMPCIHLPGC::pfnIsaSetIrq */
474static DECLCALLBACK(void) pdmRCPciHlp_IsaSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
475{
476 PDMDEV_ASSERT_DEVINS(pDevIns);
477 Log4(("pdmRCPciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
478 pdmGCIsaSetIrq(pDevIns->Internal.s.pVMGC, iIrq, iLevel);
479}
480
481
482/** @copydoc PDMPCIHLPGC::pfnIoApicSetIrq */
483static DECLCALLBACK(void) pdmRCPciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
484{
485 PDMDEV_ASSERT_DEVINS(pDevIns);
486 Log4(("pdmRCPciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
487 pdmGCIoApicSetIrq(pDevIns->Internal.s.pVMGC, iIrq, iLevel);
488}
489
490
491/** @copydoc PDMPCIHLPGC::pfnLock */
492static DECLCALLBACK(int) pdmRCPciHlp_Lock(PPDMDEVINS pDevIns, int rc)
493{
494 PDMDEV_ASSERT_DEVINS(pDevIns);
495 return pdmLockEx(pDevIns->Internal.s.pVMGC, rc);
496}
497
498
499/** @copydoc PDMPCIHLPGC::pfnUnlock */
500static DECLCALLBACK(void) pdmRCPciHlp_Unlock(PPDMDEVINS pDevIns)
501{
502 PDMDEV_ASSERT_DEVINS(pDevIns);
503 pdmUnlock(pDevIns->Internal.s.pVMGC);
504}
505
506
507
508
509/**
510 * Sets an irq on the I/O APIC.
511 *
512 * @param pVM The VM handle.
513 * @param iIrq The irq.
514 * @param iLevel The new level.
515 */
516static void pdmGCIsaSetIrq(PVM pVM, int iIrq, int iLevel)
517{
518 if ( ( pVM->pdm.s.IoApic.pDevInsRC
519 || !pVM->pdm.s.IoApic.pDevInsR3)
520 && ( pVM->pdm.s.Pic.pDevInsGC
521 || !pVM->pdm.s.Pic.pDevInsR3))
522 {
523 pdmLock(pVM);
524 if (pVM->pdm.s.Pic.pDevInsGC)
525 pVM->pdm.s.Pic.pfnSetIrqGC(pVM->pdm.s.Pic.pDevInsGC, iIrq, iLevel);
526 if (pVM->pdm.s.IoApic.pDevInsRC)
527 pVM->pdm.s.IoApic.pfnSetIrqRC(pVM->pdm.s.IoApic.pDevInsRC, iIrq, iLevel);
528 pdmUnlock(pVM);
529 }
530 else
531 {
532 /* queue for ring-3 execution. */
533 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)PDMQueueAlloc(pVM->pdm.s.pDevHlpQueueGC);
534 if (pTask)
535 {
536 pTask->enmOp = PDMDEVHLPTASKOP_ISA_SET_IRQ;
537 pTask->pDevInsHC = 0; /* not required */
538 pTask->u.SetIRQ.iIrq = iIrq;
539 pTask->u.SetIRQ.iLevel = iLevel;
540
541 PDMQueueInsertEx(pVM->pdm.s.pDevHlpQueueGC, &pTask->Core, 0);
542 }
543 else
544 AssertMsgFailed(("We're out of devhlp queue items!!!\n"));
545 }
546}
547
548
549/**
550 * Sets an irq on the I/O APIC.
551 *
552 * @param pVM The VM handle.
553 * @param iIrq The irq.
554 * @param iLevel The new level.
555 */
556static void pdmGCIoApicSetIrq(PVM pVM, int iIrq, int iLevel)
557{
558 if (pVM->pdm.s.IoApic.pDevInsRC)
559 {
560 pdmLock(pVM);
561 pVM->pdm.s.IoApic.pfnSetIrqRC(pVM->pdm.s.IoApic.pDevInsRC, iIrq, iLevel);
562 pdmUnlock(pVM);
563 }
564 else if (pVM->pdm.s.IoApic.pDevInsR3)
565 {
566 /* queue for ring-3 execution. */
567 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)PDMQueueAlloc(pVM->pdm.s.pDevHlpQueueGC);
568 if (pTask)
569 {
570 pTask->enmOp = PDMDEVHLPTASKOP_IOAPIC_SET_IRQ;
571 pTask->pDevInsHC = 0; /* not required */
572 pTask->u.SetIRQ.iIrq = iIrq;
573 pTask->u.SetIRQ.iLevel = iLevel;
574
575 PDMQueueInsertEx(pVM->pdm.s.pDevHlpQueueGC, &pTask->Core, 0);
576 }
577 else
578 AssertMsgFailed(("We're out of devhlp queue items!!!\n"));
579 }
580}
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