TRPMGCHandlers.cpp@ 1

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1	/** @file
2	*
3	* TRPM - Guest Context Trap Handlers, CPP part
4	*/
5
6	/*
7	* Copyright (C) 2006 InnoTek Systemberatung GmbH
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License as published by the Free Software Foundation,
13	* in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14	* distribution. VirtualBox OSE is distributed in the hope that it will
15	* be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* If you received this file as part of a commercial VirtualBox
18	* distribution, then only the terms of your commercial VirtualBox
19	* license agreement apply instead of the previous paragraph.
20	*/
21
22
23	/*******************************************************************************
24	* Header Files *
25	*******************************************************************************/
26	#define LOG_GROUP LOG_GROUP_TRPM
27	#include <VBox/selm.h>
28	#include <VBox/iom.h>
29	#include <VBox/pgm.h>
30	#include <VBox/pdm.h>
31	#include <VBox/dbgf.h>
32	#include <VBox/em.h>
33	#include <VBox/csam.h>
34	#include <VBox/patm.h>
35	#include <VBox/mm.h>
36	#include <VBox/cpum.h>
37	#include "TRPMInternal.h"
38	#include <VBox/vm.h>
39
40	#include <VBox/err.h>
41	#include <VBox/dis.h>
42	#include <VBox/disopcode.h>
43	#include <VBox/x86.h>
44	#include <VBox/log.h>
45	#include <VBox/tm.h>
46	#include <iprt/asm.h>
47	#include <iprt/assert.h>
48
49	/* still here. MODR/M byte parsing */
50	#define X86_OPCODE_MODRM_MOD_MASK 0xc0
51	#define X86_OPCODE_MODRM_REG_MASK 0x38
52	#define X86_OPCODE_MODRM_RM_MASK 0x07
53
54	/** Pointer to a readonly hypervisor trap record. */
55	typedef const struct TRPMGCHYPER *PCTRPMGCHYPER;
56
57	/**
58	* A hypervisor trap record.
59	* This contains information about a handler for a instruction range.
60	*
61	* @remark This must match what TRPM_HANDLER outputs.
62	*/
63	typedef struct TRPMGCHYPER
64	{
65	/** The start address. */
66	uintptr_t uStartEIP;
67	/** The end address. (exclusive)
68	* If NULL the it's only for the instruction at pvStartEIP. */
69	uintptr_t uEndEIP;
70	/**
71	* The handler.
72	*
73	* @returns VBox status code
74	* VINF_SUCCESS means we've handled the trap.
75	* Any other error code means returning to the host context.
76	* @param pVM The VM handle.
77	* @param pRegFrame The register frame.
78	* @param uUser The user argument.
79	*/
80	DECLCALLBACKMEMBER(int, pfnHandler)(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser);
81	/** Whatever the handler desires to put here. */
82	uintptr_t uUser;
83	} TRPMGCHYPER;
84
85
86	/*******************************************************************************
87	* Global Variables *
88	*******************************************************************************/
89	__BEGIN_DECLS
90	/** Defined in VMMGC0.asm or VMMGC99.asm.
91	* @{ */
92	extern const TRPMGCHYPER g_aTrap0bHandlers[1];
93	extern const TRPMGCHYPER g_aTrap0bHandlersEnd[1];
94	extern const TRPMGCHYPER g_aTrap0dHandlers[1];
95	extern const TRPMGCHYPER g_aTrap0dHandlersEnd[1];
96	extern const TRPMGCHYPER g_aTrap0eHandlers[1];
97	extern const TRPMGCHYPER g_aTrap0eHandlersEnd[1];
98	/** @} */
99	__END_DECLS
100
101
102	/*******************************************************************************
103	* Internal Functions *
104	*******************************************************************************/
105	__BEGIN_DECLS /* addressed from asm (not called so no DECLASM). */
106	DECLCALLBACK(int) trpmGCTrapInGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser);
107	__END_DECLS
108
109
110
111	/**
112	* Exits the trap, called when exiting a trap handler.
113	*
114	* Will reset the trap if it's not a guest trap or the trap
115	* is already handled. Will process resume guest FFs.
116	*
117	* @returns rc.
118	* @param pVM VM handle.
119	* @param rc The VBox status code to return.
120	* @param pRegFrame Pointer to the register frame for the trap.
121	*/
122	static int trpmGCExitTrap(PVM pVM, int rc, PCPUMCTXCORE pRegFrame)
123	{
124	/* Reset trap? */
125	if ( rc != VINF_EM_RAW_GUEST_TRAP
126	&& rc != VINF_EM_RAW_RING_SWITCH_INT)
127	pVM->trpm.s.uActiveVector = ~0;
128
129	#ifdef VBOX_HIGH_RES_TIMERS_HACK
130	/*
131	* Occationally we should poll timers.
132	* We must NOT do this too frequently as it adds a significant overhead
133	* and it'll kill us if the trap load is high. (See #1354.)
134	* (The heuristic is not very intelligent, we should really check trap
135	* frequency etc. here, but alas, we lack any such information atm.)
136	*/
137	static unsigned s_iTimerPoll = 0;
138	if (rc == VINF_SUCCESS)
139	{
140	if (!(++s_iTimerPoll & 0xf))
141	{
142	uint64_t cTicks = TMTimerPoll(pVM); NOREF(cTicks);
143	Log2(("TMTimerPoll at %VGv returned %RX64 (VM_FF_TIMER=%d)\n", pRegFrame->eip, cTicks, VM_FF_ISPENDING(pVM, VM_FF_TIMER)));
144	}
145	}
146	else
147	s_iTimerPoll = 0;
148	#endif
149
150	/* Clear pending inhibit interrupt state if required. (necessary for dispatching interrupts later on) */
151	if (VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS))
152	{
153	Log2(("VM_FF_INHIBIT_INTERRUPTS at %VGv successor %VGv\n", pRegFrame->eip, EMGetInhibitInterruptsPC(pVM)));
154	if (pRegFrame->eip != EMGetInhibitInterruptsPC(pVM))
155	{
156	/** @note we intentionally don't clear VM_FF_INHIBIT_INTERRUPTS here if the eip is the same as the inhibited instr address.
157	* Before we are able to execute this instruction in raw mode (iret to guest code) an external interrupt might
158	* force a world switch again. Possibly allowing a guest interrupt to be dispatched in the process. This could
159	* break the guest. Sounds very unlikely, but such timing sensitive problem are not as rare as you might think.
160	*/
161	VM_FF_CLEAR(pVM, VM_FF_INHIBIT_INTERRUPTS);
162	}
163	}
164
165	/*
166	* Pending resume-guest-FF?
167	* Or pending (A)PIC interrupt? Windows XP will crash if we delay APIC interrupts.
168	*/
169	if ( rc == VINF_SUCCESS
170	&& VM_FF_ISPENDING(pVM, VM_FF_TO_R3 \| VM_FF_TIMER \| VM_FF_INTERRUPT_APIC \| VM_FF_INTERRUPT_PIC \| VM_FF_PGM_SYNC_CR3 \| VM_FF_PGM_SYNC_CR3_NON_GLOBAL \| VM_FF_REQUEST))
171	{
172	/* Pending Ring-3 action. */
173	if (VM_FF_ISPENDING(pVM, VM_FF_TO_R3))
174	{
175	VM_FF_CLEAR(pVM, VM_FF_TO_R3);
176	rc = VINF_EM_RAW_TO_R3;
177	}
178	/* Pending timer action. */
179	else if (VM_FF_ISPENDING(pVM, VM_FF_TIMER))
180	rc = VINF_EM_RAW_TIMER_PENDING;
181	/* Pending interrupt: dispatch it. */
182	else if ( VM_FF_ISPENDING(pVM, VM_FF_INTERRUPT_APIC \| VM_FF_INTERRUPT_PIC)
183	&& !VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS)
184	&& PATMAreInterruptsEnabledByCtxCore(pVM, pRegFrame)
185	)
186	{
187	uint8_t u8Interrupt;
188	rc = PDMGetInterrupt(pVM, &u8Interrupt);
189	Log(("trpmGCExitTrap: u8Interrupt=%d (%#x) rc=%Vrc\n", u8Interrupt, u8Interrupt, rc));
190	AssertFatalMsgRC(rc, ("PDMGetInterrupt failed with %Vrc\n", rc));
191	rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)u8Interrupt, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_HARDWARE_INT);
192	/* can't return if successful */
193	Assert(rc != VINF_SUCCESS);
194
195	/* Assert the trap and go to the recompiler to dispatch it. */
196	TRPMAssertTrap(pVM, u8Interrupt, false);
197	rc = VINF_EM_RAW_INTERRUPT_PENDING;
198	}
199	/*
200	* Try sync CR3?
201	* This ASSUMES that the MOV CRx, x emulation doesn't return with VINF_PGM_SYNC_CR3. (a bit hackish)
202	*/
203	else if (VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 \| VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
204	#if 1
205	rc = PGMSyncCR3(pVM, CPUMGetGuestCR0(pVM), CPUMGetGuestCR3(pVM), CPUMGetGuestCR4(pVM), VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3));
206	#else
207	rc = VINF_PGM_SYNC_CR3;
208	#endif
209	/* Pending request packets might contain actions that need immediate attention, such as pending hardware interrupts. */
210	else if (VM_FF_ISPENDING(pVM, VM_FF_REQUEST))
211	rc = VINF_EM_PENDING_REQUEST;
212	}
213
214	AssertMsg( rc != VINF_SUCCESS
215	\|\| ( pRegFrame->eflags.Bits.u1IF
216	&& pRegFrame->eflags.Bits.u2IOPL < (unsigned)(pRegFrame->ss & X86_SEL_RPL))
217	, ("rc = %VGv\neflags=%RX32 ss=%RTsel IOPL=%d\n", rc, pRegFrame->eflags.u32, pRegFrame->ss, pRegFrame->eflags.Bits.u2IOPL));
218	return rc;
219	}
220
221
222	/**
223	* \#DB (Debug event) handler.
224	*
225	* @returns VBox status code.
226	* VINF_SUCCESS means we completely handled this trap,
227	* other codes are passed execution to host context.
228	*
229	* @param pTrpm Pointer to TRPM data (within VM).
230	* @param pRegFrame Pointer to the register frame for the trap.
231	* @internal
232	*/
233	DECLASM(int) TRPMGCTrap01Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
234	{
235	RTGCUINTREG uDr6 = ASMGetAndClearDR6();
236	PVM pVM = TRPM2VM(pTrpm);
237	LogFlow(("TRPMGCTrap01Handler: cs:eip=%04x:%08x uDr6=%RTreg\n", pRegFrame->cs, pRegFrame->eip, uDr6));
238
239	/*
240	* We currently don't make sure of the X86_DR7_GD bit, but
241	* there might come a time when we do.
242	*/
243	if ((uDr6 & X86_DR6_BD) == X86_DR6_BD)
244	{
245	AssertReleaseMsgFailed(("X86_DR6_BD isn't used, but it's set! dr7=%RTreg(%RTreg) dr6=%RTreg\n",
246	ASMGetDR7(), CPUMGetHyperDR7(pVM), uDr6));
247	return VERR_NOT_IMPLEMENTED;
248	}
249
250	AssertReleaseMsg(!(uDr6 & X86_DR6_BT), ("X86_DR6_BT is impossible!\n"));
251
252	/*
253	* Now leave the rest to the DBGF.
254	*/
255	int rc = DBGFGCTrap01Handler(pVM, pRegFrame, uDr6);
256	if (rc == VINF_EM_RAW_GUEST_TRAP)
257	CPUMSetGuestDR6(pVM, uDr6);
258
259	return trpmGCExitTrap(pVM, rc, pRegFrame);
260	}
261
262
263
264	/**
265	* NMI handler, for when we are using NMIs to debug things.
266	*
267	* @returns VBox status code.
268	* VINF_SUCCESS means we completely handled this trap,
269	* other codes are passed execution to host context.
270	*
271	* @param pTrpm Pointer to TRPM data (within VM).
272	* @param pRegFrame Pointer to the register frame for the trap.
273	* @internal
274	* @remark This is not hooked up unless you're building with VBOX_WITH_NMI defined.
275	*/
276	DECLASM(int) TRPMGCTrap02Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
277	{
278	LogFlow(("TRPMGCTrap02Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
279	RTLogComPrintf("TRPMGCTrap02Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip);
280	return VERR_TRPM_DONT_PANIC;
281	}
282
283
284	/**
285	* \#BP (Breakpoint) handler.
286	*
287	* @returns VBox status code.
288	* VINF_SUCCESS means we completely handled this trap,
289	* other codes are passed execution to host context.
290	*
291	* @param pTrpm Pointer to TRPM data (within VM).
292	* @param pRegFrame Pointer to the register frame for the trap.
293	* @internal
294	*/
295	DECLASM(int) TRPMGCTrap03Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
296	{
297	LogFlow(("TRPMGCTrap03Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
298	PVM pVM = TRPM2VM(pTrpm);
299	int rc;
300
301	/*
302	* Both PATM are using INT3s, let them have a go first.
303	*/
304	if ((pRegFrame->ss & X86_SEL_RPL) == 1)
305	{
306	rc = PATMHandleInt3PatchTrap(pVM, pRegFrame);
307	if (rc == VINF_SUCCESS \|\| rc == VINF_EM_RAW_EMULATE_INSTR \|\| rc == VINF_PATM_PATCH_INT3 \|\| rc == VINF_PATM_DUPLICATE_FUNCTION)
308	return trpmGCExitTrap(pVM, rc, pRegFrame);
309	}
310	rc = DBGFGCTrap03Handler(pVM, pRegFrame);
311	/* anything we should do with this? Schedule it in GC? */
312	return trpmGCExitTrap(pVM, rc, pRegFrame);
313	}
314
315
316	/**
317	* Trap handler for illegal opcode fault (\#UD).
318	*
319	* @returns VBox status code.
320	* VINF_SUCCESS means we completely handled this trap,
321	* other codes are passed execution to host context.
322	*
323	* @param pTrpm Pointer to TRPM data (within VM).
324	* @param pRegFrame Pointer to the register frame for the trap.
325	* @internal
326	*/
327	DECLASM(int) TRPMGCTrap06Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
328	{
329	PVM pVM = TRPM2VM(pTrpm);
330
331	LogFlow(("TRPMGCTrap06Handler %VGv\n", pRegFrame->eip));
332
333	if ( (pRegFrame->ss & X86_SEL_RPL) == 1
334	&& PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
335	{
336	/*
337	* Decode the instruction.
338	*/
339	RTGCPTR PC;
340	int rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &PC);
341	if (VBOX_FAILURE(rc))
342	{
343	Log(("TRPMGCTrap06Handler: Failed to convert %RTsel:%RX32 (cpl=%d) - rc=%Vrc !!\n", pRegFrame->cs, pRegFrame->eip, pRegFrame->ss & X86_SEL_RPL, rc));
344	return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
345	}
346
347	DISCPUSTATE Cpu;
348	uint32_t cbOp;
349	rc = EMInterpretDisasOneEx(pVM, (RTGCUINTPTR)PC, pRegFrame, &Cpu, &cbOp);
350	if (VBOX_FAILURE(rc))
351	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
352
353	/** @note monitor causes an #UD exception instead of #GP when not executed in ring 0. */
354	if (Cpu.pCurInstr->opcode == OP_ILLUD2)
355	{
356	int rc = PATMHandleIllegalInstrTrap(pVM, pRegFrame);
357	if (rc == VINF_SUCCESS \|\| rc == VINF_EM_RAW_EMULATE_INSTR \|\| rc == VINF_PATM_DUPLICATE_FUNCTION)
358	return trpmGCExitTrap(pVM, rc, pRegFrame);
359	}
360	}
361	return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
362	}
363
364
365	/**
366	* Trap handler for device not present fault (\#NM).
367	*
368	* Device not available, FP or (F)WAIT instruction.
369	*
370	* @returns VBox status code.
371	* VINF_SUCCESS means we completely handled this trap,
372	* other codes are passed execution to host context.
373	*
374	* @param pTrpm Pointer to TRPM data (within VM).
375	* @param pRegFrame Pointer to the register frame for the trap.
376	* @internal
377	*/
378	DECLASM(int) TRPMGCTrap07Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
379	{
380	PVM pVM = TRPM2VM(pTrpm);
381
382	LogFlow(("TRPMTrap07HandlerGC: eip=%VGv\n", pRegFrame->eip));
383	return CPUMHandleLazyFPU(pVM);
384	}
385
386
387	/**
388	* \#NP ((segment) Not Present) handler.
389	*
390	* @returns VBox status code.
391	* VINF_SUCCESS means we completely handled this trap,
392	* other codes are passed execution to host context.
393	*
394	* @param pTrpm Pointer to TRPM data (within VM).
395	* @param pRegFrame Pointer to the register frame for the trap.
396	* @internal
397	*/
398	DECLASM(int) TRPMGCTrap0bHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
399	{
400	LogFlow(("TRPMGCTrap0bHandler: eip=%VGv\n", pRegFrame->eip));
401	PVM pVM = TRPM2VM(pTrpm);
402
403	/*
404	* Try to detect instruction by opcode which caused trap.
405	* XXX note: this code may cause \#PF (trap e) or \#GP (trap d) while
406	* accessing user code. need to handle it somehow in future!
407	*/
408	uint8_t *pu8Code;
409	if (SELMValidateAndConvertCSAddr(pVM, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, (PRTGCPTR)&pu8Code) == VINF_SUCCESS)
410	{
411	/*
412	* First skip possible instruction prefixes, such as:
413	* OS, AS
414	* CS:, DS:, ES:, SS:, FS:, GS:
415	* REPE, REPNE
416	*
417	* note: Currently we supports only up to 4 prefixes per opcode, more
418	* prefixes (normally not used anyway) will cause trap d in guest.
419	* note: Instruction length in IA-32 may be up to 15 bytes, we dont
420	* check this issue, its too hard.
421	*/
422	for (unsigned i = 0; i < 4; i++)
423	{
424	if ( pu8Code[0] != 0xf2 /* REPNE/REPNZ */
425	&& pu8Code[0] != 0xf3 /* REP/REPE/REPZ */
426	&& pu8Code[0] != 0x2e /* CS: */
427	&& pu8Code[0] != 0x36 /* SS: */
428	&& pu8Code[0] != 0x3e /* DS: */
429	&& pu8Code[0] != 0x26 /* ES: */
430	&& pu8Code[0] != 0x64 /* FS: */
431	&& pu8Code[0] != 0x65 /* GS: */
432	&& pu8Code[0] != 0x66 /* OS */
433	&& pu8Code[0] != 0x67 /* AS */
434	)
435	break;
436	pu8Code++;
437	}
438
439	/*
440	* Detect right switch using a callgate.
441	*
442	* We recognize the following causes for the trap 0b:
443	* CALL FAR, CALL FAR []
444	* JMP FAR, JMP FAR []
445	* IRET (may cause a task switch)
446	*
447	* Note: we can't detect whether the trap was caused by a call to a
448	* callgate descriptor or it is a real trap 0b due to a bad selector.
449	* In both situations we'll pass execution to our recompiler so we don't
450	* have to worry.
451	* If we wanted to do better detection, we have set GDT entries to callgate
452	* descriptors pointing to our own handlers.
453	*/
454	/** @todo not sure about IRET, may generate Trap 0d (\#GP), NEED TO CHECK! */
455	if ( pu8Code[0] == 0x9a /* CALL FAR */
456	\|\| ( pu8Code[0] == 0xff /* CALL FAR [] */
457	&& (pu8Code[1] & X86_OPCODE_MODRM_REG_MASK) == 0x18)
458	\|\| pu8Code[0] == 0xea /* JMP FAR */
459	\|\| ( pu8Code[0] == 0xff /* JMP FAR [] */
460	&& (pu8Code[1] & X86_OPCODE_MODRM_REG_MASK) == 0x28)
461	\|\| pu8Code[0] == 0xcf /* IRET */
462	)
463	{
464	/*
465	* Got potential call to callgate.
466	* We simply return execution to the recompiler to do emulation
467	* starting from the instruction which caused the trap.
468	*/
469	pTrpm->uActiveVector = ~0;
470	return VINF_EM_RAW_RING_SWITCH;
471	}
472	}
473
474	/*
475	* Pass trap 0b as is to the recompiler in all other cases.
476	*/
477	return VINF_EM_RAW_GUEST_TRAP;
478	}
479
480
481	/**
482	* \#GP (General Protection Fault) handler for Ring-0 privileged instructions.
483	*
484	* @returns VBox status code.
485	* VINF_SUCCESS means we completely handled this trap,
486	* other codes are passed execution to host context.
487	*
488	* @param pVM The VM handle.
489	* @param pRegFrame Pointer to the register frame for the trap.
490	* @param pCpu The opcode info.
491	* @param PC Program counter.
492	*/
493	static int trpmGCTrap0dHandlerRing0(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, RTGCPTR PC)
494	{
495	int rc;
496
497	/*
498	* Try handle it here, if not return to HC and emulate/interpret it there.
499	*/
500	switch (pCpu->pCurInstr->opcode)
501	{
502	case OP_INT3:
503	/*
504	* Little hack to make the code below not fail
505	*/
506	pCpu->param1.flags = USE_IMMEDIATE8;
507	pCpu->param1.parval = 3;
508	/* fallthru */
509	case OP_INT:
510	{
511	Assert(pCpu->param1.flags & USE_IMMEDIATE8);
512	Assert(!(PATMIsPatchGCAddr(pVM, PC)));
513	if (pCpu->param1.parval == 3)
514	{
515	/* Obsolete!! */
516	/* Int 3 replacement patch? */
517	if (PATMHandleInt3PatchTrap(pVM, pRegFrame) == VINF_SUCCESS)
518	{
519	AssertFailed();
520	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
521	}
522	}
523	int rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT);
524	if (VBOX_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
525	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
526
527	pVM->trpm.s.uActiveVector = (pVM->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
528	pVM->trpm.s.fActiveSoftwareInterrupt = true;
529	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH_INT, pRegFrame);
530	}
531
532	case OP_SYSEXIT:
533	case OP_SYSRET:
534	#ifdef PATM_EMULATE_SYSENTER
535	rc = PATMSysCall(pVM, pRegFrame, pCpu);
536	if (rc == VINF_SUCCESS)
537	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
538	/* else no break; */
539	#endif
540
541	case OP_HLT:
542	/* If it's in patch code, defer to ring-3. */
543	if (PATMIsPatchGCAddr(pVM, PC))
544	break;
545
546	pRegFrame->eip += pCpu->opsize;
547	return trpmGCExitTrap(pVM, VINF_EM_HALT, pRegFrame);
548
549
550	/*
551	* These instructions are used by PATM and CASM for finding
552	* dangerous non-trapping instructions. Thus, since all
553	* scanning and patching is done in ring-3 we'll have to
554	* return to ring-3 on the first encounter of these instructions.
555	*/
556	case OP_MOV_CR:
557	case OP_MOV_DR:
558	/* We can safely emulate control/debug register move instructions in patched code. */
559	if ( !PATMIsPatchGCAddr(pVM, PC)
560	&& !CSAMIsKnownDangerousInstr(pVM, PC))
561	break;
562	case OP_INVLPG:
563	case OP_LLDT:
564	case OP_STI:
565	{
566	uint32_t cbIgnored;
567	int rc = EMInterpretInstructionCPU(pVM, pCpu, pRegFrame, PC, &cbIgnored);
568	if (VBOX_SUCCESS(rc))
569	pRegFrame->eip += pCpu->opsize;
570	else if (rc == VERR_EM_INTERPRETER)
571	rc = VINF_EM_RAW_EXCEPTION_PRIVILEGED;
572	return trpmGCExitTrap(pVM, rc, pRegFrame);
573	}
574	}
575
576	return trpmGCExitTrap(pVM, VINF_EM_RAW_EXCEPTION_PRIVILEGED, pRegFrame);
577	}
578
579
580	/**
581	* \#GP (General Protection Fault) handler for Ring-3.
582	*
583	* @returns VBox status code.
584	* VINF_SUCCESS means we completely handled this trap,
585	* other codes are passed execution to host context.
586	*
587	* @param pVM The VM handle.
588	* @param pRegFrame Pointer to the register frame for the trap.
589	* @param pCpu The opcode info.
590	*/
591	static int trpmGCTrap0dHandlerRing3(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)
592	{
593	int rc;
594
595	switch (pCpu->pCurInstr->opcode)
596	{
597	/*
598	* STI and CLI are I/O privileged, i.e. if IOPL
599	*/
600	case OP_STI:
601	case OP_CLI:
602	{
603	uint32_t efl = CPUMRawGetEFlags(pVM, pRegFrame);
604	if (X86_EFL_GET_IOPL(efl) >= (unsigned)(pRegFrame->ss & X86_SEL_RPL))
605	{
606	LogFlow(("trpmGCTrap0dHandlerRing3: CLI/STI -> REM\n"));
607	return trpmGCExitTrap(pVM, VINF_EM_RESCHEDULE_REM, pRegFrame);
608	}
609	LogFlow(("trpmGCTrap0dHandlerRing3: CLI/STI -> #GP(0)\n"));
610	break;
611	}
612
613	/*
614	* INT3 and INT xx are ring-switching.
615	* (The shadow IDT will have set the entries to DPL=0, that's why we're here.)
616	*/
617	case OP_INT3:
618	/*
619	* Little hack to make the code below not fail
620	*/
621	pCpu->param1.flags = USE_IMMEDIATE8;
622	pCpu->param1.parval = 3;
623	/* fall thru */
624	case OP_INT:
625	{
626	Assert(pCpu->param1.flags & USE_IMMEDIATE8);
627	rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT);
628	if (VBOX_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
629	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
630
631	pVM->trpm.s.uActiveVector = (pVM->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
632	pVM->trpm.s.fActiveSoftwareInterrupt = true;
633	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH_INT, pRegFrame);
634	}
635
636	/*
637	* SYSCALL, SYSENTER, INTO and BOUND are also ring-switchers.
638	*/
639	case OP_SYSCALL:
640	case OP_SYSENTER:
641	#ifdef PATM_EMULATE_SYSENTER
642	rc = PATMSysCall(pVM, pRegFrame, pCpu);
643	if (rc == VINF_SUCCESS)
644	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
645	/* else no break; */
646	#endif
647	case OP_BOUND:
648	case OP_INTO:
649	pVM->trpm.s.uActiveVector = ~0;
650	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH, pRegFrame);
651	}
652
653	/*
654	* A genuine guest fault.
655	*/
656	return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
657	}
658
659
660	/**
661	* \#GP (General Protection Fault) handler.
662	*
663	* @returns VBox status code.
664	* VINF_SUCCESS means we completely handled this trap,
665	* other codes are passed execution to host context.
666	*
667	* @param pVM The VM handle.
668	* @param pTrpm Pointer to TRPM data (within VM).
669	* @param pRegFrame Pointer to the register frame for the trap.
670	*/
671	static int trpmGCTrap0dHandler(PVM pVM, PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
672	{
673	LogFlow(("trpmGCTrap0dHandler: cs:eip=%RTsel:%VGv uErr=%RX32\n", pRegFrame->ss, pRegFrame->eip, pTrpm->uActiveErrorCode));
674
675	#if 0 /* not right for iret. Shouldn't really be needed as SELMValidateAndConvertCSAddr deals with invalid cs. */
676	/*
677	* Filter out selector problems first as these may mean that the
678	* instruction isn't safe to read. If we're here because CS is NIL
679	* the flattening of cs:eip will deal with that.
680	*/
681	if ( !(pTrpm->uActiveErrorCode & (X86_TRAP_ERR_IDT \| X86_TRAP_ERR_EXTERNAL))
682	&& (pTrpm->uActiveErrorCode & X86_TRAP_ERR_SEL_MASK))
683	{
684	/* It's a guest trap. */
685	return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
686	}
687	#endif
688
689	/*
690	* Decode the instruction.
691	*/
692	RTGCPTR PC;
693	int rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &PC);
694	if (VBOX_FAILURE(rc))
695	{
696	Log(("trpmGCTrap0dHandler: Failed to convert %RTsel:%RX32 (cpl=%d) - rc=%Vrc !!\n",
697	pRegFrame->cs, pRegFrame->eip, pRegFrame->ss & X86_SEL_RPL, rc));
698	return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
699	}
700
701	DISCPUSTATE Cpu;
702	uint32_t cbOp;
703	rc = EMInterpretDisasOneEx(pVM, (RTGCUINTPTR)PC, pRegFrame, &Cpu, &cbOp);
704	if (VBOX_FAILURE(rc))
705	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
706
707	/*
708	* Deal with I/O port access.
709	*/
710	if ( pVM->trpm.s.uActiveErrorCode == 0
711	&& (Cpu.pCurInstr->optype & OPTYPE_PORTIO))
712	{
713	rc = EMInterpretPortIO(pVM, pRegFrame, &Cpu, cbOp);
714	return trpmGCExitTrap(pVM, rc, pRegFrame);
715	}
716
717	/*
718	* Deal with Ring-0 (privileged instructions)
719	*/
720	if ( (pRegFrame->ss & X86_SEL_RPL) <= 1
721	&& !pRegFrame->eflags.Bits.u1VM)
722	return trpmGCTrap0dHandlerRing0(pVM, pRegFrame, &Cpu, PC);
723
724	/*
725	* Deal with Ring-3 GPs.
726	*/
727	if (!pRegFrame->eflags.Bits.u1VM)
728	return trpmGCTrap0dHandlerRing3(pVM, pRegFrame, &Cpu);
729
730	/** @todo what about V86 mode? */
731	return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
732	}
733
734
735	/**
736	* \#GP (General Protection Fault) handler.
737	*
738	* @returns VBox status code.
739	* VINF_SUCCESS means we completely handled this trap,
740	* other codes are passed execution to host context.
741	*
742	* @param pTrpm Pointer to TRPM data (within VM).
743	* @param pRegFrame Pointer to the register frame for the trap.
744	* @internal
745	*/
746	DECLASM(int) TRPMGCTrap0dHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
747	{
748	LogFlow(("TRPMGCTrap0dHandler: eip=%RGv\n", pRegFrame->eip));
749	PVM pVM = TRPM2VM(pTrpm);
750
751	int rc = trpmGCTrap0dHandler(pVM, pTrpm, pRegFrame);
752	switch (rc)
753	{
754	case VINF_EM_RAW_GUEST_TRAP:
755	case VINF_EM_RAW_EXCEPTION_PRIVILEGED:
756	if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
757	rc = VINF_PATM_PATCH_TRAP_GP;
758	break;
759
760	case VINF_EM_RAW_INTERRUPT_PENDING:
761	Assert(TRPMHasTrap(pVM));
762	/* no break; */
763	case VINF_PGM_SYNC_CR3: /** @todo Check this with Sander. */
764	case VINF_IOM_HC_IOPORT_READWRITE:
765	case VINF_IOM_HC_IOPORT_READ:
766	case VINF_IOM_HC_IOPORT_WRITE:
767	case VINF_IOM_HC_MMIO_WRITE:
768	case VINF_IOM_HC_MMIO_READ:
769	case VINF_IOM_HC_MMIO_READ_WRITE:
770	case VINF_PATM_PATCH_INT3:
771	case VINF_EM_RAW_TO_R3:
772	case VINF_EM_RAW_TIMER_PENDING:
773	case VINF_EM_PENDING_REQUEST:
774	case VINF_EM_HALT:
775	case VINF_SUCCESS:
776	break;
777
778	default:
779	AssertMsg(PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip) == false, ("return code %d\n", rc));
780	break;
781	}
782	return rc;
783	}
784
785	/**
786	* \#PF (Page Fault) handler.
787	*
788	* Calls PGM which does the actual handling.
789	*
790	*
791	* @returns VBox status code.
792	* VINF_SUCCESS means we completely handled this trap,
793	* other codes are passed execution to host context.
794	*
795	* @param pTrpm Pointer to TRPM data (within VM).
796	* @param pRegFrame Pointer to the register frame for the trap.
797	* @internal
798	*/
799	DECLASM(int) TRPMGCTrap0eHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
800	{
801	LogBird(("TRPMGCTrap0eHandler: eip=%RGv\n", pRegFrame->eip));
802	PVM pVM = TRPM2VM(pTrpm);
803
804	/*
805	* This is all PGM stuff.
806	*/
807	int rc = PGMTrap0eHandler(pVM, pTrpm->uActiveErrorCode, pRegFrame, (RTGCPTR)pTrpm->uActiveCR2);
808
809	switch (rc)
810	{
811	case VINF_EM_RAW_EMULATE_INSTR:
812	case VINF_EM_RAW_EMULATE_INSTR_PD_FAULT:
813	case VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT:
814	case VINF_EM_RAW_EMULATE_INSTR_TSS_FAULT:
815	case VINF_EM_RAW_EMULATE_INSTR_LDT_FAULT:
816	case VINF_EM_RAW_EMULATE_INSTR_IDT_FAULT:
817	if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
818	rc = VINF_PATCH_EMULATE_INSTR;
819	break;
820
821	case VINF_EM_RAW_GUEST_TRAP:
822	if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
823	return VINF_PATM_PATCH_TRAP_PF;
824
825	rc = TRPMForwardTrap(pVM, pRegFrame, 0xE, 0, TRPM_TRAP_HAS_ERRORCODE, TRPM_TRAP);
826	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
827	break;
828
829	case VINF_EM_RAW_INTERRUPT_PENDING:
830	Assert(TRPMHasTrap(pVM));
831	/* no break; */
832	case VINF_IOM_HC_MMIO_READ:
833	case VINF_IOM_HC_MMIO_WRITE:
834	case VINF_IOM_HC_MMIO_READ_WRITE:
835	case VINF_PATM_HC_MMIO_PATCH_READ:
836	case VINF_PATM_HC_MMIO_PATCH_WRITE:
837	case VINF_SUCCESS:
838	case VINF_EM_RAW_TO_R3:
839	case VINF_EM_PENDING_REQUEST:
840	case VINF_EM_RAW_TIMER_PENDING:
841	case VINF_CSAM_PENDING_ACTION:
842	case VINF_PGM_SYNC_CR3: /** @todo Check this with Sander. */
843	break;
844
845	default:
846	AssertMsg(PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip) == false, ("Patch address for return code %d. eip=%08x\n", rc, pRegFrame->eip));
847	break;
848	}
849	return trpmGCExitTrap(pVM, rc, pRegFrame);
850	}
851
852
853	/**
854	* Scans for the EIP in the specified array of trap handlers.
855	*
856	* If we don't fine the EIP, we'll panic.
857	*
858	* @returns VBox status code.
859	*
860	* @param pVM The VM handle.
861	* @param pRegFrame Pointer to the register frame for the trap.
862	* @param paHandlers The array of trap handler records.
863	* @param pEndRecord The end record (exclusive).
864	*/
865	static int trpmGCHyperGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, PCTRPMGCHYPER paHandlers, PCTRPMGCHYPER pEndRecord)
866	{
867	uintptr_t uEip = (uintptr_t)pRegFrame->eip;
868	Assert(paHandlers <= pEndRecord);
869
870	Log(("trpmGCHyperGeneric: uEip=%x %p-%p\n", uEip, paHandlers, pEndRecord));
871
872	#if 0 /// @todo later
873	/*
874	* Start by doing a kind of binary search.
875	*/
876	unsigned iStart = 0;
877	unsigned iEnd = pEndRecord - paHandlers;
878	unsigned i = iEnd / 2;
879	#endif
880
881	/*
882	* Do a linear search now (in case the array wasn't properly sorted).
883	*/
884	for (PCTRPMGCHYPER pCur = paHandlers; pCur < pEndRecord; pCur++)
885	{
886	if ( pCur->uStartEIP <= uEip
887	&& (pCur->uEndEIP ? pCur->uEndEIP > uEip : pCur->uStartEIP == uEip))
888	return pCur->pfnHandler(pVM, pRegFrame, pCur->uUser);
889	}
890
891	return VERR_TRPM_DONT_PANIC;
892	}
893
894
895	/**
896	* Hypervisor \#NP ((segment) Not Present) handler.
897	*
898	* Scans for the EIP in the registered trap handlers.
899	*
900	* @returns VBox status code.
901	* VINF_SUCCESS means we completely handled this trap,
902	* other codes are passed back to host context.
903	*
904	* @param pTrpm Pointer to TRPM data (within VM).
905	* @param pRegFrame Pointer to the register frame for the trap.
906	* @internal
907	*/
908	DECLASM(int) TRPMGCHyperTrap0bHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
909	{
910	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0bHandlers, g_aTrap0bHandlersEnd);
911	}
912
913
914	/**
915	* Hypervisor \#GP (General Protection Fault) handler.
916	*
917	* Scans for the EIP in the registered trap handlers.
918	*
919	* @returns VBox status code.
920	* VINF_SUCCESS means we completely handled this trap,
921	* other codes are passed back to host context.
922	*
923	* @param pTrpm Pointer to TRPM data (within VM).
924	* @param pRegFrame Pointer to the register frame for the trap.
925	* @internal
926	*/
927	DECLASM(int) TRPMGCHyperTrap0dHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
928	{
929	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
930	}
931
932
933	/**
934	* Hypervisor \#PF (Page Fault) handler.
935	*
936	* Scans for the EIP in the registered trap handlers.
937	*
938	* @returns VBox status code.
939	* VINF_SUCCESS means we completely handled this trap,
940	* other codes are passed back to host context.
941	*
942	* @param pTrpm Pointer to TRPM data (within VM).
943	* @param pRegFrame Pointer to the register frame for the trap.
944	* @internal
945	*/
946	DECLASM(int) TRPMGCHyperTrap0eHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
947	{
948	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
949	}
950
951
952	/**
953	* Deal with hypervisor traps occuring when resuming execution on a trap.
954	*
955	* @returns VBox status code.
956	* @param pVM The VM handle.
957	* @param pRegFrame Register frame.
958	* @param uUser User arg.
959	*/
960	DECLCALLBACK(int) trpmGCTrapInGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser)
961	{
962	Log(("trpmGCTrapInGeneric: eip=%RX32 uUser=%#x\n", pRegFrame->eip, uUser));
963
964	if (uUser & TRPM_TRAP_IN_HYPER)
965	{
966	/*
967	* Just zero the register in question.
968	* We're ASSUMING that esp points to it.
969	*/
970	switch (uUser & TRPM_TRAP_IN_OP_MASK)
971	{
972	case TRPM_TRAP_IN_MOV_GS:
973	case TRPM_TRAP_IN_MOV_FS:
974	*(PRTSEL)pRegFrame->esp = 0;
975	return VINF_SUCCESS;
976
977	default:
978	AssertMsgFailed(("Invalid uUser=%#x\n", uUser));
979	return VERR_INTERNAL_ERROR;
980	}
981	}
982	else
983	{
984	/*
985	* Reconstruct the guest context and switch to the recompiler.
986	* We ASSUME we're only at
987	*/
988	CPUMCTXCORE CtxCore = *pRegFrame;
989	uint32_t pEsp = (uint32_t )pRegFrame->esp;
990	int rc;
991
992	switch (uUser)
993	{
994	/*
995	* This will only occur when resuming guest code in a trap handler!
996	*/
997	/* @note ASSUMES esp points to the temporary guest CPUMCTXCORE!!! */
998	case TRPM_TRAP_IN_MOV_GS:
999	case TRPM_TRAP_IN_MOV_FS:
1000	case TRPM_TRAP_IN_MOV_ES:
1001	case TRPM_TRAP_IN_MOV_DS:
1002	{
1003	PCPUMCTXCORE pTempGuestCtx = (PCPUMCTXCORE) pEsp;
1004
1005	/* Just copy the whole thing; several selector registers, eip (etc) and eax are not yet in pRegFrame. */
1006	CtxCore = *pTempGuestCtx;
1007	rc = VINF_EM_RAW_STALE_SELECTOR;
1008	break;
1009	}
1010
1011	/*
1012	* This will only occur when resuming guest code!
1013	*/
1014	case TRPM_TRAP_IN_IRET:
1015	CtxCore.eip = *pEsp++;
1016	CtxCore.cs = (RTSEL)*pEsp++;
1017	CtxCore.eflags.u32 = *pEsp++;
1018	CtxCore.esp = *pEsp++;
1019	CtxCore.ss = (RTSEL)*pEsp++;
1020	rc = VINF_EM_RAW_IRET_TRAP;
1021	break;
1022
1023	/*
1024	* This will only occur when resuming V86 guest code!
1025	*/
1026	case TRPM_TRAP_IN_IRET \| TRPM_TRAP_IN_V86:
1027	CtxCore.eip = *pEsp++;
1028	CtxCore.cs = (RTSEL)*pEsp++;
1029	CtxCore.eflags.u32 = *pEsp++;
1030	CtxCore.esp = *pEsp++;
1031	CtxCore.ss = (RTSEL)*pEsp++;
1032	CtxCore.es = (RTSEL)*pEsp++;
1033	CtxCore.ds = (RTSEL)*pEsp++;
1034	CtxCore.fs = (RTSEL)*pEsp++;
1035	CtxCore.gs = (RTSEL)*pEsp++;
1036	rc = VINF_EM_RAW_IRET_TRAP;
1037	break;
1038
1039	default:
1040	AssertMsgFailed(("Invalid uUser=%#x\n", uUser));
1041	return VERR_INTERNAL_ERROR;
1042	}
1043
1044
1045	CPUMSetGuestCtxCore(pVM, &CtxCore);
1046	TRPMGCHyperReturnToHost(pVM, rc);
1047	}
1048
1049	AssertMsgFailed(("Impossible!\n"));
1050	return VERR_INTERNAL_ERROR;
1051	}
1052

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source: vbox/trunk/src/VBox/VMM/VMMGC/TRPMGCHandlers.cpp@ 1

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