TRPMGCHandlers.cpp@ 1237

Last change on this file since 1237 was 1160, checked in by vboxsync, 18 years ago
Correction for v86 mode
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1	/* $Id: TRPMGCHandlers.cpp 1160 2007-03-02 14:37:51Z vboxsync $ */
2	/** @file
3	* TRPM - Guest Context Trap Handlers, CPP part
4	*/
5
6	/*
7	* Copyright (C) 2006 InnoTek Systemberatung GmbH
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License as published by the Free Software Foundation,
13	* in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14	* distribution. VirtualBox OSE is distributed in the hope that it will
15	* be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* If you received this file as part of a commercial VirtualBox
18	* distribution, then only the terms of your commercial VirtualBox
19	* license agreement apply instead of the previous paragraph.
20	*/
21
22
23	/*******************************************************************************
24	* Header Files *
25	*******************************************************************************/
26	#define LOG_GROUP LOG_GROUP_TRPM
27	#include <VBox/selm.h>
28	#include <VBox/iom.h>
29	#include <VBox/pgm.h>
30	#include <VBox/pdm.h>
31	#include <VBox/dbgf.h>
32	#include <VBox/em.h>
33	#include <VBox/csam.h>
34	#include <VBox/patm.h>
35	#include <VBox/mm.h>
36	#include <VBox/cpum.h>
37	#include "TRPMInternal.h"
38	#include <VBox/vm.h>
39	#include <VBox/param.h>
40
41	#include <VBox/err.h>
42	#include <VBox/dis.h>
43	#include <VBox/disopcode.h>
44	#include <VBox/x86.h>
45	#include <VBox/log.h>
46	#include <VBox/tm.h>
47	#include <iprt/asm.h>
48	#include <iprt/assert.h>
49
50	/* still here. MODR/M byte parsing */
51	#define X86_OPCODE_MODRM_MOD_MASK 0xc0
52	#define X86_OPCODE_MODRM_REG_MASK 0x38
53	#define X86_OPCODE_MODRM_RM_MASK 0x07
54
55	/** Pointer to a readonly hypervisor trap record. */
56	typedef const struct TRPMGCHYPER *PCTRPMGCHYPER;
57
58	/**
59	* A hypervisor trap record.
60	* This contains information about a handler for a instruction range.
61	*
62	* @remark This must match what TRPM_HANDLER outputs.
63	*/
64	typedef struct TRPMGCHYPER
65	{
66	/** The start address. */
67	uintptr_t uStartEIP;
68	/** The end address. (exclusive)
69	* If NULL the it's only for the instruction at pvStartEIP. */
70	uintptr_t uEndEIP;
71	/**
72	* The handler.
73	*
74	* @returns VBox status code
75	* VINF_SUCCESS means we've handled the trap.
76	* Any other error code means returning to the host context.
77	* @param pVM The VM handle.
78	* @param pRegFrame The register frame.
79	* @param uUser The user argument.
80	*/
81	DECLCALLBACKMEMBER(int, pfnHandler)(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser);
82	/** Whatever the handler desires to put here. */
83	uintptr_t uUser;
84	} TRPMGCHYPER;
85
86
87	/*******************************************************************************
88	* Global Variables *
89	*******************************************************************************/
90	__BEGIN_DECLS
91	/** Defined in VMMGC0.asm or VMMGC99.asm.
92	* @{ */
93	extern const TRPMGCHYPER g_aTrap0bHandlers[1];
94	extern const TRPMGCHYPER g_aTrap0bHandlersEnd[1];
95	extern const TRPMGCHYPER g_aTrap0dHandlers[1];
96	extern const TRPMGCHYPER g_aTrap0dHandlersEnd[1];
97	extern const TRPMGCHYPER g_aTrap0eHandlers[1];
98	extern const TRPMGCHYPER g_aTrap0eHandlersEnd[1];
99	/** @} */
100	__END_DECLS
101
102
103	/*******************************************************************************
104	* Internal Functions *
105	*******************************************************************************/
106	__BEGIN_DECLS /* addressed from asm (not called so no DECLASM). */
107	DECLCALLBACK(int) trpmGCTrapInGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser);
108	__END_DECLS
109
110
111
112	/**
113	* Exits the trap, called when exiting a trap handler.
114	*
115	* Will reset the trap if it's not a guest trap or the trap
116	* is already handled. Will process resume guest FFs.
117	*
118	* @returns rc.
119	* @param pVM VM handle.
120	* @param rc The VBox status code to return.
121	* @param pRegFrame Pointer to the register frame for the trap.
122	*/
123	static int trpmGCExitTrap(PVM pVM, int rc, PCPUMCTXCORE pRegFrame)
124	{
125	uint32_t uOldActiveVector = pVM->trpm.s.uActiveVector;
126
127	/* Reset trap? */
128	if ( rc != VINF_EM_RAW_GUEST_TRAP
129	&& rc != VINF_EM_RAW_RING_SWITCH_INT)
130	pVM->trpm.s.uActiveVector = ~0;
131
132	#ifdef VBOX_HIGH_RES_TIMERS_HACK
133	/*
134	* Occationally we should poll timers.
135	* We must NOT do this too frequently as it adds a significant overhead
136	* and it'll kill us if the trap load is high. (See #1354.)
137	* (The heuristic is not very intelligent, we should really check trap
138	* frequency etc. here, but alas, we lack any such information atm.)
139	*/
140	static unsigned s_iTimerPoll = 0;
141	if (rc == VINF_SUCCESS)
142	{
143	if (!(++s_iTimerPoll & 0xf))
144	{
145	uint64_t cTicks = TMTimerPoll(pVM); NOREF(cTicks);
146	Log2(("TMTimerPoll at %VGv returned %RX64 (VM_FF_TIMER=%d)\n", pRegFrame->eip, cTicks, VM_FF_ISPENDING(pVM, VM_FF_TIMER)));
147	}
148	}
149	else
150	s_iTimerPoll = 0;
151	#endif
152
153	/* Clear pending inhibit interrupt state if required. (necessary for dispatching interrupts later on) */
154	if (VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS))
155	{
156	Log2(("VM_FF_INHIBIT_INTERRUPTS at %VGv successor %VGv\n", pRegFrame->eip, EMGetInhibitInterruptsPC(pVM)));
157	if (pRegFrame->eip != EMGetInhibitInterruptsPC(pVM))
158	{
159	/** @note we intentionally don't clear VM_FF_INHIBIT_INTERRUPTS here if the eip is the same as the inhibited instr address.
160	* Before we are able to execute this instruction in raw mode (iret to guest code) an external interrupt might
161	* force a world switch again. Possibly allowing a guest interrupt to be dispatched in the process. This could
162	* break the guest. Sounds very unlikely, but such timing sensitive problem are not as rare as you might think.
163	*/
164	VM_FF_CLEAR(pVM, VM_FF_INHIBIT_INTERRUPTS);
165	}
166	}
167
168	/*
169	* Pending resume-guest-FF?
170	* Or pending (A)PIC interrupt? Windows XP will crash if we delay APIC interrupts.
171	*/
172	if ( rc == VINF_SUCCESS
173	&& VM_FF_ISPENDING(pVM, VM_FF_TO_R3 \| VM_FF_TIMER \| VM_FF_INTERRUPT_APIC \| VM_FF_INTERRUPT_PIC \| VM_FF_PGM_SYNC_CR3 \| VM_FF_PGM_SYNC_CR3_NON_GLOBAL \| VM_FF_REQUEST))
174	{
175	/* Pending Ring-3 action. */
176	if (VM_FF_ISPENDING(pVM, VM_FF_TO_R3))
177	{
178	VM_FF_CLEAR(pVM, VM_FF_TO_R3);
179	rc = VINF_EM_RAW_TO_R3;
180	}
181	/* Pending timer action. */
182	else if (VM_FF_ISPENDING(pVM, VM_FF_TIMER))
183	rc = VINF_EM_RAW_TIMER_PENDING;
184	/* Pending interrupt: dispatch it. */
185	else if ( VM_FF_ISPENDING(pVM, VM_FF_INTERRUPT_APIC \| VM_FF_INTERRUPT_PIC)
186	&& !VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS)
187	&& PATMAreInterruptsEnabledByCtxCore(pVM, pRegFrame)
188	)
189	{
190	uint8_t u8Interrupt;
191	rc = PDMGetInterrupt(pVM, &u8Interrupt);
192	Log(("trpmGCExitTrap: u8Interrupt=%d (%#x) rc=%Vrc\n", u8Interrupt, u8Interrupt, rc));
193	AssertFatalMsgRC(rc, ("PDMGetInterrupt failed with %Vrc\n", rc));
194	rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)u8Interrupt, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_HARDWARE_INT);
195	/* can't return if successful */
196	Assert(rc != VINF_SUCCESS);
197
198	/* Stop the profile counter that was started in TRPMGCHandlersA.asm */
199	Assert(uOldActiveVector <= 16);
200	STAM_PROFILE_ADV_STOP(&pVM->trpm.s.aStatGCTraps[uOldActiveVector], a);
201
202	/* Assert the trap and go to the recompiler to dispatch it. */
203	TRPMAssertTrap(pVM, u8Interrupt, false);
204
205	STAM_PROFILE_ADV_START(&pVM->trpm.s.aStatGCTraps[uOldActiveVector], a);
206	rc = VINF_EM_RAW_INTERRUPT_PENDING;
207	}
208	/*
209	* Try sync CR3?
210	* This ASSUMES that the MOV CRx, x emulation doesn't return with VINF_PGM_SYNC_CR3. (a bit hackish)
211	*/
212	else if (VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 \| VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
213	#if 1
214	rc = PGMSyncCR3(pVM, CPUMGetGuestCR0(pVM), CPUMGetGuestCR3(pVM), CPUMGetGuestCR4(pVM), VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3));
215	#else
216	rc = VINF_PGM_SYNC_CR3;
217	#endif
218	/* Pending request packets might contain actions that need immediate attention, such as pending hardware interrupts. */
219	else if (VM_FF_ISPENDING(pVM, VM_FF_REQUEST))
220	rc = VINF_EM_PENDING_REQUEST;
221	}
222
223	AssertMsg( rc != VINF_SUCCESS
224	\|\| ( pRegFrame->eflags.Bits.u1IF
225	&& ( pRegFrame->eflags.Bits.u2IOPL < (unsigned)(pRegFrame->ss & X86_SEL_RPL) \|\| pRegFrame->eflags.Bits.u1VM))
226	, ("rc = %VGv\neflags=%RX32 ss=%RTsel IOPL=%d\n", rc, pRegFrame->eflags.u32, pRegFrame->ss, pRegFrame->eflags.Bits.u2IOPL));
227	return rc;
228	}
229
230
231	/**
232	* \#DB (Debug event) handler.
233	*
234	* @returns VBox status code.
235	* VINF_SUCCESS means we completely handled this trap,
236	* other codes are passed execution to host context.
237	*
238	* @param pTrpm Pointer to TRPM data (within VM).
239	* @param pRegFrame Pointer to the register frame for the trap.
240	* @internal
241	*/
242	DECLASM(int) TRPMGCTrap01Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
243	{
244	RTGCUINTREG uDr6 = ASMGetAndClearDR6();
245	PVM pVM = TRPM2VM(pTrpm);
246	LogFlow(("TRPMGCTrap01Handler: cs:eip=%04x:%08x uDr6=%RTreg\n", pRegFrame->cs, pRegFrame->eip, uDr6));
247
248	/*
249	* We currently don't make sure of the X86_DR7_GD bit, but
250	* there might come a time when we do.
251	*/
252	if ((uDr6 & X86_DR6_BD) == X86_DR6_BD)
253	{
254	AssertReleaseMsgFailed(("X86_DR6_BD isn't used, but it's set! dr7=%RTreg(%RTreg) dr6=%RTreg\n",
255	ASMGetDR7(), CPUMGetHyperDR7(pVM), uDr6));
256	return VERR_NOT_IMPLEMENTED;
257	}
258
259	AssertReleaseMsg(!(uDr6 & X86_DR6_BT), ("X86_DR6_BT is impossible!\n"));
260
261	/*
262	* Now leave the rest to the DBGF.
263	*/
264	int rc = DBGFGCTrap01Handler(pVM, pRegFrame, uDr6);
265	if (rc == VINF_EM_RAW_GUEST_TRAP)
266	CPUMSetGuestDR6(pVM, uDr6);
267
268	return trpmGCExitTrap(pVM, rc, pRegFrame);
269	}
270
271
272
273	/**
274	* NMI handler, for when we are using NMIs to debug things.
275	*
276	* @returns VBox status code.
277	* VINF_SUCCESS means we completely handled this trap,
278	* other codes are passed execution to host context.
279	*
280	* @param pTrpm Pointer to TRPM data (within VM).
281	* @param pRegFrame Pointer to the register frame for the trap.
282	* @internal
283	* @remark This is not hooked up unless you're building with VBOX_WITH_NMI defined.
284	*/
285	DECLASM(int) TRPMGCTrap02Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
286	{
287	LogFlow(("TRPMGCTrap02Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
288	RTLogComPrintf("TRPMGCTrap02Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip);
289	return VERR_TRPM_DONT_PANIC;
290	}
291
292
293	/**
294	* \#BP (Breakpoint) handler.
295	*
296	* @returns VBox status code.
297	* VINF_SUCCESS means we completely handled this trap,
298	* other codes are passed execution to host context.
299	*
300	* @param pTrpm Pointer to TRPM data (within VM).
301	* @param pRegFrame Pointer to the register frame for the trap.
302	* @internal
303	*/
304	DECLASM(int) TRPMGCTrap03Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
305	{
306	LogFlow(("TRPMGCTrap03Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
307	PVM pVM = TRPM2VM(pTrpm);
308	int rc;
309
310	/*
311	* Both PATM are using INT3s, let them have a go first.
312	*/
313	if ( (pRegFrame->ss & X86_SEL_RPL) == 1
314	&& !pRegFrame->eflags.Bits.u1VM)
315	{
316	rc = PATMHandleInt3PatchTrap(pVM, pRegFrame);
317	if (rc == VINF_SUCCESS \|\| rc == VINF_EM_RAW_EMULATE_INSTR \|\| rc == VINF_PATM_PATCH_INT3 \|\| rc == VINF_PATM_DUPLICATE_FUNCTION)
318	return trpmGCExitTrap(pVM, rc, pRegFrame);
319	}
320	rc = DBGFGCTrap03Handler(pVM, pRegFrame);
321	/* anything we should do with this? Schedule it in GC? */
322	return trpmGCExitTrap(pVM, rc, pRegFrame);
323	}
324
325
326	/**
327	* Trap handler for illegal opcode fault (\#UD).
328	*
329	* @returns VBox status code.
330	* VINF_SUCCESS means we completely handled this trap,
331	* other codes are passed execution to host context.
332	*
333	* @param pTrpm Pointer to TRPM data (within VM).
334	* @param pRegFrame Pointer to the register frame for the trap.
335	* @internal
336	*/
337	DECLASM(int) TRPMGCTrap06Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
338	{
339	PVM pVM = TRPM2VM(pTrpm);
340
341	LogFlow(("TRPMGCTrap06Handler %VGv eflags=%x\n", pRegFrame->eip, pRegFrame->eflags.u32));
342
343	if ( (pRegFrame->ss & X86_SEL_RPL) == 1
344	&& !pRegFrame->eflags.Bits.u1VM
345	&& PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
346	{
347	/*
348	* Decode the instruction.
349	*/
350	RTGCPTR PC;
351	int rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &PC);
352	if (VBOX_FAILURE(rc))
353	{
354	Log(("TRPMGCTrap06Handler: Failed to convert %RTsel:%RX32 (cpl=%d) - rc=%Vrc !!\n", pRegFrame->cs, pRegFrame->eip, pRegFrame->ss & X86_SEL_RPL, rc));
355	return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
356	}
357
358	DISCPUSTATE Cpu;
359	uint32_t cbOp;
360	rc = EMInterpretDisasOneEx(pVM, (RTGCUINTPTR)PC, pRegFrame, &Cpu, &cbOp);
361	if (VBOX_FAILURE(rc))
362	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
363
364	/** @note monitor causes an #UD exception instead of #GP when not executed in ring 0. */
365	if (Cpu.pCurInstr->opcode == OP_ILLUD2)
366	{
367	int rc = PATMGCHandleIllegalInstrTrap(pVM, pRegFrame);
368	if (rc == VINF_SUCCESS \|\| rc == VINF_EM_RAW_EMULATE_INSTR \|\| rc == VINF_PATM_DUPLICATE_FUNCTION \|\| rc == VINF_PATM_PENDING_IRQ_AFTER_IRET)
369	return trpmGCExitTrap(pVM, rc, pRegFrame);
370	}
371	}
372	return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
373	}
374
375
376	/**
377	* Trap handler for device not present fault (\#NM).
378	*
379	* Device not available, FP or (F)WAIT instruction.
380	*
381	* @returns VBox status code.
382	* VINF_SUCCESS means we completely handled this trap,
383	* other codes are passed execution to host context.
384	*
385	* @param pTrpm Pointer to TRPM data (within VM).
386	* @param pRegFrame Pointer to the register frame for the trap.
387	* @internal
388	*/
389	DECLASM(int) TRPMGCTrap07Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
390	{
391	PVM pVM = TRPM2VM(pTrpm);
392
393	LogFlow(("TRPMTrap07HandlerGC: eip=%VGv\n", pRegFrame->eip));
394	return CPUMHandleLazyFPU(pVM);
395	}
396
397
398	/**
399	* \#NP ((segment) Not Present) handler.
400	*
401	* @returns VBox status code.
402	* VINF_SUCCESS means we completely handled this trap,
403	* other codes are passed execution to host context.
404	*
405	* @param pTrpm Pointer to TRPM data (within VM).
406	* @param pRegFrame Pointer to the register frame for the trap.
407	* @internal
408	*/
409	DECLASM(int) TRPMGCTrap0bHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
410	{
411	LogFlow(("TRPMGCTrap0bHandler: eip=%VGv\n", pRegFrame->eip));
412	PVM pVM = TRPM2VM(pTrpm);
413
414	/*
415	* Try to detect instruction by opcode which caused trap.
416	* XXX note: this code may cause \#PF (trap e) or \#GP (trap d) while
417	* accessing user code. need to handle it somehow in future!
418	*/
419	uint8_t *pu8Code;
420	if (SELMValidateAndConvertCSAddr(pVM, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, (PRTGCPTR)&pu8Code) == VINF_SUCCESS)
421	{
422	/*
423	* First skip possible instruction prefixes, such as:
424	* OS, AS
425	* CS:, DS:, ES:, SS:, FS:, GS:
426	* REPE, REPNE
427	*
428	* note: Currently we supports only up to 4 prefixes per opcode, more
429	* prefixes (normally not used anyway) will cause trap d in guest.
430	* note: Instruction length in IA-32 may be up to 15 bytes, we dont
431	* check this issue, its too hard.
432	*/
433	for (unsigned i = 0; i < 4; i++)
434	{
435	if ( pu8Code[0] != 0xf2 /* REPNE/REPNZ */
436	&& pu8Code[0] != 0xf3 /* REP/REPE/REPZ */
437	&& pu8Code[0] != 0x2e /* CS: */
438	&& pu8Code[0] != 0x36 /* SS: */
439	&& pu8Code[0] != 0x3e /* DS: */
440	&& pu8Code[0] != 0x26 /* ES: */
441	&& pu8Code[0] != 0x64 /* FS: */
442	&& pu8Code[0] != 0x65 /* GS: */
443	&& pu8Code[0] != 0x66 /* OS */
444	&& pu8Code[0] != 0x67 /* AS */
445	)
446	break;
447	pu8Code++;
448	}
449
450	/*
451	* Detect right switch using a callgate.
452	*
453	* We recognize the following causes for the trap 0b:
454	* CALL FAR, CALL FAR []
455	* JMP FAR, JMP FAR []
456	* IRET (may cause a task switch)
457	*
458	* Note: we can't detect whether the trap was caused by a call to a
459	* callgate descriptor or it is a real trap 0b due to a bad selector.
460	* In both situations we'll pass execution to our recompiler so we don't
461	* have to worry.
462	* If we wanted to do better detection, we have set GDT entries to callgate
463	* descriptors pointing to our own handlers.
464	*/
465	/** @todo not sure about IRET, may generate Trap 0d (\#GP), NEED TO CHECK! */
466	if ( pu8Code[0] == 0x9a /* CALL FAR */
467	\|\| ( pu8Code[0] == 0xff /* CALL FAR [] */
468	&& (pu8Code[1] & X86_OPCODE_MODRM_REG_MASK) == 0x18)
469	\|\| pu8Code[0] == 0xea /* JMP FAR */
470	\|\| ( pu8Code[0] == 0xff /* JMP FAR [] */
471	&& (pu8Code[1] & X86_OPCODE_MODRM_REG_MASK) == 0x28)
472	\|\| pu8Code[0] == 0xcf /* IRET */
473	)
474	{
475	/*
476	* Got potential call to callgate.
477	* We simply return execution to the recompiler to do emulation
478	* starting from the instruction which caused the trap.
479	*/
480	pTrpm->uActiveVector = ~0;
481	return VINF_EM_RAW_RING_SWITCH;
482	}
483	}
484
485	/*
486	* Pass trap 0b as is to the recompiler in all other cases.
487	*/
488	return VINF_EM_RAW_GUEST_TRAP;
489	}
490
491
492	/**
493	* \#GP (General Protection Fault) handler for Ring-0 privileged instructions.
494	*
495	* @returns VBox status code.
496	* VINF_SUCCESS means we completely handled this trap,
497	* other codes are passed execution to host context.
498	*
499	* @param pVM The VM handle.
500	* @param pRegFrame Pointer to the register frame for the trap.
501	* @param pCpu The opcode info.
502	* @param PC Program counter.
503	*/
504	static int trpmGCTrap0dHandlerRing0(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, RTGCPTR PC)
505	{
506	int rc;
507
508	/*
509	* Try handle it here, if not return to HC and emulate/interpret it there.
510	*/
511	switch (pCpu->pCurInstr->opcode)
512	{
513	case OP_INT3:
514	/*
515	* Little hack to make the code below not fail
516	*/
517	pCpu->param1.flags = USE_IMMEDIATE8;
518	pCpu->param1.parval = 3;
519	/* fallthru */
520	case OP_INT:
521	{
522	Assert(pCpu->param1.flags & USE_IMMEDIATE8);
523	Assert(!(PATMIsPatchGCAddr(pVM, PC)));
524	if (pCpu->param1.parval == 3)
525	{
526	/* Obsolete!! */
527	/* Int 3 replacement patch? */
528	if (PATMHandleInt3PatchTrap(pVM, pRegFrame) == VINF_SUCCESS)
529	{
530	AssertFailed();
531	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
532	}
533	}
534	rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT);
535	if (VBOX_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
536	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
537
538	pVM->trpm.s.uActiveVector = (pVM->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
539	pVM->trpm.s.fActiveSoftwareInterrupt = true;
540	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH_INT, pRegFrame);
541	}
542
543	#ifdef PATM_EMULATE_SYSENTER
544	case OP_SYSEXIT:
545	case OP_SYSRET:
546	rc = PATMSysCall(pVM, pRegFrame, pCpu);
547	return trpmGCExitTrap(pVM, rc, pRegFrame);
548	#endif
549
550	case OP_HLT:
551	/* If it's in patch code, defer to ring-3. */
552	if (PATMIsPatchGCAddr(pVM, PC))
553	break;
554
555	pRegFrame->eip += pCpu->opsize;
556	return trpmGCExitTrap(pVM, VINF_EM_HALT, pRegFrame);
557
558
559	/*
560	* These instructions are used by PATM and CASM for finding
561	* dangerous non-trapping instructions. Thus, since all
562	* scanning and patching is done in ring-3 we'll have to
563	* return to ring-3 on the first encounter of these instructions.
564	*/
565	case OP_MOV_CR:
566	case OP_MOV_DR:
567	/* We can safely emulate control/debug register move instructions in patched code. */
568	if ( !PATMIsPatchGCAddr(pVM, PC)
569	&& !CSAMIsKnownDangerousInstr(pVM, PC))
570	break;
571	case OP_INVLPG:
572	case OP_LLDT:
573	case OP_STI:
574	case OP_RDTSC:
575	{
576	uint32_t cbIgnored;
577	rc = EMInterpretInstructionCPU(pVM, pCpu, pRegFrame, PC, &cbIgnored);
578	if (VBOX_SUCCESS(rc))
579	pRegFrame->eip += pCpu->opsize;
580	else if (rc == VERR_EM_INTERPRETER)
581	rc = VINF_EM_RAW_EXCEPTION_PRIVILEGED;
582	return trpmGCExitTrap(pVM, rc, pRegFrame);
583	}
584	}
585
586	return trpmGCExitTrap(pVM, VINF_EM_RAW_EXCEPTION_PRIVILEGED, pRegFrame);
587	}
588
589
590	/**
591	* \#GP (General Protection Fault) handler for Ring-3.
592	*
593	* @returns VBox status code.
594	* VINF_SUCCESS means we completely handled this trap,
595	* other codes are passed execution to host context.
596	*
597	* @param pVM The VM handle.
598	* @param pRegFrame Pointer to the register frame for the trap.
599	* @param pCpu The opcode info.
600	*/
601	static int trpmGCTrap0dHandlerRing3(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)
602	{
603	int rc;
604
605	switch (pCpu->pCurInstr->opcode)
606	{
607	/*
608	* STI and CLI are I/O privileged, i.e. if IOPL
609	*/
610	case OP_STI:
611	case OP_CLI:
612	{
613	uint32_t efl = CPUMRawGetEFlags(pVM, pRegFrame);
614	if (X86_EFL_GET_IOPL(efl) >= (unsigned)(pRegFrame->ss & X86_SEL_RPL))
615	{
616	LogFlow(("trpmGCTrap0dHandlerRing3: CLI/STI -> REM\n"));
617	return trpmGCExitTrap(pVM, VINF_EM_RESCHEDULE_REM, pRegFrame);
618	}
619	LogFlow(("trpmGCTrap0dHandlerRing3: CLI/STI -> #GP(0)\n"));
620	break;
621	}
622
623	/*
624	* INT3 and INT xx are ring-switching.
625	* (The shadow IDT will have set the entries to DPL=0, that's why we're here.)
626	*/
627	case OP_INT3:
628	/*
629	* Little hack to make the code below not fail
630	*/
631	pCpu->param1.flags = USE_IMMEDIATE8;
632	pCpu->param1.parval = 3;
633	/* fall thru */
634	case OP_INT:
635	{
636	Assert(pCpu->param1.flags & USE_IMMEDIATE8);
637	rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT);
638	if (VBOX_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
639	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
640
641	pVM->trpm.s.uActiveVector = (pVM->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
642	pVM->trpm.s.fActiveSoftwareInterrupt = true;
643	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH_INT, pRegFrame);
644	}
645
646	/*
647	* SYSCALL, SYSENTER, INTO and BOUND are also ring-switchers.
648	*/
649	case OP_SYSCALL:
650	case OP_SYSENTER:
651	#ifdef PATM_EMULATE_SYSENTER
652	rc = PATMSysCall(pVM, pRegFrame, pCpu);
653	if (rc == VINF_SUCCESS)
654	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
655	/* else no break; */
656	#endif
657	case OP_BOUND:
658	case OP_INTO:
659	pVM->trpm.s.uActiveVector = ~0;
660	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH, pRegFrame);
661	}
662
663	/*
664	* A genuine guest fault.
665	*/
666	return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
667	}
668
669
670	/**
671	* \#GP (General Protection Fault) handler.
672	*
673	* @returns VBox status code.
674	* VINF_SUCCESS means we completely handled this trap,
675	* other codes are passed execution to host context.
676	*
677	* @param pVM The VM handle.
678	* @param pTrpm Pointer to TRPM data (within VM).
679	* @param pRegFrame Pointer to the register frame for the trap.
680	*/
681	static int trpmGCTrap0dHandler(PVM pVM, PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
682	{
683	LogFlow(("trpmGCTrap0dHandler: cs:eip=%RTsel:%VGv uErr=%RX32\n", pRegFrame->ss, pRegFrame->eip, pTrpm->uActiveErrorCode));
684
685	#if 0 /* not right for iret. Shouldn't really be needed as SELMValidateAndConvertCSAddr deals with invalid cs. */
686	/*
687	* Filter out selector problems first as these may mean that the
688	* instruction isn't safe to read. If we're here because CS is NIL
689	* the flattening of cs:eip will deal with that.
690	*/
691	if ( !(pTrpm->uActiveErrorCode & (X86_TRAP_ERR_IDT \| X86_TRAP_ERR_EXTERNAL))
692	&& (pTrpm->uActiveErrorCode & X86_TRAP_ERR_SEL_MASK))
693	{
694	/* It's a guest trap. */
695	return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
696	}
697	#endif
698
699	STAM_PROFILE_ADV_START(&pVM->trpm.s.StatTrap0dDisasm, a);
700
701	/* We always set IOPL to zero which makes e.g. pushf fault in V86 mode. The guest might use IOPL=3 and therefor not expect a #GP.
702	* Simply fall back to the recompiler to emulate this instruction.
703	*/
704	if (pRegFrame->eflags.Bits.u1VM)
705	{
706	STAM_PROFILE_ADV_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
707	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
708	}
709
710	/*
711	* Decode the instruction.
712	*/
713	RTGCPTR PC;
714	int rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &PC);
715	if (VBOX_FAILURE(rc))
716	{
717	Log(("trpmGCTrap0dHandler: Failed to convert %RTsel:%RX32 (cpl=%d) - rc=%Vrc !!\n",
718	pRegFrame->cs, pRegFrame->eip, pRegFrame->ss & X86_SEL_RPL, rc));
719	STAM_PROFILE_ADV_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
720	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
721	}
722
723	DISCPUSTATE Cpu;
724	uint32_t cbOp;
725	rc = EMInterpretDisasOneEx(pVM, (RTGCUINTPTR)PC, pRegFrame, &Cpu, &cbOp);
726	if (VBOX_FAILURE(rc))
727	{
728	STAM_PROFILE_ADV_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
729	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
730	}
731	STAM_PROFILE_ADV_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
732
733	/*
734	* Deal with I/O port access.
735	*/
736	if ( pVM->trpm.s.uActiveErrorCode == 0
737	&& (Cpu.pCurInstr->optype & OPTYPE_PORTIO))
738	{
739	rc = EMInterpretPortIO(pVM, pRegFrame, &Cpu, cbOp);
740	return trpmGCExitTrap(pVM, rc, pRegFrame);
741	}
742
743	/*
744	* Deal with Ring-0 (privileged instructions)
745	*/
746	if ( (pRegFrame->ss & X86_SEL_RPL) <= 1
747	&& !pRegFrame->eflags.Bits.u1VM)
748	return trpmGCTrap0dHandlerRing0(pVM, pRegFrame, &Cpu, PC);
749
750	/*
751	* Deal with Ring-3 GPs.
752	*/
753	if (!pRegFrame->eflags.Bits.u1VM)
754	return trpmGCTrap0dHandlerRing3(pVM, pRegFrame, &Cpu);
755
756	/** @todo what about V86 mode? */
757	return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
758	}
759
760
761	/**
762	* \#GP (General Protection Fault) handler.
763	*
764	* @returns VBox status code.
765	* VINF_SUCCESS means we completely handled this trap,
766	* other codes are passed execution to host context.
767	*
768	* @param pTrpm Pointer to TRPM data (within VM).
769	* @param pRegFrame Pointer to the register frame for the trap.
770	* @internal
771	*/
772	DECLASM(int) TRPMGCTrap0dHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
773	{
774	LogFlow(("TRPMGCTrap0dHandler: eip=%RGv\n", pRegFrame->eip));
775	PVM pVM = TRPM2VM(pTrpm);
776
777	int rc = trpmGCTrap0dHandler(pVM, pTrpm, pRegFrame);
778	switch (rc)
779	{
780	case VINF_EM_RAW_GUEST_TRAP:
781	case VINF_EM_RAW_EXCEPTION_PRIVILEGED:
782	if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
783	rc = VINF_PATM_PATCH_TRAP_GP;
784	break;
785
786	case VINF_EM_RAW_INTERRUPT_PENDING:
787	Assert(TRPMHasTrap(pVM));
788	/* no break; */
789	case VINF_PGM_SYNC_CR3: /** @todo Check this with Sander. */
790	case VINF_IOM_HC_IOPORT_READWRITE:
791	case VINF_IOM_HC_IOPORT_READ:
792	case VINF_IOM_HC_IOPORT_WRITE:
793	case VINF_IOM_HC_MMIO_WRITE:
794	case VINF_IOM_HC_MMIO_READ:
795	case VINF_IOM_HC_MMIO_READ_WRITE:
796	case VINF_PATM_PATCH_INT3:
797	case VINF_EM_RAW_TO_R3:
798	case VINF_EM_RAW_TIMER_PENDING:
799	case VINF_EM_PENDING_REQUEST:
800	case VINF_EM_HALT:
801	case VINF_SUCCESS:
802	break;
803
804	default:
805	AssertMsg(PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip) == false, ("return code %d\n", rc));
806	break;
807	}
808	return rc;
809	}
810
811	/**
812	* \#PF (Page Fault) handler.
813	*
814	* Calls PGM which does the actual handling.
815	*
816	*
817	* @returns VBox status code.
818	* VINF_SUCCESS means we completely handled this trap,
819	* other codes are passed execution to host context.
820	*
821	* @param pTrpm Pointer to TRPM data (within VM).
822	* @param pRegFrame Pointer to the register frame for the trap.
823	* @internal
824	*/
825	DECLASM(int) TRPMGCTrap0eHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
826	{
827	LogBird(("TRPMGCTrap0eHandler: eip=%RGv\n", pRegFrame->eip));
828	PVM pVM = TRPM2VM(pTrpm);
829
830	/*
831	* This is all PGM stuff.
832	*/
833	int rc = PGMTrap0eHandler(pVM, pTrpm->uActiveErrorCode, pRegFrame, (RTGCPTR)pTrpm->uActiveCR2);
834
835	switch (rc)
836	{
837	case VINF_EM_RAW_EMULATE_INSTR:
838	case VINF_EM_RAW_EMULATE_INSTR_PD_FAULT:
839	case VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT:
840	case VINF_EM_RAW_EMULATE_INSTR_TSS_FAULT:
841	case VINF_EM_RAW_EMULATE_INSTR_LDT_FAULT:
842	case VINF_EM_RAW_EMULATE_INSTR_IDT_FAULT:
843	if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
844	rc = VINF_PATCH_EMULATE_INSTR;
845	break;
846
847	case VINF_EM_RAW_GUEST_TRAP:
848	if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
849	return VINF_PATM_PATCH_TRAP_PF;
850
851	rc = TRPMForwardTrap(pVM, pRegFrame, 0xE, 0, TRPM_TRAP_HAS_ERRORCODE, TRPM_TRAP);
852	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
853	break;
854
855	case VINF_EM_RAW_INTERRUPT_PENDING:
856	Assert(TRPMHasTrap(pVM));
857	/* no break; */
858	case VINF_IOM_HC_MMIO_READ:
859	case VINF_IOM_HC_MMIO_WRITE:
860	case VINF_IOM_HC_MMIO_READ_WRITE:
861	case VINF_PATM_HC_MMIO_PATCH_READ:
862	case VINF_PATM_HC_MMIO_PATCH_WRITE:
863	case VINF_SUCCESS:
864	case VINF_EM_RAW_TO_R3:
865	case VINF_EM_PENDING_REQUEST:
866	case VINF_EM_RAW_TIMER_PENDING:
867	case VINF_CSAM_PENDING_ACTION:
868	case VINF_PGM_SYNC_CR3: /** @todo Check this with Sander. */
869	break;
870
871	default:
872	AssertMsg(PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip) == false, ("Patch address for return code %d. eip=%08x\n", rc, pRegFrame->eip));
873	break;
874	}
875	return trpmGCExitTrap(pVM, rc, pRegFrame);
876	}
877
878
879	/**
880	* Scans for the EIP in the specified array of trap handlers.
881	*
882	* If we don't fine the EIP, we'll panic.
883	*
884	* @returns VBox status code.
885	*
886	* @param pVM The VM handle.
887	* @param pRegFrame Pointer to the register frame for the trap.
888	* @param paHandlers The array of trap handler records.
889	* @param pEndRecord The end record (exclusive).
890	*/
891	static int trpmGCHyperGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, PCTRPMGCHYPER paHandlers, PCTRPMGCHYPER pEndRecord)
892	{
893	uintptr_t uEip = (uintptr_t)pRegFrame->eip;
894	Assert(paHandlers <= pEndRecord);
895
896	Log(("trpmGCHyperGeneric: uEip=%x %p-%p\n", uEip, paHandlers, pEndRecord));
897
898	#if 0 /// @todo later
899	/*
900	* Start by doing a kind of binary search.
901	*/
902	unsigned iStart = 0;
903	unsigned iEnd = pEndRecord - paHandlers;
904	unsigned i = iEnd / 2;
905	#endif
906
907	/*
908	* Do a linear search now (in case the array wasn't properly sorted).
909	*/
910	for (PCTRPMGCHYPER pCur = paHandlers; pCur < pEndRecord; pCur++)
911	{
912	if ( pCur->uStartEIP <= uEip
913	&& (pCur->uEndEIP ? pCur->uEndEIP > uEip : pCur->uStartEIP == uEip))
914	return pCur->pfnHandler(pVM, pRegFrame, pCur->uUser);
915	}
916
917	return VERR_TRPM_DONT_PANIC;
918	}
919
920
921	/**
922	* Hypervisor \#NP ((segment) Not Present) handler.
923	*
924	* Scans for the EIP in the registered trap handlers.
925	*
926	* @returns VBox status code.
927	* VINF_SUCCESS means we completely handled this trap,
928	* other codes are passed back to host context.
929	*
930	* @param pTrpm Pointer to TRPM data (within VM).
931	* @param pRegFrame Pointer to the register frame for the trap.
932	* @internal
933	*/
934	DECLASM(int) TRPMGCHyperTrap0bHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
935	{
936	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0bHandlers, g_aTrap0bHandlersEnd);
937	}
938
939
940	/**
941	* Hypervisor \#GP (General Protection Fault) handler.
942	*
943	* Scans for the EIP in the registered trap handlers.
944	*
945	* @returns VBox status code.
946	* VINF_SUCCESS means we completely handled this trap,
947	* other codes are passed back to host context.
948	*
949	* @param pTrpm Pointer to TRPM data (within VM).
950	* @param pRegFrame Pointer to the register frame for the trap.
951	* @internal
952	*/
953	DECLASM(int) TRPMGCHyperTrap0dHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
954	{
955	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
956	}
957
958
959	/**
960	* Hypervisor \#PF (Page Fault) handler.
961	*
962	* Scans for the EIP in the registered trap handlers.
963	*
964	* @returns VBox status code.
965	* VINF_SUCCESS means we completely handled this trap,
966	* other codes are passed back to host context.
967	*
968	* @param pTrpm Pointer to TRPM data (within VM).
969	* @param pRegFrame Pointer to the register frame for the trap.
970	* @internal
971	*/
972	DECLASM(int) TRPMGCHyperTrap0eHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
973	{
974	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
975	}
976
977
978	/**
979	* Deal with hypervisor traps occuring when resuming execution on a trap.
980	*
981	* @returns VBox status code.
982	* @param pVM The VM handle.
983	* @param pRegFrame Register frame.
984	* @param uUser User arg.
985	*/
986	DECLCALLBACK(int) trpmGCTrapInGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser)
987	{
988	Log(("trpmGCTrapInGeneric: eip=%RX32 uUser=%#x\n", pRegFrame->eip, uUser));
989
990	if (uUser & TRPM_TRAP_IN_HYPER)
991	{
992	/*
993	* Check that there is still some stack left, if not we'll flag
994	* a guru meditation (the alternative is a triple fault).
995	*/
996	RTGCUINTPTR cbStackUsed = (RTGCUINTPTR)VMMGetStackGC(pVM) - pRegFrame->esp;
997	if (cbStackUsed > VMM_STACK_SIZE - _1K)
998	{
999	LogRel(("trpmGCTrapInGeneric: ran out of stack: esp=#x cbStackUsed=%#x\n", pRegFrame->esp, cbStackUsed));
1000	return VERR_TRPM_DONT_PANIC;
1001	}
1002
1003	/*
1004	* Just zero the register containing the selector in question.
1005	* We'll deal with the actual stale or troublesome selector value in
1006	* the outermost trap frame.
1007	*/
1008	PCPUMCTXCORE pCoreCtx = (PCPUMCTXCORE)pRegFrame->esp;
1009	switch (uUser & TRPM_TRAP_IN_OP_MASK)
1010	{
1011	case TRPM_TRAP_IN_MOV_GS:
1012	pRegFrame->eax = 0;
1013	pRegFrame->gs = 0; /* prevent recursive trouble. */
1014	break;
1015	case TRPM_TRAP_IN_MOV_FS:
1016	pRegFrame->eax = 0;
1017	pRegFrame->fs = 0; /* prevent recursive trouble. */
1018	return VINF_SUCCESS;
1019
1020	default:
1021	AssertMsgFailed(("Invalid uUser=%#x\n", uUser));
1022	return VERR_INTERNAL_ERROR;
1023	}
1024	}
1025	else
1026	{
1027	/*
1028	* Reconstruct the guest context and switch to the recompiler.
1029	* We ASSUME we're only at
1030	*/
1031	CPUMCTXCORE CtxCore = *pRegFrame;
1032	uint32_t pEsp = (uint32_t )pRegFrame->esp;
1033	int rc;
1034
1035	switch (uUser)
1036	{
1037	/*
1038	* This will only occur when resuming guest code in a trap handler!
1039	*/
1040	/* @note ASSUMES esp points to the temporary guest CPUMCTXCORE!!! */
1041	case TRPM_TRAP_IN_MOV_GS:
1042	case TRPM_TRAP_IN_MOV_FS:
1043	case TRPM_TRAP_IN_MOV_ES:
1044	case TRPM_TRAP_IN_MOV_DS:
1045	{
1046	PCPUMCTXCORE pTempGuestCtx = (PCPUMCTXCORE)pEsp;
1047
1048	/* Just copy the whole thing; several selector registers, eip (etc) and eax are not yet in pRegFrame. */
1049	CtxCore = *pTempGuestCtx;
1050	rc = VINF_EM_RAW_STALE_SELECTOR;
1051	break;
1052	}
1053
1054	/*
1055	* This will only occur when resuming guest code!
1056	*/
1057	case TRPM_TRAP_IN_IRET:
1058	CtxCore.eip = *pEsp++;
1059	CtxCore.cs = (RTSEL)*pEsp++;
1060	CtxCore.eflags.u32 = *pEsp++;
1061	CtxCore.esp = *pEsp++;
1062	CtxCore.ss = (RTSEL)*pEsp++;
1063	rc = VINF_EM_RAW_IRET_TRAP;
1064	break;
1065
1066	/*
1067	* This will only occur when resuming V86 guest code!
1068	*/
1069	case TRPM_TRAP_IN_IRET \| TRPM_TRAP_IN_V86:
1070	CtxCore.eip = *pEsp++;
1071	CtxCore.cs = (RTSEL)*pEsp++;
1072	CtxCore.eflags.u32 = *pEsp++;
1073	CtxCore.esp = *pEsp++;
1074	CtxCore.ss = (RTSEL)*pEsp++;
1075	CtxCore.es = (RTSEL)*pEsp++;
1076	CtxCore.ds = (RTSEL)*pEsp++;
1077	CtxCore.fs = (RTSEL)*pEsp++;
1078	CtxCore.gs = (RTSEL)*pEsp++;
1079	rc = VINF_EM_RAW_IRET_TRAP;
1080	break;
1081
1082	default:
1083	AssertMsgFailed(("Invalid uUser=%#x\n", uUser));
1084	return VERR_INTERNAL_ERROR;
1085	}
1086
1087
1088	CPUMSetGuestCtxCore(pVM, &CtxCore);
1089	TRPMGCHyperReturnToHost(pVM, rc);
1090	}
1091
1092	AssertMsgFailed(("Impossible!\n"));
1093	return VERR_INTERNAL_ERROR;
1094	}
1095

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source: vbox/trunk/src/VBox/VMM/VMMGC/TRPMGCHandlers.cpp@ 1237

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