TRPMGCHandlers.cpp@ 8861

Last change on this file since 8861 was 8831, checked in by vboxsync, 17 years ago
dtrace experiments.
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1	/* $Id: TRPMGCHandlers.cpp 8831 2008-05-15 02:48:57Z vboxsync $ */
2	/** @file
3	* TRPM - Guest Context Trap Handlers, CPP part
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22
23	/*******************************************************************************
24	* Header Files *
25	*******************************************************************************/
26	#define LOG_GROUP LOG_GROUP_TRPM
27	#include <VBox/selm.h>
28	#include <VBox/iom.h>
29	#include <VBox/pgm.h>
30	#include <VBox/pdm.h>
31	#include <VBox/dbgf.h>
32	#include <VBox/em.h>
33	#include <VBox/csam.h>
34	#include <VBox/patm.h>
35	#include <VBox/mm.h>
36	#include <VBox/cpum.h>
37	#include "TRPMInternal.h"
38	#include <VBox/vm.h>
39	#include <VBox/param.h>
40
41	#include <VBox/err.h>
42	#include <VBox/dis.h>
43	#include <VBox/disopcode.h>
44	#include <VBox/x86.h>
45	#include <VBox/log.h>
46	#include <VBox/tm.h>
47	#include <iprt/asm.h>
48	#include <iprt/assert.h>
49
50	/* still here. MODR/M byte parsing */
51	#define X86_OPCODE_MODRM_MOD_MASK 0xc0
52	#define X86_OPCODE_MODRM_REG_MASK 0x38
53	#define X86_OPCODE_MODRM_RM_MASK 0x07
54
55	/** Pointer to a readonly hypervisor trap record. */
56	typedef const struct TRPMGCHYPER *PCTRPMGCHYPER;
57
58	/**
59	* A hypervisor trap record.
60	* This contains information about a handler for a instruction range.
61	*
62	* @remark This must match what TRPM_HANDLER outputs.
63	*/
64	typedef struct TRPMGCHYPER
65	{
66	/** The start address. */
67	uintptr_t uStartEIP;
68	/** The end address. (exclusive)
69	* If NULL the it's only for the instruction at pvStartEIP. */
70	uintptr_t uEndEIP;
71	/**
72	* The handler.
73	*
74	* @returns VBox status code
75	* VINF_SUCCESS means we've handled the trap.
76	* Any other error code means returning to the host context.
77	* @param pVM The VM handle.
78	* @param pRegFrame The register frame.
79	* @param uUser The user argument.
80	*/
81	DECLGCCALLBACKMEMBER(int, pfnHandler, (PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser));
82	/** Whatever the handler desires to put here. */
83	uintptr_t uUser;
84	} TRPMGCHYPER;
85
86
87	/*******************************************************************************
88	* Global Variables *
89	*******************************************************************************/
90	__BEGIN_DECLS
91	/** Defined in VMMGC0.asm or VMMGC99.asm.
92	* @{ */
93	extern const TRPMGCHYPER g_aTrap0bHandlers[1];
94	extern const TRPMGCHYPER g_aTrap0bHandlersEnd[1];
95	extern const TRPMGCHYPER g_aTrap0dHandlers[1];
96	extern const TRPMGCHYPER g_aTrap0dHandlersEnd[1];
97	extern const TRPMGCHYPER g_aTrap0eHandlers[1];
98	extern const TRPMGCHYPER g_aTrap0eHandlersEnd[1];
99	/** @} */
100	__END_DECLS
101
102
103	/*******************************************************************************
104	* Internal Functions *
105	*******************************************************************************/
106	__BEGIN_DECLS /* addressed from asm (not called so no DECLASM). */
107	DECLCALLBACK(int) trpmGCTrapInGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser);
108	__END_DECLS
109
110
111
112	/**
113	* Exits the trap, called when exiting a trap handler.
114	*
115	* Will reset the trap if it's not a guest trap or the trap
116	* is already handled. Will process resume guest FFs.
117	*
118	* @returns rc.
119	* @param pVM VM handle.
120	* @param rc The VBox status code to return.
121	* @param pRegFrame Pointer to the register frame for the trap.
122	*/
123	static int trpmGCExitTrap(PVM pVM, int rc, PCPUMCTXCORE pRegFrame)
124	{
125	uint32_t uOldActiveVector = pVM->trpm.s.uActiveVector;
126	NOREF(uOldActiveVector);
127
128	/* Reset trap? */
129	if ( rc != VINF_EM_RAW_GUEST_TRAP
130	&& rc != VINF_EM_RAW_RING_SWITCH_INT)
131	pVM->trpm.s.uActiveVector = ~0;
132
133	#ifdef VBOX_HIGH_RES_TIMERS_HACK
134	/*
135	* Occationally we should poll timers.
136	* We must NOT do this too frequently as it adds a significant overhead
137	* and it'll kill us if the trap load is high. (See #1354.)
138	* (The heuristic is not very intelligent, we should really check trap
139	* frequency etc. here, but alas, we lack any such information atm.)
140	*/
141	static unsigned s_iTimerPoll = 0;
142	if (rc == VINF_SUCCESS)
143	{
144	if (!(++s_iTimerPoll & 0xf))
145	{
146	uint64_t cTicks = TMTimerPoll(pVM); NOREF(cTicks);
147	Log2(("TMTimerPoll at %VGv returned %RX64 (VM_FF_TIMER=%d)\n", pRegFrame->eip, cTicks, VM_FF_ISPENDING(pVM, VM_FF_TIMER)));
148	}
149	}
150	else
151	s_iTimerPoll = 0;
152	#endif
153
154	/* Clear pending inhibit interrupt state if required. (necessary for dispatching interrupts later on) */
155	if (VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS))
156	{
157	Log2(("VM_FF_INHIBIT_INTERRUPTS at %VGv successor %VGv\n", pRegFrame->eip, EMGetInhibitInterruptsPC(pVM)));
158	if (pRegFrame->eip != EMGetInhibitInterruptsPC(pVM))
159	{
160	/** @note we intentionally don't clear VM_FF_INHIBIT_INTERRUPTS here if the eip is the same as the inhibited instr address.
161	* Before we are able to execute this instruction in raw mode (iret to guest code) an external interrupt might
162	* force a world switch again. Possibly allowing a guest interrupt to be dispatched in the process. This could
163	* break the guest. Sounds very unlikely, but such timing sensitive problem are not as rare as you might think.
164	*/
165	VM_FF_CLEAR(pVM, VM_FF_INHIBIT_INTERRUPTS);
166	}
167	}
168
169	/*
170	* Pending resume-guest-FF?
171	* Or pending (A)PIC interrupt? Windows XP will crash if we delay APIC interrupts.
172	*/
173	if ( rc == VINF_SUCCESS
174	&& VM_FF_ISPENDING(pVM, VM_FF_TO_R3 \| VM_FF_TIMER \| VM_FF_INTERRUPT_APIC \| VM_FF_INTERRUPT_PIC \| VM_FF_PGM_SYNC_CR3 \| VM_FF_PGM_SYNC_CR3_NON_GLOBAL \| VM_FF_REQUEST))
175	{
176	/* Pending Ring-3 action. */
177	if (VM_FF_ISPENDING(pVM, VM_FF_TO_R3))
178	{
179	VM_FF_CLEAR(pVM, VM_FF_TO_R3);
180	rc = VINF_EM_RAW_TO_R3;
181	}
182	/* Pending timer action. */
183	else if (VM_FF_ISPENDING(pVM, VM_FF_TIMER))
184	rc = VINF_EM_RAW_TIMER_PENDING;
185	/* Pending interrupt: dispatch it. */
186	else if ( VM_FF_ISPENDING(pVM, VM_FF_INTERRUPT_APIC \| VM_FF_INTERRUPT_PIC)
187	&& !VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS)
188	&& PATMAreInterruptsEnabledByCtxCore(pVM, pRegFrame)
189	)
190	{
191	uint8_t u8Interrupt;
192	rc = PDMGetInterrupt(pVM, &u8Interrupt);
193	Log(("trpmGCExitTrap: u8Interrupt=%d (%#x) rc=%Vrc\n", u8Interrupt, u8Interrupt, rc));
194	AssertFatalMsgRC(rc, ("PDMGetInterrupt failed with %Vrc\n", rc));
195	rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)u8Interrupt, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_HARDWARE_INT);
196	/* can't return if successful */
197	Assert(rc != VINF_SUCCESS);
198
199	/* Stop the profile counter that was started in TRPMGCHandlersA.asm */
200	Assert(uOldActiveVector <= 16);
201	STAM_PROFILE_ADV_STOP(&pVM->trpm.s.aStatGCTraps[uOldActiveVector], a);
202
203	/* Assert the trap and go to the recompiler to dispatch it. */
204	TRPMAssertTrap(pVM, u8Interrupt, TRPM_HARDWARE_INT);
205
206	STAM_PROFILE_ADV_START(&pVM->trpm.s.aStatGCTraps[uOldActiveVector], a);
207	rc = VINF_EM_RAW_INTERRUPT_PENDING;
208	}
209	/*
210	* Try sync CR3?
211	* This ASSUMES that the MOV CRx, x emulation doesn't return with VINF_PGM_SYNC_CR3. (a bit hackish)
212	*/
213	else if (VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 \| VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
214	#if 1
215	rc = PGMSyncCR3(pVM, CPUMGetGuestCR0(pVM), CPUMGetGuestCR3(pVM), CPUMGetGuestCR4(pVM), VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3));
216	#else
217	rc = VINF_PGM_SYNC_CR3;
218	#endif
219	/* Pending request packets might contain actions that need immediate attention, such as pending hardware interrupts. */
220	else if (VM_FF_ISPENDING(pVM, VM_FF_REQUEST))
221	rc = VINF_EM_PENDING_REQUEST;
222	}
223
224	AssertMsg( rc != VINF_SUCCESS
225	\|\| ( pRegFrame->eflags.Bits.u1IF
226	&& ( pRegFrame->eflags.Bits.u2IOPL < (unsigned)(pRegFrame->ss & X86_SEL_RPL) \|\| pRegFrame->eflags.Bits.u1VM))
227	, ("rc = %VGv\neflags=%RX32 ss=%RTsel IOPL=%d\n", rc, pRegFrame->eflags.u32, pRegFrame->ss, pRegFrame->eflags.Bits.u2IOPL));
228	return rc;
229	}
230
231
232	/**
233	* \#DB (Debug event) handler.
234	*
235	* @returns VBox status code.
236	* VINF_SUCCESS means we completely handled this trap,
237	* other codes are passed execution to host context.
238	*
239	* @param pTrpm Pointer to TRPM data (within VM).
240	* @param pRegFrame Pointer to the register frame for the trap.
241	* @internal
242	*/
243	DECLASM(int) TRPMGCTrap01Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
244	{
245	RTGCUINTREG uDr6 = ASMGetAndClearDR6();
246	PVM pVM = TRPM2VM(pTrpm);
247	LogFlow(("TRPMGCTrap01Handler: cs:eip=%04x:%08x uDr6=%RTreg\n", pRegFrame->cs, pRegFrame->eip, uDr6));
248
249	/*
250	* We currently don't make sure of the X86_DR7_GD bit, but
251	* there might come a time when we do.
252	*/
253	if ((uDr6 & X86_DR6_BD) == X86_DR6_BD)
254	{
255	AssertReleaseMsgFailed(("X86_DR6_BD isn't used, but it's set! dr7=%RTreg(%RTreg) dr6=%RTreg\n",
256	ASMGetDR7(), CPUMGetHyperDR7(pVM), uDr6));
257	return VERR_NOT_IMPLEMENTED;
258	}
259
260	AssertReleaseMsg(!(uDr6 & X86_DR6_BT), ("X86_DR6_BT is impossible!\n"));
261
262	/*
263	* Now leave the rest to the DBGF.
264	*/
265	int rc = DBGFGCTrap01Handler(pVM, pRegFrame, uDr6);
266	if (rc == VINF_EM_RAW_GUEST_TRAP)
267	CPUMSetGuestDR6(pVM, uDr6);
268
269	return trpmGCExitTrap(pVM, rc, pRegFrame);
270	}
271
272
273
274	/**
275	* NMI handler, for when we are using NMIs to debug things.
276	*
277	* @returns VBox status code.
278	* VINF_SUCCESS means we completely handled this trap,
279	* other codes are passed execution to host context.
280	*
281	* @param pTrpm Pointer to TRPM data (within VM).
282	* @param pRegFrame Pointer to the register frame for the trap.
283	* @internal
284	* @remark This is not hooked up unless you're building with VBOX_WITH_NMI defined.
285	*/
286	DECLASM(int) TRPMGCTrap02Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
287	{
288	LogFlow(("TRPMGCTrap02Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
289	RTLogComPrintf("TRPMGCTrap02Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip);
290	return VERR_TRPM_DONT_PANIC;
291	}
292
293
294	/**
295	* \#BP (Breakpoint) handler.
296	*
297	* @returns VBox status code.
298	* VINF_SUCCESS means we completely handled this trap,
299	* other codes are passed execution to host context.
300	*
301	* @param pTrpm Pointer to TRPM data (within VM).
302	* @param pRegFrame Pointer to the register frame for the trap.
303	* @internal
304	*/
305	DECLASM(int) TRPMGCTrap03Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
306	{
307	LogFlow(("TRPMGCTrap03Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
308	PVM pVM = TRPM2VM(pTrpm);
309	int rc;
310
311	/*
312	* Both PATM are using INT3s, let them have a go first.
313	*/
314	if ( (pRegFrame->ss & X86_SEL_RPL) == 1
315	&& !pRegFrame->eflags.Bits.u1VM)
316	{
317	rc = PATMHandleInt3PatchTrap(pVM, pRegFrame);
318	if (rc == VINF_SUCCESS \|\| rc == VINF_EM_RAW_EMULATE_INSTR \|\| rc == VINF_PATM_PATCH_INT3 \|\| rc == VINF_PATM_DUPLICATE_FUNCTION)
319	return trpmGCExitTrap(pVM, rc, pRegFrame);
320	}
321	rc = DBGFGCTrap03Handler(pVM, pRegFrame);
322	/* anything we should do with this? Schedule it in GC? */
323	return trpmGCExitTrap(pVM, rc, pRegFrame);
324	}
325
326
327	/**
328	* Trap handler for illegal opcode fault (\#UD).
329	*
330	* @returns VBox status code.
331	* VINF_SUCCESS means we completely handled this trap,
332	* other codes are passed execution to host context.
333	*
334	* @param pTrpm Pointer to TRPM data (within VM).
335	* @param pRegFrame Pointer to the register frame for the trap.
336	* @internal
337	*/
338	DECLASM(int) TRPMGCTrap06Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
339	{
340	PVM pVM = TRPM2VM(pTrpm);
341	int rc;
342
343	LogFlow(("TRPMGCTrap06Handler %VGv eflags=%x\n", pRegFrame->eip, pRegFrame->eflags.u32));
344
345	if (CPUMGetGuestCPL(pVM, pRegFrame) == 0)
346	{
347	/*
348	* Decode the instruction.
349	*/
350	RTGCPTR PC;
351	rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &PC);
352	if (VBOX_FAILURE(rc))
353	{
354	Log(("TRPMGCTrap06Handler: Failed to convert %RTsel:%RX32 (cpl=%d) - rc=%Vrc !!\n", pRegFrame->cs, pRegFrame->eip, pRegFrame->ss & X86_SEL_RPL, rc));
355	return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
356	}
357
358	DISCPUSTATE Cpu;
359	uint32_t cbOp;
360	rc = EMInterpretDisasOneEx(pVM, (RTGCUINTPTR)PC, pRegFrame, &Cpu, &cbOp);
361	if (VBOX_FAILURE(rc))
362	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
363
364	if ( PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip)
365	&& Cpu.pCurInstr->opcode == OP_ILLUD2)
366	{
367	rc = PATMGCHandleIllegalInstrTrap(pVM, pRegFrame);
368	if (rc == VINF_SUCCESS \|\| rc == VINF_EM_RAW_EMULATE_INSTR \|\| rc == VINF_PATM_DUPLICATE_FUNCTION \|\| rc == VINF_PATM_PENDING_IRQ_AFTER_IRET \|\| rc == VINF_EM_RESCHEDULE)
369	return trpmGCExitTrap(pVM, rc, pRegFrame);
370	}
371	/* Note: monitor causes an #UD exception instead of #GP when not executed in ring 0. */
372	else if (Cpu.pCurInstr->opcode == OP_MONITOR)
373	{
374	uint32_t cbIgnored;
375	rc = EMInterpretInstructionCPU(pVM, &Cpu, pRegFrame, PC, &cbIgnored);
376	if (RT_LIKELY(VBOX_SUCCESS(rc)))
377	pRegFrame->eip += Cpu.opsize;
378	}
379	/* Speed up dtrace and don't entrust invalid lock sequences to the recompiler. */
380	else if (Cpu.prefix & PREFIX_LOCK)
381	{
382	Log(("TRPMGCTrap06Handler: pc=%RGv op=%d\n", pRegFrame->eip, Cpu.pCurInstr->opcode));
383	/** @todo Clear this with PATM - it gets upset when returning VINF_EM_RAW_GUEST_TRAP on a patch address. */
384	#ifdef DTRACE_EXPERIMENT
385	rc = TRPMForwardTrap(pVM, pRegFrame, 0x6, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_TRAP);
386	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
387	#else
388	rc = VINF_EM_RAW_EMULATE_INSTR;
389	#endif
390	}
391	/* Never generate a raw trap here; it might be an instruction, that requires emulation. */
392	else
393	rc = VINF_EM_RAW_EMULATE_INSTR;
394	}
395	else
396	{
397	rc = TRPMForwardTrap(pVM, pRegFrame, 0x6, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_TRAP);
398	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
399	}
400
401	return trpmGCExitTrap(pVM, rc, pRegFrame);
402	}
403
404
405	/**
406	* Trap handler for device not present fault (\#NM).
407	*
408	* Device not available, FP or (F)WAIT instruction.
409	*
410	* @returns VBox status code.
411	* VINF_SUCCESS means we completely handled this trap,
412	* other codes are passed execution to host context.
413	*
414	* @param pTrpm Pointer to TRPM data (within VM).
415	* @param pRegFrame Pointer to the register frame for the trap.
416	* @internal
417	*/
418	DECLASM(int) TRPMGCTrap07Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
419	{
420	PVM pVM = TRPM2VM(pTrpm);
421
422	LogFlow(("TRPMTrap07HandlerGC: eip=%VGv\n", pRegFrame->eip));
423	return CPUMHandleLazyFPU(pVM);
424	}
425
426
427	/**
428	* \#NP ((segment) Not Present) handler.
429	*
430	* @returns VBox status code.
431	* VINF_SUCCESS means we completely handled this trap,
432	* other codes are passed execution to host context.
433	*
434	* @param pTrpm Pointer to TRPM data (within VM).
435	* @param pRegFrame Pointer to the register frame for the trap.
436	* @internal
437	*/
438	DECLASM(int) TRPMGCTrap0bHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
439	{
440	LogFlow(("TRPMGCTrap0bHandler: eip=%VGv\n", pRegFrame->eip));
441	PVM pVM = TRPM2VM(pTrpm);
442
443	/*
444	* Try to detect instruction by opcode which caused trap.
445	* XXX note: this code may cause \#PF (trap e) or \#GP (trap d) while
446	* accessing user code. need to handle it somehow in future!
447	*/
448	uint8_t *pu8Code;
449	if (SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, (PRTGCPTR)&pu8Code) == VINF_SUCCESS)
450	{
451	/*
452	* First skip possible instruction prefixes, such as:
453	* OS, AS
454	* CS:, DS:, ES:, SS:, FS:, GS:
455	* REPE, REPNE
456	*
457	* note: Currently we supports only up to 4 prefixes per opcode, more
458	* prefixes (normally not used anyway) will cause trap d in guest.
459	* note: Instruction length in IA-32 may be up to 15 bytes, we dont
460	* check this issue, its too hard.
461	*/
462	for (unsigned i = 0; i < 4; i++)
463	{
464	if ( pu8Code[0] != 0xf2 /* REPNE/REPNZ */
465	&& pu8Code[0] != 0xf3 /* REP/REPE/REPZ */
466	&& pu8Code[0] != 0x2e /* CS: */
467	&& pu8Code[0] != 0x36 /* SS: */
468	&& pu8Code[0] != 0x3e /* DS: */
469	&& pu8Code[0] != 0x26 /* ES: */
470	&& pu8Code[0] != 0x64 /* FS: */
471	&& pu8Code[0] != 0x65 /* GS: */
472	&& pu8Code[0] != 0x66 /* OS */
473	&& pu8Code[0] != 0x67 /* AS */
474	)
475	break;
476	pu8Code++;
477	}
478
479	/*
480	* Detect right switch using a callgate.
481	*
482	* We recognize the following causes for the trap 0b:
483	* CALL FAR, CALL FAR []
484	* JMP FAR, JMP FAR []
485	* IRET (may cause a task switch)
486	*
487	* Note: we can't detect whether the trap was caused by a call to a
488	* callgate descriptor or it is a real trap 0b due to a bad selector.
489	* In both situations we'll pass execution to our recompiler so we don't
490	* have to worry.
491	* If we wanted to do better detection, we have set GDT entries to callgate
492	* descriptors pointing to our own handlers.
493	*/
494	/** @todo not sure about IRET, may generate Trap 0d (\#GP), NEED TO CHECK! */
495	if ( pu8Code[0] == 0x9a /* CALL FAR */
496	\|\| ( pu8Code[0] == 0xff /* CALL FAR [] */
497	&& (pu8Code[1] & X86_OPCODE_MODRM_REG_MASK) == 0x18)
498	\|\| pu8Code[0] == 0xea /* JMP FAR */
499	\|\| ( pu8Code[0] == 0xff /* JMP FAR [] */
500	&& (pu8Code[1] & X86_OPCODE_MODRM_REG_MASK) == 0x28)
501	\|\| pu8Code[0] == 0xcf /* IRET */
502	)
503	{
504	/*
505	* Got potential call to callgate.
506	* We simply return execution to the recompiler to do emulation
507	* starting from the instruction which caused the trap.
508	*/
509	pTrpm->uActiveVector = ~0;
510	return VINF_EM_RAW_RING_SWITCH;
511	}
512	}
513
514	/*
515	* Pass trap 0b as is to the recompiler in all other cases.
516	*/
517	return VINF_EM_RAW_GUEST_TRAP;
518	}
519
520
521	/**
522	* \#GP (General Protection Fault) handler for Ring-0 privileged instructions.
523	*
524	* @returns VBox status code.
525	* VINF_SUCCESS means we completely handled this trap,
526	* other codes are passed execution to host context.
527	*
528	* @param pVM The VM handle.
529	* @param pRegFrame Pointer to the register frame for the trap.
530	* @param pCpu The opcode info.
531	* @param PC The program counter corresponding to cs:eip in pRegFrame.
532	*/
533	static int trpmGCTrap0dHandlerRing0(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, RTGCPTR PC)
534	{
535	int rc;
536
537	/*
538	* Try handle it here, if not return to HC and emulate/interpret it there.
539	*/
540	switch (pCpu->pCurInstr->opcode)
541	{
542	case OP_INT3:
543	/*
544	* Little hack to make the code below not fail
545	*/
546	pCpu->param1.flags = USE_IMMEDIATE8;
547	pCpu->param1.parval = 3;
548	/* fallthru */
549	case OP_INT:
550	{
551	Assert(pCpu->param1.flags & USE_IMMEDIATE8);
552	Assert(!(PATMIsPatchGCAddr(pVM, PC)));
553	if (pCpu->param1.parval == 3)
554	{
555	/* Int 3 replacement patch? */
556	if (PATMHandleInt3PatchTrap(pVM, pRegFrame) == VINF_SUCCESS)
557	{
558	AssertFailed();
559	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
560	}
561	}
562	rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT);
563	if (VBOX_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
564	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
565
566	pVM->trpm.s.uActiveVector = (pVM->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
567	pVM->trpm.s.enmActiveType = TRPM_SOFTWARE_INT;
568	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH_INT, pRegFrame);
569	}
570
571	#ifdef PATM_EMULATE_SYSENTER
572	case OP_SYSEXIT:
573	case OP_SYSRET:
574	rc = PATMSysCall(pVM, pRegFrame, pCpu);
575	return trpmGCExitTrap(pVM, rc, pRegFrame);
576	#endif
577
578	case OP_HLT:
579	/* If it's in patch code, defer to ring-3. */
580	if (PATMIsPatchGCAddr(pVM, PC))
581	break;
582
583	pRegFrame->eip += pCpu->opsize;
584	return trpmGCExitTrap(pVM, VINF_EM_HALT, pRegFrame);
585
586
587	/*
588	* These instructions are used by PATM and CASM for finding
589	* dangerous non-trapping instructions. Thus, since all
590	* scanning and patching is done in ring-3 we'll have to
591	* return to ring-3 on the first encounter of these instructions.
592	*/
593	case OP_MOV_CR:
594	case OP_MOV_DR:
595	/* We can safely emulate control/debug register move instructions in patched code. */
596	if ( !PATMIsPatchGCAddr(pVM, PC)
597	&& !CSAMIsKnownDangerousInstr(pVM, PC))
598	break;
599	case OP_INVLPG:
600	case OP_LLDT:
601	case OP_STI:
602	case OP_RDTSC: /* just in case */
603	case OP_CLTS:
604	{
605	uint32_t cbIgnored;
606	rc = EMInterpretInstructionCPU(pVM, pCpu, pRegFrame, PC, &cbIgnored);
607	if (VBOX_SUCCESS(rc))
608	pRegFrame->eip += pCpu->opsize;
609	else if (rc == VERR_EM_INTERPRETER)
610	rc = VINF_EM_RAW_EXCEPTION_PRIVILEGED;
611	return trpmGCExitTrap(pVM, rc, pRegFrame);
612	}
613	}
614
615	return trpmGCExitTrap(pVM, VINF_EM_RAW_EXCEPTION_PRIVILEGED, pRegFrame);
616	}
617
618
619	/**
620	* \#GP (General Protection Fault) handler for Ring-3.
621	*
622	* @returns VBox status code.
623	* VINF_SUCCESS means we completely handled this trap,
624	* other codes are passed execution to host context.
625	*
626	* @param pVM The VM handle.
627	* @param pRegFrame Pointer to the register frame for the trap.
628	* @param pCpu The opcode info.
629	* @param PC The program counter corresponding to cs:eip in pRegFrame.
630	*/
631	static int trpmGCTrap0dHandlerRing3(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, RTGCPTR PC)
632	{
633	int rc;
634
635	Assert(!pRegFrame->eflags.Bits.u1VM);
636
637	switch (pCpu->pCurInstr->opcode)
638	{
639	/*
640	* INT3 and INT xx are ring-switching.
641	* (The shadow IDT will have set the entries to DPL=0, that's why we're here.)
642	*/
643	case OP_INT3:
644	/*
645	* Little hack to make the code below not fail
646	*/
647	pCpu->param1.flags = USE_IMMEDIATE8;
648	pCpu->param1.parval = 3;
649	/* fall thru */
650	case OP_INT:
651	{
652	Assert(pCpu->param1.flags & USE_IMMEDIATE8);
653	rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT);
654	if (VBOX_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
655	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
656
657	pVM->trpm.s.uActiveVector = (pVM->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
658	pVM->trpm.s.enmActiveType = TRPM_SOFTWARE_INT;
659	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH_INT, pRegFrame);
660	}
661
662	/*
663	* SYSCALL, SYSENTER, INTO and BOUND are also ring-switchers.
664	*/
665	case OP_SYSCALL:
666	case OP_SYSENTER:
667	#ifdef PATM_EMULATE_SYSENTER
668	rc = PATMSysCall(pVM, pRegFrame, pCpu);
669	if (rc == VINF_SUCCESS)
670	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
671	/* else no break; */
672	#endif
673	case OP_BOUND:
674	case OP_INTO:
675	pVM->trpm.s.uActiveVector = ~0;
676	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH, pRegFrame);
677
678	/*
679	* Handle virtualized TSC reads, just in case.
680	*/
681	case OP_RDTSC:
682	{
683	uint32_t cbIgnored;
684	rc = EMInterpretInstructionCPU(pVM, pCpu, pRegFrame, PC, &cbIgnored);
685	if (VBOX_SUCCESS(rc))
686	pRegFrame->eip += pCpu->opsize;
687	else if (rc == VERR_EM_INTERPRETER)
688	rc = VINF_EM_RAW_EXCEPTION_PRIVILEGED;
689	return trpmGCExitTrap(pVM, rc, pRegFrame);
690	}
691
692	/*
693	* STI and CLI are I/O privileged, i.e. if IOPL
694	*/
695	case OP_STI:
696	case OP_CLI:
697	{
698	uint32_t efl = CPUMRawGetEFlags(pVM, pRegFrame);
699	if (X86_EFL_GET_IOPL(efl) >= (unsigned)(pRegFrame->ss & X86_SEL_RPL))
700	{
701	LogFlow(("trpmGCTrap0dHandlerRing3: CLI/STI -> REM\n"));
702	return trpmGCExitTrap(pVM, VINF_EM_RESCHEDULE_REM, pRegFrame);
703	}
704	LogFlow(("trpmGCTrap0dHandlerRing3: CLI/STI -> #GP(0)\n"));
705	break;
706	}
707	}
708
709	/*
710	* A genuine guest fault.
711	*/
712	return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
713	}
714
715
716	/**
717	* Emulates RDTSC for the \#GP handler.
718	*
719	* @returns VINF_SUCCESS or VINF_EM_RAW_EMULATE_INSTR.
720	*
721	* @param pVM Pointer to the shared VM structure.
722	* @param pRegFrame Pointer to the registre frame for the trap.
723	* This will be updated on successful return.
724	*/
725	DECLINLINE(int) trpmGCTrap0dHandlerRdTsc(PVM pVM, PCPUMCTXCORE pRegFrame)
726	{
727	STAM_COUNTER_INC(&pVM->trpm.s.StatTrap0dRdTsc);
728
729	if (CPUMGetGuestCR4(pVM) & X86_CR4_TSD)
730	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame); /* will trap (optimize later). */
731
732	uint64_t uTicks = TMCpuTickGet(pVM);
733	pRegFrame->eax = uTicks;
734	pRegFrame->edx = uTicks >> 32;
735	pRegFrame->eip += 2;
736	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
737	}
738
739
740	/**
741	* \#GP (General Protection Fault) handler.
742	*
743	* @returns VBox status code.
744	* VINF_SUCCESS means we completely handled this trap,
745	* other codes are passed execution to host context.
746	*
747	* @param pVM The VM handle.
748	* @param pTrpm Pointer to TRPM data (within VM).
749	* @param pRegFrame Pointer to the register frame for the trap.
750	*/
751	static int trpmGCTrap0dHandler(PVM pVM, PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
752	{
753	LogFlow(("trpmGCTrap0dHandler: cs:eip=%RTsel:%VGv uErr=%RX32\n", pRegFrame->ss, pRegFrame->eip, pTrpm->uActiveErrorCode));
754
755	/*
756	* Convert and validate CS.
757	*/
758	STAM_PROFILE_START(&pVM->trpm.s.StatTrap0dDisasm, a);
759	RTGCPTR PC;
760	uint32_t cBits;
761	int rc = SELMValidateAndConvertCSAddrGCTrap(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs,
762	(RTGCPTR)pRegFrame->eip, &PC, &cBits);
763	if (RT_FAILURE(rc))
764	{
765	Log(("trpmGCTrap0dHandler: Failed to convert %RTsel:%RX32 (cpl=%d) - rc=%Rrc !!\n",
766	pRegFrame->cs, pRegFrame->eip, pRegFrame->ss & X86_SEL_RPL, rc));
767	STAM_PROFILE_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
768	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
769	}
770
771	/*
772	* Optimize RDTSC traps.
773	* Some guests (like Solaris) is using RDTSC all over the place and
774	* will end up trapping a lot because of that.
775	*/
776	if ( !pRegFrame->eflags.Bits.u1VM
777	&& ((uint8_t *)PC)[0] == 0x0f
778	&& ((uint8_t *)PC)[1] == 0x31)
779	{
780	STAM_PROFILE_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
781	return trpmGCTrap0dHandlerRdTsc(pVM, pRegFrame);
782	}
783
784	/*
785	* Disassemble the instruction.
786	*/
787	DISCPUSTATE Cpu;
788	uint32_t cbOp;
789	rc = DISCoreOneEx((RTGCUINTPTR)PC, cBits == 32 ? CPUMODE_32BIT : cBits == 16 ? CPUMODE_16BIT : CPUMODE_64BIT,
790	NULL, NULL, &Cpu, &cbOp);
791	if (RT_FAILURE(rc))
792	{
793	AssertMsgFailed(("DISCoreOneEx failed to PC=%VGv rc=%Vrc\n", PC, rc));
794	STAM_PROFILE_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
795	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
796	}
797	STAM_PROFILE_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
798
799	/*
800	* Deal with I/O port access.
801	*/
802	if ( pVM->trpm.s.uActiveErrorCode == 0
803	&& (Cpu.pCurInstr->optype & OPTYPE_PORTIO))
804	{
805	rc = EMInterpretPortIO(pVM, pRegFrame, &Cpu, cbOp);
806	return trpmGCExitTrap(pVM, rc, pRegFrame);
807	}
808
809	/*
810	* Deal with Ring-0 (privileged instructions)
811	*/
812	if ( (pRegFrame->ss & X86_SEL_RPL) <= 1
813	&& !pRegFrame->eflags.Bits.u1VM)
814	return trpmGCTrap0dHandlerRing0(pVM, pRegFrame, &Cpu, PC);
815
816	/*
817	* Deal with Ring-3 GPs.
818	*/
819	if (!pRegFrame->eflags.Bits.u1VM)
820	return trpmGCTrap0dHandlerRing3(pVM, pRegFrame, &Cpu, PC);
821
822	/*
823	* Deal with v86 code.
824	*
825	* We always set IOPL to zero which makes e.g. pushf fault in V86
826	* mode. The guest might use IOPL=3 and therefore not expect a #GP.
827	* Simply fall back to the recompiler to emulate this instruction if
828	* that's the case. To get the correct we must use CPUMRawGetEFlags.
829	*/
830	X86EFLAGS eflags;
831	eflags.u32 = CPUMRawGetEFlags(pVM, pRegFrame); /* Get the correct value. */
832	if (eflags.Bits.u2IOPL != 3)
833	{
834	Assert(eflags.Bits.u2IOPL == 0);
835
836	int rc = TRPMForwardTrap(pVM, pRegFrame, 0xD, 0, TRPM_TRAP_HAS_ERRORCODE, TRPM_TRAP);
837	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
838	return trpmGCExitTrap(pVM, rc, pRegFrame);
839	}
840	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
841	}
842
843
844	/**
845	* \#GP (General Protection Fault) handler.
846	*
847	* @returns VBox status code.
848	* VINF_SUCCESS means we completely handled this trap,
849	* other codes are passed execution to host context.
850	*
851	* @param pTrpm Pointer to TRPM data (within VM).
852	* @param pRegFrame Pointer to the register frame for the trap.
853	* @internal
854	*/
855	DECLASM(int) TRPMGCTrap0dHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
856	{
857	LogFlow(("TRPMGCTrap0dHandler: eip=%RGv\n", pRegFrame->eip));
858	PVM pVM = TRPM2VM(pTrpm);
859
860	int rc = trpmGCTrap0dHandler(pVM, pTrpm, pRegFrame);
861	switch (rc)
862	{
863	case VINF_EM_RAW_GUEST_TRAP:
864	case VINF_EM_RAW_EXCEPTION_PRIVILEGED:
865	if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
866	rc = VINF_PATM_PATCH_TRAP_GP;
867	break;
868
869	case VINF_EM_RAW_INTERRUPT_PENDING:
870	Assert(TRPMHasTrap(pVM));
871	/* no break; */
872	case VINF_PGM_SYNC_CR3: /** @todo Check this with Sander. */
873	case VINF_EM_RAW_EMULATE_INSTR:
874	case VINF_IOM_HC_IOPORT_READ:
875	case VINF_IOM_HC_IOPORT_WRITE:
876	case VINF_IOM_HC_MMIO_WRITE:
877	case VINF_IOM_HC_MMIO_READ:
878	case VINF_IOM_HC_MMIO_READ_WRITE:
879	case VINF_PATM_PATCH_INT3:
880	case VINF_EM_RAW_TO_R3:
881	case VINF_EM_RAW_TIMER_PENDING:
882	case VINF_EM_PENDING_REQUEST:
883	case VINF_EM_HALT:
884	case VINF_SUCCESS:
885	break;
886
887	default:
888	AssertMsg(PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip) == false, ("return code %d\n", rc));
889	break;
890	}
891	return rc;
892	}
893
894	/**
895	* \#PF (Page Fault) handler.
896	*
897	* Calls PGM which does the actual handling.
898	*
899	*
900	* @returns VBox status code.
901	* VINF_SUCCESS means we completely handled this trap,
902	* other codes are passed execution to host context.
903	*
904	* @param pTrpm Pointer to TRPM data (within VM).
905	* @param pRegFrame Pointer to the register frame for the trap.
906	* @internal
907	*/
908	DECLASM(int) TRPMGCTrap0eHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
909	{
910	LogBird(("TRPMGCTrap0eHandler: eip=%RGv\n", pRegFrame->eip));
911	PVM pVM = TRPM2VM(pTrpm);
912
913	/*
914	* This is all PGM stuff.
915	*/
916	int rc = PGMTrap0eHandler(pVM, pTrpm->uActiveErrorCode, pRegFrame, (RTGCPTR)pTrpm->uActiveCR2);
917
918	switch (rc)
919	{
920	case VINF_EM_RAW_EMULATE_INSTR:
921	case VINF_EM_RAW_EMULATE_INSTR_PD_FAULT:
922	case VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT:
923	case VINF_EM_RAW_EMULATE_INSTR_TSS_FAULT:
924	case VINF_EM_RAW_EMULATE_INSTR_LDT_FAULT:
925	case VINF_EM_RAW_EMULATE_INSTR_IDT_FAULT:
926	if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
927	rc = VINF_PATCH_EMULATE_INSTR;
928	break;
929
930	case VINF_EM_RAW_GUEST_TRAP:
931	if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
932	return VINF_PATM_PATCH_TRAP_PF;
933
934	rc = TRPMForwardTrap(pVM, pRegFrame, 0xE, 0, TRPM_TRAP_HAS_ERRORCODE, TRPM_TRAP);
935	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
936	break;
937
938	case VINF_EM_RAW_INTERRUPT_PENDING:
939	Assert(TRPMHasTrap(pVM));
940	/* no break; */
941	case VINF_IOM_HC_MMIO_READ:
942	case VINF_IOM_HC_MMIO_WRITE:
943	case VINF_IOM_HC_MMIO_READ_WRITE:
944	case VINF_PATM_HC_MMIO_PATCH_READ:
945	case VINF_PATM_HC_MMIO_PATCH_WRITE:
946	case VINF_SUCCESS:
947	case VINF_EM_RAW_TO_R3:
948	case VINF_EM_PENDING_REQUEST:
949	case VINF_EM_RAW_TIMER_PENDING:
950	case VINF_CSAM_PENDING_ACTION:
951	case VINF_PGM_SYNC_CR3: /** @todo Check this with Sander. */
952	break;
953
954	default:
955	AssertMsg(PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip) == false, ("Patch address for return code %d. eip=%08x\n", rc, pRegFrame->eip));
956	break;
957	}
958	return trpmGCExitTrap(pVM, rc, pRegFrame);
959	}
960
961
962	/**
963	* Scans for the EIP in the specified array of trap handlers.
964	*
965	* If we don't fine the EIP, we'll panic.
966	*
967	* @returns VBox status code.
968	*
969	* @param pVM The VM handle.
970	* @param pRegFrame Pointer to the register frame for the trap.
971	* @param paHandlers The array of trap handler records.
972	* @param pEndRecord The end record (exclusive).
973	*/
974	static int trpmGCHyperGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, PCTRPMGCHYPER paHandlers, PCTRPMGCHYPER pEndRecord)
975	{
976	uintptr_t uEip = (uintptr_t)pRegFrame->eip;
977	Assert(paHandlers <= pEndRecord);
978
979	Log(("trpmGCHyperGeneric: uEip=%x %p-%p\n", uEip, paHandlers, pEndRecord));
980
981	#if 0 /// @todo later
982	/*
983	* Start by doing a kind of binary search.
984	*/
985	unsigned iStart = 0;
986	unsigned iEnd = pEndRecord - paHandlers;
987	unsigned i = iEnd / 2;
988	#endif
989
990	/*
991	* Do a linear search now (in case the array wasn't properly sorted).
992	*/
993	for (PCTRPMGCHYPER pCur = paHandlers; pCur < pEndRecord; pCur++)
994	{
995	if ( pCur->uStartEIP <= uEip
996	&& (pCur->uEndEIP ? pCur->uEndEIP > uEip : pCur->uStartEIP == uEip))
997	return pCur->pfnHandler(pVM, pRegFrame, pCur->uUser);
998	}
999
1000	return VERR_TRPM_DONT_PANIC;
1001	}
1002
1003
1004	/**
1005	* Hypervisor \#NP ((segment) Not Present) handler.
1006	*
1007	* Scans for the EIP in the registered trap handlers.
1008	*
1009	* @returns VBox status code.
1010	* VINF_SUCCESS means we completely handled this trap,
1011	* other codes are passed back to host context.
1012	*
1013	* @param pTrpm Pointer to TRPM data (within VM).
1014	* @param pRegFrame Pointer to the register frame for the trap.
1015	* @internal
1016	*/
1017	DECLASM(int) TRPMGCHyperTrap0bHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
1018	{
1019	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0bHandlers, g_aTrap0bHandlersEnd);
1020	}
1021
1022
1023	/**
1024	* Hypervisor \#GP (General Protection Fault) handler.
1025	*
1026	* Scans for the EIP in the registered trap handlers.
1027	*
1028	* @returns VBox status code.
1029	* VINF_SUCCESS means we completely handled this trap,
1030	* other codes are passed back to host context.
1031	*
1032	* @param pTrpm Pointer to TRPM data (within VM).
1033	* @param pRegFrame Pointer to the register frame for the trap.
1034	* @internal
1035	*/
1036	DECLASM(int) TRPMGCHyperTrap0dHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
1037	{
1038	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
1039	}
1040
1041
1042	/**
1043	* Hypervisor \#PF (Page Fault) handler.
1044	*
1045	* Scans for the EIP in the registered trap handlers.
1046	*
1047	* @returns VBox status code.
1048	* VINF_SUCCESS means we completely handled this trap,
1049	* other codes are passed back to host context.
1050	*
1051	* @param pTrpm Pointer to TRPM data (within VM).
1052	* @param pRegFrame Pointer to the register frame for the trap.
1053	* @internal
1054	*/
1055	DECLASM(int) TRPMGCHyperTrap0eHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
1056	{
1057	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
1058	}
1059
1060
1061	/**
1062	* Deal with hypervisor traps occuring when resuming execution on a trap.
1063	*
1064	* @returns VBox status code.
1065	* @param pVM The VM handle.
1066	* @param pRegFrame Register frame.
1067	* @param uUser User arg.
1068	*/
1069	DECLCALLBACK(int) trpmGCTrapInGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser)
1070	{
1071	Log(("********************************************************\n"));
1072	Log(("trpmGCTrapInGeneric: eip=%RX32 uUser=%#x\n", pRegFrame->eip, uUser));
1073	Log(("********************************************************\n"));
1074
1075	if (uUser & TRPM_TRAP_IN_HYPER)
1076	{
1077	/*
1078	* Check that there is still some stack left, if not we'll flag
1079	* a guru meditation (the alternative is a triple fault).
1080	*/
1081	RTGCUINTPTR cbStackUsed = (RTGCUINTPTR)VMMGetStackGC(pVM) - pRegFrame->esp;
1082	if (cbStackUsed > VMM_STACK_SIZE - _1K)
1083	{
1084	LogRel(("trpmGCTrapInGeneric: ran out of stack: esp=#x cbStackUsed=%#x\n", pRegFrame->esp, cbStackUsed));
1085	return VERR_TRPM_DONT_PANIC;
1086	}
1087
1088	/*
1089	* Just zero the register containing the selector in question.
1090	* We'll deal with the actual stale or troublesome selector value in
1091	* the outermost trap frame.
1092	*/
1093	switch (uUser & TRPM_TRAP_IN_OP_MASK)
1094	{
1095	case TRPM_TRAP_IN_MOV_GS:
1096	pRegFrame->eax = 0;
1097	pRegFrame->gs = 0; /* prevent recursive trouble. */
1098	break;
1099	case TRPM_TRAP_IN_MOV_FS:
1100	pRegFrame->eax = 0;
1101	pRegFrame->fs = 0; /* prevent recursive trouble. */
1102	return VINF_SUCCESS;
1103
1104	default:
1105	AssertMsgFailed(("Invalid uUser=%#x\n", uUser));
1106	return VERR_INTERNAL_ERROR;
1107	}
1108	}
1109	else
1110	{
1111	/*
1112	* Reconstruct the guest context and switch to the recompiler.
1113	* We ASSUME we're only at
1114	*/
1115	CPUMCTXCORE CtxCore = *pRegFrame;
1116	uint32_t pEsp = (uint32_t )pRegFrame->esp;
1117	int rc;
1118
1119	switch (uUser)
1120	{
1121	/*
1122	* This will only occur when resuming guest code in a trap handler!
1123	*/
1124	/* @note ASSUMES esp points to the temporary guest CPUMCTXCORE!!! */
1125	case TRPM_TRAP_IN_MOV_GS:
1126	case TRPM_TRAP_IN_MOV_FS:
1127	case TRPM_TRAP_IN_MOV_ES:
1128	case TRPM_TRAP_IN_MOV_DS:
1129	{
1130	PCPUMCTXCORE pTempGuestCtx = (PCPUMCTXCORE)pEsp;
1131
1132	/* Just copy the whole thing; several selector registers, eip (etc) and eax are not yet in pRegFrame. */
1133	CtxCore = *pTempGuestCtx;
1134	rc = VINF_EM_RAW_STALE_SELECTOR;
1135	break;
1136	}
1137
1138	/*
1139	* This will only occur when resuming guest code!
1140	*/
1141	case TRPM_TRAP_IN_IRET:
1142	CtxCore.eip = *pEsp++;
1143	CtxCore.cs = (RTSEL)*pEsp++;
1144	CtxCore.eflags.u32 = *pEsp++;
1145	CtxCore.esp = *pEsp++;
1146	CtxCore.ss = (RTSEL)*pEsp++;
1147	rc = VINF_EM_RAW_IRET_TRAP;
1148	break;
1149
1150	/*
1151	* This will only occur when resuming V86 guest code!
1152	*/
1153	case TRPM_TRAP_IN_IRET \| TRPM_TRAP_IN_V86:
1154	CtxCore.eip = *pEsp++;
1155	CtxCore.cs = (RTSEL)*pEsp++;
1156	CtxCore.eflags.u32 = *pEsp++;
1157	CtxCore.esp = *pEsp++;
1158	CtxCore.ss = (RTSEL)*pEsp++;
1159	CtxCore.es = (RTSEL)*pEsp++;
1160	CtxCore.ds = (RTSEL)*pEsp++;
1161	CtxCore.fs = (RTSEL)*pEsp++;
1162	CtxCore.gs = (RTSEL)*pEsp++;
1163	rc = VINF_EM_RAW_IRET_TRAP;
1164	break;
1165
1166	default:
1167	AssertMsgFailed(("Invalid uUser=%#x\n", uUser));
1168	return VERR_INTERNAL_ERROR;
1169	}
1170
1171
1172	CPUMSetGuestCtxCore(pVM, &CtxCore);
1173	TRPMGCHyperReturnToHost(pVM, rc);
1174	}
1175
1176	AssertMsgFailed(("Impossible!\n"));
1177	return VERR_INTERNAL_ERROR;
1178	}
1179

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source: vbox/trunk/src/VBox/VMM/VMMGC/TRPMGCHandlers.cpp@ 8861

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