TRPMGCHandlers.cpp@ 1602

Last change on this file since 1602 was 1602, checked in by vboxsync, 18 years ago
Never generate a raw trap for trap 6 faults; instruction emulation is required
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1	/* $Id: TRPMGCHandlers.cpp 1602 2007-03-21 17:08:28Z vboxsync $ */
2	/** @file
3	* TRPM - Guest Context Trap Handlers, CPP part
4	*/
5
6	/*
7	* Copyright (C) 2006 InnoTek Systemberatung GmbH
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License as published by the Free Software Foundation,
13	* in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14	* distribution. VirtualBox OSE is distributed in the hope that it will
15	* be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* If you received this file as part of a commercial VirtualBox
18	* distribution, then only the terms of your commercial VirtualBox
19	* license agreement apply instead of the previous paragraph.
20	*/
21
22
23	/*******************************************************************************
24	* Header Files *
25	*******************************************************************************/
26	#define LOG_GROUP LOG_GROUP_TRPM
27	#include <VBox/selm.h>
28	#include <VBox/iom.h>
29	#include <VBox/pgm.h>
30	#include <VBox/pdm.h>
31	#include <VBox/dbgf.h>
32	#include <VBox/em.h>
33	#include <VBox/csam.h>
34	#include <VBox/patm.h>
35	#include <VBox/mm.h>
36	#include <VBox/cpum.h>
37	#include "TRPMInternal.h"
38	#include <VBox/vm.h>
39	#include <VBox/param.h>
40
41	#include <VBox/err.h>
42	#include <VBox/dis.h>
43	#include <VBox/disopcode.h>
44	#include <VBox/x86.h>
45	#include <VBox/log.h>
46	#include <VBox/tm.h>
47	#include <iprt/asm.h>
48	#include <iprt/assert.h>
49
50	/* still here. MODR/M byte parsing */
51	#define X86_OPCODE_MODRM_MOD_MASK 0xc0
52	#define X86_OPCODE_MODRM_REG_MASK 0x38
53	#define X86_OPCODE_MODRM_RM_MASK 0x07
54
55	/** Pointer to a readonly hypervisor trap record. */
56	typedef const struct TRPMGCHYPER *PCTRPMGCHYPER;
57
58	/**
59	* A hypervisor trap record.
60	* This contains information about a handler for a instruction range.
61	*
62	* @remark This must match what TRPM_HANDLER outputs.
63	*/
64	typedef struct TRPMGCHYPER
65	{
66	/** The start address. */
67	uintptr_t uStartEIP;
68	/** The end address. (exclusive)
69	* If NULL the it's only for the instruction at pvStartEIP. */
70	uintptr_t uEndEIP;
71	/**
72	* The handler.
73	*
74	* @returns VBox status code
75	* VINF_SUCCESS means we've handled the trap.
76	* Any other error code means returning to the host context.
77	* @param pVM The VM handle.
78	* @param pRegFrame The register frame.
79	* @param uUser The user argument.
80	*/
81	DECLCALLBACKMEMBER(int, pfnHandler)(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser);
82	/** Whatever the handler desires to put here. */
83	uintptr_t uUser;
84	} TRPMGCHYPER;
85
86
87	/*******************************************************************************
88	* Global Variables *
89	*******************************************************************************/
90	__BEGIN_DECLS
91	/** Defined in VMMGC0.asm or VMMGC99.asm.
92	* @{ */
93	extern const TRPMGCHYPER g_aTrap0bHandlers[1];
94	extern const TRPMGCHYPER g_aTrap0bHandlersEnd[1];
95	extern const TRPMGCHYPER g_aTrap0dHandlers[1];
96	extern const TRPMGCHYPER g_aTrap0dHandlersEnd[1];
97	extern const TRPMGCHYPER g_aTrap0eHandlers[1];
98	extern const TRPMGCHYPER g_aTrap0eHandlersEnd[1];
99	/** @} */
100	__END_DECLS
101
102
103	/*******************************************************************************
104	* Internal Functions *
105	*******************************************************************************/
106	__BEGIN_DECLS /* addressed from asm (not called so no DECLASM). */
107	DECLCALLBACK(int) trpmGCTrapInGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser);
108	__END_DECLS
109
110
111
112	/**
113	* Exits the trap, called when exiting a trap handler.
114	*
115	* Will reset the trap if it's not a guest trap or the trap
116	* is already handled. Will process resume guest FFs.
117	*
118	* @returns rc.
119	* @param pVM VM handle.
120	* @param rc The VBox status code to return.
121	* @param pRegFrame Pointer to the register frame for the trap.
122	*/
123	static int trpmGCExitTrap(PVM pVM, int rc, PCPUMCTXCORE pRegFrame)
124	{
125	uint32_t uOldActiveVector = pVM->trpm.s.uActiveVector;
126
127	/* Reset trap? */
128	if ( rc != VINF_EM_RAW_GUEST_TRAP
129	&& rc != VINF_EM_RAW_RING_SWITCH_INT)
130	pVM->trpm.s.uActiveVector = ~0;
131
132	#ifdef VBOX_HIGH_RES_TIMERS_HACK
133	/*
134	* Occationally we should poll timers.
135	* We must NOT do this too frequently as it adds a significant overhead
136	* and it'll kill us if the trap load is high. (See #1354.)
137	* (The heuristic is not very intelligent, we should really check trap
138	* frequency etc. here, but alas, we lack any such information atm.)
139	*/
140	static unsigned s_iTimerPoll = 0;
141	if (rc == VINF_SUCCESS)
142	{
143	if (!(++s_iTimerPoll & 0xf))
144	{
145	uint64_t cTicks = TMTimerPoll(pVM); NOREF(cTicks);
146	Log2(("TMTimerPoll at %VGv returned %RX64 (VM_FF_TIMER=%d)\n", pRegFrame->eip, cTicks, VM_FF_ISPENDING(pVM, VM_FF_TIMER)));
147	}
148	}
149	else
150	s_iTimerPoll = 0;
151	#endif
152
153	/* Clear pending inhibit interrupt state if required. (necessary for dispatching interrupts later on) */
154	if (VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS))
155	{
156	Log2(("VM_FF_INHIBIT_INTERRUPTS at %VGv successor %VGv\n", pRegFrame->eip, EMGetInhibitInterruptsPC(pVM)));
157	if (pRegFrame->eip != EMGetInhibitInterruptsPC(pVM))
158	{
159	/** @note we intentionally don't clear VM_FF_INHIBIT_INTERRUPTS here if the eip is the same as the inhibited instr address.
160	* Before we are able to execute this instruction in raw mode (iret to guest code) an external interrupt might
161	* force a world switch again. Possibly allowing a guest interrupt to be dispatched in the process. This could
162	* break the guest. Sounds very unlikely, but such timing sensitive problem are not as rare as you might think.
163	*/
164	VM_FF_CLEAR(pVM, VM_FF_INHIBIT_INTERRUPTS);
165	}
166	}
167
168	/*
169	* Pending resume-guest-FF?
170	* Or pending (A)PIC interrupt? Windows XP will crash if we delay APIC interrupts.
171	*/
172	if ( rc == VINF_SUCCESS
173	&& VM_FF_ISPENDING(pVM, VM_FF_TO_R3 \| VM_FF_TIMER \| VM_FF_INTERRUPT_APIC \| VM_FF_INTERRUPT_PIC \| VM_FF_PGM_SYNC_CR3 \| VM_FF_PGM_SYNC_CR3_NON_GLOBAL \| VM_FF_REQUEST))
174	{
175	/* Pending Ring-3 action. */
176	if (VM_FF_ISPENDING(pVM, VM_FF_TO_R3))
177	{
178	VM_FF_CLEAR(pVM, VM_FF_TO_R3);
179	rc = VINF_EM_RAW_TO_R3;
180	}
181	/* Pending timer action. */
182	else if (VM_FF_ISPENDING(pVM, VM_FF_TIMER))
183	rc = VINF_EM_RAW_TIMER_PENDING;
184	/* Pending interrupt: dispatch it. */
185	else if ( VM_FF_ISPENDING(pVM, VM_FF_INTERRUPT_APIC \| VM_FF_INTERRUPT_PIC)
186	&& !VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS)
187	&& PATMAreInterruptsEnabledByCtxCore(pVM, pRegFrame)
188	)
189	{
190	uint8_t u8Interrupt;
191	rc = PDMGetInterrupt(pVM, &u8Interrupt);
192	Log(("trpmGCExitTrap: u8Interrupt=%d (%#x) rc=%Vrc\n", u8Interrupt, u8Interrupt, rc));
193	AssertFatalMsgRC(rc, ("PDMGetInterrupt failed with %Vrc\n", rc));
194	rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)u8Interrupt, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_HARDWARE_INT);
195	/* can't return if successful */
196	Assert(rc != VINF_SUCCESS);
197
198	/* Stop the profile counter that was started in TRPMGCHandlersA.asm */
199	Assert(uOldActiveVector <= 16);
200	STAM_PROFILE_ADV_STOP(&pVM->trpm.s.aStatGCTraps[uOldActiveVector], a);
201
202	/* Assert the trap and go to the recompiler to dispatch it. */
203	TRPMAssertTrap(pVM, u8Interrupt, false);
204
205	STAM_PROFILE_ADV_START(&pVM->trpm.s.aStatGCTraps[uOldActiveVector], a);
206	rc = VINF_EM_RAW_INTERRUPT_PENDING;
207	}
208	/*
209	* Try sync CR3?
210	* This ASSUMES that the MOV CRx, x emulation doesn't return with VINF_PGM_SYNC_CR3. (a bit hackish)
211	*/
212	else if (VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 \| VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
213	#if 1
214	rc = PGMSyncCR3(pVM, CPUMGetGuestCR0(pVM), CPUMGetGuestCR3(pVM), CPUMGetGuestCR4(pVM), VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3));
215	#else
216	rc = VINF_PGM_SYNC_CR3;
217	#endif
218	/* Pending request packets might contain actions that need immediate attention, such as pending hardware interrupts. */
219	else if (VM_FF_ISPENDING(pVM, VM_FF_REQUEST))
220	rc = VINF_EM_PENDING_REQUEST;
221	}
222
223	AssertMsg( rc != VINF_SUCCESS
224	\|\| ( pRegFrame->eflags.Bits.u1IF
225	&& ( pRegFrame->eflags.Bits.u2IOPL < (unsigned)(pRegFrame->ss & X86_SEL_RPL) \|\| pRegFrame->eflags.Bits.u1VM))
226	, ("rc = %VGv\neflags=%RX32 ss=%RTsel IOPL=%d\n", rc, pRegFrame->eflags.u32, pRegFrame->ss, pRegFrame->eflags.Bits.u2IOPL));
227	return rc;
228	}
229
230
231	/**
232	* \#DB (Debug event) handler.
233	*
234	* @returns VBox status code.
235	* VINF_SUCCESS means we completely handled this trap,
236	* other codes are passed execution to host context.
237	*
238	* @param pTrpm Pointer to TRPM data (within VM).
239	* @param pRegFrame Pointer to the register frame for the trap.
240	* @internal
241	*/
242	DECLASM(int) TRPMGCTrap01Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
243	{
244	RTGCUINTREG uDr6 = ASMGetAndClearDR6();
245	PVM pVM = TRPM2VM(pTrpm);
246	LogFlow(("TRPMGCTrap01Handler: cs:eip=%04x:%08x uDr6=%RTreg\n", pRegFrame->cs, pRegFrame->eip, uDr6));
247
248	/*
249	* We currently don't make sure of the X86_DR7_GD bit, but
250	* there might come a time when we do.
251	*/
252	if ((uDr6 & X86_DR6_BD) == X86_DR6_BD)
253	{
254	AssertReleaseMsgFailed(("X86_DR6_BD isn't used, but it's set! dr7=%RTreg(%RTreg) dr6=%RTreg\n",
255	ASMGetDR7(), CPUMGetHyperDR7(pVM), uDr6));
256	return VERR_NOT_IMPLEMENTED;
257	}
258
259	AssertReleaseMsg(!(uDr6 & X86_DR6_BT), ("X86_DR6_BT is impossible!\n"));
260
261	/*
262	* Now leave the rest to the DBGF.
263	*/
264	int rc = DBGFGCTrap01Handler(pVM, pRegFrame, uDr6);
265	if (rc == VINF_EM_RAW_GUEST_TRAP)
266	CPUMSetGuestDR6(pVM, uDr6);
267
268	return trpmGCExitTrap(pVM, rc, pRegFrame);
269	}
270
271
272
273	/**
274	* NMI handler, for when we are using NMIs to debug things.
275	*
276	* @returns VBox status code.
277	* VINF_SUCCESS means we completely handled this trap,
278	* other codes are passed execution to host context.
279	*
280	* @param pTrpm Pointer to TRPM data (within VM).
281	* @param pRegFrame Pointer to the register frame for the trap.
282	* @internal
283	* @remark This is not hooked up unless you're building with VBOX_WITH_NMI defined.
284	*/
285	DECLASM(int) TRPMGCTrap02Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
286	{
287	LogFlow(("TRPMGCTrap02Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
288	RTLogComPrintf("TRPMGCTrap02Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip);
289	return VERR_TRPM_DONT_PANIC;
290	}
291
292
293	/**
294	* \#BP (Breakpoint) handler.
295	*
296	* @returns VBox status code.
297	* VINF_SUCCESS means we completely handled this trap,
298	* other codes are passed execution to host context.
299	*
300	* @param pTrpm Pointer to TRPM data (within VM).
301	* @param pRegFrame Pointer to the register frame for the trap.
302	* @internal
303	*/
304	DECLASM(int) TRPMGCTrap03Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
305	{
306	LogFlow(("TRPMGCTrap03Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
307	PVM pVM = TRPM2VM(pTrpm);
308	int rc;
309
310	/*
311	* Both PATM are using INT3s, let them have a go first.
312	*/
313	if ( (pRegFrame->ss & X86_SEL_RPL) == 1
314	&& !pRegFrame->eflags.Bits.u1VM)
315	{
316	rc = PATMHandleInt3PatchTrap(pVM, pRegFrame);
317	if (rc == VINF_SUCCESS \|\| rc == VINF_EM_RAW_EMULATE_INSTR \|\| rc == VINF_PATM_PATCH_INT3 \|\| rc == VINF_PATM_DUPLICATE_FUNCTION)
318	return trpmGCExitTrap(pVM, rc, pRegFrame);
319	}
320	rc = DBGFGCTrap03Handler(pVM, pRegFrame);
321	/* anything we should do with this? Schedule it in GC? */
322	return trpmGCExitTrap(pVM, rc, pRegFrame);
323	}
324
325
326	/**
327	* Trap handler for illegal opcode fault (\#UD).
328	*
329	* @returns VBox status code.
330	* VINF_SUCCESS means we completely handled this trap,
331	* other codes are passed execution to host context.
332	*
333	* @param pTrpm Pointer to TRPM data (within VM).
334	* @param pRegFrame Pointer to the register frame for the trap.
335	* @internal
336	*/
337	DECLASM(int) TRPMGCTrap06Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
338	{
339	PVM pVM = TRPM2VM(pTrpm);
340
341	LogFlow(("TRPMGCTrap06Handler %VGv eflags=%x\n", pRegFrame->eip, pRegFrame->eflags.u32));
342
343	if ( (pRegFrame->ss & X86_SEL_RPL) == 1
344	&& !pRegFrame->eflags.Bits.u1VM
345	&& PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
346	{
347	/*
348	* Decode the instruction.
349	*/
350	RTGCPTR PC;
351	int rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &PC);
352	if (VBOX_FAILURE(rc))
353	{
354	Log(("TRPMGCTrap06Handler: Failed to convert %RTsel:%RX32 (cpl=%d) - rc=%Vrc !!\n", pRegFrame->cs, pRegFrame->eip, pRegFrame->ss & X86_SEL_RPL, rc));
355	return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
356	}
357
358	DISCPUSTATE Cpu;
359	uint32_t cbOp;
360	rc = EMInterpretDisasOneEx(pVM, (RTGCUINTPTR)PC, pRegFrame, &Cpu, &cbOp);
361	if (VBOX_FAILURE(rc))
362	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
363
364	/** @note monitor causes an #UD exception instead of #GP when not executed in ring 0. */
365	if (Cpu.pCurInstr->opcode == OP_ILLUD2)
366	{
367	int rc = PATMGCHandleIllegalInstrTrap(pVM, pRegFrame);
368	if (rc == VINF_SUCCESS \|\| rc == VINF_EM_RAW_EMULATE_INSTR \|\| rc == VINF_PATM_DUPLICATE_FUNCTION \|\| rc == VINF_PATM_PENDING_IRQ_AFTER_IRET \|\| rc == VINF_EM_RESCHEDULE)
369	return trpmGCExitTrap(pVM, rc, pRegFrame);
370	}
371	}
372	else if (pRegFrame->eflags.Bits.u1VM)
373	{
374	int rc = TRPMForwardTrap(pVM, pRegFrame, 0x6, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_TRAP);
375	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
376	}
377	/* Never generate a raw trap here; it might be a monitor instruction, that requires emulation. */
378	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
379	}
380
381
382	/**
383	* Trap handler for device not present fault (\#NM).
384	*
385	* Device not available, FP or (F)WAIT instruction.
386	*
387	* @returns VBox status code.
388	* VINF_SUCCESS means we completely handled this trap,
389	* other codes are passed execution to host context.
390	*
391	* @param pTrpm Pointer to TRPM data (within VM).
392	* @param pRegFrame Pointer to the register frame for the trap.
393	* @internal
394	*/
395	DECLASM(int) TRPMGCTrap07Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
396	{
397	PVM pVM = TRPM2VM(pTrpm);
398
399	LogFlow(("TRPMTrap07HandlerGC: eip=%VGv\n", pRegFrame->eip));
400	return CPUMHandleLazyFPU(pVM);
401	}
402
403
404	/**
405	* \#NP ((segment) Not Present) handler.
406	*
407	* @returns VBox status code.
408	* VINF_SUCCESS means we completely handled this trap,
409	* other codes are passed execution to host context.
410	*
411	* @param pTrpm Pointer to TRPM data (within VM).
412	* @param pRegFrame Pointer to the register frame for the trap.
413	* @internal
414	*/
415	DECLASM(int) TRPMGCTrap0bHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
416	{
417	LogFlow(("TRPMGCTrap0bHandler: eip=%VGv\n", pRegFrame->eip));
418	PVM pVM = TRPM2VM(pTrpm);
419
420	/*
421	* Try to detect instruction by opcode which caused trap.
422	* XXX note: this code may cause \#PF (trap e) or \#GP (trap d) while
423	* accessing user code. need to handle it somehow in future!
424	*/
425	uint8_t *pu8Code;
426	if (SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, (PRTGCPTR)&pu8Code) == VINF_SUCCESS)
427	{
428	/*
429	* First skip possible instruction prefixes, such as:
430	* OS, AS
431	* CS:, DS:, ES:, SS:, FS:, GS:
432	* REPE, REPNE
433	*
434	* note: Currently we supports only up to 4 prefixes per opcode, more
435	* prefixes (normally not used anyway) will cause trap d in guest.
436	* note: Instruction length in IA-32 may be up to 15 bytes, we dont
437	* check this issue, its too hard.
438	*/
439	for (unsigned i = 0; i < 4; i++)
440	{
441	if ( pu8Code[0] != 0xf2 /* REPNE/REPNZ */
442	&& pu8Code[0] != 0xf3 /* REP/REPE/REPZ */
443	&& pu8Code[0] != 0x2e /* CS: */
444	&& pu8Code[0] != 0x36 /* SS: */
445	&& pu8Code[0] != 0x3e /* DS: */
446	&& pu8Code[0] != 0x26 /* ES: */
447	&& pu8Code[0] != 0x64 /* FS: */
448	&& pu8Code[0] != 0x65 /* GS: */
449	&& pu8Code[0] != 0x66 /* OS */
450	&& pu8Code[0] != 0x67 /* AS */
451	)
452	break;
453	pu8Code++;
454	}
455
456	/*
457	* Detect right switch using a callgate.
458	*
459	* We recognize the following causes for the trap 0b:
460	* CALL FAR, CALL FAR []
461	* JMP FAR, JMP FAR []
462	* IRET (may cause a task switch)
463	*
464	* Note: we can't detect whether the trap was caused by a call to a
465	* callgate descriptor or it is a real trap 0b due to a bad selector.
466	* In both situations we'll pass execution to our recompiler so we don't
467	* have to worry.
468	* If we wanted to do better detection, we have set GDT entries to callgate
469	* descriptors pointing to our own handlers.
470	*/
471	/** @todo not sure about IRET, may generate Trap 0d (\#GP), NEED TO CHECK! */
472	if ( pu8Code[0] == 0x9a /* CALL FAR */
473	\|\| ( pu8Code[0] == 0xff /* CALL FAR [] */
474	&& (pu8Code[1] & X86_OPCODE_MODRM_REG_MASK) == 0x18)
475	\|\| pu8Code[0] == 0xea /* JMP FAR */
476	\|\| ( pu8Code[0] == 0xff /* JMP FAR [] */
477	&& (pu8Code[1] & X86_OPCODE_MODRM_REG_MASK) == 0x28)
478	\|\| pu8Code[0] == 0xcf /* IRET */
479	)
480	{
481	/*
482	* Got potential call to callgate.
483	* We simply return execution to the recompiler to do emulation
484	* starting from the instruction which caused the trap.
485	*/
486	pTrpm->uActiveVector = ~0;
487	return VINF_EM_RAW_RING_SWITCH;
488	}
489	}
490
491	/*
492	* Pass trap 0b as is to the recompiler in all other cases.
493	*/
494	return VINF_EM_RAW_GUEST_TRAP;
495	}
496
497
498	/**
499	* \#GP (General Protection Fault) handler for Ring-0 privileged instructions.
500	*
501	* @returns VBox status code.
502	* VINF_SUCCESS means we completely handled this trap,
503	* other codes are passed execution to host context.
504	*
505	* @param pVM The VM handle.
506	* @param pRegFrame Pointer to the register frame for the trap.
507	* @param pCpu The opcode info.
508	* @param PC Program counter.
509	*/
510	static int trpmGCTrap0dHandlerRing0(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, RTGCPTR PC)
511	{
512	int rc;
513
514	/*
515	* Try handle it here, if not return to HC and emulate/interpret it there.
516	*/
517	switch (pCpu->pCurInstr->opcode)
518	{
519	case OP_INT3:
520	/*
521	* Little hack to make the code below not fail
522	*/
523	pCpu->param1.flags = USE_IMMEDIATE8;
524	pCpu->param1.parval = 3;
525	/* fallthru */
526	case OP_INT:
527	{
528	Assert(pCpu->param1.flags & USE_IMMEDIATE8);
529	Assert(!(PATMIsPatchGCAddr(pVM, PC)));
530	if (pCpu->param1.parval == 3)
531	{
532	/* Obsolete!! */
533	/* Int 3 replacement patch? */
534	if (PATMHandleInt3PatchTrap(pVM, pRegFrame) == VINF_SUCCESS)
535	{
536	AssertFailed();
537	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
538	}
539	}
540	rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT);
541	if (VBOX_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
542	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
543
544	pVM->trpm.s.uActiveVector = (pVM->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
545	pVM->trpm.s.fActiveSoftwareInterrupt = true;
546	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH_INT, pRegFrame);
547	}
548
549	#ifdef PATM_EMULATE_SYSENTER
550	case OP_SYSEXIT:
551	case OP_SYSRET:
552	rc = PATMSysCall(pVM, pRegFrame, pCpu);
553	return trpmGCExitTrap(pVM, rc, pRegFrame);
554	#endif
555
556	case OP_HLT:
557	/* If it's in patch code, defer to ring-3. */
558	if (PATMIsPatchGCAddr(pVM, PC))
559	break;
560
561	pRegFrame->eip += pCpu->opsize;
562	return trpmGCExitTrap(pVM, VINF_EM_HALT, pRegFrame);
563
564
565	/*
566	* These instructions are used by PATM and CASM for finding
567	* dangerous non-trapping instructions. Thus, since all
568	* scanning and patching is done in ring-3 we'll have to
569	* return to ring-3 on the first encounter of these instructions.
570	*/
571	case OP_MOV_CR:
572	case OP_MOV_DR:
573	/* We can safely emulate control/debug register move instructions in patched code. */
574	if ( !PATMIsPatchGCAddr(pVM, PC)
575	&& !CSAMIsKnownDangerousInstr(pVM, PC))
576	break;
577	case OP_INVLPG:
578	case OP_LLDT:
579	case OP_STI:
580	case OP_RDTSC:
581	{
582	uint32_t cbIgnored;
583	rc = EMInterpretInstructionCPU(pVM, pCpu, pRegFrame, PC, &cbIgnored);
584	if (VBOX_SUCCESS(rc))
585	pRegFrame->eip += pCpu->opsize;
586	else if (rc == VERR_EM_INTERPRETER)
587	rc = VINF_EM_RAW_EXCEPTION_PRIVILEGED;
588	return trpmGCExitTrap(pVM, rc, pRegFrame);
589	}
590	}
591
592	return trpmGCExitTrap(pVM, VINF_EM_RAW_EXCEPTION_PRIVILEGED, pRegFrame);
593	}
594
595
596	/**
597	* \#GP (General Protection Fault) handler for Ring-3.
598	*
599	* @returns VBox status code.
600	* VINF_SUCCESS means we completely handled this trap,
601	* other codes are passed execution to host context.
602	*
603	* @param pVM The VM handle.
604	* @param pRegFrame Pointer to the register frame for the trap.
605	* @param pCpu The opcode info.
606	*/
607	static int trpmGCTrap0dHandlerRing3(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)
608	{
609	int rc;
610
611	switch (pCpu->pCurInstr->opcode)
612	{
613	/*
614	* STI and CLI are I/O privileged, i.e. if IOPL
615	*/
616	case OP_STI:
617	case OP_CLI:
618	{
619	uint32_t efl = CPUMRawGetEFlags(pVM, pRegFrame);
620	if (X86_EFL_GET_IOPL(efl) >= (unsigned)(pRegFrame->ss & X86_SEL_RPL))
621	{
622	LogFlow(("trpmGCTrap0dHandlerRing3: CLI/STI -> REM\n"));
623	return trpmGCExitTrap(pVM, VINF_EM_RESCHEDULE_REM, pRegFrame);
624	}
625	LogFlow(("trpmGCTrap0dHandlerRing3: CLI/STI -> #GP(0)\n"));
626	break;
627	}
628
629	/*
630	* INT3 and INT xx are ring-switching.
631	* (The shadow IDT will have set the entries to DPL=0, that's why we're here.)
632	*/
633	case OP_INT3:
634	/*
635	* Little hack to make the code below not fail
636	*/
637	pCpu->param1.flags = USE_IMMEDIATE8;
638	pCpu->param1.parval = 3;
639	/* fall thru */
640	case OP_INT:
641	{
642	Assert(pCpu->param1.flags & USE_IMMEDIATE8);
643	rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT);
644	if (VBOX_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
645	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
646
647	pVM->trpm.s.uActiveVector = (pVM->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
648	pVM->trpm.s.fActiveSoftwareInterrupt = true;
649	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH_INT, pRegFrame);
650	}
651
652	/*
653	* SYSCALL, SYSENTER, INTO and BOUND are also ring-switchers.
654	*/
655	case OP_SYSCALL:
656	case OP_SYSENTER:
657	#ifdef PATM_EMULATE_SYSENTER
658	rc = PATMSysCall(pVM, pRegFrame, pCpu);
659	if (rc == VINF_SUCCESS)
660	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
661	/* else no break; */
662	#endif
663	case OP_BOUND:
664	case OP_INTO:
665	pVM->trpm.s.uActiveVector = ~0;
666	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH, pRegFrame);
667	}
668
669	/*
670	* A genuine guest fault.
671	*/
672	return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
673	}
674
675
676	/**
677	* \#GP (General Protection Fault) handler.
678	*
679	* @returns VBox status code.
680	* VINF_SUCCESS means we completely handled this trap,
681	* other codes are passed execution to host context.
682	*
683	* @param pVM The VM handle.
684	* @param pTrpm Pointer to TRPM data (within VM).
685	* @param pRegFrame Pointer to the register frame for the trap.
686	*/
687	static int trpmGCTrap0dHandler(PVM pVM, PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
688	{
689	LogFlow(("trpmGCTrap0dHandler: cs:eip=%RTsel:%VGv uErr=%RX32\n", pRegFrame->ss, pRegFrame->eip, pTrpm->uActiveErrorCode));
690
691	#if 0 /* not right for iret. Shouldn't really be needed as SELMValidateAndConvertCSAddr deals with invalid cs. */
692	/*
693	* Filter out selector problems first as these may mean that the
694	* instruction isn't safe to read. If we're here because CS is NIL
695	* the flattening of cs:eip will deal with that.
696	*/
697	if ( !(pTrpm->uActiveErrorCode & (X86_TRAP_ERR_IDT \| X86_TRAP_ERR_EXTERNAL))
698	&& (pTrpm->uActiveErrorCode & X86_TRAP_ERR_SEL_MASK))
699	{
700	/* It's a guest trap. */
701	return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
702	}
703	#endif
704
705	STAM_PROFILE_ADV_START(&pVM->trpm.s.StatTrap0dDisasm, a);
706	/*
707	* Decode the instruction.
708	*/
709	RTGCPTR PC;
710	int rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &PC);
711	if (VBOX_FAILURE(rc))
712	{
713	Log(("trpmGCTrap0dHandler: Failed to convert %RTsel:%RX32 (cpl=%d) - rc=%Vrc !!\n",
714	pRegFrame->cs, pRegFrame->eip, pRegFrame->ss & X86_SEL_RPL, rc));
715	STAM_PROFILE_ADV_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
716	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
717	}
718
719	DISCPUSTATE Cpu;
720	uint32_t cbOp;
721	rc = EMInterpretDisasOneEx(pVM, (RTGCUINTPTR)PC, pRegFrame, &Cpu, &cbOp);
722	if (VBOX_FAILURE(rc))
723	{
724	STAM_PROFILE_ADV_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
725	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
726	}
727	STAM_PROFILE_ADV_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
728
729	/*
730	* Deal with I/O port access.
731	*/
732	if ( pVM->trpm.s.uActiveErrorCode == 0
733	&& (Cpu.pCurInstr->optype & OPTYPE_PORTIO))
734	{
735	rc = EMInterpretPortIO(pVM, pRegFrame, &Cpu, cbOp);
736	return trpmGCExitTrap(pVM, rc, pRegFrame);
737	}
738
739
740	/*
741	* Deal with Ring-0 (privileged instructions)
742	*/
743	if ( (pRegFrame->ss & X86_SEL_RPL) <= 1
744	&& !pRegFrame->eflags.Bits.u1VM)
745	return trpmGCTrap0dHandlerRing0(pVM, pRegFrame, &Cpu, PC);
746
747	/*
748	* Deal with Ring-3 GPs.
749	*/
750	if (!pRegFrame->eflags.Bits.u1VM)
751	return trpmGCTrap0dHandlerRing3(pVM, pRegFrame, &Cpu);
752
753	/*
754	* Deal with v86 code.
755	*/
756
757	/* We always set IOPL to zero which makes e.g. pushf fault in V86 mode. The guest might use IOPL=3 and therefor not expect a #GP.
758	* Simply fall back to the recompiler to emulate this instruction.
759	*/
760	/* Retrieve the eflags including the virtualized bits. */
761	/** @note hackish as the cpumctxcore structure doesn't contain the right value */
762	X86EFLAGS eflags;
763	eflags.u32 = CPUMRawGetEFlags(pVM, pRegFrame);
764	if (eflags.Bits.u2IOPL != 3)
765	{
766	Assert(eflags.Bits.u2IOPL == 0);
767
768	int rc = TRPMForwardTrap(pVM, pRegFrame, 0xD, 0, TRPM_TRAP_HAS_ERRORCODE, TRPM_TRAP);
769	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
770	return trpmGCExitTrap(pVM, rc, pRegFrame);
771	}
772	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
773	}
774
775
776	/**
777	* \#GP (General Protection Fault) handler.
778	*
779	* @returns VBox status code.
780	* VINF_SUCCESS means we completely handled this trap,
781	* other codes are passed execution to host context.
782	*
783	* @param pTrpm Pointer to TRPM data (within VM).
784	* @param pRegFrame Pointer to the register frame for the trap.
785	* @internal
786	*/
787	DECLASM(int) TRPMGCTrap0dHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
788	{
789	LogFlow(("TRPMGCTrap0dHandler: eip=%RGv\n", pRegFrame->eip));
790	PVM pVM = TRPM2VM(pTrpm);
791
792	int rc = trpmGCTrap0dHandler(pVM, pTrpm, pRegFrame);
793	switch (rc)
794	{
795	case VINF_EM_RAW_GUEST_TRAP:
796	case VINF_EM_RAW_EXCEPTION_PRIVILEGED:
797	if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
798	rc = VINF_PATM_PATCH_TRAP_GP;
799	break;
800
801	case VINF_EM_RAW_INTERRUPT_PENDING:
802	Assert(TRPMHasTrap(pVM));
803	/* no break; */
804	case VINF_PGM_SYNC_CR3: /** @todo Check this with Sander. */
805	case VINF_IOM_HC_IOPORT_READWRITE:
806	case VINF_IOM_HC_IOPORT_READ:
807	case VINF_IOM_HC_IOPORT_WRITE:
808	case VINF_IOM_HC_MMIO_WRITE:
809	case VINF_IOM_HC_MMIO_READ:
810	case VINF_IOM_HC_MMIO_READ_WRITE:
811	case VINF_PATM_PATCH_INT3:
812	case VINF_EM_RAW_TO_R3:
813	case VINF_EM_RAW_TIMER_PENDING:
814	case VINF_EM_PENDING_REQUEST:
815	case VINF_EM_HALT:
816	case VINF_SUCCESS:
817	break;
818
819	default:
820	AssertMsg(PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip) == false, ("return code %d\n", rc));
821	break;
822	}
823	return rc;
824	}
825
826	/**
827	* \#PF (Page Fault) handler.
828	*
829	* Calls PGM which does the actual handling.
830	*
831	*
832	* @returns VBox status code.
833	* VINF_SUCCESS means we completely handled this trap,
834	* other codes are passed execution to host context.
835	*
836	* @param pTrpm Pointer to TRPM data (within VM).
837	* @param pRegFrame Pointer to the register frame for the trap.
838	* @internal
839	*/
840	DECLASM(int) TRPMGCTrap0eHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
841	{
842	LogBird(("TRPMGCTrap0eHandler: eip=%RGv\n", pRegFrame->eip));
843	PVM pVM = TRPM2VM(pTrpm);
844
845	/*
846	* This is all PGM stuff.
847	*/
848	int rc = PGMTrap0eHandler(pVM, pTrpm->uActiveErrorCode, pRegFrame, (RTGCPTR)pTrpm->uActiveCR2);
849
850	switch (rc)
851	{
852	case VINF_EM_RAW_EMULATE_INSTR:
853	case VINF_EM_RAW_EMULATE_INSTR_PD_FAULT:
854	case VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT:
855	case VINF_EM_RAW_EMULATE_INSTR_TSS_FAULT:
856	case VINF_EM_RAW_EMULATE_INSTR_LDT_FAULT:
857	case VINF_EM_RAW_EMULATE_INSTR_IDT_FAULT:
858	if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
859	rc = VINF_PATCH_EMULATE_INSTR;
860	break;
861
862	case VINF_EM_RAW_GUEST_TRAP:
863	if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
864	return VINF_PATM_PATCH_TRAP_PF;
865
866	rc = TRPMForwardTrap(pVM, pRegFrame, 0xE, 0, TRPM_TRAP_HAS_ERRORCODE, TRPM_TRAP);
867	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
868	break;
869
870	case VINF_EM_RAW_INTERRUPT_PENDING:
871	Assert(TRPMHasTrap(pVM));
872	/* no break; */
873	case VINF_IOM_HC_MMIO_READ:
874	case VINF_IOM_HC_MMIO_WRITE:
875	case VINF_IOM_HC_MMIO_READ_WRITE:
876	case VINF_PATM_HC_MMIO_PATCH_READ:
877	case VINF_PATM_HC_MMIO_PATCH_WRITE:
878	case VINF_SUCCESS:
879	case VINF_EM_RAW_TO_R3:
880	case VINF_EM_PENDING_REQUEST:
881	case VINF_EM_RAW_TIMER_PENDING:
882	case VINF_CSAM_PENDING_ACTION:
883	case VINF_PGM_SYNC_CR3: /** @todo Check this with Sander. */
884	break;
885
886	default:
887	AssertMsg(PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip) == false, ("Patch address for return code %d. eip=%08x\n", rc, pRegFrame->eip));
888	break;
889	}
890	return trpmGCExitTrap(pVM, rc, pRegFrame);
891	}
892
893
894	/**
895	* Scans for the EIP in the specified array of trap handlers.
896	*
897	* If we don't fine the EIP, we'll panic.
898	*
899	* @returns VBox status code.
900	*
901	* @param pVM The VM handle.
902	* @param pRegFrame Pointer to the register frame for the trap.
903	* @param paHandlers The array of trap handler records.
904	* @param pEndRecord The end record (exclusive).
905	*/
906	static int trpmGCHyperGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, PCTRPMGCHYPER paHandlers, PCTRPMGCHYPER pEndRecord)
907	{
908	uintptr_t uEip = (uintptr_t)pRegFrame->eip;
909	Assert(paHandlers <= pEndRecord);
910
911	Log(("trpmGCHyperGeneric: uEip=%x %p-%p\n", uEip, paHandlers, pEndRecord));
912
913	#if 0 /// @todo later
914	/*
915	* Start by doing a kind of binary search.
916	*/
917	unsigned iStart = 0;
918	unsigned iEnd = pEndRecord - paHandlers;
919	unsigned i = iEnd / 2;
920	#endif
921
922	/*
923	* Do a linear search now (in case the array wasn't properly sorted).
924	*/
925	for (PCTRPMGCHYPER pCur = paHandlers; pCur < pEndRecord; pCur++)
926	{
927	if ( pCur->uStartEIP <= uEip
928	&& (pCur->uEndEIP ? pCur->uEndEIP > uEip : pCur->uStartEIP == uEip))
929	return pCur->pfnHandler(pVM, pRegFrame, pCur->uUser);
930	}
931
932	return VERR_TRPM_DONT_PANIC;
933	}
934
935
936	/**
937	* Hypervisor \#NP ((segment) Not Present) handler.
938	*
939	* Scans for the EIP in the registered trap handlers.
940	*
941	* @returns VBox status code.
942	* VINF_SUCCESS means we completely handled this trap,
943	* other codes are passed back to host context.
944	*
945	* @param pTrpm Pointer to TRPM data (within VM).
946	* @param pRegFrame Pointer to the register frame for the trap.
947	* @internal
948	*/
949	DECLASM(int) TRPMGCHyperTrap0bHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
950	{
951	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0bHandlers, g_aTrap0bHandlersEnd);
952	}
953
954
955	/**
956	* Hypervisor \#GP (General Protection Fault) handler.
957	*
958	* Scans for the EIP in the registered trap handlers.
959	*
960	* @returns VBox status code.
961	* VINF_SUCCESS means we completely handled this trap,
962	* other codes are passed back to host context.
963	*
964	* @param pTrpm Pointer to TRPM data (within VM).
965	* @param pRegFrame Pointer to the register frame for the trap.
966	* @internal
967	*/
968	DECLASM(int) TRPMGCHyperTrap0dHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
969	{
970	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
971	}
972
973
974	/**
975	* Hypervisor \#PF (Page Fault) handler.
976	*
977	* Scans for the EIP in the registered trap handlers.
978	*
979	* @returns VBox status code.
980	* VINF_SUCCESS means we completely handled this trap,
981	* other codes are passed back to host context.
982	*
983	* @param pTrpm Pointer to TRPM data (within VM).
984	* @param pRegFrame Pointer to the register frame for the trap.
985	* @internal
986	*/
987	DECLASM(int) TRPMGCHyperTrap0eHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
988	{
989	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
990	}
991
992
993	/**
994	* Deal with hypervisor traps occuring when resuming execution on a trap.
995	*
996	* @returns VBox status code.
997	* @param pVM The VM handle.
998	* @param pRegFrame Register frame.
999	* @param uUser User arg.
1000	*/
1001	DECLCALLBACK(int) trpmGCTrapInGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser)
1002	{
1003	Log(("trpmGCTrapInGeneric: eip=%RX32 uUser=%#x\n", pRegFrame->eip, uUser));
1004
1005	if (uUser & TRPM_TRAP_IN_HYPER)
1006	{
1007	/*
1008	* Check that there is still some stack left, if not we'll flag
1009	* a guru meditation (the alternative is a triple fault).
1010	*/
1011	RTGCUINTPTR cbStackUsed = (RTGCUINTPTR)VMMGetStackGC(pVM) - pRegFrame->esp;
1012	if (cbStackUsed > VMM_STACK_SIZE - _1K)
1013	{
1014	LogRel(("trpmGCTrapInGeneric: ran out of stack: esp=#x cbStackUsed=%#x\n", pRegFrame->esp, cbStackUsed));
1015	return VERR_TRPM_DONT_PANIC;
1016	}
1017
1018	/*
1019	* Just zero the register containing the selector in question.
1020	* We'll deal with the actual stale or troublesome selector value in
1021	* the outermost trap frame.
1022	*/
1023	switch (uUser & TRPM_TRAP_IN_OP_MASK)
1024	{
1025	case TRPM_TRAP_IN_MOV_GS:
1026	pRegFrame->eax = 0;
1027	pRegFrame->gs = 0; /* prevent recursive trouble. */
1028	break;
1029	case TRPM_TRAP_IN_MOV_FS:
1030	pRegFrame->eax = 0;
1031	pRegFrame->fs = 0; /* prevent recursive trouble. */
1032	return VINF_SUCCESS;
1033
1034	default:
1035	AssertMsgFailed(("Invalid uUser=%#x\n", uUser));
1036	return VERR_INTERNAL_ERROR;
1037	}
1038	}
1039	else
1040	{
1041	/*
1042	* Reconstruct the guest context and switch to the recompiler.
1043	* We ASSUME we're only at
1044	*/
1045	CPUMCTXCORE CtxCore = *pRegFrame;
1046	uint32_t pEsp = (uint32_t )pRegFrame->esp;
1047	int rc;
1048
1049	switch (uUser)
1050	{
1051	/*
1052	* This will only occur when resuming guest code in a trap handler!
1053	*/
1054	/* @note ASSUMES esp points to the temporary guest CPUMCTXCORE!!! */
1055	case TRPM_TRAP_IN_MOV_GS:
1056	case TRPM_TRAP_IN_MOV_FS:
1057	case TRPM_TRAP_IN_MOV_ES:
1058	case TRPM_TRAP_IN_MOV_DS:
1059	{
1060	PCPUMCTXCORE pTempGuestCtx = (PCPUMCTXCORE)pEsp;
1061
1062	/* Just copy the whole thing; several selector registers, eip (etc) and eax are not yet in pRegFrame. */
1063	CtxCore = *pTempGuestCtx;
1064	rc = VINF_EM_RAW_STALE_SELECTOR;
1065	break;
1066	}
1067
1068	/*
1069	* This will only occur when resuming guest code!
1070	*/
1071	case TRPM_TRAP_IN_IRET:
1072	CtxCore.eip = *pEsp++;
1073	CtxCore.cs = (RTSEL)*pEsp++;
1074	CtxCore.eflags.u32 = *pEsp++;
1075	CtxCore.esp = *pEsp++;
1076	CtxCore.ss = (RTSEL)*pEsp++;
1077	rc = VINF_EM_RAW_IRET_TRAP;
1078	break;
1079
1080	/*
1081	* This will only occur when resuming V86 guest code!
1082	*/
1083	case TRPM_TRAP_IN_IRET \| TRPM_TRAP_IN_V86:
1084	CtxCore.eip = *pEsp++;
1085	CtxCore.cs = (RTSEL)*pEsp++;
1086	CtxCore.eflags.u32 = *pEsp++;
1087	CtxCore.esp = *pEsp++;
1088	CtxCore.ss = (RTSEL)*pEsp++;
1089	CtxCore.es = (RTSEL)*pEsp++;
1090	CtxCore.ds = (RTSEL)*pEsp++;
1091	CtxCore.fs = (RTSEL)*pEsp++;
1092	CtxCore.gs = (RTSEL)*pEsp++;
1093	rc = VINF_EM_RAW_IRET_TRAP;
1094	break;
1095
1096	default:
1097	AssertMsgFailed(("Invalid uUser=%#x\n", uUser));
1098	return VERR_INTERNAL_ERROR;
1099	}
1100
1101
1102	CPUMSetGuestCtxCore(pVM, &CtxCore);
1103	TRPMGCHyperReturnToHost(pVM, rc);
1104	}
1105
1106	AssertMsgFailed(("Impossible!\n"));
1107	return VERR_INTERNAL_ERROR;
1108	}
1109

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source: vbox/trunk/src/VBox/VMM/VMMGC/TRPMGCHandlers.cpp@ 1602

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