TRPMGCHandlers.cpp@ 1868

Last change on this file since 1868 was 1828, checked in by vboxsync, 18 years ago
Cleaned up cpl checking.
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1	/* $Id: TRPMGCHandlers.cpp 1828 2007-03-30 12:52:55Z vboxsync $ */
2	/** @file
3	* TRPM - Guest Context Trap Handlers, CPP part
4	*/
5
6	/*
7	* Copyright (C) 2006 InnoTek Systemberatung GmbH
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License as published by the Free Software Foundation,
13	* in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14	* distribution. VirtualBox OSE is distributed in the hope that it will
15	* be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* If you received this file as part of a commercial VirtualBox
18	* distribution, then only the terms of your commercial VirtualBox
19	* license agreement apply instead of the previous paragraph.
20	*/
21
22
23	/*******************************************************************************
24	* Header Files *
25	*******************************************************************************/
26	#define LOG_GROUP LOG_GROUP_TRPM
27	#include <VBox/selm.h>
28	#include <VBox/iom.h>
29	#include <VBox/pgm.h>
30	#include <VBox/pdm.h>
31	#include <VBox/dbgf.h>
32	#include <VBox/em.h>
33	#include <VBox/csam.h>
34	#include <VBox/patm.h>
35	#include <VBox/mm.h>
36	#include <VBox/cpum.h>
37	#include "TRPMInternal.h"
38	#include <VBox/vm.h>
39	#include <VBox/param.h>
40
41	#include <VBox/err.h>
42	#include <VBox/dis.h>
43	#include <VBox/disopcode.h>
44	#include <VBox/x86.h>
45	#include <VBox/log.h>
46	#include <VBox/tm.h>
47	#include <iprt/asm.h>
48	#include <iprt/assert.h>
49
50	/* still here. MODR/M byte parsing */
51	#define X86_OPCODE_MODRM_MOD_MASK 0xc0
52	#define X86_OPCODE_MODRM_REG_MASK 0x38
53	#define X86_OPCODE_MODRM_RM_MASK 0x07
54
55	/** Pointer to a readonly hypervisor trap record. */
56	typedef const struct TRPMGCHYPER *PCTRPMGCHYPER;
57
58	/**
59	* A hypervisor trap record.
60	* This contains information about a handler for a instruction range.
61	*
62	* @remark This must match what TRPM_HANDLER outputs.
63	*/
64	typedef struct TRPMGCHYPER
65	{
66	/** The start address. */
67	uintptr_t uStartEIP;
68	/** The end address. (exclusive)
69	* If NULL the it's only for the instruction at pvStartEIP. */
70	uintptr_t uEndEIP;
71	/**
72	* The handler.
73	*
74	* @returns VBox status code
75	* VINF_SUCCESS means we've handled the trap.
76	* Any other error code means returning to the host context.
77	* @param pVM The VM handle.
78	* @param pRegFrame The register frame.
79	* @param uUser The user argument.
80	*/
81	DECLCALLBACKMEMBER(int, pfnHandler)(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser);
82	/** Whatever the handler desires to put here. */
83	uintptr_t uUser;
84	} TRPMGCHYPER;
85
86
87	/*******************************************************************************
88	* Global Variables *
89	*******************************************************************************/
90	__BEGIN_DECLS
91	/** Defined in VMMGC0.asm or VMMGC99.asm.
92	* @{ */
93	extern const TRPMGCHYPER g_aTrap0bHandlers[1];
94	extern const TRPMGCHYPER g_aTrap0bHandlersEnd[1];
95	extern const TRPMGCHYPER g_aTrap0dHandlers[1];
96	extern const TRPMGCHYPER g_aTrap0dHandlersEnd[1];
97	extern const TRPMGCHYPER g_aTrap0eHandlers[1];
98	extern const TRPMGCHYPER g_aTrap0eHandlersEnd[1];
99	/** @} */
100	__END_DECLS
101
102
103	/*******************************************************************************
104	* Internal Functions *
105	*******************************************************************************/
106	__BEGIN_DECLS /* addressed from asm (not called so no DECLASM). */
107	DECLCALLBACK(int) trpmGCTrapInGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser);
108	__END_DECLS
109
110
111
112	/**
113	* Exits the trap, called when exiting a trap handler.
114	*
115	* Will reset the trap if it's not a guest trap or the trap
116	* is already handled. Will process resume guest FFs.
117	*
118	* @returns rc.
119	* @param pVM VM handle.
120	* @param rc The VBox status code to return.
121	* @param pRegFrame Pointer to the register frame for the trap.
122	*/
123	static int trpmGCExitTrap(PVM pVM, int rc, PCPUMCTXCORE pRegFrame)
124	{
125	uint32_t uOldActiveVector = pVM->trpm.s.uActiveVector;
126
127	/* Reset trap? */
128	if ( rc != VINF_EM_RAW_GUEST_TRAP
129	&& rc != VINF_EM_RAW_RING_SWITCH_INT)
130	pVM->trpm.s.uActiveVector = ~0;
131
132	#ifdef VBOX_HIGH_RES_TIMERS_HACK
133	/*
134	* Occationally we should poll timers.
135	* We must NOT do this too frequently as it adds a significant overhead
136	* and it'll kill us if the trap load is high. (See #1354.)
137	* (The heuristic is not very intelligent, we should really check trap
138	* frequency etc. here, but alas, we lack any such information atm.)
139	*/
140	static unsigned s_iTimerPoll = 0;
141	if (rc == VINF_SUCCESS)
142	{
143	if (!(++s_iTimerPoll & 0xf))
144	{
145	uint64_t cTicks = TMTimerPoll(pVM); NOREF(cTicks);
146	Log2(("TMTimerPoll at %VGv returned %RX64 (VM_FF_TIMER=%d)\n", pRegFrame->eip, cTicks, VM_FF_ISPENDING(pVM, VM_FF_TIMER)));
147	}
148	}
149	else
150	s_iTimerPoll = 0;
151	#endif
152
153	/* Clear pending inhibit interrupt state if required. (necessary for dispatching interrupts later on) */
154	if (VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS))
155	{
156	Log2(("VM_FF_INHIBIT_INTERRUPTS at %VGv successor %VGv\n", pRegFrame->eip, EMGetInhibitInterruptsPC(pVM)));
157	if (pRegFrame->eip != EMGetInhibitInterruptsPC(pVM))
158	{
159	/** @note we intentionally don't clear VM_FF_INHIBIT_INTERRUPTS here if the eip is the same as the inhibited instr address.
160	* Before we are able to execute this instruction in raw mode (iret to guest code) an external interrupt might
161	* force a world switch again. Possibly allowing a guest interrupt to be dispatched in the process. This could
162	* break the guest. Sounds very unlikely, but such timing sensitive problem are not as rare as you might think.
163	*/
164	VM_FF_CLEAR(pVM, VM_FF_INHIBIT_INTERRUPTS);
165	}
166	}
167
168	/*
169	* Pending resume-guest-FF?
170	* Or pending (A)PIC interrupt? Windows XP will crash if we delay APIC interrupts.
171	*/
172	if ( rc == VINF_SUCCESS
173	&& VM_FF_ISPENDING(pVM, VM_FF_TO_R3 \| VM_FF_TIMER \| VM_FF_INTERRUPT_APIC \| VM_FF_INTERRUPT_PIC \| VM_FF_PGM_SYNC_CR3 \| VM_FF_PGM_SYNC_CR3_NON_GLOBAL \| VM_FF_REQUEST))
174	{
175	/* Pending Ring-3 action. */
176	if (VM_FF_ISPENDING(pVM, VM_FF_TO_R3))
177	{
178	VM_FF_CLEAR(pVM, VM_FF_TO_R3);
179	rc = VINF_EM_RAW_TO_R3;
180	}
181	/* Pending timer action. */
182	else if (VM_FF_ISPENDING(pVM, VM_FF_TIMER))
183	rc = VINF_EM_RAW_TIMER_PENDING;
184	/* Pending interrupt: dispatch it. */
185	else if ( VM_FF_ISPENDING(pVM, VM_FF_INTERRUPT_APIC \| VM_FF_INTERRUPT_PIC)
186	&& !VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS)
187	&& PATMAreInterruptsEnabledByCtxCore(pVM, pRegFrame)
188	)
189	{
190	uint8_t u8Interrupt;
191	rc = PDMGetInterrupt(pVM, &u8Interrupt);
192	Log(("trpmGCExitTrap: u8Interrupt=%d (%#x) rc=%Vrc\n", u8Interrupt, u8Interrupt, rc));
193	AssertFatalMsgRC(rc, ("PDMGetInterrupt failed with %Vrc\n", rc));
194	rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)u8Interrupt, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_HARDWARE_INT);
195	/* can't return if successful */
196	Assert(rc != VINF_SUCCESS);
197
198	/* Stop the profile counter that was started in TRPMGCHandlersA.asm */
199	Assert(uOldActiveVector <= 16);
200	STAM_PROFILE_ADV_STOP(&pVM->trpm.s.aStatGCTraps[uOldActiveVector], a);
201
202	/* Assert the trap and go to the recompiler to dispatch it. */
203	TRPMAssertTrap(pVM, u8Interrupt, false);
204
205	STAM_PROFILE_ADV_START(&pVM->trpm.s.aStatGCTraps[uOldActiveVector], a);
206	rc = VINF_EM_RAW_INTERRUPT_PENDING;
207	}
208	/*
209	* Try sync CR3?
210	* This ASSUMES that the MOV CRx, x emulation doesn't return with VINF_PGM_SYNC_CR3. (a bit hackish)
211	*/
212	else if (VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 \| VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
213	#if 1
214	rc = PGMSyncCR3(pVM, CPUMGetGuestCR0(pVM), CPUMGetGuestCR3(pVM), CPUMGetGuestCR4(pVM), VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3));
215	#else
216	rc = VINF_PGM_SYNC_CR3;
217	#endif
218	/* Pending request packets might contain actions that need immediate attention, such as pending hardware interrupts. */
219	else if (VM_FF_ISPENDING(pVM, VM_FF_REQUEST))
220	rc = VINF_EM_PENDING_REQUEST;
221	}
222
223	AssertMsg( rc != VINF_SUCCESS
224	\|\| ( pRegFrame->eflags.Bits.u1IF
225	&& ( pRegFrame->eflags.Bits.u2IOPL < (unsigned)(pRegFrame->ss & X86_SEL_RPL) \|\| pRegFrame->eflags.Bits.u1VM))
226	, ("rc = %VGv\neflags=%RX32 ss=%RTsel IOPL=%d\n", rc, pRegFrame->eflags.u32, pRegFrame->ss, pRegFrame->eflags.Bits.u2IOPL));
227	return rc;
228	}
229
230
231	/**
232	* \#DB (Debug event) handler.
233	*
234	* @returns VBox status code.
235	* VINF_SUCCESS means we completely handled this trap,
236	* other codes are passed execution to host context.
237	*
238	* @param pTrpm Pointer to TRPM data (within VM).
239	* @param pRegFrame Pointer to the register frame for the trap.
240	* @internal
241	*/
242	DECLASM(int) TRPMGCTrap01Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
243	{
244	RTGCUINTREG uDr6 = ASMGetAndClearDR6();
245	PVM pVM = TRPM2VM(pTrpm);
246	LogFlow(("TRPMGCTrap01Handler: cs:eip=%04x:%08x uDr6=%RTreg\n", pRegFrame->cs, pRegFrame->eip, uDr6));
247
248	/*
249	* We currently don't make sure of the X86_DR7_GD bit, but
250	* there might come a time when we do.
251	*/
252	if ((uDr6 & X86_DR6_BD) == X86_DR6_BD)
253	{
254	AssertReleaseMsgFailed(("X86_DR6_BD isn't used, but it's set! dr7=%RTreg(%RTreg) dr6=%RTreg\n",
255	ASMGetDR7(), CPUMGetHyperDR7(pVM), uDr6));
256	return VERR_NOT_IMPLEMENTED;
257	}
258
259	AssertReleaseMsg(!(uDr6 & X86_DR6_BT), ("X86_DR6_BT is impossible!\n"));
260
261	/*
262	* Now leave the rest to the DBGF.
263	*/
264	int rc = DBGFGCTrap01Handler(pVM, pRegFrame, uDr6);
265	if (rc == VINF_EM_RAW_GUEST_TRAP)
266	CPUMSetGuestDR6(pVM, uDr6);
267
268	return trpmGCExitTrap(pVM, rc, pRegFrame);
269	}
270
271
272
273	/**
274	* NMI handler, for when we are using NMIs to debug things.
275	*
276	* @returns VBox status code.
277	* VINF_SUCCESS means we completely handled this trap,
278	* other codes are passed execution to host context.
279	*
280	* @param pTrpm Pointer to TRPM data (within VM).
281	* @param pRegFrame Pointer to the register frame for the trap.
282	* @internal
283	* @remark This is not hooked up unless you're building with VBOX_WITH_NMI defined.
284	*/
285	DECLASM(int) TRPMGCTrap02Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
286	{
287	LogFlow(("TRPMGCTrap02Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
288	RTLogComPrintf("TRPMGCTrap02Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip);
289	return VERR_TRPM_DONT_PANIC;
290	}
291
292
293	/**
294	* \#BP (Breakpoint) handler.
295	*
296	* @returns VBox status code.
297	* VINF_SUCCESS means we completely handled this trap,
298	* other codes are passed execution to host context.
299	*
300	* @param pTrpm Pointer to TRPM data (within VM).
301	* @param pRegFrame Pointer to the register frame for the trap.
302	* @internal
303	*/
304	DECLASM(int) TRPMGCTrap03Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
305	{
306	LogFlow(("TRPMGCTrap03Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
307	PVM pVM = TRPM2VM(pTrpm);
308	int rc;
309
310	/*
311	* Both PATM are using INT3s, let them have a go first.
312	*/
313	if ( (pRegFrame->ss & X86_SEL_RPL) == 1
314	&& !pRegFrame->eflags.Bits.u1VM)
315	{
316	rc = PATMHandleInt3PatchTrap(pVM, pRegFrame);
317	if (rc == VINF_SUCCESS \|\| rc == VINF_EM_RAW_EMULATE_INSTR \|\| rc == VINF_PATM_PATCH_INT3 \|\| rc == VINF_PATM_DUPLICATE_FUNCTION)
318	return trpmGCExitTrap(pVM, rc, pRegFrame);
319	}
320	rc = DBGFGCTrap03Handler(pVM, pRegFrame);
321	/* anything we should do with this? Schedule it in GC? */
322	return trpmGCExitTrap(pVM, rc, pRegFrame);
323	}
324
325
326	/**
327	* Trap handler for illegal opcode fault (\#UD).
328	*
329	* @returns VBox status code.
330	* VINF_SUCCESS means we completely handled this trap,
331	* other codes are passed execution to host context.
332	*
333	* @param pTrpm Pointer to TRPM data (within VM).
334	* @param pRegFrame Pointer to the register frame for the trap.
335	* @internal
336	*/
337	DECLASM(int) TRPMGCTrap06Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
338	{
339	PVM pVM = TRPM2VM(pTrpm);
340	int rc;
341
342	LogFlow(("TRPMGCTrap06Handler %VGv eflags=%x\n", pRegFrame->eip, pRegFrame->eflags.u32));
343
344	if ( (pRegFrame->ss & X86_SEL_RPL) == 1
345	&& !pRegFrame->eflags.Bits.u1VM
346	&& PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
347	{
348	/*
349	* Decode the instruction.
350	*/
351	RTGCPTR PC;
352	rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &PC);
353	if (VBOX_FAILURE(rc))
354	{
355	Log(("TRPMGCTrap06Handler: Failed to convert %RTsel:%RX32 (cpl=%d) - rc=%Vrc !!\n", pRegFrame->cs, pRegFrame->eip, pRegFrame->ss & X86_SEL_RPL, rc));
356	return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
357	}
358
359	DISCPUSTATE Cpu;
360	uint32_t cbOp;
361	rc = EMInterpretDisasOneEx(pVM, (RTGCUINTPTR)PC, pRegFrame, &Cpu, &cbOp);
362	if (VBOX_FAILURE(rc))
363	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
364
365	/** @note monitor causes an #UD exception instead of #GP when not executed in ring 0. */
366	if (Cpu.pCurInstr->opcode == OP_ILLUD2)
367	{
368	rc = PATMGCHandleIllegalInstrTrap(pVM, pRegFrame);
369	if (rc == VINF_SUCCESS \|\| rc == VINF_EM_RAW_EMULATE_INSTR \|\| rc == VINF_PATM_DUPLICATE_FUNCTION \|\| rc == VINF_PATM_PENDING_IRQ_AFTER_IRET \|\| rc == VINF_EM_RESCHEDULE)
370	return trpmGCExitTrap(pVM, rc, pRegFrame);
371	}
372	/* Never generate a raw trap here; it might be a monitor instruction, that requires emulation. */
373	rc = VINF_EM_RAW_EMULATE_INSTR;
374	}
375	else if (pRegFrame->eflags.Bits.u1VM)
376	{
377	rc = TRPMForwardTrap(pVM, pRegFrame, 0x6, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_TRAP);
378	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
379	}
380	else
381	/* Never generate a raw trap here; it might be a monitor instruction, that requires emulation. */
382	rc = VINF_EM_RAW_EMULATE_INSTR;
383
384	return trpmGCExitTrap(pVM, rc, pRegFrame);
385	}
386
387
388	/**
389	* Trap handler for device not present fault (\#NM).
390	*
391	* Device not available, FP or (F)WAIT instruction.
392	*
393	* @returns VBox status code.
394	* VINF_SUCCESS means we completely handled this trap,
395	* other codes are passed execution to host context.
396	*
397	* @param pTrpm Pointer to TRPM data (within VM).
398	* @param pRegFrame Pointer to the register frame for the trap.
399	* @internal
400	*/
401	DECLASM(int) TRPMGCTrap07Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
402	{
403	PVM pVM = TRPM2VM(pTrpm);
404
405	LogFlow(("TRPMTrap07HandlerGC: eip=%VGv\n", pRegFrame->eip));
406	return CPUMHandleLazyFPU(pVM);
407	}
408
409
410	/**
411	* \#NP ((segment) Not Present) handler.
412	*
413	* @returns VBox status code.
414	* VINF_SUCCESS means we completely handled this trap,
415	* other codes are passed execution to host context.
416	*
417	* @param pTrpm Pointer to TRPM data (within VM).
418	* @param pRegFrame Pointer to the register frame for the trap.
419	* @internal
420	*/
421	DECLASM(int) TRPMGCTrap0bHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
422	{
423	LogFlow(("TRPMGCTrap0bHandler: eip=%VGv\n", pRegFrame->eip));
424	PVM pVM = TRPM2VM(pTrpm);
425
426	/*
427	* Try to detect instruction by opcode which caused trap.
428	* XXX note: this code may cause \#PF (trap e) or \#GP (trap d) while
429	* accessing user code. need to handle it somehow in future!
430	*/
431	uint8_t *pu8Code;
432	if (SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, (PRTGCPTR)&pu8Code) == VINF_SUCCESS)
433	{
434	/*
435	* First skip possible instruction prefixes, such as:
436	* OS, AS
437	* CS:, DS:, ES:, SS:, FS:, GS:
438	* REPE, REPNE
439	*
440	* note: Currently we supports only up to 4 prefixes per opcode, more
441	* prefixes (normally not used anyway) will cause trap d in guest.
442	* note: Instruction length in IA-32 may be up to 15 bytes, we dont
443	* check this issue, its too hard.
444	*/
445	for (unsigned i = 0; i < 4; i++)
446	{
447	if ( pu8Code[0] != 0xf2 /* REPNE/REPNZ */
448	&& pu8Code[0] != 0xf3 /* REP/REPE/REPZ */
449	&& pu8Code[0] != 0x2e /* CS: */
450	&& pu8Code[0] != 0x36 /* SS: */
451	&& pu8Code[0] != 0x3e /* DS: */
452	&& pu8Code[0] != 0x26 /* ES: */
453	&& pu8Code[0] != 0x64 /* FS: */
454	&& pu8Code[0] != 0x65 /* GS: */
455	&& pu8Code[0] != 0x66 /* OS */
456	&& pu8Code[0] != 0x67 /* AS */
457	)
458	break;
459	pu8Code++;
460	}
461
462	/*
463	* Detect right switch using a callgate.
464	*
465	* We recognize the following causes for the trap 0b:
466	* CALL FAR, CALL FAR []
467	* JMP FAR, JMP FAR []
468	* IRET (may cause a task switch)
469	*
470	* Note: we can't detect whether the trap was caused by a call to a
471	* callgate descriptor or it is a real trap 0b due to a bad selector.
472	* In both situations we'll pass execution to our recompiler so we don't
473	* have to worry.
474	* If we wanted to do better detection, we have set GDT entries to callgate
475	* descriptors pointing to our own handlers.
476	*/
477	/** @todo not sure about IRET, may generate Trap 0d (\#GP), NEED TO CHECK! */
478	if ( pu8Code[0] == 0x9a /* CALL FAR */
479	\|\| ( pu8Code[0] == 0xff /* CALL FAR [] */
480	&& (pu8Code[1] & X86_OPCODE_MODRM_REG_MASK) == 0x18)
481	\|\| pu8Code[0] == 0xea /* JMP FAR */
482	\|\| ( pu8Code[0] == 0xff /* JMP FAR [] */
483	&& (pu8Code[1] & X86_OPCODE_MODRM_REG_MASK) == 0x28)
484	\|\| pu8Code[0] == 0xcf /* IRET */
485	)
486	{
487	/*
488	* Got potential call to callgate.
489	* We simply return execution to the recompiler to do emulation
490	* starting from the instruction which caused the trap.
491	*/
492	pTrpm->uActiveVector = ~0;
493	return VINF_EM_RAW_RING_SWITCH;
494	}
495	}
496
497	/*
498	* Pass trap 0b as is to the recompiler in all other cases.
499	*/
500	return VINF_EM_RAW_GUEST_TRAP;
501	}
502
503
504	/**
505	* \#GP (General Protection Fault) handler for Ring-0 privileged instructions.
506	*
507	* @returns VBox status code.
508	* VINF_SUCCESS means we completely handled this trap,
509	* other codes are passed execution to host context.
510	*
511	* @param pVM The VM handle.
512	* @param pRegFrame Pointer to the register frame for the trap.
513	* @param pCpu The opcode info.
514	* @param PC Program counter.
515	*/
516	static int trpmGCTrap0dHandlerRing0(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, RTGCPTR PC)
517	{
518	int rc;
519
520	/*
521	* Try handle it here, if not return to HC and emulate/interpret it there.
522	*/
523	switch (pCpu->pCurInstr->opcode)
524	{
525	case OP_INT3:
526	/*
527	* Little hack to make the code below not fail
528	*/
529	pCpu->param1.flags = USE_IMMEDIATE8;
530	pCpu->param1.parval = 3;
531	/* fallthru */
532	case OP_INT:
533	{
534	Assert(pCpu->param1.flags & USE_IMMEDIATE8);
535	Assert(!(PATMIsPatchGCAddr(pVM, PC)));
536	if (pCpu->param1.parval == 3)
537	{
538	/* Obsolete!! */
539	/* Int 3 replacement patch? */
540	if (PATMHandleInt3PatchTrap(pVM, pRegFrame) == VINF_SUCCESS)
541	{
542	AssertFailed();
543	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
544	}
545	}
546	rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT);
547	if (VBOX_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
548	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
549
550	pVM->trpm.s.uActiveVector = (pVM->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
551	pVM->trpm.s.fActiveSoftwareInterrupt = true;
552	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH_INT, pRegFrame);
553	}
554
555	#ifdef PATM_EMULATE_SYSENTER
556	case OP_SYSEXIT:
557	case OP_SYSRET:
558	rc = PATMSysCall(pVM, pRegFrame, pCpu);
559	return trpmGCExitTrap(pVM, rc, pRegFrame);
560	#endif
561
562	case OP_HLT:
563	/* If it's in patch code, defer to ring-3. */
564	if (PATMIsPatchGCAddr(pVM, PC))
565	break;
566
567	pRegFrame->eip += pCpu->opsize;
568	return trpmGCExitTrap(pVM, VINF_EM_HALT, pRegFrame);
569
570
571	/*
572	* These instructions are used by PATM and CASM for finding
573	* dangerous non-trapping instructions. Thus, since all
574	* scanning and patching is done in ring-3 we'll have to
575	* return to ring-3 on the first encounter of these instructions.
576	*/
577	case OP_MOV_CR:
578	case OP_MOV_DR:
579	/* We can safely emulate control/debug register move instructions in patched code. */
580	if ( !PATMIsPatchGCAddr(pVM, PC)
581	&& !CSAMIsKnownDangerousInstr(pVM, PC))
582	break;
583	case OP_INVLPG:
584	case OP_LLDT:
585	case OP_STI:
586	case OP_RDTSC:
587	{
588	uint32_t cbIgnored;
589	rc = EMInterpretInstructionCPU(pVM, pCpu, pRegFrame, PC, &cbIgnored);
590	if (VBOX_SUCCESS(rc))
591	pRegFrame->eip += pCpu->opsize;
592	else if (rc == VERR_EM_INTERPRETER)
593	rc = VINF_EM_RAW_EXCEPTION_PRIVILEGED;
594	return trpmGCExitTrap(pVM, rc, pRegFrame);
595	}
596	}
597
598	return trpmGCExitTrap(pVM, VINF_EM_RAW_EXCEPTION_PRIVILEGED, pRegFrame);
599	}
600
601
602	/**
603	* \#GP (General Protection Fault) handler for Ring-3.
604	*
605	* @returns VBox status code.
606	* VINF_SUCCESS means we completely handled this trap,
607	* other codes are passed execution to host context.
608	*
609	* @param pVM The VM handle.
610	* @param pRegFrame Pointer to the register frame for the trap.
611	* @param pCpu The opcode info.
612	*/
613	static int trpmGCTrap0dHandlerRing3(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)
614	{
615	int rc;
616
617	Assert(!pRegFrame->eflags.Bits.u1VM);
618
619	switch (pCpu->pCurInstr->opcode)
620	{
621	/*
622	* STI and CLI are I/O privileged, i.e. if IOPL
623	*/
624	case OP_STI:
625	case OP_CLI:
626	{
627	uint32_t efl = CPUMRawGetEFlags(pVM, pRegFrame);
628	if (X86_EFL_GET_IOPL(efl) >= (unsigned)(pRegFrame->ss & X86_SEL_RPL))
629	{
630	LogFlow(("trpmGCTrap0dHandlerRing3: CLI/STI -> REM\n"));
631	return trpmGCExitTrap(pVM, VINF_EM_RESCHEDULE_REM, pRegFrame);
632	}
633	LogFlow(("trpmGCTrap0dHandlerRing3: CLI/STI -> #GP(0)\n"));
634	break;
635	}
636
637	/*
638	* INT3 and INT xx are ring-switching.
639	* (The shadow IDT will have set the entries to DPL=0, that's why we're here.)
640	*/
641	case OP_INT3:
642	/*
643	* Little hack to make the code below not fail
644	*/
645	pCpu->param1.flags = USE_IMMEDIATE8;
646	pCpu->param1.parval = 3;
647	/* fall thru */
648	case OP_INT:
649	{
650	Assert(pCpu->param1.flags & USE_IMMEDIATE8);
651	rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT);
652	if (VBOX_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
653	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
654
655	pVM->trpm.s.uActiveVector = (pVM->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
656	pVM->trpm.s.fActiveSoftwareInterrupt = true;
657	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH_INT, pRegFrame);
658	}
659
660	/*
661	* SYSCALL, SYSENTER, INTO and BOUND are also ring-switchers.
662	*/
663	case OP_SYSCALL:
664	case OP_SYSENTER:
665	#ifdef PATM_EMULATE_SYSENTER
666	rc = PATMSysCall(pVM, pRegFrame, pCpu);
667	if (rc == VINF_SUCCESS)
668	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
669	/* else no break; */
670	#endif
671	case OP_BOUND:
672	case OP_INTO:
673	pVM->trpm.s.uActiveVector = ~0;
674	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH, pRegFrame);
675	}
676
677	/*
678	* A genuine guest fault.
679	*/
680	return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
681	}
682
683
684	/**
685	* \#GP (General Protection Fault) handler.
686	*
687	* @returns VBox status code.
688	* VINF_SUCCESS means we completely handled this trap,
689	* other codes are passed execution to host context.
690	*
691	* @param pVM The VM handle.
692	* @param pTrpm Pointer to TRPM data (within VM).
693	* @param pRegFrame Pointer to the register frame for the trap.
694	*/
695	static int trpmGCTrap0dHandler(PVM pVM, PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
696	{
697	LogFlow(("trpmGCTrap0dHandler: cs:eip=%RTsel:%VGv uErr=%RX32\n", pRegFrame->ss, pRegFrame->eip, pTrpm->uActiveErrorCode));
698
699	#if 0 /* not right for iret. Shouldn't really be needed as SELMValidateAndConvertCSAddr deals with invalid cs. */
700	/*
701	* Filter out selector problems first as these may mean that the
702	* instruction isn't safe to read. If we're here because CS is NIL
703	* the flattening of cs:eip will deal with that.
704	*/
705	if ( !(pTrpm->uActiveErrorCode & (X86_TRAP_ERR_IDT \| X86_TRAP_ERR_EXTERNAL))
706	&& (pTrpm->uActiveErrorCode & X86_TRAP_ERR_SEL_MASK))
707	{
708	/* It's a guest trap. */
709	return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
710	}
711	#endif
712
713	STAM_PROFILE_ADV_START(&pVM->trpm.s.StatTrap0dDisasm, a);
714	/*
715	* Decode the instruction.
716	*/
717	RTGCPTR PC;
718	int rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &PC);
719	if (VBOX_FAILURE(rc))
720	{
721	Log(("trpmGCTrap0dHandler: Failed to convert %RTsel:%RX32 (cpl=%d) - rc=%Vrc !!\n",
722	pRegFrame->cs, pRegFrame->eip, pRegFrame->ss & X86_SEL_RPL, rc));
723	STAM_PROFILE_ADV_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
724	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
725	}
726
727	DISCPUSTATE Cpu;
728	uint32_t cbOp;
729	rc = EMInterpretDisasOneEx(pVM, (RTGCUINTPTR)PC, pRegFrame, &Cpu, &cbOp);
730	if (VBOX_FAILURE(rc))
731	{
732	STAM_PROFILE_ADV_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
733	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
734	}
735	STAM_PROFILE_ADV_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
736
737	/*
738	* Deal with I/O port access.
739	*/
740	if ( pVM->trpm.s.uActiveErrorCode == 0
741	&& (Cpu.pCurInstr->optype & OPTYPE_PORTIO))
742	{
743	rc = EMInterpretPortIO(pVM, pRegFrame, &Cpu, cbOp);
744	return trpmGCExitTrap(pVM, rc, pRegFrame);
745	}
746
747
748	/*
749	* Deal with Ring-0 (privileged instructions)
750	*/
751	if ( (pRegFrame->ss & X86_SEL_RPL) <= 1
752	&& !pRegFrame->eflags.Bits.u1VM)
753	return trpmGCTrap0dHandlerRing0(pVM, pRegFrame, &Cpu, PC);
754
755	/*
756	* Deal with Ring-3 GPs.
757	*/
758	if (!pRegFrame->eflags.Bits.u1VM)
759	return trpmGCTrap0dHandlerRing3(pVM, pRegFrame, &Cpu);
760
761	/*
762	* Deal with v86 code.
763	*/
764
765	/* We always set IOPL to zero which makes e.g. pushf fault in V86 mode. The guest might use IOPL=3 and therefor not expect a #GP.
766	* Simply fall back to the recompiler to emulate this instruction.
767	*/
768	/* Retrieve the eflags including the virtualized bits. */
769	/** @note hackish as the cpumctxcore structure doesn't contain the right value */
770	X86EFLAGS eflags;
771	eflags.u32 = CPUMRawGetEFlags(pVM, pRegFrame);
772	if (eflags.Bits.u2IOPL != 3)
773	{
774	Assert(eflags.Bits.u2IOPL == 0);
775
776	int rc = TRPMForwardTrap(pVM, pRegFrame, 0xD, 0, TRPM_TRAP_HAS_ERRORCODE, TRPM_TRAP);
777	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
778	return trpmGCExitTrap(pVM, rc, pRegFrame);
779	}
780	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
781	}
782
783
784	/**
785	* \#GP (General Protection Fault) handler.
786	*
787	* @returns VBox status code.
788	* VINF_SUCCESS means we completely handled this trap,
789	* other codes are passed execution to host context.
790	*
791	* @param pTrpm Pointer to TRPM data (within VM).
792	* @param pRegFrame Pointer to the register frame for the trap.
793	* @internal
794	*/
795	DECLASM(int) TRPMGCTrap0dHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
796	{
797	LogFlow(("TRPMGCTrap0dHandler: eip=%RGv\n", pRegFrame->eip));
798	PVM pVM = TRPM2VM(pTrpm);
799
800	int rc = trpmGCTrap0dHandler(pVM, pTrpm, pRegFrame);
801	switch (rc)
802	{
803	case VINF_EM_RAW_GUEST_TRAP:
804	case VINF_EM_RAW_EXCEPTION_PRIVILEGED:
805	if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
806	rc = VINF_PATM_PATCH_TRAP_GP;
807	break;
808
809	case VINF_EM_RAW_INTERRUPT_PENDING:
810	Assert(TRPMHasTrap(pVM));
811	/* no break; */
812	case VINF_PGM_SYNC_CR3: /** @todo Check this with Sander. */
813	case VINF_IOM_HC_IOPORT_READWRITE:
814	case VINF_IOM_HC_IOPORT_READ:
815	case VINF_IOM_HC_IOPORT_WRITE:
816	case VINF_IOM_HC_MMIO_WRITE:
817	case VINF_IOM_HC_MMIO_READ:
818	case VINF_IOM_HC_MMIO_READ_WRITE:
819	case VINF_PATM_PATCH_INT3:
820	case VINF_EM_RAW_TO_R3:
821	case VINF_EM_RAW_TIMER_PENDING:
822	case VINF_EM_PENDING_REQUEST:
823	case VINF_EM_HALT:
824	case VINF_SUCCESS:
825	break;
826
827	default:
828	AssertMsg(PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip) == false, ("return code %d\n", rc));
829	break;
830	}
831	return rc;
832	}
833
834	/**
835	* \#PF (Page Fault) handler.
836	*
837	* Calls PGM which does the actual handling.
838	*
839	*
840	* @returns VBox status code.
841	* VINF_SUCCESS means we completely handled this trap,
842	* other codes are passed execution to host context.
843	*
844	* @param pTrpm Pointer to TRPM data (within VM).
845	* @param pRegFrame Pointer to the register frame for the trap.
846	* @internal
847	*/
848	DECLASM(int) TRPMGCTrap0eHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
849	{
850	LogBird(("TRPMGCTrap0eHandler: eip=%RGv\n", pRegFrame->eip));
851	PVM pVM = TRPM2VM(pTrpm);
852
853	/*
854	* This is all PGM stuff.
855	*/
856	int rc = PGMTrap0eHandler(pVM, pTrpm->uActiveErrorCode, pRegFrame, (RTGCPTR)pTrpm->uActiveCR2);
857
858	switch (rc)
859	{
860	case VINF_EM_RAW_EMULATE_INSTR:
861	case VINF_EM_RAW_EMULATE_INSTR_PD_FAULT:
862	case VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT:
863	case VINF_EM_RAW_EMULATE_INSTR_TSS_FAULT:
864	case VINF_EM_RAW_EMULATE_INSTR_LDT_FAULT:
865	case VINF_EM_RAW_EMULATE_INSTR_IDT_FAULT:
866	if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
867	rc = VINF_PATCH_EMULATE_INSTR;
868	break;
869
870	case VINF_EM_RAW_GUEST_TRAP:
871	if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
872	return VINF_PATM_PATCH_TRAP_PF;
873
874	rc = TRPMForwardTrap(pVM, pRegFrame, 0xE, 0, TRPM_TRAP_HAS_ERRORCODE, TRPM_TRAP);
875	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
876	break;
877
878	case VINF_EM_RAW_INTERRUPT_PENDING:
879	Assert(TRPMHasTrap(pVM));
880	/* no break; */
881	case VINF_IOM_HC_MMIO_READ:
882	case VINF_IOM_HC_MMIO_WRITE:
883	case VINF_IOM_HC_MMIO_READ_WRITE:
884	case VINF_PATM_HC_MMIO_PATCH_READ:
885	case VINF_PATM_HC_MMIO_PATCH_WRITE:
886	case VINF_SUCCESS:
887	case VINF_EM_RAW_TO_R3:
888	case VINF_EM_PENDING_REQUEST:
889	case VINF_EM_RAW_TIMER_PENDING:
890	case VINF_CSAM_PENDING_ACTION:
891	case VINF_PGM_SYNC_CR3: /** @todo Check this with Sander. */
892	break;
893
894	default:
895	AssertMsg(PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip) == false, ("Patch address for return code %d. eip=%08x\n", rc, pRegFrame->eip));
896	break;
897	}
898	return trpmGCExitTrap(pVM, rc, pRegFrame);
899	}
900
901
902	/**
903	* Scans for the EIP in the specified array of trap handlers.
904	*
905	* If we don't fine the EIP, we'll panic.
906	*
907	* @returns VBox status code.
908	*
909	* @param pVM The VM handle.
910	* @param pRegFrame Pointer to the register frame for the trap.
911	* @param paHandlers The array of trap handler records.
912	* @param pEndRecord The end record (exclusive).
913	*/
914	static int trpmGCHyperGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, PCTRPMGCHYPER paHandlers, PCTRPMGCHYPER pEndRecord)
915	{
916	uintptr_t uEip = (uintptr_t)pRegFrame->eip;
917	Assert(paHandlers <= pEndRecord);
918
919	Log(("trpmGCHyperGeneric: uEip=%x %p-%p\n", uEip, paHandlers, pEndRecord));
920
921	#if 0 /// @todo later
922	/*
923	* Start by doing a kind of binary search.
924	*/
925	unsigned iStart = 0;
926	unsigned iEnd = pEndRecord - paHandlers;
927	unsigned i = iEnd / 2;
928	#endif
929
930	/*
931	* Do a linear search now (in case the array wasn't properly sorted).
932	*/
933	for (PCTRPMGCHYPER pCur = paHandlers; pCur < pEndRecord; pCur++)
934	{
935	if ( pCur->uStartEIP <= uEip
936	&& (pCur->uEndEIP ? pCur->uEndEIP > uEip : pCur->uStartEIP == uEip))
937	return pCur->pfnHandler(pVM, pRegFrame, pCur->uUser);
938	}
939
940	return VERR_TRPM_DONT_PANIC;
941	}
942
943
944	/**
945	* Hypervisor \#NP ((segment) Not Present) handler.
946	*
947	* Scans for the EIP in the registered trap handlers.
948	*
949	* @returns VBox status code.
950	* VINF_SUCCESS means we completely handled this trap,
951	* other codes are passed back to host context.
952	*
953	* @param pTrpm Pointer to TRPM data (within VM).
954	* @param pRegFrame Pointer to the register frame for the trap.
955	* @internal
956	*/
957	DECLASM(int) TRPMGCHyperTrap0bHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
958	{
959	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0bHandlers, g_aTrap0bHandlersEnd);
960	}
961
962
963	/**
964	* Hypervisor \#GP (General Protection Fault) handler.
965	*
966	* Scans for the EIP in the registered trap handlers.
967	*
968	* @returns VBox status code.
969	* VINF_SUCCESS means we completely handled this trap,
970	* other codes are passed back to host context.
971	*
972	* @param pTrpm Pointer to TRPM data (within VM).
973	* @param pRegFrame Pointer to the register frame for the trap.
974	* @internal
975	*/
976	DECLASM(int) TRPMGCHyperTrap0dHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
977	{
978	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
979	}
980
981
982	/**
983	* Hypervisor \#PF (Page Fault) handler.
984	*
985	* Scans for the EIP in the registered trap handlers.
986	*
987	* @returns VBox status code.
988	* VINF_SUCCESS means we completely handled this trap,
989	* other codes are passed back to host context.
990	*
991	* @param pTrpm Pointer to TRPM data (within VM).
992	* @param pRegFrame Pointer to the register frame for the trap.
993	* @internal
994	*/
995	DECLASM(int) TRPMGCHyperTrap0eHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
996	{
997	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
998	}
999
1000
1001	/**
1002	* Deal with hypervisor traps occuring when resuming execution on a trap.
1003	*
1004	* @returns VBox status code.
1005	* @param pVM The VM handle.
1006	* @param pRegFrame Register frame.
1007	* @param uUser User arg.
1008	*/
1009	DECLCALLBACK(int) trpmGCTrapInGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser)
1010	{
1011	Log(("********************************************************\n"));
1012	Log(("trpmGCTrapInGeneric: eip=%RX32 uUser=%#x\n", pRegFrame->eip, uUser));
1013	Log(("********************************************************\n"));
1014
1015	if (uUser & TRPM_TRAP_IN_HYPER)
1016	{
1017	/*
1018	* Check that there is still some stack left, if not we'll flag
1019	* a guru meditation (the alternative is a triple fault).
1020	*/
1021	RTGCUINTPTR cbStackUsed = (RTGCUINTPTR)VMMGetStackGC(pVM) - pRegFrame->esp;
1022	if (cbStackUsed > VMM_STACK_SIZE - _1K)
1023	{
1024	LogRel(("trpmGCTrapInGeneric: ran out of stack: esp=#x cbStackUsed=%#x\n", pRegFrame->esp, cbStackUsed));
1025	return VERR_TRPM_DONT_PANIC;
1026	}
1027
1028	/*
1029	* Just zero the register containing the selector in question.
1030	* We'll deal with the actual stale or troublesome selector value in
1031	* the outermost trap frame.
1032	*/
1033	switch (uUser & TRPM_TRAP_IN_OP_MASK)
1034	{
1035	case TRPM_TRAP_IN_MOV_GS:
1036	pRegFrame->eax = 0;
1037	pRegFrame->gs = 0; /* prevent recursive trouble. */
1038	break;
1039	case TRPM_TRAP_IN_MOV_FS:
1040	pRegFrame->eax = 0;
1041	pRegFrame->fs = 0; /* prevent recursive trouble. */
1042	return VINF_SUCCESS;
1043
1044	default:
1045	AssertMsgFailed(("Invalid uUser=%#x\n", uUser));
1046	return VERR_INTERNAL_ERROR;
1047	}
1048	}
1049	else
1050	{
1051	/*
1052	* Reconstruct the guest context and switch to the recompiler.
1053	* We ASSUME we're only at
1054	*/
1055	CPUMCTXCORE CtxCore = *pRegFrame;
1056	uint32_t pEsp = (uint32_t )pRegFrame->esp;
1057	int rc;
1058
1059	switch (uUser)
1060	{
1061	/*
1062	* This will only occur when resuming guest code in a trap handler!
1063	*/
1064	/* @note ASSUMES esp points to the temporary guest CPUMCTXCORE!!! */
1065	case TRPM_TRAP_IN_MOV_GS:
1066	case TRPM_TRAP_IN_MOV_FS:
1067	case TRPM_TRAP_IN_MOV_ES:
1068	case TRPM_TRAP_IN_MOV_DS:
1069	{
1070	PCPUMCTXCORE pTempGuestCtx = (PCPUMCTXCORE)pEsp;
1071
1072	/* Just copy the whole thing; several selector registers, eip (etc) and eax are not yet in pRegFrame. */
1073	CtxCore = *pTempGuestCtx;
1074	rc = VINF_EM_RAW_STALE_SELECTOR;
1075	break;
1076	}
1077
1078	/*
1079	* This will only occur when resuming guest code!
1080	*/
1081	case TRPM_TRAP_IN_IRET:
1082	CtxCore.eip = *pEsp++;
1083	CtxCore.cs = (RTSEL)*pEsp++;
1084	CtxCore.eflags.u32 = *pEsp++;
1085	CtxCore.esp = *pEsp++;
1086	CtxCore.ss = (RTSEL)*pEsp++;
1087	rc = VINF_EM_RAW_IRET_TRAP;
1088	break;
1089
1090	/*
1091	* This will only occur when resuming V86 guest code!
1092	*/
1093	case TRPM_TRAP_IN_IRET \| TRPM_TRAP_IN_V86:
1094	CtxCore.eip = *pEsp++;
1095	CtxCore.cs = (RTSEL)*pEsp++;
1096	CtxCore.eflags.u32 = *pEsp++;
1097	CtxCore.esp = *pEsp++;
1098	CtxCore.ss = (RTSEL)*pEsp++;
1099	CtxCore.es = (RTSEL)*pEsp++;
1100	CtxCore.ds = (RTSEL)*pEsp++;
1101	CtxCore.fs = (RTSEL)*pEsp++;
1102	CtxCore.gs = (RTSEL)*pEsp++;
1103	rc = VINF_EM_RAW_IRET_TRAP;
1104	break;
1105
1106	default:
1107	AssertMsgFailed(("Invalid uUser=%#x\n", uUser));
1108	return VERR_INTERNAL_ERROR;
1109	}
1110
1111
1112	CPUMSetGuestCtxCore(pVM, &CtxCore);
1113	TRPMGCHyperReturnToHost(pVM, rc);
1114	}
1115
1116	AssertMsgFailed(("Impossible!\n"));
1117	return VERR_INTERNAL_ERROR;
1118	}
1119

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source: vbox/trunk/src/VBox/VMM/VMMGC/TRPMGCHandlers.cpp@ 1868

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