TRPMGCHandlers.cpp@ 18710

Last change on this file since 18710 was 18617, checked in by vboxsync, 16 years ago
PGM,EM: Handle out of memory situations more gracefully - part 1. New debugger commands: .pgmerror and .pgmerroroff.
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1	/* $Id: TRPMGCHandlers.cpp 18617 2009-04-01 22:11:29Z vboxsync $ */
2	/** @file
3	* TRPM - Guest Context Trap Handlers, CPP part
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22
23	/*******************************************************************************
24	* Header Files *
25	*******************************************************************************/
26	#define LOG_GROUP LOG_GROUP_TRPM
27	#include <VBox/selm.h>
28	#include <VBox/iom.h>
29	#include <VBox/pgm.h>
30	#include <VBox/pdm.h>
31	#include <VBox/dbgf.h>
32	#include <VBox/em.h>
33	#include <VBox/csam.h>
34	#include <VBox/patm.h>
35	#include <VBox/mm.h>
36	#include <VBox/cpum.h>
37	#include "TRPMInternal.h"
38	#include <VBox/vm.h>
39	#include <VBox/param.h>
40
41	#include <VBox/err.h>
42	#include <VBox/dis.h>
43	#include <VBox/disopcode.h>
44	#include <VBox/x86.h>
45	#include <VBox/log.h>
46	#include <VBox/tm.h>
47	#include <iprt/asm.h>
48	#include <iprt/assert.h>
49
50	/*******************************************************************************
51	* Defined Constants And Macros *
52	*******************************************************************************/
53	/* still here. MODR/M byte parsing */
54	#define X86_OPCODE_MODRM_MOD_MASK 0xc0
55	#define X86_OPCODE_MODRM_REG_MASK 0x38
56	#define X86_OPCODE_MODRM_RM_MASK 0x07
57
58	/** @todo fix/remove/permanent-enable this when DIS/PATM handles invalid lock sequences. */
59	#define DTRACE_EXPERIMENT
60
61
62	/*******************************************************************************
63	* Structures and Typedefs *
64	*******************************************************************************/
65	/** Pointer to a readonly hypervisor trap record. */
66	typedef const struct TRPMGCHYPER *PCTRPMGCHYPER;
67
68	/**
69	* A hypervisor trap record.
70	* This contains information about a handler for a instruction range.
71	*
72	* @remark This must match what TRPM_HANDLER outputs.
73	*/
74	typedef struct TRPMGCHYPER
75	{
76	/** The start address. */
77	uintptr_t uStartEIP;
78	/** The end address. (exclusive)
79	* If NULL the it's only for the instruction at pvStartEIP. */
80	uintptr_t uEndEIP;
81	/**
82	* The handler.
83	*
84	* @returns VBox status code
85	* VINF_SUCCESS means we've handled the trap.
86	* Any other error code means returning to the host context.
87	* @param pVM The VM handle.
88	* @param pRegFrame The register frame.
89	* @param uUser The user argument.
90	*/
91	DECLRCCALLBACKMEMBER(int, pfnHandler, (PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser));
92	/** Whatever the handler desires to put here. */
93	uintptr_t uUser;
94	} TRPMGCHYPER;
95
96
97	/*******************************************************************************
98	* Global Variables *
99	*******************************************************************************/
100	__BEGIN_DECLS
101	/** Defined in VMMGC0.asm or VMMGC99.asm.
102	* @{ */
103	extern const TRPMGCHYPER g_aTrap0bHandlers[1];
104	extern const TRPMGCHYPER g_aTrap0bHandlersEnd[1];
105	extern const TRPMGCHYPER g_aTrap0dHandlers[1];
106	extern const TRPMGCHYPER g_aTrap0dHandlersEnd[1];
107	extern const TRPMGCHYPER g_aTrap0eHandlers[1];
108	extern const TRPMGCHYPER g_aTrap0eHandlersEnd[1];
109	/** @} */
110	__END_DECLS
111
112
113	/*******************************************************************************
114	* Internal Functions *
115	*******************************************************************************/
116	__BEGIN_DECLS /* addressed from asm (not called so no DECLASM). */
117	DECLCALLBACK(int) trpmGCTrapInGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser);
118	__END_DECLS
119
120
121
122	/**
123	* Exits the trap, called when exiting a trap handler.
124	*
125	* Will reset the trap if it's not a guest trap or the trap
126	* is already handled. Will process resume guest FFs.
127	*
128	* @returns rc, can be adjusted if its VINF_SUCCESS or something really bad
129	* happened.
130	* @param pVM VM handle.
131	* @param rc The VBox status code to return.
132	* @param pRegFrame Pointer to the register frame for the trap.
133	*/
134	static int trpmGCExitTrap(PVM pVM, int rc, PCPUMCTXCORE pRegFrame)
135	{
136	uint32_t uOldActiveVector = pVM->trpm.s.uActiveVector;
137	NOREF(uOldActiveVector);
138
139	/* Reset trap? */
140	if ( rc != VINF_EM_RAW_GUEST_TRAP
141	&& rc != VINF_EM_RAW_RING_SWITCH_INT)
142	pVM->trpm.s.uActiveVector = ~0;
143
144	#ifdef VBOX_HIGH_RES_TIMERS_HACK
145	/*
146	* Occationally we should poll timers.
147	* We must NOT do this too frequently as it adds a significant overhead
148	* and it'll kill us if the trap load is high. (See #1354.)
149	* (The heuristic is not very intelligent, we should really check trap
150	* frequency etc. here, but alas, we lack any such information atm.)
151	*/
152	static unsigned s_iTimerPoll = 0;
153	if (rc == VINF_SUCCESS)
154	{
155	if (!(++s_iTimerPoll & 0xf))
156	{
157	uint64_t cTicks = TMTimerPoll(pVM); NOREF(cTicks);
158	Log2(("TMTimerPoll at %08RX32 returned %RX64 (VM_FF_TIMER=%d)\n", pRegFrame->eip, cTicks, VM_FF_ISPENDING(pVM, VM_FF_TIMER)));
159	}
160	}
161	else
162	s_iTimerPoll = 0;
163	#endif
164
165	/* Clear pending inhibit interrupt state if required. (necessary for dispatching interrupts later on) */
166	if (VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS))
167	{
168	Log2(("VM_FF_INHIBIT_INTERRUPTS at %08RX32 successor %RGv\n", pRegFrame->eip, EMGetInhibitInterruptsPC(pVM)));
169	if (pRegFrame->eip != EMGetInhibitInterruptsPC(pVM))
170	{
171	/** @note we intentionally don't clear VM_FF_INHIBIT_INTERRUPTS here if the eip is the same as the inhibited instr address.
172	* Before we are able to execute this instruction in raw mode (iret to guest code) an external interrupt might
173	* force a world switch again. Possibly allowing a guest interrupt to be dispatched in the process. This could
174	* break the guest. Sounds very unlikely, but such timing sensitive problem are not as rare as you might think.
175	*/
176	VM_FF_CLEAR(pVM, VM_FF_INHIBIT_INTERRUPTS);
177	}
178	}
179
180	/*
181	* Pending resume-guest-FF?
182	* Or pending (A)PIC interrupt? Windows XP will crash if we delay APIC interrupts.
183	*/
184	if ( rc == VINF_SUCCESS
185	&& VM_FF_ISPENDING(pVM, VM_FF_TO_R3 \| VM_FF_TIMER \| VM_FF_INTERRUPT_APIC \| VM_FF_INTERRUPT_PIC \| VM_FF_REQUEST
186	\| VM_FF_PGM_SYNC_CR3 \| VM_FF_PGM_SYNC_CR3_NON_GLOBAL \| VM_FF_PGM_NO_MEMORY))
187	{
188	/* The out of memory condition naturally outrang the others. */
189	if (RT_UNLIKELY(VM_FF_ISPENDING(pVM, VM_FF_PGM_NO_MEMORY)))
190	rc = VINF_EM_NO_MEMORY;
191	/* Pending Ring-3 action. */
192	else if (VM_FF_ISPENDING(pVM, VM_FF_TO_R3))
193	{
194	VM_FF_CLEAR(pVM, VM_FF_TO_R3);
195	rc = VINF_EM_RAW_TO_R3;
196	}
197	/* Pending timer action. */
198	else if (VM_FF_ISPENDING(pVM, VM_FF_TIMER))
199	rc = VINF_EM_RAW_TIMER_PENDING;
200	/* Pending interrupt: dispatch it. */
201	else if ( VM_FF_ISPENDING(pVM, VM_FF_INTERRUPT_APIC \| VM_FF_INTERRUPT_PIC)
202	&& !VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS)
203	&& PATMAreInterruptsEnabledByCtxCore(pVM, pRegFrame)
204	)
205	{
206	uint8_t u8Interrupt;
207	rc = PDMGetInterrupt(pVM, &u8Interrupt);
208	Log(("trpmGCExitTrap: u8Interrupt=%d (%#x) rc=%Rrc\n", u8Interrupt, u8Interrupt, rc));
209	AssertFatalMsgRC(rc, ("PDMGetInterrupt failed with %Rrc\n", rc));
210	rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)u8Interrupt, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_HARDWARE_INT, uOldActiveVector);
211	/* can't return if successful */
212	Assert(rc != VINF_SUCCESS);
213
214	/* Stop the profile counter that was started in TRPMGCHandlersA.asm */
215	Assert(uOldActiveVector <= 16);
216	STAM_PROFILE_ADV_STOP(&pVM->trpm.s.aStatGCTraps[uOldActiveVector], a);
217
218	/* Assert the trap and go to the recompiler to dispatch it. */
219	TRPMAssertTrap(pVM, u8Interrupt, TRPM_HARDWARE_INT);
220
221	STAM_PROFILE_ADV_START(&pVM->trpm.s.aStatGCTraps[uOldActiveVector], a);
222	rc = VINF_EM_RAW_INTERRUPT_PENDING;
223	}
224	/*
225	* Try sync CR3?
226	*/
227	else if (VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 \| VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
228	#if 1
229	rc = PGMSyncCR3(pVM, CPUMGetGuestCR0(pVM), CPUMGetGuestCR3(pVM), CPUMGetGuestCR4(pVM), VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3));
230	#else
231	rc = VINF_PGM_SYNC_CR3;
232	#endif
233	/* Pending request packets might contain actions that need immediate attention, such as pending hardware interrupts. */
234	else if (VM_FF_ISPENDING(pVM, VM_FF_REQUEST))
235	rc = VINF_EM_PENDING_REQUEST;
236	}
237
238	AssertMsg( rc != VINF_SUCCESS
239	\|\| ( pRegFrame->eflags.Bits.u1IF
240	&& ( pRegFrame->eflags.Bits.u2IOPL < (unsigned)(pRegFrame->ss & X86_SEL_RPL) \|\| pRegFrame->eflags.Bits.u1VM))
241	, ("rc=%Rrc\neflags=%RX32 ss=%RTsel IOPL=%d\n", rc, pRegFrame->eflags.u32, pRegFrame->ss, pRegFrame->eflags.Bits.u2IOPL));
242	return rc;
243	}
244
245
246	/**
247	* \#DB (Debug event) handler.
248	*
249	* @returns VBox status code.
250	* VINF_SUCCESS means we completely handled this trap,
251	* other codes are passed execution to host context.
252	*
253	* @param pTrpm Pointer to TRPM data (within VM).
254	* @param pRegFrame Pointer to the register frame for the trap.
255	* @internal
256	*/
257	DECLASM(int) TRPMGCTrap01Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
258	{
259	RTGCUINTREG uDr6 = ASMGetAndClearDR6();
260	PVM pVM = TRPM2VM(pTrpm);
261	LogFlow(("TRPMGCTrap01Handler: cs:eip=%04x:%08x uDr6=%RTreg\n", pRegFrame->cs, pRegFrame->eip, uDr6));
262
263	/*
264	* We currently don't make sure of the X86_DR7_GD bit, but
265	* there might come a time when we do.
266	*/
267	if ((uDr6 & X86_DR6_BD) == X86_DR6_BD)
268	{
269	AssertReleaseMsgFailed(("X86_DR6_BD isn't used, but it's set! dr7=%RTreg(%RTreg) dr6=%RTreg\n",
270	ASMGetDR7(), CPUMGetHyperDR7(pVM), uDr6));
271	return VERR_NOT_IMPLEMENTED;
272	}
273
274	AssertReleaseMsg(!(uDr6 & X86_DR6_BT), ("X86_DR6_BT is impossible!\n"));
275
276	/*
277	* Now leave the rest to the DBGF.
278	*/
279	int rc = DBGFGCTrap01Handler(pVM, pRegFrame, uDr6);
280	if (rc == VINF_EM_RAW_GUEST_TRAP)
281	CPUMSetGuestDR6(pVM, uDr6);
282
283	return trpmGCExitTrap(pVM, rc, pRegFrame);
284	}
285
286
287	/**
288	* NMI handler, for when we are using NMIs to debug things.
289	*
290	* @returns VBox status code.
291	* VINF_SUCCESS means we completely handled this trap,
292	* other codes are passed execution to host context.
293	*
294	* @param pTrpm Pointer to TRPM data (within VM).
295	* @param pRegFrame Pointer to the register frame for the trap.
296	* @internal
297	* @remark This is not hooked up unless you're building with VBOX_WITH_NMI defined.
298	*/
299	DECLASM(int) TRPMGCTrap02Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
300	{
301	LogFlow(("TRPMGCTrap02Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
302	RTLogComPrintf("TRPMGCTrap02Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip);
303	return VERR_TRPM_DONT_PANIC;
304	}
305
306
307	/**
308	* \#BP (Breakpoint) handler.
309	*
310	* @returns VBox status code.
311	* VINF_SUCCESS means we completely handled this trap,
312	* other codes are passed execution to host context.
313	*
314	* @param pTrpm Pointer to TRPM data (within VM).
315	* @param pRegFrame Pointer to the register frame for the trap.
316	* @internal
317	*/
318	DECLASM(int) TRPMGCTrap03Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
319	{
320	LogFlow(("TRPMGCTrap03Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
321	PVM pVM = TRPM2VM(pTrpm);
322	int rc;
323
324	/*
325	* Both PATM are using INT3s, let them have a go first.
326	*/
327	if ( (pRegFrame->ss & X86_SEL_RPL) == 1
328	&& !pRegFrame->eflags.Bits.u1VM)
329	{
330	rc = PATMHandleInt3PatchTrap(pVM, pRegFrame);
331	if (rc == VINF_SUCCESS \|\| rc == VINF_EM_RAW_EMULATE_INSTR \|\| rc == VINF_PATM_PATCH_INT3 \|\| rc == VINF_PATM_DUPLICATE_FUNCTION)
332	return trpmGCExitTrap(pVM, rc, pRegFrame);
333	}
334	rc = DBGFGCTrap03Handler(pVM, pRegFrame);
335	/* anything we should do with this? Schedule it in GC? */
336	return trpmGCExitTrap(pVM, rc, pRegFrame);
337	}
338
339
340	/**
341	* Trap handler for illegal opcode fault (\#UD).
342	*
343	* @returns VBox status code.
344	* VINF_SUCCESS means we completely handled this trap,
345	* other codes are passed execution to host context.
346	*
347	* @param pTrpm Pointer to TRPM data (within VM).
348	* @param pRegFrame Pointer to the register frame for the trap.
349	* @internal
350	*/
351	DECLASM(int) TRPMGCTrap06Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
352	{
353	PVM pVM = TRPM2VM(pTrpm);
354	int rc;
355
356	LogFlow(("TRPMGCTrap06Handler %08RX32 eflags=%x\n", pRegFrame->eip, pRegFrame->eflags.u32));
357
358	if (CPUMGetGuestCPL(pVM, pRegFrame) == 0)
359	{
360	/*
361	* Decode the instruction.
362	*/
363	RTGCPTR PC;
364	rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &PC);
365	if (RT_FAILURE(rc))
366	{
367	Log(("TRPMGCTrap06Handler: Failed to convert %RTsel:%RX32 (cpl=%d) - rc=%Rrc !!\n", pRegFrame->cs, pRegFrame->eip, pRegFrame->ss & X86_SEL_RPL, rc));
368	return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
369	}
370
371	DISCPUSTATE Cpu;
372	uint32_t cbOp;
373	rc = EMInterpretDisasOneEx(pVM, (RTGCUINTPTR)PC, pRegFrame, &Cpu, &cbOp);
374	if (RT_FAILURE(rc))
375	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
376
377	/*
378	* UD2 in a patch?
379	*/
380	if ( Cpu.pCurInstr->opcode == OP_ILLUD2
381	&& PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip))
382	{
383	rc = PATMGCHandleIllegalInstrTrap(pVM, pRegFrame);
384	if ( rc == VINF_SUCCESS
385	\|\| rc == VINF_EM_RAW_EMULATE_INSTR
386	\|\| rc == VINF_PATM_DUPLICATE_FUNCTION
387	\|\| rc == VINF_PATM_PENDING_IRQ_AFTER_IRET
388	\|\| rc == VINF_EM_RESCHEDULE)
389	return trpmGCExitTrap(pVM, rc, pRegFrame);
390	}
391	/*
392	* Speed up dtrace and don't entrust invalid lock sequences to the recompiler.
393	*/
394	else if (Cpu.prefix & PREFIX_LOCK)
395	{
396	Log(("TRPMGCTrap06Handler: pc=%08x op=%d\n", pRegFrame->eip, Cpu.pCurInstr->opcode));
397	#ifdef DTRACE_EXPERIMENT /** @todo fix/remove/permanent-enable this when DIS/PATM handles invalid lock sequences. */
398	Assert(!PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip));
399	rc = TRPMForwardTrap(pVM, pRegFrame, 0x6, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_TRAP, 0x6);
400	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
401	#else
402	rc = VINF_EM_RAW_EMULATE_INSTR;
403	#endif
404	}
405	/*
406	* Handle MONITOR - it causes an #UD exception instead of #GP when not executed in ring 0.
407	*/
408	else if (Cpu.pCurInstr->opcode == OP_MONITOR)
409	{
410	uint32_t cbIgnored;
411	rc = EMInterpretInstructionCPU(pVM, &Cpu, pRegFrame, PC, &cbIgnored);
412	if (RT_LIKELY(RT_SUCCESS(rc)))
413	pRegFrame->eip += Cpu.opsize;
414	}
415	/* Never generate a raw trap here; it might be an instruction, that requires emulation. */
416	else
417	rc = VINF_EM_RAW_EMULATE_INSTR;
418	}
419	else
420	{
421	rc = TRPMForwardTrap(pVM, pRegFrame, 0x6, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_TRAP, 0x6);
422	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
423	}
424
425	return trpmGCExitTrap(pVM, rc, pRegFrame);
426	}
427
428
429	/**
430	* Trap handler for device not present fault (\#NM).
431	*
432	* Device not available, FP or (F)WAIT instruction.
433	*
434	* @returns VBox status code.
435	* VINF_SUCCESS means we completely handled this trap,
436	* other codes are passed execution to host context.
437	*
438	* @param pTrpm Pointer to TRPM data (within VM).
439	* @param pRegFrame Pointer to the register frame for the trap.
440	* @internal
441	*/
442	DECLASM(int) TRPMGCTrap07Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
443	{
444	PVM pVM = TRPM2VM(pTrpm);
445
446	LogFlow(("TRPMTrap07HandlerGC: eip=%08RX32\n", pRegFrame->eip));
447	return CPUMHandleLazyFPU(pVM, VMMGetCpu(pVM));
448	}
449
450
451	/**
452	* \#NP ((segment) Not Present) handler.
453	*
454	* @returns VBox status code.
455	* VINF_SUCCESS means we completely handled this trap,
456	* other codes are passed execution to host context.
457	*
458	* @param pTrpm Pointer to TRPM data (within VM).
459	* @param pRegFrame Pointer to the register frame for the trap.
460	* @internal
461	*/
462	DECLASM(int) TRPMGCTrap0bHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
463	{
464	LogFlow(("TRPMGCTrap0bHandler: eip=%08RX32\n", pRegFrame->eip));
465	PVM pVM = TRPM2VM(pTrpm);
466
467	/*
468	* Try to detect instruction by opcode which caused trap.
469	* XXX note: this code may cause \#PF (trap e) or \#GP (trap d) while
470	* accessing user code. need to handle it somehow in future!
471	*/
472	RTGCPTR GCPtr;
473	if (SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &GCPtr) == VINF_SUCCESS)
474	{
475	uint8_t pu8Code = (uint8_t )(uintptr_t)GCPtr;
476
477	/*
478	* First skip possible instruction prefixes, such as:
479	* OS, AS
480	* CS:, DS:, ES:, SS:, FS:, GS:
481	* REPE, REPNE
482	*
483	* note: Currently we supports only up to 4 prefixes per opcode, more
484	* prefixes (normally not used anyway) will cause trap d in guest.
485	* note: Instruction length in IA-32 may be up to 15 bytes, we dont
486	* check this issue, its too hard.
487	*/
488	for (unsigned i = 0; i < 4; i++)
489	{
490	if ( pu8Code[0] != 0xf2 /* REPNE/REPNZ */
491	&& pu8Code[0] != 0xf3 /* REP/REPE/REPZ */
492	&& pu8Code[0] != 0x2e /* CS: */
493	&& pu8Code[0] != 0x36 /* SS: */
494	&& pu8Code[0] != 0x3e /* DS: */
495	&& pu8Code[0] != 0x26 /* ES: */
496	&& pu8Code[0] != 0x64 /* FS: */
497	&& pu8Code[0] != 0x65 /* GS: */
498	&& pu8Code[0] != 0x66 /* OS */
499	&& pu8Code[0] != 0x67 /* AS */
500	)
501	break;
502	pu8Code++;
503	}
504
505	/*
506	* Detect right switch using a callgate.
507	*
508	* We recognize the following causes for the trap 0b:
509	* CALL FAR, CALL FAR []
510	* JMP FAR, JMP FAR []
511	* IRET (may cause a task switch)
512	*
513	* Note: we can't detect whether the trap was caused by a call to a
514	* callgate descriptor or it is a real trap 0b due to a bad selector.
515	* In both situations we'll pass execution to our recompiler so we don't
516	* have to worry.
517	* If we wanted to do better detection, we have set GDT entries to callgate
518	* descriptors pointing to our own handlers.
519	*/
520	/** @todo not sure about IRET, may generate Trap 0d (\#GP), NEED TO CHECK! */
521	if ( pu8Code[0] == 0x9a /* CALL FAR */
522	\|\| ( pu8Code[0] == 0xff /* CALL FAR [] */
523	&& (pu8Code[1] & X86_OPCODE_MODRM_REG_MASK) == 0x18)
524	\|\| pu8Code[0] == 0xea /* JMP FAR */
525	\|\| ( pu8Code[0] == 0xff /* JMP FAR [] */
526	&& (pu8Code[1] & X86_OPCODE_MODRM_REG_MASK) == 0x28)
527	\|\| pu8Code[0] == 0xcf /* IRET */
528	)
529	{
530	/*
531	* Got potential call to callgate.
532	* We simply return execution to the recompiler to do emulation
533	* starting from the instruction which caused the trap.
534	*/
535	pTrpm->uActiveVector = ~0;
536	return VINF_EM_RAW_RING_SWITCH;
537	}
538	}
539
540	/*
541	* Pass trap 0b as is to the recompiler in all other cases.
542	*/
543	return VINF_EM_RAW_GUEST_TRAP;
544	}
545
546
547	/**
548	* \#GP (General Protection Fault) handler for Ring-0 privileged instructions.
549	*
550	* @returns VBox status code.
551	* VINF_SUCCESS means we completely handled this trap,
552	* other codes are passed execution to host context.
553	*
554	* @param pVM The VM handle.
555	* @param pRegFrame Pointer to the register frame for the trap.
556	* @param pCpu The opcode info.
557	* @param PC The program counter corresponding to cs:eip in pRegFrame.
558	*/
559	static int trpmGCTrap0dHandlerRing0(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, RTGCPTR PC)
560	{
561	int rc;
562
563	/*
564	* Try handle it here, if not return to HC and emulate/interpret it there.
565	*/
566	switch (pCpu->pCurInstr->opcode)
567	{
568	case OP_INT3:
569	/*
570	* Little hack to make the code below not fail
571	*/
572	pCpu->param1.flags = USE_IMMEDIATE8;
573	pCpu->param1.parval = 3;
574	/* fallthru */
575	case OP_INT:
576	{
577	Assert(pCpu->param1.flags & USE_IMMEDIATE8);
578	Assert(!(PATMIsPatchGCAddr(pVM, (RTRCPTR)PC)));
579	if (pCpu->param1.parval == 3)
580	{
581	/* Int 3 replacement patch? */
582	if (PATMHandleInt3PatchTrap(pVM, pRegFrame) == VINF_SUCCESS)
583	{
584	AssertFailed();
585	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
586	}
587	}
588	rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT, 0xd);
589	if (RT_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
590	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
591
592	pVM->trpm.s.uActiveVector = (pVM->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
593	pVM->trpm.s.enmActiveType = TRPM_SOFTWARE_INT;
594	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH_INT, pRegFrame);
595	}
596
597	#ifdef PATM_EMULATE_SYSENTER
598	case OP_SYSEXIT:
599	case OP_SYSRET:
600	rc = PATMSysCall(pVM, pRegFrame, pCpu);
601	return trpmGCExitTrap(pVM, rc, pRegFrame);
602	#endif
603
604	case OP_HLT:
605	/* If it's in patch code, defer to ring-3. */
606	if (PATMIsPatchGCAddr(pVM, (RTRCPTR)PC))
607	break;
608
609	pRegFrame->eip += pCpu->opsize;
610	return trpmGCExitTrap(pVM, VINF_EM_HALT, pRegFrame);
611
612
613	/*
614	* These instructions are used by PATM and CASM for finding
615	* dangerous non-trapping instructions. Thus, since all
616	* scanning and patching is done in ring-3 we'll have to
617	* return to ring-3 on the first encounter of these instructions.
618	*/
619	case OP_MOV_CR:
620	case OP_MOV_DR:
621	/* We can safely emulate control/debug register move instructions in patched code. */
622	if ( !PATMIsPatchGCAddr(pVM, (RTRCPTR)PC)
623	&& !CSAMIsKnownDangerousInstr(pVM, (RTRCPTR)PC))
624	break;
625	case OP_INVLPG:
626	case OP_LLDT:
627	case OP_STI:
628	case OP_RDTSC: /* just in case */
629	case OP_CLTS:
630	case OP_WBINVD: /* nop */
631	case OP_RDMSR:
632	case OP_WRMSR:
633	{
634	uint32_t cbIgnored;
635	rc = EMInterpretInstructionCPU(pVM, pCpu, pRegFrame, PC, &cbIgnored);
636	if (RT_SUCCESS(rc))
637	pRegFrame->eip += pCpu->opsize;
638	else if (rc == VERR_EM_INTERPRETER)
639	rc = VINF_EM_RAW_EXCEPTION_PRIVILEGED;
640	return trpmGCExitTrap(pVM, rc, pRegFrame);
641	}
642	}
643
644	return trpmGCExitTrap(pVM, VINF_EM_RAW_EXCEPTION_PRIVILEGED, pRegFrame);
645	}
646
647
648	/**
649	* \#GP (General Protection Fault) handler for Ring-3.
650	*
651	* @returns VBox status code.
652	* VINF_SUCCESS means we completely handled this trap,
653	* other codes are passed execution to host context.
654	*
655	* @param pVM The VM handle.
656	* @param pRegFrame Pointer to the register frame for the trap.
657	* @param pCpu The opcode info.
658	* @param PC The program counter corresponding to cs:eip in pRegFrame.
659	*/
660	static int trpmGCTrap0dHandlerRing3(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, RTGCPTR PC)
661	{
662	int rc;
663
664	Assert(!pRegFrame->eflags.Bits.u1VM);
665
666	switch (pCpu->pCurInstr->opcode)
667	{
668	/*
669	* INT3 and INT xx are ring-switching.
670	* (The shadow IDT will have set the entries to DPL=0, that's why we're here.)
671	*/
672	case OP_INT3:
673	/*
674	* Little hack to make the code below not fail
675	*/
676	pCpu->param1.flags = USE_IMMEDIATE8;
677	pCpu->param1.parval = 3;
678	/* fall thru */
679	case OP_INT:
680	{
681	Assert(pCpu->param1.flags & USE_IMMEDIATE8);
682	rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT, 0xd);
683	if (RT_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
684	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
685
686	pVM->trpm.s.uActiveVector = (pVM->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
687	pVM->trpm.s.enmActiveType = TRPM_SOFTWARE_INT;
688	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH_INT, pRegFrame);
689	}
690
691	/*
692	* SYSCALL, SYSENTER, INTO and BOUND are also ring-switchers.
693	*/
694	case OP_SYSCALL:
695	case OP_SYSENTER:
696	#ifdef PATM_EMULATE_SYSENTER
697	rc = PATMSysCall(pVM, pRegFrame, pCpu);
698	if (rc == VINF_SUCCESS)
699	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
700	/* else no break; */
701	#endif
702	case OP_BOUND:
703	case OP_INTO:
704	pVM->trpm.s.uActiveVector = ~0;
705	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH, pRegFrame);
706
707	/*
708	* Handle virtualized TSC reads, just in case.
709	*/
710	case OP_RDTSC:
711	{
712	uint32_t cbIgnored;
713	rc = EMInterpretInstructionCPU(pVM, pCpu, pRegFrame, PC, &cbIgnored);
714	if (RT_SUCCESS(rc))
715	pRegFrame->eip += pCpu->opsize;
716	else if (rc == VERR_EM_INTERPRETER)
717	rc = VINF_EM_RAW_EXCEPTION_PRIVILEGED;
718	return trpmGCExitTrap(pVM, rc, pRegFrame);
719	}
720
721	/*
722	* STI and CLI are I/O privileged, i.e. if IOPL
723	*/
724	case OP_STI:
725	case OP_CLI:
726	{
727	uint32_t efl = CPUMRawGetEFlags(pVM, pRegFrame);
728	if (X86_EFL_GET_IOPL(efl) >= (unsigned)(pRegFrame->ss & X86_SEL_RPL))
729	{
730	LogFlow(("trpmGCTrap0dHandlerRing3: CLI/STI -> REM\n"));
731	return trpmGCExitTrap(pVM, VINF_EM_RESCHEDULE_REM, pRegFrame);
732	}
733	LogFlow(("trpmGCTrap0dHandlerRing3: CLI/STI -> #GP(0)\n"));
734	break;
735	}
736	}
737
738	/*
739	* A genuine guest fault.
740	*/
741	return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
742	}
743
744
745	/**
746	* Emulates RDTSC for the \#GP handler.
747	*
748	* @returns VINF_SUCCESS or VINF_EM_RAW_EMULATE_INSTR.
749	*
750	* @param pVM Pointer to the shared VM structure.
751	* @param pRegFrame Pointer to the registre frame for the trap.
752	* This will be updated on successful return.
753	*/
754	DECLINLINE(int) trpmGCTrap0dHandlerRdTsc(PVM pVM, PCPUMCTXCORE pRegFrame)
755	{
756	STAM_COUNTER_INC(&pVM->trpm.s.StatTrap0dRdTsc);
757
758	if (CPUMGetGuestCR4(pVM) & X86_CR4_TSD)
759	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame); /* will trap (optimize later). */
760
761	uint64_t uTicks = TMCpuTickGet(pVM);
762	pRegFrame->eax = uTicks;
763	pRegFrame->edx = uTicks >> 32;
764	pRegFrame->eip += 2;
765	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
766	}
767
768
769	/**
770	* \#GP (General Protection Fault) handler.
771	*
772	* @returns VBox status code.
773	* VINF_SUCCESS means we completely handled this trap,
774	* other codes are passed execution to host context.
775	*
776	* @param pVM The VM handle.
777	* @param pTrpm Pointer to TRPM data (within VM).
778	* @param pRegFrame Pointer to the register frame for the trap.
779	*/
780	static int trpmGCTrap0dHandler(PVM pVM, PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
781	{
782	LogFlow(("trpmGCTrap0dHandler: cs:eip=%RTsel:%08RX32 uErr=%RGv\n", pRegFrame->ss, pRegFrame->eip, pTrpm->uActiveErrorCode));
783
784	/*
785	* Convert and validate CS.
786	*/
787	STAM_PROFILE_START(&pVM->trpm.s.StatTrap0dDisasm, a);
788	RTGCPTR PC;
789	uint32_t cBits;
790	int rc = SELMValidateAndConvertCSAddrGCTrap(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs,
791	(RTGCPTR)pRegFrame->eip, &PC, &cBits);
792	if (RT_FAILURE(rc))
793	{
794	Log(("trpmGCTrap0dHandler: Failed to convert %RTsel:%RX32 (cpl=%d) - rc=%Rrc !!\n",
795	pRegFrame->cs, pRegFrame->eip, pRegFrame->ss & X86_SEL_RPL, rc));
796	STAM_PROFILE_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
797	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
798	}
799
800	/*
801	* Optimize RDTSC traps.
802	* Some guests (like Solaris) are using RDTSC all over the place and
803	* will end up trapping a lot because of that.
804	*/
805	if ( !pRegFrame->eflags.Bits.u1VM
806	&& ((uint8_t *)PC)[0] == 0x0f
807	&& ((uint8_t *)PC)[1] == 0x31)
808	{
809	STAM_PROFILE_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
810	return trpmGCTrap0dHandlerRdTsc(pVM, pRegFrame);
811	}
812
813	/*
814	* Disassemble the instruction.
815	*/
816	DISCPUSTATE Cpu;
817	uint32_t cbOp;
818	rc = DISCoreOneEx((RTGCUINTPTR)PC, cBits == 32 ? CPUMODE_32BIT : cBits == 16 ? CPUMODE_16BIT : CPUMODE_64BIT,
819	NULL, NULL, &Cpu, &cbOp);
820	if (RT_FAILURE(rc))
821	{
822	AssertMsgFailed(("DISCoreOneEx failed to PC=%RGv rc=%Rrc\n", PC, rc));
823	STAM_PROFILE_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
824	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
825	}
826	STAM_PROFILE_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
827
828	/*
829	* Deal with I/O port access.
830	*/
831	if ( pVM->trpm.s.uActiveErrorCode == 0
832	&& (Cpu.pCurInstr->optype & OPTYPE_PORTIO))
833	{
834	rc = EMInterpretPortIO(pVM, pRegFrame, &Cpu, cbOp);
835	return trpmGCExitTrap(pVM, rc, pRegFrame);
836	}
837
838	/*
839	* Deal with Ring-0 (privileged instructions)
840	*/
841	if ( (pRegFrame->ss & X86_SEL_RPL) <= 1
842	&& !pRegFrame->eflags.Bits.u1VM)
843	return trpmGCTrap0dHandlerRing0(pVM, pRegFrame, &Cpu, PC);
844
845	/*
846	* Deal with Ring-3 GPs.
847	*/
848	if (!pRegFrame->eflags.Bits.u1VM)
849	return trpmGCTrap0dHandlerRing3(pVM, pRegFrame, &Cpu, PC);
850
851	/*
852	* Deal with v86 code.
853	*
854	* We always set IOPL to zero which makes e.g. pushf fault in V86
855	* mode. The guest might use IOPL=3 and therefore not expect a #GP.
856	* Simply fall back to the recompiler to emulate this instruction if
857	* that's the case. To get the correct we must use CPUMRawGetEFlags.
858	*/
859	X86EFLAGS eflags;
860	eflags.u32 = CPUMRawGetEFlags(pVM, pRegFrame); /* Get the correct value. */
861	Log3(("TRPM #GP V86: cs:eip=%04x:%08x IOPL=%d efl=%08x\n", pRegFrame->cs, pRegFrame->eip, eflags.Bits.u2IOPL, eflags.u));
862	if (eflags.Bits.u2IOPL != 3)
863	{
864	Assert(eflags.Bits.u2IOPL == 0);
865
866	int rc = TRPMForwardTrap(pVM, pRegFrame, 0xD, 0, TRPM_TRAP_HAS_ERRORCODE, TRPM_TRAP, 0xd);
867	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
868	return trpmGCExitTrap(pVM, rc, pRegFrame);
869	}
870	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
871	}
872
873
874	/**
875	* \#GP (General Protection Fault) handler.
876	*
877	* @returns VBox status code.
878	* VINF_SUCCESS means we completely handled this trap,
879	* other codes are passed execution to host context.
880	*
881	* @param pTrpm Pointer to TRPM data (within VM).
882	* @param pRegFrame Pointer to the register frame for the trap.
883	* @internal
884	*/
885	DECLASM(int) TRPMGCTrap0dHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
886	{
887	LogFlow(("TRPMGCTrap0dHandler: eip=%08RX32\n", pRegFrame->eip));
888	PVM pVM = TRPM2VM(pTrpm);
889
890	int rc = trpmGCTrap0dHandler(pVM, pTrpm, pRegFrame);
891	switch (rc)
892	{
893	case VINF_EM_RAW_GUEST_TRAP:
894	case VINF_EM_RAW_EXCEPTION_PRIVILEGED:
895	if (PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip))
896	rc = VINF_PATM_PATCH_TRAP_GP;
897	break;
898
899	case VINF_EM_RAW_INTERRUPT_PENDING:
900	Assert(TRPMHasTrap(pVM));
901	/* no break; */
902	case VINF_PGM_SYNC_CR3: /** @todo Check this with Sander. */
903	case VINF_EM_RAW_EMULATE_INSTR:
904	case VINF_IOM_HC_IOPORT_READ:
905	case VINF_IOM_HC_IOPORT_WRITE:
906	case VINF_IOM_HC_MMIO_WRITE:
907	case VINF_IOM_HC_MMIO_READ:
908	case VINF_IOM_HC_MMIO_READ_WRITE:
909	case VINF_PATM_PATCH_INT3:
910	case VINF_EM_NO_MEMORY:
911	case VINF_EM_RAW_TO_R3:
912	case VINF_EM_RAW_TIMER_PENDING:
913	case VINF_EM_PENDING_REQUEST:
914	case VINF_EM_HALT:
915	case VINF_SUCCESS:
916	break;
917
918	default:
919	AssertMsg(PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip) == false, ("return code %d\n", rc));
920	break;
921	}
922	return rc;
923	}
924
925
926	/**
927	* \#PF (Page Fault) handler.
928	*
929	* Calls PGM which does the actual handling.
930	*
931	*
932	* @returns VBox status code.
933	* VINF_SUCCESS means we completely handled this trap,
934	* other codes are passed execution to host context.
935	*
936	* @param pTrpm Pointer to TRPM data (within VM).
937	* @param pRegFrame Pointer to the register frame for the trap.
938	* @internal
939	*/
940	DECLASM(int) TRPMGCTrap0eHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
941	{
942	LogBird(("TRPMGCTrap0eHandler: eip=%08RX32\n", pRegFrame->eip));
943	PVM pVM = TRPM2VM(pTrpm);
944
945	/*
946	* This is all PGM stuff.
947	*/
948	int rc = PGMTrap0eHandler(pVM, pTrpm->uActiveErrorCode, pRegFrame, (RTGCPTR)pTrpm->uActiveCR2);
949
950	switch (rc)
951	{
952	case VINF_EM_RAW_EMULATE_INSTR:
953	case VINF_EM_RAW_EMULATE_INSTR_PD_FAULT:
954	case VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT:
955	case VINF_EM_RAW_EMULATE_INSTR_TSS_FAULT:
956	case VINF_EM_RAW_EMULATE_INSTR_LDT_FAULT:
957	case VINF_EM_RAW_EMULATE_INSTR_IDT_FAULT:
958	if (PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip))
959	rc = VINF_PATCH_EMULATE_INSTR;
960	break;
961
962	case VINF_EM_RAW_GUEST_TRAP:
963	if (PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip))
964	return VINF_PATM_PATCH_TRAP_PF;
965
966	rc = TRPMForwardTrap(pVM, pRegFrame, 0xE, 0, TRPM_TRAP_HAS_ERRORCODE, TRPM_TRAP, 0xe);
967	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
968	break;
969
970	case VINF_EM_RAW_INTERRUPT_PENDING:
971	Assert(TRPMHasTrap(pVM));
972	/* no break; */
973	case VINF_IOM_HC_MMIO_READ:
974	case VINF_IOM_HC_MMIO_WRITE:
975	case VINF_IOM_HC_MMIO_READ_WRITE:
976	case VINF_PATM_HC_MMIO_PATCH_READ:
977	case VINF_PATM_HC_MMIO_PATCH_WRITE:
978	case VINF_SUCCESS:
979	case VINF_EM_RAW_TO_R3:
980	case VINF_EM_PENDING_REQUEST:
981	case VINF_EM_RAW_TIMER_PENDING:
982	case VINF_EM_NO_MEMORY:
983	case VINF_CSAM_PENDING_ACTION:
984	case VINF_PGM_SYNC_CR3: /** @todo Check this with Sander. */
985	break;
986
987	default:
988	AssertMsg(PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip) == false, ("Patch address for return code %d. eip=%08x\n", rc, pRegFrame->eip));
989	break;
990	}
991	return trpmGCExitTrap(pVM, rc, pRegFrame);
992	}
993
994
995	/**
996	* Scans for the EIP in the specified array of trap handlers.
997	*
998	* If we don't fine the EIP, we'll panic.
999	*
1000	* @returns VBox status code.
1001	*
1002	* @param pVM The VM handle.
1003	* @param pRegFrame Pointer to the register frame for the trap.
1004	* @param paHandlers The array of trap handler records.
1005	* @param pEndRecord The end record (exclusive).
1006	*/
1007	static int trpmGCHyperGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, PCTRPMGCHYPER paHandlers, PCTRPMGCHYPER pEndRecord)
1008	{
1009	uintptr_t uEip = (uintptr_t)pRegFrame->eip;
1010	Assert(paHandlers <= pEndRecord);
1011
1012	Log(("trpmGCHyperGeneric: uEip=%x %p-%p\n", uEip, paHandlers, pEndRecord));
1013
1014	#if 0 /// @todo later
1015	/*
1016	* Start by doing a kind of binary search.
1017	*/
1018	unsigned iStart = 0;
1019	unsigned iEnd = pEndRecord - paHandlers;
1020	unsigned i = iEnd / 2;
1021	#endif
1022
1023	/*
1024	* Do a linear search now (in case the array wasn't properly sorted).
1025	*/
1026	for (PCTRPMGCHYPER pCur = paHandlers; pCur < pEndRecord; pCur++)
1027	{
1028	if ( pCur->uStartEIP <= uEip
1029	&& (pCur->uEndEIP ? pCur->uEndEIP > uEip : pCur->uStartEIP == uEip))
1030	return pCur->pfnHandler(pVM, pRegFrame, pCur->uUser);
1031	}
1032
1033	return VERR_TRPM_DONT_PANIC;
1034	}
1035
1036
1037	/**
1038	* Hypervisor \#NP ((segment) Not Present) handler.
1039	*
1040	* Scans for the EIP in the registered trap handlers.
1041	*
1042	* @returns VBox status code.
1043	* VINF_SUCCESS means we completely handled this trap,
1044	* other codes are passed back to host context.
1045	*
1046	* @param pTrpm Pointer to TRPM data (within VM).
1047	* @param pRegFrame Pointer to the register frame for the trap.
1048	* @internal
1049	*/
1050	DECLASM(int) TRPMGCHyperTrap0bHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
1051	{
1052	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0bHandlers, g_aTrap0bHandlersEnd);
1053	}
1054
1055
1056	/**
1057	* Hypervisor \#GP (General Protection Fault) handler.
1058	*
1059	* Scans for the EIP in the registered trap handlers.
1060	*
1061	* @returns VBox status code.
1062	* VINF_SUCCESS means we completely handled this trap,
1063	* other codes are passed back to host context.
1064	*
1065	* @param pTrpm Pointer to TRPM data (within VM).
1066	* @param pRegFrame Pointer to the register frame for the trap.
1067	* @internal
1068	*/
1069	DECLASM(int) TRPMGCHyperTrap0dHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
1070	{
1071	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
1072	}
1073
1074
1075	/**
1076	* Hypervisor \#PF (Page Fault) handler.
1077	*
1078	* Scans for the EIP in the registered trap handlers.
1079	*
1080	* @returns VBox status code.
1081	* VINF_SUCCESS means we completely handled this trap,
1082	* other codes are passed back to host context.
1083	*
1084	* @param pTrpm Pointer to TRPM data (within VM).
1085	* @param pRegFrame Pointer to the register frame for the trap.
1086	* @internal
1087	*/
1088	DECLASM(int) TRPMGCHyperTrap0eHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
1089	{
1090	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
1091	}
1092
1093
1094	/**
1095	* Deal with hypervisor traps occuring when resuming execution on a trap.
1096	*
1097	* @returns VBox status code.
1098	* @param pVM The VM handle.
1099	* @param pRegFrame Register frame.
1100	* @param uUser User arg.
1101	*/
1102	DECLCALLBACK(int) trpmGCTrapInGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser)
1103	{
1104	Log(("********************************************************\n"));
1105	Log(("trpmGCTrapInGeneric: eip=%RX32 uUser=%#x\n", pRegFrame->eip, uUser));
1106	Log(("********************************************************\n"));
1107
1108	if (uUser & TRPM_TRAP_IN_HYPER)
1109	{
1110	/*
1111	* Check that there is still some stack left, if not we'll flag
1112	* a guru meditation (the alternative is a triple fault).
1113	*/
1114	RTRCUINTPTR cbStackUsed = (RTRCUINTPTR)VMMGetStackRC(pVM) - pRegFrame->esp;
1115	if (cbStackUsed > VMM_STACK_SIZE - _1K)
1116	{
1117	LogRel(("trpmGCTrapInGeneric: ran out of stack: esp=#x cbStackUsed=%#x\n", pRegFrame->esp, cbStackUsed));
1118	return VERR_TRPM_DONT_PANIC;
1119	}
1120
1121	/*
1122	* Just zero the register containing the selector in question.
1123	* We'll deal with the actual stale or troublesome selector value in
1124	* the outermost trap frame.
1125	*/
1126	switch (uUser & TRPM_TRAP_IN_OP_MASK)
1127	{
1128	case TRPM_TRAP_IN_MOV_GS:
1129	pRegFrame->eax = 0;
1130	pRegFrame->gs = 0; /* prevent recursive trouble. */
1131	break;
1132	case TRPM_TRAP_IN_MOV_FS:
1133	pRegFrame->eax = 0;
1134	pRegFrame->fs = 0; /* prevent recursive trouble. */
1135	return VINF_SUCCESS;
1136
1137	default:
1138	AssertMsgFailed(("Invalid uUser=%#x\n", uUser));
1139	return VERR_INTERNAL_ERROR;
1140	}
1141	}
1142	else
1143	{
1144	/*
1145	* Reconstruct the guest context and switch to the recompiler.
1146	* We ASSUME we're only at
1147	*/
1148	CPUMCTXCORE CtxCore = *pRegFrame;
1149	uint32_t pEsp = (uint32_t )pRegFrame->esp;
1150	int rc;
1151
1152	switch (uUser)
1153	{
1154	/*
1155	* This will only occur when resuming guest code in a trap handler!
1156	*/
1157	/* @note ASSUMES esp points to the temporary guest CPUMCTXCORE!!! */
1158	case TRPM_TRAP_IN_MOV_GS:
1159	case TRPM_TRAP_IN_MOV_FS:
1160	case TRPM_TRAP_IN_MOV_ES:
1161	case TRPM_TRAP_IN_MOV_DS:
1162	{
1163	PCPUMCTXCORE pTempGuestCtx = (PCPUMCTXCORE)pEsp;
1164
1165	/* Just copy the whole thing; several selector registers, eip (etc) and eax are not yet in pRegFrame. */
1166	CtxCore = *pTempGuestCtx;
1167	rc = VINF_EM_RAW_STALE_SELECTOR;
1168	break;
1169	}
1170
1171	/*
1172	* This will only occur when resuming guest code!
1173	*/
1174	case TRPM_TRAP_IN_IRET:
1175	CtxCore.eip = *pEsp++;
1176	CtxCore.cs = (RTSEL)*pEsp++;
1177	CtxCore.eflags.u32 = *pEsp++;
1178	CtxCore.esp = *pEsp++;
1179	CtxCore.ss = (RTSEL)*pEsp++;
1180	rc = VINF_EM_RAW_IRET_TRAP;
1181	break;
1182
1183	/*
1184	* This will only occur when resuming V86 guest code!
1185	*/
1186	case TRPM_TRAP_IN_IRET \| TRPM_TRAP_IN_V86:
1187	CtxCore.eip = *pEsp++;
1188	CtxCore.cs = (RTSEL)*pEsp++;
1189	CtxCore.eflags.u32 = *pEsp++;
1190	CtxCore.esp = *pEsp++;
1191	CtxCore.ss = (RTSEL)*pEsp++;
1192	CtxCore.es = (RTSEL)*pEsp++;
1193	CtxCore.ds = (RTSEL)*pEsp++;
1194	CtxCore.fs = (RTSEL)*pEsp++;
1195	CtxCore.gs = (RTSEL)*pEsp++;
1196	rc = VINF_EM_RAW_IRET_TRAP;
1197	break;
1198
1199	default:
1200	AssertMsgFailed(("Invalid uUser=%#x\n", uUser));
1201	return VERR_INTERNAL_ERROR;
1202	}
1203
1204
1205	CPUMSetGuestCtxCore(pVM, &CtxCore);
1206	TRPMGCHyperReturnToHost(pVM, rc);
1207	}
1208
1209	AssertMsgFailed(("Impossible!\n"));
1210	return VERR_INTERNAL_ERROR;
1211	}
1212

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source: vbox/trunk/src/VBox/VMM/VMMGC/TRPMGCHandlers.cpp@ 18710

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