TRPMGCHandlers.cpp@ 18770

Last change on this file since 18770 was 18770, checked in by vboxsync, 16 years ago
Fake rdpmc instead of causing an invalid opcode exception.
Property svn:eol-style set to `native` Property svn:keywords set to `Id`
File size: 44.3 KB

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1	/* $Id: TRPMGCHandlers.cpp 18770 2009-04-06 15:00:15Z vboxsync $ */
2	/** @file
3	* TRPM - Guest Context Trap Handlers, CPP part
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22
23	/*******************************************************************************
24	* Header Files *
25	*******************************************************************************/
26	#define LOG_GROUP LOG_GROUP_TRPM
27	#include <VBox/selm.h>
28	#include <VBox/iom.h>
29	#include <VBox/pgm.h>
30	#include <VBox/pdm.h>
31	#include <VBox/dbgf.h>
32	#include <VBox/em.h>
33	#include <VBox/csam.h>
34	#include <VBox/patm.h>
35	#include <VBox/mm.h>
36	#include <VBox/cpum.h>
37	#include "TRPMInternal.h"
38	#include <VBox/vm.h>
39	#include <VBox/param.h>
40
41	#include <VBox/err.h>
42	#include <VBox/dis.h>
43	#include <VBox/disopcode.h>
44	#include <VBox/x86.h>
45	#include <VBox/log.h>
46	#include <VBox/tm.h>
47	#include <iprt/asm.h>
48	#include <iprt/assert.h>
49
50	/*******************************************************************************
51	* Defined Constants And Macros *
52	*******************************************************************************/
53	/* still here. MODR/M byte parsing */
54	#define X86_OPCODE_MODRM_MOD_MASK 0xc0
55	#define X86_OPCODE_MODRM_REG_MASK 0x38
56	#define X86_OPCODE_MODRM_RM_MASK 0x07
57
58	/** @todo fix/remove/permanent-enable this when DIS/PATM handles invalid lock sequences. */
59	#define DTRACE_EXPERIMENT
60
61
62	/*******************************************************************************
63	* Structures and Typedefs *
64	*******************************************************************************/
65	/** Pointer to a readonly hypervisor trap record. */
66	typedef const struct TRPMGCHYPER *PCTRPMGCHYPER;
67
68	/**
69	* A hypervisor trap record.
70	* This contains information about a handler for a instruction range.
71	*
72	* @remark This must match what TRPM_HANDLER outputs.
73	*/
74	typedef struct TRPMGCHYPER
75	{
76	/** The start address. */
77	uintptr_t uStartEIP;
78	/** The end address. (exclusive)
79	* If NULL the it's only for the instruction at pvStartEIP. */
80	uintptr_t uEndEIP;
81	/**
82	* The handler.
83	*
84	* @returns VBox status code
85	* VINF_SUCCESS means we've handled the trap.
86	* Any other error code means returning to the host context.
87	* @param pVM The VM handle.
88	* @param pRegFrame The register frame.
89	* @param uUser The user argument.
90	*/
91	DECLRCCALLBACKMEMBER(int, pfnHandler, (PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser));
92	/** Whatever the handler desires to put here. */
93	uintptr_t uUser;
94	} TRPMGCHYPER;
95
96
97	/*******************************************************************************
98	* Global Variables *
99	*******************************************************************************/
100	__BEGIN_DECLS
101	/** Defined in VMMGC0.asm or VMMGC99.asm.
102	* @{ */
103	extern const TRPMGCHYPER g_aTrap0bHandlers[1];
104	extern const TRPMGCHYPER g_aTrap0bHandlersEnd[1];
105	extern const TRPMGCHYPER g_aTrap0dHandlers[1];
106	extern const TRPMGCHYPER g_aTrap0dHandlersEnd[1];
107	extern const TRPMGCHYPER g_aTrap0eHandlers[1];
108	extern const TRPMGCHYPER g_aTrap0eHandlersEnd[1];
109	/** @} */
110	__END_DECLS
111
112
113	/*******************************************************************************
114	* Internal Functions *
115	*******************************************************************************/
116	__BEGIN_DECLS /* addressed from asm (not called so no DECLASM). */
117	DECLCALLBACK(int) trpmGCTrapInGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser);
118	__END_DECLS
119
120
121
122	/**
123	* Exits the trap, called when exiting a trap handler.
124	*
125	* Will reset the trap if it's not a guest trap or the trap
126	* is already handled. Will process resume guest FFs.
127	*
128	* @returns rc, can be adjusted if its VINF_SUCCESS or something really bad
129	* happened.
130	* @param pVM VM handle.
131	* @param rc The VBox status code to return.
132	* @param pRegFrame Pointer to the register frame for the trap.
133	*/
134	static int trpmGCExitTrap(PVM pVM, int rc, PCPUMCTXCORE pRegFrame)
135	{
136	uint32_t uOldActiveVector = pVM->trpm.s.uActiveVector;
137	NOREF(uOldActiveVector);
138
139	/* Reset trap? */
140	if ( rc != VINF_EM_RAW_GUEST_TRAP
141	&& rc != VINF_EM_RAW_RING_SWITCH_INT)
142	pVM->trpm.s.uActiveVector = ~0;
143
144	#ifdef VBOX_HIGH_RES_TIMERS_HACK
145	/*
146	* We should poll the timers occationally.
147	* We must NOT do this too frequently as it adds a significant overhead
148	* and it'll kill us if the trap load is high. (See #1354.)
149	* (The heuristic is not very intelligent, we should really check trap
150	* frequency etc. here, but alas, we lack any such information atm.)
151	*/
152	static unsigned s_iTimerPoll = 0;
153	if (rc == VINF_SUCCESS)
154	{
155	if (!(++s_iTimerPoll & 0xf))
156	{
157	uint64_t cTicks = TMTimerPoll(pVM); NOREF(cTicks);
158	Log2(("TMTimerPoll at %08RX32 returned %RX64 (VM_FF_TIMER=%d)\n", pRegFrame->eip, cTicks, VM_FF_ISPENDING(pVM, VM_FF_TIMER)));
159	}
160	}
161	else
162	s_iTimerPoll = 0;
163	#endif
164
165	/* Clear pending inhibit interrupt state if required. (necessary for dispatching interrupts later on) */
166	if (VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS))
167	{
168	Log2(("VM_FF_INHIBIT_INTERRUPTS at %08RX32 successor %RGv\n", pRegFrame->eip, EMGetInhibitInterruptsPC(pVM)));
169	if (pRegFrame->eip != EMGetInhibitInterruptsPC(pVM))
170	{
171	/** @note we intentionally don't clear VM_FF_INHIBIT_INTERRUPTS here if the eip is the same as the inhibited instr address.
172	* Before we are able to execute this instruction in raw mode (iret to guest code) an external interrupt might
173	* force a world switch again. Possibly allowing a guest interrupt to be dispatched in the process. This could
174	* break the guest. Sounds very unlikely, but such timing sensitive problem are not as rare as you might think.
175	*/
176	VM_FF_CLEAR(pVM, VM_FF_INHIBIT_INTERRUPTS);
177	}
178	}
179
180	/*
181	* Pending resume-guest-FF?
182	* Or pending (A)PIC interrupt? Windows XP will crash if we delay APIC interrupts.
183	*/
184	if ( rc == VINF_SUCCESS
185	&& VM_FF_ISPENDING(pVM, VM_FF_TO_R3 \| VM_FF_TIMER \| VM_FF_INTERRUPT_APIC \| VM_FF_INTERRUPT_PIC \| VM_FF_REQUEST
186	\| VM_FF_PGM_SYNC_CR3 \| VM_FF_PGM_SYNC_CR3_NON_GLOBAL \| VM_FF_PGM_NO_MEMORY))
187	{
188	/* The out of memory condition naturally outrang the others. */
189	if (RT_UNLIKELY(VM_FF_ISPENDING(pVM, VM_FF_PGM_NO_MEMORY)))
190	rc = VINF_EM_NO_MEMORY;
191	/* Pending Ring-3 action. */
192	else if (VM_FF_ISPENDING(pVM, VM_FF_TO_R3))
193	{
194	VM_FF_CLEAR(pVM, VM_FF_TO_R3);
195	rc = VINF_EM_RAW_TO_R3;
196	}
197	/* Pending timer action. */
198	else if (VM_FF_ISPENDING(pVM, VM_FF_TIMER))
199	rc = VINF_EM_RAW_TIMER_PENDING;
200	/* Pending interrupt: dispatch it. */
201	else if ( VM_FF_ISPENDING(pVM, VM_FF_INTERRUPT_APIC \| VM_FF_INTERRUPT_PIC)
202	&& !VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS)
203	&& PATMAreInterruptsEnabledByCtxCore(pVM, pRegFrame)
204	)
205	{
206	uint8_t u8Interrupt;
207	rc = PDMGetInterrupt(pVM, &u8Interrupt);
208	Log(("trpmGCExitTrap: u8Interrupt=%d (%#x) rc=%Rrc\n", u8Interrupt, u8Interrupt, rc));
209	AssertFatalMsgRC(rc, ("PDMGetInterrupt failed with %Rrc\n", rc));
210	rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)u8Interrupt, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_HARDWARE_INT, uOldActiveVector);
211	/* can't return if successful */
212	Assert(rc != VINF_SUCCESS);
213
214	/* Stop the profile counter that was started in TRPMGCHandlersA.asm */
215	Assert(uOldActiveVector <= 16);
216	STAM_PROFILE_ADV_STOP(&pVM->trpm.s.aStatGCTraps[uOldActiveVector], a);
217
218	/* Assert the trap and go to the recompiler to dispatch it. */
219	TRPMAssertTrap(pVM, u8Interrupt, TRPM_HARDWARE_INT);
220
221	STAM_PROFILE_ADV_START(&pVM->trpm.s.aStatGCTraps[uOldActiveVector], a);
222	rc = VINF_EM_RAW_INTERRUPT_PENDING;
223	}
224	/*
225	* Try sync CR3?
226	*/
227	else if (VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 \| VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
228	#if 1
229	rc = PGMSyncCR3(pVM, CPUMGetGuestCR0(pVM), CPUMGetGuestCR3(pVM), CPUMGetGuestCR4(pVM), VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3));
230	#else
231	rc = VINF_PGM_SYNC_CR3;
232	#endif
233	/* Pending request packets might contain actions that need immediate attention, such as pending hardware interrupts. */
234	else if (VM_FF_ISPENDING(pVM, VM_FF_REQUEST))
235	rc = VINF_EM_PENDING_REQUEST;
236	}
237
238	AssertMsg( rc != VINF_SUCCESS
239	\|\| ( pRegFrame->eflags.Bits.u1IF
240	&& ( pRegFrame->eflags.Bits.u2IOPL < (unsigned)(pRegFrame->ss & X86_SEL_RPL) \|\| pRegFrame->eflags.Bits.u1VM))
241	, ("rc=%Rrc\neflags=%RX32 ss=%RTsel IOPL=%d\n", rc, pRegFrame->eflags.u32, pRegFrame->ss, pRegFrame->eflags.Bits.u2IOPL));
242	return rc;
243	}
244
245
246	/**
247	* \#DB (Debug event) handler.
248	*
249	* @returns VBox status code.
250	* VINF_SUCCESS means we completely handled this trap,
251	* other codes are passed execution to host context.
252	*
253	* @param pTrpm Pointer to TRPM data (within VM).
254	* @param pRegFrame Pointer to the register frame for the trap.
255	* @internal
256	*/
257	DECLASM(int) TRPMGCTrap01Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
258	{
259	RTGCUINTREG uDr6 = ASMGetAndClearDR6();
260	PVM pVM = TRPM2VM(pTrpm);
261	LogFlow(("TRPMGC01: cs:eip=%04x:%08x uDr6=%RTreg\n", pRegFrame->cs, pRegFrame->eip, uDr6));
262
263	/*
264	* We currently don't make sure of the X86_DR7_GD bit, but
265	* there might come a time when we do.
266	*/
267	if ((uDr6 & X86_DR6_BD) == X86_DR6_BD)
268	{
269	AssertReleaseMsgFailed(("X86_DR6_BD isn't used, but it's set! dr7=%RTreg(%RTreg) dr6=%RTreg\n",
270	ASMGetDR7(), CPUMGetHyperDR7(pVM), uDr6));
271	return VERR_NOT_IMPLEMENTED;
272	}
273
274	AssertReleaseMsg(!(uDr6 & X86_DR6_BT), ("X86_DR6_BT is impossible!\n"));
275
276	/*
277	* Now leave the rest to the DBGF.
278	*/
279	int rc = DBGFGCTrap01Handler(pVM, pRegFrame, uDr6);
280	if (rc == VINF_EM_RAW_GUEST_TRAP)
281	CPUMSetGuestDR6(pVM, uDr6);
282
283	rc = trpmGCExitTrap(pVM, rc, pRegFrame);
284	Log6(("TRPMGC01: %Rrc (%04x:%08x %RTreg)\n", rc, pRegFrame->cs, pRegFrame->eip, uDr6));
285	return rc;
286	}
287
288
289	/**
290	* NMI handler, for when we are using NMIs to debug things.
291	*
292	* @returns VBox status code.
293	* VINF_SUCCESS means we completely handled this trap,
294	* other codes are passed execution to host context.
295	*
296	* @param pTrpm Pointer to TRPM data (within VM).
297	* @param pRegFrame Pointer to the register frame for the trap.
298	* @internal
299	* @remark This is not hooked up unless you're building with VBOX_WITH_NMI defined.
300	*/
301	DECLASM(int) TRPMGCTrap02Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
302	{
303	LogFlow(("TRPMGCTrap02Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
304	RTLogComPrintf("TRPMGCTrap02Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip);
305	return VERR_TRPM_DONT_PANIC;
306	}
307
308
309	/**
310	* \#BP (Breakpoint) handler.
311	*
312	* @returns VBox status code.
313	* VINF_SUCCESS means we completely handled this trap,
314	* other codes are passed execution to host context.
315	*
316	* @param pTrpm Pointer to TRPM data (within VM).
317	* @param pRegFrame Pointer to the register frame for the trap.
318	* @internal
319	*/
320	DECLASM(int) TRPMGCTrap03Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
321	{
322	LogFlow(("TRPMGC03: %04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
323	PVM pVM = TRPM2VM(pTrpm);
324	int rc;
325
326	/*
327	* Both PATM are using INT3s, let them have a go first.
328	*/
329	if ( (pRegFrame->ss & X86_SEL_RPL) == 1
330	&& !pRegFrame->eflags.Bits.u1VM)
331	{
332	rc = PATMHandleInt3PatchTrap(pVM, pRegFrame);
333	if (rc == VINF_SUCCESS \|\| rc == VINF_EM_RAW_EMULATE_INSTR \|\| rc == VINF_PATM_PATCH_INT3 \|\| rc == VINF_PATM_DUPLICATE_FUNCTION)
334	{
335	rc = trpmGCExitTrap(pVM, rc, pRegFrame);
336	Log6(("TRPMGC03: %Rrc (%04x:%08x) (PATM)\n", rc, pRegFrame->cs, pRegFrame->eip));
337	return rc;
338	}
339	}
340	rc = DBGFGCTrap03Handler(pVM, pRegFrame);
341
342	/* anything we should do with this? Schedule it in GC? */
343	rc = trpmGCExitTrap(pVM, rc, pRegFrame);
344	Log6(("TRPMGC03: %Rrc (%04x:%08x)\n", rc, pRegFrame->cs, pRegFrame->eip));
345	return rc;
346	}
347
348
349	/**
350	* Trap handler for illegal opcode fault (\#UD).
351	*
352	* @returns VBox status code.
353	* VINF_SUCCESS means we completely handled this trap,
354	* other codes are passed execution to host context.
355	*
356	* @param pTrpm Pointer to TRPM data (within VM).
357	* @param pRegFrame Pointer to the register frame for the trap.
358	* @internal
359	*/
360	DECLASM(int) TRPMGCTrap06Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
361	{
362	LogFlow(("TRPMGC06: %04x:%08x efl=%x\n", pRegFrame->cs, pRegFrame->eip, pRegFrame->eflags.u32));
363	PVM pVM = TRPM2VM(pTrpm);
364	int rc;
365
366	if (CPUMGetGuestCPL(pVM, pRegFrame) == 0)
367	{
368	/*
369	* Decode the instruction.
370	*/
371	RTGCPTR PC;
372	rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &PC);
373	if (RT_FAILURE(rc))
374	{
375	Log(("TRPMGCTrap06Handler: Failed to convert %RTsel:%RX32 (cpl=%d) - rc=%Rrc !!\n", pRegFrame->cs, pRegFrame->eip, pRegFrame->ss & X86_SEL_RPL, rc));
376	rc = trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
377	Log6(("TRPMGC06: %Rrc (%04x:%08x) (SELM)\n", rc, pRegFrame->cs, pRegFrame->eip));
378	return rc;
379	}
380
381	DISCPUSTATE Cpu;
382	uint32_t cbOp;
383	rc = EMInterpretDisasOneEx(pVM, (RTGCUINTPTR)PC, pRegFrame, &Cpu, &cbOp);
384	if (RT_FAILURE(rc))
385	{
386	rc = trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
387	Log6(("TRPMGC06: %Rrc (%04x:%08x) (EM)\n", rc, pRegFrame->cs, pRegFrame->eip));
388	return rc;
389	}
390
391	/*
392	* UD2 in a patch?
393	*/
394	if ( Cpu.pCurInstr->opcode == OP_ILLUD2
395	&& PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip))
396	{
397	rc = PATMGCHandleIllegalInstrTrap(pVM, pRegFrame);
398	/** @todo These tests are completely unnecessary, should just follow the
399	* flow and return at the end of the function. */
400	if ( rc == VINF_SUCCESS
401	\|\| rc == VINF_EM_RAW_EMULATE_INSTR
402	\|\| rc == VINF_PATM_DUPLICATE_FUNCTION
403	\|\| rc == VINF_PATM_PENDING_IRQ_AFTER_IRET
404	\|\| rc == VINF_EM_RESCHEDULE)
405	{
406	rc = trpmGCExitTrap(pVM, rc, pRegFrame);
407	Log6(("TRPMGC06: %Rrc (%04x:%08x) (PATM)\n", rc, pRegFrame->cs, pRegFrame->eip));
408	return rc;
409	}
410	}
411	/*
412	* Speed up dtrace and don't entrust invalid lock sequences to the recompiler.
413	*/
414	else if (Cpu.prefix & PREFIX_LOCK)
415	{
416	Log(("TRPMGCTrap06Handler: pc=%08x op=%d\n", pRegFrame->eip, Cpu.pCurInstr->opcode));
417	#ifdef DTRACE_EXPERIMENT /** @todo fix/remove/permanent-enable this when DIS/PATM handles invalid lock sequences. */
418	Assert(!PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip));
419	rc = TRPMForwardTrap(pVM, pRegFrame, 0x6, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_TRAP, 0x6);
420	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
421	#else
422	rc = VINF_EM_RAW_EMULATE_INSTR;
423	#endif
424	}
425	/*
426	* Handle MONITOR - it causes an #UD exception instead of #GP when not executed in ring 0.
427	*/
428	else if (Cpu.pCurInstr->opcode == OP_MONITOR)
429	{
430	uint32_t cbIgnored;
431	rc = EMInterpretInstructionCPU(pVM, &Cpu, pRegFrame, PC, &cbIgnored);
432	if (RT_LIKELY(RT_SUCCESS(rc)))
433	pRegFrame->eip += Cpu.opsize;
434	}
435	/* Never generate a raw trap here; it might be an instruction, that requires emulation. */
436	else
437	rc = VINF_EM_RAW_EMULATE_INSTR;
438	}
439	else
440	{
441	rc = TRPMForwardTrap(pVM, pRegFrame, 0x6, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_TRAP, 0x6);
442	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
443	}
444
445	rc = trpmGCExitTrap(pVM, rc, pRegFrame);
446	Log6(("TRPMGC06: %Rrc (%04x:%08x)\n", rc, pRegFrame->cs, pRegFrame->eip));
447	return rc;
448	}
449
450
451	/**
452	* Trap handler for device not present fault (\#NM).
453	*
454	* Device not available, FP or (F)WAIT instruction.
455	*
456	* @returns VBox status code.
457	* VINF_SUCCESS means we completely handled this trap,
458	* other codes are passed execution to host context.
459	*
460	* @param pTrpm Pointer to TRPM data (within VM).
461	* @param pRegFrame Pointer to the register frame for the trap.
462	* @internal
463	*/
464	DECLASM(int) TRPMGCTrap07Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
465	{
466	LogFlow(("TRPMGC07: %04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
467	PVM pVM = TRPM2VM(pTrpm);
468
469	int rc = CPUMHandleLazyFPU(pVM, VMMGetCpu(pVM));
470	Log6(("TRPMGC07: %Rrc (%04x:%08x)\n", rc, pRegFrame->cs, pRegFrame->eip));
471	return rc; /** @todo call trpmGCExitTrap! (after 2.2.0) */
472	}
473
474
475	/**
476	* \#NP ((segment) Not Present) handler.
477	*
478	* @returns VBox status code.
479	* VINF_SUCCESS means we completely handled this trap,
480	* other codes are passed execution to host context.
481	*
482	* @param pTrpm Pointer to TRPM data (within VM).
483	* @param pRegFrame Pointer to the register frame for the trap.
484	* @internal
485	*/
486	DECLASM(int) TRPMGCTrap0bHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
487	{
488	LogFlow(("TRPMGC0b: %04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
489	PVM pVM = TRPM2VM(pTrpm);
490
491	/*
492	* Try to detect instruction by opcode which caused trap.
493	* XXX note: this code may cause \#PF (trap e) or \#GP (trap d) while
494	* accessing user code. need to handle it somehow in future!
495	*/
496	RTGCPTR GCPtr;
497	if (SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &GCPtr) == VINF_SUCCESS)
498	{
499	uint8_t pu8Code = (uint8_t )(uintptr_t)GCPtr;
500
501	/*
502	* First skip possible instruction prefixes, such as:
503	* OS, AS
504	* CS:, DS:, ES:, SS:, FS:, GS:
505	* REPE, REPNE
506	*
507	* note: Currently we supports only up to 4 prefixes per opcode, more
508	* prefixes (normally not used anyway) will cause trap d in guest.
509	* note: Instruction length in IA-32 may be up to 15 bytes, we dont
510	* check this issue, its too hard.
511	*/
512	for (unsigned i = 0; i < 4; i++)
513	{
514	if ( pu8Code[0] != 0xf2 /* REPNE/REPNZ */
515	&& pu8Code[0] != 0xf3 /* REP/REPE/REPZ */
516	&& pu8Code[0] != 0x2e /* CS: */
517	&& pu8Code[0] != 0x36 /* SS: */
518	&& pu8Code[0] != 0x3e /* DS: */
519	&& pu8Code[0] != 0x26 /* ES: */
520	&& pu8Code[0] != 0x64 /* FS: */
521	&& pu8Code[0] != 0x65 /* GS: */
522	&& pu8Code[0] != 0x66 /* OS */
523	&& pu8Code[0] != 0x67 /* AS */
524	)
525	break;
526	pu8Code++;
527	}
528
529	/*
530	* Detect right switch using a callgate.
531	*
532	* We recognize the following causes for the trap 0b:
533	* CALL FAR, CALL FAR []
534	* JMP FAR, JMP FAR []
535	* IRET (may cause a task switch)
536	*
537	* Note: we can't detect whether the trap was caused by a call to a
538	* callgate descriptor or it is a real trap 0b due to a bad selector.
539	* In both situations we'll pass execution to our recompiler so we don't
540	* have to worry.
541	* If we wanted to do better detection, we have set GDT entries to callgate
542	* descriptors pointing to our own handlers.
543	*/
544	/** @todo not sure about IRET, may generate Trap 0d (\#GP), NEED TO CHECK! */
545	if ( pu8Code[0] == 0x9a /* CALL FAR */
546	\|\| ( pu8Code[0] == 0xff /* CALL FAR [] */
547	&& (pu8Code[1] & X86_OPCODE_MODRM_REG_MASK) == 0x18)
548	\|\| pu8Code[0] == 0xea /* JMP FAR */
549	\|\| ( pu8Code[0] == 0xff /* JMP FAR [] */
550	&& (pu8Code[1] & X86_OPCODE_MODRM_REG_MASK) == 0x28)
551	\|\| pu8Code[0] == 0xcf /* IRET */
552	)
553	{
554	/*
555	* Got potential call to callgate.
556	* We simply return execution to the recompiler to do emulation
557	* starting from the instruction which caused the trap.
558	*/
559	pTrpm->uActiveVector = ~0;
560	Log6(("TRPMGC0b: %Rrc (%04x:%08x) (CG)\n", VINF_EM_RAW_RING_SWITCH, pRegFrame->cs, pRegFrame->eip));
561	return VINF_EM_RAW_RING_SWITCH;
562	}
563	}
564
565	/*
566	* Pass trap 0b as is to the recompiler in all other cases.
567	*/
568	Log6(("TRPMGC0b: %Rrc (%04x:%08x)\n", VINF_EM_RAW_GUEST_TRAP, pRegFrame->cs, pRegFrame->eip));
569	return VINF_EM_RAW_GUEST_TRAP;
570	}
571
572
573	/**
574	* \#GP (General Protection Fault) handler for Ring-0 privileged instructions.
575	*
576	* @returns VBox status code.
577	* VINF_SUCCESS means we completely handled this trap,
578	* other codes are passed execution to host context.
579	*
580	* @param pVM The VM handle.
581	* @param pRegFrame Pointer to the register frame for the trap.
582	* @param pCpu The opcode info.
583	* @param PC The program counter corresponding to cs:eip in pRegFrame.
584	*/
585	static int trpmGCTrap0dHandlerRing0(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, RTGCPTR PC)
586	{
587	int rc;
588
589	/*
590	* Try handle it here, if not return to HC and emulate/interpret it there.
591	*/
592	switch (pCpu->pCurInstr->opcode)
593	{
594	case OP_INT3:
595	/*
596	* Little hack to make the code below not fail
597	*/
598	pCpu->param1.flags = USE_IMMEDIATE8;
599	pCpu->param1.parval = 3;
600	/* fallthru */
601	case OP_INT:
602	{
603	Assert(pCpu->param1.flags & USE_IMMEDIATE8);
604	Assert(!(PATMIsPatchGCAddr(pVM, (RTRCPTR)PC)));
605	if (pCpu->param1.parval == 3)
606	{
607	/* Int 3 replacement patch? */
608	if (PATMHandleInt3PatchTrap(pVM, pRegFrame) == VINF_SUCCESS)
609	{
610	AssertFailed();
611	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
612	}
613	}
614	rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT, 0xd);
615	if (RT_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
616	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
617
618	pVM->trpm.s.uActiveVector = (pVM->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
619	pVM->trpm.s.enmActiveType = TRPM_SOFTWARE_INT;
620	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH_INT, pRegFrame);
621	}
622
623	#ifdef PATM_EMULATE_SYSENTER
624	case OP_SYSEXIT:
625	case OP_SYSRET:
626	rc = PATMSysCall(pVM, pRegFrame, pCpu);
627	return trpmGCExitTrap(pVM, rc, pRegFrame);
628	#endif
629
630	case OP_HLT:
631	/* If it's in patch code, defer to ring-3. */
632	if (PATMIsPatchGCAddr(pVM, (RTRCPTR)PC))
633	break;
634
635	pRegFrame->eip += pCpu->opsize;
636	return trpmGCExitTrap(pVM, VINF_EM_HALT, pRegFrame);
637
638
639	/*
640	* These instructions are used by PATM and CASM for finding
641	* dangerous non-trapping instructions. Thus, since all
642	* scanning and patching is done in ring-3 we'll have to
643	* return to ring-3 on the first encounter of these instructions.
644	*/
645	case OP_MOV_CR:
646	case OP_MOV_DR:
647	/* We can safely emulate control/debug register move instructions in patched code. */
648	if ( !PATMIsPatchGCAddr(pVM, (RTRCPTR)PC)
649	&& !CSAMIsKnownDangerousInstr(pVM, (RTRCPTR)PC))
650	break;
651	case OP_INVLPG:
652	case OP_LLDT:
653	case OP_STI:
654	case OP_RDTSC: /* just in case */
655	case OP_RDPMC:
656	case OP_CLTS:
657	case OP_WBINVD: /* nop */
658	case OP_RDMSR:
659	case OP_WRMSR:
660	{
661	uint32_t cbIgnored;
662	rc = EMInterpretInstructionCPU(pVM, pCpu, pRegFrame, PC, &cbIgnored);
663	if (RT_SUCCESS(rc))
664	pRegFrame->eip += pCpu->opsize;
665	else if (rc == VERR_EM_INTERPRETER)
666	rc = VINF_EM_RAW_EXCEPTION_PRIVILEGED;
667	return trpmGCExitTrap(pVM, rc, pRegFrame);
668	}
669	}
670
671	return trpmGCExitTrap(pVM, VINF_EM_RAW_EXCEPTION_PRIVILEGED, pRegFrame);
672	}
673
674
675	/**
676	* \#GP (General Protection Fault) handler for Ring-3.
677	*
678	* @returns VBox status code.
679	* VINF_SUCCESS means we completely handled this trap,
680	* other codes are passed execution to host context.
681	*
682	* @param pVM The VM handle.
683	* @param pRegFrame Pointer to the register frame for the trap.
684	* @param pCpu The opcode info.
685	* @param PC The program counter corresponding to cs:eip in pRegFrame.
686	*/
687	static int trpmGCTrap0dHandlerRing3(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, RTGCPTR PC)
688	{
689	int rc;
690
691	Assert(!pRegFrame->eflags.Bits.u1VM);
692
693	switch (pCpu->pCurInstr->opcode)
694	{
695	/*
696	* INT3 and INT xx are ring-switching.
697	* (The shadow IDT will have set the entries to DPL=0, that's why we're here.)
698	*/
699	case OP_INT3:
700	/*
701	* Little hack to make the code below not fail
702	*/
703	pCpu->param1.flags = USE_IMMEDIATE8;
704	pCpu->param1.parval = 3;
705	/* fall thru */
706	case OP_INT:
707	{
708	Assert(pCpu->param1.flags & USE_IMMEDIATE8);
709	rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT, 0xd);
710	if (RT_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
711	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
712
713	pVM->trpm.s.uActiveVector = (pVM->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
714	pVM->trpm.s.enmActiveType = TRPM_SOFTWARE_INT;
715	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH_INT, pRegFrame);
716	}
717
718	/*
719	* SYSCALL, SYSENTER, INTO and BOUND are also ring-switchers.
720	*/
721	case OP_SYSCALL:
722	case OP_SYSENTER:
723	#ifdef PATM_EMULATE_SYSENTER
724	rc = PATMSysCall(pVM, pRegFrame, pCpu);
725	if (rc == VINF_SUCCESS)
726	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
727	/* else no break; */
728	#endif
729	case OP_BOUND:
730	case OP_INTO:
731	pVM->trpm.s.uActiveVector = ~0;
732	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH, pRegFrame);
733
734	/*
735	* Handle virtualized TSC & PMC reads, just in case.
736	*/
737	case OP_RDTSC:
738	case OP_RDPMC:
739	{
740	uint32_t cbIgnored;
741	rc = EMInterpretInstructionCPU(pVM, pCpu, pRegFrame, PC, &cbIgnored);
742	if (RT_SUCCESS(rc))
743	pRegFrame->eip += pCpu->opsize;
744	else if (rc == VERR_EM_INTERPRETER)
745	rc = VINF_EM_RAW_EXCEPTION_PRIVILEGED;
746	return trpmGCExitTrap(pVM, rc, pRegFrame);
747	}
748
749	/*
750	* STI and CLI are I/O privileged, i.e. if IOPL
751	*/
752	case OP_STI:
753	case OP_CLI:
754	{
755	uint32_t efl = CPUMRawGetEFlags(pVM, pRegFrame);
756	if (X86_EFL_GET_IOPL(efl) >= (unsigned)(pRegFrame->ss & X86_SEL_RPL))
757	{
758	LogFlow(("trpmGCTrap0dHandlerRing3: CLI/STI -> REM\n"));
759	return trpmGCExitTrap(pVM, VINF_EM_RESCHEDULE_REM, pRegFrame);
760	}
761	LogFlow(("trpmGCTrap0dHandlerRing3: CLI/STI -> #GP(0)\n"));
762	break;
763	}
764	}
765
766	/*
767	* A genuine guest fault.
768	*/
769	return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
770	}
771
772
773	/**
774	* Emulates RDTSC for the \#GP handler.
775	*
776	* @returns VINF_SUCCESS or VINF_EM_RAW_EMULATE_INSTR.
777	*
778	* @param pVM Pointer to the shared VM structure.
779	* @param pRegFrame Pointer to the registre frame for the trap.
780	* This will be updated on successful return.
781	*/
782	DECLINLINE(int) trpmGCTrap0dHandlerRdTsc(PVM pVM, PCPUMCTXCORE pRegFrame)
783	{
784	STAM_COUNTER_INC(&pVM->trpm.s.StatTrap0dRdTsc);
785
786	if (CPUMGetGuestCR4(pVM) & X86_CR4_TSD)
787	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame); /* will trap (optimize later). */
788
789	uint64_t uTicks = TMCpuTickGet(pVM);
790	pRegFrame->eax = uTicks;
791	pRegFrame->edx = uTicks >> 32;
792	pRegFrame->eip += 2;
793	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
794	}
795
796
797	/**
798	* \#GP (General Protection Fault) handler.
799	*
800	* @returns VBox status code.
801	* VINF_SUCCESS means we completely handled this trap,
802	* other codes are passed execution to host context.
803	*
804	* @param pVM The VM handle.
805	* @param pTrpm Pointer to TRPM data (within VM).
806	* @param pRegFrame Pointer to the register frame for the trap.
807	*/
808	static int trpmGCTrap0dHandler(PVM pVM, PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
809	{
810	LogFlow(("trpmGCTrap0dHandler: cs:eip=%RTsel:%08RX32 uErr=%RGv\n", pRegFrame->ss, pRegFrame->eip, pTrpm->uActiveErrorCode));
811
812	/*
813	* Convert and validate CS.
814	*/
815	STAM_PROFILE_START(&pVM->trpm.s.StatTrap0dDisasm, a);
816	RTGCPTR PC;
817	uint32_t cBits;
818	int rc = SELMValidateAndConvertCSAddrGCTrap(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs,
819	(RTGCPTR)pRegFrame->eip, &PC, &cBits);
820	if (RT_FAILURE(rc))
821	{
822	Log(("trpmGCTrap0dHandler: Failed to convert %RTsel:%RX32 (cpl=%d) - rc=%Rrc !!\n",
823	pRegFrame->cs, pRegFrame->eip, pRegFrame->ss & X86_SEL_RPL, rc));
824	STAM_PROFILE_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
825	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
826	}
827
828	/*
829	* Optimize RDTSC traps.
830	* Some guests (like Solaris) are using RDTSC all over the place and
831	* will end up trapping a lot because of that.
832	*/
833	if ( !pRegFrame->eflags.Bits.u1VM
834	&& ((uint8_t *)PC)[0] == 0x0f
835	&& ((uint8_t *)PC)[1] == 0x31)
836	{
837	STAM_PROFILE_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
838	return trpmGCTrap0dHandlerRdTsc(pVM, pRegFrame);
839	}
840
841	/*
842	* Disassemble the instruction.
843	*/
844	DISCPUSTATE Cpu;
845	uint32_t cbOp;
846	rc = DISCoreOneEx((RTGCUINTPTR)PC, cBits == 32 ? CPUMODE_32BIT : cBits == 16 ? CPUMODE_16BIT : CPUMODE_64BIT,
847	NULL, NULL, &Cpu, &cbOp);
848	if (RT_FAILURE(rc))
849	{
850	AssertMsgFailed(("DISCoreOneEx failed to PC=%RGv rc=%Rrc\n", PC, rc));
851	STAM_PROFILE_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
852	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
853	}
854	STAM_PROFILE_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
855
856	/*
857	* Deal with I/O port access.
858	*/
859	if ( pVM->trpm.s.uActiveErrorCode == 0
860	&& (Cpu.pCurInstr->optype & OPTYPE_PORTIO))
861	{
862	rc = EMInterpretPortIO(pVM, pRegFrame, &Cpu, cbOp);
863	return trpmGCExitTrap(pVM, rc, pRegFrame);
864	}
865
866	/*
867	* Deal with Ring-0 (privileged instructions)
868	*/
869	if ( (pRegFrame->ss & X86_SEL_RPL) <= 1
870	&& !pRegFrame->eflags.Bits.u1VM)
871	return trpmGCTrap0dHandlerRing0(pVM, pRegFrame, &Cpu, PC);
872
873	/*
874	* Deal with Ring-3 GPs.
875	*/
876	if (!pRegFrame->eflags.Bits.u1VM)
877	return trpmGCTrap0dHandlerRing3(pVM, pRegFrame, &Cpu, PC);
878
879	/*
880	* Deal with v86 code.
881	*
882	* We always set IOPL to zero which makes e.g. pushf fault in V86
883	* mode. The guest might use IOPL=3 and therefore not expect a #GP.
884	* Simply fall back to the recompiler to emulate this instruction if
885	* that's the case. To get the correct we must use CPUMRawGetEFlags.
886	*/
887	X86EFLAGS eflags;
888	eflags.u32 = CPUMRawGetEFlags(pVM, pRegFrame); /* Get the correct value. */
889	Log3(("TRPM #GP V86: cs:eip=%04x:%08x IOPL=%d efl=%08x\n", pRegFrame->cs, pRegFrame->eip, eflags.Bits.u2IOPL, eflags.u));
890	if (eflags.Bits.u2IOPL != 3)
891	{
892	Assert(eflags.Bits.u2IOPL == 0);
893
894	int rc = TRPMForwardTrap(pVM, pRegFrame, 0xD, 0, TRPM_TRAP_HAS_ERRORCODE, TRPM_TRAP, 0xd);
895	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
896	return trpmGCExitTrap(pVM, rc, pRegFrame);
897	}
898	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
899	}
900
901
902	/**
903	* \#GP (General Protection Fault) handler.
904	*
905	* @returns VBox status code.
906	* VINF_SUCCESS means we completely handled this trap,
907	* other codes are passed execution to host context.
908	*
909	* @param pTrpm Pointer to TRPM data (within VM).
910	* @param pRegFrame Pointer to the register frame for the trap.
911	* @internal
912	*/
913	DECLASM(int) TRPMGCTrap0dHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
914	{
915	LogFlow(("TRPMGC0d: %04x:%08x err=%x\n", pRegFrame->cs, pRegFrame->eip, (uint32_t)pTrpm->uActiveErrorCode));
916	PVM pVM = TRPM2VM(pTrpm);
917
918	int rc = trpmGCTrap0dHandler(pVM, pTrpm, pRegFrame);
919	switch (rc)
920	{
921	case VINF_EM_RAW_GUEST_TRAP:
922	case VINF_EM_RAW_EXCEPTION_PRIVILEGED:
923	if (PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip))
924	rc = VINF_PATM_PATCH_TRAP_GP;
925	break;
926
927	case VINF_EM_RAW_INTERRUPT_PENDING:
928	Assert(TRPMHasTrap(pVM));
929	/* no break; */
930	case VINF_PGM_SYNC_CR3: /** @todo Check this with Sander. */
931	case VINF_EM_RAW_EMULATE_INSTR:
932	case VINF_IOM_HC_IOPORT_READ:
933	case VINF_IOM_HC_IOPORT_WRITE:
934	case VINF_IOM_HC_MMIO_WRITE:
935	case VINF_IOM_HC_MMIO_READ:
936	case VINF_IOM_HC_MMIO_READ_WRITE:
937	case VINF_PATM_PATCH_INT3:
938	case VINF_EM_NO_MEMORY:
939	case VINF_EM_RAW_TO_R3:
940	case VINF_EM_RAW_TIMER_PENDING:
941	case VINF_EM_PENDING_REQUEST:
942	case VINF_EM_HALT:
943	case VINF_SUCCESS:
944	break;
945
946	default:
947	AssertMsg(PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip) == false, ("return code %d\n", rc));
948	break;
949	}
950	Log6(("TRPMGC0d: %Rrc (%04x:%08x)\n", rc, pRegFrame->cs, pRegFrame->eip));
951	return rc;
952	}
953
954
955	/**
956	* \#PF (Page Fault) handler.
957	*
958	* Calls PGM which does the actual handling.
959	*
960	*
961	* @returns VBox status code.
962	* VINF_SUCCESS means we completely handled this trap,
963	* other codes are passed execution to host context.
964	*
965	* @param pTrpm Pointer to TRPM data (within VM).
966	* @param pRegFrame Pointer to the register frame for the trap.
967	* @internal
968	*/
969	DECLASM(int) TRPMGCTrap0eHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
970	{
971	LogFlow(("TRPMGC0e: %04x:%08x err=%x cr2=%08x\n", pRegFrame->cs, pRegFrame->eip, (uint32_t)pTrpm->uActiveErrorCode, (uint32_t)pTrpm->uActiveCR2));
972	PVM pVM = TRPM2VM(pTrpm);
973
974
975	/*
976	* This is all PGM stuff.
977	*/
978	int rc = PGMTrap0eHandler(pVM, pTrpm->uActiveErrorCode, pRegFrame, (RTGCPTR)pTrpm->uActiveCR2);
979	switch (rc)
980	{
981	case VINF_EM_RAW_EMULATE_INSTR:
982	case VINF_EM_RAW_EMULATE_INSTR_PD_FAULT:
983	case VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT:
984	case VINF_EM_RAW_EMULATE_INSTR_TSS_FAULT:
985	case VINF_EM_RAW_EMULATE_INSTR_LDT_FAULT:
986	case VINF_EM_RAW_EMULATE_INSTR_IDT_FAULT:
987	if (PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip))
988	rc = VINF_PATCH_EMULATE_INSTR;
989	break;
990
991	case VINF_EM_RAW_GUEST_TRAP:
992	if (PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip))
993	return VINF_PATM_PATCH_TRAP_PF;
994
995	rc = TRPMForwardTrap(pVM, pRegFrame, 0xE, 0, TRPM_TRAP_HAS_ERRORCODE, TRPM_TRAP, 0xe);
996	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
997	break;
998
999	case VINF_EM_RAW_INTERRUPT_PENDING:
1000	Assert(TRPMHasTrap(pVM));
1001	/* no break; */
1002	case VINF_IOM_HC_MMIO_READ:
1003	case VINF_IOM_HC_MMIO_WRITE:
1004	case VINF_IOM_HC_MMIO_READ_WRITE:
1005	case VINF_PATM_HC_MMIO_PATCH_READ:
1006	case VINF_PATM_HC_MMIO_PATCH_WRITE:
1007	case VINF_SUCCESS:
1008	case VINF_EM_RAW_TO_R3:
1009	case VINF_EM_PENDING_REQUEST:
1010	case VINF_EM_RAW_TIMER_PENDING:
1011	case VINF_EM_NO_MEMORY:
1012	case VINF_CSAM_PENDING_ACTION:
1013	case VINF_PGM_SYNC_CR3: /** @todo Check this with Sander. */
1014	break;
1015
1016	default:
1017	AssertMsg(PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip) == false, ("Patch address for return code %d. eip=%08x\n", rc, pRegFrame->eip));
1018	break;
1019	}
1020	rc = trpmGCExitTrap(pVM, rc, pRegFrame);
1021	Log6(("TRPMGC0e: %Rrc (%04x:%08x)\n", rc, pRegFrame->cs, pRegFrame->eip));
1022	return rc;
1023	}
1024
1025
1026	/**
1027	* Scans for the EIP in the specified array of trap handlers.
1028	*
1029	* If we don't fine the EIP, we'll panic.
1030	*
1031	* @returns VBox status code.
1032	*
1033	* @param pVM The VM handle.
1034	* @param pRegFrame Pointer to the register frame for the trap.
1035	* @param paHandlers The array of trap handler records.
1036	* @param pEndRecord The end record (exclusive).
1037	*/
1038	static int trpmGCHyperGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, PCTRPMGCHYPER paHandlers, PCTRPMGCHYPER pEndRecord)
1039	{
1040	uintptr_t uEip = (uintptr_t)pRegFrame->eip;
1041	Assert(paHandlers <= pEndRecord);
1042
1043	Log(("trpmGCHyperGeneric: uEip=%x %p-%p\n", uEip, paHandlers, pEndRecord));
1044
1045	#if 0 /// @todo later
1046	/*
1047	* Start by doing a kind of binary search.
1048	*/
1049	unsigned iStart = 0;
1050	unsigned iEnd = pEndRecord - paHandlers;
1051	unsigned i = iEnd / 2;
1052	#endif
1053
1054	/*
1055	* Do a linear search now (in case the array wasn't properly sorted).
1056	*/
1057	for (PCTRPMGCHYPER pCur = paHandlers; pCur < pEndRecord; pCur++)
1058	{
1059	if ( pCur->uStartEIP <= uEip
1060	&& (pCur->uEndEIP ? pCur->uEndEIP > uEip : pCur->uStartEIP == uEip))
1061	return pCur->pfnHandler(pVM, pRegFrame, pCur->uUser);
1062	}
1063
1064	return VERR_TRPM_DONT_PANIC;
1065	}
1066
1067
1068	/**
1069	* Hypervisor \#NP ((segment) Not Present) handler.
1070	*
1071	* Scans for the EIP in the registered trap handlers.
1072	*
1073	* @returns VBox status code.
1074	* VINF_SUCCESS means we completely handled this trap,
1075	* other codes are passed back to host context.
1076	*
1077	* @param pTrpm Pointer to TRPM data (within VM).
1078	* @param pRegFrame Pointer to the register frame for the trap.
1079	* @internal
1080	*/
1081	DECLASM(int) TRPMGCHyperTrap0bHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
1082	{
1083	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0bHandlers, g_aTrap0bHandlersEnd);
1084	}
1085
1086
1087	/**
1088	* Hypervisor \#GP (General Protection Fault) handler.
1089	*
1090	* Scans for the EIP in the registered trap handlers.
1091	*
1092	* @returns VBox status code.
1093	* VINF_SUCCESS means we completely handled this trap,
1094	* other codes are passed back to host context.
1095	*
1096	* @param pTrpm Pointer to TRPM data (within VM).
1097	* @param pRegFrame Pointer to the register frame for the trap.
1098	* @internal
1099	*/
1100	DECLASM(int) TRPMGCHyperTrap0dHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
1101	{
1102	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
1103	}
1104
1105
1106	/**
1107	* Hypervisor \#PF (Page Fault) handler.
1108	*
1109	* Scans for the EIP in the registered trap handlers.
1110	*
1111	* @returns VBox status code.
1112	* VINF_SUCCESS means we completely handled this trap,
1113	* other codes are passed back to host context.
1114	*
1115	* @param pTrpm Pointer to TRPM data (within VM).
1116	* @param pRegFrame Pointer to the register frame for the trap.
1117	* @internal
1118	*/
1119	DECLASM(int) TRPMGCHyperTrap0eHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
1120	{
1121	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
1122	}
1123
1124
1125	/**
1126	* Deal with hypervisor traps occuring when resuming execution on a trap.
1127	*
1128	* @returns VBox status code.
1129	* @param pVM The VM handle.
1130	* @param pRegFrame Register frame.
1131	* @param uUser User arg.
1132	*/
1133	DECLCALLBACK(int) trpmGCTrapInGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser)
1134	{
1135	Log(("********************************************************\n"));
1136	Log(("trpmGCTrapInGeneric: eip=%RX32 uUser=%#x\n", pRegFrame->eip, uUser));
1137	Log(("********************************************************\n"));
1138
1139	if (uUser & TRPM_TRAP_IN_HYPER)
1140	{
1141	/*
1142	* Check that there is still some stack left, if not we'll flag
1143	* a guru meditation (the alternative is a triple fault).
1144	*/
1145	RTRCUINTPTR cbStackUsed = (RTRCUINTPTR)VMMGetStackRC(pVM) - pRegFrame->esp;
1146	if (cbStackUsed > VMM_STACK_SIZE - _1K)
1147	{
1148	LogRel(("trpmGCTrapInGeneric: ran out of stack: esp=#x cbStackUsed=%#x\n", pRegFrame->esp, cbStackUsed));
1149	return VERR_TRPM_DONT_PANIC;
1150	}
1151
1152	/*
1153	* Just zero the register containing the selector in question.
1154	* We'll deal with the actual stale or troublesome selector value in
1155	* the outermost trap frame.
1156	*/
1157	switch (uUser & TRPM_TRAP_IN_OP_MASK)
1158	{
1159	case TRPM_TRAP_IN_MOV_GS:
1160	pRegFrame->eax = 0;
1161	pRegFrame->gs = 0; /* prevent recursive trouble. */
1162	break;
1163	case TRPM_TRAP_IN_MOV_FS:
1164	pRegFrame->eax = 0;
1165	pRegFrame->fs = 0; /* prevent recursive trouble. */
1166	return VINF_SUCCESS;
1167
1168	default:
1169	AssertMsgFailed(("Invalid uUser=%#x\n", uUser));
1170	return VERR_INTERNAL_ERROR;
1171	}
1172	}
1173	else
1174	{
1175	/*
1176	* Reconstruct the guest context and switch to the recompiler.
1177	* We ASSUME we're only at
1178	*/
1179	CPUMCTXCORE CtxCore = *pRegFrame;
1180	uint32_t pEsp = (uint32_t )pRegFrame->esp;
1181	int rc;
1182
1183	switch (uUser)
1184	{
1185	/*
1186	* This will only occur when resuming guest code in a trap handler!
1187	*/
1188	/* @note ASSUMES esp points to the temporary guest CPUMCTXCORE!!! */
1189	case TRPM_TRAP_IN_MOV_GS:
1190	case TRPM_TRAP_IN_MOV_FS:
1191	case TRPM_TRAP_IN_MOV_ES:
1192	case TRPM_TRAP_IN_MOV_DS:
1193	{
1194	PCPUMCTXCORE pTempGuestCtx = (PCPUMCTXCORE)pEsp;
1195
1196	/* Just copy the whole thing; several selector registers, eip (etc) and eax are not yet in pRegFrame. */
1197	CtxCore = *pTempGuestCtx;
1198	rc = VINF_EM_RAW_STALE_SELECTOR;
1199	break;
1200	}
1201
1202	/*
1203	* This will only occur when resuming guest code!
1204	*/
1205	case TRPM_TRAP_IN_IRET:
1206	CtxCore.eip = *pEsp++;
1207	CtxCore.cs = (RTSEL)*pEsp++;
1208	CtxCore.eflags.u32 = *pEsp++;
1209	CtxCore.esp = *pEsp++;
1210	CtxCore.ss = (RTSEL)*pEsp++;
1211	rc = VINF_EM_RAW_IRET_TRAP;
1212	break;
1213
1214	/*
1215	* This will only occur when resuming V86 guest code!
1216	*/
1217	case TRPM_TRAP_IN_IRET \| TRPM_TRAP_IN_V86:
1218	CtxCore.eip = *pEsp++;
1219	CtxCore.cs = (RTSEL)*pEsp++;
1220	CtxCore.eflags.u32 = *pEsp++;
1221	CtxCore.esp = *pEsp++;
1222	CtxCore.ss = (RTSEL)*pEsp++;
1223	CtxCore.es = (RTSEL)*pEsp++;
1224	CtxCore.ds = (RTSEL)*pEsp++;
1225	CtxCore.fs = (RTSEL)*pEsp++;
1226	CtxCore.gs = (RTSEL)*pEsp++;
1227	rc = VINF_EM_RAW_IRET_TRAP;
1228	break;
1229
1230	default:
1231	AssertMsgFailed(("Invalid uUser=%#x\n", uUser));
1232	return VERR_INTERNAL_ERROR;
1233	}
1234
1235
1236	CPUMSetGuestCtxCore(pVM, &CtxCore);
1237	TRPMGCHyperReturnToHost(pVM, rc);
1238	}
1239
1240	AssertMsgFailed(("Impossible!\n"));
1241	return VERR_INTERNAL_ERROR;
1242	}
1243

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source: vbox/trunk/src/VBox/VMM/VMMGC/TRPMGCHandlers.cpp@ 18770

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