TRPMGCHandlers.cpp@ 18876

Last change on this file since 18876 was 18876, checked in by vboxsync, 16 years ago
TRPMGCTrap07Handler: exit via trpmGCExitTrap like everyone else.
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1	/* $Id: TRPMGCHandlers.cpp 18876 2009-04-14 08:11:45Z vboxsync $ */
2	/** @file
3	* TRPM - Guest Context Trap Handlers, CPP part
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22
23	/*******************************************************************************
24	* Header Files *
25	*******************************************************************************/
26	#define LOG_GROUP LOG_GROUP_TRPM
27	#include <VBox/selm.h>
28	#include <VBox/iom.h>
29	#include <VBox/pgm.h>
30	#include <VBox/pdm.h>
31	#include <VBox/dbgf.h>
32	#include <VBox/em.h>
33	#include <VBox/csam.h>
34	#include <VBox/patm.h>
35	#include <VBox/mm.h>
36	#include <VBox/cpum.h>
37	#include "TRPMInternal.h"
38	#include <VBox/vm.h>
39	#include <VBox/param.h>
40
41	#include <VBox/err.h>
42	#include <VBox/dis.h>
43	#include <VBox/disopcode.h>
44	#include <VBox/x86.h>
45	#include <VBox/log.h>
46	#include <VBox/tm.h>
47	#include <iprt/asm.h>
48	#include <iprt/assert.h>
49
50	/*******************************************************************************
51	* Defined Constants And Macros *
52	*******************************************************************************/
53	/* still here. MODR/M byte parsing */
54	#define X86_OPCODE_MODRM_MOD_MASK 0xc0
55	#define X86_OPCODE_MODRM_REG_MASK 0x38
56	#define X86_OPCODE_MODRM_RM_MASK 0x07
57
58	/** @todo fix/remove/permanent-enable this when DIS/PATM handles invalid lock sequences. */
59	#define DTRACE_EXPERIMENT
60
61
62	/*******************************************************************************
63	* Structures and Typedefs *
64	*******************************************************************************/
65	/** Pointer to a readonly hypervisor trap record. */
66	typedef const struct TRPMGCHYPER *PCTRPMGCHYPER;
67
68	/**
69	* A hypervisor trap record.
70	* This contains information about a handler for a instruction range.
71	*
72	* @remark This must match what TRPM_HANDLER outputs.
73	*/
74	typedef struct TRPMGCHYPER
75	{
76	/** The start address. */
77	uintptr_t uStartEIP;
78	/** The end address. (exclusive)
79	* If NULL the it's only for the instruction at pvStartEIP. */
80	uintptr_t uEndEIP;
81	/**
82	* The handler.
83	*
84	* @returns VBox status code
85	* VINF_SUCCESS means we've handled the trap.
86	* Any other error code means returning to the host context.
87	* @param pVM The VM handle.
88	* @param pRegFrame The register frame.
89	* @param uUser The user argument.
90	*/
91	DECLRCCALLBACKMEMBER(int, pfnHandler, (PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser));
92	/** Whatever the handler desires to put here. */
93	uintptr_t uUser;
94	} TRPMGCHYPER;
95
96
97	/*******************************************************************************
98	* Global Variables *
99	*******************************************************************************/
100	__BEGIN_DECLS
101	/** Defined in VMMGC0.asm or VMMGC99.asm.
102	* @{ */
103	extern const TRPMGCHYPER g_aTrap0bHandlers[1];
104	extern const TRPMGCHYPER g_aTrap0bHandlersEnd[1];
105	extern const TRPMGCHYPER g_aTrap0dHandlers[1];
106	extern const TRPMGCHYPER g_aTrap0dHandlersEnd[1];
107	extern const TRPMGCHYPER g_aTrap0eHandlers[1];
108	extern const TRPMGCHYPER g_aTrap0eHandlersEnd[1];
109	/** @} */
110	__END_DECLS
111
112
113	/*******************************************************************************
114	* Internal Functions *
115	*******************************************************************************/
116	__BEGIN_DECLS /* addressed from asm (not called so no DECLASM). */
117	DECLCALLBACK(int) trpmGCTrapInGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser);
118	__END_DECLS
119
120
121
122	/**
123	* Exits the trap, called when exiting a trap handler.
124	*
125	* Will reset the trap if it's not a guest trap or the trap
126	* is already handled. Will process resume guest FFs.
127	*
128	* @returns rc, can be adjusted if its VINF_SUCCESS or something really bad
129	* happened.
130	* @param pVM VM handle.
131	* @param rc The VBox status code to return.
132	* @param pRegFrame Pointer to the register frame for the trap.
133	*/
134	static int trpmGCExitTrap(PVM pVM, int rc, PCPUMCTXCORE pRegFrame)
135	{
136	uint32_t uOldActiveVector = pVM->trpm.s.uActiveVector;
137	NOREF(uOldActiveVector);
138
139	/* Reset trap? */
140	if ( rc != VINF_EM_RAW_GUEST_TRAP
141	&& rc != VINF_EM_RAW_RING_SWITCH_INT)
142	pVM->trpm.s.uActiveVector = ~0;
143
144	#ifdef VBOX_HIGH_RES_TIMERS_HACK
145	/*
146	* We should poll the timers occationally.
147	* We must NOT do this too frequently as it adds a significant overhead
148	* and it'll kill us if the trap load is high. (See #1354.)
149	* (The heuristic is not very intelligent, we should really check trap
150	* frequency etc. here, but alas, we lack any such information atm.)
151	*/
152	static unsigned s_iTimerPoll = 0;
153	if (rc == VINF_SUCCESS)
154	{
155	if (!(++s_iTimerPoll & 0xf))
156	{
157	uint64_t cTicks = TMTimerPoll(pVM); NOREF(cTicks);
158	Log2(("TMTimerPoll at %08RX32 returned %RX64 (VM_FF_TIMER=%d)\n", pRegFrame->eip, cTicks, VM_FF_ISPENDING(pVM, VM_FF_TIMER)));
159	}
160	}
161	else
162	s_iTimerPoll = 0;
163	#endif
164
165	/* Clear pending inhibit interrupt state if required. (necessary for dispatching interrupts later on) */
166	if (VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS))
167	{
168	Log2(("VM_FF_INHIBIT_INTERRUPTS at %08RX32 successor %RGv\n", pRegFrame->eip, EMGetInhibitInterruptsPC(pVM)));
169	if (pRegFrame->eip != EMGetInhibitInterruptsPC(pVM))
170	{
171	/** @note we intentionally don't clear VM_FF_INHIBIT_INTERRUPTS here if the eip is the same as the inhibited instr address.
172	* Before we are able to execute this instruction in raw mode (iret to guest code) an external interrupt might
173	* force a world switch again. Possibly allowing a guest interrupt to be dispatched in the process. This could
174	* break the guest. Sounds very unlikely, but such timing sensitive problem are not as rare as you might think.
175	*/
176	VM_FF_CLEAR(pVM, VM_FF_INHIBIT_INTERRUPTS);
177	}
178	}
179
180	/*
181	* Pending resume-guest-FF?
182	* Or pending (A)PIC interrupt? Windows XP will crash if we delay APIC interrupts.
183	*/
184	if ( rc == VINF_SUCCESS
185	&& VM_FF_ISPENDING(pVM, VM_FF_TO_R3 \| VM_FF_TIMER \| VM_FF_INTERRUPT_APIC \| VM_FF_INTERRUPT_PIC \| VM_FF_REQUEST
186	\| VM_FF_PGM_SYNC_CR3 \| VM_FF_PGM_SYNC_CR3_NON_GLOBAL \| VM_FF_PGM_NO_MEMORY))
187	{
188	/* The out of memory condition naturally outrang the others. */
189	if (RT_UNLIKELY(VM_FF_ISPENDING(pVM, VM_FF_PGM_NO_MEMORY)))
190	rc = VINF_EM_NO_MEMORY;
191	/* Pending Ring-3 action. */
192	else if (VM_FF_ISPENDING(pVM, VM_FF_TO_R3))
193	{
194	VM_FF_CLEAR(pVM, VM_FF_TO_R3);
195	rc = VINF_EM_RAW_TO_R3;
196	}
197	/* Pending timer action. */
198	else if (VM_FF_ISPENDING(pVM, VM_FF_TIMER))
199	rc = VINF_EM_RAW_TIMER_PENDING;
200	/* Pending interrupt: dispatch it. */
201	else if ( VM_FF_ISPENDING(pVM, VM_FF_INTERRUPT_APIC \| VM_FF_INTERRUPT_PIC)
202	&& !VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS)
203	&& PATMAreInterruptsEnabledByCtxCore(pVM, pRegFrame)
204	)
205	{
206	uint8_t u8Interrupt;
207	rc = PDMGetInterrupt(pVM, &u8Interrupt);
208	Log(("trpmGCExitTrap: u8Interrupt=%d (%#x) rc=%Rrc\n", u8Interrupt, u8Interrupt, rc));
209	AssertFatalMsgRC(rc, ("PDMGetInterrupt failed with %Rrc\n", rc));
210	rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)u8Interrupt, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_HARDWARE_INT, uOldActiveVector);
211	/* can't return if successful */
212	Assert(rc != VINF_SUCCESS);
213
214	/* Stop the profile counter that was started in TRPMGCHandlersA.asm */
215	Assert(uOldActiveVector <= 16);
216	STAM_PROFILE_ADV_STOP(&pVM->trpm.s.aStatGCTraps[uOldActiveVector], a);
217
218	/* Assert the trap and go to the recompiler to dispatch it. */
219	TRPMAssertTrap(pVM, u8Interrupt, TRPM_HARDWARE_INT);
220
221	STAM_PROFILE_ADV_START(&pVM->trpm.s.aStatGCTraps[uOldActiveVector], a);
222	rc = VINF_EM_RAW_INTERRUPT_PENDING;
223	}
224	/*
225	* Try sync CR3?
226	*/
227	else if (VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 \| VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
228	#if 1
229	rc = PGMSyncCR3(pVM, CPUMGetGuestCR0(pVM), CPUMGetGuestCR3(pVM), CPUMGetGuestCR4(pVM), VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3));
230	#else
231	rc = VINF_PGM_SYNC_CR3;
232	#endif
233	/* Pending request packets might contain actions that need immediate attention, such as pending hardware interrupts. */
234	else if (VM_FF_ISPENDING(pVM, VM_FF_REQUEST))
235	rc = VINF_EM_PENDING_REQUEST;
236	}
237
238	AssertMsg( rc != VINF_SUCCESS
239	\|\| ( pRegFrame->eflags.Bits.u1IF
240	&& ( pRegFrame->eflags.Bits.u2IOPL < (unsigned)(pRegFrame->ss & X86_SEL_RPL) \|\| pRegFrame->eflags.Bits.u1VM))
241	, ("rc=%Rrc\neflags=%RX32 ss=%RTsel IOPL=%d\n", rc, pRegFrame->eflags.u32, pRegFrame->ss, pRegFrame->eflags.Bits.u2IOPL));
242	return rc;
243	}
244
245
246	/**
247	* \#DB (Debug event) handler.
248	*
249	* @returns VBox status code.
250	* VINF_SUCCESS means we completely handled this trap,
251	* other codes are passed execution to host context.
252	*
253	* @param pTrpm Pointer to TRPM data (within VM).
254	* @param pRegFrame Pointer to the register frame for the trap.
255	* @internal
256	*/
257	DECLASM(int) TRPMGCTrap01Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
258	{
259	RTGCUINTREG uDr6 = ASMGetAndClearDR6();
260	PVM pVM = TRPM2VM(pTrpm);
261	LogFlow(("TRPMGC01: cs:eip=%04x:%08x uDr6=%RTreg\n", pRegFrame->cs, pRegFrame->eip, uDr6));
262
263	/*
264	* We currently don't make sure of the X86_DR7_GD bit, but
265	* there might come a time when we do.
266	*/
267	if ((uDr6 & X86_DR6_BD) == X86_DR6_BD)
268	{
269	AssertReleaseMsgFailed(("X86_DR6_BD isn't used, but it's set! dr7=%RTreg(%RTreg) dr6=%RTreg\n",
270	ASMGetDR7(), CPUMGetHyperDR7(pVM), uDr6));
271	return VERR_NOT_IMPLEMENTED;
272	}
273
274	AssertReleaseMsg(!(uDr6 & X86_DR6_BT), ("X86_DR6_BT is impossible!\n"));
275
276	/*
277	* Now leave the rest to the DBGF.
278	*/
279	int rc = DBGFGCTrap01Handler(pVM, pRegFrame, uDr6);
280	if (rc == VINF_EM_RAW_GUEST_TRAP)
281	CPUMSetGuestDR6(pVM, uDr6);
282
283	rc = trpmGCExitTrap(pVM, rc, pRegFrame);
284	Log6(("TRPMGC01: %Rrc (%04x:%08x %RTreg)\n", rc, pRegFrame->cs, pRegFrame->eip, uDr6));
285	return rc;
286	}
287
288
289	/**
290	* NMI handler, for when we are using NMIs to debug things.
291	*
292	* @returns VBox status code.
293	* VINF_SUCCESS means we completely handled this trap,
294	* other codes are passed execution to host context.
295	*
296	* @param pTrpm Pointer to TRPM data (within VM).
297	* @param pRegFrame Pointer to the register frame for the trap.
298	* @internal
299	* @remark This is not hooked up unless you're building with VBOX_WITH_NMI defined.
300	*/
301	DECLASM(int) TRPMGCTrap02Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
302	{
303	LogFlow(("TRPMGCTrap02Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
304	RTLogComPrintf("TRPMGCTrap02Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip);
305	return VERR_TRPM_DONT_PANIC;
306	}
307
308
309	/**
310	* \#BP (Breakpoint) handler.
311	*
312	* @returns VBox status code.
313	* VINF_SUCCESS means we completely handled this trap,
314	* other codes are passed execution to host context.
315	*
316	* @param pTrpm Pointer to TRPM data (within VM).
317	* @param pRegFrame Pointer to the register frame for the trap.
318	* @internal
319	*/
320	DECLASM(int) TRPMGCTrap03Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
321	{
322	LogFlow(("TRPMGC03: %04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
323	PVM pVM = TRPM2VM(pTrpm);
324	int rc;
325
326	/*
327	* Both PATM are using INT3s, let them have a go first.
328	*/
329	if ( (pRegFrame->ss & X86_SEL_RPL) == 1
330	&& !pRegFrame->eflags.Bits.u1VM)
331	{
332	rc = PATMHandleInt3PatchTrap(pVM, pRegFrame);
333	if (rc == VINF_SUCCESS \|\| rc == VINF_EM_RAW_EMULATE_INSTR \|\| rc == VINF_PATM_PATCH_INT3 \|\| rc == VINF_PATM_DUPLICATE_FUNCTION)
334	{
335	rc = trpmGCExitTrap(pVM, rc, pRegFrame);
336	Log6(("TRPMGC03: %Rrc (%04x:%08x) (PATM)\n", rc, pRegFrame->cs, pRegFrame->eip));
337	return rc;
338	}
339	}
340	rc = DBGFGCTrap03Handler(pVM, pRegFrame);
341
342	/* anything we should do with this? Schedule it in GC? */
343	rc = trpmGCExitTrap(pVM, rc, pRegFrame);
344	Log6(("TRPMGC03: %Rrc (%04x:%08x)\n", rc, pRegFrame->cs, pRegFrame->eip));
345	return rc;
346	}
347
348
349	/**
350	* Trap handler for illegal opcode fault (\#UD).
351	*
352	* @returns VBox status code.
353	* VINF_SUCCESS means we completely handled this trap,
354	* other codes are passed execution to host context.
355	*
356	* @param pTrpm Pointer to TRPM data (within VM).
357	* @param pRegFrame Pointer to the register frame for the trap.
358	* @internal
359	*/
360	DECLASM(int) TRPMGCTrap06Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
361	{
362	LogFlow(("TRPMGC06: %04x:%08x efl=%x\n", pRegFrame->cs, pRegFrame->eip, pRegFrame->eflags.u32));
363	PVM pVM = TRPM2VM(pTrpm);
364	int rc;
365
366	if (CPUMGetGuestCPL(pVM, pRegFrame) == 0)
367	{
368	/*
369	* Decode the instruction.
370	*/
371	RTGCPTR PC;
372	rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &PC);
373	if (RT_FAILURE(rc))
374	{
375	Log(("TRPMGCTrap06Handler: Failed to convert %RTsel:%RX32 (cpl=%d) - rc=%Rrc !!\n", pRegFrame->cs, pRegFrame->eip, pRegFrame->ss & X86_SEL_RPL, rc));
376	rc = trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
377	Log6(("TRPMGC06: %Rrc (%04x:%08x) (SELM)\n", rc, pRegFrame->cs, pRegFrame->eip));
378	return rc;
379	}
380
381	DISCPUSTATE Cpu;
382	uint32_t cbOp;
383	rc = EMInterpretDisasOneEx(pVM, (RTGCUINTPTR)PC, pRegFrame, &Cpu, &cbOp);
384	if (RT_FAILURE(rc))
385	{
386	rc = trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
387	Log6(("TRPMGC06: %Rrc (%04x:%08x) (EM)\n", rc, pRegFrame->cs, pRegFrame->eip));
388	return rc;
389	}
390
391	/*
392	* UD2 in a patch?
393	*/
394	if ( Cpu.pCurInstr->opcode == OP_ILLUD2
395	&& PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip))
396	{
397	rc = PATMGCHandleIllegalInstrTrap(pVM, pRegFrame);
398	/** @todo These tests are completely unnecessary, should just follow the
399	* flow and return at the end of the function. */
400	if ( rc == VINF_SUCCESS
401	\|\| rc == VINF_EM_RAW_EMULATE_INSTR
402	\|\| rc == VINF_PATM_DUPLICATE_FUNCTION
403	\|\| rc == VINF_PATM_PENDING_IRQ_AFTER_IRET
404	\|\| rc == VINF_EM_RESCHEDULE)
405	{
406	rc = trpmGCExitTrap(pVM, rc, pRegFrame);
407	Log6(("TRPMGC06: %Rrc (%04x:%08x) (PATM)\n", rc, pRegFrame->cs, pRegFrame->eip));
408	return rc;
409	}
410	}
411	/*
412	* Speed up dtrace and don't entrust invalid lock sequences to the recompiler.
413	*/
414	else if (Cpu.prefix & PREFIX_LOCK)
415	{
416	Log(("TRPMGCTrap06Handler: pc=%08x op=%d\n", pRegFrame->eip, Cpu.pCurInstr->opcode));
417	#ifdef DTRACE_EXPERIMENT /** @todo fix/remove/permanent-enable this when DIS/PATM handles invalid lock sequences. */
418	Assert(!PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip));
419	rc = TRPMForwardTrap(pVM, pRegFrame, 0x6, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_TRAP, 0x6);
420	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
421	#else
422	rc = VINF_EM_RAW_EMULATE_INSTR;
423	#endif
424	}
425	/*
426	* Handle MONITOR - it causes an #UD exception instead of #GP when not executed in ring 0.
427	*/
428	else if (Cpu.pCurInstr->opcode == OP_MONITOR)
429	{
430	uint32_t cbIgnored;
431	rc = EMInterpretInstructionCPU(pVM, &Cpu, pRegFrame, PC, &cbIgnored);
432	if (RT_LIKELY(RT_SUCCESS(rc)))
433	pRegFrame->eip += Cpu.opsize;
434	}
435	/* Never generate a raw trap here; it might be an instruction, that requires emulation. */
436	else
437	rc = VINF_EM_RAW_EMULATE_INSTR;
438	}
439	else
440	{
441	rc = TRPMForwardTrap(pVM, pRegFrame, 0x6, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_TRAP, 0x6);
442	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
443	}
444
445	rc = trpmGCExitTrap(pVM, rc, pRegFrame);
446	Log6(("TRPMGC06: %Rrc (%04x:%08x)\n", rc, pRegFrame->cs, pRegFrame->eip));
447	return rc;
448	}
449
450
451	/**
452	* Trap handler for device not present fault (\#NM).
453	*
454	* Device not available, FP or (F)WAIT instruction.
455	*
456	* @returns VBox status code.
457	* VINF_SUCCESS means we completely handled this trap,
458	* other codes are passed execution to host context.
459	*
460	* @param pTrpm Pointer to TRPM data (within VM).
461	* @param pRegFrame Pointer to the register frame for the trap.
462	* @internal
463	*/
464	DECLASM(int) TRPMGCTrap07Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
465	{
466	LogFlow(("TRPMGC07: %04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
467	PVM pVM = TRPM2VM(pTrpm);
468
469	int rc = CPUMHandleLazyFPU(pVM, VMMGetCpu(pVM));
470	rc = trpmGCExitTrap(pVM, rc, pRegFrame);
471	Log6(("TRPMGC07: %Rrc (%04x:%08x)\n", rc, pRegFrame->cs, pRegFrame->eip));
472	return rc;
473	}
474
475
476	/**
477	* \#NP ((segment) Not Present) handler.
478	*
479	* @returns VBox status code.
480	* VINF_SUCCESS means we completely handled this trap,
481	* other codes are passed execution to host context.
482	*
483	* @param pTrpm Pointer to TRPM data (within VM).
484	* @param pRegFrame Pointer to the register frame for the trap.
485	* @internal
486	*/
487	DECLASM(int) TRPMGCTrap0bHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
488	{
489	LogFlow(("TRPMGC0b: %04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
490	PVM pVM = TRPM2VM(pTrpm);
491
492	/*
493	* Try to detect instruction by opcode which caused trap.
494	* XXX note: this code may cause \#PF (trap e) or \#GP (trap d) while
495	* accessing user code. need to handle it somehow in future!
496	*/
497	RTGCPTR GCPtr;
498	if (SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &GCPtr) == VINF_SUCCESS)
499	{
500	uint8_t pu8Code = (uint8_t )(uintptr_t)GCPtr;
501
502	/*
503	* First skip possible instruction prefixes, such as:
504	* OS, AS
505	* CS:, DS:, ES:, SS:, FS:, GS:
506	* REPE, REPNE
507	*
508	* note: Currently we supports only up to 4 prefixes per opcode, more
509	* prefixes (normally not used anyway) will cause trap d in guest.
510	* note: Instruction length in IA-32 may be up to 15 bytes, we dont
511	* check this issue, its too hard.
512	*/
513	for (unsigned i = 0; i < 4; i++)
514	{
515	if ( pu8Code[0] != 0xf2 /* REPNE/REPNZ */
516	&& pu8Code[0] != 0xf3 /* REP/REPE/REPZ */
517	&& pu8Code[0] != 0x2e /* CS: */
518	&& pu8Code[0] != 0x36 /* SS: */
519	&& pu8Code[0] != 0x3e /* DS: */
520	&& pu8Code[0] != 0x26 /* ES: */
521	&& pu8Code[0] != 0x64 /* FS: */
522	&& pu8Code[0] != 0x65 /* GS: */
523	&& pu8Code[0] != 0x66 /* OS */
524	&& pu8Code[0] != 0x67 /* AS */
525	)
526	break;
527	pu8Code++;
528	}
529
530	/*
531	* Detect right switch using a callgate.
532	*
533	* We recognize the following causes for the trap 0b:
534	* CALL FAR, CALL FAR []
535	* JMP FAR, JMP FAR []
536	* IRET (may cause a task switch)
537	*
538	* Note: we can't detect whether the trap was caused by a call to a
539	* callgate descriptor or it is a real trap 0b due to a bad selector.
540	* In both situations we'll pass execution to our recompiler so we don't
541	* have to worry.
542	* If we wanted to do better detection, we have set GDT entries to callgate
543	* descriptors pointing to our own handlers.
544	*/
545	/** @todo not sure about IRET, may generate Trap 0d (\#GP), NEED TO CHECK! */
546	if ( pu8Code[0] == 0x9a /* CALL FAR */
547	\|\| ( pu8Code[0] == 0xff /* CALL FAR [] */
548	&& (pu8Code[1] & X86_OPCODE_MODRM_REG_MASK) == 0x18)
549	\|\| pu8Code[0] == 0xea /* JMP FAR */
550	\|\| ( pu8Code[0] == 0xff /* JMP FAR [] */
551	&& (pu8Code[1] & X86_OPCODE_MODRM_REG_MASK) == 0x28)
552	\|\| pu8Code[0] == 0xcf /* IRET */
553	)
554	{
555	/*
556	* Got potential call to callgate.
557	* We simply return execution to the recompiler to do emulation
558	* starting from the instruction which caused the trap.
559	*/
560	pTrpm->uActiveVector = ~0;
561	Log6(("TRPMGC0b: %Rrc (%04x:%08x) (CG)\n", VINF_EM_RAW_RING_SWITCH, pRegFrame->cs, pRegFrame->eip));
562	return VINF_EM_RAW_RING_SWITCH;
563	}
564	}
565
566	/*
567	* Pass trap 0b as is to the recompiler in all other cases.
568	*/
569	Log6(("TRPMGC0b: %Rrc (%04x:%08x)\n", VINF_EM_RAW_GUEST_TRAP, pRegFrame->cs, pRegFrame->eip));
570	return VINF_EM_RAW_GUEST_TRAP;
571	}
572
573
574	/**
575	* \#GP (General Protection Fault) handler for Ring-0 privileged instructions.
576	*
577	* @returns VBox status code.
578	* VINF_SUCCESS means we completely handled this trap,
579	* other codes are passed execution to host context.
580	*
581	* @param pVM The VM handle.
582	* @param pRegFrame Pointer to the register frame for the trap.
583	* @param pCpu The opcode info.
584	* @param PC The program counter corresponding to cs:eip in pRegFrame.
585	*/
586	static int trpmGCTrap0dHandlerRing0(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, RTGCPTR PC)
587	{
588	int rc;
589
590	/*
591	* Try handle it here, if not return to HC and emulate/interpret it there.
592	*/
593	switch (pCpu->pCurInstr->opcode)
594	{
595	case OP_INT3:
596	/*
597	* Little hack to make the code below not fail
598	*/
599	pCpu->param1.flags = USE_IMMEDIATE8;
600	pCpu->param1.parval = 3;
601	/* fallthru */
602	case OP_INT:
603	{
604	Assert(pCpu->param1.flags & USE_IMMEDIATE8);
605	Assert(!(PATMIsPatchGCAddr(pVM, (RTRCPTR)PC)));
606	if (pCpu->param1.parval == 3)
607	{
608	/* Int 3 replacement patch? */
609	if (PATMHandleInt3PatchTrap(pVM, pRegFrame) == VINF_SUCCESS)
610	{
611	AssertFailed();
612	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
613	}
614	}
615	rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT, 0xd);
616	if (RT_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
617	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
618
619	pVM->trpm.s.uActiveVector = (pVM->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
620	pVM->trpm.s.enmActiveType = TRPM_SOFTWARE_INT;
621	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH_INT, pRegFrame);
622	}
623
624	#ifdef PATM_EMULATE_SYSENTER
625	case OP_SYSEXIT:
626	case OP_SYSRET:
627	rc = PATMSysCall(pVM, pRegFrame, pCpu);
628	return trpmGCExitTrap(pVM, rc, pRegFrame);
629	#endif
630
631	case OP_HLT:
632	/* If it's in patch code, defer to ring-3. */
633	if (PATMIsPatchGCAddr(pVM, (RTRCPTR)PC))
634	break;
635
636	pRegFrame->eip += pCpu->opsize;
637	return trpmGCExitTrap(pVM, VINF_EM_HALT, pRegFrame);
638
639
640	/*
641	* These instructions are used by PATM and CASM for finding
642	* dangerous non-trapping instructions. Thus, since all
643	* scanning and patching is done in ring-3 we'll have to
644	* return to ring-3 on the first encounter of these instructions.
645	*/
646	case OP_MOV_CR:
647	case OP_MOV_DR:
648	/* We can safely emulate control/debug register move instructions in patched code. */
649	if ( !PATMIsPatchGCAddr(pVM, (RTRCPTR)PC)
650	&& !CSAMIsKnownDangerousInstr(pVM, (RTRCPTR)PC))
651	break;
652	case OP_INVLPG:
653	case OP_LLDT:
654	case OP_STI:
655	case OP_RDTSC: /* just in case */
656	case OP_RDPMC:
657	case OP_CLTS:
658	case OP_WBINVD: /* nop */
659	case OP_RDMSR:
660	case OP_WRMSR:
661	{
662	uint32_t cbIgnored;
663	rc = EMInterpretInstructionCPU(pVM, pCpu, pRegFrame, PC, &cbIgnored);
664	if (RT_SUCCESS(rc))
665	pRegFrame->eip += pCpu->opsize;
666	else if (rc == VERR_EM_INTERPRETER)
667	rc = VINF_EM_RAW_EXCEPTION_PRIVILEGED;
668	return trpmGCExitTrap(pVM, rc, pRegFrame);
669	}
670	}
671
672	return trpmGCExitTrap(pVM, VINF_EM_RAW_EXCEPTION_PRIVILEGED, pRegFrame);
673	}
674
675
676	/**
677	* \#GP (General Protection Fault) handler for Ring-3.
678	*
679	* @returns VBox status code.
680	* VINF_SUCCESS means we completely handled this trap,
681	* other codes are passed execution to host context.
682	*
683	* @param pVM The VM handle.
684	* @param pRegFrame Pointer to the register frame for the trap.
685	* @param pCpu The opcode info.
686	* @param PC The program counter corresponding to cs:eip in pRegFrame.
687	*/
688	static int trpmGCTrap0dHandlerRing3(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, RTGCPTR PC)
689	{
690	int rc;
691
692	Assert(!pRegFrame->eflags.Bits.u1VM);
693
694	switch (pCpu->pCurInstr->opcode)
695	{
696	/*
697	* INT3 and INT xx are ring-switching.
698	* (The shadow IDT will have set the entries to DPL=0, that's why we're here.)
699	*/
700	case OP_INT3:
701	/*
702	* Little hack to make the code below not fail
703	*/
704	pCpu->param1.flags = USE_IMMEDIATE8;
705	pCpu->param1.parval = 3;
706	/* fall thru */
707	case OP_INT:
708	{
709	Assert(pCpu->param1.flags & USE_IMMEDIATE8);
710	rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT, 0xd);
711	if (RT_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
712	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
713
714	pVM->trpm.s.uActiveVector = (pVM->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
715	pVM->trpm.s.enmActiveType = TRPM_SOFTWARE_INT;
716	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH_INT, pRegFrame);
717	}
718
719	/*
720	* SYSCALL, SYSENTER, INTO and BOUND are also ring-switchers.
721	*/
722	case OP_SYSCALL:
723	case OP_SYSENTER:
724	#ifdef PATM_EMULATE_SYSENTER
725	rc = PATMSysCall(pVM, pRegFrame, pCpu);
726	if (rc == VINF_SUCCESS)
727	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
728	/* else no break; */
729	#endif
730	case OP_BOUND:
731	case OP_INTO:
732	pVM->trpm.s.uActiveVector = ~0;
733	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH, pRegFrame);
734
735	/*
736	* Handle virtualized TSC & PMC reads, just in case.
737	*/
738	case OP_RDTSC:
739	case OP_RDPMC:
740	{
741	uint32_t cbIgnored;
742	rc = EMInterpretInstructionCPU(pVM, pCpu, pRegFrame, PC, &cbIgnored);
743	if (RT_SUCCESS(rc))
744	pRegFrame->eip += pCpu->opsize;
745	else if (rc == VERR_EM_INTERPRETER)
746	rc = VINF_EM_RAW_EXCEPTION_PRIVILEGED;
747	return trpmGCExitTrap(pVM, rc, pRegFrame);
748	}
749
750	/*
751	* STI and CLI are I/O privileged, i.e. if IOPL
752	*/
753	case OP_STI:
754	case OP_CLI:
755	{
756	uint32_t efl = CPUMRawGetEFlags(pVM, pRegFrame);
757	if (X86_EFL_GET_IOPL(efl) >= (unsigned)(pRegFrame->ss & X86_SEL_RPL))
758	{
759	LogFlow(("trpmGCTrap0dHandlerRing3: CLI/STI -> REM\n"));
760	return trpmGCExitTrap(pVM, VINF_EM_RESCHEDULE_REM, pRegFrame);
761	}
762	LogFlow(("trpmGCTrap0dHandlerRing3: CLI/STI -> #GP(0)\n"));
763	break;
764	}
765	}
766
767	/*
768	* A genuine guest fault.
769	*/
770	return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
771	}
772
773
774	/**
775	* Emulates RDTSC for the \#GP handler.
776	*
777	* @returns VINF_SUCCESS or VINF_EM_RAW_EMULATE_INSTR.
778	*
779	* @param pVM Pointer to the shared VM structure.
780	* @param pRegFrame Pointer to the registre frame for the trap.
781	* This will be updated on successful return.
782	*/
783	DECLINLINE(int) trpmGCTrap0dHandlerRdTsc(PVM pVM, PCPUMCTXCORE pRegFrame)
784	{
785	STAM_COUNTER_INC(&pVM->trpm.s.StatTrap0dRdTsc);
786
787	if (CPUMGetGuestCR4(pVM) & X86_CR4_TSD)
788	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame); /* will trap (optimize later). */
789
790	uint64_t uTicks = TMCpuTickGet(pVM);
791	pRegFrame->eax = uTicks;
792	pRegFrame->edx = uTicks >> 32;
793	pRegFrame->eip += 2;
794	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
795	}
796
797
798	/**
799	* \#GP (General Protection Fault) handler.
800	*
801	* @returns VBox status code.
802	* VINF_SUCCESS means we completely handled this trap,
803	* other codes are passed execution to host context.
804	*
805	* @param pVM The VM handle.
806	* @param pTrpm Pointer to TRPM data (within VM).
807	* @param pRegFrame Pointer to the register frame for the trap.
808	*/
809	static int trpmGCTrap0dHandler(PVM pVM, PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
810	{
811	LogFlow(("trpmGCTrap0dHandler: cs:eip=%RTsel:%08RX32 uErr=%RGv\n", pRegFrame->ss, pRegFrame->eip, pTrpm->uActiveErrorCode));
812
813	/*
814	* Convert and validate CS.
815	*/
816	STAM_PROFILE_START(&pVM->trpm.s.StatTrap0dDisasm, a);
817	RTGCPTR PC;
818	uint32_t cBits;
819	int rc = SELMValidateAndConvertCSAddrGCTrap(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs,
820	(RTGCPTR)pRegFrame->eip, &PC, &cBits);
821	if (RT_FAILURE(rc))
822	{
823	Log(("trpmGCTrap0dHandler: Failed to convert %RTsel:%RX32 (cpl=%d) - rc=%Rrc !!\n",
824	pRegFrame->cs, pRegFrame->eip, pRegFrame->ss & X86_SEL_RPL, rc));
825	STAM_PROFILE_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
826	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
827	}
828
829	/*
830	* Optimize RDTSC traps.
831	* Some guests (like Solaris) are using RDTSC all over the place and
832	* will end up trapping a lot because of that.
833	*/
834	if ( !pRegFrame->eflags.Bits.u1VM
835	&& ((uint8_t *)PC)[0] == 0x0f
836	&& ((uint8_t *)PC)[1] == 0x31)
837	{
838	STAM_PROFILE_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
839	return trpmGCTrap0dHandlerRdTsc(pVM, pRegFrame);
840	}
841
842	/*
843	* Disassemble the instruction.
844	*/
845	DISCPUSTATE Cpu;
846	uint32_t cbOp;
847	rc = DISCoreOneEx((RTGCUINTPTR)PC, cBits == 32 ? CPUMODE_32BIT : cBits == 16 ? CPUMODE_16BIT : CPUMODE_64BIT,
848	NULL, NULL, &Cpu, &cbOp);
849	if (RT_FAILURE(rc))
850	{
851	AssertMsgFailed(("DISCoreOneEx failed to PC=%RGv rc=%Rrc\n", PC, rc));
852	STAM_PROFILE_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
853	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
854	}
855	STAM_PROFILE_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
856
857	/*
858	* Deal with I/O port access.
859	*/
860	if ( pVM->trpm.s.uActiveErrorCode == 0
861	&& (Cpu.pCurInstr->optype & OPTYPE_PORTIO))
862	{
863	rc = EMInterpretPortIO(pVM, pRegFrame, &Cpu, cbOp);
864	return trpmGCExitTrap(pVM, rc, pRegFrame);
865	}
866
867	/*
868	* Deal with Ring-0 (privileged instructions)
869	*/
870	if ( (pRegFrame->ss & X86_SEL_RPL) <= 1
871	&& !pRegFrame->eflags.Bits.u1VM)
872	return trpmGCTrap0dHandlerRing0(pVM, pRegFrame, &Cpu, PC);
873
874	/*
875	* Deal with Ring-3 GPs.
876	*/
877	if (!pRegFrame->eflags.Bits.u1VM)
878	return trpmGCTrap0dHandlerRing3(pVM, pRegFrame, &Cpu, PC);
879
880	/*
881	* Deal with v86 code.
882	*
883	* We always set IOPL to zero which makes e.g. pushf fault in V86
884	* mode. The guest might use IOPL=3 and therefore not expect a #GP.
885	* Simply fall back to the recompiler to emulate this instruction if
886	* that's the case. To get the correct we must use CPUMRawGetEFlags.
887	*/
888	X86EFLAGS eflags;
889	eflags.u32 = CPUMRawGetEFlags(pVM, pRegFrame); /* Get the correct value. */
890	Log3(("TRPM #GP V86: cs:eip=%04x:%08x IOPL=%d efl=%08x\n", pRegFrame->cs, pRegFrame->eip, eflags.Bits.u2IOPL, eflags.u));
891	if (eflags.Bits.u2IOPL != 3)
892	{
893	Assert(eflags.Bits.u2IOPL == 0);
894
895	int rc = TRPMForwardTrap(pVM, pRegFrame, 0xD, 0, TRPM_TRAP_HAS_ERRORCODE, TRPM_TRAP, 0xd);
896	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
897	return trpmGCExitTrap(pVM, rc, pRegFrame);
898	}
899	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
900	}
901
902
903	/**
904	* \#GP (General Protection Fault) handler.
905	*
906	* @returns VBox status code.
907	* VINF_SUCCESS means we completely handled this trap,
908	* other codes are passed execution to host context.
909	*
910	* @param pTrpm Pointer to TRPM data (within VM).
911	* @param pRegFrame Pointer to the register frame for the trap.
912	* @internal
913	*/
914	DECLASM(int) TRPMGCTrap0dHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
915	{
916	LogFlow(("TRPMGC0d: %04x:%08x err=%x\n", pRegFrame->cs, pRegFrame->eip, (uint32_t)pTrpm->uActiveErrorCode));
917	PVM pVM = TRPM2VM(pTrpm);
918
919	int rc = trpmGCTrap0dHandler(pVM, pTrpm, pRegFrame);
920	switch (rc)
921	{
922	case VINF_EM_RAW_GUEST_TRAP:
923	case VINF_EM_RAW_EXCEPTION_PRIVILEGED:
924	if (PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip))
925	rc = VINF_PATM_PATCH_TRAP_GP;
926	break;
927
928	case VINF_EM_RAW_INTERRUPT_PENDING:
929	Assert(TRPMHasTrap(pVM));
930	/* no break; */
931	case VINF_PGM_SYNC_CR3: /** @todo Check this with Sander. */
932	case VINF_EM_RAW_EMULATE_INSTR:
933	case VINF_IOM_HC_IOPORT_READ:
934	case VINF_IOM_HC_IOPORT_WRITE:
935	case VINF_IOM_HC_MMIO_WRITE:
936	case VINF_IOM_HC_MMIO_READ:
937	case VINF_IOM_HC_MMIO_READ_WRITE:
938	case VINF_PATM_PATCH_INT3:
939	case VINF_EM_NO_MEMORY:
940	case VINF_EM_RAW_TO_R3:
941	case VINF_EM_RAW_TIMER_PENDING:
942	case VINF_EM_PENDING_REQUEST:
943	case VINF_EM_HALT:
944	case VINF_SUCCESS:
945	break;
946
947	default:
948	AssertMsg(PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip) == false, ("return code %d\n", rc));
949	break;
950	}
951	Log6(("TRPMGC0d: %Rrc (%04x:%08x)\n", rc, pRegFrame->cs, pRegFrame->eip));
952	return rc;
953	}
954
955
956	/**
957	* \#PF (Page Fault) handler.
958	*
959	* Calls PGM which does the actual handling.
960	*
961	*
962	* @returns VBox status code.
963	* VINF_SUCCESS means we completely handled this trap,
964	* other codes are passed execution to host context.
965	*
966	* @param pTrpm Pointer to TRPM data (within VM).
967	* @param pRegFrame Pointer to the register frame for the trap.
968	* @internal
969	*/
970	DECLASM(int) TRPMGCTrap0eHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
971	{
972	LogFlow(("TRPMGC0e: %04x:%08x err=%x cr2=%08x\n", pRegFrame->cs, pRegFrame->eip, (uint32_t)pTrpm->uActiveErrorCode, (uint32_t)pTrpm->uActiveCR2));
973	PVM pVM = TRPM2VM(pTrpm);
974
975
976	/*
977	* This is all PGM stuff.
978	*/
979	int rc = PGMTrap0eHandler(pVM, pTrpm->uActiveErrorCode, pRegFrame, (RTGCPTR)pTrpm->uActiveCR2);
980	switch (rc)
981	{
982	case VINF_EM_RAW_EMULATE_INSTR:
983	case VINF_EM_RAW_EMULATE_INSTR_PD_FAULT:
984	case VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT:
985	case VINF_EM_RAW_EMULATE_INSTR_TSS_FAULT:
986	case VINF_EM_RAW_EMULATE_INSTR_LDT_FAULT:
987	case VINF_EM_RAW_EMULATE_INSTR_IDT_FAULT:
988	if (PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip))
989	rc = VINF_PATCH_EMULATE_INSTR;
990	break;
991
992	case VINF_EM_RAW_GUEST_TRAP:
993	if (PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip))
994	return VINF_PATM_PATCH_TRAP_PF;
995
996	rc = TRPMForwardTrap(pVM, pRegFrame, 0xE, 0, TRPM_TRAP_HAS_ERRORCODE, TRPM_TRAP, 0xe);
997	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
998	break;
999
1000	case VINF_EM_RAW_INTERRUPT_PENDING:
1001	Assert(TRPMHasTrap(pVM));
1002	/* no break; */
1003	case VINF_IOM_HC_MMIO_READ:
1004	case VINF_IOM_HC_MMIO_WRITE:
1005	case VINF_IOM_HC_MMIO_READ_WRITE:
1006	case VINF_PATM_HC_MMIO_PATCH_READ:
1007	case VINF_PATM_HC_MMIO_PATCH_WRITE:
1008	case VINF_SUCCESS:
1009	case VINF_EM_RAW_TO_R3:
1010	case VINF_EM_PENDING_REQUEST:
1011	case VINF_EM_RAW_TIMER_PENDING:
1012	case VINF_EM_NO_MEMORY:
1013	case VINF_CSAM_PENDING_ACTION:
1014	case VINF_PGM_SYNC_CR3: /** @todo Check this with Sander. */
1015	break;
1016
1017	default:
1018	AssertMsg(PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip) == false, ("Patch address for return code %d. eip=%08x\n", rc, pRegFrame->eip));
1019	break;
1020	}
1021	rc = trpmGCExitTrap(pVM, rc, pRegFrame);
1022	Log6(("TRPMGC0e: %Rrc (%04x:%08x)\n", rc, pRegFrame->cs, pRegFrame->eip));
1023	return rc;
1024	}
1025
1026
1027	/**
1028	* Scans for the EIP in the specified array of trap handlers.
1029	*
1030	* If we don't fine the EIP, we'll panic.
1031	*
1032	* @returns VBox status code.
1033	*
1034	* @param pVM The VM handle.
1035	* @param pRegFrame Pointer to the register frame for the trap.
1036	* @param paHandlers The array of trap handler records.
1037	* @param pEndRecord The end record (exclusive).
1038	*/
1039	static int trpmGCHyperGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, PCTRPMGCHYPER paHandlers, PCTRPMGCHYPER pEndRecord)
1040	{
1041	uintptr_t uEip = (uintptr_t)pRegFrame->eip;
1042	Assert(paHandlers <= pEndRecord);
1043
1044	Log(("trpmGCHyperGeneric: uEip=%x %p-%p\n", uEip, paHandlers, pEndRecord));
1045
1046	#if 0 /// @todo later
1047	/*
1048	* Start by doing a kind of binary search.
1049	*/
1050	unsigned iStart = 0;
1051	unsigned iEnd = pEndRecord - paHandlers;
1052	unsigned i = iEnd / 2;
1053	#endif
1054
1055	/*
1056	* Do a linear search now (in case the array wasn't properly sorted).
1057	*/
1058	for (PCTRPMGCHYPER pCur = paHandlers; pCur < pEndRecord; pCur++)
1059	{
1060	if ( pCur->uStartEIP <= uEip
1061	&& (pCur->uEndEIP ? pCur->uEndEIP > uEip : pCur->uStartEIP == uEip))
1062	return pCur->pfnHandler(pVM, pRegFrame, pCur->uUser);
1063	}
1064
1065	return VERR_TRPM_DONT_PANIC;
1066	}
1067
1068
1069	/**
1070	* Hypervisor \#NP ((segment) Not Present) handler.
1071	*
1072	* Scans for the EIP in the registered trap handlers.
1073	*
1074	* @returns VBox status code.
1075	* VINF_SUCCESS means we completely handled this trap,
1076	* other codes are passed back to host context.
1077	*
1078	* @param pTrpm Pointer to TRPM data (within VM).
1079	* @param pRegFrame Pointer to the register frame for the trap.
1080	* @internal
1081	*/
1082	DECLASM(int) TRPMGCHyperTrap0bHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
1083	{
1084	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0bHandlers, g_aTrap0bHandlersEnd);
1085	}
1086
1087
1088	/**
1089	* Hypervisor \#GP (General Protection Fault) handler.
1090	*
1091	* Scans for the EIP in the registered trap handlers.
1092	*
1093	* @returns VBox status code.
1094	* VINF_SUCCESS means we completely handled this trap,
1095	* other codes are passed back to host context.
1096	*
1097	* @param pTrpm Pointer to TRPM data (within VM).
1098	* @param pRegFrame Pointer to the register frame for the trap.
1099	* @internal
1100	*/
1101	DECLASM(int) TRPMGCHyperTrap0dHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
1102	{
1103	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
1104	}
1105
1106
1107	/**
1108	* Hypervisor \#PF (Page Fault) handler.
1109	*
1110	* Scans for the EIP in the registered trap handlers.
1111	*
1112	* @returns VBox status code.
1113	* VINF_SUCCESS means we completely handled this trap,
1114	* other codes are passed back to host context.
1115	*
1116	* @param pTrpm Pointer to TRPM data (within VM).
1117	* @param pRegFrame Pointer to the register frame for the trap.
1118	* @internal
1119	*/
1120	DECLASM(int) TRPMGCHyperTrap0eHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
1121	{
1122	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
1123	}
1124
1125
1126	/**
1127	* Deal with hypervisor traps occuring when resuming execution on a trap.
1128	*
1129	* @returns VBox status code.
1130	* @param pVM The VM handle.
1131	* @param pRegFrame Register frame.
1132	* @param uUser User arg.
1133	*/
1134	DECLCALLBACK(int) trpmGCTrapInGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser)
1135	{
1136	Log(("********************************************************\n"));
1137	Log(("trpmGCTrapInGeneric: eip=%RX32 uUser=%#x\n", pRegFrame->eip, uUser));
1138	Log(("********************************************************\n"));
1139
1140	if (uUser & TRPM_TRAP_IN_HYPER)
1141	{
1142	/*
1143	* Check that there is still some stack left, if not we'll flag
1144	* a guru meditation (the alternative is a triple fault).
1145	*/
1146	RTRCUINTPTR cbStackUsed = (RTRCUINTPTR)VMMGetStackRC(pVM) - pRegFrame->esp;
1147	if (cbStackUsed > VMM_STACK_SIZE - _1K)
1148	{
1149	LogRel(("trpmGCTrapInGeneric: ran out of stack: esp=#x cbStackUsed=%#x\n", pRegFrame->esp, cbStackUsed));
1150	return VERR_TRPM_DONT_PANIC;
1151	}
1152
1153	/*
1154	* Just zero the register containing the selector in question.
1155	* We'll deal with the actual stale or troublesome selector value in
1156	* the outermost trap frame.
1157	*/
1158	switch (uUser & TRPM_TRAP_IN_OP_MASK)
1159	{
1160	case TRPM_TRAP_IN_MOV_GS:
1161	pRegFrame->eax = 0;
1162	pRegFrame->gs = 0; /* prevent recursive trouble. */
1163	break;
1164	case TRPM_TRAP_IN_MOV_FS:
1165	pRegFrame->eax = 0;
1166	pRegFrame->fs = 0; /* prevent recursive trouble. */
1167	return VINF_SUCCESS;
1168
1169	default:
1170	AssertMsgFailed(("Invalid uUser=%#x\n", uUser));
1171	return VERR_INTERNAL_ERROR;
1172	}
1173	}
1174	else
1175	{
1176	/*
1177	* Reconstruct the guest context and switch to the recompiler.
1178	* We ASSUME we're only at
1179	*/
1180	CPUMCTXCORE CtxCore = *pRegFrame;
1181	uint32_t pEsp = (uint32_t )pRegFrame->esp;
1182	int rc;
1183
1184	switch (uUser)
1185	{
1186	/*
1187	* This will only occur when resuming guest code in a trap handler!
1188	*/
1189	/* @note ASSUMES esp points to the temporary guest CPUMCTXCORE!!! */
1190	case TRPM_TRAP_IN_MOV_GS:
1191	case TRPM_TRAP_IN_MOV_FS:
1192	case TRPM_TRAP_IN_MOV_ES:
1193	case TRPM_TRAP_IN_MOV_DS:
1194	{
1195	PCPUMCTXCORE pTempGuestCtx = (PCPUMCTXCORE)pEsp;
1196
1197	/* Just copy the whole thing; several selector registers, eip (etc) and eax are not yet in pRegFrame. */
1198	CtxCore = *pTempGuestCtx;
1199	rc = VINF_EM_RAW_STALE_SELECTOR;
1200	break;
1201	}
1202
1203	/*
1204	* This will only occur when resuming guest code!
1205	*/
1206	case TRPM_TRAP_IN_IRET:
1207	CtxCore.eip = *pEsp++;
1208	CtxCore.cs = (RTSEL)*pEsp++;
1209	CtxCore.eflags.u32 = *pEsp++;
1210	CtxCore.esp = *pEsp++;
1211	CtxCore.ss = (RTSEL)*pEsp++;
1212	rc = VINF_EM_RAW_IRET_TRAP;
1213	break;
1214
1215	/*
1216	* This will only occur when resuming V86 guest code!
1217	*/
1218	case TRPM_TRAP_IN_IRET \| TRPM_TRAP_IN_V86:
1219	CtxCore.eip = *pEsp++;
1220	CtxCore.cs = (RTSEL)*pEsp++;
1221	CtxCore.eflags.u32 = *pEsp++;
1222	CtxCore.esp = *pEsp++;
1223	CtxCore.ss = (RTSEL)*pEsp++;
1224	CtxCore.es = (RTSEL)*pEsp++;
1225	CtxCore.ds = (RTSEL)*pEsp++;
1226	CtxCore.fs = (RTSEL)*pEsp++;
1227	CtxCore.gs = (RTSEL)*pEsp++;
1228	rc = VINF_EM_RAW_IRET_TRAP;
1229	break;
1230
1231	default:
1232	AssertMsgFailed(("Invalid uUser=%#x\n", uUser));
1233	return VERR_INTERNAL_ERROR;
1234	}
1235
1236
1237	CPUMSetGuestCtxCore(pVM, &CtxCore);
1238	TRPMGCHyperReturnToHost(pVM, rc);
1239	}
1240
1241	AssertMsgFailed(("Impossible!\n"));
1242	return VERR_INTERNAL_ERROR;
1243	}
1244

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source: vbox/trunk/src/VBox/VMM/VMMGC/TRPMGCHandlers.cpp@ 18876

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