VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMGC/TRPMGCHandlers.cpp@ 1995

Last change on this file since 1995 was 1981, checked in by vboxsync, 18 years ago

Arg. Forgot that EMInterpretInstructionCPU doesn't accept cpl != 0.

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1/* $Id: TRPMGCHandlers.cpp 1981 2007-04-06 21:20:43Z vboxsync $ */
2/** @file
3 * TRPM - Guest Context Trap Handlers, CPP part
4 */
5
6/*
7 * Copyright (C) 2006 InnoTek Systemberatung GmbH
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License as published by the Free Software Foundation,
13 * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14 * distribution. VirtualBox OSE is distributed in the hope that it will
15 * be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * If you received this file as part of a commercial VirtualBox
18 * distribution, then only the terms of your commercial VirtualBox
19 * license agreement apply instead of the previous paragraph.
20 */
21
22
23/*******************************************************************************
24* Header Files *
25*******************************************************************************/
26#define LOG_GROUP LOG_GROUP_TRPM
27#include <VBox/selm.h>
28#include <VBox/iom.h>
29#include <VBox/pgm.h>
30#include <VBox/pdm.h>
31#include <VBox/dbgf.h>
32#include <VBox/em.h>
33#include <VBox/csam.h>
34#include <VBox/patm.h>
35#include <VBox/mm.h>
36#include <VBox/cpum.h>
37#include "TRPMInternal.h"
38#include <VBox/vm.h>
39#include <VBox/param.h>
40
41#include <VBox/err.h>
42#include <VBox/dis.h>
43#include <VBox/disopcode.h>
44#include <VBox/x86.h>
45#include <VBox/log.h>
46#include <VBox/tm.h>
47#include <iprt/asm.h>
48#include <iprt/assert.h>
49
50/* still here. MODR/M byte parsing */
51#define X86_OPCODE_MODRM_MOD_MASK 0xc0
52#define X86_OPCODE_MODRM_REG_MASK 0x38
53#define X86_OPCODE_MODRM_RM_MASK 0x07
54
55/** Pointer to a readonly hypervisor trap record. */
56typedef const struct TRPMGCHYPER *PCTRPMGCHYPER;
57
58/**
59 * A hypervisor trap record.
60 * This contains information about a handler for a instruction range.
61 *
62 * @remark This must match what TRPM_HANDLER outputs.
63 */
64typedef struct TRPMGCHYPER
65{
66 /** The start address. */
67 uintptr_t uStartEIP;
68 /** The end address. (exclusive)
69 * If NULL the it's only for the instruction at pvStartEIP. */
70 uintptr_t uEndEIP;
71 /**
72 * The handler.
73 *
74 * @returns VBox status code
75 * VINF_SUCCESS means we've handled the trap.
76 * Any other error code means returning to the host context.
77 * @param pVM The VM handle.
78 * @param pRegFrame The register frame.
79 * @param uUser The user argument.
80 */
81 DECLCALLBACKMEMBER(int, pfnHandler)(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser);
82 /** Whatever the handler desires to put here. */
83 uintptr_t uUser;
84} TRPMGCHYPER;
85
86
87/*******************************************************************************
88* Global Variables *
89*******************************************************************************/
90__BEGIN_DECLS
91/** Defined in VMMGC0.asm or VMMGC99.asm.
92 * @{ */
93extern const TRPMGCHYPER g_aTrap0bHandlers[1];
94extern const TRPMGCHYPER g_aTrap0bHandlersEnd[1];
95extern const TRPMGCHYPER g_aTrap0dHandlers[1];
96extern const TRPMGCHYPER g_aTrap0dHandlersEnd[1];
97extern const TRPMGCHYPER g_aTrap0eHandlers[1];
98extern const TRPMGCHYPER g_aTrap0eHandlersEnd[1];
99/** @} */
100__END_DECLS
101
102
103/*******************************************************************************
104* Internal Functions *
105*******************************************************************************/
106__BEGIN_DECLS /* addressed from asm (not called so no DECLASM). */
107DECLCALLBACK(int) trpmGCTrapInGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser);
108__END_DECLS
109
110
111
112/**
113 * Exits the trap, called when exiting a trap handler.
114 *
115 * Will reset the trap if it's not a guest trap or the trap
116 * is already handled. Will process resume guest FFs.
117 *
118 * @returns rc.
119 * @param pVM VM handle.
120 * @param rc The VBox status code to return.
121 * @param pRegFrame Pointer to the register frame for the trap.
122 */
123static int trpmGCExitTrap(PVM pVM, int rc, PCPUMCTXCORE pRegFrame)
124{
125 uint32_t uOldActiveVector = pVM->trpm.s.uActiveVector;
126 NOREF(uOldActiveVector);
127
128 /* Reset trap? */
129 if ( rc != VINF_EM_RAW_GUEST_TRAP
130 && rc != VINF_EM_RAW_RING_SWITCH_INT)
131 pVM->trpm.s.uActiveVector = ~0;
132
133#ifdef VBOX_HIGH_RES_TIMERS_HACK
134 /*
135 * Occationally we should poll timers.
136 * We must *NOT* do this too frequently as it adds a significant overhead
137 * and it'll kill us if the trap load is high. (See #1354.)
138 * (The heuristic is not very intelligent, we should really check trap
139 * frequency etc. here, but alas, we lack any such information atm.)
140 */
141 static unsigned s_iTimerPoll = 0;
142 if (rc == VINF_SUCCESS)
143 {
144 if (!(++s_iTimerPoll & 0xf))
145 {
146 uint64_t cTicks = TMTimerPoll(pVM); NOREF(cTicks);
147 Log2(("TMTimerPoll at %VGv returned %RX64 (VM_FF_TIMER=%d)\n", pRegFrame->eip, cTicks, VM_FF_ISPENDING(pVM, VM_FF_TIMER)));
148 }
149 }
150 else
151 s_iTimerPoll = 0;
152#endif
153
154 /* Clear pending inhibit interrupt state if required. (necessary for dispatching interrupts later on) */
155 if (VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS))
156 {
157 Log2(("VM_FF_INHIBIT_INTERRUPTS at %VGv successor %VGv\n", pRegFrame->eip, EMGetInhibitInterruptsPC(pVM)));
158 if (pRegFrame->eip != EMGetInhibitInterruptsPC(pVM))
159 {
160 /** @note we intentionally don't clear VM_FF_INHIBIT_INTERRUPTS here if the eip is the same as the inhibited instr address.
161 * Before we are able to execute this instruction in raw mode (iret to guest code) an external interrupt might
162 * force a world switch again. Possibly allowing a guest interrupt to be dispatched in the process. This could
163 * break the guest. Sounds very unlikely, but such timing sensitive problem are not as rare as you might think.
164 */
165 VM_FF_CLEAR(pVM, VM_FF_INHIBIT_INTERRUPTS);
166 }
167 }
168
169 /*
170 * Pending resume-guest-FF?
171 * Or pending (A)PIC interrupt? Windows XP will crash if we delay APIC interrupts.
172 */
173 if ( rc == VINF_SUCCESS
174 && VM_FF_ISPENDING(pVM, VM_FF_TO_R3 | VM_FF_TIMER | VM_FF_INTERRUPT_APIC | VM_FF_INTERRUPT_PIC | VM_FF_PGM_SYNC_CR3 | VM_FF_PGM_SYNC_CR3_NON_GLOBAL | VM_FF_REQUEST))
175 {
176 /* Pending Ring-3 action. */
177 if (VM_FF_ISPENDING(pVM, VM_FF_TO_R3))
178 {
179 VM_FF_CLEAR(pVM, VM_FF_TO_R3);
180 rc = VINF_EM_RAW_TO_R3;
181 }
182 /* Pending timer action. */
183 else if (VM_FF_ISPENDING(pVM, VM_FF_TIMER))
184 rc = VINF_EM_RAW_TIMER_PENDING;
185 /* Pending interrupt: dispatch it. */
186 else if ( VM_FF_ISPENDING(pVM, VM_FF_INTERRUPT_APIC | VM_FF_INTERRUPT_PIC)
187 && !VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS)
188 && PATMAreInterruptsEnabledByCtxCore(pVM, pRegFrame)
189 )
190 {
191 uint8_t u8Interrupt;
192 rc = PDMGetInterrupt(pVM, &u8Interrupt);
193 Log(("trpmGCExitTrap: u8Interrupt=%d (%#x) rc=%Vrc\n", u8Interrupt, u8Interrupt, rc));
194 AssertFatalMsgRC(rc, ("PDMGetInterrupt failed with %Vrc\n", rc));
195 rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)u8Interrupt, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_HARDWARE_INT);
196 /* can't return if successful */
197 Assert(rc != VINF_SUCCESS);
198
199 /* Stop the profile counter that was started in TRPMGCHandlersA.asm */
200 Assert(uOldActiveVector <= 16);
201 STAM_PROFILE_ADV_STOP(&pVM->trpm.s.aStatGCTraps[uOldActiveVector], a);
202
203 /* Assert the trap and go to the recompiler to dispatch it. */
204 TRPMAssertTrap(pVM, u8Interrupt, false);
205
206 STAM_PROFILE_ADV_START(&pVM->trpm.s.aStatGCTraps[uOldActiveVector], a);
207 rc = VINF_EM_RAW_INTERRUPT_PENDING;
208 }
209 /*
210 * Try sync CR3?
211 * This ASSUMES that the MOV CRx, x emulation doesn't return with VINF_PGM_SYNC_CR3. (a bit hackish)
212 */
213 else if (VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 | VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
214#if 1
215 rc = PGMSyncCR3(pVM, CPUMGetGuestCR0(pVM), CPUMGetGuestCR3(pVM), CPUMGetGuestCR4(pVM), VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3));
216#else
217 rc = VINF_PGM_SYNC_CR3;
218#endif
219 /* Pending request packets might contain actions that need immediate attention, such as pending hardware interrupts. */
220 else if (VM_FF_ISPENDING(pVM, VM_FF_REQUEST))
221 rc = VINF_EM_PENDING_REQUEST;
222 }
223
224 AssertMsg( rc != VINF_SUCCESS
225 || ( pRegFrame->eflags.Bits.u1IF
226 && ( pRegFrame->eflags.Bits.u2IOPL < (unsigned)(pRegFrame->ss & X86_SEL_RPL) || pRegFrame->eflags.Bits.u1VM))
227 , ("rc = %VGv\neflags=%RX32 ss=%RTsel IOPL=%d\n", rc, pRegFrame->eflags.u32, pRegFrame->ss, pRegFrame->eflags.Bits.u2IOPL));
228 return rc;
229}
230
231
232/**
233 * \#DB (Debug event) handler.
234 *
235 * @returns VBox status code.
236 * VINF_SUCCESS means we completely handled this trap,
237 * other codes are passed execution to host context.
238 *
239 * @param pTrpm Pointer to TRPM data (within VM).
240 * @param pRegFrame Pointer to the register frame for the trap.
241 * @internal
242 */
243DECLASM(int) TRPMGCTrap01Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
244{
245 RTGCUINTREG uDr6 = ASMGetAndClearDR6();
246 PVM pVM = TRPM2VM(pTrpm);
247 LogFlow(("TRPMGCTrap01Handler: cs:eip=%04x:%08x uDr6=%RTreg\n", pRegFrame->cs, pRegFrame->eip, uDr6));
248
249 /*
250 * We currently don't make sure of the X86_DR7_GD bit, but
251 * there might come a time when we do.
252 */
253 if ((uDr6 & X86_DR6_BD) == X86_DR6_BD)
254 {
255 AssertReleaseMsgFailed(("X86_DR6_BD isn't used, but it's set! dr7=%RTreg(%RTreg) dr6=%RTreg\n",
256 ASMGetDR7(), CPUMGetHyperDR7(pVM), uDr6));
257 return VERR_NOT_IMPLEMENTED;
258 }
259
260 AssertReleaseMsg(!(uDr6 & X86_DR6_BT), ("X86_DR6_BT is impossible!\n"));
261
262 /*
263 * Now leave the rest to the DBGF.
264 */
265 int rc = DBGFGCTrap01Handler(pVM, pRegFrame, uDr6);
266 if (rc == VINF_EM_RAW_GUEST_TRAP)
267 CPUMSetGuestDR6(pVM, uDr6);
268
269 return trpmGCExitTrap(pVM, rc, pRegFrame);
270}
271
272
273
274/**
275 * NMI handler, for when we are using NMIs to debug things.
276 *
277 * @returns VBox status code.
278 * VINF_SUCCESS means we completely handled this trap,
279 * other codes are passed execution to host context.
280 *
281 * @param pTrpm Pointer to TRPM data (within VM).
282 * @param pRegFrame Pointer to the register frame for the trap.
283 * @internal
284 * @remark This is not hooked up unless you're building with VBOX_WITH_NMI defined.
285 */
286DECLASM(int) TRPMGCTrap02Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
287{
288 LogFlow(("TRPMGCTrap02Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
289 RTLogComPrintf("TRPMGCTrap02Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip);
290 return VERR_TRPM_DONT_PANIC;
291}
292
293
294/**
295 * \#BP (Breakpoint) handler.
296 *
297 * @returns VBox status code.
298 * VINF_SUCCESS means we completely handled this trap,
299 * other codes are passed execution to host context.
300 *
301 * @param pTrpm Pointer to TRPM data (within VM).
302 * @param pRegFrame Pointer to the register frame for the trap.
303 * @internal
304 */
305DECLASM(int) TRPMGCTrap03Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
306{
307 LogFlow(("TRPMGCTrap03Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
308 PVM pVM = TRPM2VM(pTrpm);
309 int rc;
310
311 /*
312 * Both PATM are using INT3s, let them have a go first.
313 */
314 if ( (pRegFrame->ss & X86_SEL_RPL) == 1
315 && !pRegFrame->eflags.Bits.u1VM)
316 {
317 rc = PATMHandleInt3PatchTrap(pVM, pRegFrame);
318 if (rc == VINF_SUCCESS || rc == VINF_EM_RAW_EMULATE_INSTR || rc == VINF_PATM_PATCH_INT3 || rc == VINF_PATM_DUPLICATE_FUNCTION)
319 return trpmGCExitTrap(pVM, rc, pRegFrame);
320 }
321 rc = DBGFGCTrap03Handler(pVM, pRegFrame);
322 /* anything we should do with this? Schedule it in GC? */
323 return trpmGCExitTrap(pVM, rc, pRegFrame);
324}
325
326
327/**
328 * Trap handler for illegal opcode fault (\#UD).
329 *
330 * @returns VBox status code.
331 * VINF_SUCCESS means we completely handled this trap,
332 * other codes are passed execution to host context.
333 *
334 * @param pTrpm Pointer to TRPM data (within VM).
335 * @param pRegFrame Pointer to the register frame for the trap.
336 * @internal
337 */
338DECLASM(int) TRPMGCTrap06Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
339{
340 PVM pVM = TRPM2VM(pTrpm);
341 int rc;
342
343 LogFlow(("TRPMGCTrap06Handler %VGv eflags=%x\n", pRegFrame->eip, pRegFrame->eflags.u32));
344
345 if ( (pRegFrame->ss & X86_SEL_RPL) == 1
346 && !pRegFrame->eflags.Bits.u1VM
347 && PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
348 {
349 /*
350 * Decode the instruction.
351 */
352 RTGCPTR PC;
353 rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &PC);
354 if (VBOX_FAILURE(rc))
355 {
356 Log(("TRPMGCTrap06Handler: Failed to convert %RTsel:%RX32 (cpl=%d) - rc=%Vrc !!\n", pRegFrame->cs, pRegFrame->eip, pRegFrame->ss & X86_SEL_RPL, rc));
357 return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
358 }
359
360 DISCPUSTATE Cpu;
361 uint32_t cbOp;
362 rc = EMInterpretDisasOneEx(pVM, (RTGCUINTPTR)PC, pRegFrame, &Cpu, &cbOp);
363 if (VBOX_FAILURE(rc))
364 return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
365
366 /** @note monitor causes an #UD exception instead of #GP when not executed in ring 0. */
367 if (Cpu.pCurInstr->opcode == OP_ILLUD2)
368 {
369 rc = PATMGCHandleIllegalInstrTrap(pVM, pRegFrame);
370 if (rc == VINF_SUCCESS || rc == VINF_EM_RAW_EMULATE_INSTR || rc == VINF_PATM_DUPLICATE_FUNCTION || rc == VINF_PATM_PENDING_IRQ_AFTER_IRET || rc == VINF_EM_RESCHEDULE)
371 return trpmGCExitTrap(pVM, rc, pRegFrame);
372 }
373 /* Never generate a raw trap here; it might be a monitor instruction, that requires emulation. */
374 rc = VINF_EM_RAW_EMULATE_INSTR;
375 }
376 else if (pRegFrame->eflags.Bits.u1VM)
377 {
378 rc = TRPMForwardTrap(pVM, pRegFrame, 0x6, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_TRAP);
379 Assert(rc == VINF_EM_RAW_GUEST_TRAP);
380 }
381 else
382 /* Never generate a raw trap here; it might be a monitor instruction, that requires emulation. */
383 rc = VINF_EM_RAW_EMULATE_INSTR;
384
385 return trpmGCExitTrap(pVM, rc, pRegFrame);
386}
387
388
389/**
390 * Trap handler for device not present fault (\#NM).
391 *
392 * Device not available, FP or (F)WAIT instruction.
393 *
394 * @returns VBox status code.
395 * VINF_SUCCESS means we completely handled this trap,
396 * other codes are passed execution to host context.
397 *
398 * @param pTrpm Pointer to TRPM data (within VM).
399 * @param pRegFrame Pointer to the register frame for the trap.
400 * @internal
401 */
402DECLASM(int) TRPMGCTrap07Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
403{
404 PVM pVM = TRPM2VM(pTrpm);
405
406 LogFlow(("TRPMTrap07HandlerGC: eip=%VGv\n", pRegFrame->eip));
407 return CPUMHandleLazyFPU(pVM);
408}
409
410
411/**
412 * \#NP ((segment) Not Present) handler.
413 *
414 * @returns VBox status code.
415 * VINF_SUCCESS means we completely handled this trap,
416 * other codes are passed execution to host context.
417 *
418 * @param pTrpm Pointer to TRPM data (within VM).
419 * @param pRegFrame Pointer to the register frame for the trap.
420 * @internal
421 */
422DECLASM(int) TRPMGCTrap0bHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
423{
424 LogFlow(("TRPMGCTrap0bHandler: eip=%VGv\n", pRegFrame->eip));
425 PVM pVM = TRPM2VM(pTrpm);
426
427 /*
428 * Try to detect instruction by opcode which caused trap.
429 * XXX note: this code may cause \#PF (trap e) or \#GP (trap d) while
430 * accessing user code. need to handle it somehow in future!
431 */
432 uint8_t *pu8Code;
433 if (SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, (PRTGCPTR)&pu8Code) == VINF_SUCCESS)
434 {
435 /*
436 * First skip possible instruction prefixes, such as:
437 * OS, AS
438 * CS:, DS:, ES:, SS:, FS:, GS:
439 * REPE, REPNE
440 *
441 * note: Currently we supports only up to 4 prefixes per opcode, more
442 * prefixes (normally not used anyway) will cause trap d in guest.
443 * note: Instruction length in IA-32 may be up to 15 bytes, we dont
444 * check this issue, its too hard.
445 */
446 for (unsigned i = 0; i < 4; i++)
447 {
448 if ( pu8Code[0] != 0xf2 /* REPNE/REPNZ */
449 && pu8Code[0] != 0xf3 /* REP/REPE/REPZ */
450 && pu8Code[0] != 0x2e /* CS: */
451 && pu8Code[0] != 0x36 /* SS: */
452 && pu8Code[0] != 0x3e /* DS: */
453 && pu8Code[0] != 0x26 /* ES: */
454 && pu8Code[0] != 0x64 /* FS: */
455 && pu8Code[0] != 0x65 /* GS: */
456 && pu8Code[0] != 0x66 /* OS */
457 && pu8Code[0] != 0x67 /* AS */
458 )
459 break;
460 pu8Code++;
461 }
462
463 /*
464 * Detect right switch using a callgate.
465 *
466 * We recognize the following causes for the trap 0b:
467 * CALL FAR, CALL FAR []
468 * JMP FAR, JMP FAR []
469 * IRET (may cause a task switch)
470 *
471 * Note: we can't detect whether the trap was caused by a call to a
472 * callgate descriptor or it is a real trap 0b due to a bad selector.
473 * In both situations we'll pass execution to our recompiler so we don't
474 * have to worry.
475 * If we wanted to do better detection, we have set GDT entries to callgate
476 * descriptors pointing to our own handlers.
477 */
478 /** @todo not sure about IRET, may generate Trap 0d (\#GP), NEED TO CHECK! */
479 if ( pu8Code[0] == 0x9a /* CALL FAR */
480 || ( pu8Code[0] == 0xff /* CALL FAR [] */
481 && (pu8Code[1] & X86_OPCODE_MODRM_REG_MASK) == 0x18)
482 || pu8Code[0] == 0xea /* JMP FAR */
483 || ( pu8Code[0] == 0xff /* JMP FAR [] */
484 && (pu8Code[1] & X86_OPCODE_MODRM_REG_MASK) == 0x28)
485 || pu8Code[0] == 0xcf /* IRET */
486 )
487 {
488 /*
489 * Got potential call to callgate.
490 * We simply return execution to the recompiler to do emulation
491 * starting from the instruction which caused the trap.
492 */
493 pTrpm->uActiveVector = ~0;
494 return VINF_EM_RAW_RING_SWITCH;
495 }
496 }
497
498 /*
499 * Pass trap 0b as is to the recompiler in all other cases.
500 */
501 return VINF_EM_RAW_GUEST_TRAP;
502}
503
504
505/**
506 * \#GP (General Protection Fault) handler for Ring-0 privileged instructions.
507 *
508 * @returns VBox status code.
509 * VINF_SUCCESS means we completely handled this trap,
510 * other codes are passed execution to host context.
511 *
512 * @param pVM The VM handle.
513 * @param pRegFrame Pointer to the register frame for the trap.
514 * @param pCpu The opcode info.
515 * @param PC The program counter corresponding to cs:eip in pRegFrame.
516 */
517static int trpmGCTrap0dHandlerRing0(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, RTGCPTR PC)
518{
519 int rc;
520
521 /*
522 * Try handle it here, if not return to HC and emulate/interpret it there.
523 */
524 switch (pCpu->pCurInstr->opcode)
525 {
526 case OP_INT3:
527 /*
528 * Little hack to make the code below not fail
529 */
530 pCpu->param1.flags = USE_IMMEDIATE8;
531 pCpu->param1.parval = 3;
532 /* fallthru */
533 case OP_INT:
534 {
535 Assert(pCpu->param1.flags & USE_IMMEDIATE8);
536 Assert(!(PATMIsPatchGCAddr(pVM, PC)));
537 if (pCpu->param1.parval == 3)
538 {
539 /* Obsolete!! */
540 /* Int 3 replacement patch? */
541 if (PATMHandleInt3PatchTrap(pVM, pRegFrame) == VINF_SUCCESS)
542 {
543 AssertFailed();
544 return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
545 }
546 }
547 rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT);
548 if (VBOX_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
549 return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
550
551 pVM->trpm.s.uActiveVector = (pVM->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
552 pVM->trpm.s.fActiveSoftwareInterrupt = true;
553 return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH_INT, pRegFrame);
554 }
555
556#ifdef PATM_EMULATE_SYSENTER
557 case OP_SYSEXIT:
558 case OP_SYSRET:
559 rc = PATMSysCall(pVM, pRegFrame, pCpu);
560 return trpmGCExitTrap(pVM, rc, pRegFrame);
561#endif
562
563 case OP_HLT:
564 /* If it's in patch code, defer to ring-3. */
565 if (PATMIsPatchGCAddr(pVM, PC))
566 break;
567
568 pRegFrame->eip += pCpu->opsize;
569 return trpmGCExitTrap(pVM, VINF_EM_HALT, pRegFrame);
570
571
572 /*
573 * These instructions are used by PATM and CASM for finding
574 * dangerous non-trapping instructions. Thus, since all
575 * scanning and patching is done in ring-3 we'll have to
576 * return to ring-3 on the first encounter of these instructions.
577 */
578 case OP_MOV_CR:
579 case OP_MOV_DR:
580 /* We can safely emulate control/debug register move instructions in patched code. */
581 if ( !PATMIsPatchGCAddr(pVM, PC)
582 && !CSAMIsKnownDangerousInstr(pVM, PC))
583 break;
584 case OP_INVLPG:
585 case OP_LLDT:
586 case OP_STI:
587 case OP_RDTSC:
588 {
589 uint32_t cbIgnored;
590 rc = EMInterpretInstructionCPU(pVM, pCpu, pRegFrame, PC, &cbIgnored);
591 if (VBOX_SUCCESS(rc))
592 pRegFrame->eip += pCpu->opsize;
593 else if (rc == VERR_EM_INTERPRETER)
594 rc = VINF_EM_RAW_EXCEPTION_PRIVILEGED;
595 return trpmGCExitTrap(pVM, rc, pRegFrame);
596 }
597 }
598
599 return trpmGCExitTrap(pVM, VINF_EM_RAW_EXCEPTION_PRIVILEGED, pRegFrame);
600}
601
602
603/**
604 * \#GP (General Protection Fault) handler for Ring-3.
605 *
606 * @returns VBox status code.
607 * VINF_SUCCESS means we completely handled this trap,
608 * other codes are passed execution to host context.
609 *
610 * @param pVM The VM handle.
611 * @param pRegFrame Pointer to the register frame for the trap.
612 * @param pCpu The opcode info.
613 * @param PC The program counter corresponding to cs:eip in pRegFrame.
614 */
615static int trpmGCTrap0dHandlerRing3(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, RTGCPTR PC)
616{
617 int rc;
618
619 Assert(!pRegFrame->eflags.Bits.u1VM);
620
621 switch (pCpu->pCurInstr->opcode)
622 {
623 /*
624 * STI and CLI are I/O privileged, i.e. if IOPL
625 */
626 case OP_STI:
627 case OP_CLI:
628 {
629 uint32_t efl = CPUMRawGetEFlags(pVM, pRegFrame);
630 if (X86_EFL_GET_IOPL(efl) >= (unsigned)(pRegFrame->ss & X86_SEL_RPL))
631 {
632 LogFlow(("trpmGCTrap0dHandlerRing3: CLI/STI -> REM\n"));
633 return trpmGCExitTrap(pVM, VINF_EM_RESCHEDULE_REM, pRegFrame);
634 }
635 LogFlow(("trpmGCTrap0dHandlerRing3: CLI/STI -> #GP(0)\n"));
636 break;
637 }
638
639 /*
640 * INT3 and INT xx are ring-switching.
641 * (The shadow IDT will have set the entries to DPL=0, that's why we're here.)
642 */
643 case OP_INT3:
644 /*
645 * Little hack to make the code below not fail
646 */
647 pCpu->param1.flags = USE_IMMEDIATE8;
648 pCpu->param1.parval = 3;
649 /* fall thru */
650 case OP_INT:
651 {
652 Assert(pCpu->param1.flags & USE_IMMEDIATE8);
653 rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT);
654 if (VBOX_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
655 return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
656
657 pVM->trpm.s.uActiveVector = (pVM->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
658 pVM->trpm.s.fActiveSoftwareInterrupt = true;
659 return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH_INT, pRegFrame);
660 }
661
662 /*
663 * SYSCALL, SYSENTER, INTO and BOUND are also ring-switchers.
664 */
665 case OP_SYSCALL:
666 case OP_SYSENTER:
667#ifdef PATM_EMULATE_SYSENTER
668 rc = PATMSysCall(pVM, pRegFrame, pCpu);
669 if (rc == VINF_SUCCESS)
670 return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
671 /* else no break; */
672#endif
673 case OP_BOUND:
674 case OP_INTO:
675 pVM->trpm.s.uActiveVector = ~0;
676 return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH, pRegFrame);
677
678 /*
679 * Handle virtualized TSC reads.
680 * (EMInterpretInstructionCPU isn't usable here because it rejects cpl != 0.)
681 */
682 case OP_RDTSC:
683 {
684 /** @todo statistics */
685 if (CPUMGetGuestCR4(pVM) & X86_CR4_TSD)
686 rc = VINF_EM_RAW_EMULATE_INSTR;
687 else
688 {
689 uint64_t Tsc = TMCpuTickGet(pVM);
690 pRegFrame->eax = Tsc;
691 pRegFrame->edx = Tsc >> 32;
692 pRegFrame->eip += pCpu->opsize;
693 rc = VINF_SUCCESS;
694 }
695 return trpmGCExitTrap(pVM, rc, pRegFrame);
696 }
697 }
698
699 /*
700 * A genuine guest fault.
701 */
702 return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
703}
704
705
706/**
707 * \#GP (General Protection Fault) handler.
708 *
709 * @returns VBox status code.
710 * VINF_SUCCESS means we completely handled this trap,
711 * other codes are passed execution to host context.
712 *
713 * @param pVM The VM handle.
714 * @param pTrpm Pointer to TRPM data (within VM).
715 * @param pRegFrame Pointer to the register frame for the trap.
716 */
717static int trpmGCTrap0dHandler(PVM pVM, PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
718{
719 LogFlow(("trpmGCTrap0dHandler: cs:eip=%RTsel:%VGv uErr=%RX32\n", pRegFrame->ss, pRegFrame->eip, pTrpm->uActiveErrorCode));
720
721#if 0 /* not right for iret. Shouldn't really be needed as SELMValidateAndConvertCSAddr deals with invalid cs. */
722 /*
723 * Filter out selector problems first as these may mean that the
724 * instruction isn't safe to read. If we're here because CS is NIL
725 * the flattening of cs:eip will deal with that.
726 */
727 if ( !(pTrpm->uActiveErrorCode & (X86_TRAP_ERR_IDT | X86_TRAP_ERR_EXTERNAL))
728 && (pTrpm->uActiveErrorCode & X86_TRAP_ERR_SEL_MASK))
729 {
730 /* It's a guest trap. */
731 return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
732 }
733#endif
734
735 STAM_PROFILE_ADV_START(&pVM->trpm.s.StatTrap0dDisasm, a);
736 /*
737 * Decode the instruction.
738 */
739 RTGCPTR PC;
740 int rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &PC);
741 if (VBOX_FAILURE(rc))
742 {
743 Log(("trpmGCTrap0dHandler: Failed to convert %RTsel:%RX32 (cpl=%d) - rc=%Vrc !!\n",
744 pRegFrame->cs, pRegFrame->eip, pRegFrame->ss & X86_SEL_RPL, rc));
745 STAM_PROFILE_ADV_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
746 return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
747 }
748
749 DISCPUSTATE Cpu;
750 uint32_t cbOp;
751 rc = EMInterpretDisasOneEx(pVM, (RTGCUINTPTR)PC, pRegFrame, &Cpu, &cbOp);
752 if (VBOX_FAILURE(rc))
753 {
754 STAM_PROFILE_ADV_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
755 return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
756 }
757 STAM_PROFILE_ADV_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
758
759 /*
760 * Deal with I/O port access.
761 */
762 if ( pVM->trpm.s.uActiveErrorCode == 0
763 && (Cpu.pCurInstr->optype & OPTYPE_PORTIO))
764 {
765 rc = EMInterpretPortIO(pVM, pRegFrame, &Cpu, cbOp);
766 return trpmGCExitTrap(pVM, rc, pRegFrame);
767 }
768
769
770 /*
771 * Deal with Ring-0 (privileged instructions)
772 */
773 if ( (pRegFrame->ss & X86_SEL_RPL) <= 1
774 && !pRegFrame->eflags.Bits.u1VM)
775 return trpmGCTrap0dHandlerRing0(pVM, pRegFrame, &Cpu, PC);
776
777 /*
778 * Deal with Ring-3 GPs.
779 */
780 if (!pRegFrame->eflags.Bits.u1VM)
781 return trpmGCTrap0dHandlerRing3(pVM, pRegFrame, &Cpu, PC);
782
783 /*
784 * Deal with v86 code.
785 */
786
787 /* We always set IOPL to zero which makes e.g. pushf fault in V86 mode. The guest might use IOPL=3 and therefor not expect a #GP.
788 * Simply fall back to the recompiler to emulate this instruction.
789 */
790 /* Retrieve the eflags including the virtualized bits. */
791 /** @note hackish as the cpumctxcore structure doesn't contain the right value */
792 X86EFLAGS eflags;
793 eflags.u32 = CPUMRawGetEFlags(pVM, pRegFrame);
794 if (eflags.Bits.u2IOPL != 3)
795 {
796 Assert(eflags.Bits.u2IOPL == 0);
797
798 int rc = TRPMForwardTrap(pVM, pRegFrame, 0xD, 0, TRPM_TRAP_HAS_ERRORCODE, TRPM_TRAP);
799 Assert(rc == VINF_EM_RAW_GUEST_TRAP);
800 return trpmGCExitTrap(pVM, rc, pRegFrame);
801 }
802 return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
803}
804
805
806/**
807 * \#GP (General Protection Fault) handler.
808 *
809 * @returns VBox status code.
810 * VINF_SUCCESS means we completely handled this trap,
811 * other codes are passed execution to host context.
812 *
813 * @param pTrpm Pointer to TRPM data (within VM).
814 * @param pRegFrame Pointer to the register frame for the trap.
815 * @internal
816 */
817DECLASM(int) TRPMGCTrap0dHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
818{
819 LogFlow(("TRPMGCTrap0dHandler: eip=%RGv\n", pRegFrame->eip));
820 PVM pVM = TRPM2VM(pTrpm);
821
822 int rc = trpmGCTrap0dHandler(pVM, pTrpm, pRegFrame);
823 switch (rc)
824 {
825 case VINF_EM_RAW_GUEST_TRAP:
826 case VINF_EM_RAW_EXCEPTION_PRIVILEGED:
827 if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
828 rc = VINF_PATM_PATCH_TRAP_GP;
829 break;
830
831 case VINF_EM_RAW_INTERRUPT_PENDING:
832 Assert(TRPMHasTrap(pVM));
833 /* no break; */
834 case VINF_PGM_SYNC_CR3: /** @todo Check this with Sander. */
835 case VINF_IOM_HC_IOPORT_READWRITE:
836 case VINF_IOM_HC_IOPORT_READ:
837 case VINF_IOM_HC_IOPORT_WRITE:
838 case VINF_IOM_HC_MMIO_WRITE:
839 case VINF_IOM_HC_MMIO_READ:
840 case VINF_IOM_HC_MMIO_READ_WRITE:
841 case VINF_PATM_PATCH_INT3:
842 case VINF_EM_RAW_TO_R3:
843 case VINF_EM_RAW_TIMER_PENDING:
844 case VINF_EM_PENDING_REQUEST:
845 case VINF_EM_HALT:
846 case VINF_SUCCESS:
847 break;
848
849 default:
850 AssertMsg(PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip) == false, ("return code %d\n", rc));
851 break;
852 }
853 return rc;
854}
855
856/**
857 * \#PF (Page Fault) handler.
858 *
859 * Calls PGM which does the actual handling.
860 *
861 *
862 * @returns VBox status code.
863 * VINF_SUCCESS means we completely handled this trap,
864 * other codes are passed execution to host context.
865 *
866 * @param pTrpm Pointer to TRPM data (within VM).
867 * @param pRegFrame Pointer to the register frame for the trap.
868 * @internal
869 */
870DECLASM(int) TRPMGCTrap0eHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
871{
872 LogBird(("TRPMGCTrap0eHandler: eip=%RGv\n", pRegFrame->eip));
873 PVM pVM = TRPM2VM(pTrpm);
874
875 /*
876 * This is all PGM stuff.
877 */
878 int rc = PGMTrap0eHandler(pVM, pTrpm->uActiveErrorCode, pRegFrame, (RTGCPTR)pTrpm->uActiveCR2);
879
880 switch (rc)
881 {
882 case VINF_EM_RAW_EMULATE_INSTR:
883 case VINF_EM_RAW_EMULATE_INSTR_PD_FAULT:
884 case VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT:
885 case VINF_EM_RAW_EMULATE_INSTR_TSS_FAULT:
886 case VINF_EM_RAW_EMULATE_INSTR_LDT_FAULT:
887 case VINF_EM_RAW_EMULATE_INSTR_IDT_FAULT:
888 if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
889 rc = VINF_PATCH_EMULATE_INSTR;
890 break;
891
892 case VINF_EM_RAW_GUEST_TRAP:
893 if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
894 return VINF_PATM_PATCH_TRAP_PF;
895
896 rc = TRPMForwardTrap(pVM, pRegFrame, 0xE, 0, TRPM_TRAP_HAS_ERRORCODE, TRPM_TRAP);
897 Assert(rc == VINF_EM_RAW_GUEST_TRAP);
898 break;
899
900 case VINF_EM_RAW_INTERRUPT_PENDING:
901 Assert(TRPMHasTrap(pVM));
902 /* no break; */
903 case VINF_IOM_HC_MMIO_READ:
904 case VINF_IOM_HC_MMIO_WRITE:
905 case VINF_IOM_HC_MMIO_READ_WRITE:
906 case VINF_PATM_HC_MMIO_PATCH_READ:
907 case VINF_PATM_HC_MMIO_PATCH_WRITE:
908 case VINF_SUCCESS:
909 case VINF_EM_RAW_TO_R3:
910 case VINF_EM_PENDING_REQUEST:
911 case VINF_EM_RAW_TIMER_PENDING:
912 case VINF_CSAM_PENDING_ACTION:
913 case VINF_PGM_SYNC_CR3: /** @todo Check this with Sander. */
914 break;
915
916 default:
917 AssertMsg(PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip) == false, ("Patch address for return code %d. eip=%08x\n", rc, pRegFrame->eip));
918 break;
919 }
920 return trpmGCExitTrap(pVM, rc, pRegFrame);
921}
922
923
924/**
925 * Scans for the EIP in the specified array of trap handlers.
926 *
927 * If we don't fine the EIP, we'll panic.
928 *
929 * @returns VBox status code.
930 *
931 * @param pVM The VM handle.
932 * @param pRegFrame Pointer to the register frame for the trap.
933 * @param paHandlers The array of trap handler records.
934 * @param pEndRecord The end record (exclusive).
935 */
936static int trpmGCHyperGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, PCTRPMGCHYPER paHandlers, PCTRPMGCHYPER pEndRecord)
937{
938 uintptr_t uEip = (uintptr_t)pRegFrame->eip;
939 Assert(paHandlers <= pEndRecord);
940
941 Log(("trpmGCHyperGeneric: uEip=%x %p-%p\n", uEip, paHandlers, pEndRecord));
942
943#if 0 /// @todo later
944 /*
945 * Start by doing a kind of binary search.
946 */
947 unsigned iStart = 0;
948 unsigned iEnd = pEndRecord - paHandlers;
949 unsigned i = iEnd / 2;
950#endif
951
952 /*
953 * Do a linear search now (in case the array wasn't properly sorted).
954 */
955 for (PCTRPMGCHYPER pCur = paHandlers; pCur < pEndRecord; pCur++)
956 {
957 if ( pCur->uStartEIP <= uEip
958 && (pCur->uEndEIP ? pCur->uEndEIP > uEip : pCur->uStartEIP == uEip))
959 return pCur->pfnHandler(pVM, pRegFrame, pCur->uUser);
960 }
961
962 return VERR_TRPM_DONT_PANIC;
963}
964
965
966/**
967 * Hypervisor \#NP ((segment) Not Present) handler.
968 *
969 * Scans for the EIP in the registered trap handlers.
970 *
971 * @returns VBox status code.
972 * VINF_SUCCESS means we completely handled this trap,
973 * other codes are passed back to host context.
974 *
975 * @param pTrpm Pointer to TRPM data (within VM).
976 * @param pRegFrame Pointer to the register frame for the trap.
977 * @internal
978 */
979DECLASM(int) TRPMGCHyperTrap0bHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
980{
981 return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0bHandlers, g_aTrap0bHandlersEnd);
982}
983
984
985/**
986 * Hypervisor \#GP (General Protection Fault) handler.
987 *
988 * Scans for the EIP in the registered trap handlers.
989 *
990 * @returns VBox status code.
991 * VINF_SUCCESS means we completely handled this trap,
992 * other codes are passed back to host context.
993 *
994 * @param pTrpm Pointer to TRPM data (within VM).
995 * @param pRegFrame Pointer to the register frame for the trap.
996 * @internal
997 */
998DECLASM(int) TRPMGCHyperTrap0dHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
999{
1000 return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
1001}
1002
1003
1004/**
1005 * Hypervisor \#PF (Page Fault) handler.
1006 *
1007 * Scans for the EIP in the registered trap handlers.
1008 *
1009 * @returns VBox status code.
1010 * VINF_SUCCESS means we completely handled this trap,
1011 * other codes are passed back to host context.
1012 *
1013 * @param pTrpm Pointer to TRPM data (within VM).
1014 * @param pRegFrame Pointer to the register frame for the trap.
1015 * @internal
1016 */
1017DECLASM(int) TRPMGCHyperTrap0eHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
1018{
1019 return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
1020}
1021
1022
1023/**
1024 * Deal with hypervisor traps occuring when resuming execution on a trap.
1025 *
1026 * @returns VBox status code.
1027 * @param pVM The VM handle.
1028 * @param pRegFrame Register frame.
1029 * @param uUser User arg.
1030 */
1031DECLCALLBACK(int) trpmGCTrapInGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser)
1032{
1033 Log(("********************************************************\n"));
1034 Log(("trpmGCTrapInGeneric: eip=%RX32 uUser=%#x\n", pRegFrame->eip, uUser));
1035 Log(("********************************************************\n"));
1036
1037 if (uUser & TRPM_TRAP_IN_HYPER)
1038 {
1039 /*
1040 * Check that there is still some stack left, if not we'll flag
1041 * a guru meditation (the alternative is a triple fault).
1042 */
1043 RTGCUINTPTR cbStackUsed = (RTGCUINTPTR)VMMGetStackGC(pVM) - pRegFrame->esp;
1044 if (cbStackUsed > VMM_STACK_SIZE - _1K)
1045 {
1046 LogRel(("trpmGCTrapInGeneric: ran out of stack: esp=#x cbStackUsed=%#x\n", pRegFrame->esp, cbStackUsed));
1047 return VERR_TRPM_DONT_PANIC;
1048 }
1049
1050 /*
1051 * Just zero the register containing the selector in question.
1052 * We'll deal with the actual stale or troublesome selector value in
1053 * the outermost trap frame.
1054 */
1055 switch (uUser & TRPM_TRAP_IN_OP_MASK)
1056 {
1057 case TRPM_TRAP_IN_MOV_GS:
1058 pRegFrame->eax = 0;
1059 pRegFrame->gs = 0; /* prevent recursive trouble. */
1060 break;
1061 case TRPM_TRAP_IN_MOV_FS:
1062 pRegFrame->eax = 0;
1063 pRegFrame->fs = 0; /* prevent recursive trouble. */
1064 return VINF_SUCCESS;
1065
1066 default:
1067 AssertMsgFailed(("Invalid uUser=%#x\n", uUser));
1068 return VERR_INTERNAL_ERROR;
1069 }
1070 }
1071 else
1072 {
1073 /*
1074 * Reconstruct the guest context and switch to the recompiler.
1075 * We ASSUME we're only at
1076 */
1077 CPUMCTXCORE CtxCore = *pRegFrame;
1078 uint32_t *pEsp = (uint32_t *)pRegFrame->esp;
1079 int rc;
1080
1081 switch (uUser)
1082 {
1083 /*
1084 * This will only occur when resuming guest code in a trap handler!
1085 */
1086 /* @note ASSUMES esp points to the temporary guest CPUMCTXCORE!!! */
1087 case TRPM_TRAP_IN_MOV_GS:
1088 case TRPM_TRAP_IN_MOV_FS:
1089 case TRPM_TRAP_IN_MOV_ES:
1090 case TRPM_TRAP_IN_MOV_DS:
1091 {
1092 PCPUMCTXCORE pTempGuestCtx = (PCPUMCTXCORE)pEsp;
1093
1094 /* Just copy the whole thing; several selector registers, eip (etc) and eax are not yet in pRegFrame. */
1095 CtxCore = *pTempGuestCtx;
1096 rc = VINF_EM_RAW_STALE_SELECTOR;
1097 break;
1098 }
1099
1100 /*
1101 * This will only occur when resuming guest code!
1102 */
1103 case TRPM_TRAP_IN_IRET:
1104 CtxCore.eip = *pEsp++;
1105 CtxCore.cs = (RTSEL)*pEsp++;
1106 CtxCore.eflags.u32 = *pEsp++;
1107 CtxCore.esp = *pEsp++;
1108 CtxCore.ss = (RTSEL)*pEsp++;
1109 rc = VINF_EM_RAW_IRET_TRAP;
1110 break;
1111
1112 /*
1113 * This will only occur when resuming V86 guest code!
1114 */
1115 case TRPM_TRAP_IN_IRET | TRPM_TRAP_IN_V86:
1116 CtxCore.eip = *pEsp++;
1117 CtxCore.cs = (RTSEL)*pEsp++;
1118 CtxCore.eflags.u32 = *pEsp++;
1119 CtxCore.esp = *pEsp++;
1120 CtxCore.ss = (RTSEL)*pEsp++;
1121 CtxCore.es = (RTSEL)*pEsp++;
1122 CtxCore.ds = (RTSEL)*pEsp++;
1123 CtxCore.fs = (RTSEL)*pEsp++;
1124 CtxCore.gs = (RTSEL)*pEsp++;
1125 rc = VINF_EM_RAW_IRET_TRAP;
1126 break;
1127
1128 default:
1129 AssertMsgFailed(("Invalid uUser=%#x\n", uUser));
1130 return VERR_INTERNAL_ERROR;
1131 }
1132
1133
1134 CPUMSetGuestCtxCore(pVM, &CtxCore);
1135 TRPMGCHyperReturnToHost(pVM, rc);
1136 }
1137
1138 AssertMsgFailed(("Impossible!\n"));
1139 return VERR_INTERNAL_ERROR;
1140}
1141
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