VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMGC/TRPMGCHandlers.cpp@ 2095

Last change on this file since 2095 was 2066, checked in by vboxsync, 18 years ago

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1/* $Id: TRPMGCHandlers.cpp 2066 2007-04-13 09:05:03Z vboxsync $ */
2/** @file
3 * TRPM - Guest Context Trap Handlers, CPP part
4 */
5
6/*
7 * Copyright (C) 2006 InnoTek Systemberatung GmbH
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License as published by the Free Software Foundation,
13 * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14 * distribution. VirtualBox OSE is distributed in the hope that it will
15 * be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * If you received this file as part of a commercial VirtualBox
18 * distribution, then only the terms of your commercial VirtualBox
19 * license agreement apply instead of the previous paragraph.
20 */
21
22
23/*******************************************************************************
24* Header Files *
25*******************************************************************************/
26#define LOG_GROUP LOG_GROUP_TRPM
27#include <VBox/selm.h>
28#include <VBox/iom.h>
29#include <VBox/pgm.h>
30#include <VBox/pdm.h>
31#include <VBox/dbgf.h>
32#include <VBox/em.h>
33#include <VBox/csam.h>
34#include <VBox/patm.h>
35#include <VBox/mm.h>
36#include <VBox/cpum.h>
37#include "TRPMInternal.h"
38#include <VBox/vm.h>
39#include <VBox/param.h>
40
41#include <VBox/err.h>
42#include <VBox/dis.h>
43#include <VBox/disopcode.h>
44#include <VBox/x86.h>
45#include <VBox/log.h>
46#include <VBox/tm.h>
47#include <iprt/asm.h>
48#include <iprt/assert.h>
49
50/* still here. MODR/M byte parsing */
51#define X86_OPCODE_MODRM_MOD_MASK 0xc0
52#define X86_OPCODE_MODRM_REG_MASK 0x38
53#define X86_OPCODE_MODRM_RM_MASK 0x07
54
55/** Pointer to a readonly hypervisor trap record. */
56typedef const struct TRPMGCHYPER *PCTRPMGCHYPER;
57
58/**
59 * A hypervisor trap record.
60 * This contains information about a handler for a instruction range.
61 *
62 * @remark This must match what TRPM_HANDLER outputs.
63 */
64typedef struct TRPMGCHYPER
65{
66 /** The start address. */
67 uintptr_t uStartEIP;
68 /** The end address. (exclusive)
69 * If NULL the it's only for the instruction at pvStartEIP. */
70 uintptr_t uEndEIP;
71 /**
72 * The handler.
73 *
74 * @returns VBox status code
75 * VINF_SUCCESS means we've handled the trap.
76 * Any other error code means returning to the host context.
77 * @param pVM The VM handle.
78 * @param pRegFrame The register frame.
79 * @param uUser The user argument.
80 */
81 DECLCALLBACKMEMBER(int, pfnHandler)(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser);
82 /** Whatever the handler desires to put here. */
83 uintptr_t uUser;
84} TRPMGCHYPER;
85
86
87/*******************************************************************************
88* Global Variables *
89*******************************************************************************/
90__BEGIN_DECLS
91/** Defined in VMMGC0.asm or VMMGC99.asm.
92 * @{ */
93extern const TRPMGCHYPER g_aTrap0bHandlers[1];
94extern const TRPMGCHYPER g_aTrap0bHandlersEnd[1];
95extern const TRPMGCHYPER g_aTrap0dHandlers[1];
96extern const TRPMGCHYPER g_aTrap0dHandlersEnd[1];
97extern const TRPMGCHYPER g_aTrap0eHandlers[1];
98extern const TRPMGCHYPER g_aTrap0eHandlersEnd[1];
99/** @} */
100__END_DECLS
101
102
103/*******************************************************************************
104* Internal Functions *
105*******************************************************************************/
106__BEGIN_DECLS /* addressed from asm (not called so no DECLASM). */
107DECLCALLBACK(int) trpmGCTrapInGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser);
108__END_DECLS
109
110
111
112/**
113 * Exits the trap, called when exiting a trap handler.
114 *
115 * Will reset the trap if it's not a guest trap or the trap
116 * is already handled. Will process resume guest FFs.
117 *
118 * @returns rc.
119 * @param pVM VM handle.
120 * @param rc The VBox status code to return.
121 * @param pRegFrame Pointer to the register frame for the trap.
122 */
123static int trpmGCExitTrap(PVM pVM, int rc, PCPUMCTXCORE pRegFrame)
124{
125 uint32_t uOldActiveVector = pVM->trpm.s.uActiveVector;
126 NOREF(uOldActiveVector);
127
128 /* Reset trap? */
129 if ( rc != VINF_EM_RAW_GUEST_TRAP
130 && rc != VINF_EM_RAW_RING_SWITCH_INT)
131 pVM->trpm.s.uActiveVector = ~0;
132
133#ifdef VBOX_HIGH_RES_TIMERS_HACK
134 /*
135 * Occationally we should poll timers.
136 * We must *NOT* do this too frequently as it adds a significant overhead
137 * and it'll kill us if the trap load is high. (See #1354.)
138 * (The heuristic is not very intelligent, we should really check trap
139 * frequency etc. here, but alas, we lack any such information atm.)
140 */
141 static unsigned s_iTimerPoll = 0;
142 if (rc == VINF_SUCCESS)
143 {
144 if (!(++s_iTimerPoll & 0xf))
145 {
146 uint64_t cTicks = TMTimerPoll(pVM); NOREF(cTicks);
147 Log2(("TMTimerPoll at %VGv returned %RX64 (VM_FF_TIMER=%d)\n", pRegFrame->eip, cTicks, VM_FF_ISPENDING(pVM, VM_FF_TIMER)));
148 }
149 }
150 else
151 s_iTimerPoll = 0;
152#endif
153
154 /* Clear pending inhibit interrupt state if required. (necessary for dispatching interrupts later on) */
155 if (VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS))
156 {
157 Log2(("VM_FF_INHIBIT_INTERRUPTS at %VGv successor %VGv\n", pRegFrame->eip, EMGetInhibitInterruptsPC(pVM)));
158 if (pRegFrame->eip != EMGetInhibitInterruptsPC(pVM))
159 {
160 /** @note we intentionally don't clear VM_FF_INHIBIT_INTERRUPTS here if the eip is the same as the inhibited instr address.
161 * Before we are able to execute this instruction in raw mode (iret to guest code) an external interrupt might
162 * force a world switch again. Possibly allowing a guest interrupt to be dispatched in the process. This could
163 * break the guest. Sounds very unlikely, but such timing sensitive problem are not as rare as you might think.
164 */
165 VM_FF_CLEAR(pVM, VM_FF_INHIBIT_INTERRUPTS);
166 }
167 }
168
169 /*
170 * Pending resume-guest-FF?
171 * Or pending (A)PIC interrupt? Windows XP will crash if we delay APIC interrupts.
172 */
173 if ( rc == VINF_SUCCESS
174 && VM_FF_ISPENDING(pVM, VM_FF_TO_R3 | VM_FF_TIMER | VM_FF_INTERRUPT_APIC | VM_FF_INTERRUPT_PIC | VM_FF_PGM_SYNC_CR3 | VM_FF_PGM_SYNC_CR3_NON_GLOBAL | VM_FF_REQUEST))
175 {
176 /* Pending Ring-3 action. */
177 if (VM_FF_ISPENDING(pVM, VM_FF_TO_R3))
178 {
179 VM_FF_CLEAR(pVM, VM_FF_TO_R3);
180 rc = VINF_EM_RAW_TO_R3;
181 }
182 /* Pending timer action. */
183 else if (VM_FF_ISPENDING(pVM, VM_FF_TIMER))
184 rc = VINF_EM_RAW_TIMER_PENDING;
185 /* Pending interrupt: dispatch it. */
186 else if ( VM_FF_ISPENDING(pVM, VM_FF_INTERRUPT_APIC | VM_FF_INTERRUPT_PIC)
187 && !VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS)
188 && PATMAreInterruptsEnabledByCtxCore(pVM, pRegFrame)
189 )
190 {
191 uint8_t u8Interrupt;
192 rc = PDMGetInterrupt(pVM, &u8Interrupt);
193 Log(("trpmGCExitTrap: u8Interrupt=%d (%#x) rc=%Vrc\n", u8Interrupt, u8Interrupt, rc));
194 AssertFatalMsgRC(rc, ("PDMGetInterrupt failed with %Vrc\n", rc));
195 rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)u8Interrupt, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_HARDWARE_INT);
196 /* can't return if successful */
197 Assert(rc != VINF_SUCCESS);
198
199 /* Stop the profile counter that was started in TRPMGCHandlersA.asm */
200 Assert(uOldActiveVector <= 16);
201 STAM_PROFILE_ADV_STOP(&pVM->trpm.s.aStatGCTraps[uOldActiveVector], a);
202
203 /* Assert the trap and go to the recompiler to dispatch it. */
204 TRPMAssertTrap(pVM, u8Interrupt, false);
205
206 STAM_PROFILE_ADV_START(&pVM->trpm.s.aStatGCTraps[uOldActiveVector], a);
207 rc = VINF_EM_RAW_INTERRUPT_PENDING;
208 }
209 /*
210 * Try sync CR3?
211 * This ASSUMES that the MOV CRx, x emulation doesn't return with VINF_PGM_SYNC_CR3. (a bit hackish)
212 */
213 else if (VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 | VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
214#if 1
215 rc = PGMSyncCR3(pVM, CPUMGetGuestCR0(pVM), CPUMGetGuestCR3(pVM), CPUMGetGuestCR4(pVM), VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3));
216#else
217 rc = VINF_PGM_SYNC_CR3;
218#endif
219 /* Pending request packets might contain actions that need immediate attention, such as pending hardware interrupts. */
220 else if (VM_FF_ISPENDING(pVM, VM_FF_REQUEST))
221 rc = VINF_EM_PENDING_REQUEST;
222 }
223
224 AssertMsg( rc != VINF_SUCCESS
225 || ( pRegFrame->eflags.Bits.u1IF
226 && ( pRegFrame->eflags.Bits.u2IOPL < (unsigned)(pRegFrame->ss & X86_SEL_RPL) || pRegFrame->eflags.Bits.u1VM))
227 , ("rc = %VGv\neflags=%RX32 ss=%RTsel IOPL=%d\n", rc, pRegFrame->eflags.u32, pRegFrame->ss, pRegFrame->eflags.Bits.u2IOPL));
228 return rc;
229}
230
231
232/**
233 * \#DB (Debug event) handler.
234 *
235 * @returns VBox status code.
236 * VINF_SUCCESS means we completely handled this trap,
237 * other codes are passed execution to host context.
238 *
239 * @param pTrpm Pointer to TRPM data (within VM).
240 * @param pRegFrame Pointer to the register frame for the trap.
241 * @internal
242 */
243DECLASM(int) TRPMGCTrap01Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
244{
245 RTGCUINTREG uDr6 = ASMGetAndClearDR6();
246 PVM pVM = TRPM2VM(pTrpm);
247 LogFlow(("TRPMGCTrap01Handler: cs:eip=%04x:%08x uDr6=%RTreg\n", pRegFrame->cs, pRegFrame->eip, uDr6));
248
249 /*
250 * We currently don't make sure of the X86_DR7_GD bit, but
251 * there might come a time when we do.
252 */
253 if ((uDr6 & X86_DR6_BD) == X86_DR6_BD)
254 {
255 AssertReleaseMsgFailed(("X86_DR6_BD isn't used, but it's set! dr7=%RTreg(%RTreg) dr6=%RTreg\n",
256 ASMGetDR7(), CPUMGetHyperDR7(pVM), uDr6));
257 return VERR_NOT_IMPLEMENTED;
258 }
259
260 AssertReleaseMsg(!(uDr6 & X86_DR6_BT), ("X86_DR6_BT is impossible!\n"));
261
262 /*
263 * Now leave the rest to the DBGF.
264 */
265 int rc = DBGFGCTrap01Handler(pVM, pRegFrame, uDr6);
266 if (rc == VINF_EM_RAW_GUEST_TRAP)
267 CPUMSetGuestDR6(pVM, uDr6);
268
269 return trpmGCExitTrap(pVM, rc, pRegFrame);
270}
271
272
273
274/**
275 * NMI handler, for when we are using NMIs to debug things.
276 *
277 * @returns VBox status code.
278 * VINF_SUCCESS means we completely handled this trap,
279 * other codes are passed execution to host context.
280 *
281 * @param pTrpm Pointer to TRPM data (within VM).
282 * @param pRegFrame Pointer to the register frame for the trap.
283 * @internal
284 * @remark This is not hooked up unless you're building with VBOX_WITH_NMI defined.
285 */
286DECLASM(int) TRPMGCTrap02Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
287{
288 LogFlow(("TRPMGCTrap02Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
289 RTLogComPrintf("TRPMGCTrap02Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip);
290 return VERR_TRPM_DONT_PANIC;
291}
292
293
294/**
295 * \#BP (Breakpoint) handler.
296 *
297 * @returns VBox status code.
298 * VINF_SUCCESS means we completely handled this trap,
299 * other codes are passed execution to host context.
300 *
301 * @param pTrpm Pointer to TRPM data (within VM).
302 * @param pRegFrame Pointer to the register frame for the trap.
303 * @internal
304 */
305DECLASM(int) TRPMGCTrap03Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
306{
307 LogFlow(("TRPMGCTrap03Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
308 PVM pVM = TRPM2VM(pTrpm);
309 int rc;
310
311 /*
312 * Both PATM are using INT3s, let them have a go first.
313 */
314 if ( (pRegFrame->ss & X86_SEL_RPL) == 1
315 && !pRegFrame->eflags.Bits.u1VM)
316 {
317 rc = PATMHandleInt3PatchTrap(pVM, pRegFrame);
318 if (rc == VINF_SUCCESS || rc == VINF_EM_RAW_EMULATE_INSTR || rc == VINF_PATM_PATCH_INT3 || rc == VINF_PATM_DUPLICATE_FUNCTION)
319 return trpmGCExitTrap(pVM, rc, pRegFrame);
320 }
321 rc = DBGFGCTrap03Handler(pVM, pRegFrame);
322 /* anything we should do with this? Schedule it in GC? */
323 return trpmGCExitTrap(pVM, rc, pRegFrame);
324}
325
326
327/**
328 * Trap handler for illegal opcode fault (\#UD).
329 *
330 * @returns VBox status code.
331 * VINF_SUCCESS means we completely handled this trap,
332 * other codes are passed execution to host context.
333 *
334 * @param pTrpm Pointer to TRPM data (within VM).
335 * @param pRegFrame Pointer to the register frame for the trap.
336 * @internal
337 */
338DECLASM(int) TRPMGCTrap06Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
339{
340 PVM pVM = TRPM2VM(pTrpm);
341 int rc;
342
343 LogFlow(("TRPMGCTrap06Handler %VGv eflags=%x\n", pRegFrame->eip, pRegFrame->eflags.u32));
344
345 if (CPUMGetGuestCPL(pVM, pRegFrame) == 0)
346 {
347 /*
348 * Decode the instruction.
349 */
350 RTGCPTR PC;
351 rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &PC);
352 if (VBOX_FAILURE(rc))
353 {
354 Log(("TRPMGCTrap06Handler: Failed to convert %RTsel:%RX32 (cpl=%d) - rc=%Vrc !!\n", pRegFrame->cs, pRegFrame->eip, pRegFrame->ss & X86_SEL_RPL, rc));
355 return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
356 }
357
358 DISCPUSTATE Cpu;
359 uint32_t cbOp;
360 rc = EMInterpretDisasOneEx(pVM, (RTGCUINTPTR)PC, pRegFrame, &Cpu, &cbOp);
361 if (VBOX_FAILURE(rc))
362 return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
363
364 if ( PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip)
365 && Cpu.pCurInstr->opcode == OP_ILLUD2)
366 {
367 rc = PATMGCHandleIllegalInstrTrap(pVM, pRegFrame);
368 if (rc == VINF_SUCCESS || rc == VINF_EM_RAW_EMULATE_INSTR || rc == VINF_PATM_DUPLICATE_FUNCTION || rc == VINF_PATM_PENDING_IRQ_AFTER_IRET || rc == VINF_EM_RESCHEDULE)
369 return trpmGCExitTrap(pVM, rc, pRegFrame);
370 }
371 else
372 /** Note: monitor causes an #UD exception instead of #GP when not executed in ring 0. */
373 if (Cpu.pCurInstr->opcode == OP_MONITOR)
374 {
375 uint32_t cbIgnored;
376 rc = EMInterpretInstructionCPU(pVM, &Cpu, pRegFrame, PC, &cbIgnored);
377 if (RT_LIKELY(VBOX_SUCCESS(rc)))
378 pRegFrame->eip += Cpu.opsize;
379 }
380 else
381 /* Never generate a raw trap here; it might be an instruction, that requires emulation. */
382 rc = VINF_EM_RAW_EMULATE_INSTR;
383 }
384 else
385 if (pRegFrame->eflags.Bits.u1VM)
386 {
387 rc = TRPMForwardTrap(pVM, pRegFrame, 0x6, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_TRAP);
388 Assert(rc == VINF_EM_RAW_GUEST_TRAP);
389 }
390 else
391 /* Never generate a raw trap here; it might be an instruction, that requires emulation. */
392 rc = VINF_EM_RAW_EMULATE_INSTR;
393
394 return trpmGCExitTrap(pVM, rc, pRegFrame);
395}
396
397
398/**
399 * Trap handler for device not present fault (\#NM).
400 *
401 * Device not available, FP or (F)WAIT instruction.
402 *
403 * @returns VBox status code.
404 * VINF_SUCCESS means we completely handled this trap,
405 * other codes are passed execution to host context.
406 *
407 * @param pTrpm Pointer to TRPM data (within VM).
408 * @param pRegFrame Pointer to the register frame for the trap.
409 * @internal
410 */
411DECLASM(int) TRPMGCTrap07Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
412{
413 PVM pVM = TRPM2VM(pTrpm);
414
415 LogFlow(("TRPMTrap07HandlerGC: eip=%VGv\n", pRegFrame->eip));
416 return CPUMHandleLazyFPU(pVM);
417}
418
419
420/**
421 * \#NP ((segment) Not Present) handler.
422 *
423 * @returns VBox status code.
424 * VINF_SUCCESS means we completely handled this trap,
425 * other codes are passed execution to host context.
426 *
427 * @param pTrpm Pointer to TRPM data (within VM).
428 * @param pRegFrame Pointer to the register frame for the trap.
429 * @internal
430 */
431DECLASM(int) TRPMGCTrap0bHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
432{
433 LogFlow(("TRPMGCTrap0bHandler: eip=%VGv\n", pRegFrame->eip));
434 PVM pVM = TRPM2VM(pTrpm);
435
436 /*
437 * Try to detect instruction by opcode which caused trap.
438 * XXX note: this code may cause \#PF (trap e) or \#GP (trap d) while
439 * accessing user code. need to handle it somehow in future!
440 */
441 uint8_t *pu8Code;
442 if (SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, (PRTGCPTR)&pu8Code) == VINF_SUCCESS)
443 {
444 /*
445 * First skip possible instruction prefixes, such as:
446 * OS, AS
447 * CS:, DS:, ES:, SS:, FS:, GS:
448 * REPE, REPNE
449 *
450 * note: Currently we supports only up to 4 prefixes per opcode, more
451 * prefixes (normally not used anyway) will cause trap d in guest.
452 * note: Instruction length in IA-32 may be up to 15 bytes, we dont
453 * check this issue, its too hard.
454 */
455 for (unsigned i = 0; i < 4; i++)
456 {
457 if ( pu8Code[0] != 0xf2 /* REPNE/REPNZ */
458 && pu8Code[0] != 0xf3 /* REP/REPE/REPZ */
459 && pu8Code[0] != 0x2e /* CS: */
460 && pu8Code[0] != 0x36 /* SS: */
461 && pu8Code[0] != 0x3e /* DS: */
462 && pu8Code[0] != 0x26 /* ES: */
463 && pu8Code[0] != 0x64 /* FS: */
464 && pu8Code[0] != 0x65 /* GS: */
465 && pu8Code[0] != 0x66 /* OS */
466 && pu8Code[0] != 0x67 /* AS */
467 )
468 break;
469 pu8Code++;
470 }
471
472 /*
473 * Detect right switch using a callgate.
474 *
475 * We recognize the following causes for the trap 0b:
476 * CALL FAR, CALL FAR []
477 * JMP FAR, JMP FAR []
478 * IRET (may cause a task switch)
479 *
480 * Note: we can't detect whether the trap was caused by a call to a
481 * callgate descriptor or it is a real trap 0b due to a bad selector.
482 * In both situations we'll pass execution to our recompiler so we don't
483 * have to worry.
484 * If we wanted to do better detection, we have set GDT entries to callgate
485 * descriptors pointing to our own handlers.
486 */
487 /** @todo not sure about IRET, may generate Trap 0d (\#GP), NEED TO CHECK! */
488 if ( pu8Code[0] == 0x9a /* CALL FAR */
489 || ( pu8Code[0] == 0xff /* CALL FAR [] */
490 && (pu8Code[1] & X86_OPCODE_MODRM_REG_MASK) == 0x18)
491 || pu8Code[0] == 0xea /* JMP FAR */
492 || ( pu8Code[0] == 0xff /* JMP FAR [] */
493 && (pu8Code[1] & X86_OPCODE_MODRM_REG_MASK) == 0x28)
494 || pu8Code[0] == 0xcf /* IRET */
495 )
496 {
497 /*
498 * Got potential call to callgate.
499 * We simply return execution to the recompiler to do emulation
500 * starting from the instruction which caused the trap.
501 */
502 pTrpm->uActiveVector = ~0;
503 return VINF_EM_RAW_RING_SWITCH;
504 }
505 }
506
507 /*
508 * Pass trap 0b as is to the recompiler in all other cases.
509 */
510 return VINF_EM_RAW_GUEST_TRAP;
511}
512
513
514/**
515 * \#GP (General Protection Fault) handler for Ring-0 privileged instructions.
516 *
517 * @returns VBox status code.
518 * VINF_SUCCESS means we completely handled this trap,
519 * other codes are passed execution to host context.
520 *
521 * @param pVM The VM handle.
522 * @param pRegFrame Pointer to the register frame for the trap.
523 * @param pCpu The opcode info.
524 * @param PC The program counter corresponding to cs:eip in pRegFrame.
525 */
526static int trpmGCTrap0dHandlerRing0(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, RTGCPTR PC)
527{
528 int rc;
529
530 /*
531 * Try handle it here, if not return to HC and emulate/interpret it there.
532 */
533 switch (pCpu->pCurInstr->opcode)
534 {
535 case OP_INT3:
536 /*
537 * Little hack to make the code below not fail
538 */
539 pCpu->param1.flags = USE_IMMEDIATE8;
540 pCpu->param1.parval = 3;
541 /* fallthru */
542 case OP_INT:
543 {
544 Assert(pCpu->param1.flags & USE_IMMEDIATE8);
545 Assert(!(PATMIsPatchGCAddr(pVM, PC)));
546 if (pCpu->param1.parval == 3)
547 {
548 /* Int 3 replacement patch? */
549 if (PATMHandleInt3PatchTrap(pVM, pRegFrame) == VINF_SUCCESS)
550 {
551 AssertFailed();
552 return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
553 }
554 }
555 rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT);
556 if (VBOX_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
557 return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
558
559 pVM->trpm.s.uActiveVector = (pVM->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
560 pVM->trpm.s.fActiveSoftwareInterrupt = true;
561 return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH_INT, pRegFrame);
562 }
563
564#ifdef PATM_EMULATE_SYSENTER
565 case OP_SYSEXIT:
566 case OP_SYSRET:
567 rc = PATMSysCall(pVM, pRegFrame, pCpu);
568 return trpmGCExitTrap(pVM, rc, pRegFrame);
569#endif
570
571 case OP_HLT:
572 /* If it's in patch code, defer to ring-3. */
573 if (PATMIsPatchGCAddr(pVM, PC))
574 break;
575
576 pRegFrame->eip += pCpu->opsize;
577 return trpmGCExitTrap(pVM, VINF_EM_HALT, pRegFrame);
578
579
580 /*
581 * These instructions are used by PATM and CASM for finding
582 * dangerous non-trapping instructions. Thus, since all
583 * scanning and patching is done in ring-3 we'll have to
584 * return to ring-3 on the first encounter of these instructions.
585 */
586 case OP_MOV_CR:
587 case OP_MOV_DR:
588 /* We can safely emulate control/debug register move instructions in patched code. */
589 if ( !PATMIsPatchGCAddr(pVM, PC)
590 && !CSAMIsKnownDangerousInstr(pVM, PC))
591 break;
592 case OP_INVLPG:
593 case OP_LLDT:
594 case OP_STI:
595 case OP_RDTSC:
596 {
597 uint32_t cbIgnored;
598 rc = EMInterpretInstructionCPU(pVM, pCpu, pRegFrame, PC, &cbIgnored);
599 if (VBOX_SUCCESS(rc))
600 pRegFrame->eip += pCpu->opsize;
601 else if (rc == VERR_EM_INTERPRETER)
602 rc = VINF_EM_RAW_EXCEPTION_PRIVILEGED;
603 return trpmGCExitTrap(pVM, rc, pRegFrame);
604 }
605 }
606
607 return trpmGCExitTrap(pVM, VINF_EM_RAW_EXCEPTION_PRIVILEGED, pRegFrame);
608}
609
610
611/**
612 * \#GP (General Protection Fault) handler for Ring-3.
613 *
614 * @returns VBox status code.
615 * VINF_SUCCESS means we completely handled this trap,
616 * other codes are passed execution to host context.
617 *
618 * @param pVM The VM handle.
619 * @param pRegFrame Pointer to the register frame for the trap.
620 * @param pCpu The opcode info.
621 * @param PC The program counter corresponding to cs:eip in pRegFrame.
622 */
623static int trpmGCTrap0dHandlerRing3(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, RTGCPTR PC)
624{
625 int rc;
626
627 Assert(!pRegFrame->eflags.Bits.u1VM);
628
629 switch (pCpu->pCurInstr->opcode)
630 {
631 /*
632 * STI and CLI are I/O privileged, i.e. if IOPL
633 */
634 case OP_STI:
635 case OP_CLI:
636 {
637 uint32_t efl = CPUMRawGetEFlags(pVM, pRegFrame);
638 if (X86_EFL_GET_IOPL(efl) >= (unsigned)(pRegFrame->ss & X86_SEL_RPL))
639 {
640 LogFlow(("trpmGCTrap0dHandlerRing3: CLI/STI -> REM\n"));
641 return trpmGCExitTrap(pVM, VINF_EM_RESCHEDULE_REM, pRegFrame);
642 }
643 LogFlow(("trpmGCTrap0dHandlerRing3: CLI/STI -> #GP(0)\n"));
644 break;
645 }
646
647 /*
648 * INT3 and INT xx are ring-switching.
649 * (The shadow IDT will have set the entries to DPL=0, that's why we're here.)
650 */
651 case OP_INT3:
652 /*
653 * Little hack to make the code below not fail
654 */
655 pCpu->param1.flags = USE_IMMEDIATE8;
656 pCpu->param1.parval = 3;
657 /* fall thru */
658 case OP_INT:
659 {
660 Assert(pCpu->param1.flags & USE_IMMEDIATE8);
661 rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT);
662 if (VBOX_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
663 return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
664
665 pVM->trpm.s.uActiveVector = (pVM->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
666 pVM->trpm.s.fActiveSoftwareInterrupt = true;
667 return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH_INT, pRegFrame);
668 }
669
670 /*
671 * SYSCALL, SYSENTER, INTO and BOUND are also ring-switchers.
672 */
673 case OP_SYSCALL:
674 case OP_SYSENTER:
675#ifdef PATM_EMULATE_SYSENTER
676 rc = PATMSysCall(pVM, pRegFrame, pCpu);
677 if (rc == VINF_SUCCESS)
678 return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
679 /* else no break; */
680#endif
681 case OP_BOUND:
682 case OP_INTO:
683 pVM->trpm.s.uActiveVector = ~0;
684 return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH, pRegFrame);
685
686 /*
687 * Handle virtualized TSC reads.
688 */
689 case OP_RDTSC:
690 {
691 uint32_t cbIgnored;
692 rc = EMInterpretInstructionCPU(pVM, pCpu, pRegFrame, PC, &cbIgnored);
693 if (VBOX_SUCCESS(rc))
694 pRegFrame->eip += pCpu->opsize;
695 else if (rc == VERR_EM_INTERPRETER)
696 rc = VINF_EM_RAW_EXCEPTION_PRIVILEGED;
697 return trpmGCExitTrap(pVM, rc, pRegFrame);
698 }
699 }
700
701 /*
702 * A genuine guest fault.
703 */
704 return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
705}
706
707
708/**
709 * \#GP (General Protection Fault) handler.
710 *
711 * @returns VBox status code.
712 * VINF_SUCCESS means we completely handled this trap,
713 * other codes are passed execution to host context.
714 *
715 * @param pVM The VM handle.
716 * @param pTrpm Pointer to TRPM data (within VM).
717 * @param pRegFrame Pointer to the register frame for the trap.
718 */
719static int trpmGCTrap0dHandler(PVM pVM, PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
720{
721 LogFlow(("trpmGCTrap0dHandler: cs:eip=%RTsel:%VGv uErr=%RX32\n", pRegFrame->ss, pRegFrame->eip, pTrpm->uActiveErrorCode));
722
723#if 0 /* not right for iret. Shouldn't really be needed as SELMValidateAndConvertCSAddr deals with invalid cs. */
724 /*
725 * Filter out selector problems first as these may mean that the
726 * instruction isn't safe to read. If we're here because CS is NIL
727 * the flattening of cs:eip will deal with that.
728 */
729 if ( !(pTrpm->uActiveErrorCode & (X86_TRAP_ERR_IDT | X86_TRAP_ERR_EXTERNAL))
730 && (pTrpm->uActiveErrorCode & X86_TRAP_ERR_SEL_MASK))
731 {
732 /* It's a guest trap. */
733 return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
734 }
735#endif
736
737 STAM_PROFILE_ADV_START(&pVM->trpm.s.StatTrap0dDisasm, a);
738 /*
739 * Decode the instruction.
740 */
741 RTGCPTR PC;
742 int rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &PC);
743 if (VBOX_FAILURE(rc))
744 {
745 Log(("trpmGCTrap0dHandler: Failed to convert %RTsel:%RX32 (cpl=%d) - rc=%Vrc !!\n",
746 pRegFrame->cs, pRegFrame->eip, pRegFrame->ss & X86_SEL_RPL, rc));
747 STAM_PROFILE_ADV_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
748 return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
749 }
750
751 DISCPUSTATE Cpu;
752 uint32_t cbOp;
753 rc = EMInterpretDisasOneEx(pVM, (RTGCUINTPTR)PC, pRegFrame, &Cpu, &cbOp);
754 if (VBOX_FAILURE(rc))
755 {
756 STAM_PROFILE_ADV_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
757 return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
758 }
759 STAM_PROFILE_ADV_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
760
761 /*
762 * Deal with I/O port access.
763 */
764 if ( pVM->trpm.s.uActiveErrorCode == 0
765 && (Cpu.pCurInstr->optype & OPTYPE_PORTIO))
766 {
767 rc = EMInterpretPortIO(pVM, pRegFrame, &Cpu, cbOp);
768 return trpmGCExitTrap(pVM, rc, pRegFrame);
769 }
770
771
772 /*
773 * Deal with Ring-0 (privileged instructions)
774 */
775 if ( (pRegFrame->ss & X86_SEL_RPL) <= 1
776 && !pRegFrame->eflags.Bits.u1VM)
777 return trpmGCTrap0dHandlerRing0(pVM, pRegFrame, &Cpu, PC);
778
779 /*
780 * Deal with Ring-3 GPs.
781 */
782 if (!pRegFrame->eflags.Bits.u1VM)
783 return trpmGCTrap0dHandlerRing3(pVM, pRegFrame, &Cpu, PC);
784
785 /*
786 * Deal with v86 code.
787 */
788
789 /* We always set IOPL to zero which makes e.g. pushf fault in V86 mode. The guest might use IOPL=3 and therefor not expect a #GP.
790 * Simply fall back to the recompiler to emulate this instruction.
791 */
792 /* Retrieve the eflags including the virtualized bits. */
793 /** @note hackish as the cpumctxcore structure doesn't contain the right value */
794 X86EFLAGS eflags;
795 eflags.u32 = CPUMRawGetEFlags(pVM, pRegFrame);
796 if (eflags.Bits.u2IOPL != 3)
797 {
798 Assert(eflags.Bits.u2IOPL == 0);
799
800 int rc = TRPMForwardTrap(pVM, pRegFrame, 0xD, 0, TRPM_TRAP_HAS_ERRORCODE, TRPM_TRAP);
801 Assert(rc == VINF_EM_RAW_GUEST_TRAP);
802 return trpmGCExitTrap(pVM, rc, pRegFrame);
803 }
804 return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
805}
806
807
808/**
809 * \#GP (General Protection Fault) handler.
810 *
811 * @returns VBox status code.
812 * VINF_SUCCESS means we completely handled this trap,
813 * other codes are passed execution to host context.
814 *
815 * @param pTrpm Pointer to TRPM data (within VM).
816 * @param pRegFrame Pointer to the register frame for the trap.
817 * @internal
818 */
819DECLASM(int) TRPMGCTrap0dHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
820{
821 LogFlow(("TRPMGCTrap0dHandler: eip=%RGv\n", pRegFrame->eip));
822 PVM pVM = TRPM2VM(pTrpm);
823
824 int rc = trpmGCTrap0dHandler(pVM, pTrpm, pRegFrame);
825 switch (rc)
826 {
827 case VINF_EM_RAW_GUEST_TRAP:
828 case VINF_EM_RAW_EXCEPTION_PRIVILEGED:
829 if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
830 rc = VINF_PATM_PATCH_TRAP_GP;
831 break;
832
833 case VINF_EM_RAW_INTERRUPT_PENDING:
834 Assert(TRPMHasTrap(pVM));
835 /* no break; */
836 case VINF_PGM_SYNC_CR3: /** @todo Check this with Sander. */
837 case VINF_IOM_HC_IOPORT_READWRITE:
838 case VINF_IOM_HC_IOPORT_READ:
839 case VINF_IOM_HC_IOPORT_WRITE:
840 case VINF_IOM_HC_MMIO_WRITE:
841 case VINF_IOM_HC_MMIO_READ:
842 case VINF_IOM_HC_MMIO_READ_WRITE:
843 case VINF_PATM_PATCH_INT3:
844 case VINF_EM_RAW_TO_R3:
845 case VINF_EM_RAW_TIMER_PENDING:
846 case VINF_EM_PENDING_REQUEST:
847 case VINF_EM_HALT:
848 case VINF_SUCCESS:
849 break;
850
851 default:
852 AssertMsg(PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip) == false, ("return code %d\n", rc));
853 break;
854 }
855 return rc;
856}
857
858/**
859 * \#PF (Page Fault) handler.
860 *
861 * Calls PGM which does the actual handling.
862 *
863 *
864 * @returns VBox status code.
865 * VINF_SUCCESS means we completely handled this trap,
866 * other codes are passed execution to host context.
867 *
868 * @param pTrpm Pointer to TRPM data (within VM).
869 * @param pRegFrame Pointer to the register frame for the trap.
870 * @internal
871 */
872DECLASM(int) TRPMGCTrap0eHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
873{
874 LogBird(("TRPMGCTrap0eHandler: eip=%RGv\n", pRegFrame->eip));
875 PVM pVM = TRPM2VM(pTrpm);
876
877 /*
878 * This is all PGM stuff.
879 */
880 int rc = PGMTrap0eHandler(pVM, pTrpm->uActiveErrorCode, pRegFrame, (RTGCPTR)pTrpm->uActiveCR2);
881
882 switch (rc)
883 {
884 case VINF_EM_RAW_EMULATE_INSTR:
885 case VINF_EM_RAW_EMULATE_INSTR_PD_FAULT:
886 case VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT:
887 case VINF_EM_RAW_EMULATE_INSTR_TSS_FAULT:
888 case VINF_EM_RAW_EMULATE_INSTR_LDT_FAULT:
889 case VINF_EM_RAW_EMULATE_INSTR_IDT_FAULT:
890 if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
891 rc = VINF_PATCH_EMULATE_INSTR;
892 break;
893
894 case VINF_EM_RAW_GUEST_TRAP:
895 if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
896 return VINF_PATM_PATCH_TRAP_PF;
897
898 rc = TRPMForwardTrap(pVM, pRegFrame, 0xE, 0, TRPM_TRAP_HAS_ERRORCODE, TRPM_TRAP);
899 Assert(rc == VINF_EM_RAW_GUEST_TRAP);
900 break;
901
902 case VINF_EM_RAW_INTERRUPT_PENDING:
903 Assert(TRPMHasTrap(pVM));
904 /* no break; */
905 case VINF_IOM_HC_MMIO_READ:
906 case VINF_IOM_HC_MMIO_WRITE:
907 case VINF_IOM_HC_MMIO_READ_WRITE:
908 case VINF_PATM_HC_MMIO_PATCH_READ:
909 case VINF_PATM_HC_MMIO_PATCH_WRITE:
910 case VINF_SUCCESS:
911 case VINF_EM_RAW_TO_R3:
912 case VINF_EM_PENDING_REQUEST:
913 case VINF_EM_RAW_TIMER_PENDING:
914 case VINF_CSAM_PENDING_ACTION:
915 case VINF_PGM_SYNC_CR3: /** @todo Check this with Sander. */
916 break;
917
918 default:
919 AssertMsg(PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip) == false, ("Patch address for return code %d. eip=%08x\n", rc, pRegFrame->eip));
920 break;
921 }
922 return trpmGCExitTrap(pVM, rc, pRegFrame);
923}
924
925
926/**
927 * Scans for the EIP in the specified array of trap handlers.
928 *
929 * If we don't fine the EIP, we'll panic.
930 *
931 * @returns VBox status code.
932 *
933 * @param pVM The VM handle.
934 * @param pRegFrame Pointer to the register frame for the trap.
935 * @param paHandlers The array of trap handler records.
936 * @param pEndRecord The end record (exclusive).
937 */
938static int trpmGCHyperGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, PCTRPMGCHYPER paHandlers, PCTRPMGCHYPER pEndRecord)
939{
940 uintptr_t uEip = (uintptr_t)pRegFrame->eip;
941 Assert(paHandlers <= pEndRecord);
942
943 Log(("trpmGCHyperGeneric: uEip=%x %p-%p\n", uEip, paHandlers, pEndRecord));
944
945#if 0 /// @todo later
946 /*
947 * Start by doing a kind of binary search.
948 */
949 unsigned iStart = 0;
950 unsigned iEnd = pEndRecord - paHandlers;
951 unsigned i = iEnd / 2;
952#endif
953
954 /*
955 * Do a linear search now (in case the array wasn't properly sorted).
956 */
957 for (PCTRPMGCHYPER pCur = paHandlers; pCur < pEndRecord; pCur++)
958 {
959 if ( pCur->uStartEIP <= uEip
960 && (pCur->uEndEIP ? pCur->uEndEIP > uEip : pCur->uStartEIP == uEip))
961 return pCur->pfnHandler(pVM, pRegFrame, pCur->uUser);
962 }
963
964 return VERR_TRPM_DONT_PANIC;
965}
966
967
968/**
969 * Hypervisor \#NP ((segment) Not Present) handler.
970 *
971 * Scans for the EIP in the registered trap handlers.
972 *
973 * @returns VBox status code.
974 * VINF_SUCCESS means we completely handled this trap,
975 * other codes are passed back to host context.
976 *
977 * @param pTrpm Pointer to TRPM data (within VM).
978 * @param pRegFrame Pointer to the register frame for the trap.
979 * @internal
980 */
981DECLASM(int) TRPMGCHyperTrap0bHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
982{
983 return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0bHandlers, g_aTrap0bHandlersEnd);
984}
985
986
987/**
988 * Hypervisor \#GP (General Protection Fault) handler.
989 *
990 * Scans for the EIP in the registered trap handlers.
991 *
992 * @returns VBox status code.
993 * VINF_SUCCESS means we completely handled this trap,
994 * other codes are passed back to host context.
995 *
996 * @param pTrpm Pointer to TRPM data (within VM).
997 * @param pRegFrame Pointer to the register frame for the trap.
998 * @internal
999 */
1000DECLASM(int) TRPMGCHyperTrap0dHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
1001{
1002 return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
1003}
1004
1005
1006/**
1007 * Hypervisor \#PF (Page Fault) handler.
1008 *
1009 * Scans for the EIP in the registered trap handlers.
1010 *
1011 * @returns VBox status code.
1012 * VINF_SUCCESS means we completely handled this trap,
1013 * other codes are passed back to host context.
1014 *
1015 * @param pTrpm Pointer to TRPM data (within VM).
1016 * @param pRegFrame Pointer to the register frame for the trap.
1017 * @internal
1018 */
1019DECLASM(int) TRPMGCHyperTrap0eHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
1020{
1021 return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
1022}
1023
1024
1025/**
1026 * Deal with hypervisor traps occuring when resuming execution on a trap.
1027 *
1028 * @returns VBox status code.
1029 * @param pVM The VM handle.
1030 * @param pRegFrame Register frame.
1031 * @param uUser User arg.
1032 */
1033DECLCALLBACK(int) trpmGCTrapInGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser)
1034{
1035 Log(("********************************************************\n"));
1036 Log(("trpmGCTrapInGeneric: eip=%RX32 uUser=%#x\n", pRegFrame->eip, uUser));
1037 Log(("********************************************************\n"));
1038
1039 if (uUser & TRPM_TRAP_IN_HYPER)
1040 {
1041 /*
1042 * Check that there is still some stack left, if not we'll flag
1043 * a guru meditation (the alternative is a triple fault).
1044 */
1045 RTGCUINTPTR cbStackUsed = (RTGCUINTPTR)VMMGetStackGC(pVM) - pRegFrame->esp;
1046 if (cbStackUsed > VMM_STACK_SIZE - _1K)
1047 {
1048 LogRel(("trpmGCTrapInGeneric: ran out of stack: esp=#x cbStackUsed=%#x\n", pRegFrame->esp, cbStackUsed));
1049 return VERR_TRPM_DONT_PANIC;
1050 }
1051
1052 /*
1053 * Just zero the register containing the selector in question.
1054 * We'll deal with the actual stale or troublesome selector value in
1055 * the outermost trap frame.
1056 */
1057 switch (uUser & TRPM_TRAP_IN_OP_MASK)
1058 {
1059 case TRPM_TRAP_IN_MOV_GS:
1060 pRegFrame->eax = 0;
1061 pRegFrame->gs = 0; /* prevent recursive trouble. */
1062 break;
1063 case TRPM_TRAP_IN_MOV_FS:
1064 pRegFrame->eax = 0;
1065 pRegFrame->fs = 0; /* prevent recursive trouble. */
1066 return VINF_SUCCESS;
1067
1068 default:
1069 AssertMsgFailed(("Invalid uUser=%#x\n", uUser));
1070 return VERR_INTERNAL_ERROR;
1071 }
1072 }
1073 else
1074 {
1075 /*
1076 * Reconstruct the guest context and switch to the recompiler.
1077 * We ASSUME we're only at
1078 */
1079 CPUMCTXCORE CtxCore = *pRegFrame;
1080 uint32_t *pEsp = (uint32_t *)pRegFrame->esp;
1081 int rc;
1082
1083 switch (uUser)
1084 {
1085 /*
1086 * This will only occur when resuming guest code in a trap handler!
1087 */
1088 /* @note ASSUMES esp points to the temporary guest CPUMCTXCORE!!! */
1089 case TRPM_TRAP_IN_MOV_GS:
1090 case TRPM_TRAP_IN_MOV_FS:
1091 case TRPM_TRAP_IN_MOV_ES:
1092 case TRPM_TRAP_IN_MOV_DS:
1093 {
1094 PCPUMCTXCORE pTempGuestCtx = (PCPUMCTXCORE)pEsp;
1095
1096 /* Just copy the whole thing; several selector registers, eip (etc) and eax are not yet in pRegFrame. */
1097 CtxCore = *pTempGuestCtx;
1098 rc = VINF_EM_RAW_STALE_SELECTOR;
1099 break;
1100 }
1101
1102 /*
1103 * This will only occur when resuming guest code!
1104 */
1105 case TRPM_TRAP_IN_IRET:
1106 CtxCore.eip = *pEsp++;
1107 CtxCore.cs = (RTSEL)*pEsp++;
1108 CtxCore.eflags.u32 = *pEsp++;
1109 CtxCore.esp = *pEsp++;
1110 CtxCore.ss = (RTSEL)*pEsp++;
1111 rc = VINF_EM_RAW_IRET_TRAP;
1112 break;
1113
1114 /*
1115 * This will only occur when resuming V86 guest code!
1116 */
1117 case TRPM_TRAP_IN_IRET | TRPM_TRAP_IN_V86:
1118 CtxCore.eip = *pEsp++;
1119 CtxCore.cs = (RTSEL)*pEsp++;
1120 CtxCore.eflags.u32 = *pEsp++;
1121 CtxCore.esp = *pEsp++;
1122 CtxCore.ss = (RTSEL)*pEsp++;
1123 CtxCore.es = (RTSEL)*pEsp++;
1124 CtxCore.ds = (RTSEL)*pEsp++;
1125 CtxCore.fs = (RTSEL)*pEsp++;
1126 CtxCore.gs = (RTSEL)*pEsp++;
1127 rc = VINF_EM_RAW_IRET_TRAP;
1128 break;
1129
1130 default:
1131 AssertMsgFailed(("Invalid uUser=%#x\n", uUser));
1132 return VERR_INTERNAL_ERROR;
1133 }
1134
1135
1136 CPUMSetGuestCtxCore(pVM, &CtxCore);
1137 TRPMGCHyperReturnToHost(pVM, rc);
1138 }
1139
1140 AssertMsgFailed(("Impossible!\n"));
1141 return VERR_INTERNAL_ERROR;
1142}
1143
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