TRPMGCHandlers.cpp@ 3934

Last change on this file since 3934 was 3509, checked in by vboxsync, 18 years ago
Emulate CLTS in GC.
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File size: 39.7 KB

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1	/* $Id: TRPMGCHandlers.cpp 3509 2007-07-09 14:33:09Z vboxsync $ */
2	/** @file
3	* TRPM - Guest Context Trap Handlers, CPP part
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 innotek GmbH
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License as published by the Free Software Foundation,
13	* in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14	* distribution. VirtualBox OSE is distributed in the hope that it will
15	* be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* If you received this file as part of a commercial VirtualBox
18	* distribution, then only the terms of your commercial VirtualBox
19	* license agreement apply instead of the previous paragraph.
20	*/
21
22
23	/*******************************************************************************
24	* Header Files *
25	*******************************************************************************/
26	#define LOG_GROUP LOG_GROUP_TRPM
27	#include <VBox/selm.h>
28	#include <VBox/iom.h>
29	#include <VBox/pgm.h>
30	#include <VBox/pdm.h>
31	#include <VBox/dbgf.h>
32	#include <VBox/em.h>
33	#include <VBox/csam.h>
34	#include <VBox/patm.h>
35	#include <VBox/mm.h>
36	#include <VBox/cpum.h>
37	#include "TRPMInternal.h"
38	#include <VBox/vm.h>
39	#include <VBox/param.h>
40
41	#include <VBox/err.h>
42	#include <VBox/dis.h>
43	#include <VBox/disopcode.h>
44	#include <VBox/x86.h>
45	#include <VBox/log.h>
46	#include <VBox/tm.h>
47	#include <iprt/asm.h>
48	#include <iprt/assert.h>
49
50	/* still here. MODR/M byte parsing */
51	#define X86_OPCODE_MODRM_MOD_MASK 0xc0
52	#define X86_OPCODE_MODRM_REG_MASK 0x38
53	#define X86_OPCODE_MODRM_RM_MASK 0x07
54
55	/** Pointer to a readonly hypervisor trap record. */
56	typedef const struct TRPMGCHYPER *PCTRPMGCHYPER;
57
58	/**
59	* A hypervisor trap record.
60	* This contains information about a handler for a instruction range.
61	*
62	* @remark This must match what TRPM_HANDLER outputs.
63	*/
64	typedef struct TRPMGCHYPER
65	{
66	/** The start address. */
67	uintptr_t uStartEIP;
68	/** The end address. (exclusive)
69	* If NULL the it's only for the instruction at pvStartEIP. */
70	uintptr_t uEndEIP;
71	/**
72	* The handler.
73	*
74	* @returns VBox status code
75	* VINF_SUCCESS means we've handled the trap.
76	* Any other error code means returning to the host context.
77	* @param pVM The VM handle.
78	* @param pRegFrame The register frame.
79	* @param uUser The user argument.
80	*/
81	DECLCALLBACKMEMBER(int, pfnHandler)(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser);
82	/** Whatever the handler desires to put here. */
83	uintptr_t uUser;
84	} TRPMGCHYPER;
85
86
87	/*******************************************************************************
88	* Global Variables *
89	*******************************************************************************/
90	__BEGIN_DECLS
91	/** Defined in VMMGC0.asm or VMMGC99.asm.
92	* @{ */
93	extern const TRPMGCHYPER g_aTrap0bHandlers[1];
94	extern const TRPMGCHYPER g_aTrap0bHandlersEnd[1];
95	extern const TRPMGCHYPER g_aTrap0dHandlers[1];
96	extern const TRPMGCHYPER g_aTrap0dHandlersEnd[1];
97	extern const TRPMGCHYPER g_aTrap0eHandlers[1];
98	extern const TRPMGCHYPER g_aTrap0eHandlersEnd[1];
99	/** @} */
100	__END_DECLS
101
102
103	/*******************************************************************************
104	* Internal Functions *
105	*******************************************************************************/
106	__BEGIN_DECLS /* addressed from asm (not called so no DECLASM). */
107	DECLCALLBACK(int) trpmGCTrapInGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser);
108	__END_DECLS
109
110
111
112	/**
113	* Exits the trap, called when exiting a trap handler.
114	*
115	* Will reset the trap if it's not a guest trap or the trap
116	* is already handled. Will process resume guest FFs.
117	*
118	* @returns rc.
119	* @param pVM VM handle.
120	* @param rc The VBox status code to return.
121	* @param pRegFrame Pointer to the register frame for the trap.
122	*/
123	static int trpmGCExitTrap(PVM pVM, int rc, PCPUMCTXCORE pRegFrame)
124	{
125	uint32_t uOldActiveVector = pVM->trpm.s.uActiveVector;
126	NOREF(uOldActiveVector);
127
128	/* Reset trap? */
129	if ( rc != VINF_EM_RAW_GUEST_TRAP
130	&& rc != VINF_EM_RAW_RING_SWITCH_INT)
131	pVM->trpm.s.uActiveVector = ~0;
132
133	#ifdef VBOX_HIGH_RES_TIMERS_HACK
134	/*
135	* Occationally we should poll timers.
136	* We must NOT do this too frequently as it adds a significant overhead
137	* and it'll kill us if the trap load is high. (See #1354.)
138	* (The heuristic is not very intelligent, we should really check trap
139	* frequency etc. here, but alas, we lack any such information atm.)
140	*/
141	static unsigned s_iTimerPoll = 0;
142	if (rc == VINF_SUCCESS)
143	{
144	if (!(++s_iTimerPoll & 0xf))
145	{
146	uint64_t cTicks = TMTimerPoll(pVM); NOREF(cTicks);
147	Log2(("TMTimerPoll at %VGv returned %RX64 (VM_FF_TIMER=%d)\n", pRegFrame->eip, cTicks, VM_FF_ISPENDING(pVM, VM_FF_TIMER)));
148	}
149	}
150	else
151	s_iTimerPoll = 0;
152	#endif
153
154	/* Clear pending inhibit interrupt state if required. (necessary for dispatching interrupts later on) */
155	if (VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS))
156	{
157	Log2(("VM_FF_INHIBIT_INTERRUPTS at %VGv successor %VGv\n", pRegFrame->eip, EMGetInhibitInterruptsPC(pVM)));
158	if (pRegFrame->eip != EMGetInhibitInterruptsPC(pVM))
159	{
160	/** @note we intentionally don't clear VM_FF_INHIBIT_INTERRUPTS here if the eip is the same as the inhibited instr address.
161	* Before we are able to execute this instruction in raw mode (iret to guest code) an external interrupt might
162	* force a world switch again. Possibly allowing a guest interrupt to be dispatched in the process. This could
163	* break the guest. Sounds very unlikely, but such timing sensitive problem are not as rare as you might think.
164	*/
165	VM_FF_CLEAR(pVM, VM_FF_INHIBIT_INTERRUPTS);
166	}
167	}
168
169	/*
170	* Pending resume-guest-FF?
171	* Or pending (A)PIC interrupt? Windows XP will crash if we delay APIC interrupts.
172	*/
173	if ( rc == VINF_SUCCESS
174	&& VM_FF_ISPENDING(pVM, VM_FF_TO_R3 \| VM_FF_TIMER \| VM_FF_INTERRUPT_APIC \| VM_FF_INTERRUPT_PIC \| VM_FF_PGM_SYNC_CR3 \| VM_FF_PGM_SYNC_CR3_NON_GLOBAL \| VM_FF_REQUEST))
175	{
176	/* Pending Ring-3 action. */
177	if (VM_FF_ISPENDING(pVM, VM_FF_TO_R3))
178	{
179	VM_FF_CLEAR(pVM, VM_FF_TO_R3);
180	rc = VINF_EM_RAW_TO_R3;
181	}
182	/* Pending timer action. */
183	else if (VM_FF_ISPENDING(pVM, VM_FF_TIMER))
184	rc = VINF_EM_RAW_TIMER_PENDING;
185	/* Pending interrupt: dispatch it. */
186	else if ( VM_FF_ISPENDING(pVM, VM_FF_INTERRUPT_APIC \| VM_FF_INTERRUPT_PIC)
187	&& !VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS)
188	&& PATMAreInterruptsEnabledByCtxCore(pVM, pRegFrame)
189	)
190	{
191	uint8_t u8Interrupt;
192	rc = PDMGetInterrupt(pVM, &u8Interrupt);
193	Log(("trpmGCExitTrap: u8Interrupt=%d (%#x) rc=%Vrc\n", u8Interrupt, u8Interrupt, rc));
194	AssertFatalMsgRC(rc, ("PDMGetInterrupt failed with %Vrc\n", rc));
195	rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)u8Interrupt, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_HARDWARE_INT);
196	/* can't return if successful */
197	Assert(rc != VINF_SUCCESS);
198
199	/* Stop the profile counter that was started in TRPMGCHandlersA.asm */
200	Assert(uOldActiveVector <= 16);
201	STAM_PROFILE_ADV_STOP(&pVM->trpm.s.aStatGCTraps[uOldActiveVector], a);
202
203	/* Assert the trap and go to the recompiler to dispatch it. */
204	TRPMAssertTrap(pVM, u8Interrupt, TRPM_HARDWARE_INT);
205
206	STAM_PROFILE_ADV_START(&pVM->trpm.s.aStatGCTraps[uOldActiveVector], a);
207	rc = VINF_EM_RAW_INTERRUPT_PENDING;
208	}
209	/*
210	* Try sync CR3?
211	* This ASSUMES that the MOV CRx, x emulation doesn't return with VINF_PGM_SYNC_CR3. (a bit hackish)
212	*/
213	else if (VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 \| VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
214	#if 1
215	rc = PGMSyncCR3(pVM, CPUMGetGuestCR0(pVM), CPUMGetGuestCR3(pVM), CPUMGetGuestCR4(pVM), VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3));
216	#else
217	rc = VINF_PGM_SYNC_CR3;
218	#endif
219	/* Pending request packets might contain actions that need immediate attention, such as pending hardware interrupts. */
220	else if (VM_FF_ISPENDING(pVM, VM_FF_REQUEST))
221	rc = VINF_EM_PENDING_REQUEST;
222	}
223
224	AssertMsg( rc != VINF_SUCCESS
225	\|\| ( pRegFrame->eflags.Bits.u1IF
226	&& ( pRegFrame->eflags.Bits.u2IOPL < (unsigned)(pRegFrame->ss & X86_SEL_RPL) \|\| pRegFrame->eflags.Bits.u1VM))
227	, ("rc = %VGv\neflags=%RX32 ss=%RTsel IOPL=%d\n", rc, pRegFrame->eflags.u32, pRegFrame->ss, pRegFrame->eflags.Bits.u2IOPL));
228	return rc;
229	}
230
231
232	/**
233	* \#DB (Debug event) handler.
234	*
235	* @returns VBox status code.
236	* VINF_SUCCESS means we completely handled this trap,
237	* other codes are passed execution to host context.
238	*
239	* @param pTrpm Pointer to TRPM data (within VM).
240	* @param pRegFrame Pointer to the register frame for the trap.
241	* @internal
242	*/
243	DECLASM(int) TRPMGCTrap01Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
244	{
245	RTGCUINTREG uDr6 = ASMGetAndClearDR6();
246	PVM pVM = TRPM2VM(pTrpm);
247	LogFlow(("TRPMGCTrap01Handler: cs:eip=%04x:%08x uDr6=%RTreg\n", pRegFrame->cs, pRegFrame->eip, uDr6));
248
249	/*
250	* We currently don't make sure of the X86_DR7_GD bit, but
251	* there might come a time when we do.
252	*/
253	if ((uDr6 & X86_DR6_BD) == X86_DR6_BD)
254	{
255	AssertReleaseMsgFailed(("X86_DR6_BD isn't used, but it's set! dr7=%RTreg(%RTreg) dr6=%RTreg\n",
256	ASMGetDR7(), CPUMGetHyperDR7(pVM), uDr6));
257	return VERR_NOT_IMPLEMENTED;
258	}
259
260	AssertReleaseMsg(!(uDr6 & X86_DR6_BT), ("X86_DR6_BT is impossible!\n"));
261
262	/*
263	* Now leave the rest to the DBGF.
264	*/
265	int rc = DBGFGCTrap01Handler(pVM, pRegFrame, uDr6);
266	if (rc == VINF_EM_RAW_GUEST_TRAP)
267	CPUMSetGuestDR6(pVM, uDr6);
268
269	return trpmGCExitTrap(pVM, rc, pRegFrame);
270	}
271
272
273
274	/**
275	* NMI handler, for when we are using NMIs to debug things.
276	*
277	* @returns VBox status code.
278	* VINF_SUCCESS means we completely handled this trap,
279	* other codes are passed execution to host context.
280	*
281	* @param pTrpm Pointer to TRPM data (within VM).
282	* @param pRegFrame Pointer to the register frame for the trap.
283	* @internal
284	* @remark This is not hooked up unless you're building with VBOX_WITH_NMI defined.
285	*/
286	DECLASM(int) TRPMGCTrap02Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
287	{
288	LogFlow(("TRPMGCTrap02Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
289	RTLogComPrintf("TRPMGCTrap02Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip);
290	return VERR_TRPM_DONT_PANIC;
291	}
292
293
294	/**
295	* \#BP (Breakpoint) handler.
296	*
297	* @returns VBox status code.
298	* VINF_SUCCESS means we completely handled this trap,
299	* other codes are passed execution to host context.
300	*
301	* @param pTrpm Pointer to TRPM data (within VM).
302	* @param pRegFrame Pointer to the register frame for the trap.
303	* @internal
304	*/
305	DECLASM(int) TRPMGCTrap03Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
306	{
307	LogFlow(("TRPMGCTrap03Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
308	PVM pVM = TRPM2VM(pTrpm);
309	int rc;
310
311	/*
312	* Both PATM are using INT3s, let them have a go first.
313	*/
314	if ( (pRegFrame->ss & X86_SEL_RPL) == 1
315	&& !pRegFrame->eflags.Bits.u1VM)
316	{
317	rc = PATMHandleInt3PatchTrap(pVM, pRegFrame);
318	if (rc == VINF_SUCCESS \|\| rc == VINF_EM_RAW_EMULATE_INSTR \|\| rc == VINF_PATM_PATCH_INT3 \|\| rc == VINF_PATM_DUPLICATE_FUNCTION)
319	return trpmGCExitTrap(pVM, rc, pRegFrame);
320	}
321	rc = DBGFGCTrap03Handler(pVM, pRegFrame);
322	/* anything we should do with this? Schedule it in GC? */
323	return trpmGCExitTrap(pVM, rc, pRegFrame);
324	}
325
326
327	/**
328	* Trap handler for illegal opcode fault (\#UD).
329	*
330	* @returns VBox status code.
331	* VINF_SUCCESS means we completely handled this trap,
332	* other codes are passed execution to host context.
333	*
334	* @param pTrpm Pointer to TRPM data (within VM).
335	* @param pRegFrame Pointer to the register frame for the trap.
336	* @internal
337	*/
338	DECLASM(int) TRPMGCTrap06Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
339	{
340	PVM pVM = TRPM2VM(pTrpm);
341	int rc;
342
343	LogFlow(("TRPMGCTrap06Handler %VGv eflags=%x\n", pRegFrame->eip, pRegFrame->eflags.u32));
344
345	if (CPUMGetGuestCPL(pVM, pRegFrame) == 0)
346	{
347	/*
348	* Decode the instruction.
349	*/
350	RTGCPTR PC;
351	rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &PC);
352	if (VBOX_FAILURE(rc))
353	{
354	Log(("TRPMGCTrap06Handler: Failed to convert %RTsel:%RX32 (cpl=%d) - rc=%Vrc !!\n", pRegFrame->cs, pRegFrame->eip, pRegFrame->ss & X86_SEL_RPL, rc));
355	return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
356	}
357
358	DISCPUSTATE Cpu;
359	uint32_t cbOp;
360	rc = EMInterpretDisasOneEx(pVM, (RTGCUINTPTR)PC, pRegFrame, &Cpu, &cbOp);
361	if (VBOX_FAILURE(rc))
362	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
363
364	if ( PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip)
365	&& Cpu.pCurInstr->opcode == OP_ILLUD2)
366	{
367	rc = PATMGCHandleIllegalInstrTrap(pVM, pRegFrame);
368	if (rc == VINF_SUCCESS \|\| rc == VINF_EM_RAW_EMULATE_INSTR \|\| rc == VINF_PATM_DUPLICATE_FUNCTION \|\| rc == VINF_PATM_PENDING_IRQ_AFTER_IRET \|\| rc == VINF_EM_RESCHEDULE)
369	return trpmGCExitTrap(pVM, rc, pRegFrame);
370	}
371	else
372	/** Note: monitor causes an #UD exception instead of #GP when not executed in ring 0. */
373	if (Cpu.pCurInstr->opcode == OP_MONITOR)
374	{
375	uint32_t cbIgnored;
376	rc = EMInterpretInstructionCPU(pVM, &Cpu, pRegFrame, PC, &cbIgnored);
377	if (RT_LIKELY(VBOX_SUCCESS(rc)))
378	pRegFrame->eip += Cpu.opsize;
379	}
380	else
381	/* Never generate a raw trap here; it might be an instruction, that requires emulation. */
382	rc = VINF_EM_RAW_EMULATE_INSTR;
383	}
384	else
385	{
386	rc = TRPMForwardTrap(pVM, pRegFrame, 0x6, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_TRAP);
387	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
388	}
389
390	return trpmGCExitTrap(pVM, rc, pRegFrame);
391	}
392
393
394	/**
395	* Trap handler for device not present fault (\#NM).
396	*
397	* Device not available, FP or (F)WAIT instruction.
398	*
399	* @returns VBox status code.
400	* VINF_SUCCESS means we completely handled this trap,
401	* other codes are passed execution to host context.
402	*
403	* @param pTrpm Pointer to TRPM data (within VM).
404	* @param pRegFrame Pointer to the register frame for the trap.
405	* @internal
406	*/
407	DECLASM(int) TRPMGCTrap07Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
408	{
409	PVM pVM = TRPM2VM(pTrpm);
410
411	LogFlow(("TRPMTrap07HandlerGC: eip=%VGv\n", pRegFrame->eip));
412	return CPUMHandleLazyFPU(pVM);
413	}
414
415
416	/**
417	* \#NP ((segment) Not Present) handler.
418	*
419	* @returns VBox status code.
420	* VINF_SUCCESS means we completely handled this trap,
421	* other codes are passed execution to host context.
422	*
423	* @param pTrpm Pointer to TRPM data (within VM).
424	* @param pRegFrame Pointer to the register frame for the trap.
425	* @internal
426	*/
427	DECLASM(int) TRPMGCTrap0bHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
428	{
429	LogFlow(("TRPMGCTrap0bHandler: eip=%VGv\n", pRegFrame->eip));
430	PVM pVM = TRPM2VM(pTrpm);
431
432	/*
433	* Try to detect instruction by opcode which caused trap.
434	* XXX note: this code may cause \#PF (trap e) or \#GP (trap d) while
435	* accessing user code. need to handle it somehow in future!
436	*/
437	uint8_t *pu8Code;
438	if (SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, (PRTGCPTR)&pu8Code) == VINF_SUCCESS)
439	{
440	/*
441	* First skip possible instruction prefixes, such as:
442	* OS, AS
443	* CS:, DS:, ES:, SS:, FS:, GS:
444	* REPE, REPNE
445	*
446	* note: Currently we supports only up to 4 prefixes per opcode, more
447	* prefixes (normally not used anyway) will cause trap d in guest.
448	* note: Instruction length in IA-32 may be up to 15 bytes, we dont
449	* check this issue, its too hard.
450	*/
451	for (unsigned i = 0; i < 4; i++)
452	{
453	if ( pu8Code[0] != 0xf2 /* REPNE/REPNZ */
454	&& pu8Code[0] != 0xf3 /* REP/REPE/REPZ */
455	&& pu8Code[0] != 0x2e /* CS: */
456	&& pu8Code[0] != 0x36 /* SS: */
457	&& pu8Code[0] != 0x3e /* DS: */
458	&& pu8Code[0] != 0x26 /* ES: */
459	&& pu8Code[0] != 0x64 /* FS: */
460	&& pu8Code[0] != 0x65 /* GS: */
461	&& pu8Code[0] != 0x66 /* OS */
462	&& pu8Code[0] != 0x67 /* AS */
463	)
464	break;
465	pu8Code++;
466	}
467
468	/*
469	* Detect right switch using a callgate.
470	*
471	* We recognize the following causes for the trap 0b:
472	* CALL FAR, CALL FAR []
473	* JMP FAR, JMP FAR []
474	* IRET (may cause a task switch)
475	*
476	* Note: we can't detect whether the trap was caused by a call to a
477	* callgate descriptor or it is a real trap 0b due to a bad selector.
478	* In both situations we'll pass execution to our recompiler so we don't
479	* have to worry.
480	* If we wanted to do better detection, we have set GDT entries to callgate
481	* descriptors pointing to our own handlers.
482	*/
483	/** @todo not sure about IRET, may generate Trap 0d (\#GP), NEED TO CHECK! */
484	if ( pu8Code[0] == 0x9a /* CALL FAR */
485	\|\| ( pu8Code[0] == 0xff /* CALL FAR [] */
486	&& (pu8Code[1] & X86_OPCODE_MODRM_REG_MASK) == 0x18)
487	\|\| pu8Code[0] == 0xea /* JMP FAR */
488	\|\| ( pu8Code[0] == 0xff /* JMP FAR [] */
489	&& (pu8Code[1] & X86_OPCODE_MODRM_REG_MASK) == 0x28)
490	\|\| pu8Code[0] == 0xcf /* IRET */
491	)
492	{
493	/*
494	* Got potential call to callgate.
495	* We simply return execution to the recompiler to do emulation
496	* starting from the instruction which caused the trap.
497	*/
498	pTrpm->uActiveVector = ~0;
499	return VINF_EM_RAW_RING_SWITCH;
500	}
501	}
502
503	/*
504	* Pass trap 0b as is to the recompiler in all other cases.
505	*/
506	return VINF_EM_RAW_GUEST_TRAP;
507	}
508
509
510	/**
511	* \#GP (General Protection Fault) handler for Ring-0 privileged instructions.
512	*
513	* @returns VBox status code.
514	* VINF_SUCCESS means we completely handled this trap,
515	* other codes are passed execution to host context.
516	*
517	* @param pVM The VM handle.
518	* @param pRegFrame Pointer to the register frame for the trap.
519	* @param pCpu The opcode info.
520	* @param PC The program counter corresponding to cs:eip in pRegFrame.
521	*/
522	static int trpmGCTrap0dHandlerRing0(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, RTGCPTR PC)
523	{
524	int rc;
525
526	/*
527	* Try handle it here, if not return to HC and emulate/interpret it there.
528	*/
529	switch (pCpu->pCurInstr->opcode)
530	{
531	case OP_INT3:
532	/*
533	* Little hack to make the code below not fail
534	*/
535	pCpu->param1.flags = USE_IMMEDIATE8;
536	pCpu->param1.parval = 3;
537	/* fallthru */
538	case OP_INT:
539	{
540	Assert(pCpu->param1.flags & USE_IMMEDIATE8);
541	Assert(!(PATMIsPatchGCAddr(pVM, PC)));
542	if (pCpu->param1.parval == 3)
543	{
544	/* Int 3 replacement patch? */
545	if (PATMHandleInt3PatchTrap(pVM, pRegFrame) == VINF_SUCCESS)
546	{
547	AssertFailed();
548	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
549	}
550	}
551	rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT);
552	if (VBOX_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
553	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
554
555	pVM->trpm.s.uActiveVector = (pVM->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
556	pVM->trpm.s.enmActiveType = TRPM_SOFTWARE_INT;
557	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH_INT, pRegFrame);
558	}
559
560	#ifdef PATM_EMULATE_SYSENTER
561	case OP_SYSEXIT:
562	case OP_SYSRET:
563	rc = PATMSysCall(pVM, pRegFrame, pCpu);
564	return trpmGCExitTrap(pVM, rc, pRegFrame);
565	#endif
566
567	case OP_HLT:
568	/* If it's in patch code, defer to ring-3. */
569	if (PATMIsPatchGCAddr(pVM, PC))
570	break;
571
572	pRegFrame->eip += pCpu->opsize;
573	return trpmGCExitTrap(pVM, VINF_EM_HALT, pRegFrame);
574
575
576	/*
577	* These instructions are used by PATM and CASM for finding
578	* dangerous non-trapping instructions. Thus, since all
579	* scanning and patching is done in ring-3 we'll have to
580	* return to ring-3 on the first encounter of these instructions.
581	*/
582	case OP_MOV_CR:
583	case OP_MOV_DR:
584	/* We can safely emulate control/debug register move instructions in patched code. */
585	if ( !PATMIsPatchGCAddr(pVM, PC)
586	&& !CSAMIsKnownDangerousInstr(pVM, PC))
587	break;
588	case OP_INVLPG:
589	case OP_LLDT:
590	case OP_STI:
591	case OP_RDTSC:
592	case OP_CLTS:
593	{
594	uint32_t cbIgnored;
595	rc = EMInterpretInstructionCPU(pVM, pCpu, pRegFrame, PC, &cbIgnored);
596	if (VBOX_SUCCESS(rc))
597	pRegFrame->eip += pCpu->opsize;
598	else if (rc == VERR_EM_INTERPRETER)
599	rc = VINF_EM_RAW_EXCEPTION_PRIVILEGED;
600	return trpmGCExitTrap(pVM, rc, pRegFrame);
601	}
602	}
603
604	return trpmGCExitTrap(pVM, VINF_EM_RAW_EXCEPTION_PRIVILEGED, pRegFrame);
605	}
606
607
608	/**
609	* \#GP (General Protection Fault) handler for Ring-3.
610	*
611	* @returns VBox status code.
612	* VINF_SUCCESS means we completely handled this trap,
613	* other codes are passed execution to host context.
614	*
615	* @param pVM The VM handle.
616	* @param pRegFrame Pointer to the register frame for the trap.
617	* @param pCpu The opcode info.
618	* @param PC The program counter corresponding to cs:eip in pRegFrame.
619	*/
620	static int trpmGCTrap0dHandlerRing3(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, RTGCPTR PC)
621	{
622	int rc;
623
624	Assert(!pRegFrame->eflags.Bits.u1VM);
625
626	switch (pCpu->pCurInstr->opcode)
627	{
628	/*
629	* STI and CLI are I/O privileged, i.e. if IOPL
630	*/
631	case OP_STI:
632	case OP_CLI:
633	{
634	uint32_t efl = CPUMRawGetEFlags(pVM, pRegFrame);
635	if (X86_EFL_GET_IOPL(efl) >= (unsigned)(pRegFrame->ss & X86_SEL_RPL))
636	{
637	LogFlow(("trpmGCTrap0dHandlerRing3: CLI/STI -> REM\n"));
638	return trpmGCExitTrap(pVM, VINF_EM_RESCHEDULE_REM, pRegFrame);
639	}
640	LogFlow(("trpmGCTrap0dHandlerRing3: CLI/STI -> #GP(0)\n"));
641	break;
642	}
643
644	/*
645	* INT3 and INT xx are ring-switching.
646	* (The shadow IDT will have set the entries to DPL=0, that's why we're here.)
647	*/
648	case OP_INT3:
649	/*
650	* Little hack to make the code below not fail
651	*/
652	pCpu->param1.flags = USE_IMMEDIATE8;
653	pCpu->param1.parval = 3;
654	/* fall thru */
655	case OP_INT:
656	{
657	Assert(pCpu->param1.flags & USE_IMMEDIATE8);
658	rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT);
659	if (VBOX_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
660	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
661
662	pVM->trpm.s.uActiveVector = (pVM->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
663	pVM->trpm.s.enmActiveType = TRPM_SOFTWARE_INT;
664	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH_INT, pRegFrame);
665	}
666
667	/*
668	* SYSCALL, SYSENTER, INTO and BOUND are also ring-switchers.
669	*/
670	case OP_SYSCALL:
671	case OP_SYSENTER:
672	#ifdef PATM_EMULATE_SYSENTER
673	rc = PATMSysCall(pVM, pRegFrame, pCpu);
674	if (rc == VINF_SUCCESS)
675	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
676	/* else no break; */
677	#endif
678	case OP_BOUND:
679	case OP_INTO:
680	pVM->trpm.s.uActiveVector = ~0;
681	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH, pRegFrame);
682
683	/*
684	* Handle virtualized TSC reads.
685	*/
686	case OP_RDTSC:
687	{
688	uint32_t cbIgnored;
689	rc = EMInterpretInstructionCPU(pVM, pCpu, pRegFrame, PC, &cbIgnored);
690	if (VBOX_SUCCESS(rc))
691	pRegFrame->eip += pCpu->opsize;
692	else if (rc == VERR_EM_INTERPRETER)
693	rc = VINF_EM_RAW_EXCEPTION_PRIVILEGED;
694	return trpmGCExitTrap(pVM, rc, pRegFrame);
695	}
696	}
697
698	/*
699	* A genuine guest fault.
700	*/
701	return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
702	}
703
704
705	/**
706	* \#GP (General Protection Fault) handler.
707	*
708	* @returns VBox status code.
709	* VINF_SUCCESS means we completely handled this trap,
710	* other codes are passed execution to host context.
711	*
712	* @param pVM The VM handle.
713	* @param pTrpm Pointer to TRPM data (within VM).
714	* @param pRegFrame Pointer to the register frame for the trap.
715	*/
716	static int trpmGCTrap0dHandler(PVM pVM, PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
717	{
718	LogFlow(("trpmGCTrap0dHandler: cs:eip=%RTsel:%VGv uErr=%RX32\n", pRegFrame->ss, pRegFrame->eip, pTrpm->uActiveErrorCode));
719
720	#if 0 /* not right for iret. Shouldn't really be needed as SELMValidateAndConvertCSAddr deals with invalid cs. */
721	/*
722	* Filter out selector problems first as these may mean that the
723	* instruction isn't safe to read. If we're here because CS is NIL
724	* the flattening of cs:eip will deal with that.
725	*/
726	if ( !(pTrpm->uActiveErrorCode & (X86_TRAP_ERR_IDT \| X86_TRAP_ERR_EXTERNAL))
727	&& (pTrpm->uActiveErrorCode & X86_TRAP_ERR_SEL_MASK))
728	{
729	/* It's a guest trap. */
730	return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
731	}
732	#endif
733
734	STAM_PROFILE_ADV_START(&pVM->trpm.s.StatTrap0dDisasm, a);
735	/*
736	* Decode the instruction.
737	*/
738	RTGCPTR PC;
739	int rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &PC);
740	if (VBOX_FAILURE(rc))
741	{
742	Log(("trpmGCTrap0dHandler: Failed to convert %RTsel:%RX32 (cpl=%d) - rc=%Vrc !!\n",
743	pRegFrame->cs, pRegFrame->eip, pRegFrame->ss & X86_SEL_RPL, rc));
744	STAM_PROFILE_ADV_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
745	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
746	}
747
748	DISCPUSTATE Cpu;
749	uint32_t cbOp;
750	rc = EMInterpretDisasOneEx(pVM, (RTGCUINTPTR)PC, pRegFrame, &Cpu, &cbOp);
751	if (VBOX_FAILURE(rc))
752	{
753	STAM_PROFILE_ADV_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
754	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
755	}
756	STAM_PROFILE_ADV_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
757
758	/*
759	* Deal with I/O port access.
760	*/
761	if ( pVM->trpm.s.uActiveErrorCode == 0
762	&& (Cpu.pCurInstr->optype & OPTYPE_PORTIO))
763	{
764	rc = EMInterpretPortIO(pVM, pRegFrame, &Cpu, cbOp);
765	return trpmGCExitTrap(pVM, rc, pRegFrame);
766	}
767
768
769	/*
770	* Deal with Ring-0 (privileged instructions)
771	*/
772	if ( (pRegFrame->ss & X86_SEL_RPL) <= 1
773	&& !pRegFrame->eflags.Bits.u1VM)
774	return trpmGCTrap0dHandlerRing0(pVM, pRegFrame, &Cpu, PC);
775
776	/*
777	* Deal with Ring-3 GPs.
778	*/
779	if (!pRegFrame->eflags.Bits.u1VM)
780	return trpmGCTrap0dHandlerRing3(pVM, pRegFrame, &Cpu, PC);
781
782	/*
783	* Deal with v86 code.
784	*/
785
786	/* We always set IOPL to zero which makes e.g. pushf fault in V86 mode. The guest might use IOPL=3 and therefor not expect a #GP.
787	* Simply fall back to the recompiler to emulate this instruction.
788	*/
789	/* Retrieve the eflags including the virtualized bits. */
790	/** @note hackish as the cpumctxcore structure doesn't contain the right value */
791	X86EFLAGS eflags;
792	eflags.u32 = CPUMRawGetEFlags(pVM, pRegFrame);
793	if (eflags.Bits.u2IOPL != 3)
794	{
795	Assert(eflags.Bits.u2IOPL == 0);
796
797	int rc = TRPMForwardTrap(pVM, pRegFrame, 0xD, 0, TRPM_TRAP_HAS_ERRORCODE, TRPM_TRAP);
798	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
799	return trpmGCExitTrap(pVM, rc, pRegFrame);
800	}
801	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
802	}
803
804
805	/**
806	* \#GP (General Protection Fault) handler.
807	*
808	* @returns VBox status code.
809	* VINF_SUCCESS means we completely handled this trap,
810	* other codes are passed execution to host context.
811	*
812	* @param pTrpm Pointer to TRPM data (within VM).
813	* @param pRegFrame Pointer to the register frame for the trap.
814	* @internal
815	*/
816	DECLASM(int) TRPMGCTrap0dHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
817	{
818	LogFlow(("TRPMGCTrap0dHandler: eip=%RGv\n", pRegFrame->eip));
819	PVM pVM = TRPM2VM(pTrpm);
820
821	int rc = trpmGCTrap0dHandler(pVM, pTrpm, pRegFrame);
822	switch (rc)
823	{
824	case VINF_EM_RAW_GUEST_TRAP:
825	case VINF_EM_RAW_EXCEPTION_PRIVILEGED:
826	if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
827	rc = VINF_PATM_PATCH_TRAP_GP;
828	break;
829
830	case VINF_EM_RAW_INTERRUPT_PENDING:
831	Assert(TRPMHasTrap(pVM));
832	/* no break; */
833	case VINF_PGM_SYNC_CR3: /** @todo Check this with Sander. */
834	case VINF_IOM_HC_IOPORT_READ:
835	case VINF_IOM_HC_IOPORT_WRITE:
836	case VINF_IOM_HC_MMIO_WRITE:
837	case VINF_IOM_HC_MMIO_READ:
838	case VINF_IOM_HC_MMIO_READ_WRITE:
839	case VINF_PATM_PATCH_INT3:
840	case VINF_EM_RAW_TO_R3:
841	case VINF_EM_RAW_TIMER_PENDING:
842	case VINF_EM_PENDING_REQUEST:
843	case VINF_EM_HALT:
844	case VINF_SUCCESS:
845	break;
846
847	default:
848	AssertMsg(PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip) == false, ("return code %d\n", rc));
849	break;
850	}
851	return rc;
852	}
853
854	/**
855	* \#PF (Page Fault) handler.
856	*
857	* Calls PGM which does the actual handling.
858	*
859	*
860	* @returns VBox status code.
861	* VINF_SUCCESS means we completely handled this trap,
862	* other codes are passed execution to host context.
863	*
864	* @param pTrpm Pointer to TRPM data (within VM).
865	* @param pRegFrame Pointer to the register frame for the trap.
866	* @internal
867	*/
868	DECLASM(int) TRPMGCTrap0eHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
869	{
870	LogBird(("TRPMGCTrap0eHandler: eip=%RGv\n", pRegFrame->eip));
871	PVM pVM = TRPM2VM(pTrpm);
872
873	/*
874	* This is all PGM stuff.
875	*/
876	int rc = PGMTrap0eHandler(pVM, pTrpm->uActiveErrorCode, pRegFrame, (RTGCPTR)pTrpm->uActiveCR2);
877
878	switch (rc)
879	{
880	case VINF_EM_RAW_EMULATE_INSTR:
881	case VINF_EM_RAW_EMULATE_INSTR_PD_FAULT:
882	case VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT:
883	case VINF_EM_RAW_EMULATE_INSTR_TSS_FAULT:
884	case VINF_EM_RAW_EMULATE_INSTR_LDT_FAULT:
885	case VINF_EM_RAW_EMULATE_INSTR_IDT_FAULT:
886	if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
887	rc = VINF_PATCH_EMULATE_INSTR;
888	break;
889
890	case VINF_EM_RAW_GUEST_TRAP:
891	if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
892	return VINF_PATM_PATCH_TRAP_PF;
893
894	rc = TRPMForwardTrap(pVM, pRegFrame, 0xE, 0, TRPM_TRAP_HAS_ERRORCODE, TRPM_TRAP);
895	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
896	break;
897
898	case VINF_EM_RAW_INTERRUPT_PENDING:
899	Assert(TRPMHasTrap(pVM));
900	/* no break; */
901	case VINF_IOM_HC_MMIO_READ:
902	case VINF_IOM_HC_MMIO_WRITE:
903	case VINF_IOM_HC_MMIO_READ_WRITE:
904	case VINF_PATM_HC_MMIO_PATCH_READ:
905	case VINF_PATM_HC_MMIO_PATCH_WRITE:
906	case VINF_SUCCESS:
907	case VINF_EM_RAW_TO_R3:
908	case VINF_EM_PENDING_REQUEST:
909	case VINF_EM_RAW_TIMER_PENDING:
910	case VINF_CSAM_PENDING_ACTION:
911	case VINF_PGM_SYNC_CR3: /** @todo Check this with Sander. */
912	break;
913
914	default:
915	AssertMsg(PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip) == false, ("Patch address for return code %d. eip=%08x\n", rc, pRegFrame->eip));
916	break;
917	}
918	return trpmGCExitTrap(pVM, rc, pRegFrame);
919	}
920
921
922	/**
923	* Scans for the EIP in the specified array of trap handlers.
924	*
925	* If we don't fine the EIP, we'll panic.
926	*
927	* @returns VBox status code.
928	*
929	* @param pVM The VM handle.
930	* @param pRegFrame Pointer to the register frame for the trap.
931	* @param paHandlers The array of trap handler records.
932	* @param pEndRecord The end record (exclusive).
933	*/
934	static int trpmGCHyperGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, PCTRPMGCHYPER paHandlers, PCTRPMGCHYPER pEndRecord)
935	{
936	uintptr_t uEip = (uintptr_t)pRegFrame->eip;
937	Assert(paHandlers <= pEndRecord);
938
939	Log(("trpmGCHyperGeneric: uEip=%x %p-%p\n", uEip, paHandlers, pEndRecord));
940
941	#if 0 /// @todo later
942	/*
943	* Start by doing a kind of binary search.
944	*/
945	unsigned iStart = 0;
946	unsigned iEnd = pEndRecord - paHandlers;
947	unsigned i = iEnd / 2;
948	#endif
949
950	/*
951	* Do a linear search now (in case the array wasn't properly sorted).
952	*/
953	for (PCTRPMGCHYPER pCur = paHandlers; pCur < pEndRecord; pCur++)
954	{
955	if ( pCur->uStartEIP <= uEip
956	&& (pCur->uEndEIP ? pCur->uEndEIP > uEip : pCur->uStartEIP == uEip))
957	return pCur->pfnHandler(pVM, pRegFrame, pCur->uUser);
958	}
959
960	return VERR_TRPM_DONT_PANIC;
961	}
962
963
964	/**
965	* Hypervisor \#NP ((segment) Not Present) handler.
966	*
967	* Scans for the EIP in the registered trap handlers.
968	*
969	* @returns VBox status code.
970	* VINF_SUCCESS means we completely handled this trap,
971	* other codes are passed back to host context.
972	*
973	* @param pTrpm Pointer to TRPM data (within VM).
974	* @param pRegFrame Pointer to the register frame for the trap.
975	* @internal
976	*/
977	DECLASM(int) TRPMGCHyperTrap0bHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
978	{
979	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0bHandlers, g_aTrap0bHandlersEnd);
980	}
981
982
983	/**
984	* Hypervisor \#GP (General Protection Fault) handler.
985	*
986	* Scans for the EIP in the registered trap handlers.
987	*
988	* @returns VBox status code.
989	* VINF_SUCCESS means we completely handled this trap,
990	* other codes are passed back to host context.
991	*
992	* @param pTrpm Pointer to TRPM data (within VM).
993	* @param pRegFrame Pointer to the register frame for the trap.
994	* @internal
995	*/
996	DECLASM(int) TRPMGCHyperTrap0dHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
997	{
998	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
999	}
1000
1001
1002	/**
1003	* Hypervisor \#PF (Page Fault) handler.
1004	*
1005	* Scans for the EIP in the registered trap handlers.
1006	*
1007	* @returns VBox status code.
1008	* VINF_SUCCESS means we completely handled this trap,
1009	* other codes are passed back to host context.
1010	*
1011	* @param pTrpm Pointer to TRPM data (within VM).
1012	* @param pRegFrame Pointer to the register frame for the trap.
1013	* @internal
1014	*/
1015	DECLASM(int) TRPMGCHyperTrap0eHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
1016	{
1017	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
1018	}
1019
1020
1021	/**
1022	* Deal with hypervisor traps occuring when resuming execution on a trap.
1023	*
1024	* @returns VBox status code.
1025	* @param pVM The VM handle.
1026	* @param pRegFrame Register frame.
1027	* @param uUser User arg.
1028	*/
1029	DECLCALLBACK(int) trpmGCTrapInGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser)
1030	{
1031	Log(("********************************************************\n"));
1032	Log(("trpmGCTrapInGeneric: eip=%RX32 uUser=%#x\n", pRegFrame->eip, uUser));
1033	Log(("********************************************************\n"));
1034
1035	if (uUser & TRPM_TRAP_IN_HYPER)
1036	{
1037	/*
1038	* Check that there is still some stack left, if not we'll flag
1039	* a guru meditation (the alternative is a triple fault).
1040	*/
1041	RTGCUINTPTR cbStackUsed = (RTGCUINTPTR)VMMGetStackGC(pVM) - pRegFrame->esp;
1042	if (cbStackUsed > VMM_STACK_SIZE - _1K)
1043	{
1044	LogRel(("trpmGCTrapInGeneric: ran out of stack: esp=#x cbStackUsed=%#x\n", pRegFrame->esp, cbStackUsed));
1045	return VERR_TRPM_DONT_PANIC;
1046	}
1047
1048	/*
1049	* Just zero the register containing the selector in question.
1050	* We'll deal with the actual stale or troublesome selector value in
1051	* the outermost trap frame.
1052	*/
1053	switch (uUser & TRPM_TRAP_IN_OP_MASK)
1054	{
1055	case TRPM_TRAP_IN_MOV_GS:
1056	pRegFrame->eax = 0;
1057	pRegFrame->gs = 0; /* prevent recursive trouble. */
1058	break;
1059	case TRPM_TRAP_IN_MOV_FS:
1060	pRegFrame->eax = 0;
1061	pRegFrame->fs = 0; /* prevent recursive trouble. */
1062	return VINF_SUCCESS;
1063
1064	default:
1065	AssertMsgFailed(("Invalid uUser=%#x\n", uUser));
1066	return VERR_INTERNAL_ERROR;
1067	}
1068	}
1069	else
1070	{
1071	/*
1072	* Reconstruct the guest context and switch to the recompiler.
1073	* We ASSUME we're only at
1074	*/
1075	CPUMCTXCORE CtxCore = *pRegFrame;
1076	uint32_t pEsp = (uint32_t )pRegFrame->esp;
1077	int rc;
1078
1079	switch (uUser)
1080	{
1081	/*
1082	* This will only occur when resuming guest code in a trap handler!
1083	*/
1084	/* @note ASSUMES esp points to the temporary guest CPUMCTXCORE!!! */
1085	case TRPM_TRAP_IN_MOV_GS:
1086	case TRPM_TRAP_IN_MOV_FS:
1087	case TRPM_TRAP_IN_MOV_ES:
1088	case TRPM_TRAP_IN_MOV_DS:
1089	{
1090	PCPUMCTXCORE pTempGuestCtx = (PCPUMCTXCORE)pEsp;
1091
1092	/* Just copy the whole thing; several selector registers, eip (etc) and eax are not yet in pRegFrame. */
1093	CtxCore = *pTempGuestCtx;
1094	rc = VINF_EM_RAW_STALE_SELECTOR;
1095	break;
1096	}
1097
1098	/*
1099	* This will only occur when resuming guest code!
1100	*/
1101	case TRPM_TRAP_IN_IRET:
1102	CtxCore.eip = *pEsp++;
1103	CtxCore.cs = (RTSEL)*pEsp++;
1104	CtxCore.eflags.u32 = *pEsp++;
1105	CtxCore.esp = *pEsp++;
1106	CtxCore.ss = (RTSEL)*pEsp++;
1107	rc = VINF_EM_RAW_IRET_TRAP;
1108	break;
1109
1110	/*
1111	* This will only occur when resuming V86 guest code!
1112	*/
1113	case TRPM_TRAP_IN_IRET \| TRPM_TRAP_IN_V86:
1114	CtxCore.eip = *pEsp++;
1115	CtxCore.cs = (RTSEL)*pEsp++;
1116	CtxCore.eflags.u32 = *pEsp++;
1117	CtxCore.esp = *pEsp++;
1118	CtxCore.ss = (RTSEL)*pEsp++;
1119	CtxCore.es = (RTSEL)*pEsp++;
1120	CtxCore.ds = (RTSEL)*pEsp++;
1121	CtxCore.fs = (RTSEL)*pEsp++;
1122	CtxCore.gs = (RTSEL)*pEsp++;
1123	rc = VINF_EM_RAW_IRET_TRAP;
1124	break;
1125
1126	default:
1127	AssertMsgFailed(("Invalid uUser=%#x\n", uUser));
1128	return VERR_INTERNAL_ERROR;
1129	}
1130
1131
1132	CPUMSetGuestCtxCore(pVM, &CtxCore);
1133	TRPMGCHyperReturnToHost(pVM, rc);
1134	}
1135
1136	AssertMsgFailed(("Impossible!\n"));
1137	return VERR_INTERNAL_ERROR;
1138	}
1139

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source: vbox/trunk/src/VBox/VMM/VMMGC/TRPMGCHandlers.cpp@ 3934

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