VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMGC/TRPMGCHandlers.cpp@ 8465

Last change on this file since 8465 was 8155, checked in by vboxsync, 17 years ago

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1/* $Id: TRPMGCHandlers.cpp 8155 2008-04-18 15:16:47Z vboxsync $ */
2/** @file
3 * TRPM - Guest Context Trap Handlers, CPP part
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22
23/*******************************************************************************
24* Header Files *
25*******************************************************************************/
26#define LOG_GROUP LOG_GROUP_TRPM
27#include <VBox/selm.h>
28#include <VBox/iom.h>
29#include <VBox/pgm.h>
30#include <VBox/pdm.h>
31#include <VBox/dbgf.h>
32#include <VBox/em.h>
33#include <VBox/csam.h>
34#include <VBox/patm.h>
35#include <VBox/mm.h>
36#include <VBox/cpum.h>
37#include "TRPMInternal.h"
38#include <VBox/vm.h>
39#include <VBox/param.h>
40
41#include <VBox/err.h>
42#include <VBox/dis.h>
43#include <VBox/disopcode.h>
44#include <VBox/x86.h>
45#include <VBox/log.h>
46#include <VBox/tm.h>
47#include <iprt/asm.h>
48#include <iprt/assert.h>
49
50/* still here. MODR/M byte parsing */
51#define X86_OPCODE_MODRM_MOD_MASK 0xc0
52#define X86_OPCODE_MODRM_REG_MASK 0x38
53#define X86_OPCODE_MODRM_RM_MASK 0x07
54
55/** Pointer to a readonly hypervisor trap record. */
56typedef const struct TRPMGCHYPER *PCTRPMGCHYPER;
57
58/**
59 * A hypervisor trap record.
60 * This contains information about a handler for a instruction range.
61 *
62 * @remark This must match what TRPM_HANDLER outputs.
63 */
64typedef struct TRPMGCHYPER
65{
66 /** The start address. */
67 uintptr_t uStartEIP;
68 /** The end address. (exclusive)
69 * If NULL the it's only for the instruction at pvStartEIP. */
70 uintptr_t uEndEIP;
71 /**
72 * The handler.
73 *
74 * @returns VBox status code
75 * VINF_SUCCESS means we've handled the trap.
76 * Any other error code means returning to the host context.
77 * @param pVM The VM handle.
78 * @param pRegFrame The register frame.
79 * @param uUser The user argument.
80 */
81 DECLGCCALLBACKMEMBER(int, pfnHandler, (PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser));
82 /** Whatever the handler desires to put here. */
83 uintptr_t uUser;
84} TRPMGCHYPER;
85
86
87/*******************************************************************************
88* Global Variables *
89*******************************************************************************/
90__BEGIN_DECLS
91/** Defined in VMMGC0.asm or VMMGC99.asm.
92 * @{ */
93extern const TRPMGCHYPER g_aTrap0bHandlers[1];
94extern const TRPMGCHYPER g_aTrap0bHandlersEnd[1];
95extern const TRPMGCHYPER g_aTrap0dHandlers[1];
96extern const TRPMGCHYPER g_aTrap0dHandlersEnd[1];
97extern const TRPMGCHYPER g_aTrap0eHandlers[1];
98extern const TRPMGCHYPER g_aTrap0eHandlersEnd[1];
99/** @} */
100__END_DECLS
101
102
103/*******************************************************************************
104* Internal Functions *
105*******************************************************************************/
106__BEGIN_DECLS /* addressed from asm (not called so no DECLASM). */
107DECLCALLBACK(int) trpmGCTrapInGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser);
108__END_DECLS
109
110
111
112/**
113 * Exits the trap, called when exiting a trap handler.
114 *
115 * Will reset the trap if it's not a guest trap or the trap
116 * is already handled. Will process resume guest FFs.
117 *
118 * @returns rc.
119 * @param pVM VM handle.
120 * @param rc The VBox status code to return.
121 * @param pRegFrame Pointer to the register frame for the trap.
122 */
123static int trpmGCExitTrap(PVM pVM, int rc, PCPUMCTXCORE pRegFrame)
124{
125 uint32_t uOldActiveVector = pVM->trpm.s.uActiveVector;
126 NOREF(uOldActiveVector);
127
128 /* Reset trap? */
129 if ( rc != VINF_EM_RAW_GUEST_TRAP
130 && rc != VINF_EM_RAW_RING_SWITCH_INT)
131 pVM->trpm.s.uActiveVector = ~0;
132
133#ifdef VBOX_HIGH_RES_TIMERS_HACK
134 /*
135 * Occationally we should poll timers.
136 * We must *NOT* do this too frequently as it adds a significant overhead
137 * and it'll kill us if the trap load is high. (See #1354.)
138 * (The heuristic is not very intelligent, we should really check trap
139 * frequency etc. here, but alas, we lack any such information atm.)
140 */
141 static unsigned s_iTimerPoll = 0;
142 if (rc == VINF_SUCCESS)
143 {
144 if (!(++s_iTimerPoll & 0xf))
145 {
146 uint64_t cTicks = TMTimerPoll(pVM); NOREF(cTicks);
147 Log2(("TMTimerPoll at %VGv returned %RX64 (VM_FF_TIMER=%d)\n", pRegFrame->eip, cTicks, VM_FF_ISPENDING(pVM, VM_FF_TIMER)));
148 }
149 }
150 else
151 s_iTimerPoll = 0;
152#endif
153
154 /* Clear pending inhibit interrupt state if required. (necessary for dispatching interrupts later on) */
155 if (VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS))
156 {
157 Log2(("VM_FF_INHIBIT_INTERRUPTS at %VGv successor %VGv\n", pRegFrame->eip, EMGetInhibitInterruptsPC(pVM)));
158 if (pRegFrame->eip != EMGetInhibitInterruptsPC(pVM))
159 {
160 /** @note we intentionally don't clear VM_FF_INHIBIT_INTERRUPTS here if the eip is the same as the inhibited instr address.
161 * Before we are able to execute this instruction in raw mode (iret to guest code) an external interrupt might
162 * force a world switch again. Possibly allowing a guest interrupt to be dispatched in the process. This could
163 * break the guest. Sounds very unlikely, but such timing sensitive problem are not as rare as you might think.
164 */
165 VM_FF_CLEAR(pVM, VM_FF_INHIBIT_INTERRUPTS);
166 }
167 }
168
169 /*
170 * Pending resume-guest-FF?
171 * Or pending (A)PIC interrupt? Windows XP will crash if we delay APIC interrupts.
172 */
173 if ( rc == VINF_SUCCESS
174 && VM_FF_ISPENDING(pVM, VM_FF_TO_R3 | VM_FF_TIMER | VM_FF_INTERRUPT_APIC | VM_FF_INTERRUPT_PIC | VM_FF_PGM_SYNC_CR3 | VM_FF_PGM_SYNC_CR3_NON_GLOBAL | VM_FF_REQUEST))
175 {
176 /* Pending Ring-3 action. */
177 if (VM_FF_ISPENDING(pVM, VM_FF_TO_R3))
178 {
179 VM_FF_CLEAR(pVM, VM_FF_TO_R3);
180 rc = VINF_EM_RAW_TO_R3;
181 }
182 /* Pending timer action. */
183 else if (VM_FF_ISPENDING(pVM, VM_FF_TIMER))
184 rc = VINF_EM_RAW_TIMER_PENDING;
185 /* Pending interrupt: dispatch it. */
186 else if ( VM_FF_ISPENDING(pVM, VM_FF_INTERRUPT_APIC | VM_FF_INTERRUPT_PIC)
187 && !VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS)
188 && PATMAreInterruptsEnabledByCtxCore(pVM, pRegFrame)
189 )
190 {
191 uint8_t u8Interrupt;
192 rc = PDMGetInterrupt(pVM, &u8Interrupt);
193 Log(("trpmGCExitTrap: u8Interrupt=%d (%#x) rc=%Vrc\n", u8Interrupt, u8Interrupt, rc));
194 AssertFatalMsgRC(rc, ("PDMGetInterrupt failed with %Vrc\n", rc));
195 rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)u8Interrupt, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_HARDWARE_INT);
196 /* can't return if successful */
197 Assert(rc != VINF_SUCCESS);
198
199 /* Stop the profile counter that was started in TRPMGCHandlersA.asm */
200 Assert(uOldActiveVector <= 16);
201 STAM_PROFILE_ADV_STOP(&pVM->trpm.s.aStatGCTraps[uOldActiveVector], a);
202
203 /* Assert the trap and go to the recompiler to dispatch it. */
204 TRPMAssertTrap(pVM, u8Interrupt, TRPM_HARDWARE_INT);
205
206 STAM_PROFILE_ADV_START(&pVM->trpm.s.aStatGCTraps[uOldActiveVector], a);
207 rc = VINF_EM_RAW_INTERRUPT_PENDING;
208 }
209 /*
210 * Try sync CR3?
211 * This ASSUMES that the MOV CRx, x emulation doesn't return with VINF_PGM_SYNC_CR3. (a bit hackish)
212 */
213 else if (VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 | VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
214#if 1
215 rc = PGMSyncCR3(pVM, CPUMGetGuestCR0(pVM), CPUMGetGuestCR3(pVM), CPUMGetGuestCR4(pVM), VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3));
216#else
217 rc = VINF_PGM_SYNC_CR3;
218#endif
219 /* Pending request packets might contain actions that need immediate attention, such as pending hardware interrupts. */
220 else if (VM_FF_ISPENDING(pVM, VM_FF_REQUEST))
221 rc = VINF_EM_PENDING_REQUEST;
222 }
223
224 AssertMsg( rc != VINF_SUCCESS
225 || ( pRegFrame->eflags.Bits.u1IF
226 && ( pRegFrame->eflags.Bits.u2IOPL < (unsigned)(pRegFrame->ss & X86_SEL_RPL) || pRegFrame->eflags.Bits.u1VM))
227 , ("rc = %VGv\neflags=%RX32 ss=%RTsel IOPL=%d\n", rc, pRegFrame->eflags.u32, pRegFrame->ss, pRegFrame->eflags.Bits.u2IOPL));
228 return rc;
229}
230
231
232/**
233 * \#DB (Debug event) handler.
234 *
235 * @returns VBox status code.
236 * VINF_SUCCESS means we completely handled this trap,
237 * other codes are passed execution to host context.
238 *
239 * @param pTrpm Pointer to TRPM data (within VM).
240 * @param pRegFrame Pointer to the register frame for the trap.
241 * @internal
242 */
243DECLASM(int) TRPMGCTrap01Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
244{
245 RTGCUINTREG uDr6 = ASMGetAndClearDR6();
246 PVM pVM = TRPM2VM(pTrpm);
247 LogFlow(("TRPMGCTrap01Handler: cs:eip=%04x:%08x uDr6=%RTreg\n", pRegFrame->cs, pRegFrame->eip, uDr6));
248
249 /*
250 * We currently don't make sure of the X86_DR7_GD bit, but
251 * there might come a time when we do.
252 */
253 if ((uDr6 & X86_DR6_BD) == X86_DR6_BD)
254 {
255 AssertReleaseMsgFailed(("X86_DR6_BD isn't used, but it's set! dr7=%RTreg(%RTreg) dr6=%RTreg\n",
256 ASMGetDR7(), CPUMGetHyperDR7(pVM), uDr6));
257 return VERR_NOT_IMPLEMENTED;
258 }
259
260 AssertReleaseMsg(!(uDr6 & X86_DR6_BT), ("X86_DR6_BT is impossible!\n"));
261
262 /*
263 * Now leave the rest to the DBGF.
264 */
265 int rc = DBGFGCTrap01Handler(pVM, pRegFrame, uDr6);
266 if (rc == VINF_EM_RAW_GUEST_TRAP)
267 CPUMSetGuestDR6(pVM, uDr6);
268
269 return trpmGCExitTrap(pVM, rc, pRegFrame);
270}
271
272
273
274/**
275 * NMI handler, for when we are using NMIs to debug things.
276 *
277 * @returns VBox status code.
278 * VINF_SUCCESS means we completely handled this trap,
279 * other codes are passed execution to host context.
280 *
281 * @param pTrpm Pointer to TRPM data (within VM).
282 * @param pRegFrame Pointer to the register frame for the trap.
283 * @internal
284 * @remark This is not hooked up unless you're building with VBOX_WITH_NMI defined.
285 */
286DECLASM(int) TRPMGCTrap02Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
287{
288 LogFlow(("TRPMGCTrap02Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
289 RTLogComPrintf("TRPMGCTrap02Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip);
290 return VERR_TRPM_DONT_PANIC;
291}
292
293
294/**
295 * \#BP (Breakpoint) handler.
296 *
297 * @returns VBox status code.
298 * VINF_SUCCESS means we completely handled this trap,
299 * other codes are passed execution to host context.
300 *
301 * @param pTrpm Pointer to TRPM data (within VM).
302 * @param pRegFrame Pointer to the register frame for the trap.
303 * @internal
304 */
305DECLASM(int) TRPMGCTrap03Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
306{
307 LogFlow(("TRPMGCTrap03Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
308 PVM pVM = TRPM2VM(pTrpm);
309 int rc;
310
311 /*
312 * Both PATM are using INT3s, let them have a go first.
313 */
314 if ( (pRegFrame->ss & X86_SEL_RPL) == 1
315 && !pRegFrame->eflags.Bits.u1VM)
316 {
317 rc = PATMHandleInt3PatchTrap(pVM, pRegFrame);
318 if (rc == VINF_SUCCESS || rc == VINF_EM_RAW_EMULATE_INSTR || rc == VINF_PATM_PATCH_INT3 || rc == VINF_PATM_DUPLICATE_FUNCTION)
319 return trpmGCExitTrap(pVM, rc, pRegFrame);
320 }
321 rc = DBGFGCTrap03Handler(pVM, pRegFrame);
322 /* anything we should do with this? Schedule it in GC? */
323 return trpmGCExitTrap(pVM, rc, pRegFrame);
324}
325
326
327/**
328 * Trap handler for illegal opcode fault (\#UD).
329 *
330 * @returns VBox status code.
331 * VINF_SUCCESS means we completely handled this trap,
332 * other codes are passed execution to host context.
333 *
334 * @param pTrpm Pointer to TRPM data (within VM).
335 * @param pRegFrame Pointer to the register frame for the trap.
336 * @internal
337 */
338DECLASM(int) TRPMGCTrap06Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
339{
340 PVM pVM = TRPM2VM(pTrpm);
341 int rc;
342
343 LogFlow(("TRPMGCTrap06Handler %VGv eflags=%x\n", pRegFrame->eip, pRegFrame->eflags.u32));
344
345 if (CPUMGetGuestCPL(pVM, pRegFrame) == 0)
346 {
347 /*
348 * Decode the instruction.
349 */
350 RTGCPTR PC;
351 rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &PC);
352 if (VBOX_FAILURE(rc))
353 {
354 Log(("TRPMGCTrap06Handler: Failed to convert %RTsel:%RX32 (cpl=%d) - rc=%Vrc !!\n", pRegFrame->cs, pRegFrame->eip, pRegFrame->ss & X86_SEL_RPL, rc));
355 return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
356 }
357
358 DISCPUSTATE Cpu;
359 uint32_t cbOp;
360 rc = EMInterpretDisasOneEx(pVM, (RTGCUINTPTR)PC, pRegFrame, &Cpu, &cbOp);
361 if (VBOX_FAILURE(rc))
362 return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
363
364 if ( PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip)
365 && Cpu.pCurInstr->opcode == OP_ILLUD2)
366 {
367 rc = PATMGCHandleIllegalInstrTrap(pVM, pRegFrame);
368 if (rc == VINF_SUCCESS || rc == VINF_EM_RAW_EMULATE_INSTR || rc == VINF_PATM_DUPLICATE_FUNCTION || rc == VINF_PATM_PENDING_IRQ_AFTER_IRET || rc == VINF_EM_RESCHEDULE)
369 return trpmGCExitTrap(pVM, rc, pRegFrame);
370 }
371 else
372 /** Note: monitor causes an #UD exception instead of #GP when not executed in ring 0. */
373 if (Cpu.pCurInstr->opcode == OP_MONITOR)
374 {
375 uint32_t cbIgnored;
376 rc = EMInterpretInstructionCPU(pVM, &Cpu, pRegFrame, PC, &cbIgnored);
377 if (RT_LIKELY(VBOX_SUCCESS(rc)))
378 pRegFrame->eip += Cpu.opsize;
379 }
380 else
381 /* Never generate a raw trap here; it might be an instruction, that requires emulation. */
382 rc = VINF_EM_RAW_EMULATE_INSTR;
383 }
384 else
385 {
386 rc = TRPMForwardTrap(pVM, pRegFrame, 0x6, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_TRAP);
387 Assert(rc == VINF_EM_RAW_GUEST_TRAP);
388 }
389
390 return trpmGCExitTrap(pVM, rc, pRegFrame);
391}
392
393
394/**
395 * Trap handler for device not present fault (\#NM).
396 *
397 * Device not available, FP or (F)WAIT instruction.
398 *
399 * @returns VBox status code.
400 * VINF_SUCCESS means we completely handled this trap,
401 * other codes are passed execution to host context.
402 *
403 * @param pTrpm Pointer to TRPM data (within VM).
404 * @param pRegFrame Pointer to the register frame for the trap.
405 * @internal
406 */
407DECLASM(int) TRPMGCTrap07Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
408{
409 PVM pVM = TRPM2VM(pTrpm);
410
411 LogFlow(("TRPMTrap07HandlerGC: eip=%VGv\n", pRegFrame->eip));
412 return CPUMHandleLazyFPU(pVM);
413}
414
415
416/**
417 * \#NP ((segment) Not Present) handler.
418 *
419 * @returns VBox status code.
420 * VINF_SUCCESS means we completely handled this trap,
421 * other codes are passed execution to host context.
422 *
423 * @param pTrpm Pointer to TRPM data (within VM).
424 * @param pRegFrame Pointer to the register frame for the trap.
425 * @internal
426 */
427DECLASM(int) TRPMGCTrap0bHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
428{
429 LogFlow(("TRPMGCTrap0bHandler: eip=%VGv\n", pRegFrame->eip));
430 PVM pVM = TRPM2VM(pTrpm);
431
432 /*
433 * Try to detect instruction by opcode which caused trap.
434 * XXX note: this code may cause \#PF (trap e) or \#GP (trap d) while
435 * accessing user code. need to handle it somehow in future!
436 */
437 uint8_t *pu8Code;
438 if (SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, (PRTGCPTR)&pu8Code) == VINF_SUCCESS)
439 {
440 /*
441 * First skip possible instruction prefixes, such as:
442 * OS, AS
443 * CS:, DS:, ES:, SS:, FS:, GS:
444 * REPE, REPNE
445 *
446 * note: Currently we supports only up to 4 prefixes per opcode, more
447 * prefixes (normally not used anyway) will cause trap d in guest.
448 * note: Instruction length in IA-32 may be up to 15 bytes, we dont
449 * check this issue, its too hard.
450 */
451 for (unsigned i = 0; i < 4; i++)
452 {
453 if ( pu8Code[0] != 0xf2 /* REPNE/REPNZ */
454 && pu8Code[0] != 0xf3 /* REP/REPE/REPZ */
455 && pu8Code[0] != 0x2e /* CS: */
456 && pu8Code[0] != 0x36 /* SS: */
457 && pu8Code[0] != 0x3e /* DS: */
458 && pu8Code[0] != 0x26 /* ES: */
459 && pu8Code[0] != 0x64 /* FS: */
460 && pu8Code[0] != 0x65 /* GS: */
461 && pu8Code[0] != 0x66 /* OS */
462 && pu8Code[0] != 0x67 /* AS */
463 )
464 break;
465 pu8Code++;
466 }
467
468 /*
469 * Detect right switch using a callgate.
470 *
471 * We recognize the following causes for the trap 0b:
472 * CALL FAR, CALL FAR []
473 * JMP FAR, JMP FAR []
474 * IRET (may cause a task switch)
475 *
476 * Note: we can't detect whether the trap was caused by a call to a
477 * callgate descriptor or it is a real trap 0b due to a bad selector.
478 * In both situations we'll pass execution to our recompiler so we don't
479 * have to worry.
480 * If we wanted to do better detection, we have set GDT entries to callgate
481 * descriptors pointing to our own handlers.
482 */
483 /** @todo not sure about IRET, may generate Trap 0d (\#GP), NEED TO CHECK! */
484 if ( pu8Code[0] == 0x9a /* CALL FAR */
485 || ( pu8Code[0] == 0xff /* CALL FAR [] */
486 && (pu8Code[1] & X86_OPCODE_MODRM_REG_MASK) == 0x18)
487 || pu8Code[0] == 0xea /* JMP FAR */
488 || ( pu8Code[0] == 0xff /* JMP FAR [] */
489 && (pu8Code[1] & X86_OPCODE_MODRM_REG_MASK) == 0x28)
490 || pu8Code[0] == 0xcf /* IRET */
491 )
492 {
493 /*
494 * Got potential call to callgate.
495 * We simply return execution to the recompiler to do emulation
496 * starting from the instruction which caused the trap.
497 */
498 pTrpm->uActiveVector = ~0;
499 return VINF_EM_RAW_RING_SWITCH;
500 }
501 }
502
503 /*
504 * Pass trap 0b as is to the recompiler in all other cases.
505 */
506 return VINF_EM_RAW_GUEST_TRAP;
507}
508
509
510/**
511 * \#GP (General Protection Fault) handler for Ring-0 privileged instructions.
512 *
513 * @returns VBox status code.
514 * VINF_SUCCESS means we completely handled this trap,
515 * other codes are passed execution to host context.
516 *
517 * @param pVM The VM handle.
518 * @param pRegFrame Pointer to the register frame for the trap.
519 * @param pCpu The opcode info.
520 * @param PC The program counter corresponding to cs:eip in pRegFrame.
521 */
522static int trpmGCTrap0dHandlerRing0(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, RTGCPTR PC)
523{
524 int rc;
525
526 /*
527 * Try handle it here, if not return to HC and emulate/interpret it there.
528 */
529 switch (pCpu->pCurInstr->opcode)
530 {
531 case OP_INT3:
532 /*
533 * Little hack to make the code below not fail
534 */
535 pCpu->param1.flags = USE_IMMEDIATE8;
536 pCpu->param1.parval = 3;
537 /* fallthru */
538 case OP_INT:
539 {
540 Assert(pCpu->param1.flags & USE_IMMEDIATE8);
541 Assert(!(PATMIsPatchGCAddr(pVM, PC)));
542 if (pCpu->param1.parval == 3)
543 {
544 /* Int 3 replacement patch? */
545 if (PATMHandleInt3PatchTrap(pVM, pRegFrame) == VINF_SUCCESS)
546 {
547 AssertFailed();
548 return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
549 }
550 }
551 rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT);
552 if (VBOX_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
553 return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
554
555 pVM->trpm.s.uActiveVector = (pVM->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
556 pVM->trpm.s.enmActiveType = TRPM_SOFTWARE_INT;
557 return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH_INT, pRegFrame);
558 }
559
560#ifdef PATM_EMULATE_SYSENTER
561 case OP_SYSEXIT:
562 case OP_SYSRET:
563 rc = PATMSysCall(pVM, pRegFrame, pCpu);
564 return trpmGCExitTrap(pVM, rc, pRegFrame);
565#endif
566
567 case OP_HLT:
568 /* If it's in patch code, defer to ring-3. */
569 if (PATMIsPatchGCAddr(pVM, PC))
570 break;
571
572 pRegFrame->eip += pCpu->opsize;
573 return trpmGCExitTrap(pVM, VINF_EM_HALT, pRegFrame);
574
575
576 /*
577 * These instructions are used by PATM and CASM for finding
578 * dangerous non-trapping instructions. Thus, since all
579 * scanning and patching is done in ring-3 we'll have to
580 * return to ring-3 on the first encounter of these instructions.
581 */
582 case OP_MOV_CR:
583 case OP_MOV_DR:
584 /* We can safely emulate control/debug register move instructions in patched code. */
585 if ( !PATMIsPatchGCAddr(pVM, PC)
586 && !CSAMIsKnownDangerousInstr(pVM, PC))
587 break;
588 case OP_INVLPG:
589 case OP_LLDT:
590 case OP_STI:
591 case OP_RDTSC: /* just in case */
592 case OP_CLTS:
593 {
594 uint32_t cbIgnored;
595 rc = EMInterpretInstructionCPU(pVM, pCpu, pRegFrame, PC, &cbIgnored);
596 if (VBOX_SUCCESS(rc))
597 pRegFrame->eip += pCpu->opsize;
598 else if (rc == VERR_EM_INTERPRETER)
599 rc = VINF_EM_RAW_EXCEPTION_PRIVILEGED;
600 return trpmGCExitTrap(pVM, rc, pRegFrame);
601 }
602 }
603
604 return trpmGCExitTrap(pVM, VINF_EM_RAW_EXCEPTION_PRIVILEGED, pRegFrame);
605}
606
607
608/**
609 * \#GP (General Protection Fault) handler for Ring-3.
610 *
611 * @returns VBox status code.
612 * VINF_SUCCESS means we completely handled this trap,
613 * other codes are passed execution to host context.
614 *
615 * @param pVM The VM handle.
616 * @param pRegFrame Pointer to the register frame for the trap.
617 * @param pCpu The opcode info.
618 * @param PC The program counter corresponding to cs:eip in pRegFrame.
619 */
620static int trpmGCTrap0dHandlerRing3(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, RTGCPTR PC)
621{
622 int rc;
623
624 Assert(!pRegFrame->eflags.Bits.u1VM);
625
626 switch (pCpu->pCurInstr->opcode)
627 {
628 /*
629 * INT3 and INT xx are ring-switching.
630 * (The shadow IDT will have set the entries to DPL=0, that's why we're here.)
631 */
632 case OP_INT3:
633 /*
634 * Little hack to make the code below not fail
635 */
636 pCpu->param1.flags = USE_IMMEDIATE8;
637 pCpu->param1.parval = 3;
638 /* fall thru */
639 case OP_INT:
640 {
641 Assert(pCpu->param1.flags & USE_IMMEDIATE8);
642 rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT);
643 if (VBOX_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
644 return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
645
646 pVM->trpm.s.uActiveVector = (pVM->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
647 pVM->trpm.s.enmActiveType = TRPM_SOFTWARE_INT;
648 return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH_INT, pRegFrame);
649 }
650
651 /*
652 * SYSCALL, SYSENTER, INTO and BOUND are also ring-switchers.
653 */
654 case OP_SYSCALL:
655 case OP_SYSENTER:
656#ifdef PATM_EMULATE_SYSENTER
657 rc = PATMSysCall(pVM, pRegFrame, pCpu);
658 if (rc == VINF_SUCCESS)
659 return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
660 /* else no break; */
661#endif
662 case OP_BOUND:
663 case OP_INTO:
664 pVM->trpm.s.uActiveVector = ~0;
665 return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH, pRegFrame);
666
667 /*
668 * Handle virtualized TSC reads, just in case.
669 */
670 case OP_RDTSC:
671 {
672 uint32_t cbIgnored;
673 rc = EMInterpretInstructionCPU(pVM, pCpu, pRegFrame, PC, &cbIgnored);
674 if (VBOX_SUCCESS(rc))
675 pRegFrame->eip += pCpu->opsize;
676 else if (rc == VERR_EM_INTERPRETER)
677 rc = VINF_EM_RAW_EXCEPTION_PRIVILEGED;
678 return trpmGCExitTrap(pVM, rc, pRegFrame);
679 }
680
681 /*
682 * STI and CLI are I/O privileged, i.e. if IOPL
683 */
684 case OP_STI:
685 case OP_CLI:
686 {
687 uint32_t efl = CPUMRawGetEFlags(pVM, pRegFrame);
688 if (X86_EFL_GET_IOPL(efl) >= (unsigned)(pRegFrame->ss & X86_SEL_RPL))
689 {
690 LogFlow(("trpmGCTrap0dHandlerRing3: CLI/STI -> REM\n"));
691 return trpmGCExitTrap(pVM, VINF_EM_RESCHEDULE_REM, pRegFrame);
692 }
693 LogFlow(("trpmGCTrap0dHandlerRing3: CLI/STI -> #GP(0)\n"));
694 break;
695 }
696 }
697
698 /*
699 * A genuine guest fault.
700 */
701 return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
702}
703
704
705/**
706 * Emulates RDTSC for the \#GP handler.
707 *
708 * @returns VINF_SUCCESS or VINF_EM_RAW_EMULATE_INSTR.
709 *
710 * @param pVM Pointer to the shared VM structure.
711 * @param pRegFrame Pointer to the registre frame for the trap.
712 * This will be updated on successful return.
713 */
714DECLINLINE(int) trpmGCTrap0dHandlerRdTsc(PVM pVM, PCPUMCTXCORE pRegFrame)
715{
716 STAM_COUNTER_INC(&pVM->trpm.s.StatTrap0dRdTsc);
717
718 if (CPUMGetGuestCR4(pVM) & X86_CR4_TSD)
719 return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame); /* will trap (optimize later). */
720
721 uint64_t uTicks = TMCpuTickGet(pVM);
722 pRegFrame->eax = uTicks;
723 pRegFrame->edx = uTicks >> 32;
724 pRegFrame->eip += 2;
725 return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
726}
727
728
729/**
730 * \#GP (General Protection Fault) handler.
731 *
732 * @returns VBox status code.
733 * VINF_SUCCESS means we completely handled this trap,
734 * other codes are passed execution to host context.
735 *
736 * @param pVM The VM handle.
737 * @param pTrpm Pointer to TRPM data (within VM).
738 * @param pRegFrame Pointer to the register frame for the trap.
739 */
740static int trpmGCTrap0dHandler(PVM pVM, PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
741{
742 LogFlow(("trpmGCTrap0dHandler: cs:eip=%RTsel:%VGv uErr=%RX32\n", pRegFrame->ss, pRegFrame->eip, pTrpm->uActiveErrorCode));
743
744 /*
745 * Convert and validate CS.
746 */
747 STAM_PROFILE_START(&pVM->trpm.s.StatTrap0dDisasm, a);
748 RTGCPTR PC;
749 uint32_t cBits;
750 int rc = SELMValidateAndConvertCSAddrGCTrap(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs,
751 (RTGCPTR)pRegFrame->eip, &PC, &cBits);
752 if (RT_FAILURE(rc))
753 {
754 Log(("trpmGCTrap0dHandler: Failed to convert %RTsel:%RX32 (cpl=%d) - rc=%Rrc !!\n",
755 pRegFrame->cs, pRegFrame->eip, pRegFrame->ss & X86_SEL_RPL, rc));
756 STAM_PROFILE_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
757 return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
758 }
759
760 /*
761 * Optimize RDTSC traps.
762 * Some guests (like Solaris) is using RDTSC all over the place and
763 * will end up trapping a *lot* because of that.
764 */
765 if ( !pRegFrame->eflags.Bits.u1VM
766 && ((uint8_t *)PC)[0] == 0x0f
767 && ((uint8_t *)PC)[1] == 0x31)
768 {
769 STAM_PROFILE_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
770 return trpmGCTrap0dHandlerRdTsc(pVM, pRegFrame);
771 }
772
773 /*
774 * Disassemble the instruction.
775 */
776 DISCPUSTATE Cpu;
777 uint32_t cbOp;
778 rc = DISCoreOneEx((RTGCUINTPTR)PC, cBits == 32 ? CPUMODE_32BIT : cBits == 16 ? CPUMODE_16BIT : CPUMODE_64BIT,
779 NULL, NULL, &Cpu, &cbOp);
780 if (RT_FAILURE(rc))
781 {
782 AssertMsgFailed(("DISCoreOneEx failed to PC=%VGv rc=%Vrc\n", PC, rc));
783 STAM_PROFILE_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
784 return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
785 }
786 STAM_PROFILE_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
787
788 /*
789 * Deal with I/O port access.
790 */
791 if ( pVM->trpm.s.uActiveErrorCode == 0
792 && (Cpu.pCurInstr->optype & OPTYPE_PORTIO))
793 {
794 rc = EMInterpretPortIO(pVM, pRegFrame, &Cpu, cbOp);
795 return trpmGCExitTrap(pVM, rc, pRegFrame);
796 }
797
798 /*
799 * Deal with Ring-0 (privileged instructions)
800 */
801 if ( (pRegFrame->ss & X86_SEL_RPL) <= 1
802 && !pRegFrame->eflags.Bits.u1VM)
803 return trpmGCTrap0dHandlerRing0(pVM, pRegFrame, &Cpu, PC);
804
805 /*
806 * Deal with Ring-3 GPs.
807 */
808 if (!pRegFrame->eflags.Bits.u1VM)
809 return trpmGCTrap0dHandlerRing3(pVM, pRegFrame, &Cpu, PC);
810
811 /*
812 * Deal with v86 code.
813 *
814 * We always set IOPL to zero which makes e.g. pushf fault in V86
815 * mode. The guest might use IOPL=3 and therefore not expect a #GP.
816 * Simply fall back to the recompiler to emulate this instruction if
817 * that's the case. To get the correct we must use CPUMRawGetEFlags.
818 */
819 X86EFLAGS eflags;
820 eflags.u32 = CPUMRawGetEFlags(pVM, pRegFrame); /* Get the correct value. */
821 if (eflags.Bits.u2IOPL != 3)
822 {
823 Assert(eflags.Bits.u2IOPL == 0);
824
825 int rc = TRPMForwardTrap(pVM, pRegFrame, 0xD, 0, TRPM_TRAP_HAS_ERRORCODE, TRPM_TRAP);
826 Assert(rc == VINF_EM_RAW_GUEST_TRAP);
827 return trpmGCExitTrap(pVM, rc, pRegFrame);
828 }
829 return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
830}
831
832
833/**
834 * \#GP (General Protection Fault) handler.
835 *
836 * @returns VBox status code.
837 * VINF_SUCCESS means we completely handled this trap,
838 * other codes are passed execution to host context.
839 *
840 * @param pTrpm Pointer to TRPM data (within VM).
841 * @param pRegFrame Pointer to the register frame for the trap.
842 * @internal
843 */
844DECLASM(int) TRPMGCTrap0dHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
845{
846 LogFlow(("TRPMGCTrap0dHandler: eip=%RGv\n", pRegFrame->eip));
847 PVM pVM = TRPM2VM(pTrpm);
848
849 int rc = trpmGCTrap0dHandler(pVM, pTrpm, pRegFrame);
850 switch (rc)
851 {
852 case VINF_EM_RAW_GUEST_TRAP:
853 case VINF_EM_RAW_EXCEPTION_PRIVILEGED:
854 if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
855 rc = VINF_PATM_PATCH_TRAP_GP;
856 break;
857
858 case VINF_EM_RAW_INTERRUPT_PENDING:
859 Assert(TRPMHasTrap(pVM));
860 /* no break; */
861 case VINF_PGM_SYNC_CR3: /** @todo Check this with Sander. */
862 case VINF_EM_RAW_EMULATE_INSTR:
863 case VINF_IOM_HC_IOPORT_READ:
864 case VINF_IOM_HC_IOPORT_WRITE:
865 case VINF_IOM_HC_MMIO_WRITE:
866 case VINF_IOM_HC_MMIO_READ:
867 case VINF_IOM_HC_MMIO_READ_WRITE:
868 case VINF_PATM_PATCH_INT3:
869 case VINF_EM_RAW_TO_R3:
870 case VINF_EM_RAW_TIMER_PENDING:
871 case VINF_EM_PENDING_REQUEST:
872 case VINF_EM_HALT:
873 case VINF_SUCCESS:
874 break;
875
876 default:
877 AssertMsg(PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip) == false, ("return code %d\n", rc));
878 break;
879 }
880 return rc;
881}
882
883/**
884 * \#PF (Page Fault) handler.
885 *
886 * Calls PGM which does the actual handling.
887 *
888 *
889 * @returns VBox status code.
890 * VINF_SUCCESS means we completely handled this trap,
891 * other codes are passed execution to host context.
892 *
893 * @param pTrpm Pointer to TRPM data (within VM).
894 * @param pRegFrame Pointer to the register frame for the trap.
895 * @internal
896 */
897DECLASM(int) TRPMGCTrap0eHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
898{
899 LogBird(("TRPMGCTrap0eHandler: eip=%RGv\n", pRegFrame->eip));
900 PVM pVM = TRPM2VM(pTrpm);
901
902 /*
903 * This is all PGM stuff.
904 */
905 int rc = PGMTrap0eHandler(pVM, pTrpm->uActiveErrorCode, pRegFrame, (RTGCPTR)pTrpm->uActiveCR2);
906
907 switch (rc)
908 {
909 case VINF_EM_RAW_EMULATE_INSTR:
910 case VINF_EM_RAW_EMULATE_INSTR_PD_FAULT:
911 case VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT:
912 case VINF_EM_RAW_EMULATE_INSTR_TSS_FAULT:
913 case VINF_EM_RAW_EMULATE_INSTR_LDT_FAULT:
914 case VINF_EM_RAW_EMULATE_INSTR_IDT_FAULT:
915 if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
916 rc = VINF_PATCH_EMULATE_INSTR;
917 break;
918
919 case VINF_EM_RAW_GUEST_TRAP:
920 if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
921 return VINF_PATM_PATCH_TRAP_PF;
922
923 rc = TRPMForwardTrap(pVM, pRegFrame, 0xE, 0, TRPM_TRAP_HAS_ERRORCODE, TRPM_TRAP);
924 Assert(rc == VINF_EM_RAW_GUEST_TRAP);
925 break;
926
927 case VINF_EM_RAW_INTERRUPT_PENDING:
928 Assert(TRPMHasTrap(pVM));
929 /* no break; */
930 case VINF_IOM_HC_MMIO_READ:
931 case VINF_IOM_HC_MMIO_WRITE:
932 case VINF_IOM_HC_MMIO_READ_WRITE:
933 case VINF_PATM_HC_MMIO_PATCH_READ:
934 case VINF_PATM_HC_MMIO_PATCH_WRITE:
935 case VINF_SUCCESS:
936 case VINF_EM_RAW_TO_R3:
937 case VINF_EM_PENDING_REQUEST:
938 case VINF_EM_RAW_TIMER_PENDING:
939 case VINF_CSAM_PENDING_ACTION:
940 case VINF_PGM_SYNC_CR3: /** @todo Check this with Sander. */
941 break;
942
943 default:
944 AssertMsg(PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip) == false, ("Patch address for return code %d. eip=%08x\n", rc, pRegFrame->eip));
945 break;
946 }
947 return trpmGCExitTrap(pVM, rc, pRegFrame);
948}
949
950
951/**
952 * Scans for the EIP in the specified array of trap handlers.
953 *
954 * If we don't fine the EIP, we'll panic.
955 *
956 * @returns VBox status code.
957 *
958 * @param pVM The VM handle.
959 * @param pRegFrame Pointer to the register frame for the trap.
960 * @param paHandlers The array of trap handler records.
961 * @param pEndRecord The end record (exclusive).
962 */
963static int trpmGCHyperGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, PCTRPMGCHYPER paHandlers, PCTRPMGCHYPER pEndRecord)
964{
965 uintptr_t uEip = (uintptr_t)pRegFrame->eip;
966 Assert(paHandlers <= pEndRecord);
967
968 Log(("trpmGCHyperGeneric: uEip=%x %p-%p\n", uEip, paHandlers, pEndRecord));
969
970#if 0 /// @todo later
971 /*
972 * Start by doing a kind of binary search.
973 */
974 unsigned iStart = 0;
975 unsigned iEnd = pEndRecord - paHandlers;
976 unsigned i = iEnd / 2;
977#endif
978
979 /*
980 * Do a linear search now (in case the array wasn't properly sorted).
981 */
982 for (PCTRPMGCHYPER pCur = paHandlers; pCur < pEndRecord; pCur++)
983 {
984 if ( pCur->uStartEIP <= uEip
985 && (pCur->uEndEIP ? pCur->uEndEIP > uEip : pCur->uStartEIP == uEip))
986 return pCur->pfnHandler(pVM, pRegFrame, pCur->uUser);
987 }
988
989 return VERR_TRPM_DONT_PANIC;
990}
991
992
993/**
994 * Hypervisor \#NP ((segment) Not Present) handler.
995 *
996 * Scans for the EIP in the registered trap handlers.
997 *
998 * @returns VBox status code.
999 * VINF_SUCCESS means we completely handled this trap,
1000 * other codes are passed back to host context.
1001 *
1002 * @param pTrpm Pointer to TRPM data (within VM).
1003 * @param pRegFrame Pointer to the register frame for the trap.
1004 * @internal
1005 */
1006DECLASM(int) TRPMGCHyperTrap0bHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
1007{
1008 return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0bHandlers, g_aTrap0bHandlersEnd);
1009}
1010
1011
1012/**
1013 * Hypervisor \#GP (General Protection Fault) handler.
1014 *
1015 * Scans for the EIP in the registered trap handlers.
1016 *
1017 * @returns VBox status code.
1018 * VINF_SUCCESS means we completely handled this trap,
1019 * other codes are passed back to host context.
1020 *
1021 * @param pTrpm Pointer to TRPM data (within VM).
1022 * @param pRegFrame Pointer to the register frame for the trap.
1023 * @internal
1024 */
1025DECLASM(int) TRPMGCHyperTrap0dHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
1026{
1027 return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
1028}
1029
1030
1031/**
1032 * Hypervisor \#PF (Page Fault) handler.
1033 *
1034 * Scans for the EIP in the registered trap handlers.
1035 *
1036 * @returns VBox status code.
1037 * VINF_SUCCESS means we completely handled this trap,
1038 * other codes are passed back to host context.
1039 *
1040 * @param pTrpm Pointer to TRPM data (within VM).
1041 * @param pRegFrame Pointer to the register frame for the trap.
1042 * @internal
1043 */
1044DECLASM(int) TRPMGCHyperTrap0eHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
1045{
1046 return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
1047}
1048
1049
1050/**
1051 * Deal with hypervisor traps occuring when resuming execution on a trap.
1052 *
1053 * @returns VBox status code.
1054 * @param pVM The VM handle.
1055 * @param pRegFrame Register frame.
1056 * @param uUser User arg.
1057 */
1058DECLCALLBACK(int) trpmGCTrapInGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser)
1059{
1060 Log(("********************************************************\n"));
1061 Log(("trpmGCTrapInGeneric: eip=%RX32 uUser=%#x\n", pRegFrame->eip, uUser));
1062 Log(("********************************************************\n"));
1063
1064 if (uUser & TRPM_TRAP_IN_HYPER)
1065 {
1066 /*
1067 * Check that there is still some stack left, if not we'll flag
1068 * a guru meditation (the alternative is a triple fault).
1069 */
1070 RTGCUINTPTR cbStackUsed = (RTGCUINTPTR)VMMGetStackGC(pVM) - pRegFrame->esp;
1071 if (cbStackUsed > VMM_STACK_SIZE - _1K)
1072 {
1073 LogRel(("trpmGCTrapInGeneric: ran out of stack: esp=#x cbStackUsed=%#x\n", pRegFrame->esp, cbStackUsed));
1074 return VERR_TRPM_DONT_PANIC;
1075 }
1076
1077 /*
1078 * Just zero the register containing the selector in question.
1079 * We'll deal with the actual stale or troublesome selector value in
1080 * the outermost trap frame.
1081 */
1082 switch (uUser & TRPM_TRAP_IN_OP_MASK)
1083 {
1084 case TRPM_TRAP_IN_MOV_GS:
1085 pRegFrame->eax = 0;
1086 pRegFrame->gs = 0; /* prevent recursive trouble. */
1087 break;
1088 case TRPM_TRAP_IN_MOV_FS:
1089 pRegFrame->eax = 0;
1090 pRegFrame->fs = 0; /* prevent recursive trouble. */
1091 return VINF_SUCCESS;
1092
1093 default:
1094 AssertMsgFailed(("Invalid uUser=%#x\n", uUser));
1095 return VERR_INTERNAL_ERROR;
1096 }
1097 }
1098 else
1099 {
1100 /*
1101 * Reconstruct the guest context and switch to the recompiler.
1102 * We ASSUME we're only at
1103 */
1104 CPUMCTXCORE CtxCore = *pRegFrame;
1105 uint32_t *pEsp = (uint32_t *)pRegFrame->esp;
1106 int rc;
1107
1108 switch (uUser)
1109 {
1110 /*
1111 * This will only occur when resuming guest code in a trap handler!
1112 */
1113 /* @note ASSUMES esp points to the temporary guest CPUMCTXCORE!!! */
1114 case TRPM_TRAP_IN_MOV_GS:
1115 case TRPM_TRAP_IN_MOV_FS:
1116 case TRPM_TRAP_IN_MOV_ES:
1117 case TRPM_TRAP_IN_MOV_DS:
1118 {
1119 PCPUMCTXCORE pTempGuestCtx = (PCPUMCTXCORE)pEsp;
1120
1121 /* Just copy the whole thing; several selector registers, eip (etc) and eax are not yet in pRegFrame. */
1122 CtxCore = *pTempGuestCtx;
1123 rc = VINF_EM_RAW_STALE_SELECTOR;
1124 break;
1125 }
1126
1127 /*
1128 * This will only occur when resuming guest code!
1129 */
1130 case TRPM_TRAP_IN_IRET:
1131 CtxCore.eip = *pEsp++;
1132 CtxCore.cs = (RTSEL)*pEsp++;
1133 CtxCore.eflags.u32 = *pEsp++;
1134 CtxCore.esp = *pEsp++;
1135 CtxCore.ss = (RTSEL)*pEsp++;
1136 rc = VINF_EM_RAW_IRET_TRAP;
1137 break;
1138
1139 /*
1140 * This will only occur when resuming V86 guest code!
1141 */
1142 case TRPM_TRAP_IN_IRET | TRPM_TRAP_IN_V86:
1143 CtxCore.eip = *pEsp++;
1144 CtxCore.cs = (RTSEL)*pEsp++;
1145 CtxCore.eflags.u32 = *pEsp++;
1146 CtxCore.esp = *pEsp++;
1147 CtxCore.ss = (RTSEL)*pEsp++;
1148 CtxCore.es = (RTSEL)*pEsp++;
1149 CtxCore.ds = (RTSEL)*pEsp++;
1150 CtxCore.fs = (RTSEL)*pEsp++;
1151 CtxCore.gs = (RTSEL)*pEsp++;
1152 rc = VINF_EM_RAW_IRET_TRAP;
1153 break;
1154
1155 default:
1156 AssertMsgFailed(("Invalid uUser=%#x\n", uUser));
1157 return VERR_INTERNAL_ERROR;
1158 }
1159
1160
1161 CPUMSetGuestCtxCore(pVM, &CtxCore);
1162 TRPMGCHyperReturnToHost(pVM, rc);
1163 }
1164
1165 AssertMsgFailed(("Impossible!\n"));
1166 return VERR_INTERNAL_ERROR;
1167}
1168
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