1 | ; $Id: CPUMR0A.asm 55059 2015-03-31 23:05:42Z vboxsync $
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2 | ;; @file
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3 | ; CPUM - Ring-0 Assembly Routines (supporting HM and IEM).
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4 | ;
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5 |
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6 | ;
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7 | ; Copyright (C) 2006-2015 Oracle Corporation
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8 | ;
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9 | ; This file is part of VirtualBox Open Source Edition (OSE), as
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10 | ; available from http://www.virtualbox.org. This file is free software;
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11 | ; you can redistribute it and/or modify it under the terms of the GNU
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12 | ; General Public License (GPL) as published by the Free Software
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13 | ; Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | ; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | ; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | ;
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17 |
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18 | ;*******************************************************************************
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19 | ;* Header Files *
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20 | ;*******************************************************************************
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21 | %include "VBox/asmdefs.mac"
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22 | %include "VBox/vmm/vm.mac"
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23 | %include "VBox/err.mac"
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24 | %include "VBox/vmm/stam.mac"
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25 | %include "CPUMInternal.mac"
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26 | %include "iprt/x86.mac"
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27 | %include "VBox/vmm/cpum.mac"
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28 |
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29 | %ifdef IN_RING3
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30 | %error "The jump table doesn't link on leopard."
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31 | %endif
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32 |
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33 | ;*******************************************************************************
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34 | ;* Defined Constants And Macros *
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35 | ;*******************************************************************************
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36 | ;; The offset of the XMM registers in X86FXSTATE.
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37 | ; Use define because I'm too lazy to convert the struct.
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38 | %define XMM_OFF_IN_X86FXSTATE 160
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39 | %define IP_OFF_IN_X86FXSTATE 08h
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40 | %define CS_OFF_IN_X86FXSTATE 0ch
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41 | %define DS_OFF_IN_X86FXSTATE 14h
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42 |
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43 |
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44 | ;*******************************************************************************
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45 | ;* External Symbols *
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46 | ;*******************************************************************************
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47 | %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
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48 | extern NAME(SUPR0AbsIs64bit)
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49 | extern NAME(SUPR0Abs64bitKernelCS)
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50 | extern NAME(SUPR0Abs64bitKernelSS)
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51 | extern NAME(SUPR0Abs64bitKernelDS)
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52 | extern NAME(SUPR0AbsKernelCS)
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53 | %endif
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54 |
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55 |
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56 | ;*******************************************************************************
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57 | ;* Global Variables *
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58 | ;*******************************************************************************
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59 | %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
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60 | BEGINDATA
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61 | %if 0 ; Currently not used.
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62 | g_r32_Zero: dd 0.0
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63 | %endif
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64 |
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65 | ;;
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66 | ; Store the SUPR0AbsIs64bit absolute value here so we can cmp/test without
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67 | ; needing to clobber a register. (This trick doesn't quite work for PE btw.
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68 | ; but that's not relevant atm.)
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69 | GLOBALNAME g_fCPUMIs64bitHost
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70 | dd NAME(SUPR0AbsIs64bit)
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71 | %endif
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72 |
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73 |
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74 | BEGINCODE
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75 |
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76 | %if 0 ; Currently not used anywhere.
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77 | ;;
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78 | ; Macro for FXSAVE/FXRSTOR leaky behaviour on AMD CPUs, see cpumR3CheckLeakyFpu().
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79 | ;
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80 | ; Cleans the FPU state, if necessary, before restoring the FPU.
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81 | ;
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82 | ; This macro ASSUMES CR0.TS is not set!
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83 | ;
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84 | ; @param xDX Pointer to CPUMCPU.
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85 | ; @uses xAX, EFLAGS
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86 | ;
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87 | ; Changes here should also be reflected in CPUMRCA.asm's copy!
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88 | ;
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89 | %macro CLEANFPU 0
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90 | test dword [xDX + CPUMCPU.fUseFlags], CPUM_USE_FFXSR_LEAKY
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91 | jz .nothing_to_clean
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92 |
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93 | xor eax, eax
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94 | fnstsw ax ; FSW -> AX.
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95 | test eax, RT_BIT(7) ; If FSW.ES (bit 7) is set, clear it to not cause FPU exceptions
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96 | ; while clearing & loading the FPU bits in 'clean_fpu' below.
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97 | jz .clean_fpu
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98 | fnclex
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99 |
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100 | .clean_fpu:
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101 | ffree st7 ; Clear FPU stack register(7)'s tag entry to prevent overflow if a wraparound occurs.
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102 | ; for the upcoming push (load)
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103 | fild dword [g_r32_Zero xWrtRIP] ; Explicit FPU load to overwrite FIP, FOP, FDP registers in the FPU.
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104 | .nothing_to_clean:
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105 | %endmacro
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106 | %endif ; Unused.
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107 |
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108 |
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109 | ;; Macro for FXSAVE for the guest FPU but tries to figure out whether to
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110 | ; save the 32-bit FPU state or 64-bit FPU state.
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111 | ;
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112 | ; @param %1 Pointer to CPUMCPU.
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113 | ; @param %2 Pointer to XState.
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114 | ; @uses xAX, xDX, EFLAGS, 20h of stack.
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115 | ;
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116 | %macro SAVE_32_OR_64_FPU 2
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117 | o64 fxsave [%2]
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118 |
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119 | xor edx, edx
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120 | cmp dword [%2 + CS_OFF_IN_X86FXSTATE], 0
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121 | jne short %%save_done
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122 |
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123 | sub rsp, 20h ; Only need 1ch bytes but keep stack aligned otherwise we #GP(0).
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124 | fnstenv [rsp]
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125 | movzx eax, word [rsp + 10h]
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126 | mov [%2 + CS_OFF_IN_X86FXSTATE], eax
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127 | movzx eax, word [rsp + 18h]
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128 | add rsp, 20h
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129 | mov [%2 + DS_OFF_IN_X86FXSTATE], eax
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130 | mov edx, X86_FXSTATE_RSVD_32BIT_MAGIC
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131 |
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132 | %%save_done:
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133 | mov dword [%2 + X86_OFF_FXSTATE_RSVD], edx
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134 | %endmacro
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135 |
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136 | ;;
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137 | ; Wrapper for selecting 32-bit or 64-bit FXRSTOR according to what SAVE_32_OR_64_FPU did.
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138 | ;
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139 | ; @param %1 Pointer to CPUMCPU.
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140 | ; @param %2 Pointer to XState.
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141 | ; @uses xAX, xDX, EFLAGS
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142 | ;
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143 | %macro RESTORE_32_OR_64_FPU 2
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144 | cmp dword [%2 + X86_OFF_FXSTATE_RSVD], X86_FXSTATE_RSVD_32BIT_MAGIC
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145 | jne short %%restore_64bit_fpu
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146 | fxrstor [%2]
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147 | jmp short %%restore_fpu_done
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148 | %%restore_64bit_fpu:
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149 | o64 fxrstor [%2]
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150 | %%restore_fpu_done:
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151 | %endmacro
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152 |
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153 |
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154 | ;;
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155 | ; Clears CR0.TS and CR0.EM if necessary, saving the previous result.
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156 | ;
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157 | ; This is used to avoid FPU exceptions when touching the FPU state.
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158 | ;
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159 | ; @param %1 Register to save the old CR0 in (pass to RESTORE_CR0).
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160 | ; @param %2 Temporary scratch register.
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161 | ; @uses EFLAGS, CR0
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162 | ;
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163 | %macro SAVE_CR0_CLEAR_FPU_TRAPS 2
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164 | xor %1, %1
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165 | mov %2, cr0
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166 | test %2, X86_CR0_TS | X86_CR0_EM ; Make sure its safe to access the FPU state.
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167 | jz %%skip_cr0_write
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168 | mov %1, %2 ; Save old CR0
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169 | and %2, ~(X86_CR0_TS | X86_CR0_EM)
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170 | mov cr0, %2
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171 | %%skip_cr0_write:
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172 | %endmacro
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173 |
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174 | ;;
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175 | ; Restore CR0.TS and CR0.EM state if SAVE_CR0_CLEAR_FPU_TRAPS change it.
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176 | ;
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177 | ; @param %1 The register that SAVE_CR0_CLEAR_FPU_TRAPS saved the old CR0 in.
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178 | ;
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179 | %macro RESTORE_CR0 1
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180 | cmp %1, 0
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181 | je %%skip_cr0_restore
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182 | mov cr0, %1
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183 | %%skip_cr0_restore:
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184 | %endmacro
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185 |
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186 |
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187 | ;;
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188 | ; Saves the host FPU/SSE/AVX state and restores the guest FPU/SSE/AVX state.
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189 | ;
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190 | ; @returns 0
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191 | ; @param pCpumCpu x86:[ebp+8] gcc:rdi msc:rcx CPUMCPU pointer
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192 | ;
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193 | align 16
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194 | BEGINPROC cpumR0SaveHostRestoreGuestFPUState
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195 | ;
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196 | ; Prologue - xAX+xDX must be free for XSAVE/XRSTOR input.
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197 | ;
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198 | %ifdef RT_ARCH_AMD64
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199 | %ifdef RT_OS_WINDOWS
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200 | mov r11, rcx
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201 | %else
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202 | mov r11, rdi
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203 | %endif
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204 | %define pCpumCpu r11
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205 | %define pXState r10
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206 | %else
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207 | push ebp
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208 | mov ebp, esp
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209 | push ebx
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210 | push esi
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211 | mov ebx, dword [ebp + 8]
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212 | %define pCpumCpu ebx
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213 | %define pXState esi
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214 | %endif
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215 |
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216 | pushf ; The darwin kernel can get upset or upset things if an
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217 | cli ; interrupt occurs while we're doing fxsave/fxrstor/cr0.
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218 |
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219 | SAVE_CR0_CLEAR_FPU_TRAPS xCX, xAX ; xCX is now old CR0 value, don't use!
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220 |
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221 | ;
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222 | ; Switch state.
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223 | ;
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224 | mov pXState, [pCpumCpu + CPUMCPU.Host.pXStateR0]
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225 |
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226 | %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
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227 | cmp byte [NAME(g_fCPUMIs64bitHost)], 0
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228 | jz .legacy_mode
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229 | db 0xea ; jmp far .sixtyfourbit_mode
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230 | dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS)
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231 | .legacy_mode:
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232 | %endif
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233 |
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234 | %ifdef RT_ARCH_AMD64
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235 | o64 fxsave [pXState] ; Use explicit REX prefix. See @bugref{6398}.
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236 |
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237 | ; Restore the guest FPU (32-bit or 64-bit), preserves existing broken state. See @bugref{7138}.
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238 | mov pXState, [pCpumCpu + CPUMCPU.Guest.pXStateR0]
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239 | test dword [pCpumCpu + CPUMCPU.fUseFlags], CPUM_USE_SUPPORTS_LONGMODE
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240 | jnz short .fpu_load_32_or_64
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241 | fxrstor [pXState]
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242 | jmp short .fpu_load_done
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243 | .fpu_load_32_or_64:
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244 | RESTORE_32_OR_64_FPU pCpumCpu, pXState
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245 | .fpu_load_done:
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246 | %else
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247 | fxsave [pXState]
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248 | mov pXState, [pCpumCpu + CPUMCPU.Guest.pXStateR0]
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249 | fxrstor [pXState]
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250 | %endif
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251 |
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252 | %ifdef VBOX_WITH_KERNEL_USING_XMM
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253 | ; Restore the non-volatile xmm registers. ASSUMING 64-bit host.
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254 | mov pXState, [pCpumCpu + CPUMCPU.Host.pXStateR0]
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255 | movdqa xmm6, [pXState + XMM_OFF_IN_X86FXSTATE + 060h]
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256 | movdqa xmm7, [pXState + XMM_OFF_IN_X86FXSTATE + 070h]
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257 | movdqa xmm8, [pXState + XMM_OFF_IN_X86FXSTATE + 080h]
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258 | movdqa xmm9, [pXState + XMM_OFF_IN_X86FXSTATE + 090h]
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259 | movdqa xmm10, [pXState + XMM_OFF_IN_X86FXSTATE + 0a0h]
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260 | movdqa xmm11, [pXState + XMM_OFF_IN_X86FXSTATE + 0b0h]
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261 | movdqa xmm12, [pXState + XMM_OFF_IN_X86FXSTATE + 0c0h]
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262 | movdqa xmm13, [pXState + XMM_OFF_IN_X86FXSTATE + 0d0h]
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263 | movdqa xmm14, [pXState + XMM_OFF_IN_X86FXSTATE + 0e0h]
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264 | movdqa xmm15, [pXState + XMM_OFF_IN_X86FXSTATE + 0f0h]
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265 | %endif
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266 |
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267 | .done:
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268 | RESTORE_CR0 xCX
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269 | or dword [pCpumCpu + CPUMCPU.fUseFlags], (CPUM_USED_FPU | CPUM_USED_FPU_SINCE_REM)
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270 | popf
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271 |
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272 | %ifdef RT_ARCH_X86
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273 | pop esi
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274 | pop ebx
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275 | leave
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276 | %endif
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277 | xor eax, eax
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278 | ret
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279 |
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280 | %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL_IN_R0
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281 | ALIGNCODE(16)
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282 | BITS 64
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283 | .sixtyfourbit_mode:
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284 | o64 fxsave [pXState]
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285 |
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286 | ; Restore the guest FPU (32-bit or 64-bit), preserves existing broken state. See @bugref{7138}.
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287 | test dword [pCpumCpu + CPUMCPU.fUseFlags], CPUM_USE_SUPPORTS_LONGMODE
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288 | jnz short .fpu_load_32_or_64_darwin
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289 | mov pXState, [pCpumCpu + CPUMCPU.Guest.pXStateR0]
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290 | fxrstor [pXState]
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291 | jmp short .fpu_load_done_darwin
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292 | .fpu_load_32_or_64_darwin:
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293 | RESTORE_32_OR_64_FPU pCpumCpu, pXState
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294 | .fpu_load_done_darwin:
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295 |
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296 | jmp far [.fpret wrt rip]
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297 | .fpret: ; 16:32 Pointer to .the_end.
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298 | dd .done, NAME(SUPR0AbsKernelCS)
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299 | BITS 32
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300 | %endif
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301 | ENDPROC cpumR0SaveHostRestoreGuestFPUState
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302 |
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303 |
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304 | %ifndef RT_ARCH_AMD64
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305 | %ifdef VBOX_WITH_64_BITS_GUESTS
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306 | %ifndef VBOX_WITH_HYBRID_32BIT_KERNEL
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307 | ;;
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308 | ; Saves the host FPU/SSE/AVX state.
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309 | ;
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310 | ; @returns VINF_SUCCESS (0) in EAX
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311 | ; @param pCpumCpu x86:[ebp+8] gcc:rdi msc:rcx CPUMCPU pointer
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312 | ;
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313 | align 16
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314 | BEGINPROC cpumR0SaveHostFPUState
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315 | ;
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316 | ; Prologue - xAX+xDX must be free for XSAVE/XRSTOR input.
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317 | ;
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318 | %ifdef RT_ARCH_AMD64
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319 | %ifdef RT_OS_WINDOWS
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320 | mov r11, rcx
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321 | %else
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322 | mov r11, rdi
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323 | %endif
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324 | %define pCpumCpu r11
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325 | %define pXState r10
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326 | %else
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327 | push ebp
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328 | mov ebp, esp
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329 | push ebx
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330 | push esi
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331 | mov ebx, dword [ebp + 8]
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332 | %define pCpumCpu ebx
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333 | %define pXState esi
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334 | %endif
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335 |
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336 | pushf ; The darwin kernel can get upset or upset things if an
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337 | cli ; interrupt occurs while we're doing fxsave/fxrstor/cr0.
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338 | SAVE_CR0_CLEAR_FPU_TRAPS xCX, xAX ; xCX is now old CR0 value, don't use!
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339 |
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340 | ;
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341 | ; Save the host state.
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342 | ;
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343 | mov pXState, [pCpumCpu + CPUMCPU.Host.pXStateR0]
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344 |
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345 | %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
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346 | cmp byte [NAME(g_fCPUMIs64bitHost)], 0
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347 | jz .legacy_mode
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348 | db 0xea ; jmp far .sixtyfourbit_mode
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349 | dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS)
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350 | .legacy_mode:
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351 | %endif
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352 |
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353 | %ifdef RT_ARCH_AMD64
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354 | o64 fxsave [pXstate]
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355 | %else
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356 | fxsave [pXState]
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357 | %endif
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358 |
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359 | .done:
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360 | RESTORE_CR0 xCX
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361 | or dword [pCpumCpu + CPUMCPU.fUseFlags], (CPUM_USED_FPU | CPUM_USED_FPU_SINCE_REM)
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362 | popf
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363 |
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364 | %ifdef RT_ARCH_X86
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365 | pop esi
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366 | pop ebx
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367 | leave
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368 | %endif
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369 | xor eax, eax
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370 | ret
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371 |
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372 | %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL_IN_R0
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373 | ALIGNCODE(16)
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374 | BITS 64
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375 | .sixtyfourbit_mode:
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376 | ; Save the guest FPU (32-bit or 64-bit), preserves existing broken state. See @bugref{7138}.
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377 | o64 fxsave [pXstate]
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378 | jmp far [.fpret wrt rip]
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379 | .fpret: ; 16:32 Pointer to .the_end.
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380 | dd .done, NAME(SUPR0AbsKernelCS)
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381 | BITS 32
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382 | %endif
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383 | %undef pCpumCpu
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384 | %undef pXState
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385 | ENDPROC cpumR0SaveHostFPUState
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386 | %endif
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387 | %endif
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388 | %endif
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389 |
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390 |
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391 | ;;
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392 | ; Saves the guest FPU/SSE/AVX state and restores the host FPU/SSE/AVX state.
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393 | ;
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394 | ; @returns VINF_SUCCESS (0) in eax.
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395 | ; @param pCpumCpu x86:[ebp+8] gcc:rdi msc:rcx CPUMCPU pointer
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396 | ;
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397 | align 16
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398 | BEGINPROC cpumR0SaveGuestRestoreHostFPUState
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399 | ;
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400 | ; Prologue - xAX+xDX must be free for XSAVE/XRSTOR input.
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401 | ;
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402 | %ifdef RT_ARCH_AMD64
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403 | %ifdef RT_OS_WINDOWS
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404 | mov r11, rcx
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405 | %else
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406 | mov r11, rdi
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407 | %endif
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408 | %define pCpumCpu r11
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409 | %define pXState r10
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410 | %else
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411 | push ebp
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412 | mov ebp, esp
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413 | push ebx
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414 | push esi
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415 | mov ebx, dword [ebp + 8]
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416 | %define pCpumCpu ebx
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417 | %define pXState esi
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418 | %endif
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419 |
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420 | ;
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421 | ; Only restore FPU if guest has used it.
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422 | ;
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423 | test dword [pCpumCpu + CPUMCPU.fUseFlags], CPUM_USED_FPU
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424 | jz .fpu_not_used
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425 |
|
---|
426 | pushf ; The darwin kernel can get upset or upset things if an
|
---|
427 | cli ; interrupt occurs while we're doing fxsave/fxrstor/cr0.
|
---|
428 | SAVE_CR0_CLEAR_FPU_TRAPS xCX, xAX ; xCX is now old CR0 value, don't use!
|
---|
429 |
|
---|
430 | mov pXState, [pCpumCpu + CPUMCPU.Guest.pXStateR0]
|
---|
431 |
|
---|
432 | %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
|
---|
433 | cmp byte [NAME(g_fCPUMIs64bitHost)], 0
|
---|
434 | jz .legacy_mode
|
---|
435 | db 0xea ; jmp far .sixtyfourbit_mode
|
---|
436 | dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS)
|
---|
437 | .legacy_mode:
|
---|
438 | %endif
|
---|
439 |
|
---|
440 | %ifdef RT_ARCH_AMD64
|
---|
441 | ; Save the guest FPU (32-bit or 64-bit), preserves existing broken state. See @bugref{7138}.
|
---|
442 | test dword [pCpumCpu + CPUMCPU.fUseFlags], CPUM_USE_SUPPORTS_LONGMODE
|
---|
443 | jnz short .fpu_save_32_or_64
|
---|
444 | fxsave [pXState]
|
---|
445 | jmp short .fpu_save_done
|
---|
446 | .fpu_save_32_or_64:
|
---|
447 | SAVE_32_OR_64_FPU pCpumCpu, pXState
|
---|
448 | .fpu_save_done:
|
---|
449 |
|
---|
450 | mov pXState, [pCpumCpu + CPUMCPU.Guest.pXStateR0]
|
---|
451 | o64 fxrstor [pXState] ; Use explicit REX prefix. See @bugref{6398}.
|
---|
452 | %else
|
---|
453 | fxsave [pXState] ; ASSUMES that all VT-x/AMD-V boxes support fxsave/fxrstor (safe assumption)
|
---|
454 | mov pXState, [pCpumCpu + CPUMCPU.Guest.pXStateR0]
|
---|
455 | fxrstor [pXState]
|
---|
456 | %endif
|
---|
457 |
|
---|
458 | .done:
|
---|
459 | RESTORE_CR0 xCX
|
---|
460 | and dword [pCpumCpu + CPUMCPU.fUseFlags], ~CPUM_USED_FPU
|
---|
461 | popf
|
---|
462 |
|
---|
463 | .fpu_not_used:
|
---|
464 | %ifdef RT_ARCH_X86
|
---|
465 | pop esi
|
---|
466 | pop ebx
|
---|
467 | leave
|
---|
468 | %endif
|
---|
469 | xor eax, eax
|
---|
470 | ret
|
---|
471 |
|
---|
472 | %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL_IN_R0
|
---|
473 | ALIGNCODE(16)
|
---|
474 | BITS 64
|
---|
475 | .sixtyfourbit_mode:
|
---|
476 | ; Save the guest FPU (32-bit or 64-bit), preserves existing broken state. See @bugref{7138}.
|
---|
477 | test dword [pCpumCpu + CPUMCPU.fUseFlags], CPUM_USE_SUPPORTS_LONGMODE
|
---|
478 | jnz short .fpu_save_32_or_64_darwin
|
---|
479 | fxsave [pXState]
|
---|
480 | jmp short .fpu_save_done_darwin
|
---|
481 | .fpu_save_32_or_64_darwin:
|
---|
482 | SAVE_32_OR_64_FPU pCpumCpu, pXState
|
---|
483 | .fpu_save_done_darwin:
|
---|
484 |
|
---|
485 | mov pXState, [pCpumCpu + CPUMCPU.Guest.pXStateR0]
|
---|
486 | o64 fxrstor [pXstate]
|
---|
487 | jmp far [.fpret wrt rip]
|
---|
488 | .fpret: ; 16:32 Pointer to .the_end.
|
---|
489 | dd .done, NAME(SUPR0AbsKernelCS)
|
---|
490 | BITS 32
|
---|
491 | %endif
|
---|
492 | %undef pCpumCpu
|
---|
493 | %undef pXState
|
---|
494 | ENDPROC cpumR0SaveGuestRestoreHostFPUState
|
---|
495 |
|
---|
496 |
|
---|
497 | ;;
|
---|
498 | ; Restores the host's FPU/SSE/AVX state from pCpumCpu->Host.
|
---|
499 | ;
|
---|
500 | ; @returns 0
|
---|
501 | ; @param pCpumCpu x86:[ebp+8] gcc:rdi msc:rcx CPUMCPU pointer
|
---|
502 | ;
|
---|
503 | align 16
|
---|
504 | BEGINPROC cpumR0RestoreHostFPUState
|
---|
505 | ;
|
---|
506 | ; Prologue - xAX+xDX must be free for XSAVE/XRSTOR input.
|
---|
507 | ;
|
---|
508 | %ifdef RT_ARCH_AMD64
|
---|
509 | %ifdef RT_OS_WINDOWS
|
---|
510 | mov r11, rcx
|
---|
511 | %else
|
---|
512 | mov r11, rdi
|
---|
513 | %endif
|
---|
514 | %define pCpumCpu r11
|
---|
515 | %define pXState r10
|
---|
516 | %else
|
---|
517 | push ebp
|
---|
518 | mov ebp, esp
|
---|
519 | push ebx
|
---|
520 | push esi
|
---|
521 | mov ebx, dword [ebp + 8]
|
---|
522 | %define pCpumCpu ebx
|
---|
523 | %define pXState esi
|
---|
524 | %endif
|
---|
525 |
|
---|
526 | ;
|
---|
527 | ; Restore FPU if guest has used it.
|
---|
528 | ;
|
---|
529 | test dword [pCpumCpu + CPUMCPU.fUseFlags], CPUM_USED_FPU
|
---|
530 | jz short .fpu_not_used
|
---|
531 |
|
---|
532 | pushf ; The darwin kernel can get upset or upset things if an
|
---|
533 | cli ; interrupt occurs while we're doing fxsave/fxrstor/cr0.
|
---|
534 | SAVE_CR0_CLEAR_FPU_TRAPS xCX, xAX ; xCX is now old CR0 value, don't use!
|
---|
535 |
|
---|
536 | mov pXState, [pCpumCpu + CPUMCPU.Host.pXStateR0]
|
---|
537 |
|
---|
538 | %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
|
---|
539 | cmp byte [NAME(g_fCPUMIs64bitHost)], 0
|
---|
540 | jz .legacy_mode
|
---|
541 | db 0xea ; jmp far .sixtyfourbit_mode
|
---|
542 | dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS)
|
---|
543 | .legacy_mode:
|
---|
544 | %endif
|
---|
545 |
|
---|
546 | %ifdef RT_ARCH_AMD64
|
---|
547 | o64 fxrstor [pXState]
|
---|
548 | %else
|
---|
549 | fxrstor [pXState]
|
---|
550 | %endif
|
---|
551 |
|
---|
552 | .done:
|
---|
553 | RESTORE_CR0 xCX
|
---|
554 | and dword [pCpumCpu + CPUMCPU.fUseFlags], ~CPUM_USED_FPU
|
---|
555 | popf
|
---|
556 |
|
---|
557 | .fpu_not_used:
|
---|
558 | %ifdef RT_ARCH_X86
|
---|
559 | pop esi
|
---|
560 | pop ebx
|
---|
561 | leave
|
---|
562 | %endif
|
---|
563 | xor eax, eax
|
---|
564 | ret
|
---|
565 |
|
---|
566 | %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL_IN_R0
|
---|
567 | ALIGNCODE(16)
|
---|
568 | BITS 64
|
---|
569 | .sixtyfourbit_mode:
|
---|
570 | o64 fxrstor [pXState]
|
---|
571 | jmp far [.fpret wrt rip]
|
---|
572 | .fpret: ; 16:32 Pointer to .the_end.
|
---|
573 | dd .done, NAME(SUPR0AbsKernelCS)
|
---|
574 | BITS 32
|
---|
575 | %endif
|
---|
576 | %undef pCpumCPu
|
---|
577 | %undef pXState
|
---|
578 | ENDPROC cpumR0RestoreHostFPUState
|
---|
579 |
|
---|
580 |
|
---|
581 | %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL_IN_R0
|
---|
582 | ;;
|
---|
583 | ; DECLASM(void) cpumR0SaveDRx(uint64_t *pa4Regs);
|
---|
584 | ;
|
---|
585 | ALIGNCODE(16)
|
---|
586 | BEGINPROC cpumR0SaveDRx
|
---|
587 | %ifdef RT_ARCH_AMD64
|
---|
588 | %ifdef ASM_CALL64_GCC
|
---|
589 | mov xCX, rdi
|
---|
590 | %endif
|
---|
591 | %else
|
---|
592 | mov xCX, dword [esp + 4]
|
---|
593 | %endif
|
---|
594 | pushf ; Just to be on the safe side.
|
---|
595 | cli
|
---|
596 | %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
|
---|
597 | cmp byte [NAME(g_fCPUMIs64bitHost)], 0
|
---|
598 | jz .legacy_mode
|
---|
599 | db 0xea ; jmp far .sixtyfourbit_mode
|
---|
600 | dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS)
|
---|
601 | .legacy_mode:
|
---|
602 | %endif ; VBOX_WITH_HYBRID_32BIT_KERNEL
|
---|
603 |
|
---|
604 | ;
|
---|
605 | ; Do the job.
|
---|
606 | ;
|
---|
607 | mov xAX, dr0
|
---|
608 | mov xDX, dr1
|
---|
609 | mov [xCX], xAX
|
---|
610 | mov [xCX + 8 * 1], xDX
|
---|
611 | mov xAX, dr2
|
---|
612 | mov xDX, dr3
|
---|
613 | mov [xCX + 8 * 2], xAX
|
---|
614 | mov [xCX + 8 * 3], xDX
|
---|
615 |
|
---|
616 | .done:
|
---|
617 | popf
|
---|
618 | ret
|
---|
619 |
|
---|
620 | %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL_IN_R0
|
---|
621 | ALIGNCODE(16)
|
---|
622 | BITS 64
|
---|
623 | .sixtyfourbit_mode:
|
---|
624 | and ecx, 0ffffffffh
|
---|
625 |
|
---|
626 | mov rax, dr0
|
---|
627 | mov rdx, dr1
|
---|
628 | mov r8, dr2
|
---|
629 | mov r9, dr3
|
---|
630 | mov [rcx], rax
|
---|
631 | mov [rcx + 8 * 1], rdx
|
---|
632 | mov [rcx + 8 * 2], r8
|
---|
633 | mov [rcx + 8 * 3], r9
|
---|
634 | jmp far [.fpret wrt rip]
|
---|
635 | .fpret: ; 16:32 Pointer to .the_end.
|
---|
636 | dd .done, NAME(SUPR0AbsKernelCS)
|
---|
637 | BITS 32
|
---|
638 | %endif
|
---|
639 | ENDPROC cpumR0SaveDRx
|
---|
640 |
|
---|
641 |
|
---|
642 | ;;
|
---|
643 | ; DECLASM(void) cpumR0LoadDRx(uint64_t const *pa4Regs);
|
---|
644 | ;
|
---|
645 | ALIGNCODE(16)
|
---|
646 | BEGINPROC cpumR0LoadDRx
|
---|
647 | %ifdef RT_ARCH_AMD64
|
---|
648 | %ifdef ASM_CALL64_GCC
|
---|
649 | mov xCX, rdi
|
---|
650 | %endif
|
---|
651 | %else
|
---|
652 | mov xCX, dword [esp + 4]
|
---|
653 | %endif
|
---|
654 | pushf ; Just to be on the safe side.
|
---|
655 | cli
|
---|
656 | %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
|
---|
657 | cmp byte [NAME(g_fCPUMIs64bitHost)], 0
|
---|
658 | jz .legacy_mode
|
---|
659 | db 0xea ; jmp far .sixtyfourbit_mode
|
---|
660 | dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS)
|
---|
661 | .legacy_mode:
|
---|
662 | %endif ; VBOX_WITH_HYBRID_32BIT_KERNEL
|
---|
663 |
|
---|
664 | ;
|
---|
665 | ; Do the job.
|
---|
666 | ;
|
---|
667 | mov xAX, [xCX]
|
---|
668 | mov xDX, [xCX + 8 * 1]
|
---|
669 | mov dr0, xAX
|
---|
670 | mov dr1, xDX
|
---|
671 | mov xAX, [xCX + 8 * 2]
|
---|
672 | mov xDX, [xCX + 8 * 3]
|
---|
673 | mov dr2, xAX
|
---|
674 | mov dr3, xDX
|
---|
675 |
|
---|
676 | .done:
|
---|
677 | popf
|
---|
678 | ret
|
---|
679 |
|
---|
680 | %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL_IN_R0
|
---|
681 | ALIGNCODE(16)
|
---|
682 | BITS 64
|
---|
683 | .sixtyfourbit_mode:
|
---|
684 | and ecx, 0ffffffffh
|
---|
685 |
|
---|
686 | mov rax, [rcx]
|
---|
687 | mov rdx, [rcx + 8 * 1]
|
---|
688 | mov r8, [rcx + 8 * 2]
|
---|
689 | mov r9, [rcx + 8 * 3]
|
---|
690 | mov dr0, rax
|
---|
691 | mov dr1, rdx
|
---|
692 | mov dr2, r8
|
---|
693 | mov dr3, r9
|
---|
694 | jmp far [.fpret wrt rip]
|
---|
695 | .fpret: ; 16:32 Pointer to .the_end.
|
---|
696 | dd .done, NAME(SUPR0AbsKernelCS)
|
---|
697 | BITS 32
|
---|
698 | %endif
|
---|
699 | ENDPROC cpumR0LoadDRx
|
---|
700 |
|
---|
701 | %endif ; VBOX_WITH_HYBRID_32BIT_KERNEL_IN_R0
|
---|
702 |
|
---|