1 | ; $Id: CPUMR0A.asm 61058 2016-05-19 19:12:56Z vboxsync $
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2 | ;; @file
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3 | ; CPUM - Ring-0 Assembly Routines (supporting HM and IEM).
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4 | ;
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5 |
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6 | ;
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7 | ; Copyright (C) 2006-2016 Oracle Corporation
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8 | ;
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9 | ; This file is part of VirtualBox Open Source Edition (OSE), as
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10 | ; available from http://www.virtualbox.org. This file is free software;
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11 | ; you can redistribute it and/or modify it under the terms of the GNU
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12 | ; General Public License (GPL) as published by the Free Software
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13 | ; Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | ; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | ; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | ;
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17 |
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18 |
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19 | ;*******************************************************************************
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20 | ;* Header Files *
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21 | ;*******************************************************************************
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22 | %define RT_ASM_WITH_SEH64
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23 | %include "iprt/asmdefs.mac"
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24 | %include "VBox/asmdefs.mac"
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25 | %include "VBox/vmm/vm.mac"
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26 | %include "VBox/err.mac"
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27 | %include "VBox/vmm/stam.mac"
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28 | %include "CPUMInternal.mac"
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29 | %include "iprt/x86.mac"
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30 | %include "VBox/vmm/cpum.mac"
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31 |
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32 |
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33 | ;*******************************************************************************
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34 | ;* Defined Constants And Macros *
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35 | ;*******************************************************************************
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36 | ;; The offset of the XMM registers in X86FXSTATE.
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37 | ; Use define because I'm too lazy to convert the struct.
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38 | %define XMM_OFF_IN_X86FXSTATE 160
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39 | %define IP_OFF_IN_X86FXSTATE 08h
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40 | %define CS_OFF_IN_X86FXSTATE 0ch
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41 | %define DS_OFF_IN_X86FXSTATE 14h
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42 |
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43 | ;; For numeric expressions
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44 | %ifdef RT_ARCH_AMD64
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45 | %define CPUMR0_IS_AMD64 1
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46 | %else
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47 | %define CPUMR0_IS_AMD64 0
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48 | %endif
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49 |
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50 |
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51 |
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52 | BEGINCODE
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53 |
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54 | %if 0 ; Currently not used anywhere.
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55 | ;;
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56 | ; Macro for FXSAVE/FXRSTOR leaky behaviour on AMD CPUs, see cpumR3CheckLeakyFpu().
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57 | ;
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58 | ; Cleans the FPU state, if necessary, before restoring the FPU.
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59 | ;
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60 | ; This macro ASSUMES CR0.TS is not set!
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61 | ;
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62 | ; @param xDX Pointer to CPUMCPU.
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63 | ; @uses xAX, EFLAGS
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64 | ;
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65 | ; Changes here should also be reflected in CPUMRCA.asm's copy!
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66 | ;
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67 | %macro CLEANFPU 0
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68 | test dword [xDX + CPUMCPU.fUseFlags], CPUM_USE_FFXSR_LEAKY
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69 | jz .nothing_to_clean
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70 |
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71 | xor eax, eax
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72 | fnstsw ax ; FSW -> AX.
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73 | test eax, RT_BIT(7) ; If FSW.ES (bit 7) is set, clear it to not cause FPU exceptions
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74 | ; while clearing & loading the FPU bits in 'clean_fpu' below.
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75 | jz .clean_fpu
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76 | fnclex
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77 |
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78 | .clean_fpu:
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79 | ffree st7 ; Clear FPU stack register(7)'s tag entry to prevent overflow if a wraparound occurs.
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80 | ; for the upcoming push (load)
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81 | fild dword [g_r32_Zero xWrtRIP] ; Explicit FPU load to overwrite FIP, FOP, FDP registers in the FPU.
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82 | .nothing_to_clean:
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83 | %endmacro
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84 | %endif ; Unused.
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85 |
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86 |
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87 | ;;
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88 | ; Clears CR0.TS and CR0.EM if necessary, saving the previous result.
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89 | ;
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90 | ; This is used to avoid FPU exceptions when touching the FPU state.
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91 | ;
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92 | ; @param %1 Register to save the old CR0 in (pass to RESTORE_CR0).
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93 | ; @param %2 Temporary scratch register.
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94 | ; @uses EFLAGS, CR0
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95 | ;
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96 | %macro SAVE_CR0_CLEAR_FPU_TRAPS 2
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97 | xor %1, %1
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98 | mov %2, cr0
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99 | test %2, X86_CR0_TS | X86_CR0_EM ; Make sure its safe to access the FPU state.
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100 | jz %%skip_cr0_write
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101 | mov %1, %2 ; Save old CR0
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102 | and %2, ~(X86_CR0_TS | X86_CR0_EM)
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103 | mov cr0, %2
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104 | %%skip_cr0_write:
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105 | %endmacro
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106 |
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107 | ;;
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108 | ; Restore CR0.TS and CR0.EM state if SAVE_CR0_CLEAR_FPU_TRAPS change it.
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109 | ;
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110 | ; @param %1 The register that SAVE_CR0_CLEAR_FPU_TRAPS saved the old CR0 in.
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111 | ;
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112 | %macro RESTORE_CR0 1
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113 | cmp %1, 0
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114 | je %%skip_cr0_restore
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115 | mov cr0, %1
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116 | %%skip_cr0_restore:
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117 | %endmacro
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118 |
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119 |
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120 | ;;
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121 | ; Saves the host state.
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122 | ;
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123 | ; @uses rax, rdx
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124 | ; @param pCpumCpu Define for the register containing the CPUMCPU pointer.
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125 | ; @param pXState Define for the register containing the extended state pointer.
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126 | ;
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127 | %macro CPUMR0_SAVE_HOST 0
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128 | ;
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129 | ; Load a couple of registers we'll use later in all branches.
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130 | ;
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131 | mov pXState, [pCpumCpu + CPUMCPU.Host.pXStateR0]
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132 | mov eax, [pCpumCpu + CPUMCPU.Host.fXStateMask]
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133 |
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134 | ;
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135 | ; XSAVE or FXSAVE?
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136 | ;
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137 | or eax, eax
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138 | jz %%host_fxsave
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139 |
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140 | ; XSAVE
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141 | mov edx, [pCpumCpu + CPUMCPU.Host.fXStateMask + 4]
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142 | %ifdef RT_ARCH_AMD64
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143 | o64 xsave [pXState]
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144 | %else
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145 | xsave [pXState]
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146 | %endif
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147 | jmp %%host_done
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148 |
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149 | ; FXSAVE
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150 | %%host_fxsave:
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151 | %ifdef RT_ARCH_AMD64
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152 | o64 fxsave [pXState] ; Use explicit REX prefix. See @bugref{6398}.
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153 | %else
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154 | fxsave [pXState]
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155 | %endif
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156 |
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157 | %%host_done:
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158 | %endmacro ; CPUMR0_SAVE_HOST
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159 |
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160 |
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161 | ;;
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162 | ; Loads the host state.
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163 | ;
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164 | ; @uses rax, rdx
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165 | ; @param pCpumCpu Define for the register containing the CPUMCPU pointer.
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166 | ; @param pXState Define for the register containing the extended state pointer.
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167 | ;
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168 | %macro CPUMR0_LOAD_HOST 0
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169 | ;
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170 | ; Load a couple of registers we'll use later in all branches.
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171 | ;
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172 | mov pXState, [pCpumCpu + CPUMCPU.Host.pXStateR0]
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173 | mov eax, [pCpumCpu + CPUMCPU.Host.fXStateMask]
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174 |
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175 | ;
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176 | ; XRSTOR or FXRSTOR?
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177 | ;
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178 | or eax, eax
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179 | jz %%host_fxrstor
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180 |
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181 | ; XRSTOR
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182 | mov edx, [pCpumCpu + CPUMCPU.Host.fXStateMask + 4]
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183 | %ifdef RT_ARCH_AMD64
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184 | o64 xrstor [pXState]
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185 | %else
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186 | xrstor [pXState]
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187 | %endif
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188 | jmp %%host_done
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189 |
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190 | ; FXRSTOR
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191 | %%host_fxrstor:
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192 | %ifdef RT_ARCH_AMD64
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193 | o64 fxrstor [pXState] ; Use explicit REX prefix. See @bugref{6398}.
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194 | %else
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195 | fxrstor [pXState]
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196 | %endif
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197 |
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198 | %%host_done:
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199 | %endmacro ; CPUMR0_LOAD_HOST
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200 |
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201 |
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202 |
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203 | ;; Macro for FXSAVE for the guest FPU but tries to figure out whether to
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204 | ; save the 32-bit FPU state or 64-bit FPU state.
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205 | ;
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206 | ; @param %1 Pointer to CPUMCPU.
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207 | ; @param %2 Pointer to XState.
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208 | ; @param %3 Force AMD64
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209 | ; @uses xAX, xDX, EFLAGS, 20h of stack.
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210 | ;
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211 | %macro SAVE_32_OR_64_FPU 3
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212 | %if CPUMR0_IS_AMD64 || %3
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213 | ; Save the guest FPU (32-bit or 64-bit), preserves existing broken state. See @bugref{7138}.
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214 | test dword [pCpumCpu + CPUMCPU.fUseFlags], CPUM_USE_SUPPORTS_LONGMODE
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215 | jnz short %%save_long_mode_guest
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216 | %endif
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217 | fxsave [pXState]
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218 | %if CPUMR0_IS_AMD64 || %3
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219 | jmp %%save_done_32bit_cs_ds
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220 |
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221 | %%save_long_mode_guest:
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222 | o64 fxsave [pXState]
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223 |
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224 | xor edx, edx
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225 | cmp dword [pXState + CS_OFF_IN_X86FXSTATE], 0
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226 | jne short %%save_done
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227 |
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228 | sub rsp, 20h ; Only need 1ch bytes but keep stack aligned otherwise we #GP(0).
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229 | fnstenv [rsp]
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230 | movzx eax, word [rsp + 10h]
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231 | mov [pXState + CS_OFF_IN_X86FXSTATE], eax
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232 | movzx eax, word [rsp + 18h]
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233 | add rsp, 20h
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234 | mov [pXState + DS_OFF_IN_X86FXSTATE], eax
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235 | %endif
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236 | %%save_done_32bit_cs_ds:
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237 | mov edx, X86_FXSTATE_RSVD_32BIT_MAGIC
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238 | %%save_done:
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239 | mov dword [pXState + X86_OFF_FXSTATE_RSVD], edx
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240 | %endmacro ; SAVE_32_OR_64_FPU
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241 |
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242 |
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243 | ;;
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244 | ; Save the guest state.
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245 | ;
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246 | ; @uses rax, rdx
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247 | ; @param pCpumCpu Define for the register containing the CPUMCPU pointer.
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248 | ; @param pXState Define for the register containing the extended state pointer.
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249 | ;
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250 | %macro CPUMR0_SAVE_GUEST 0
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251 | ;
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252 | ; Load a couple of registers we'll use later in all branches.
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253 | ;
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254 | mov pXState, [pCpumCpu + CPUMCPU.Guest.pXStateR0]
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255 | mov eax, [pCpumCpu + CPUMCPU.Guest.fXStateMask]
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256 |
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257 | ;
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258 | ; XSAVE or FXSAVE?
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259 | ;
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260 | or eax, eax
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261 | jz %%guest_fxsave
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262 |
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263 | ; XSAVE
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264 | mov edx, [pCpumCpu + CPUMCPU.Guest.fXStateMask + 4]
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265 | %ifdef VBOX_WITH_KERNEL_USING_XMM
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266 | and eax, ~CPUM_VOLATILE_XSAVE_GUEST_COMPONENTS ; Already saved in HMR0A.asm.
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267 | %endif
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268 | %ifdef RT_ARCH_AMD64
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269 | o64 xsave [pXState]
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270 | %else
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271 | xsave [pXState]
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272 | %endif
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273 | jmp %%guest_done
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274 |
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275 | ; FXSAVE
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276 | %%guest_fxsave:
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277 | SAVE_32_OR_64_FPU pCpumCpu, pXState, 0
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278 |
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279 | %%guest_done:
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280 | %endmacro ; CPUMR0_SAVE_GUEST
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281 |
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282 |
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283 | ;;
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284 | ; Wrapper for selecting 32-bit or 64-bit FXRSTOR according to what SAVE_32_OR_64_FPU did.
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285 | ;
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286 | ; @param %1 Pointer to CPUMCPU.
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287 | ; @param %2 Pointer to XState.
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288 | ; @param %3 Force AMD64.
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289 | ; @uses xAX, xDX, EFLAGS
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290 | ;
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291 | %macro RESTORE_32_OR_64_FPU 3
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292 | %if CPUMR0_IS_AMD64 || %3
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293 | ; Restore the guest FPU (32-bit or 64-bit), preserves existing broken state. See @bugref{7138}.
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294 | test dword [pCpumCpu + CPUMCPU.fUseFlags], CPUM_USE_SUPPORTS_LONGMODE
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295 | jz %%restore_32bit_fpu
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296 | cmp dword [pXState + X86_OFF_FXSTATE_RSVD], X86_FXSTATE_RSVD_32BIT_MAGIC
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297 | jne short %%restore_64bit_fpu
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298 | %%restore_32bit_fpu:
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299 | %endif
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300 | fxrstor [pXState]
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301 | %if CPUMR0_IS_AMD64 || %3
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302 | ; TODO: Restore XMM8-XMM15!
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303 | jmp short %%restore_fpu_done
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304 | %%restore_64bit_fpu:
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305 | o64 fxrstor [pXState]
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306 | %%restore_fpu_done:
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307 | %endif
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308 | %endmacro ; RESTORE_32_OR_64_FPU
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309 |
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310 |
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311 | ;;
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312 | ; Loads the guest state.
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313 | ;
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314 | ; @uses rax, rdx
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315 | ; @param pCpumCpu Define for the register containing the CPUMCPU pointer.
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316 | ; @param pXState Define for the register containing the extended state pointer.
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317 | ;
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318 | %macro CPUMR0_LOAD_GUEST 0
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319 | ;
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320 | ; Load a couple of registers we'll use later in all branches.
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321 | ;
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322 | mov pXState, [pCpumCpu + CPUMCPU.Guest.pXStateR0]
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323 | mov eax, [pCpumCpu + CPUMCPU.Guest.fXStateMask]
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324 |
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325 | ;
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326 | ; XRSTOR or FXRSTOR?
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327 | ;
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328 | or eax, eax
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329 | jz %%guest_fxrstor
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330 |
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331 | ; XRSTOR
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332 | mov edx, [pCpumCpu + CPUMCPU.Guest.fXStateMask + 4]
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333 | %ifdef VBOX_WITH_KERNEL_USING_XMM
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334 | and eax, ~CPUM_VOLATILE_XSAVE_GUEST_COMPONENTS ; Will be loaded by HMR0A.asm.
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335 | %endif
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336 | %ifdef RT_ARCH_AMD64
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337 | o64 xrstor [pXState]
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338 | %else
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339 | xrstor [pXState]
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340 | %endif
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341 | jmp %%guest_done
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342 |
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343 | ; FXRSTOR
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344 | %%guest_fxrstor:
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345 | RESTORE_32_OR_64_FPU pCpumCpu, pXState, 0
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346 |
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347 | %%guest_done:
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348 | %endmacro ; CPUMR0_LOAD_GUEST
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349 |
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350 |
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351 | ;;
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352 | ; Saves the host FPU/SSE/AVX state and restores the guest FPU/SSE/AVX state.
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353 | ;
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354 | ; @param pCpumCpu x86:[ebp+8] gcc:rdi msc:rcx CPUMCPU pointer
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355 | ;
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356 | align 16
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357 | BEGINPROC cpumR0SaveHostRestoreGuestFPUState
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358 | push xBP
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359 | SEH64_PUSH_xBP
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360 | mov xBP, xSP
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361 | SEH64_SET_FRAME_xBP 0
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362 | SEH64_END_PROLOGUE
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363 |
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364 | ;
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365 | ; Prologue - xAX+xDX must be free for XSAVE/XRSTOR input.
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366 | ;
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367 | %ifdef RT_ARCH_AMD64
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368 | %ifdef RT_OS_WINDOWS
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369 | mov r11, rcx
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370 | %else
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371 | mov r11, rdi
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372 | %endif
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373 | %define pCpumCpu r11
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374 | %define pXState r10
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375 | %else
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376 | push ebx
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377 | push esi
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378 | mov ebx, dword [ebp + 8]
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379 | %define pCpumCpu ebx
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380 | %define pXState esi
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381 | %endif
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382 |
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383 | pushf ; The darwin kernel can get upset or upset things if an
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384 | cli ; interrupt occurs while we're doing fxsave/fxrstor/cr0.
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385 |
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386 | %ifdef VBOX_WITH_KERNEL_USING_XMM
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387 | movaps xmm0, xmm0 ; Make 100% sure it's used before we save it or mess with CR0/XCR0.
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388 | %endif
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389 | SAVE_CR0_CLEAR_FPU_TRAPS xCX, xAX ; xCX is now old CR0 value, don't use!
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390 |
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391 | ;
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392 | ; Save the host state.
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393 | ;
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394 | test dword [pCpumCpu + CPUMCPU.fUseFlags], CPUM_USED_FPU_HOST
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395 | jnz .already_saved_host
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396 | CPUMR0_SAVE_HOST
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397 | %ifdef VBOX_WITH_KERNEL_USING_XMM
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398 | jmp .load_guest
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399 | %endif
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400 | .already_saved_host:
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401 | %ifdef VBOX_WITH_KERNEL_USING_XMM
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402 | ; If we didn't save the host state, we must save the non-volatile XMM registers.
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403 | mov pXState, [pCpumCpu + CPUMCPU.Host.pXStateR0]
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404 | movdqa [pXState + XMM_OFF_IN_X86FXSTATE + 060h], xmm6
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405 | movdqa [pXState + XMM_OFF_IN_X86FXSTATE + 070h], xmm7
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406 | movdqa [pXState + XMM_OFF_IN_X86FXSTATE + 080h], xmm8
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407 | movdqa [pXState + XMM_OFF_IN_X86FXSTATE + 090h], xmm9
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408 | movdqa [pXState + XMM_OFF_IN_X86FXSTATE + 0a0h], xmm10
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409 | movdqa [pXState + XMM_OFF_IN_X86FXSTATE + 0b0h], xmm11
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410 | movdqa [pXState + XMM_OFF_IN_X86FXSTATE + 0c0h], xmm12
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411 | movdqa [pXState + XMM_OFF_IN_X86FXSTATE + 0d0h], xmm13
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412 | movdqa [pXState + XMM_OFF_IN_X86FXSTATE + 0e0h], xmm14
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413 | movdqa [pXState + XMM_OFF_IN_X86FXSTATE + 0f0h], xmm15
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414 |
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415 | ;
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416 | ; Load the guest state.
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417 | ;
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418 | .load_guest:
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419 | %endif
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420 | CPUMR0_LOAD_GUEST
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421 |
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422 | %ifdef VBOX_WITH_KERNEL_USING_XMM
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423 | ; Restore the non-volatile xmm registers. ASSUMING 64-bit host.
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424 | mov pXState, [pCpumCpu + CPUMCPU.Host.pXStateR0]
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425 | movdqa xmm6, [pXState + XMM_OFF_IN_X86FXSTATE + 060h]
|
---|
426 | movdqa xmm7, [pXState + XMM_OFF_IN_X86FXSTATE + 070h]
|
---|
427 | movdqa xmm8, [pXState + XMM_OFF_IN_X86FXSTATE + 080h]
|
---|
428 | movdqa xmm9, [pXState + XMM_OFF_IN_X86FXSTATE + 090h]
|
---|
429 | movdqa xmm10, [pXState + XMM_OFF_IN_X86FXSTATE + 0a0h]
|
---|
430 | movdqa xmm11, [pXState + XMM_OFF_IN_X86FXSTATE + 0b0h]
|
---|
431 | movdqa xmm12, [pXState + XMM_OFF_IN_X86FXSTATE + 0c0h]
|
---|
432 | movdqa xmm13, [pXState + XMM_OFF_IN_X86FXSTATE + 0d0h]
|
---|
433 | movdqa xmm14, [pXState + XMM_OFF_IN_X86FXSTATE + 0e0h]
|
---|
434 | movdqa xmm15, [pXState + XMM_OFF_IN_X86FXSTATE + 0f0h]
|
---|
435 | %endif
|
---|
436 |
|
---|
437 | ;; @todo Save CR0 + XCR0 bits related to FPU, SSE and AVX*, leaving these register sets accessible to IEM.
|
---|
438 | RESTORE_CR0 xCX
|
---|
439 | or dword [pCpumCpu + CPUMCPU.fUseFlags], (CPUM_USED_FPU_GUEST | CPUM_USED_FPU_SINCE_REM | CPUM_USED_FPU_HOST)
|
---|
440 | popf
|
---|
441 |
|
---|
442 | %ifdef RT_ARCH_X86
|
---|
443 | pop esi
|
---|
444 | pop ebx
|
---|
445 | %endif
|
---|
446 | leave
|
---|
447 | ret
|
---|
448 | ENDPROC cpumR0SaveHostRestoreGuestFPUState
|
---|
449 |
|
---|
450 |
|
---|
451 | ;;
|
---|
452 | ; Saves the host FPU/SSE/AVX state.
|
---|
453 | ;
|
---|
454 | ; @returns VINF_SUCCESS (0) in EAX
|
---|
455 | ; @param pCpumCpu x86:[ebp+8] gcc:rdi msc:rcx CPUMCPU pointer
|
---|
456 | ;
|
---|
457 | align 16
|
---|
458 | BEGINPROC cpumR0SaveHostFPUState
|
---|
459 | push xBP
|
---|
460 | SEH64_PUSH_xBP
|
---|
461 | mov xBP, xSP
|
---|
462 | SEH64_SET_FRAME_xBP 0
|
---|
463 | SEH64_END_PROLOGUE
|
---|
464 |
|
---|
465 | ;
|
---|
466 | ; Prologue - xAX+xDX must be free for XSAVE/XRSTOR input.
|
---|
467 | ;
|
---|
468 | %ifdef RT_ARCH_AMD64
|
---|
469 | %ifdef RT_OS_WINDOWS
|
---|
470 | mov r11, rcx
|
---|
471 | %else
|
---|
472 | mov r11, rdi
|
---|
473 | %endif
|
---|
474 | %define pCpumCpu r11
|
---|
475 | %define pXState r10
|
---|
476 | %else
|
---|
477 | push ebx
|
---|
478 | push esi
|
---|
479 | mov ebx, dword [ebp + 8]
|
---|
480 | %define pCpumCpu ebx
|
---|
481 | %define pXState esi
|
---|
482 | %endif
|
---|
483 |
|
---|
484 | pushf ; The darwin kernel can get upset or upset things if an
|
---|
485 | cli ; interrupt occurs while we're doing fxsave/fxrstor/cr0.
|
---|
486 | %ifdef VBOX_WITH_KERNEL_USING_XMM
|
---|
487 | movaps xmm0, xmm0 ; Make 100% sure it's used before we save it or mess with CR0/XCR0.
|
---|
488 | %endif
|
---|
489 | SAVE_CR0_CLEAR_FPU_TRAPS xCX, xAX ; xCX is now old CR0 value, don't use!
|
---|
490 |
|
---|
491 | CPUMR0_SAVE_HOST
|
---|
492 | ;; @todo Save CR0 + XCR0 bits related to FPU, SSE and AVX*, leaving these register sets accessible to IEM.
|
---|
493 |
|
---|
494 | RESTORE_CR0 xCX
|
---|
495 | or dword [pCpumCpu + CPUMCPU.fUseFlags], (CPUM_USED_FPU_HOST | CPUM_USED_FPU_SINCE_REM) ; Latter is not necessarily true, but normally yes.
|
---|
496 | popf
|
---|
497 |
|
---|
498 | %ifdef RT_ARCH_X86
|
---|
499 | pop esi
|
---|
500 | pop ebx
|
---|
501 | %endif
|
---|
502 | leave
|
---|
503 | ret
|
---|
504 | %undef pCpumCpu
|
---|
505 | %undef pXState
|
---|
506 | ENDPROC cpumR0SaveHostFPUState
|
---|
507 |
|
---|
508 |
|
---|
509 | ;;
|
---|
510 | ; Saves the guest FPU/SSE/AVX state and restores the host FPU/SSE/AVX state.
|
---|
511 | ;
|
---|
512 | ; @param pCpumCpu x86:[ebp+8] gcc:rdi msc:rcx CPUMCPU pointer
|
---|
513 | ;
|
---|
514 | align 16
|
---|
515 | BEGINPROC cpumR0SaveGuestRestoreHostFPUState
|
---|
516 | push xBP
|
---|
517 | SEH64_PUSH_xBP
|
---|
518 | mov xBP, xSP
|
---|
519 | SEH64_SET_FRAME_xBP 0
|
---|
520 | SEH64_END_PROLOGUE
|
---|
521 |
|
---|
522 | ;
|
---|
523 | ; Prologue - xAX+xDX must be free for XSAVE/XRSTOR input.
|
---|
524 | ;
|
---|
525 | %ifdef RT_ARCH_AMD64
|
---|
526 | %ifdef RT_OS_WINDOWS
|
---|
527 | mov r11, rcx
|
---|
528 | %else
|
---|
529 | mov r11, rdi
|
---|
530 | %endif
|
---|
531 | %define pCpumCpu r11
|
---|
532 | %define pXState r10
|
---|
533 | %else
|
---|
534 | push ebx
|
---|
535 | push esi
|
---|
536 | mov ebx, dword [ebp + 8]
|
---|
537 | %define pCpumCpu ebx
|
---|
538 | %define pXState esi
|
---|
539 | %endif
|
---|
540 | pushf ; The darwin kernel can get upset or upset things if an
|
---|
541 | cli ; interrupt occurs while we're doing fxsave/fxrstor/cr0.
|
---|
542 | SAVE_CR0_CLEAR_FPU_TRAPS xCX, xAX ; xCX is now old CR0 value, don't use!
|
---|
543 |
|
---|
544 |
|
---|
545 | %ifdef VBOX_WITH_KERNEL_USING_XMM
|
---|
546 | ;
|
---|
547 | ; Copy non-volatile XMM registers to the host state so we can use
|
---|
548 | ; them while saving the guest state (we've gotta do this anyway).
|
---|
549 | ;
|
---|
550 | mov pXState, [pCpumCpu + CPUMCPU.Host.pXStateR0]
|
---|
551 | movdqa [pXState + XMM_OFF_IN_X86FXSTATE + 060h], xmm6
|
---|
552 | movdqa [pXState + XMM_OFF_IN_X86FXSTATE + 070h], xmm7
|
---|
553 | movdqa [pXState + XMM_OFF_IN_X86FXSTATE + 080h], xmm8
|
---|
554 | movdqa [pXState + XMM_OFF_IN_X86FXSTATE + 090h], xmm9
|
---|
555 | movdqa [pXState + XMM_OFF_IN_X86FXSTATE + 0a0h], xmm10
|
---|
556 | movdqa [pXState + XMM_OFF_IN_X86FXSTATE + 0b0h], xmm11
|
---|
557 | movdqa [pXState + XMM_OFF_IN_X86FXSTATE + 0c0h], xmm12
|
---|
558 | movdqa [pXState + XMM_OFF_IN_X86FXSTATE + 0d0h], xmm13
|
---|
559 | movdqa [pXState + XMM_OFF_IN_X86FXSTATE + 0e0h], xmm14
|
---|
560 | movdqa [pXState + XMM_OFF_IN_X86FXSTATE + 0f0h], xmm15
|
---|
561 | %endif
|
---|
562 |
|
---|
563 | ;
|
---|
564 | ; Save the guest state if necessary.
|
---|
565 | ;
|
---|
566 | test dword [pCpumCpu + CPUMCPU.fUseFlags], CPUM_USED_FPU_GUEST
|
---|
567 | jz .load_only_host
|
---|
568 |
|
---|
569 | %ifdef VBOX_WITH_KERNEL_USING_XMM
|
---|
570 | ; Load the guest XMM register values we already saved in HMR0VMXStartVMWrapXMM.
|
---|
571 | mov pXState, [pCpumCpu + CPUMCPU.Guest.pXStateR0]
|
---|
572 | movdqa xmm0, [pXState + XMM_OFF_IN_X86FXSTATE + 000h]
|
---|
573 | movdqa xmm1, [pXState + XMM_OFF_IN_X86FXSTATE + 010h]
|
---|
574 | movdqa xmm2, [pXState + XMM_OFF_IN_X86FXSTATE + 020h]
|
---|
575 | movdqa xmm3, [pXState + XMM_OFF_IN_X86FXSTATE + 030h]
|
---|
576 | movdqa xmm4, [pXState + XMM_OFF_IN_X86FXSTATE + 040h]
|
---|
577 | movdqa xmm5, [pXState + XMM_OFF_IN_X86FXSTATE + 050h]
|
---|
578 | movdqa xmm6, [pXState + XMM_OFF_IN_X86FXSTATE + 060h]
|
---|
579 | movdqa xmm7, [pXState + XMM_OFF_IN_X86FXSTATE + 070h]
|
---|
580 | movdqa xmm8, [pXState + XMM_OFF_IN_X86FXSTATE + 080h]
|
---|
581 | movdqa xmm9, [pXState + XMM_OFF_IN_X86FXSTATE + 090h]
|
---|
582 | movdqa xmm10, [pXState + XMM_OFF_IN_X86FXSTATE + 0a0h]
|
---|
583 | movdqa xmm11, [pXState + XMM_OFF_IN_X86FXSTATE + 0b0h]
|
---|
584 | movdqa xmm12, [pXState + XMM_OFF_IN_X86FXSTATE + 0c0h]
|
---|
585 | movdqa xmm13, [pXState + XMM_OFF_IN_X86FXSTATE + 0d0h]
|
---|
586 | movdqa xmm14, [pXState + XMM_OFF_IN_X86FXSTATE + 0e0h]
|
---|
587 | movdqa xmm15, [pXState + XMM_OFF_IN_X86FXSTATE + 0f0h]
|
---|
588 | %endif
|
---|
589 | CPUMR0_SAVE_GUEST
|
---|
590 |
|
---|
591 | ;
|
---|
592 | ; Load the host state.
|
---|
593 | ;
|
---|
594 | .load_only_host:
|
---|
595 | CPUMR0_LOAD_HOST
|
---|
596 |
|
---|
597 | ;; @todo Restore CR0 + XCR0 bits related to FPU, SSE and AVX* (for IEM).
|
---|
598 | RESTORE_CR0 xCX
|
---|
599 | and dword [pCpumCpu + CPUMCPU.fUseFlags], ~(CPUM_USED_FPU_GUEST | CPUM_USED_FPU_HOST)
|
---|
600 |
|
---|
601 | popf
|
---|
602 | %ifdef RT_ARCH_X86
|
---|
603 | pop esi
|
---|
604 | pop ebx
|
---|
605 | %endif
|
---|
606 | leave
|
---|
607 | ret
|
---|
608 | %undef pCpumCpu
|
---|
609 | %undef pXState
|
---|
610 | ENDPROC cpumR0SaveGuestRestoreHostFPUState
|
---|
611 |
|
---|
612 |
|
---|
613 | %if ARCH_BITS == 32
|
---|
614 | %ifdef VBOX_WITH_64_BITS_GUESTS
|
---|
615 | ;;
|
---|
616 | ; Restores the host's FPU/SSE/AVX state from pCpumCpu->Host.
|
---|
617 | ;
|
---|
618 | ; @param pCpumCpu x86:[ebp+8] gcc:rdi msc:rcx CPUMCPU pointer
|
---|
619 | ;
|
---|
620 | align 16
|
---|
621 | BEGINPROC cpumR0RestoreHostFPUState
|
---|
622 | ;
|
---|
623 | ; Prologue - xAX+xDX must be free for XSAVE/XRSTOR input.
|
---|
624 | ;
|
---|
625 | push ebp
|
---|
626 | mov ebp, esp
|
---|
627 | push ebx
|
---|
628 | push esi
|
---|
629 | mov ebx, dword [ebp + 8]
|
---|
630 | %define pCpumCpu ebx
|
---|
631 | %define pXState esi
|
---|
632 |
|
---|
633 | ;
|
---|
634 | ; Restore host CPU state.
|
---|
635 | ;
|
---|
636 | pushf ; The darwin kernel can get upset or upset things if an
|
---|
637 | cli ; interrupt occurs while we're doing fxsave/fxrstor/cr0.
|
---|
638 | SAVE_CR0_CLEAR_FPU_TRAPS xCX, xAX ; xCX is now old CR0 value, don't use!
|
---|
639 |
|
---|
640 | CPUMR0_LOAD_HOST
|
---|
641 |
|
---|
642 | RESTORE_CR0 xCX
|
---|
643 | and dword [pCpumCpu + CPUMCPU.fUseFlags], ~CPUM_USED_FPU_HOST
|
---|
644 | popf
|
---|
645 |
|
---|
646 | pop esi
|
---|
647 | pop ebx
|
---|
648 | leave
|
---|
649 | ret
|
---|
650 | %undef pCpumCPu
|
---|
651 | %undef pXState
|
---|
652 | ENDPROC cpumR0RestoreHostFPUState
|
---|
653 | %endif ; VBOX_WITH_64_BITS_GUESTS
|
---|
654 | %endif ; ARCH_BITS == 32
|
---|
655 |
|
---|