VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR0/CPUMR0UnusedA.asm@ 58591

Last change on this file since 58591 was 57446, checked in by vboxsync, 9 years ago

VMM: Removing VBOX_WITH_HYBRID_32BIT_KERNEL and other 32-bit darwin fun.

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  • Property svn:keywords set to Author Date Id Revision
File size: 6.0 KB
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1; $Id: CPUMR0UnusedA.asm 57446 2015-08-18 17:33:53Z vboxsync $
2;; @file
3; CPUM - Guest Context Assembly Routines.
4;
5
6;
7; Copyright (C) 2006-2015 Oracle Corporation
8;
9; This file is part of VirtualBox Open Source Edition (OSE), as
10; available from http://www.virtualbox.org. This file is free software;
11; you can redistribute it and/or modify it under the terms of the GNU
12; General Public License (GPL) as published by the Free Software
13; Foundation, in version 2 as it comes in the "COPYING" file of the
14; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16;
17
18;*******************************************************************************
19;* Header Files *
20;*******************************************************************************
21%include "VBox/asmdefs.mac"
22%include "VBox/vmm/vm.mac"
23%include "VBox/err.mac"
24%include "VBox/vmm/stam.mac"
25%include "CPUMInternal.mac"
26%include "iprt/x86.mac"
27%include "VBox/vmm/cpum.mac"
28
29%ifdef IN_RING3
30 %error "The jump table doesn't link on leopard."
31%endif
32
33
34
35;;
36; Restores the guest's FPU/XMM state
37;
38; @param pCtx x86:[esp+4] gcc:rdi msc:rcx CPUMCTX pointer
39;
40; @remarks Used by the disabled CPUM_CAN_HANDLE_NM_TRAPS_IN_KERNEL_MODE code.
41;
42align 16
43BEGINPROC cpumR0LoadFPU
44%ifdef RT_ARCH_AMD64
45 %ifdef RT_OS_WINDOWS
46 mov xDX, rcx
47 %else
48 mov xDX, rdi
49 %endif
50%else
51 mov xDX, dword [esp + 4]
52%endif
53
54 fxrstor [xDX + CPUMCTX.fpu]
55.done:
56 ret
57ENDPROC cpumR0LoadFPU
58
59
60;;
61; Restores the guest's FPU/XMM state
62;
63; @param pCtx x86:[esp+4] gcc:rdi msc:rcx CPUMCTX pointer
64;
65; @remarks Used by the disabled CPUM_CAN_HANDLE_NM_TRAPS_IN_KERNEL_MODE code.
66;
67align 16
68BEGINPROC cpumR0SaveFPU
69%ifdef RT_ARCH_AMD64
70 %ifdef RT_OS_WINDOWS
71 mov xDX, rcx
72 %else
73 mov xDX, rdi
74 %endif
75%else
76 mov xDX, dword [esp + 4]
77%endif
78 fxsave [xDX + CPUMCTX.fpu]
79.done:
80 ret
81ENDPROC cpumR0SaveFPU
82
83
84;;
85; Restores the guest's XMM state
86;
87; @param pCtx x86:[esp+4] gcc:rdi msc:rcx CPUMCTX pointer
88;
89; @remarks Used by the disabled CPUM_CAN_HANDLE_NM_TRAPS_IN_KERNEL_MODE code.
90;
91align 16
92BEGINPROC cpumR0LoadXMM
93%ifdef RT_ARCH_AMD64
94 %ifdef RT_OS_WINDOWS
95 mov xDX, rcx
96 %else
97 mov xDX, rdi
98 %endif
99%else
100 mov xDX, dword [esp + 4]
101%endif
102
103 movdqa xmm0, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*0]
104 movdqa xmm1, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*1]
105 movdqa xmm2, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*2]
106 movdqa xmm3, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*3]
107 movdqa xmm4, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*4]
108 movdqa xmm5, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*5]
109 movdqa xmm6, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*6]
110 movdqa xmm7, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*7]
111
112%ifdef RT_ARCH_AMD64
113 test qword [xDX + CPUMCTX.msrEFER], MSR_K6_EFER_LMA
114 jz .done
115
116 movdqa xmm8, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*8]
117 movdqa xmm9, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*9]
118 movdqa xmm10, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*10]
119 movdqa xmm11, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*11]
120 movdqa xmm12, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*12]
121 movdqa xmm13, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*13]
122 movdqa xmm14, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*14]
123 movdqa xmm15, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*15]
124%endif
125
126.done:
127 ret
128ENDPROC cpumR0LoadXMM
129
130
131;;
132; Restores the guest's XMM state
133;
134; @param pCtx x86:[esp+4] gcc:rdi msc:rcx CPUMCTX pointer
135;
136; @remarks Used by the disabled CPUM_CAN_HANDLE_NM_TRAPS_IN_KERNEL_MODE code.
137;
138align 16
139BEGINPROC cpumR0SaveXMM
140%ifdef RT_ARCH_AMD64
141 %ifdef RT_OS_WINDOWS
142 mov xDX, rcx
143 %else
144 mov xDX, rdi
145 %endif
146%else
147 mov xDX, dword [esp + 4]
148%endif
149
150 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*0], xmm0
151 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*1], xmm1
152 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*2], xmm2
153 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*3], xmm3
154 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*4], xmm4
155 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*5], xmm5
156 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*6], xmm6
157 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*7], xmm7
158
159%ifdef RT_ARCH_AMD64
160 test qword [xDX + CPUMCTX.msrEFER], MSR_K6_EFER_LMA
161 jz .done
162
163 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*8], xmm8
164 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*9], xmm9
165 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*10], xmm10
166 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*11], xmm11
167 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*12], xmm12
168 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*13], xmm13
169 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*14], xmm14
170 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*15], xmm15
171%endif
172
173.done:
174 ret
175ENDPROC cpumR0SaveXMM
176
177
178;;
179; Set the FPU control word; clearing exceptions first
180;
181; @param u16FCW x86:[esp+4] gcc:rdi msc:rcx New FPU control word
182align 16
183BEGINPROC cpumR0SetFCW
184%ifdef RT_ARCH_AMD64
185 %ifdef RT_OS_WINDOWS
186 mov xAX, rcx
187 %else
188 mov xAX, rdi
189 %endif
190%else
191 mov xAX, dword [esp + 4]
192%endif
193 fnclex
194 push xAX
195 fldcw [xSP]
196 pop xAX
197 ret
198ENDPROC cpumR0SetFCW
199
200
201;;
202; Get the FPU control word
203;
204align 16
205BEGINPROC cpumR0GetFCW
206 fnstcw [xSP - 8]
207 mov ax, word [xSP - 8]
208 ret
209ENDPROC cpumR0GetFCW
210
211
212;;
213; Set the MXCSR;
214;
215; @param u32MXCSR x86:[esp+4] gcc:rdi msc:rcx New MXCSR
216align 16
217BEGINPROC cpumR0SetMXCSR
218%ifdef RT_ARCH_AMD64
219 %ifdef RT_OS_WINDOWS
220 mov xAX, rcx
221 %else
222 mov xAX, rdi
223 %endif
224%else
225 mov xAX, dword [esp + 4]
226%endif
227 push xAX
228 ldmxcsr [xSP]
229 pop xAX
230 ret
231ENDPROC cpumR0SetMXCSR
232
233
234;;
235; Get the MXCSR
236;
237align 16
238BEGINPROC cpumR0GetMXCSR
239 stmxcsr [xSP - 8]
240 mov eax, dword [xSP - 8]
241 ret
242ENDPROC cpumR0GetMXCSR
243
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