| 1 | ; $Id: HMR0Mixed.mac 56287 2015-06-09 11:15:22Z vboxsync $
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| 2 | ;; @file
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| 3 | ; HM - Ring-0 Host 32/64, Guest 32/64 world-switch routines
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| 4 | ;
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| 5 | ; Darwin uses this to build two versions in the hybrid case.
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| 6 | ; Included by HMR0A.asm with RT_ARCH_AMD64 defined or undefined.
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| 7 | ;
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| 8 |
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| 9 | ;
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| 10 | ; Copyright (C) 2006-2015 Oracle Corporation
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| 11 | ;
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| 12 | ; This file is part of VirtualBox Open Source Edition (OSE), as
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| 13 | ; available from http://www.virtualbox.org. This file is free software;
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| 14 | ; you can redistribute it and/or modify it under the terms of the GNU
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| 15 | ; General Public License (GPL) as published by the Free Software
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| 16 | ; Foundation, in version 2 as it comes in the "COPYING" file of the
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| 17 | ; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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| 18 | ; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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| 19 | ;
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| 20 |
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| 21 |
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| 22 | ;;
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| 23 | ; Keep these macro definitions in this file as it gets included and compiled
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| 24 | ; with RT_ARCH_AMD64 once and RT_ARCH_X86 once.
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| 25 | %undef VMX_SKIP_GDTR
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| 26 | %undef VMX_SKIP_IDTR
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| 27 | %undef VMX_SKIP_TR
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| 28 |
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| 29 | %ifdef RT_ARCH_AMD64
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| 30 | %define VMX_SKIP_GDTR
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| 31 | %ifdef RT_OS_DARWIN
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| 32 | ; Darwin (Mavericks) uses IDTR limit to store the CPU Id so we need to restore it always.
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| 33 | ; See @bugref{6875}.
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| 34 | %else
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| 35 | %define VMX_SKIP_IDTR
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| 36 | %endif
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| 37 | %define VMX_SKIP_TR
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| 38 | %endif
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| 39 |
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| 40 | ;; @def RESTORE_STATE_VM32
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| 41 | ; Macro restoring essential host state and updating guest state
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| 42 | ; for common host, 32-bit guest for VT-x.
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| 43 | %macro RESTORE_STATE_VM32 0
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| 44 | ; Restore base and limit of the IDTR & GDTR.
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| 45 | %ifndef VMX_SKIP_IDTR
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| 46 | lidt [xSP]
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| 47 | add xSP, xCB * 2
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| 48 | %endif
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| 49 | %ifndef VMX_SKIP_GDTR
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| 50 | lgdt [xSP]
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| 51 | add xSP, xCB * 2
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| 52 | %endif
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| 53 |
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| 54 | push xDI
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| 55 | %ifndef VMX_SKIP_TR
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| 56 | mov xDI, [xSP + xCB * 3] ; pCtx (*3 to skip the saved xDI, TR, LDTR).
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| 57 | %else
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| 58 | mov xDI, [xSP + xCB * 2] ; pCtx (*2 to skip the saved xDI, LDTR).
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| 59 | %endif
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| 60 |
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| 61 | mov [ss:xDI + CPUMCTX.eax], eax
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| 62 | mov [ss:xDI + CPUMCTX.ebx], ebx
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| 63 | mov [ss:xDI + CPUMCTX.ecx], ecx
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| 64 | mov [ss:xDI + CPUMCTX.edx], edx
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| 65 | mov [ss:xDI + CPUMCTX.esi], esi
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| 66 | mov [ss:xDI + CPUMCTX.ebp], ebp
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| 67 | mov xAX, cr2
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| 68 | mov [ss:xDI + CPUMCTX.cr2], xAX
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| 69 |
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| 70 | %ifdef RT_ARCH_AMD64
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| 71 | pop xAX ; The guest edi we pushed above.
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| 72 | mov dword [ss:xDI + CPUMCTX.edi], eax
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| 73 | %else
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| 74 | pop dword [ss:xDI + CPUMCTX.edi] ; The guest edi we pushed above.
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| 75 | %endif
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| 76 |
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| 77 | %ifndef VMX_SKIP_TR
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| 78 | ; Restore TSS selector; must mark it as not busy before using ltr (!)
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| 79 | ; ASSUME that this is supposed to be 'BUSY'. (saves 20-30 ticks on the T42p)
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| 80 | ; @todo get rid of sgdt
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| 81 | pop xBX ; Saved TR
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| 82 | sub xSP, xCB * 2
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| 83 | sgdt [xSP]
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| 84 | mov xAX, xBX
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| 85 | and eax, X86_SEL_MASK_OFF_RPL ; Mask away TI and RPL bits leaving only the descriptor offset.
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| 86 | add xAX, [xSP + 2] ; eax <- GDTR.address + descriptor offset.
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| 87 | and dword [ss:xAX + 4], ~RT_BIT(9) ; Clear the busy flag in TSS desc (bits 0-7=base, bit 9=busy bit).
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| 88 | ltr bx
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| 89 | add xSP, xCB * 2
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| 90 | %endif
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| 91 |
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| 92 | pop xAX ; Saved LDTR
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| 93 | %ifdef RT_ARCH_AMD64
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| 94 | cmp eax, 0
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| 95 | je %%skip_ldt_write32
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| 96 | %endif
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| 97 | lldt ax
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| 98 |
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| 99 | %%skip_ldt_write32:
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| 100 | add xSP, xCB ; pCtx
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| 101 |
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| 102 | %ifdef VMX_USE_CACHED_VMCS_ACCESSES
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| 103 | pop xDX ; Saved pCache
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| 104 |
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| 105 | ; Note! If we get here as a result of invalid VMCS pointer, all the following
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| 106 | ; vmread's will fail (only eflags.cf=1 will be set) but that shouldn't cause any
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| 107 | ; trouble only just less efficient.
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| 108 | mov ecx, [ss:xDX + VMCSCACHE.Read.cValidEntries]
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| 109 | cmp ecx, 0 ; Can't happen
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| 110 | je %%no_cached_read32
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| 111 | jmp %%cached_read32
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| 112 |
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| 113 | ALIGN(16)
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| 114 | %%cached_read32:
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| 115 | dec xCX
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| 116 | mov eax, [ss:xDX + VMCSCACHE.Read.aField + xCX * 4]
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| 117 | vmread [ss:xDX + VMCSCACHE.Read.aFieldVal + xCX * 8], xAX
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| 118 | cmp xCX, 0
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| 119 | jnz %%cached_read32
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| 120 | %%no_cached_read32:
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| 121 | %endif
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| 122 |
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| 123 | ; Restore segment registers.
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| 124 | MYPOPSEGS xAX, ax
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| 125 |
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| 126 | ; Restore the host XCR0 if necessary.
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| 127 | pop xCX
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| 128 | test ecx, ecx
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| 129 | jnz %%xcr0_after_skip
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| 130 | pop xAX
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| 131 | pop xDX
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| 132 | xsetbv ; ecx is already zero.
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| 133 | %%xcr0_after_skip:
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| 134 |
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| 135 | ; Restore general purpose registers.
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| 136 | MYPOPAD
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| 137 | %endmacro
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| 138 |
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| 139 |
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| 140 | ;;
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| 141 | ; Prepares for and executes VMLAUNCH/VMRESUME (32 bits guest mode)
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| 142 | ;
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| 143 | ; @returns VBox status code
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| 144 | ; @param fResume x86:[ebp+8], msc:rcx,gcc:rdi Whether to use vmlauch/vmresume.
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| 145 | ; @param pCtx x86:[ebp+c], msc:rdx,gcc:rsi Pointer to the guest-CPU context.
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| 146 | ; @param pCache x86:[ebp+10],msc:r8, gcc:rdx Pointer to the VMCS cache.
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| 147 | ; @param pVM x86:[ebp+14],msc:r9, gcc:rcx Pointer to the cross context VM structure.
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| 148 | ; @param pVCpu x86:[ebp+18],msc:[ebp+30],gcc:r8 Pointer to the cross context VMCPU structure.
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| 149 | ;
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| 150 | ALIGNCODE(16)
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| 151 | BEGINPROC MY_NAME(VMXR0StartVM32)
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| 152 | push xBP
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| 153 | mov xBP, xSP
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| 154 |
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| 155 | pushf
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| 156 | cli
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| 157 |
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| 158 | ;
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| 159 | ; Save all general purpose host registers.
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| 160 | ;
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| 161 | MYPUSHAD
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| 162 |
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| 163 | ;
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| 164 | ; First we have to write some final guest CPU context registers.
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| 165 | ;
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| 166 | mov eax, VMX_VMCS_HOST_RIP
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| 167 | %ifdef RT_ARCH_AMD64
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| 168 | lea r10, [.vmlaunch_done wrt rip]
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| 169 | vmwrite rax, r10
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| 170 | %else
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| 171 | mov ecx, .vmlaunch_done
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| 172 | vmwrite eax, ecx
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| 173 | %endif
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| 174 | ; Note: assumes success!
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| 175 |
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| 176 | ;
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| 177 | ; Unify input parameter registers.
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| 178 | ;
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| 179 | %ifdef RT_ARCH_AMD64
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| 180 | %ifdef ASM_CALL64_GCC
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| 181 | ; fResume already in rdi
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| 182 | ; pCtx already in rsi
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| 183 | mov rbx, rdx ; pCache
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| 184 | %else
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| 185 | mov rdi, rcx ; fResume
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| 186 | mov rsi, rdx ; pCtx
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| 187 | mov rbx, r8 ; pCache
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| 188 | %endif
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| 189 | %else
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| 190 | mov edi, [ebp + 8] ; fResume
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| 191 | mov esi, [ebp + 12] ; pCtx
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| 192 | mov ebx, [ebp + 16] ; pCache
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| 193 | %endif
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| 194 |
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| 195 | ;
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| 196 | ; Save the host XCR0 and load the guest one if necessary.
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| 197 | ; Note! Trashes rdx and rcx.
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| 198 | ;
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| 199 | %ifdef ASM_CALL64_MSC
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| 200 | mov rax, [xBP + 30h] ; pVCpu
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| 201 | %elifdef ASM_CALL64_GCC
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| 202 | mov rax, r8 ; pVCpu
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| 203 | %else
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| 204 | mov eax, [xBP + 18h] ; pVCpu
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| 205 | %endif
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| 206 | test byte [xAX + VMCPU.hm + HMCPU.fLoadSaveGuestXcr0], 1
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| 207 | jz .xcr0_before_skip
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| 208 |
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| 209 | xor ecx, ecx
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| 210 | xgetbv ; Save the host one on the stack.
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| 211 | push xDX
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| 212 | push xAX
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| 213 |
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| 214 | mov eax, [xSI + CPUMCTX.aXcr] ; Load the guest one.
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| 215 | mov edx, [xSI + CPUMCTX.aXcr + 4]
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| 216 | xor ecx, ecx ; paranoia
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| 217 | xsetbv
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| 218 |
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| 219 | push 0 ; Indicate that we must restore XCR0 (popped into ecx, thus 0).
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| 220 | jmp .xcr0_before_done
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| 221 |
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| 222 | .xcr0_before_skip:
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| 223 | push 3fh ; indicate that we need not.
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| 224 | .xcr0_before_done:
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| 225 |
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| 226 | ;
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| 227 | ; Save segment registers.
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| 228 | ; Note! Trashes rdx & rcx, so we moved it here (amd64 case).
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| 229 | ;
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| 230 | MYPUSHSEGS xAX, ax
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| 231 |
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| 232 | %ifdef VMX_USE_CACHED_VMCS_ACCESSES
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| 233 | mov ecx, [xBX + VMCSCACHE.Write.cValidEntries]
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| 234 | cmp ecx, 0
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| 235 | je .no_cached_writes
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| 236 | mov edx, ecx
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| 237 | mov ecx, 0
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| 238 | jmp .cached_write
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| 239 |
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| 240 | ALIGN(16)
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| 241 | .cached_write:
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| 242 | mov eax, [xBX + VMCSCACHE.Write.aField + xCX * 4]
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| 243 | vmwrite xAX, [xBX + VMCSCACHE.Write.aFieldVal + xCX * 8]
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| 244 | inc xCX
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| 245 | cmp xCX, xDX
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| 246 | jl .cached_write
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| 247 |
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| 248 | mov dword [xBX + VMCSCACHE.Write.cValidEntries], 0
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| 249 | .no_cached_writes:
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| 250 |
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| 251 | ; Save the pCache pointer.
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| 252 | push xBX
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| 253 | %endif
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| 254 |
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| 255 | ; Save the pCtx pointer.
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| 256 | push xSI
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| 257 |
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| 258 | ; Save host LDTR.
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| 259 | xor eax, eax
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| 260 | sldt ax
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| 261 | push xAX
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| 262 |
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| 263 | %ifndef VMX_SKIP_TR
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| 264 | ; The host TR limit is reset to 0x67; save & restore it manually.
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| 265 | str eax
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| 266 | push xAX
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| 267 | %endif
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| 268 |
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| 269 | %ifndef VMX_SKIP_GDTR
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| 270 | ; VT-x only saves the base of the GDTR & IDTR and resets the limit to 0xffff; we must restore the limit correctly!
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| 271 | sub xSP, xCB * 2
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| 272 | sgdt [xSP]
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| 273 | %endif
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| 274 | %ifndef VMX_SKIP_IDTR
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| 275 | sub xSP, xCB * 2
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| 276 | sidt [xSP]
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| 277 | %endif
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| 278 |
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| 279 | ; Load CR2 if necessary (may be expensive as writing CR2 is a synchronizing instruction).
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| 280 | mov xBX, [xSI + CPUMCTX.cr2]
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| 281 | mov xDX, cr2
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| 282 | cmp xBX, xDX
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| 283 | je .skip_cr2_write32
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| 284 | mov cr2, xBX
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| 285 |
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| 286 | .skip_cr2_write32:
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| 287 | mov eax, VMX_VMCS_HOST_RSP
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| 288 | vmwrite xAX, xSP
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| 289 | ; Note: assumes success!
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| 290 | ; Don't mess with ESP anymore!!!
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| 291 |
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| 292 | ; Load guest general purpose registers.
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| 293 | mov eax, [xSI + CPUMCTX.eax]
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| 294 | mov ebx, [xSI + CPUMCTX.ebx]
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| 295 | mov ecx, [xSI + CPUMCTX.ecx]
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| 296 | mov edx, [xSI + CPUMCTX.edx]
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| 297 | mov ebp, [xSI + CPUMCTX.ebp]
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| 298 |
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| 299 | ; Resume or start VM?
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| 300 | cmp xDI, 0 ; fResume
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| 301 | je .vmlaunch_launch
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| 302 |
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| 303 | ; Load guest edi & esi.
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| 304 | mov edi, [xSI + CPUMCTX.edi]
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| 305 | mov esi, [xSI + CPUMCTX.esi]
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| 306 |
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| 307 | vmresume
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| 308 | jmp .vmlaunch_done; ; Here if vmresume detected a failure.
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| 309 |
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| 310 | .vmlaunch_launch:
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| 311 | ; Save guest edi & esi.
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| 312 | mov edi, [xSI + CPUMCTX.edi]
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| 313 | mov esi, [xSI + CPUMCTX.esi]
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| 314 |
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| 315 | vmlaunch
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| 316 | jmp .vmlaunch_done; ; Here if vmlaunch detected a failure.
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| 317 |
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| 318 | ALIGNCODE(16) ;; @todo YASM BUG - this alignment is wrong on darwin, it's 1 byte off.
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| 319 | .vmlaunch_done:
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| 320 | jc near .vmxstart_invalid_vmcs_ptr
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| 321 | jz near .vmxstart_start_failed
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| 322 |
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| 323 | RESTORE_STATE_VM32
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| 324 | mov eax, VINF_SUCCESS
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| 325 |
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| 326 | .vmstart_end:
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| 327 | popf
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| 328 | pop xBP
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| 329 | ret
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| 330 |
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| 331 | .vmxstart_invalid_vmcs_ptr:
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| 332 | RESTORE_STATE_VM32
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| 333 | mov eax, VERR_VMX_INVALID_VMCS_PTR_TO_START_VM
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| 334 | jmp .vmstart_end
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| 335 |
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| 336 | .vmxstart_start_failed:
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| 337 | RESTORE_STATE_VM32
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| 338 | mov eax, VERR_VMX_UNABLE_TO_START_VM
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| 339 | jmp .vmstart_end
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| 340 |
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| 341 | ENDPROC MY_NAME(VMXR0StartVM32)
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| 342 |
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| 343 |
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| 344 | %ifdef RT_ARCH_AMD64
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| 345 | ;; @def RESTORE_STATE_VM64
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| 346 | ; Macro restoring essential host state and updating guest state
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| 347 | ; for 64-bit host, 64-bit guest for VT-x.
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| 348 | ;
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| 349 | %macro RESTORE_STATE_VM64 0
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| 350 | ; Restore base and limit of the IDTR & GDTR
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| 351 | %ifndef VMX_SKIP_IDTR
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| 352 | lidt [xSP]
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| 353 | add xSP, xCB * 2
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| 354 | %endif
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| 355 | %ifndef VMX_SKIP_GDTR
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| 356 | lgdt [xSP]
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| 357 | add xSP, xCB * 2
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| 358 | %endif
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| 359 |
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| 360 | push xDI
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| 361 | %ifndef VMX_SKIP_TR
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| 362 | mov xDI, [xSP + xCB * 3] ; pCtx (*3 to skip the saved xDI, TR, LDTR)
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| 363 | %else
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| 364 | mov xDI, [xSP + xCB * 2] ; pCtx (*2 to skip the saved xDI, LDTR)
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| 365 | %endif
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| 366 |
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| 367 | mov qword [xDI + CPUMCTX.eax], rax
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| 368 | mov qword [xDI + CPUMCTX.ebx], rbx
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| 369 | mov qword [xDI + CPUMCTX.ecx], rcx
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| 370 | mov qword [xDI + CPUMCTX.edx], rdx
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| 371 | mov qword [xDI + CPUMCTX.esi], rsi
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| 372 | mov qword [xDI + CPUMCTX.ebp], rbp
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| 373 | mov qword [xDI + CPUMCTX.r8], r8
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| 374 | mov qword [xDI + CPUMCTX.r9], r9
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| 375 | mov qword [xDI + CPUMCTX.r10], r10
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| 376 | mov qword [xDI + CPUMCTX.r11], r11
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| 377 | mov qword [xDI + CPUMCTX.r12], r12
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| 378 | mov qword [xDI + CPUMCTX.r13], r13
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| 379 | mov qword [xDI + CPUMCTX.r14], r14
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| 380 | mov qword [xDI + CPUMCTX.r15], r15
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| 381 | mov rax, cr2
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| 382 | mov qword [xDI + CPUMCTX.cr2], rax
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| 383 |
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| 384 | pop xAX ; The guest rdi we pushed above
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| 385 | mov qword [xDI + CPUMCTX.edi], rax
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| 386 |
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| 387 | %ifndef VMX_SKIP_TR
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| 388 | ; Restore TSS selector; must mark it as not busy before using ltr (!)
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| 389 | ; ASSUME that this is supposed to be 'BUSY'. (saves 20-30 ticks on the T42p).
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| 390 | ; @todo get rid of sgdt
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| 391 | pop xBX ; Saved TR
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| 392 | sub xSP, xCB * 2
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| 393 | sgdt [xSP]
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|---|
| 394 | mov xAX, xBX
|
|---|
| 395 | and eax, X86_SEL_MASK_OFF_RPL ; Mask away TI and RPL bits leaving only the descriptor offset.
|
|---|
| 396 | add xAX, [xSP + 2] ; eax <- GDTR.address + descriptor offset.
|
|---|
| 397 | and dword [xAX + 4], ~RT_BIT(9) ; Clear the busy flag in TSS desc (bits 0-7=base, bit 9=busy bit).
|
|---|
| 398 | ltr bx
|
|---|
| 399 | add xSP, xCB * 2
|
|---|
| 400 | %endif
|
|---|
| 401 |
|
|---|
| 402 | pop xAX ; Saved LDTR
|
|---|
| 403 | cmp eax, 0
|
|---|
| 404 | je %%skip_ldt_write64
|
|---|
| 405 | lldt ax
|
|---|
| 406 |
|
|---|
| 407 | %%skip_ldt_write64:
|
|---|
| 408 | pop xSI ; pCtx (needed in rsi by the macros below)
|
|---|
| 409 |
|
|---|
| 410 | %ifdef VMX_USE_CACHED_VMCS_ACCESSES
|
|---|
| 411 | pop xDX ; Saved pCache
|
|---|
| 412 |
|
|---|
| 413 | ; Note! If we get here as a result of invalid VMCS pointer, all the following
|
|---|
| 414 | ; vmread's will fail (only eflags.cf=1 will be set) but that shouldn't cause any
|
|---|
| 415 | ; trouble only just less efficient.
|
|---|
| 416 | mov ecx, [xDX + VMCSCACHE.Read.cValidEntries]
|
|---|
| 417 | cmp ecx, 0 ; Can't happen
|
|---|
| 418 | je %%no_cached_read64
|
|---|
| 419 | jmp %%cached_read64
|
|---|
| 420 |
|
|---|
| 421 | ALIGN(16)
|
|---|
| 422 | %%cached_read64:
|
|---|
| 423 | dec xCX
|
|---|
| 424 | mov eax, [xDX + VMCSCACHE.Read.aField + xCX * 4]
|
|---|
| 425 | vmread [xDX + VMCSCACHE.Read.aFieldVal + xCX * 8], xAX
|
|---|
| 426 | cmp xCX, 0
|
|---|
| 427 | jnz %%cached_read64
|
|---|
| 428 | %%no_cached_read64:
|
|---|
| 429 | %endif
|
|---|
| 430 |
|
|---|
| 431 | ; Restore segment registers.
|
|---|
| 432 | MYPOPSEGS xAX, ax
|
|---|
| 433 |
|
|---|
| 434 | ; Restore the host XCR0 if necessary.
|
|---|
| 435 | pop xCX
|
|---|
| 436 | test ecx, ecx
|
|---|
| 437 | jnz %%xcr0_after_skip
|
|---|
| 438 | pop xAX
|
|---|
| 439 | pop xDX
|
|---|
| 440 | xsetbv ; ecx is already zero.
|
|---|
| 441 | %%xcr0_after_skip:
|
|---|
| 442 |
|
|---|
| 443 | ; Restore general purpose registers.
|
|---|
| 444 | MYPOPAD
|
|---|
| 445 | %endmacro
|
|---|
| 446 |
|
|---|
| 447 |
|
|---|
| 448 | ;;
|
|---|
| 449 | ; Prepares for and executes VMLAUNCH/VMRESUME (64 bits guest mode)
|
|---|
| 450 | ;
|
|---|
| 451 | ; @returns VBox status code
|
|---|
| 452 | ; @param fResume msc:rcx, gcc:rdi Whether to use vmlauch/vmresume.
|
|---|
| 453 | ; @param pCtx msc:rdx, gcc:rsi Pointer to the guest-CPU context.
|
|---|
| 454 | ; @param pCache msc:r8, gcc:rdx Pointer to the VMCS cache.
|
|---|
| 455 | ; @param pVM msc:r9, gcc:rcx Pointer to the cross context VM structure.
|
|---|
| 456 | ; @param pVCpu msc:[ebp+30], gcc:r8 Pointer to the cross context VMCPU structure.
|
|---|
| 457 | ;
|
|---|
| 458 | ALIGNCODE(16)
|
|---|
| 459 | BEGINPROC MY_NAME(VMXR0StartVM64)
|
|---|
| 460 | push xBP
|
|---|
| 461 | mov xBP, xSP
|
|---|
| 462 |
|
|---|
| 463 | pushf
|
|---|
| 464 | cli
|
|---|
| 465 |
|
|---|
| 466 | ; Save all general purpose host registers.
|
|---|
| 467 | MYPUSHAD
|
|---|
| 468 |
|
|---|
| 469 | ; First we have to save some final CPU context registers.
|
|---|
| 470 | lea r10, [.vmlaunch64_done wrt rip]
|
|---|
| 471 | mov rax, VMX_VMCS_HOST_RIP ; Return address (too difficult to continue after VMLAUNCH?).
|
|---|
| 472 | vmwrite rax, r10
|
|---|
| 473 | ; Note: assumes success!
|
|---|
| 474 |
|
|---|
| 475 | ;
|
|---|
| 476 | ; Unify the input parameter registers.
|
|---|
| 477 | ;
|
|---|
| 478 | %ifdef ASM_CALL64_GCC
|
|---|
| 479 | ; fResume already in rdi
|
|---|
| 480 | ; pCtx already in rsi
|
|---|
| 481 | mov rbx, rdx ; pCache
|
|---|
| 482 | %else
|
|---|
| 483 | mov rdi, rcx ; fResume
|
|---|
| 484 | mov rsi, rdx ; pCtx
|
|---|
| 485 | mov rbx, r8 ; pCache
|
|---|
| 486 | %endif
|
|---|
| 487 |
|
|---|
| 488 | ;
|
|---|
| 489 | ; Save the host XCR0 and load the guest one if necessary.
|
|---|
| 490 | ; Note! Trashes rdx and rcx.
|
|---|
| 491 | ;
|
|---|
| 492 | %ifdef ASM_CALL64_MSC
|
|---|
| 493 | mov rax, [xBP + 30h] ; pVCpu
|
|---|
| 494 | %else
|
|---|
| 495 | mov rax, r8 ; pVCpu
|
|---|
| 496 | %endif
|
|---|
| 497 | test byte [xAX + VMCPU.hm + HMCPU.fLoadSaveGuestXcr0], 1
|
|---|
| 498 | jz .xcr0_before_skip
|
|---|
| 499 |
|
|---|
| 500 | xor ecx, ecx
|
|---|
| 501 | xgetbv ; Save the host one on the stack.
|
|---|
| 502 | push xDX
|
|---|
| 503 | push xAX
|
|---|
| 504 |
|
|---|
| 505 | mov eax, [xSI + CPUMCTX.aXcr] ; Load the guest one.
|
|---|
| 506 | mov edx, [xSI + CPUMCTX.aXcr + 4]
|
|---|
| 507 | xor ecx, ecx ; paranoia
|
|---|
| 508 | xsetbv
|
|---|
| 509 |
|
|---|
| 510 | push 0 ; Indicate that we must restore XCR0 (popped into ecx, thus 0).
|
|---|
| 511 | jmp .xcr0_before_done
|
|---|
| 512 |
|
|---|
| 513 | .xcr0_before_skip:
|
|---|
| 514 | push 3fh ; indicate that we need not.
|
|---|
| 515 | .xcr0_before_done:
|
|---|
| 516 |
|
|---|
| 517 | ;
|
|---|
| 518 | ; Save segment registers.
|
|---|
| 519 | ; Note! Trashes rdx & rcx, so we moved it here (amd64 case).
|
|---|
| 520 | ;
|
|---|
| 521 | MYPUSHSEGS xAX, ax
|
|---|
| 522 |
|
|---|
| 523 | %ifdef VMX_USE_CACHED_VMCS_ACCESSES
|
|---|
| 524 | mov ecx, [xBX + VMCSCACHE.Write.cValidEntries]
|
|---|
| 525 | cmp ecx, 0
|
|---|
| 526 | je .no_cached_writes
|
|---|
| 527 | mov edx, ecx
|
|---|
| 528 | mov ecx, 0
|
|---|
| 529 | jmp .cached_write
|
|---|
| 530 |
|
|---|
| 531 | ALIGN(16)
|
|---|
| 532 | .cached_write:
|
|---|
| 533 | mov eax, [xBX + VMCSCACHE.Write.aField + xCX * 4]
|
|---|
| 534 | vmwrite xAX, [xBX + VMCSCACHE.Write.aFieldVal + xCX * 8]
|
|---|
| 535 | inc xCX
|
|---|
| 536 | cmp xCX, xDX
|
|---|
| 537 | jl .cached_write
|
|---|
| 538 |
|
|---|
| 539 | mov dword [xBX + VMCSCACHE.Write.cValidEntries], 0
|
|---|
| 540 | .no_cached_writes:
|
|---|
| 541 |
|
|---|
| 542 | ; Save the pCache pointer.
|
|---|
| 543 | push xBX
|
|---|
| 544 | %endif
|
|---|
| 545 |
|
|---|
| 546 | ; Save the pCtx pointer.
|
|---|
| 547 | push xSI
|
|---|
| 548 |
|
|---|
| 549 | ; Save host LDTR.
|
|---|
| 550 | xor eax, eax
|
|---|
| 551 | sldt ax
|
|---|
| 552 | push xAX
|
|---|
| 553 |
|
|---|
| 554 | %ifndef VMX_SKIP_TR
|
|---|
| 555 | ; The host TR limit is reset to 0x67; save & restore it manually.
|
|---|
| 556 | str eax
|
|---|
| 557 | push xAX
|
|---|
| 558 | %endif
|
|---|
| 559 |
|
|---|
| 560 | %ifndef VMX_SKIP_GDTR
|
|---|
| 561 | ; VT-x only saves the base of the GDTR & IDTR and resets the limit to 0xffff; we must restore the limit correctly!
|
|---|
| 562 | sub xSP, xCB * 2
|
|---|
| 563 | sgdt [xSP]
|
|---|
| 564 | %endif
|
|---|
| 565 | %ifndef VMX_SKIP_IDTR
|
|---|
| 566 | sub xSP, xCB * 2
|
|---|
| 567 | sidt [xSP]
|
|---|
| 568 | %endif
|
|---|
| 569 |
|
|---|
| 570 | ; Load CR2 if necessary (may be expensive as writing CR2 is a synchronizing instruction).
|
|---|
| 571 | mov rbx, qword [xSI + CPUMCTX.cr2]
|
|---|
| 572 | mov rdx, cr2
|
|---|
| 573 | cmp rbx, rdx
|
|---|
| 574 | je .skip_cr2_write
|
|---|
| 575 | mov cr2, rbx
|
|---|
| 576 |
|
|---|
| 577 | .skip_cr2_write:
|
|---|
| 578 | mov eax, VMX_VMCS_HOST_RSP
|
|---|
| 579 | vmwrite xAX, xSP
|
|---|
| 580 | ; Note: assumes success!
|
|---|
| 581 | ; Don't mess with ESP anymore!!!
|
|---|
| 582 |
|
|---|
| 583 | ; Load guest general purpose registers.
|
|---|
| 584 | mov rax, qword [xSI + CPUMCTX.eax]
|
|---|
| 585 | mov rbx, qword [xSI + CPUMCTX.ebx]
|
|---|
| 586 | mov rcx, qword [xSI + CPUMCTX.ecx]
|
|---|
| 587 | mov rdx, qword [xSI + CPUMCTX.edx]
|
|---|
| 588 | mov rbp, qword [xSI + CPUMCTX.ebp]
|
|---|
| 589 | mov r8, qword [xSI + CPUMCTX.r8]
|
|---|
| 590 | mov r9, qword [xSI + CPUMCTX.r9]
|
|---|
| 591 | mov r10, qword [xSI + CPUMCTX.r10]
|
|---|
| 592 | mov r11, qword [xSI + CPUMCTX.r11]
|
|---|
| 593 | mov r12, qword [xSI + CPUMCTX.r12]
|
|---|
| 594 | mov r13, qword [xSI + CPUMCTX.r13]
|
|---|
| 595 | mov r14, qword [xSI + CPUMCTX.r14]
|
|---|
| 596 | mov r15, qword [xSI + CPUMCTX.r15]
|
|---|
| 597 |
|
|---|
| 598 | ; Resume or start VM?
|
|---|
| 599 | cmp xDI, 0 ; fResume
|
|---|
| 600 | je .vmlaunch64_launch
|
|---|
| 601 |
|
|---|
| 602 | ; Load guest rdi & rsi.
|
|---|
| 603 | mov rdi, qword [xSI + CPUMCTX.edi]
|
|---|
| 604 | mov rsi, qword [xSI + CPUMCTX.esi]
|
|---|
| 605 |
|
|---|
| 606 | vmresume
|
|---|
| 607 | jmp .vmlaunch64_done; ; Here if vmresume detected a failure.
|
|---|
| 608 |
|
|---|
| 609 | .vmlaunch64_launch:
|
|---|
| 610 | ; Save guest rdi & rsi.
|
|---|
| 611 | mov rdi, qword [xSI + CPUMCTX.edi]
|
|---|
| 612 | mov rsi, qword [xSI + CPUMCTX.esi]
|
|---|
| 613 |
|
|---|
| 614 | vmlaunch
|
|---|
| 615 | jmp .vmlaunch64_done; ; Here if vmlaunch detected a failure.
|
|---|
| 616 |
|
|---|
| 617 | ALIGNCODE(16)
|
|---|
| 618 | .vmlaunch64_done:
|
|---|
| 619 | jc near .vmxstart64_invalid_vmcs_ptr
|
|---|
| 620 | jz near .vmxstart64_start_failed
|
|---|
| 621 |
|
|---|
| 622 | RESTORE_STATE_VM64
|
|---|
| 623 | mov eax, VINF_SUCCESS
|
|---|
| 624 |
|
|---|
| 625 | .vmstart64_end:
|
|---|
| 626 | popf
|
|---|
| 627 | pop xBP
|
|---|
| 628 | ret
|
|---|
| 629 |
|
|---|
| 630 | .vmxstart64_invalid_vmcs_ptr:
|
|---|
| 631 | RESTORE_STATE_VM64
|
|---|
| 632 | mov eax, VERR_VMX_INVALID_VMCS_PTR_TO_START_VM
|
|---|
| 633 | jmp .vmstart64_end
|
|---|
| 634 |
|
|---|
| 635 | .vmxstart64_start_failed:
|
|---|
| 636 | RESTORE_STATE_VM64
|
|---|
| 637 | mov eax, VERR_VMX_UNABLE_TO_START_VM
|
|---|
| 638 | jmp .vmstart64_end
|
|---|
| 639 | ENDPROC MY_NAME(VMXR0StartVM64)
|
|---|
| 640 | %endif ; RT_ARCH_AMD64
|
|---|
| 641 |
|
|---|
| 642 |
|
|---|
| 643 | ;;
|
|---|
| 644 | ; Prepares for and executes VMRUN (32 bits guests)
|
|---|
| 645 | ;
|
|---|
| 646 | ; @returns VBox status code
|
|---|
| 647 | ; @param HCPhysVMCB Physical address of host VMCB.
|
|---|
| 648 | ; @param HCPhysVMCB Physical address of guest VMCB.
|
|---|
| 649 | ; @param pCtx Pointer to the guest CPU-context.
|
|---|
| 650 | ; @param pVM msc:r9, gcc:rcx Pointer to the cross context VM structure.
|
|---|
| 651 | ; @param pVCpu msc:[rsp+28],gcc:r8 Pointer to the cross context VMCPU structure.
|
|---|
| 652 | ;
|
|---|
| 653 | ALIGNCODE(16)
|
|---|
| 654 | BEGINPROC MY_NAME(SVMR0VMRun)
|
|---|
| 655 | %ifdef RT_ARCH_AMD64 ; fake a cdecl stack frame
|
|---|
| 656 | %ifdef ASM_CALL64_GCC
|
|---|
| 657 | push r8
|
|---|
| 658 | push rcx
|
|---|
| 659 | push rdx
|
|---|
| 660 | push rsi
|
|---|
| 661 | push rdi
|
|---|
| 662 | %else
|
|---|
| 663 | mov rax, [rsp + 28h]
|
|---|
| 664 | push rax ; pVCpu
|
|---|
| 665 | push r9 ; pVM
|
|---|
| 666 | push r8 ; pCtx
|
|---|
| 667 | push rdx ; HCPHYSGuestVMCB
|
|---|
| 668 | push rcx ; HCPhysHostVMCB
|
|---|
| 669 | %endif
|
|---|
| 670 | push 0
|
|---|
| 671 | %endif
|
|---|
| 672 | push xBP
|
|---|
| 673 | mov xBP, xSP
|
|---|
| 674 | pushf
|
|---|
| 675 |
|
|---|
| 676 | ;
|
|---|
| 677 | ; Save all general purpose host registers.
|
|---|
| 678 | ;
|
|---|
| 679 | MYPUSHAD
|
|---|
| 680 |
|
|---|
| 681 | ;
|
|---|
| 682 | ; Load pCtx into xSI.
|
|---|
| 683 | ;
|
|---|
| 684 | mov xSI, [xBP + xCB * 2 + RTHCPHYS_CB * 2] ; pCtx
|
|---|
| 685 |
|
|---|
| 686 | ;
|
|---|
| 687 | ; Save the host XCR0 and load the guest one if necessary.
|
|---|
| 688 | ;
|
|---|
| 689 | mov xAX, [xBP + xCB * 2 + RTHCPHYS_CB * 2 + xCB * 2] ; pVCpu
|
|---|
| 690 | test byte [xAX + VMCPU.hm + HMCPU.fLoadSaveGuestXcr0], 1
|
|---|
| 691 | jz .xcr0_before_skip
|
|---|
| 692 |
|
|---|
| 693 | xor ecx, ecx
|
|---|
| 694 | xgetbv ; Save the host one on the stack.
|
|---|
| 695 | push xDX
|
|---|
| 696 | push xAX
|
|---|
| 697 |
|
|---|
| 698 | mov xSI, [xBP + xCB * 2 + RTHCPHYS_CB * 2] ; pCtx
|
|---|
| 699 | mov eax, [xSI + CPUMCTX.aXcr] ; Load the guest one.
|
|---|
| 700 | mov edx, [xSI + CPUMCTX.aXcr + 4]
|
|---|
| 701 | xor ecx, ecx ; paranoia
|
|---|
| 702 | xsetbv
|
|---|
| 703 |
|
|---|
| 704 | push 0 ; Indicate that we must restore XCR0 (popped into ecx, thus 0).
|
|---|
| 705 | jmp .xcr0_before_done
|
|---|
| 706 |
|
|---|
| 707 | .xcr0_before_skip:
|
|---|
| 708 | push 3fh ; indicate that we need not.
|
|---|
| 709 | .xcr0_before_done:
|
|---|
| 710 |
|
|---|
| 711 | ;
|
|---|
| 712 | ; Save guest CPU-context pointer for simplifying saving of the GPRs afterwards.
|
|---|
| 713 | ;
|
|---|
| 714 | push xSI
|
|---|
| 715 |
|
|---|
| 716 | ; Save host fs, gs, sysenter msr etc.
|
|---|
| 717 | mov xAX, [xBP + xCB * 2] ; pVMCBHostPhys (64 bits physical address; x86: take low dword only)
|
|---|
| 718 | push xAX ; save for the vmload after vmrun
|
|---|
| 719 | vmsave
|
|---|
| 720 |
|
|---|
| 721 | ; Setup eax for VMLOAD.
|
|---|
| 722 | mov xAX, [xBP + xCB * 2 + RTHCPHYS_CB] ; pVMCBPhys (64 bits physical address; take low dword only)
|
|---|
| 723 |
|
|---|
| 724 | ; Load guest general purpose registers.
|
|---|
| 725 | ; eax is loaded from the VMCB by VMRUN.
|
|---|
| 726 | mov ebx, [xSI + CPUMCTX.ebx]
|
|---|
| 727 | mov ecx, [xSI + CPUMCTX.ecx]
|
|---|
| 728 | mov edx, [xSI + CPUMCTX.edx]
|
|---|
| 729 | mov edi, [xSI + CPUMCTX.edi]
|
|---|
| 730 | mov ebp, [xSI + CPUMCTX.ebp]
|
|---|
| 731 | mov esi, [xSI + CPUMCTX.esi]
|
|---|
| 732 |
|
|---|
| 733 | ; Clear the global interrupt flag & execute sti to make sure external interrupts cause a world switch.
|
|---|
| 734 | clgi
|
|---|
| 735 | sti
|
|---|
| 736 |
|
|---|
| 737 | ; Load guest fs, gs, sysenter msr etc.
|
|---|
| 738 | vmload
|
|---|
| 739 | ; Run the VM.
|
|---|
| 740 | vmrun
|
|---|
| 741 |
|
|---|
| 742 | ; eax is in the VMCB already; we can use it here.
|
|---|
| 743 |
|
|---|
| 744 | ; Save guest fs, gs, sysenter msr etc.
|
|---|
| 745 | vmsave
|
|---|
| 746 |
|
|---|
| 747 | ; Load host fs, gs, sysenter msr etc.
|
|---|
| 748 | pop xAX ; Pushed above
|
|---|
| 749 | vmload
|
|---|
| 750 |
|
|---|
| 751 | ; Set the global interrupt flag again, but execute cli to make sure IF=0.
|
|---|
| 752 | cli
|
|---|
| 753 | stgi
|
|---|
| 754 |
|
|---|
| 755 | ;
|
|---|
| 756 | ; Pop the context pointer (pushed above) and save the guest GPRs (sans RSP and RAX).
|
|---|
| 757 | ;
|
|---|
| 758 | pop xAX
|
|---|
| 759 |
|
|---|
| 760 | mov [ss:xAX + CPUMCTX.ebx], ebx
|
|---|
| 761 | mov [ss:xAX + CPUMCTX.ecx], ecx
|
|---|
| 762 | mov [ss:xAX + CPUMCTX.edx], edx
|
|---|
| 763 | mov [ss:xAX + CPUMCTX.esi], esi
|
|---|
| 764 | mov [ss:xAX + CPUMCTX.edi], edi
|
|---|
| 765 | mov [ss:xAX + CPUMCTX.ebp], ebp
|
|---|
| 766 |
|
|---|
| 767 | ;
|
|---|
| 768 | ; Restore the host xcr0 if necessary.
|
|---|
| 769 | ;
|
|---|
| 770 | pop xCX
|
|---|
| 771 | test ecx, ecx
|
|---|
| 772 | jnz .xcr0_after_skip
|
|---|
| 773 | pop xAX
|
|---|
| 774 | pop xDX
|
|---|
| 775 | xsetbv ; ecx is already zero.
|
|---|
| 776 | .xcr0_after_skip:
|
|---|
| 777 |
|
|---|
| 778 | ;
|
|---|
| 779 | ; Restore host general purpose registers.
|
|---|
| 780 | ;
|
|---|
| 781 | MYPOPAD
|
|---|
| 782 |
|
|---|
| 783 | mov eax, VINF_SUCCESS
|
|---|
| 784 |
|
|---|
| 785 | popf
|
|---|
| 786 | pop xBP
|
|---|
| 787 | %ifdef RT_ARCH_AMD64
|
|---|
| 788 | add xSP, 6*xCB
|
|---|
| 789 | %endif
|
|---|
| 790 | ret
|
|---|
| 791 | ENDPROC MY_NAME(SVMR0VMRun)
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| 792 |
|
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| 793 | %ifdef RT_ARCH_AMD64
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| 794 | ;;
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| 795 | ; Prepares for and executes VMRUN (64 bits guests)
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| 796 | ;
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| 797 | ; @returns VBox status code
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| 798 | ; @param HCPhysVMCB Physical address of host VMCB.
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| 799 | ; @param HCPhysVMCB Physical address of guest VMCB.
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| 800 | ; @param pCtx Pointer to the guest-CPU context.
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| 801 | ; @param pVM msc:r9, gcc:rcx Pointer to the cross context VM structure.
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| 802 | ; @param pVCpu msc:[rsp+28],gcc:r8 Pointer to the cross context VMCPU structure.
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| 803 | ;
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| 804 | ALIGNCODE(16)
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| 805 | BEGINPROC MY_NAME(SVMR0VMRun64)
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| 806 | ; Fake a cdecl stack frame
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| 807 | %ifdef ASM_CALL64_GCC
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| 808 | push r8
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| 809 | push rcx
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| 810 | push rdx
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| 811 | push rsi
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| 812 | push rdi
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| 813 | %else
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| 814 | mov rax, [rsp + 28h]
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| 815 | push rax ; rbp + 30h pVCpu
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| 816 | push r9 ; rbp + 28h pVM
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| 817 | push r8 ; rbp + 20h pCtx
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| 818 | push rdx ; rbp + 18h HCPHYSGuestVMCB
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| 819 | push rcx ; rbp + 10h HCPhysHostVMCB
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| 820 | %endif
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| 821 | push 0 ; rbp + 08h "fake ret addr"
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| 822 | push rbp ; rbp + 00h
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| 823 | mov rbp, rsp
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| 824 | pushf
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| 825 |
|
|---|
| 826 | ; Manual save and restore:
|
|---|
| 827 | ; - General purpose registers except RIP, RSP, RAX
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| 828 | ;
|
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| 829 | ; Trashed:
|
|---|
| 830 | ; - CR2 (we don't care)
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| 831 | ; - LDTR (reset to 0)
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| 832 | ; - DRx (presumably not changed at all)
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| 833 | ; - DR7 (reset to 0x400)
|
|---|
| 834 | ;
|
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| 835 |
|
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| 836 | ;
|
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| 837 | ; Save all general purpose host registers.
|
|---|
| 838 | ;
|
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| 839 | MYPUSHAD
|
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| 840 |
|
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| 841 | ;
|
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| 842 | ; Load pCtx into xSI.
|
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| 843 | ;
|
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| 844 | mov xSI, [rbp + xCB * 2 + RTHCPHYS_CB * 2]
|
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| 845 |
|
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| 846 | ;
|
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| 847 | ; Save the host XCR0 and load the guest one if necessary.
|
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| 848 | ;
|
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| 849 | mov rax, [xBP + 30h] ; pVCpu
|
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| 850 | test byte [xAX + VMCPU.hm + HMCPU.fLoadSaveGuestXcr0], 1
|
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| 851 | jz .xcr0_before_skip
|
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| 852 |
|
|---|
| 853 | xor ecx, ecx
|
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| 854 | xgetbv ; Save the host one on the stack.
|
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| 855 | push xDX
|
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| 856 | push xAX
|
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| 857 |
|
|---|
| 858 | mov xSI, [xBP + xCB * 2 + RTHCPHYS_CB * 2] ; pCtx
|
|---|
| 859 | mov eax, [xSI + CPUMCTX.aXcr] ; Load the guest one.
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| 860 | mov edx, [xSI + CPUMCTX.aXcr + 4]
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|---|
| 861 | xor ecx, ecx ; paranoia
|
|---|
| 862 | xsetbv
|
|---|
| 863 |
|
|---|
| 864 | push 0 ; Indicate that we must restore XCR0 (popped into ecx, thus 0).
|
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| 865 | jmp .xcr0_before_done
|
|---|
| 866 |
|
|---|
| 867 | .xcr0_before_skip:
|
|---|
| 868 | push 3fh ; indicate that we need not.
|
|---|
| 869 | .xcr0_before_done:
|
|---|
| 870 |
|
|---|
| 871 | ;
|
|---|
| 872 | ; Save guest CPU-context pointer for simplifying saving of the GPRs afterwards.
|
|---|
| 873 | ;
|
|---|
| 874 | push rsi
|
|---|
| 875 |
|
|---|
| 876 | ;
|
|---|
| 877 | ; Save host fs, gs, sysenter msr etc.
|
|---|
| 878 | ;
|
|---|
| 879 | mov rax, [rbp + xCB * 2] ; pVMCBHostPhys (64 bits physical address; x86: take low dword only)
|
|---|
| 880 | push rax ; Save for the vmload after vmrun
|
|---|
| 881 | vmsave
|
|---|
| 882 |
|
|---|
| 883 | ; Setup eax for VMLOAD.
|
|---|
| 884 | mov rax, [rbp + xCB * 2 + RTHCPHYS_CB] ; pVMCBPhys (64 bits physical address; take low dword only)
|
|---|
| 885 |
|
|---|
| 886 | ; Load guest general purpose registers.
|
|---|
| 887 | ; rax is loaded from the VMCB by VMRUN.
|
|---|
| 888 | mov rbx, qword [xSI + CPUMCTX.ebx]
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|---|
| 889 | mov rcx, qword [xSI + CPUMCTX.ecx]
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|---|
| 890 | mov rdx, qword [xSI + CPUMCTX.edx]
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|---|
| 891 | mov rdi, qword [xSI + CPUMCTX.edi]
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|---|
| 892 | mov rbp, qword [xSI + CPUMCTX.ebp]
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| 893 | mov r8, qword [xSI + CPUMCTX.r8]
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|---|
| 894 | mov r9, qword [xSI + CPUMCTX.r9]
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|---|
| 895 | mov r10, qword [xSI + CPUMCTX.r10]
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|---|
| 896 | mov r11, qword [xSI + CPUMCTX.r11]
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| 897 | mov r12, qword [xSI + CPUMCTX.r12]
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|---|
| 898 | mov r13, qword [xSI + CPUMCTX.r13]
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|---|
| 899 | mov r14, qword [xSI + CPUMCTX.r14]
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|---|
| 900 | mov r15, qword [xSI + CPUMCTX.r15]
|
|---|
| 901 | mov rsi, qword [xSI + CPUMCTX.esi]
|
|---|
| 902 |
|
|---|
| 903 | ; Clear the global interrupt flag & execute sti to make sure external interrupts cause a world switch.
|
|---|
| 904 | clgi
|
|---|
| 905 | sti
|
|---|
| 906 |
|
|---|
| 907 | ; Load guest fs, gs, sysenter msr etc.
|
|---|
| 908 | vmload
|
|---|
| 909 | ; Run the VM.
|
|---|
| 910 | vmrun
|
|---|
| 911 |
|
|---|
| 912 | ; rax is in the VMCB already; we can use it here.
|
|---|
| 913 |
|
|---|
| 914 | ; Save guest fs, gs, sysenter msr etc.
|
|---|
| 915 | vmsave
|
|---|
| 916 |
|
|---|
| 917 | ;
|
|---|
| 918 | ; Load host fs, gs, sysenter msr etc.
|
|---|
| 919 | ;
|
|---|
| 920 | pop rax ; pushed above
|
|---|
| 921 | vmload
|
|---|
| 922 |
|
|---|
| 923 | ;
|
|---|
| 924 | ; Set the global interrupt flag again, but execute cli to make sure IF=0.
|
|---|
| 925 | ;
|
|---|
| 926 | cli
|
|---|
| 927 | stgi
|
|---|
| 928 |
|
|---|
| 929 | ;
|
|---|
| 930 | ; Pop the context pointer (pushed above) and save the guest GPRs (sans RSP and RAX).
|
|---|
| 931 | ;
|
|---|
| 932 | pop rax
|
|---|
| 933 |
|
|---|
| 934 | mov qword [rax + CPUMCTX.ebx], rbx
|
|---|
| 935 | mov qword [rax + CPUMCTX.ecx], rcx
|
|---|
| 936 | mov qword [rax + CPUMCTX.edx], rdx
|
|---|
| 937 | mov qword [rax + CPUMCTX.esi], rsi
|
|---|
| 938 | mov qword [rax + CPUMCTX.edi], rdi
|
|---|
| 939 | mov qword [rax + CPUMCTX.ebp], rbp
|
|---|
| 940 | mov qword [rax + CPUMCTX.r8], r8
|
|---|
| 941 | mov qword [rax + CPUMCTX.r9], r9
|
|---|
| 942 | mov qword [rax + CPUMCTX.r10], r10
|
|---|
| 943 | mov qword [rax + CPUMCTX.r11], r11
|
|---|
| 944 | mov qword [rax + CPUMCTX.r12], r12
|
|---|
| 945 | mov qword [rax + CPUMCTX.r13], r13
|
|---|
| 946 | mov qword [rax + CPUMCTX.r14], r14
|
|---|
| 947 | mov qword [rax + CPUMCTX.r15], r15
|
|---|
| 948 |
|
|---|
| 949 | ;
|
|---|
| 950 | ; Restore the host xcr0 if necessary.
|
|---|
| 951 | ;
|
|---|
| 952 | pop xCX
|
|---|
| 953 | test ecx, ecx
|
|---|
| 954 | jnz .xcr0_after_skip
|
|---|
| 955 | pop xAX
|
|---|
| 956 | pop xDX
|
|---|
| 957 | xsetbv ; ecx is already zero.
|
|---|
| 958 | .xcr0_after_skip:
|
|---|
| 959 |
|
|---|
| 960 | ;
|
|---|
| 961 | ; Restore host general purpose registers.
|
|---|
| 962 | ;
|
|---|
| 963 | MYPOPAD
|
|---|
| 964 |
|
|---|
| 965 | mov eax, VINF_SUCCESS
|
|---|
| 966 |
|
|---|
| 967 | popf
|
|---|
| 968 | pop rbp
|
|---|
| 969 | add rsp, 6 * xCB
|
|---|
| 970 | ret
|
|---|
| 971 | ENDPROC MY_NAME(SVMR0VMRun64)
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|---|
| 972 | %endif ; RT_ARCH_AMD64
|
|---|
| 973 |
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