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source: vbox/trunk/src/VBox/VMM/VMMR0/NEMR0Native-stubs.cpp@ 94800

Last change on this file since 94800 was 93115, checked in by vboxsync, 3 years ago

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1/* $Id: NEMR0Native-stubs.cpp 93115 2022-01-01 11:31:46Z vboxsync $ */
2/** @file
3 * NEM - Native execution manager, ring-0 stubs until there is a driverless mode.
4 */
5
6/*
7 * Copyright (C) 2021-2022 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_NEM
23#include <VBox/vmm/nem.h>
24#include "NEMInternal.h"
25#include <VBox/vmm/gvm.h>
26#include <VBox/vmm/vmcc.h>
27#include <VBox/vmm/gvmm.h>
28
29#include <iprt/errcore.h>
30
31
32/*********************************************************************************************************************************
33* Internal Functions *
34*********************************************************************************************************************************/
35
36
37/*********************************************************************************************************************************
38* Global Variables *
39*********************************************************************************************************************************/
40
41
42/*********************************************************************************************************************************
43* Internal Functions *
44*********************************************************************************************************************************/
45
46
47/**
48 * Module initialization for NEM.
49 */
50VMMR0_INT_DECL(int) NEMR0Init(void)
51{
52 return VINF_SUCCESS;
53}
54
55
56/**
57 * Module termination for NEM.
58 */
59VMMR0_INT_DECL(void) NEMR0Term(void)
60{
61}
62
63
64VMMR0_INT_DECL(int) NEMR0InitVM(PGVM pGVM)
65{
66 RT_NOREF(pGVM);
67 return VINF_SUCCESS;
68}
69
70
71VMMR0_INT_DECL(int) NEMR0InitVMPart2(PGVM pGVM)
72{
73 RT_NOREF(pGVM);
74 return VINF_SUCCESS;
75}
76
77
78VMMR0_INT_DECL(void) NEMR0CleanupVM(PGVM pGVM)
79{
80 RT_NOREF(pGVM);
81}
82
83
84VMMR0_INT_DECL(int) NEMR0MapPages(PGVM pGVM, VMCPUID idCpu)
85{
86 RT_NOREF(pGVM, idCpu);
87 AssertFailed();
88 return VERR_NOT_SUPPORTED;
89}
90
91
92VMMR0_INT_DECL(int) NEMR0UnmapPages(PGVM pGVM, VMCPUID idCpu)
93{
94 RT_NOREF(pGVM, idCpu);
95 AssertFailed();
96 return VERR_NOT_SUPPORTED;
97}
98
99
100VMMR0_INT_DECL(int) NEMR0ExportState(PGVM pGVM, VMCPUID idCpu)
101{
102 RT_NOREF(pGVM, idCpu);
103 AssertFailed();
104 return VERR_NOT_IMPLEMENTED;
105}
106
107
108VMMR0_INT_DECL(int) NEMR0ImportState(PGVM pGVM, VMCPUID idCpu, uint64_t fWhat)
109{
110 RT_NOREF(pGVM, idCpu, fWhat);
111 AssertFailed();
112 return VERR_NOT_IMPLEMENTED;
113}
114
115
116VMMR0_INT_DECL(int) NEMR0QueryCpuTick(PGVM pGVM, VMCPUID idCpu)
117{
118 RT_NOREF(pGVM, idCpu);
119 AssertFailed();
120 return VERR_NOT_IMPLEMENTED;
121}
122
123
124VMMR0_INT_DECL(int) NEMR0ResumeCpuTickOnAll(PGVM pGVM, VMCPUID idCpu, uint64_t uPausedTscValue)
125{
126 RT_NOREF(pGVM, idCpu, uPausedTscValue);
127 AssertFailed();
128 return VERR_NOT_IMPLEMENTED;
129}
130
131
132VMMR0_INT_DECL(VBOXSTRICTRC) NEMR0RunGuestCode(PGVM pGVM, VMCPUID idCpu)
133{
134 RT_NOREF(pGVM, idCpu);
135 AssertFailed();
136 return VERR_NOT_IMPLEMENTED;
137}
138
139
140VMMR0_INT_DECL(int) NEMR0UpdateStatistics(PGVM pGVM, VMCPUID idCpu)
141{
142 RT_NOREF(pGVM, idCpu);
143 AssertFailed();
144 return VINF_SUCCESS;
145}
146
147
148VMMR0_INT_DECL(int) NEMR0DoExperiment(PGVM pGVM, VMCPUID idCpu, uint64_t u64Arg)
149{
150 RT_NOREF(pGVM, idCpu, u64Arg);
151 AssertFailed();
152 return VERR_NOT_SUPPORTED;
153}
154
155
156void nemHCNativeNotifyHandlerPhysicalRegister(PVMCC pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb)
157{
158 Log5(("nemHCNativeNotifyHandlerPhysicalRegister: %RGp LB %RGp enmKind=%d\n", GCPhys, cb, enmKind));
159 AssertFailed();
160 NOREF(pVM); NOREF(enmKind); NOREF(GCPhys); NOREF(cb);
161}
162
163
164void nemHCNativeNotifyHandlerPhysicalModify(PVMCC pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhysOld,
165 RTGCPHYS GCPhysNew, RTGCPHYS cb, bool fRestoreAsRAM)
166{
167 Log5(("nemHCNativeNotifyHandlerPhysicalModify: %RGp LB %RGp -> %RGp enmKind=%d fRestoreAsRAM=%d\n",
168 GCPhysOld, cb, GCPhysNew, enmKind, fRestoreAsRAM));
169 AssertFailed();
170 NOREF(pVM); NOREF(enmKind); NOREF(GCPhysOld); NOREF(GCPhysNew); NOREF(cb); NOREF(fRestoreAsRAM);
171}
172
173
174int nemHCNativeNotifyPhysPageAllocated(PVMCC pVM, RTGCPHYS GCPhys, RTHCPHYS HCPhys, uint32_t fPageProt,
175 PGMPAGETYPE enmType, uint8_t *pu2State)
176{
177 Log5(("nemHCNativeNotifyPhysPageAllocated: %RGp HCPhys=%RHp fPageProt=%#x enmType=%d *pu2State=%d\n",
178 GCPhys, HCPhys, fPageProt, enmType, *pu2State));
179 AssertFailed();
180 RT_NOREF(pVM, GCPhys, HCPhys, fPageProt, enmType, pu2State);
181 return VERR_NOT_SUPPORTED;
182}
183
184
185void nemHCNativeNotifyPhysPageProtChanged(PVMCC pVM, RTGCPHYS GCPhys, RTHCPHYS HCPhys, uint32_t fPageProt,
186 PGMPAGETYPE enmType, uint8_t *pu2State)
187{
188 Log5(("nemHCNativeNotifyPhysPageProtChanged: %RGp HCPhys=%RHp fPageProt=%#x enmType=%d *pu2State=%d\n",
189 GCPhys, HCPhys, fPageProt, enmType, *pu2State));
190 AssertFailed();
191 RT_NOREF(pVM, GCPhys, HCPhys, fPageProt, enmType, pu2State);
192}
193
194
195void nemHCNativeNotifyPhysPageChanged(PVMCC pVM, RTGCPHYS GCPhys, RTHCPHYS HCPhysPrev, RTHCPHYS HCPhysNew,
196 uint32_t fPageProt, PGMPAGETYPE enmType, uint8_t *pu2State)
197{
198 Log5(("nemHCNativeNotifyPhysPageChanged: %RGp HCPhys=%RHp->%RHp fPageProt=%#x enmType=%d *pu2State=%d\n",
199 GCPhys, HCPhysPrev, HCPhysNew, fPageProt, enmType, *pu2State));
200 AssertFailed();
201 RT_NOREF(pVM, GCPhys, HCPhysPrev, HCPhysNew, fPageProt, enmType, pu2State);
202}
203
204
205VMM_INT_DECL(int) NEMHCQueryCpuTick(PVMCPUCC pVCpu, uint64_t *pcTicks, uint32_t *puAux)
206{
207 LogFlowFunc(("pVCpu=%p pcTicks=%RX64 puAux=%RX32\n", pVCpu, pcTicks, puAux));
208 AssertFailed();
209 RT_NOREF(pVCpu, pcTicks, puAux);
210 return VERR_NOT_SUPPORTED;
211}
212
213
214VMM_INT_DECL(int) NEMHCResumeCpuTickOnAll(PVMCC pVM, PVMCPUCC pVCpu, uint64_t uPausedTscValue)
215{
216 LogFlowFunc(("pVM=%p pVCpu=%p uPausedTscValue=%RX64\n", pVM, pVCpu, uPausedTscValue));
217 AssertFailed();
218 RT_NOREF(pVM, pVCpu, uPausedTscValue);
219 return VERR_NOT_SUPPORTED;
220}
221
222
223VMM_INT_DECL(void) NEMHCNotifyHandlerPhysicalDeregister(PVMCC pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb,
224 RTR3PTR pvMemR3, uint8_t *pu2State)
225{
226 Log5(("NEMHCNotifyHandlerPhysicalDeregister: %RGp LB %RGp enmKind=%d pvMemR3=%p pu2State=%p (%d)\n",
227 GCPhys, cb, enmKind, pvMemR3, pu2State, *pu2State));
228 AssertFailed();
229 RT_NOREF(pVM, enmKind, GCPhys, cb, pvMemR3, pu2State);
230}
231
232
233VMM_INT_DECL(void) NEMHCNotifyPhysPageChanged(PVMCC pVM, RTGCPHYS GCPhys, RTHCPHYS HCPhysPrev, RTHCPHYS HCPhysNew,
234 RTR3PTR pvNewR3, uint32_t fPageProt, PGMPAGETYPE enmType, uint8_t *pu2State)
235{
236 Log5(("NEMHCNotifyPhysPageChanged: %RGp HCPhys=%RHp->%RHp fPageProt=%#x enmType=%d *pu2State=%d\n",
237 GCPhys, HCPhysPrev, HCPhysNew, fPageProt, enmType, *pu2State));
238 AssertFailed();
239 RT_NOREF(pVM, GCPhys, HCPhysPrev, HCPhysNew, pvNewR3, fPageProt, enmType, pu2State);
240}
241
242
243VMM_INT_DECL(void) NEMHCNotifyPhysPageProtChanged(PVMCC pVM, RTGCPHYS GCPhys, RTHCPHYS HCPhys, RTR3PTR pvR3, uint32_t fPageProt,
244 PGMPAGETYPE enmType, uint8_t *pu2State)
245{
246 Log5(("NEMHCNotifyPhysPageProtChanged: %RGp HCPhys=%RHp fPageProt=%#x enmType=%d *pu2State=%d\n",
247 GCPhys, HCPhys, fPageProt, enmType, *pu2State));
248 AssertFailed();
249 RT_NOREF(pVM, GCPhys, HCPhys, pvR3, fPageProt, enmType, pu2State);
250}
251
252
253VMM_INT_DECL(int) NEMImportStateOnDemand(PVMCPUCC pVCpu, uint64_t fWhat)
254{
255 AssertFailed();
256 RT_NOREF(pVCpu, fWhat);
257 return VERR_NOT_IMPLEMENTED;
258}
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