PDMR0Device.cpp@ 8973

Last change on this file since 8973 was 8155, checked in by vboxsync, 17 years ago
The Big Sun Rebranding Header Change
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1	/* $Id: PDMR0Device.cpp 8155 2008-04-18 15:16:47Z vboxsync $ */
2	/** @file
3	* PDM - Pluggable Device and Driver Manager, R0 Device parts.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22
23	/*******************************************************************************
24	* Header Files *
25	*******************************************************************************/
26	#define LOG_GROUP LOG_GROUP_PDM_DEVICE
27	#include "PDMInternal.h"
28	#include <VBox/pdm.h>
29	#include <VBox/pgm.h>
30	#include <VBox/mm.h>
31	#include <VBox/vm.h>
32	#include <VBox/patm.h>
33
34	#include <VBox/log.h>
35	#include <VBox/err.h>
36	#include <iprt/asm.h>
37	#include <iprt/assert.h>
38	#include <iprt/string.h>
39
40
41	/*******************************************************************************
42	* Defined Constants And Macros *
43	*******************************************************************************/
44	/** @def PDMDEV_ASSERT_DEVINS
45	* Asserts the validity of the driver instance.
46	*/
47	#ifdef VBOX_STRICT
48	# define PDMDEV_ASSERT_DEVINS(pDevIns) do { Assert(VALID_PTR(pDevIns)); \
49	Assert(pDevIns->u32Version == PDM_DEVINS_VERSION); \
50	Assert(pDevIns->pvInstanceDataR0 == (void *)&pDevIns->achInstanceData[0]); \
51	} while (0)
52	#else
53	# define PDMDEV_ASSERT_DEVINS(pDevIns) do { } while (0)
54	#endif
55
56
57	/*******************************************************************************
58	* Global Variables *
59	*******************************************************************************/
60	__BEGIN_DECLS
61	extern DECLEXPORT(const PDMDEVHLPR0) g_pdmR0DevHlp;
62	extern DECLEXPORT(const PDMPICHLPR0) g_pdmR0PicHlp;
63	extern DECLEXPORT(const PDMAPICHLPR0) g_pdmR0ApicHlp;
64	extern DECLEXPORT(const PDMIOAPICHLPR0) g_pdmR0IoApicHlp;
65	extern DECLEXPORT(const PDMPCIHLPR0) g_pdmR0PciHlp;
66	__END_DECLS
67
68
69	/*******************************************************************************
70	* Internal Functions *
71	*******************************************************************************/
72	/** @name GC Device Helpers
73	* @{
74	*/
75	static DECLCALLBACK(void) pdmR0DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
76	static DECLCALLBACK(void) pdmR0DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
77	static DECLCALLBACK(void) pdmR0DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead);
78	static DECLCALLBACK(void) pdmR0DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite);
79	static DECLCALLBACK(bool) pdmR0DevHlp_A20IsEnabled(PPDMDEVINS pDevIns);
80	static DECLCALLBACK(int) pdmR0DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...);
81	static DECLCALLBACK(int) pdmR0DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va);
82	static DECLCALLBACK(int) pdmR0DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char pszErrorID, const char pszFormat, ...);
83	static DECLCALLBACK(int) pdmR0DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, bool fFatal, const char pszErrorID, const char pszFormat, va_list va);
84	static DECLCALLBACK(int) pdmR0DevHlp_PATMSetMMIOPatchInfo(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData);
85	/** @} */
86
87
88	/** @name PIC GC Helpers
89	* @{
90	*/
91	static DECLCALLBACK(void) pdmR0PicHlp_SetInterruptFF(PPDMDEVINS pDevIns);
92	static DECLCALLBACK(void) pdmR0PicHlp_ClearInterruptFF(PPDMDEVINS pDevIns);
93	#ifdef VBOX_WITH_PDM_LOCK
94	static DECLCALLBACK(int) pdmR0PicHlp_Lock(PPDMDEVINS pDevIns, int rc);
95	static DECLCALLBACK(void) pdmR0PicHlp_Unlock(PPDMDEVINS pDevIns);
96	#endif
97	/** @} */
98
99
100	/** @name APIC GC Helpers
101	* @{
102	*/
103	static DECLCALLBACK(void) pdmR0ApicHlp_SetInterruptFF(PPDMDEVINS pDevIns);
104	static DECLCALLBACK(void) pdmR0ApicHlp_ClearInterruptFF(PPDMDEVINS pDevIns);
105	static DECLCALLBACK(void) pdmR0ApicHlp_ChangeFeature(PPDMDEVINS pDevIns, bool fEnabled);
106	#ifdef VBOX_WITH_PDM_LOCK
107	static DECLCALLBACK(int) pdmR0ApicHlp_Lock(PPDMDEVINS pDevIns, int rc);
108	static DECLCALLBACK(void) pdmR0ApicHlp_Unlock(PPDMDEVINS pDevIns);
109	#endif
110	/** @} */
111
112
113	/** @name I/O APIC GC Helpers
114	* @{
115	*/
116	static DECLCALLBACK(void) pdmR0IoApicHlp_ApicBusDeliver(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
117	uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode);
118	#ifdef VBOX_WITH_PDM_LOCK
119	static DECLCALLBACK(int) pdmR0IoApicHlp_Lock(PPDMDEVINS pDevIns, int rc);
120	static DECLCALLBACK(void) pdmR0IoApicHlp_Unlock(PPDMDEVINS pDevIns);
121	#endif
122	/** @} */
123
124
125	/** @name PCI Bus GC Helpers
126	* @{
127	*/
128	static DECLCALLBACK(void) pdmR0PciHlp_IsaSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
129	static DECLCALLBACK(void) pdmR0PciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
130	#ifdef VBOX_WITH_PDM_LOCK
131	static DECLCALLBACK(int) pdmR0PciHlp_Lock(PPDMDEVINS pDevIns, int rc);
132	static DECLCALLBACK(void) pdmR0PciHlp_Unlock(PPDMDEVINS pDevIns);
133	#endif
134	/** @} */
135
136
137	static void pdmR0IsaSetIrq(PVM pVM, int iIrq, int iLevel);
138	static void pdmR0IoApicSetIrq(PVM pVM, int iIrq, int iLevel);
139
140
141
142	/**
143	* The Guest Context Device Helper Callbacks.
144	*/
145	extern DECLEXPORT(const PDMDEVHLPR0) g_pdmR0DevHlp =
146	{
147	PDM_DEVHLPR0_VERSION,
148	pdmR0DevHlp_PCISetIrq,
149	pdmR0DevHlp_ISASetIrq,
150	pdmR0DevHlp_PhysRead,
151	pdmR0DevHlp_PhysWrite,
152	pdmR0DevHlp_A20IsEnabled,
153	pdmR0DevHlp_VMSetError,
154	pdmR0DevHlp_VMSetErrorV,
155	pdmR0DevHlp_VMSetRuntimeError,
156	pdmR0DevHlp_VMSetRuntimeErrorV,
157	pdmR0DevHlp_PATMSetMMIOPatchInfo,
158	PDM_DEVHLPR0_VERSION
159	};
160
161	/**
162	* The Guest Context PIC Helper Callbacks.
163	*/
164	extern DECLEXPORT(const PDMPICHLPR0) g_pdmR0PicHlp =
165	{
166	PDM_PICHLPR0_VERSION,
167	pdmR0PicHlp_SetInterruptFF,
168	pdmR0PicHlp_ClearInterruptFF,
169	#ifdef VBOX_WITH_PDM_LOCK
170	pdmR0PicHlp_Lock,
171	pdmR0PicHlp_Unlock,
172	#endif
173	PDM_PICHLPR0_VERSION
174	};
175
176
177	/**
178	* The Guest Context APIC Helper Callbacks.
179	*/
180	extern DECLEXPORT(const PDMAPICHLPR0) g_pdmR0ApicHlp =
181	{
182	PDM_APICHLPR0_VERSION,
183	pdmR0ApicHlp_SetInterruptFF,
184	pdmR0ApicHlp_ClearInterruptFF,
185	pdmR0ApicHlp_ChangeFeature,
186	#ifdef VBOX_WITH_PDM_LOCK
187	pdmR0ApicHlp_Lock,
188	pdmR0ApicHlp_Unlock,
189	#endif
190	PDM_APICHLPR0_VERSION
191	};
192
193
194	/**
195	* The Guest Context I/O APIC Helper Callbacks.
196	*/
197	extern DECLEXPORT(const PDMIOAPICHLPR0) g_pdmR0IoApicHlp =
198	{
199	PDM_IOAPICHLPR0_VERSION,
200	pdmR0IoApicHlp_ApicBusDeliver,
201	#ifdef VBOX_WITH_PDM_LOCK
202	pdmR0IoApicHlp_Lock,
203	pdmR0IoApicHlp_Unlock,
204	#endif
205	PDM_IOAPICHLPR0_VERSION
206	};
207
208
209	/**
210	* The Guest Context PCI Bus Helper Callbacks.
211	*/
212	extern DECLEXPORT(const PDMPCIHLPR0) g_pdmR0PciHlp =
213	{
214	PDM_PCIHLPR0_VERSION,
215	pdmR0PciHlp_IsaSetIrq,
216	pdmR0PciHlp_IoApicSetIrq,
217	#ifdef VBOX_WITH_PDM_LOCK
218	pdmR0PciHlp_Lock,
219	pdmR0PciHlp_Unlock,
220	#endif
221	PDM_PCIHLPR0_VERSION, /* the end */
222	};
223
224
225
226
227	/** @copydoc PDMDEVHLPR0::pfnPCISetIrq */
228	static DECLCALLBACK(void) pdmR0DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
229	{
230	PDMDEV_ASSERT_DEVINS(pDevIns);
231	LogFlow(("pdmR0DevHlp_PCISetIrq: caller=%p/%d: iIrq=%d iLevel=%d\n", pDevIns, pDevIns->iInstance, iIrq, iLevel));
232
233	PVM pVM = pDevIns->Internal.s.pVMHC;
234	PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceHC;
235	PPDMPCIBUS pPciBus = pDevIns->Internal.s.pPciBusHC;
236	if ( pPciDev
237	&& pPciBus
238	&& pPciBus->pDevInsR0)
239	{
240	pdmLock(pVM);
241	pPciBus->pfnSetIrqR0(pPciBus->pDevInsR0, pPciDev, iIrq, iLevel);
242	pdmUnlock(pVM);
243	}
244	else
245	{
246	/* queue for ring-3 execution. */
247	PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)PDMQueueAlloc(pVM->pdm.s.pDevHlpQueueHC);
248	if (pTask)
249	{
250	pTask->enmOp = PDMDEVHLPTASKOP_PCI_SET_IRQ;
251	pTask->pDevInsHC = pDevIns;
252	pTask->u.SetIRQ.iIrq = iIrq;
253	pTask->u.SetIRQ.iLevel = iLevel;
254
255	PDMQueueInsertEx(pVM->pdm.s.pDevHlpQueueHC, &pTask->Core, 0);
256	}
257	else
258	AssertMsgFailed(("We're out of devhlp queue items!!!\n"));
259	}
260
261	LogFlow(("pdmR0DevHlp_PCISetIrq: caller=%p/%d: returns void\n", pDevIns, pDevIns->iInstance));
262	}
263
264
265	/** @copydoc PDMDEVHLPR0::pfnPCISetIrq */
266	static DECLCALLBACK(void) pdmR0DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
267	{
268	PDMDEV_ASSERT_DEVINS(pDevIns);
269	LogFlow(("pdmR0DevHlp_ISASetIrq: caller=%p/%d: iIrq=%d iLevel=%d\n", pDevIns, pDevIns->iInstance, iIrq, iLevel));
270
271	pdmR0IsaSetIrq(pDevIns->Internal.s.pVMHC, iIrq, iLevel);
272
273	LogFlow(("pdmR0DevHlp_ISASetIrq: caller=%p/%d: returns void\n", pDevIns, pDevIns->iInstance));
274	}
275
276
277	/** @copydoc PDMDEVHLPR0::pfnPhysRead */
278	static DECLCALLBACK(void) pdmR0DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
279	{
280	PDMDEV_ASSERT_DEVINS(pDevIns);
281	LogFlow(("pdmR0DevHlp_PhysRead: caller=%p/%d: GCPhys=%VGp pvBuf=%p cbRead=%#x\n",
282	pDevIns, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
283
284	PGMPhysRead(pDevIns->Internal.s.pVMHC, GCPhys, pvBuf, cbRead);
285
286	Log(("pdmR0DevHlp_PhysRead: caller=%p/%d: returns void\n", pDevIns, pDevIns->iInstance));
287	}
288
289
290	/** @copydoc PDMDEVHLPR0::pfnPhysWrite */
291	static DECLCALLBACK(void) pdmR0DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
292	{
293	PDMDEV_ASSERT_DEVINS(pDevIns);
294	LogFlow(("pdmR0DevHlp_PhysWrite: caller=%p/%d: GCPhys=%VGp pvBuf=%p cbWrite=%#x\n",
295	pDevIns, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
296
297	PGMPhysWrite(pDevIns->Internal.s.pVMHC, GCPhys, pvBuf, cbWrite);
298
299	Log(("pdmR0DevHlp_PhysWrite: caller=%p/%d: returns void\n", pDevIns, pDevIns->iInstance));
300	}
301
302
303	/** @copydoc PDMDEVHLPR0::pfnA20IsEnabled */
304	static DECLCALLBACK(bool) pdmR0DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
305	{
306	PDMDEV_ASSERT_DEVINS(pDevIns);
307	LogFlow(("pdmR0DevHlp_A20IsEnabled: caller=%p/%d:\n", pDevIns, pDevIns->iInstance));
308
309	bool fEnabled = PGMPhysIsA20Enabled(pDevIns->Internal.s.pVMHC);
310
311	Log(("pdmR0DevHlp_A20IsEnabled: caller=%p/%d: returns %RTbool\n", pDevIns, pDevIns->iInstance, fEnabled));
312	return fEnabled;
313	}
314
315
316	/** @copydoc PDMDEVHLPR0::pfnVMSetError */
317	static DECLCALLBACK(int) pdmR0DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
318	{
319	PDMDEV_ASSERT_DEVINS(pDevIns);
320	va_list args;
321	va_start(args, pszFormat);
322	int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMHC, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
323	va_end(args);
324	return rc;
325	}
326
327
328	/** @copydoc PDMDEVHLPR0::pfnVMSetErrorV */
329	static DECLCALLBACK(int) pdmR0DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
330	{
331	PDMDEV_ASSERT_DEVINS(pDevIns);
332	int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMHC, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
333	return rc;
334	}
335
336
337	/** @copydoc PDMDEVHLPR0::pfnVMSetRuntimeError */
338	static DECLCALLBACK(int) pdmR0DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char pszErrorID, const char pszFormat, ...)
339	{
340	PDMDEV_ASSERT_DEVINS(pDevIns);
341	va_list args;
342	va_start(args, pszFormat);
343	int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMHC, fFatal, pszErrorID, pszFormat, args);
344	va_end(args);
345	return rc;
346	}
347
348
349	/** @copydoc PDMDEVHLPR0::pfnVMSetRuntimeErrorV */
350	static DECLCALLBACK(int) pdmR0DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, bool fFatal, const char pszErrorID, const char pszFormat, va_list va)
351	{
352	PDMDEV_ASSERT_DEVINS(pDevIns);
353	int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMHC, fFatal, pszErrorID, pszFormat, va);
354	return rc;
355	}
356
357
358	/** @copydoc PDMDEVHLPR0::pdmR0DevHlp_PATMSetMMIOPatchInfo*/
359	static DECLCALLBACK(int) pdmR0DevHlp_PATMSetMMIOPatchInfo(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData)
360	{
361	PDMDEV_ASSERT_DEVINS(pDevIns);
362	LogFlow(("pdmR0DevHlp_PATMSetMMIOPatchInfo: caller=%p/%d:\n", pDevIns, pDevIns->iInstance));
363
364	AssertFailed();
365
366	/* return PATMSetMMIOPatchInfo(pDevIns->Internal.s.pVMHC, GCPhys, pCachedData); */
367	return VINF_SUCCESS;
368	}
369
370
371
372
373
374	/** @copydoc PDMPICHLPGC::pfnSetInterruptFF */
375	static DECLCALLBACK(void) pdmR0PicHlp_SetInterruptFF(PPDMDEVINS pDevIns)
376	{
377	PDMDEV_ASSERT_DEVINS(pDevIns);
378	LogFlow(("pdmR0PicHlp_SetInterruptFF: caller=%p/%d: VM_FF_INTERRUPT_PIC %d -> 1\n",
379	pDevIns, pDevIns->iInstance, VM_FF_ISSET(pDevIns->Internal.s.pVMHC, VM_FF_INTERRUPT_PIC)));
380	VM_FF_SET(pDevIns->Internal.s.pVMHC, VM_FF_INTERRUPT_PIC);
381	}
382
383
384	/** @copydoc PDMPICHLPGC::pfnClearInterruptFF */
385	static DECLCALLBACK(void) pdmR0PicHlp_ClearInterruptFF(PPDMDEVINS pDevIns)
386	{
387	PDMDEV_ASSERT_DEVINS(pDevIns);
388	LogFlow(("pdmR0PicHlp_ClearInterruptFF: caller=%p/%d: VM_FF_INTERRUPT_PIC %d -> 0\n",
389	pDevIns, pDevIns->iInstance, VM_FF_ISSET(pDevIns->Internal.s.pVMHC, VM_FF_INTERRUPT_PIC)));
390	VM_FF_CLEAR(pDevIns->Internal.s.pVMHC, VM_FF_INTERRUPT_PIC);
391	}
392
393
394	#ifdef VBOX_WITH_PDM_LOCK
395	/** @copydoc PDMPICHLPR0::pfnLock */
396	static DECLCALLBACK(int) pdmR0PicHlp_Lock(PPDMDEVINS pDevIns, int rc)
397	{
398	PDMDEV_ASSERT_DEVINS(pDevIns);
399	return pdmLockEx(pDevIns->Internal.s.pVMHC, rc);
400	}
401
402
403	/** @copydoc PDMPICHLPR0::pfnUnlock */
404	static DECLCALLBACK(void) pdmR0PicHlp_Unlock(PPDMDEVINS pDevIns)
405	{
406	PDMDEV_ASSERT_DEVINS(pDevIns);
407	pdmUnlock(pDevIns->Internal.s.pVMHC);
408	}
409	#endif /* VBOX_WITH_PDM_LOCK */
410
411
412
413
414	/** @copydoc PDMAPICHLPGC::pfnSetInterruptFF */
415	static DECLCALLBACK(void) pdmR0ApicHlp_SetInterruptFF(PPDMDEVINS pDevIns)
416	{
417	PDMDEV_ASSERT_DEVINS(pDevIns);
418	LogFlow(("pdmR0ApicHlp_SetInterruptFF: caller=%p/%d: VM_FF_INTERRUPT %d -> 1\n",
419	pDevIns, pDevIns->iInstance, VM_FF_ISSET(pDevIns->Internal.s.pVMHC, VM_FF_INTERRUPT_APIC)));
420	VM_FF_SET(pDevIns->Internal.s.pVMHC, VM_FF_INTERRUPT_APIC);
421	}
422
423
424	/** @copydoc PDMAPICHLPGC::pfnClearInterruptFF */
425	static DECLCALLBACK(void) pdmR0ApicHlp_ClearInterruptFF(PPDMDEVINS pDevIns)
426	{
427	PDMDEV_ASSERT_DEVINS(pDevIns);
428	LogFlow(("pdmR0ApicHlp_ClearInterruptFF: caller=%p/%d: VM_FF_INTERRUPT %d -> 0\n",
429	pDevIns, pDevIns->iInstance, VM_FF_ISSET(pDevIns->Internal.s.pVMHC, VM_FF_INTERRUPT_APIC)));
430	VM_FF_CLEAR(pDevIns->Internal.s.pVMHC, VM_FF_INTERRUPT_APIC);
431	}
432
433
434	/** @copydoc PDMAPICHLPGC::pfnChangeFeature */
435	static DECLCALLBACK(void) pdmR0ApicHlp_ChangeFeature(PPDMDEVINS pDevIns, bool fEnabled)
436	{
437	PDMDEV_ASSERT_DEVINS(pDevIns);
438	LogFlow(("pdmR0ApicHlp_ChangeFeature: caller=%p/%d: fEnabled=%RTbool\n", pDevIns, pDevIns->iInstance, fEnabled));
439	if (fEnabled)
440	CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMHC, CPUMCPUIDFEATURE_APIC);
441	else
442	CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMHC, CPUMCPUIDFEATURE_APIC);
443	}
444
445
446	#ifdef VBOX_WITH_PDM_LOCK
447	/** @copydoc PDMAPICHLPR0::pfnLock */
448	static DECLCALLBACK(int) pdmR0ApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
449	{
450	PDMDEV_ASSERT_DEVINS(pDevIns);
451	return pdmLockEx(pDevIns->Internal.s.pVMHC, rc);
452	}
453
454
455	/** @copydoc PDMAPICHLPR0::pfnUnlock */
456	static DECLCALLBACK(void) pdmR0ApicHlp_Unlock(PPDMDEVINS pDevIns)
457	{
458	PDMDEV_ASSERT_DEVINS(pDevIns);
459	pdmUnlock(pDevIns->Internal.s.pVMHC);
460	}
461	#endif /* VBOX_WITH_PDM_LOCK */
462
463
464
465
466	/** @copydoc PDMIOAPICHLPR0::pfnApicBusDeliver */
467	static DECLCALLBACK(void) pdmR0IoApicHlp_ApicBusDeliver(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
468	uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode)
469	{
470	PDMDEV_ASSERT_DEVINS(pDevIns);
471	PVM pVM = pDevIns->Internal.s.pVMHC;
472	LogFlow(("pdmR0IoApicHlp_ApicBusDeliver: caller=%p/%d: u8Dest=%RX8 u8DestMode=%RX8 u8DeliveryMode=%RX8 iVector=%RX8 u8Polarity=%RX8 u8TriggerMode=%RX8\n",
473	pDevIns, pDevIns->iInstance, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode));
474	Assert(pVM->pdm.s.Apic.pDevInsR0);
475	if (pVM->pdm.s.Apic.pfnBusDeliverR0)
476	pVM->pdm.s.Apic.pfnBusDeliverR0(pVM->pdm.s.Apic.pDevInsR0, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode);
477	}
478
479
480	#ifdef VBOX_WITH_PDM_LOCK
481	/** @copydoc PDMIOAPICHLPR0::pfnLock */
482	static DECLCALLBACK(int) pdmR0IoApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
483	{
484	PDMDEV_ASSERT_DEVINS(pDevIns);
485	return pdmLockEx(pDevIns->Internal.s.pVMHC, rc);
486	}
487
488
489	/** @copydoc PDMIOAPICHLPR0::pfnUnlock */
490	static DECLCALLBACK(void) pdmR0IoApicHlp_Unlock(PPDMDEVINS pDevIns)
491	{
492	PDMDEV_ASSERT_DEVINS(pDevIns);
493	pdmUnlock(pDevIns->Internal.s.pVMHC);
494	}
495	#endif /* VBOX_WITH_PDM_LOCK */
496
497
498
499
500
501	/** @copydoc PDMPCIHLPR0::pfnIsaSetIrq */
502	static DECLCALLBACK(void) pdmR0PciHlp_IsaSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
503	{
504	PDMDEV_ASSERT_DEVINS(pDevIns);
505	Log4(("pdmR0PciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
506	pdmR0IsaSetIrq(pDevIns->Internal.s.pVMHC, iIrq, iLevel);
507	}
508
509
510	/** @copydoc PDMPCIHLPR0::pfnIoApicSetIrq */
511	static DECLCALLBACK(void) pdmR0PciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
512	{
513	PDMDEV_ASSERT_DEVINS(pDevIns);
514	Log4(("pdmR0PciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
515	pdmR0IoApicSetIrq(pDevIns->Internal.s.pVMHC, iIrq, iLevel);
516	}
517
518
519	#ifdef VBOX_WITH_PDM_LOCK
520	/** @copydoc PDMPCIHLPR0::pfnLock */
521	static DECLCALLBACK(int) pdmR0PciHlp_Lock(PPDMDEVINS pDevIns, int rc)
522	{
523	PDMDEV_ASSERT_DEVINS(pDevIns);
524	return pdmLockEx(pDevIns->Internal.s.pVMHC, rc);
525	}
526
527
528	/** @copydoc PDMPCIHLPR0::pfnUnlock */
529	static DECLCALLBACK(void) pdmR0PciHlp_Unlock(PPDMDEVINS pDevIns)
530	{
531	PDMDEV_ASSERT_DEVINS(pDevIns);
532	pdmUnlock(pDevIns->Internal.s.pVMHC);
533	}
534	#endif /* VBOX_WITH_PDM_LOCK */
535
536
537
538
539	/**
540	* Sets an irq on the I/O APIC.
541	*
542	* @param pVM The VM handle.
543	* @param iIrq The irq.
544	* @param iLevel The new level.
545	*/
546	static void pdmR0IsaSetIrq(PVM pVM, int iIrq, int iLevel)
547	{
548	if ( ( pVM->pdm.s.IoApic.pDevInsR0
549	\|\| !pVM->pdm.s.IoApic.pDevInsR3)
550	&& ( pVM->pdm.s.Pic.pDevInsR0
551	\|\| !pVM->pdm.s.Pic.pDevInsR3))
552	{
553	pdmLock(pVM);
554	if (pVM->pdm.s.Pic.pDevInsR0)
555	pVM->pdm.s.Pic.pfnSetIrqR0(pVM->pdm.s.Pic.pDevInsR0, iIrq, iLevel);
556	if (pVM->pdm.s.IoApic.pDevInsR0)
557	pVM->pdm.s.IoApic.pfnSetIrqR0(pVM->pdm.s.IoApic.pDevInsR0, iIrq, iLevel);
558	pdmUnlock(pVM);
559	}
560	else
561	{
562	/* queue for ring-3 execution. */
563	PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)PDMQueueAlloc(pVM->pdm.s.pDevHlpQueueHC);
564	if (pTask)
565	{
566	pTask->enmOp = PDMDEVHLPTASKOP_ISA_SET_IRQ;
567	pTask->pDevInsHC = 0; /* not required */
568	pTask->u.SetIRQ.iIrq = iIrq;
569	pTask->u.SetIRQ.iLevel = iLevel;
570
571	PDMQueueInsertEx(pVM->pdm.s.pDevHlpQueueHC, &pTask->Core, 0);
572	}
573	else
574	AssertMsgFailed(("We're out of devhlp queue items!!!\n"));
575	}
576	}
577
578
579	/**
580	* Sets an irq on the I/O APIC.
581	*
582	* @param pVM The VM handle.
583	* @param iIrq The irq.
584	* @param iLevel The new level.
585	*/
586	static void pdmR0IoApicSetIrq(PVM pVM, int iIrq, int iLevel)
587	{
588	if (pVM->pdm.s.IoApic.pDevInsR0)
589	{
590	pdmLock(pVM);
591	pVM->pdm.s.IoApic.pfnSetIrqR0(pVM->pdm.s.IoApic.pDevInsR0, iIrq, iLevel);
592	pdmUnlock(pVM);
593	}
594	else if (pVM->pdm.s.IoApic.pDevInsR3)
595	{
596	/* queue for ring-3 execution. */
597	PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)PDMQueueAlloc(pVM->pdm.s.pDevHlpQueueHC);
598	if (pTask)
599	{
600	pTask->enmOp = PDMDEVHLPTASKOP_IOAPIC_SET_IRQ;
601	pTask->pDevInsHC = 0; /* not required */
602	pTask->u.SetIRQ.iIrq = iIrq;
603	pTask->u.SetIRQ.iLevel = iLevel;
604
605	PDMQueueInsertEx(pVM->pdm.s.pDevHlpQueueHC, &pTask->Core, 0);
606	}
607	else
608	AssertMsgFailed(("We're out of devhlp queue items!!!\n"));
609	}
610	}

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source: vbox/trunk/src/VBox/VMM/VMMR0/PDMR0Device.cpp@ 8973

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