1 | /* $Id: PGMR0DynMap.cpp 14362 2008-11-19 17:04:25Z vboxsync $ */
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2 | /** @file
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3 | * PGM - Page Manager and Monitor, ring-0 dynamic mapping cache.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2008 Sun Microsystems, Inc.
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8 | *
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9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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10 | * available from http://www.virtualbox.org. This file is free software;
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11 | * you can redistribute it and/or modify it under the terms of the GNU
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12 | * General Public License (GPL) as published by the Free Software
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13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | *
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17 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
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18 | * Clara, CA 95054 USA or visit http://www.sun.com if you need
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19 | * additional information or have any questions.
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20 | */
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21 |
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22 | /*******************************************************************************
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23 | * Internal Functions *
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24 | *******************************************************************************/
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25 | #include <VBox/pgm.h>
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26 | #include "../PGMInternal.h"
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27 | #include <VBox/vm.h>
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28 | #include <VBox/err.h>
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29 | #include <iprt/asm.h>
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30 | #include <iprt/assert.h>
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31 | #include <iprt/cpuset.h>
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32 | #include <iprt/spinlock.h>
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33 |
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34 |
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35 | /*******************************************************************************
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36 | * Structures and Typedefs *
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37 | *******************************************************************************/
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38 | /**
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39 | * Ring-0 dynamic mapping cache segment.
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40 | *
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41 | * The dynamic mapping cache can be extended with additional segments if the
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42 | * load is found to be too high. This done the next time a VM is created, under
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43 | * the protection of the init mutex. The arrays is reallocated and the new
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44 | * segment is added to the end of these. Nothing is rehashed of course, as the
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45 | * indexes / addresses must remain unchanged.
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46 | *
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47 | * This structure is only modified while owning the init mutex or during module
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48 | * init / term.
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49 | */
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50 | typedef struct PGMR0DYNMAPSEG
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51 | {
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52 | /** Pointer to the next segment. */
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53 | struct PGMR0DYNMAPSEG *pNext;
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54 | /** The memory object for the virtual address range that we're abusing. */
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55 | RTR0MEMOBJ hMemObj;
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56 | /** The memory object for the page tables. */
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57 | RTR0MEMOBJ hMemObjPT;
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58 | /** The start page in the cache. (I.e. index into the arrays.) */
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59 | uint32_t iPage;
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60 | /** The number of pages this segment contributes. */
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61 | uint32_t cPages;
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62 | } PGMR0DYNMAPSEG;
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63 | /** Pointer to a ring-0 dynamic mapping cache segment. */
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64 | typedef PGMR0DYNMAPSEG *PPGMR0DYNMAPSEG;
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65 |
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66 |
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67 | /**
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68 | * Ring-0 dynamic mapping cache entry.
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69 | *
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70 | * This structure tracks
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71 | */
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72 | typedef struct PGMR0DYNMAPENTRY
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73 | {
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74 | /** The physical address of the currently mapped page.
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75 | * This is duplicate for three reasons: cache locality, cache policy of the PT
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76 | * mappings and sanity checks. */
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77 | RTHCPHYS HCPhys;
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78 | /** Pointer to the page. */
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79 | void *pvPage;
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80 | /** The number of references. */
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81 | int32_t volatile cRefs;
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82 | /** PTE pointer union. */
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83 | union PGMR0DYNMAPENTRY_PPTE
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84 | {
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85 | /** PTE pointer, 32-bit legacy version. */
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86 | PX86PTE pLegacy;
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87 | /** PTE pointer, PAE version. */
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88 | PX86PTEPAE pPae;
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89 | } uPte;
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90 | /** CPUs that haven't invalidated this entry after it's last update. */
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91 | RTCPUSET PendingSet;
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92 | } PGMR0DYNMAPENTRY;
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93 | /** Pointer to a ring-0 dynamic mapping cache entry. */
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94 | typedef PGMR0DYNMAPENTRY *PPGMR0DYNMAPENTRY;
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95 |
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96 |
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97 | /**
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98 | * Ring-0 dynamic mapping cache.
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99 | *
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100 | * This is initialized during VMMR0 module init but no segments are allocated at
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101 | * that time. Segments will be added when the first VM is started and removed
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102 | * again when the last VM shuts down, thus avoid consuming memory while dormant.
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103 | * At module termination, the remaining bits will be freed up.
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104 | */
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105 | typedef struct PGMR0DYNMAP
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106 | {
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107 | /** The usual magic number / eye catcher. */
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108 | uint32_t u32Magic;
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109 | /** Spinlock serializing the normal operation of the cache. */
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110 | RTSPINLOCK hSpinlock;
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111 | /** Array for tracking and managing the pages. */
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112 | PPGMR0DYNMAPENTRY paPages;
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113 | /** The cache size given as a number of pages. */
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114 | uint32_t cPages;
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115 | /** Whether it's 32-bit legacy or PAE/AMD64 paging mode. */
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116 | bool fLegacyMode;
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117 | /** The current load. */
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118 | uint32_t cLoad;
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119 | /** The max load.
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120 | * This is maintained to get trigger adding of more mapping space. */
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121 | uint32_t cMaxLoad;
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122 | /** Initialization / termination lock. */
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123 | RTSEMFASTMUTEX hInitLock;
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124 | /** The number of users (protected by hInitLock). */
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125 | uint32_t cUsers;
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126 | /** Array containing a copy of the original page tables.
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127 | * The entries are either X86PTE or X86PTEPAE according to fLegacyMode. */
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128 | void *pvSavedPTs;
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129 | } PGMR0DYNMAP;
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130 | /** Pointer to the ring-0 dynamic mapping cache */
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131 | typedef PGMR0DYNMAP *PPGMR0DYNMAP;
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132 |
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133 |
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134 | /*******************************************************************************
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135 | * Global Variables *
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136 | *******************************************************************************/
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137 | /** Pointer to the ring-0 dynamic mapping cache. */
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138 | static PPGMR0DYNMAP g_pPGMR0DynMap;
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139 |
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140 |
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141 |
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142 |
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143 | /**
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144 | * Initializes the ring-0 dynamic mapping cache.
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145 | *
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146 | * @returns VBox status code.
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147 | */
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148 | VMMR0DECL(int) PGMR0DynMapInit(void)
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149 | {
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150 | return VINF_SUCCESS;
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151 | }
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152 |
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153 |
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154 | /**
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155 | * Terminates the ring-0 dynamic mapping cache.
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156 | */
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157 | VMMR0DECL(void) PGMR0DynMapTerm(void)
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158 | {
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159 | }
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160 |
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161 |
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162 | /**
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163 | * Initializes the dynamic mapping cache for a new VM.
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164 | *
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165 | * @returns VBox status code.
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166 | * @param pVM Pointer to the shared VM structure.
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167 | */
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168 | VMMR0DECL(int) PGMR0DynMapInitVM(PVM pVM)
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169 | {
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170 | NOREF(pVM);
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171 | return VINF_SUCCESS;
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172 | }
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173 |
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174 |
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175 | /**
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176 | * Terminates the dynamic mapping cache usage for a VM.
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177 | *
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178 | * @param pVM Pointer to the shared VM structure.
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179 | */
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180 | VMMR0DECL(void) PGMR0DynMapTermVM(PVM pVM)
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181 | {
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182 | NOREF(pVM);
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183 | }
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184 |
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185 |
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186 | /**
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187 | * Release references to a page, caller owns the spin lock.
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188 | *
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189 | * @param pThis The dynamic mapping cache instance.
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190 | * @param iPage The page.
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191 | * @param cRefs The number of references to release.
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192 | */
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193 | DECLINLINE(void) pgmR0DynMapReleasePageLocked(PPGMR0DYNMAP pThis, uint32_t iPage, int32_t cRefs)
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194 | {
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195 | cRefs = ASMAtomicSubS32(&pThis->paPages[iPage].cRefs, cRefs);
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196 | AssertMsg(cRefs >= 0, ("%d\n", cRefs));
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197 | if (!cRefs)
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198 | pThis->cLoad--;
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199 | }
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200 |
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201 |
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202 | /**
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203 | * Release references to a page, caller does not own the spin lock.
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204 | *
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205 | * @param pThis The dynamic mapping cache instance.
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206 | * @param iPage The page.
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207 | * @param cRefs The number of references to release.
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208 | */
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209 | static void pgmR0DynMapReleasePage(PPGMR0DYNMAP pThis, uint32_t iPage, uint32_t cRefs)
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210 | {
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211 | RTSPINLOCKTMP Tmp = RTSPINLOCKTMP_INITIALIZER;
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212 | RTSpinlockAcquire(pThis->hSpinlock, &Tmp);
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213 | pgmR0DynMapReleasePageLocked(pThis, iPage, cRefs);
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214 | RTSpinlockRelease(pThis->hSpinlock, &Tmp);
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215 | }
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216 |
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217 |
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218 | /**
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219 | * pgmR0DynMapPage worker that deals with the tedious bits.
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220 | *
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221 | * @returns The page index on success, UINT32_MAX on failure.
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222 | * @param pThis The dynamic mapping cache instance.
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223 | * @param HCPhys The address of the page to be mapped.
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224 | * @param iPage The page index pgmR0DynMapPage hashed HCPhys to.
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225 | */
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226 | static uint32_t pgmR0DynMapPageSlow(PPGMR0DYNMAP pThis, RTHCPHYS HCPhys, uint32_t iPage)
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227 | {
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228 | /*
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229 | * Check if any of the first 5 pages are unreferenced since the caller
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230 | * already has made sure they aren't matching.
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231 | */
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232 | uint32_t const cPages = cPages;
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233 | PPGMR0DYNMAPENTRY paPages = pThis->paPages;
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234 | uint32_t iFreePage;
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235 | if (!paPages[iPage].cRefs)
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236 | iFreePage = iPage;
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237 | else if (!paPages[(iPage + 1) % cPages].cRefs)
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238 | iFreePage = iPage;
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239 | else if (!paPages[(iPage + 2) % cPages].cRefs)
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240 | iFreePage = iPage;
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241 | else if (!paPages[(iPage + 3) % cPages].cRefs)
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242 | iFreePage = iPage;
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243 | else if (!paPages[(iPage + 4) % cPages].cRefs)
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244 | iFreePage = iPage;
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245 | else
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246 | {
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247 | /*
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248 | * Search for an unused or matching entry.
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249 | */
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250 | iFreePage = (iPage + 5) % pThis->cPages;
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251 | for (;;)
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252 | {
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253 | if (paPages[iFreePage].HCPhys == HCPhys)
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254 | return iFreePage;
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255 | if (!paPages[iFreePage].cRefs)
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256 | break;
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257 |
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258 | /* advance */
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259 | iFreePage = (iFreePage + 1) % cPages;
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260 | if (RT_UNLIKELY(iFreePage != iPage))
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261 | return UINT32_MAX;
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262 | }
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263 | }
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264 |
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265 | /*
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266 | * Setup the new entry.
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267 | */
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268 | paPages[iFreePage].HCPhys = HCPhys;
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269 | RTCpuSetFill(&paPages[iFreePage].PendingSet);
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270 | if (pThis->fLegacyMode)
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271 | paPages[iFreePage].uPte.pLegacy->u = (paPages[iFreePage].uPte.pLegacy->u & X86_PTE_G | X86_PTE_PAT | X86_PTE_PCD | X86_PTE_PWT)
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272 | | X86_PTE_P | X86_PTE_A | X86_PTE_D
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273 | | (HCPhys & X86_PTE_PG_MASK);
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274 | else
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275 | paPages[iFreePage].uPte.pPae->u = (paPages[iFreePage].uPte.pPae->u & X86_PTE_G | X86_PTE_PAT | X86_PTE_PCD | X86_PTE_PWT)
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276 | | X86_PTE_P | X86_PTE_A | X86_PTE_D
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277 | | (HCPhys & X86_PTE_PAE_PG_MASK);
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278 | return iFreePage;
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279 | }
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280 |
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281 |
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282 | /**
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283 | * Maps a page into the pool.
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284 | *
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285 | * @returns Pointer to the mapping.
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286 | * @param pThis The dynamic mapping cache instance.
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287 | * @param HCPhys The address of the page to be mapped.
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288 | * @param piPage Where to store the page index.
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289 | */
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290 | DECLINLINE(void *) pgmR0DynMapPage(PPGMR0DYNMAP pThis, RTHCPHYS HCPhys, uint32_t *piPage)
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291 | {
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292 | RTSPINLOCKTMP Tmp = RTSPINLOCKTMP_INITIALIZER;
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293 | RTSpinlockAcquire(pThis->hSpinlock, &Tmp);
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294 | AssertMsg(!(HCPhys & PAGE_OFFSET_MASK), ("HCPhys=%RHp\n", HCPhys));
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295 |
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296 | /*
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297 | * Find an entry, if possible a matching one. The HCPhys address is hashed
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298 | * down to a page index, collisions are handled by linear searching. Optimize
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299 | * for a hit in the first 5 pages.
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300 | *
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301 | * To the cheap hits here and defer the tedious searching and inserting
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302 | * to a helper function.
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303 | */
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304 | uint32_t const cPages = cPages;
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305 | uint32_t iPage = (HCPhys >> PAGE_SHIFT) % cPages;
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306 | PPGMR0DYNMAPENTRY paPages = pThis->paPages;
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307 | if (paPages[iPage].HCPhys != HCPhys)
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308 | {
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309 | uint32_t iPage2 = (iPage + 1) % cPages;
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310 | if (paPages[iPage2].HCPhys != HCPhys)
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311 | {
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312 | iPage2 = (iPage + 2) % cPages;
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313 | if (paPages[iPage2].HCPhys != HCPhys)
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314 | {
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315 | iPage2 = (iPage + 3) % cPages;
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316 | if (paPages[iPage2].HCPhys != HCPhys)
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317 | {
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318 | iPage2 = (iPage + 4) % cPages;
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319 | if (paPages[iPage2].HCPhys != HCPhys)
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320 | {
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321 | iPage = pgmR0DynMapPageSlow(pThis, HCPhys, iPage);
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322 | if (RT_UNLIKELY(iPage == UINT32_MAX))
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323 | {
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324 | RTSpinlockRelease(pThis->hSpinlock, &Tmp);
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325 | return NULL;
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326 | }
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327 | }
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328 | else
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329 | iPage = iPage2;
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330 | }
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331 | else
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332 | iPage = iPage2;
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333 | }
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334 | else
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335 | iPage = iPage2;
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336 | }
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337 | else
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338 | iPage = iPage2;
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339 | }
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340 |
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341 | /*
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342 | * Reference it, update statistics and get the return address.
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343 | */
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344 | if (ASMAtomicIncS32(&paPages[iPage].cRefs) == 1)
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345 | {
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346 | pThis->cLoad++;
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347 | if (pThis->cLoad > pThis->cMaxLoad)
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348 | pThis->cMaxLoad = pThis->cLoad;
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349 | Assert(pThis->cLoad <= pThis->cPages);
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350 | }
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351 | void *pvPage = paPages[iPage].pvPage;
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352 |
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353 | /*
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354 | * Invalidate the entry?
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355 | */
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356 | RTCPUID idRealCpu = RTMpCpuId();
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357 | bool fInvalidateIt = RTCpuSetIsMember(&paPages[iPage].PendingSet, idRealCpu);
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358 | if (fInvalidateIt)
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359 | RTCpuSetDel(&paPages[iPage].PendingSet, idRealCpu);
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360 |
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361 | RTSpinlockRelease(pThis->hSpinlock, &Tmp);
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362 |
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363 | /*
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364 | * Do the actual invalidation outside the spinlock.
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365 | */
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366 | ASMInvalidatePage(pvPage);
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367 |
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368 | *piPage = iPage;
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369 | return pvPage;
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370 | }
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371 |
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372 |
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373 | /**
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374 | * Signals the start of a new set of mappings.
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375 | *
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376 | * Mostly for strictness. PGMDynMapHCPage won't work unless this
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377 | * API is called.
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378 | *
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379 | * @param pVCpu The shared data for the current virtual CPU.
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380 | */
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381 | VMMDECL(void) PGMDynMapStartAutoSet(PVMCPU pVCpu)
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382 | {
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383 | Assert(pVCpu->pgm.s.AutoSet.cEntries == PGMMAPSET_CLOSED);
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384 | pVCpu->pgm.s.AutoSet.cEntries = 0;
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385 | }
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386 |
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387 |
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388 | /**
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389 | * Releases the dynamic memory mappings made by PGMDynMapHCPage and associates
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390 | * since the PGMDynMapStartAutoSet call.
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391 | *
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392 | * @param pVCpu The shared data for the current virtual CPU.
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393 | */
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394 | VMMDECL(void) PGMDynMapReleaseAutoSet(PVMCPU pVCpu)
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395 | {
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396 | PPGMMAPSET pSet = &pVCpu->pgm.s.AutoSet;
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397 |
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398 | /* close the set */
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399 | uint32_t i = pVCpu->pgm.s.AutoSet.cEntries;
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400 | AssertMsg(i <= RT_ELEMENTS(pVCpu->pgm.s.AutoSet.aEntries), ("%u\n", i));
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401 | pVCpu->pgm.s.AutoSet.cEntries = PGMMAPSET_CLOSED;
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402 |
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403 | /* release any pages we're referencing. */
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404 | if (i != 0 && RT_LIKELY(i <= RT_ELEMENTS(pVCpu->pgm.s.AutoSet.aEntries)))
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405 | {
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406 | PPGMR0DYNMAP pThis = g_pPGMR0DynMap;
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407 | RTSPINLOCKTMP Tmp = RTSPINLOCKTMP_INITIALIZER;
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408 | RTSpinlockAcquire(pThis->hSpinlock, &Tmp);
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409 |
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410 | while (i-- > 0)
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411 | {
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412 | uint32_t iPage = pSet->aEntries[i].iPage;
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413 | Assert(iPage < pThis->cPages);
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414 | int32_t cRefs = pSet->aEntries[i].cRefs;
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415 | Assert(cRefs > 0);
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416 | pgmR0DynMapReleasePageLocked(pThis, iPage, cRefs);
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417 | }
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418 |
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419 | Assert(pThis->cLoad <= pThis->cPages);
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420 | RTSpinlockRelease(pThis->hSpinlock, &Tmp);
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421 | }
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422 | }
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423 |
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424 |
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425 | /**
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426 | * Migrates the automatic mapping set of the current vCPU if necessary.
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427 | *
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428 | * This is called when re-entering the hardware assisted execution mode after a
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429 | * nip down to ring-3. We run the risk that the CPU might have change and we
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430 | * will therefore make sure all the cache entries currently in the auto set will
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431 | * be valid on the new CPU. If the cpu didn't change nothing will happen as all
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432 | * the entries will have been flagged as invalidated.
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433 | *
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434 | * @param pVCpu The shared data for the current virtual CPU.
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435 | * @thread EMT
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436 | */
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437 | VMMDECL(void) PGMDynMapMigrateAutoSet(PVMCPU pVCpu)
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438 | {
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439 | PPGMMAPSET pSet = &pVCpu->pgm.s.AutoSet;
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440 | uint32_t i = pVCpu->pgm.s.AutoSet.cEntries;
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441 | AssertMsg(i <= RT_ELEMENTS(pVCpu->pgm.s.AutoSet.aEntries), ("%u\n", i));
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442 | if (i != 0 && RT_LIKELY(i <= RT_ELEMENTS(pVCpu->pgm.s.AutoSet.aEntries)))
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443 | {
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444 | PPGMR0DYNMAP pThis = g_pPGMR0DynMap;
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445 | RTCPUID idRealCpu = RTMpCpuId();
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446 |
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447 | while (i-- > 0)
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448 | {
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449 | Assert(pSet->aEntries[i].cRefs > 0);
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450 | uint32_t iPage = pSet->aEntries[i].iPage;
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451 | Assert(iPage < pThis->cPages);
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452 | if (RTCpuSetIsMember(&pThis->paPages[iPage].PendingSet, idRealCpu))
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453 | {
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454 | RTCpuSetDel(&pThis->paPages[iPage].PendingSet, idRealCpu);
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455 | ASMInvalidatePage(pThis->paPages[iPage].pvPage);
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456 | }
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457 | }
|
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458 | }
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459 | }
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460 |
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461 |
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462 | /**
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463 | * As a final resort for a full auto set, try merge duplicate entries.
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464 | *
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465 | * @param pSet The set.
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466 | */
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467 | static void pgmDynMapOptimizeAutoSet(PPGMMAPSET pSet)
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468 | {
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469 | for (uint32_t i = 0 ; i < pSet->cEntries; i++)
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470 | {
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471 | uint16_t const iPage = pSet->aEntries[i].iPage;
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472 | uint32_t j = i + 1;
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473 | while (j < pSet->cEntries)
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474 | {
|
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475 | if (pSet->aEntries[j].iPage != iPage)
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476 | j++;
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477 | else
|
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478 | {
|
---|
479 | /* merge j with i removing j. */
|
---|
480 | pSet->aEntries[i].cRefs += pSet->aEntries[j].cRefs;
|
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481 | pSet->cEntries--;
|
---|
482 | if (j < pSet->cEntries)
|
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483 | {
|
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484 | pSet->aEntries[j] = pSet->aEntries[pSet->cEntries];
|
---|
485 | pSet->aEntries[pSet->cEntries].iPage = UINT16_MAX;
|
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486 | pSet->aEntries[pSet->cEntries].cRefs = 0;
|
---|
487 | }
|
---|
488 | else
|
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489 | {
|
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490 | pSet->aEntries[j].iPage = UINT16_MAX;
|
---|
491 | pSet->aEntries[j].cRefs = 0;
|
---|
492 | }
|
---|
493 | }
|
---|
494 | }
|
---|
495 | }
|
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496 | }
|
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497 |
|
---|
498 |
|
---|
499 | /* documented elsewhere - a bit of a mess. */
|
---|
500 | VMMDECL(int) PGMDynMapHCPage(PVM pVM, RTHCPHYS HCPhys, void **ppv)
|
---|
501 | {
|
---|
502 | AssertMsg(!(HCPhys & PAGE_OFFSET_MASK), ("HCPhys=%RHp\n", HCPhys));
|
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503 |
|
---|
504 | /*
|
---|
505 | * Map it.
|
---|
506 | */
|
---|
507 | uint32_t iPage;
|
---|
508 | void *pvPage = pgmR0DynMapPage(g_pPGMR0DynMap, HCPhys, &iPage);
|
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509 | if (RT_UNLIKELY(!pvPage))
|
---|
510 | {
|
---|
511 | static uint32_t s_cBitched = 0;
|
---|
512 | if (++s_cBitched < 10)
|
---|
513 | LogRel(("PGMDynMapHCPage: cLoad=%u/%u cPages=%u\n",
|
---|
514 | g_pPGMR0DynMap->cLoad, g_pPGMR0DynMap->cMaxLoad, g_pPGMR0DynMap->cPages));
|
---|
515 | return VERR_PGM_DYNMAP_FAILED;
|
---|
516 | }
|
---|
517 |
|
---|
518 | /*
|
---|
519 | * Add the page to the auto reference set.
|
---|
520 | * If it's less than half full, don't bother looking for duplicates.
|
---|
521 | */
|
---|
522 | PVMCPU pVCpu = VMMGetCpu(pVM);
|
---|
523 | PPGMMAPSET pSet = &pVCpu->pgm.s.AutoSet;
|
---|
524 | if (pSet->cEntries < RT_ELEMENTS(pSet->aEntries) / 2)
|
---|
525 | {
|
---|
526 | pSet->aEntries[pSet->cEntries].cRefs = 1;
|
---|
527 | pSet->aEntries[pSet->cEntries].iPage = iPage;
|
---|
528 | }
|
---|
529 | else
|
---|
530 | {
|
---|
531 | Assert(pSet->cEntries <= RT_ELEMENTS(pSet->aEntries));
|
---|
532 | int32_t i = pSet->cEntries;
|
---|
533 | while (i-- > 0)
|
---|
534 | if (pSet->aEntries[i].iPage)
|
---|
535 | {
|
---|
536 | pSet->aEntries[i].cRefs++;
|
---|
537 | break;
|
---|
538 | }
|
---|
539 | if (i < 0)
|
---|
540 | {
|
---|
541 | if (RT_UNLIKELY(pSet->cEntries >= RT_ELEMENTS(pSet->aEntries)))
|
---|
542 | pgmDynMapOptimizeAutoSet(pSet);
|
---|
543 | if (RT_LIKELY(pSet->cEntries < RT_ELEMENTS(pSet->aEntries)))
|
---|
544 | {
|
---|
545 | pSet->aEntries[pSet->cEntries].cRefs = 1;
|
---|
546 | pSet->aEntries[pSet->cEntries].iPage = iPage;
|
---|
547 | }
|
---|
548 | else
|
---|
549 | {
|
---|
550 | /* We're screwed. */
|
---|
551 | pgmR0DynMapReleasePage(g_pPGMR0DynMap, iPage, 1);
|
---|
552 |
|
---|
553 | static uint32_t s_cBitched = 0;
|
---|
554 | if (++s_cBitched < 10)
|
---|
555 | LogRel(("PGMDynMapHCPage: set is full!\n"));
|
---|
556 | return VERR_PGM_DYNMAP_FULL_SET;
|
---|
557 | }
|
---|
558 | }
|
---|
559 | }
|
---|
560 |
|
---|
561 | return VINF_SUCCESS;
|
---|
562 | }
|
---|
563 |
|
---|
564 |
|
---|