VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR0/TRPMR0A.asm@ 78003

Last change on this file since 78003 was 76553, checked in by vboxsync, 6 years ago

scm --update-copyright-year

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File size: 3.8 KB
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1; $Id: TRPMR0A.asm 76553 2019-01-01 01:45:53Z vboxsync $
2;; @file
3; TRPM - Host Context Ring-0
4;
5
6;
7; Copyright (C) 2006-2019 Oracle Corporation
8;
9; This file is part of VirtualBox Open Source Edition (OSE), as
10; available from http://www.virtualbox.org. This file is free software;
11; you can redistribute it and/or modify it under the terms of the GNU
12; General Public License (GPL) as published by the Free Software
13; Foundation, in version 2 as it comes in the "COPYING" file of the
14; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16;
17
18;*******************************************************************************
19;* Header Files *
20;*******************************************************************************
21%include "VBox/asmdefs.mac"
22%include "iprt/x86.mac"
23
24
25BEGINCODE
26
27;;
28; Calls the interrupt gate as if we received an interrupt while in Ring-0.
29;
30; @param uIP x86:[ebp+8] msc:rcx gcc:rdi The interrupt gate IP.
31; @param SelCS x86:[ebp+12] msc:dx gcc:si The interrupt gate CS.
32; @param RSP msc:r8 gcc:rdx The interrupt gate RSP. ~0 if no stack switch should take place. (only AMD64)
33;DECLASM(void) trpmR0DispatchHostInterrupt(RTR0UINTPTR uIP, RTSEL SelCS, RTR0UINTPTR RSP);
34ALIGNCODE(16)
35BEGINPROC trpmR0DispatchHostInterrupt
36 push xBP
37 mov xBP, xSP
38
39%ifdef RT_ARCH_AMD64
40 mov r11, rsp ; save the RSP for the iret frame.
41 and rsp, 0fffffffffffffff0h ; align the stack. (do it unconditionally saves some jump mess)
42
43 ; switch stack?
44 %ifdef ASM_CALL64_MSC
45 cmp r8, 0ffffffffffffffffh
46 je .no_stack_switch
47 mov rsp, r8
48 %else
49 cmp rdx, 0ffffffffffffffffh
50 je .no_stack_switch
51 mov rsp, rdx
52 %endif
53.no_stack_switch:
54
55 ; create the iret frame
56 push 0 ; SS
57 push r11 ; RSP
58 pushfq ; RFLAGS
59 and dword [rsp], ~X86_EFL_IF
60 mov ax, cs
61 push rax ; CS
62 lea r10, [.return wrt rip] ; RIP
63 push r10
64
65 ; create the retf frame
66 %ifdef ASM_CALL64_MSC
67 movzx rdx, dx
68 cmp rdx, r11
69 je .dir_jump
70 push rdx
71 push rcx
72 %else
73 movzx rsi, si
74 cmp rsi, r11
75 je .dir_jump
76 push rsi
77 push rdi
78 %endif
79
80 ; dispatch it
81 db 048h
82 retf
83
84 ; dispatch it by a jmp (don't mess up the IST stack)
85.dir_jump:
86 %ifdef ASM_CALL64_MSC
87 jmp rcx
88 %else
89 jmp rdi
90 %endif
91
92%else ; 32-bit:
93 mov ecx, [ebp + 8] ; uIP
94 movzx edx, word [ebp + 12] ; SelCS
95
96 ; create the iret frame
97 pushfd ; EFLAGS
98 and dword [esp], ~X86_EFL_IF
99 push cs ; CS
100 push .return ; EIP
101
102 ; create the retf frame
103 push edx
104 push ecx
105
106 ; dispatch it!
107 retf
108%endif
109.return:
110 cli
111
112 leave
113 ret
114ENDPROC trpmR0DispatchHostInterrupt
115
116
117;;
118; Issues a software interrupt to the specified interrupt vector.
119;
120; @param uActiveVector x86:[esp+4] msc:rcx gcc:rdi The vector number.
121;
122;DECLASM(void) trpmR0DispatchHostInterruptSimple(RTUINT uActiveVector);
123ALIGNCODE(16)
124BEGINPROC trpmR0DispatchHostInterruptSimple
125%ifdef RT_ARCH_X86
126 mov eax, [esp + 4]
127 jmp dword [.jmp_table + eax * 4]
128%else
129 lea r9, [.jmp_table wrt rip]
130 %ifdef ASM_CALL64_MSC
131 jmp qword [r9 + rcx * 8]
132 %else
133 jmp qword [r9 + rdi * 8]
134 %endif
135%endif
136
137ALIGNCODE(4)
138.jmp_table:
139%assign i 0
140%rep 256
141RTCCPTR_DEF .int_ %+ i
142%assign i i+1
143%endrep
144
145%assign i 0
146%rep 256
147 ALIGNCODE(4)
148.int_ %+ i:
149 int i
150 ret
151%assign i i+1
152%endrep
153
154ENDPROC trpmR0DispatchHostInterruptSimple
155
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