VMMR0.cpp@ 88750

Last change on this file since 88750 was 88347, checked in by vboxsync, 4 years ago
Forward ported r143576 from 6.1: VMM: Re-enabled vmmR0DoHalt and added more statistics to it. oem2ticketref:40
Property svn:eol-style set to `native` Property svn:keywords set to `Id Revision`
File size: 103.7 KB

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1	/* $Id: VMMR0.cpp 88347 2021-04-01 13:17:16Z vboxsync $ */
2	/** @file
3	* VMM - Host Context Ring 0.
4	*/
5
6	/*
7	* Copyright (C) 2006-2020 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_VMM
23	#include <VBox/vmm/vmm.h>
24	#include <VBox/sup.h>
25	#include <VBox/vmm/iom.h>
26	#include <VBox/vmm/trpm.h>
27	#include <VBox/vmm/cpum.h>
28	#include <VBox/vmm/pdmapi.h>
29	#include <VBox/vmm/pgm.h>
30	#ifdef VBOX_WITH_NEM_R0
31	# include <VBox/vmm/nem.h>
32	#endif
33	#include <VBox/vmm/em.h>
34	#include <VBox/vmm/stam.h>
35	#include <VBox/vmm/tm.h>
36	#include "VMMInternal.h"
37	#include <VBox/vmm/vmcc.h>
38	#include <VBox/vmm/gvm.h>
39	#ifdef VBOX_WITH_PCI_PASSTHROUGH
40	# include <VBox/vmm/pdmpci.h>
41	#endif
42	#include <VBox/vmm/apic.h>
43
44	#include <VBox/vmm/gvmm.h>
45	#include <VBox/vmm/gmm.h>
46	#include <VBox/vmm/gim.h>
47	#include <VBox/intnet.h>
48	#include <VBox/vmm/hm.h>
49	#include <VBox/param.h>
50	#include <VBox/err.h>
51	#include <VBox/version.h>
52	#include <VBox/log.h>
53
54	#include <iprt/asm-amd64-x86.h>
55	#include <iprt/assert.h>
56	#include <iprt/crc.h>
57	#include <iprt/mp.h>
58	#include <iprt/once.h>
59	#include <iprt/stdarg.h>
60	#include <iprt/string.h>
61	#include <iprt/thread.h>
62	#include <iprt/timer.h>
63	#include <iprt/time.h>
64
65	#include "dtrace/VBoxVMM.h"
66
67
68	#if defined(_MSC_VER) && defined(RT_ARCH_AMD64) /** @todo check this with with VC7! */
69	# pragma intrinsic(_AddressOfReturnAddress)
70	#endif
71
72	#if defined(RT_OS_DARWIN) && ARCH_BITS == 32
73	# error "32-bit darwin is no longer supported. Go back to 4.3 or earlier!"
74	#endif
75
76
77
78	/*********************************************************************************************************************************
79	* Defined Constants And Macros *
80	*********************************************************************************************************************************/
81	/** @def VMM_CHECK_SMAP_SETUP
82	* SMAP check setup. */
83	/** @def VMM_CHECK_SMAP_CHECK
84	* Checks that the AC flag is set if SMAP is enabled. If AC is not set,
85	* it will be logged and @a a_BadExpr is executed. */
86	/** @def VMM_CHECK_SMAP_CHECK2
87	* Checks that the AC flag is set if SMAP is enabled. If AC is not set, it will
88	* be logged, written to the VMs assertion text buffer, and @a a_BadExpr is
89	* executed. */
90	#if (defined(VBOX_STRICT) \|\| 1) && !defined(VBOX_WITH_RAM_IN_KERNEL)
91	# define VMM_CHECK_SMAP_SETUP() uint32_t const fKernelFeatures = SUPR0GetKernelFeatures()
92	# define VMM_CHECK_SMAP_CHECK(a_BadExpr) \
93	do { \
94	if (fKernelFeatures & SUPKERNELFEATURES_SMAP) \
95	{ \
96	RTCCUINTREG fEflCheck = ASMGetFlags(); \
97	if (RT_LIKELY(fEflCheck & X86_EFL_AC)) \
98	{ /* likely */ } \
99	else \
100	{ \
101	SUPR0Printf("%s, line %d: EFLAGS.AC is clear! (%#x)\n", __FUNCTION__, __LINE__, (uint32_t)fEflCheck); \
102	a_BadExpr; \
103	} \
104	} \
105	} while (0)
106	# define VMM_CHECK_SMAP_CHECK2(a_pGVM, a_BadExpr) \
107	do { \
108	if (fKernelFeatures & SUPKERNELFEATURES_SMAP) \
109	{ \
110	RTCCUINTREG fEflCheck = ASMGetFlags(); \
111	if (RT_LIKELY(fEflCheck & X86_EFL_AC)) \
112	{ /* likely */ } \
113	else if (a_pGVM) \
114	{ \
115	SUPR0BadContext((a_pGVM)->pSession, __FILE__, __LINE__, "EFLAGS.AC is zero!"); \
116	RTStrPrintf((a_pGVM)->vmm.s.szRing0AssertMsg1, sizeof((a_pGVM)->vmm.s.szRing0AssertMsg1), \
117	"%s, line %d: EFLAGS.AC is clear! (%#x)\n", __FUNCTION__, __LINE__, (uint32_t)fEflCheck); \
118	a_BadExpr; \
119	} \
120	else \
121	{ \
122	SUPR0Printf("%s, line %d: EFLAGS.AC is clear! (%#x)\n", __FUNCTION__, __LINE__, (uint32_t)fEflCheck); \
123	a_BadExpr; \
124	} \
125	} \
126	} while (0)
127	#else
128	# define VMM_CHECK_SMAP_SETUP() uint32_t const fKernelFeatures = 0
129	# define VMM_CHECK_SMAP_CHECK(a_BadExpr) NOREF(fKernelFeatures)
130	# define VMM_CHECK_SMAP_CHECK2(a_pGVM, a_BadExpr) NOREF(fKernelFeatures)
131	#endif
132
133
134	/*********************************************************************************************************************************
135	* Internal Functions *
136	*********************************************************************************************************************************/
137	RT_C_DECLS_BEGIN
138	#if defined(RT_ARCH_X86) && (defined(RT_OS_SOLARIS) \|\| defined(RT_OS_FREEBSD))
139	extern uint64_t __udivdi3(uint64_t, uint64_t);
140	extern uint64_t __umoddi3(uint64_t, uint64_t);
141	#endif
142	RT_C_DECLS_END
143
144
145	/*********************************************************************************************************************************
146	* Global Variables *
147	*********************************************************************************************************************************/
148	/** Drag in necessary library bits.
149	* The runtime lives here (in VMMR0.r0) and VBoxDDR0.r0 links against us. /
150	struct CLANG11WEIRDNOTHROW { PFNRT pfn; } g_VMMR0Deps[] =
151	{
152	{ (PFNRT)RTCrc32 },
153	{ (PFNRT)RTOnce },
154	#if defined(RT_ARCH_X86) && (defined(RT_OS_SOLARIS) \|\| defined(RT_OS_FREEBSD))
155	{ (PFNRT)__udivdi3 },
156	{ (PFNRT)__umoddi3 },
157	#endif
158	{ NULL }
159	};
160
161	#ifdef RT_OS_SOLARIS
162	/* Dependency information for the native solaris loader. */
163	extern "C" { char _depends_on[] = "vboxdrv"; }
164	#endif
165
166
167	/**
168	* Initialize the module.
169	* This is called when we're first loaded.
170	*
171	* @returns 0 on success.
172	* @returns VBox status on failure.
173	* @param hMod Image handle for use in APIs.
174	*/
175	DECLEXPORT(int) ModuleInit(void *hMod)
176	{
177	VMM_CHECK_SMAP_SETUP();
178	VMM_CHECK_SMAP_CHECK(RT_NOTHING);
179
180	#ifdef VBOX_WITH_DTRACE_R0
181	/*
182	* The first thing to do is register the static tracepoints.
183	* (Deregistration is automatic.)
184	*/
185	int rc2 = SUPR0TracerRegisterModule(hMod, &g_VTGObjHeader);
186	if (RT_FAILURE(rc2))
187	return rc2;
188	#endif
189	LogFlow(("ModuleInit:\n"));
190
191	#ifdef VBOX_WITH_64ON32_CMOS_DEBUG
192	/*
193	* Display the CMOS debug code.
194	*/
195	ASMOutU8(0x72, 0x03);
196	uint8_t bDebugCode = ASMInU8(0x73);
197	LogRel(("CMOS Debug Code: %#x (%d)\n", bDebugCode, bDebugCode));
198	RTLogComPrintf("CMOS Debug Code: %#x (%d)\n", bDebugCode, bDebugCode);
199	#endif
200
201	/*
202	* Initialize the VMM, GVMM, GMM, HM, PGM (Darwin) and INTNET.
203	*/
204	int rc = vmmInitFormatTypes();
205	if (RT_SUCCESS(rc))
206	{
207	VMM_CHECK_SMAP_CHECK(RT_NOTHING);
208	rc = GVMMR0Init();
209	if (RT_SUCCESS(rc))
210	{
211	VMM_CHECK_SMAP_CHECK(RT_NOTHING);
212	rc = GMMR0Init();
213	if (RT_SUCCESS(rc))
214	{
215	VMM_CHECK_SMAP_CHECK(RT_NOTHING);
216	rc = HMR0Init();
217	if (RT_SUCCESS(rc))
218	{
219	VMM_CHECK_SMAP_CHECK(RT_NOTHING);
220
221	PDMR0Init(hMod);
222	VMM_CHECK_SMAP_CHECK(RT_NOTHING);
223
224	rc = PGMRegisterStringFormatTypes();
225	if (RT_SUCCESS(rc))
226	{
227	VMM_CHECK_SMAP_CHECK(RT_NOTHING);
228	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
229	rc = PGMR0DynMapInit();
230	#endif
231	if (RT_SUCCESS(rc))
232	{
233	VMM_CHECK_SMAP_CHECK(RT_NOTHING);
234	rc = IntNetR0Init();
235	if (RT_SUCCESS(rc))
236	{
237	#ifdef VBOX_WITH_PCI_PASSTHROUGH
238	VMM_CHECK_SMAP_CHECK(RT_NOTHING);
239	rc = PciRawR0Init();
240	#endif
241	if (RT_SUCCESS(rc))
242	{
243	VMM_CHECK_SMAP_CHECK(RT_NOTHING);
244	rc = CPUMR0ModuleInit();
245	if (RT_SUCCESS(rc))
246	{
247	#ifdef VBOX_WITH_TRIPLE_FAULT_HACK
248	VMM_CHECK_SMAP_CHECK(RT_NOTHING);
249	rc = vmmR0TripleFaultHackInit();
250	if (RT_SUCCESS(rc))
251	#endif
252	{
253	VMM_CHECK_SMAP_CHECK(rc = VERR_VMM_SMAP_BUT_AC_CLEAR);
254	if (RT_SUCCESS(rc))
255	{
256	LogFlow(("ModuleInit: returns success\n"));
257	return VINF_SUCCESS;
258	}
259	}
260
261	/*
262	* Bail out.
263	*/
264	#ifdef VBOX_WITH_TRIPLE_FAULT_HACK
265	vmmR0TripleFaultHackTerm();
266	#endif
267	}
268	else
269	LogRel(("ModuleInit: CPUMR0ModuleInit -> %Rrc\n", rc));
270	#ifdef VBOX_WITH_PCI_PASSTHROUGH
271	PciRawR0Term();
272	#endif
273	}
274	else
275	LogRel(("ModuleInit: PciRawR0Init -> %Rrc\n", rc));
276	IntNetR0Term();
277	}
278	else
279	LogRel(("ModuleInit: IntNetR0Init -> %Rrc\n", rc));
280	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
281	PGMR0DynMapTerm();
282	#endif
283	}
284	else
285	LogRel(("ModuleInit: PGMR0DynMapInit -> %Rrc\n", rc));
286	PGMDeregisterStringFormatTypes();
287	}
288	else
289	LogRel(("ModuleInit: PGMRegisterStringFormatTypes -> %Rrc\n", rc));
290	HMR0Term();
291	}
292	else
293	LogRel(("ModuleInit: HMR0Init -> %Rrc\n", rc));
294	GMMR0Term();
295	}
296	else
297	LogRel(("ModuleInit: GMMR0Init -> %Rrc\n", rc));
298	GVMMR0Term();
299	}
300	else
301	LogRel(("ModuleInit: GVMMR0Init -> %Rrc\n", rc));
302	vmmTermFormatTypes();
303	}
304	else
305	LogRel(("ModuleInit: vmmInitFormatTypes -> %Rrc\n", rc));
306
307	LogFlow(("ModuleInit: failed %Rrc\n", rc));
308	return rc;
309	}
310
311
312	/**
313	* Terminate the module.
314	* This is called when we're finally unloaded.
315	*
316	* @param hMod Image handle for use in APIs.
317	*/
318	DECLEXPORT(void) ModuleTerm(void *hMod)
319	{
320	NOREF(hMod);
321	LogFlow(("ModuleTerm:\n"));
322
323	/*
324	* Terminate the CPUM module (Local APIC cleanup).
325	*/
326	CPUMR0ModuleTerm();
327
328	/*
329	* Terminate the internal network service.
330	*/
331	IntNetR0Term();
332
333	/*
334	* PGM (Darwin), HM and PciRaw global cleanup.
335	*/
336	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
337	PGMR0DynMapTerm();
338	#endif
339	#ifdef VBOX_WITH_PCI_PASSTHROUGH
340	PciRawR0Term();
341	#endif
342	PGMDeregisterStringFormatTypes();
343	HMR0Term();
344	#ifdef VBOX_WITH_TRIPLE_FAULT_HACK
345	vmmR0TripleFaultHackTerm();
346	#endif
347
348	/*
349	* Destroy the GMM and GVMM instances.
350	*/
351	GMMR0Term();
352	GVMMR0Term();
353
354	vmmTermFormatTypes();
355
356	LogFlow(("ModuleTerm: returns\n"));
357	}
358
359
360	/**
361	* Initiates the R0 driver for a particular VM instance.
362	*
363	* @returns VBox status code.
364	*
365	* @param pGVM The global (ring-0) VM structure.
366	* @param uSvnRev The SVN revision of the ring-3 part.
367	* @param uBuildType Build type indicator.
368	* @thread EMT(0)
369	*/
370	static int vmmR0InitVM(PGVM pGVM, uint32_t uSvnRev, uint32_t uBuildType)
371	{
372	VMM_CHECK_SMAP_SETUP();
373	VMM_CHECK_SMAP_CHECK(return VERR_VMM_SMAP_BUT_AC_CLEAR);
374
375	/*
376	* Match the SVN revisions and build type.
377	*/
378	if (uSvnRev != VMMGetSvnRev())
379	{
380	LogRel(("VMMR0InitVM: Revision mismatch, r3=%d r0=%d\n", uSvnRev, VMMGetSvnRev()));
381	SUPR0Printf("VMMR0InitVM: Revision mismatch, r3=%d r0=%d\n", uSvnRev, VMMGetSvnRev());
382	return VERR_VMM_R0_VERSION_MISMATCH;
383	}
384	if (uBuildType != vmmGetBuildType())
385	{
386	LogRel(("VMMR0InitVM: Build type mismatch, r3=%#x r0=%#x\n", uBuildType, vmmGetBuildType()));
387	SUPR0Printf("VMMR0InitVM: Build type mismatch, r3=%#x r0=%#x\n", uBuildType, vmmGetBuildType());
388	return VERR_VMM_R0_VERSION_MISMATCH;
389	}
390
391	int rc = GVMMR0ValidateGVMandEMT(pGVM, 0 /idCpu/);
392	if (RT_FAILURE(rc))
393	return rc;
394
395	#ifdef LOG_ENABLED
396	/*
397	* Register the EMT R0 logger instance for VCPU 0.
398	*/
399	PVMCPUCC pVCpu = VMCC_GET_CPU_0(pGVM);
400
401	PVMMR0LOGGER pR0Logger = pVCpu->vmm.s.pR0LoggerR0;
402	if (pR0Logger)
403	{
404	# if 0 /* testing of the logger. */
405	LogCom(("vmmR0InitVM: before %p\n", RTLogDefaultInstance()));
406	LogCom(("vmmR0InitVM: pfnFlush=%p actual=%p\n", pR0Logger->Logger.pfnFlush, vmmR0LoggerFlush));
407	LogCom(("vmmR0InitVM: pfnLogger=%p actual=%p\n", pR0Logger->Logger.pfnLogger, vmmR0LoggerWrapper));
408	LogCom(("vmmR0InitVM: offScratch=%d fFlags=%#x fDestFlags=%#x\n", pR0Logger->Logger.offScratch, pR0Logger->Logger.fFlags, pR0Logger->Logger.fDestFlags));
409
410	RTLogSetDefaultInstanceThread(&pR0Logger->Logger, (uintptr_t)pGVM->pSession);
411	LogCom(("vmmR0InitVM: after %p reg\n", RTLogDefaultInstance()));
412	RTLogSetDefaultInstanceThread(NULL, pGVM->pSession);
413	LogCom(("vmmR0InitVM: after %p dereg\n", RTLogDefaultInstance()));
414
415	pR0Logger->Logger.pfnLogger("hello ring-0 logger\n");
416	LogCom(("vmmR0InitVM: returned successfully from direct logger call.\n"));
417	pR0Logger->Logger.pfnFlush(&pR0Logger->Logger);
418	LogCom(("vmmR0InitVM: returned successfully from direct flush call.\n"));
419
420	RTLogSetDefaultInstanceThread(&pR0Logger->Logger, (uintptr_t)pGVM->pSession);
421	LogCom(("vmmR0InitVM: after %p reg2\n", RTLogDefaultInstance()));
422	pR0Logger->Logger.pfnLogger("hello ring-0 logger\n");
423	LogCom(("vmmR0InitVM: returned successfully from direct logger call (2). offScratch=%d\n", pR0Logger->Logger.offScratch));
424	RTLogSetDefaultInstanceThread(NULL, pGVM->pSession);
425	LogCom(("vmmR0InitVM: after %p dereg2\n", RTLogDefaultInstance()));
426
427	RTLogLoggerEx(&pR0Logger->Logger, 0, ~0U, "hello ring-0 logger (RTLogLoggerEx)\n");
428	LogCom(("vmmR0InitVM: RTLogLoggerEx returned fine offScratch=%d\n", pR0Logger->Logger.offScratch));
429
430	RTLogSetDefaultInstanceThread(&pR0Logger->Logger, (uintptr_t)pGVM->pSession);
431	RTLogPrintf("hello ring-0 logger (RTLogPrintf)\n");
432	LogCom(("vmmR0InitVM: RTLogPrintf returned fine offScratch=%d\n", pR0Logger->Logger.offScratch));
433	# endif
434	Log(("Switching to per-thread logging instance %p (key=%p)\n", &pR0Logger->Logger, pGVM->pSession));
435	RTLogSetDefaultInstanceThread(&pR0Logger->Logger, (uintptr_t)pGVM->pSession);
436	pR0Logger->fRegistered = true;
437	}
438	#endif /* LOG_ENABLED */
439
440	/*
441	* Check if the host supports high resolution timers or not.
442	*/
443	if ( pGVM->vmm.s.fUsePeriodicPreemptionTimers
444	&& !RTTimerCanDoHighResolution())
445	pGVM->vmm.s.fUsePeriodicPreemptionTimers = false;
446
447	/*
448	* Initialize the per VM data for GVMM and GMM.
449	*/
450	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
451	rc = GVMMR0InitVM(pGVM);
452	if (RT_SUCCESS(rc))
453	{
454	/*
455	* Init HM, CPUM and PGM (Darwin only).
456	*/
457	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
458	rc = HMR0InitVM(pGVM);
459	if (RT_SUCCESS(rc))
460	VMM_CHECK_SMAP_CHECK2(pGVM, rc = VERR_VMM_RING0_ASSERTION); /* CPUR0InitVM will otherwise panic the host */
461	if (RT_SUCCESS(rc))
462	{
463	rc = CPUMR0InitVM(pGVM);
464	if (RT_SUCCESS(rc))
465	{
466	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
467	rc = PGMR0InitVM(pGVM);
468	if (RT_SUCCESS(rc))
469	{
470	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
471	rc = EMR0InitVM(pGVM);
472	if (RT_SUCCESS(rc))
473	{
474	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
475	#ifdef VBOX_WITH_PCI_PASSTHROUGH
476	rc = PciRawR0InitVM(pGVM);
477	#endif
478	if (RT_SUCCESS(rc))
479	{
480	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
481	rc = GIMR0InitVM(pGVM);
482	if (RT_SUCCESS(rc))
483	{
484	VMM_CHECK_SMAP_CHECK2(pGVM, rc = VERR_VMM_RING0_ASSERTION);
485	if (RT_SUCCESS(rc))
486	{
487	GVMMR0DoneInitVM(pGVM);
488
489	/*
490	* Collect a bit of info for the VM release log.
491	*/
492	pGVM->vmm.s.fIsPreemptPendingApiTrusty = RTThreadPreemptIsPendingTrusty();
493	pGVM->vmm.s.fIsPreemptPossible = RTThreadPreemptIsPossible();;
494
495	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
496	return rc;
497	}
498
499	/* bail out*/
500	GIMR0TermVM(pGVM);
501	}
502	#ifdef VBOX_WITH_PCI_PASSTHROUGH
503	PciRawR0TermVM(pGVM);
504	#endif
505	}
506	}
507	}
508	}
509	HMR0TermVM(pGVM);
510	}
511	}
512
513	RTLogSetDefaultInstanceThread(NULL, (uintptr_t)pGVM->pSession);
514	return rc;
515	}
516
517
518	/**
519	* Does EMT specific VM initialization.
520	*
521	* @returns VBox status code.
522	* @param pGVM The ring-0 VM structure.
523	* @param idCpu The EMT that's calling.
524	*/
525	static int vmmR0InitVMEmt(PGVM pGVM, VMCPUID idCpu)
526	{
527	/* Paranoia (caller checked these already). */
528	AssertReturn(idCpu < pGVM->cCpus, VERR_INVALID_CPU_ID);
529	AssertReturn(pGVM->aCpus[idCpu].hEMT == RTThreadNativeSelf(), VERR_INVALID_CPU_ID);
530
531	#ifdef LOG_ENABLED
532	/*
533	* Registration of ring 0 loggers.
534	*/
535	PVMCPUCC pVCpu = &pGVM->aCpus[idCpu];
536	PVMMR0LOGGER pR0Logger = pVCpu->vmm.s.pR0LoggerR0;
537	if ( pR0Logger
538	&& !pR0Logger->fRegistered)
539	{
540	RTLogSetDefaultInstanceThread(&pR0Logger->Logger, (uintptr_t)pGVM->pSession);
541	pR0Logger->fRegistered = true;
542	}
543	#endif
544
545	return VINF_SUCCESS;
546	}
547
548
549
550	/**
551	* Terminates the R0 bits for a particular VM instance.
552	*
553	* This is normally called by ring-3 as part of the VM termination process, but
554	* may alternatively be called during the support driver session cleanup when
555	* the VM object is destroyed (see GVMM).
556	*
557	* @returns VBox status code.
558	*
559	* @param pGVM The global (ring-0) VM structure.
560	* @param idCpu Set to 0 if EMT(0) or NIL_VMCPUID if session cleanup
561	* thread.
562	* @thread EMT(0) or session clean up thread.
563	*/
564	VMMR0_INT_DECL(int) VMMR0TermVM(PGVM pGVM, VMCPUID idCpu)
565	{
566	/*
567	* Check EMT(0) claim if we're called from userland.
568	*/
569	if (idCpu != NIL_VMCPUID)
570	{
571	AssertReturn(idCpu == 0, VERR_INVALID_CPU_ID);
572	int rc = GVMMR0ValidateGVMandEMT(pGVM, idCpu);
573	if (RT_FAILURE(rc))
574	return rc;
575	}
576
577	#ifdef VBOX_WITH_PCI_PASSTHROUGH
578	PciRawR0TermVM(pGVM);
579	#endif
580
581	/*
582	* Tell GVMM what we're up to and check that we only do this once.
583	*/
584	if (GVMMR0DoingTermVM(pGVM))
585	{
586	GIMR0TermVM(pGVM);
587
588	/** @todo I wish to call PGMR0PhysFlushHandyPages(pGVM, &pGVM->aCpus[idCpu])
589	* here to make sure we don't leak any shared pages if we crash... */
590	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
591	PGMR0DynMapTermVM(pGVM);
592	#endif
593	HMR0TermVM(pGVM);
594	}
595
596	/*
597	* Deregister the logger.
598	*/
599	RTLogSetDefaultInstanceThread(NULL, (uintptr_t)pGVM->pSession);
600	return VINF_SUCCESS;
601	}
602
603
604	/**
605	* An interrupt or unhalt force flag is set, deal with it.
606	*
607	* @returns VINF_SUCCESS (or VINF_EM_HALT).
608	* @param pVCpu The cross context virtual CPU structure.
609	* @param uMWait Result from EMMonitorWaitIsActive().
610	* @param enmInterruptibility Guest CPU interruptbility level.
611	*/
612	static int vmmR0DoHaltInterrupt(PVMCPUCC pVCpu, unsigned uMWait, CPUMINTERRUPTIBILITY enmInterruptibility)
613	{
614	Assert(!TRPMHasTrap(pVCpu));
615	Assert( enmInterruptibility > CPUMINTERRUPTIBILITY_INVALID
616	&& enmInterruptibility < CPUMINTERRUPTIBILITY_END);
617
618	/*
619	* Pending interrupts w/o any SMIs or NMIs? That the usual case.
620	*/
621	if ( VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC)
622	&& !VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_INTERRUPT_SMI \| VMCPU_FF_INTERRUPT_NMI))
623	{
624	if (enmInterruptibility <= CPUMINTERRUPTIBILITY_UNRESTRAINED)
625	{
626	uint8_t u8Interrupt = 0;
627	int rc = PDMGetInterrupt(pVCpu, &u8Interrupt);
628	Log(("vmmR0DoHaltInterrupt: CPU%d u8Interrupt=%d (%#x) rc=%Rrc\n", pVCpu->idCpu, u8Interrupt, u8Interrupt, rc));
629	if (RT_SUCCESS(rc))
630	{
631	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_UNHALT);
632
633	rc = TRPMAssertTrap(pVCpu, u8Interrupt, TRPM_HARDWARE_INT);
634	AssertRCSuccess(rc);
635	STAM_REL_COUNTER_INC(&pVCpu->vmm.s.StatR0HaltExec);
636	return rc;
637	}
638	}
639	}
640	/*
641	* SMI is not implemented yet, at least not here.
642	*/
643	else if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_SMI))
644	{
645	Log12(("vmmR0DoHaltInterrupt: CPU%d failed #3\n", pVCpu->idCpu));
646	STAM_REL_COUNTER_INC(&pVCpu->vmm.s.StatR0HaltToR3);
647	return VINF_EM_HALT;
648	}
649	/*
650	* NMI.
651	*/
652	else if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_NMI))
653	{
654	if (enmInterruptibility < CPUMINTERRUPTIBILITY_NMI_INHIBIT)
655	{
656	/** @todo later. */
657	Log12(("vmmR0DoHaltInterrupt: CPU%d failed #2 (uMWait=%u enmInt=%d)\n", pVCpu->idCpu, uMWait, enmInterruptibility));
658	STAM_REL_COUNTER_INC(&pVCpu->vmm.s.StatR0HaltToR3);
659	return VINF_EM_HALT;
660	}
661	}
662	/*
663	* Nested-guest virtual interrupt.
664	*/
665	else if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_NESTED_GUEST))
666	{
667	if (enmInterruptibility < CPUMINTERRUPTIBILITY_VIRT_INT_DISABLED)
668	{
669	/** @todo NSTVMX: NSTSVM: Remember, we might have to check and perform VM-exits
670	* here before injecting the virtual interrupt. See emR3ForcedActions
671	* for details. */
672	Log12(("vmmR0DoHaltInterrupt: CPU%d failed #1 (uMWait=%u enmInt=%d)\n", pVCpu->idCpu, uMWait, enmInterruptibility));
673	STAM_REL_COUNTER_INC(&pVCpu->vmm.s.StatR0HaltToR3);
674	return VINF_EM_HALT;
675	}
676	}
677
678	if (VMCPU_FF_TEST_AND_CLEAR(pVCpu, VMCPU_FF_UNHALT))
679	{
680	STAM_REL_COUNTER_INC(&pVCpu->vmm.s.StatR0HaltExec);
681	Log11(("vmmR0DoHaltInterrupt: CPU%d success VINF_SUCCESS (UNHALT)\n", pVCpu->idCpu));
682	return VINF_SUCCESS;
683	}
684	if (uMWait > 1)
685	{
686	STAM_REL_COUNTER_INC(&pVCpu->vmm.s.StatR0HaltExec);
687	Log11(("vmmR0DoHaltInterrupt: CPU%d success VINF_SUCCESS (uMWait=%u > 1)\n", pVCpu->idCpu, uMWait));
688	return VINF_SUCCESS;
689	}
690
691	Log12(("vmmR0DoHaltInterrupt: CPU%d failed #0 (uMWait=%u enmInt=%d)\n", pVCpu->idCpu, uMWait, enmInterruptibility));
692	STAM_REL_COUNTER_INC(&pVCpu->vmm.s.StatR0HaltToR3);
693	return VINF_EM_HALT;
694	}
695
696
697	/**
698	* This does one round of vmR3HaltGlobal1Halt().
699	*
700	* The rational here is that we'll reduce latency in interrupt situations if we
701	* don't go to ring-3 immediately on a VINF_EM_HALT (guest executed HLT or
702	* MWAIT), but do one round of blocking here instead and hope the interrupt is
703	* raised in the meanwhile.
704	*
705	* If we go to ring-3 we'll quit the inner HM/NEM loop in EM and end up in the
706	* outer loop, which will then call VMR3WaitHalted() and that in turn will do a
707	* ring-0 call (unless we're too close to a timer event). When the interrupt
708	* wakes us up, we'll return from ring-0 and EM will by instinct do a
709	* rescheduling (because of raw-mode) before it resumes the HM/NEM loop and gets
710	* back to VMMR0EntryFast().
711	*
712	* @returns VINF_SUCCESS or VINF_EM_HALT.
713	* @param pGVM The ring-0 VM structure.
714	* @param pGVCpu The ring-0 virtual CPU structure.
715	*
716	* @todo r=bird: All the blocking/waiting and EMT managment should move out of
717	* the VM module, probably to VMM. Then this would be more weird wrt
718	* parameters and statistics.
719	*/
720	static int vmmR0DoHalt(PGVM pGVM, PGVMCPU pGVCpu)
721	{
722	/*
723	* Do spin stat historization.
724	*/
725	if (++pGVCpu->vmm.s.cR0Halts & 0xff)
726	{ /* likely */ }
727	else if (pGVCpu->vmm.s.cR0HaltsSucceeded > pGVCpu->vmm.s.cR0HaltsToRing3)
728	{
729	pGVCpu->vmm.s.cR0HaltsSucceeded = 2;
730	pGVCpu->vmm.s.cR0HaltsToRing3 = 0;
731	}
732	else
733	{
734	pGVCpu->vmm.s.cR0HaltsSucceeded = 0;
735	pGVCpu->vmm.s.cR0HaltsToRing3 = 2;
736	}
737
738	/*
739	* Flags that makes us go to ring-3.
740	*/
741	uint32_t const fVmFFs = VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA
742	\| VM_FF_DBGF \| VM_FF_REQUEST \| VM_FF_CHECK_VM_STATE
743	\| VM_FF_RESET \| VM_FF_EMT_RENDEZVOUS \| VM_FF_PGM_NEED_HANDY_PAGES
744	\| VM_FF_PGM_NO_MEMORY \| VM_FF_DEBUG_SUSPEND;
745	uint64_t const fCpuFFs = VMCPU_FF_TIMER \| VMCPU_FF_PDM_CRITSECT \| VMCPU_FF_IEM
746	\| VMCPU_FF_REQUEST \| VMCPU_FF_DBGF \| VMCPU_FF_HM_UPDATE_CR3
747	\| VMCPU_FF_HM_UPDATE_PAE_PDPES \| VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL
748	\| VMCPU_FF_TO_R3 \| VMCPU_FF_IOM;
749
750	/*
751	* Check preconditions.
752	*/
753	unsigned const uMWait = EMMonitorWaitIsActive(pGVCpu);
754	CPUMINTERRUPTIBILITY const enmInterruptibility = CPUMGetGuestInterruptibility(pGVCpu);
755	if ( pGVCpu->vmm.s.fMayHaltInRing0
756	&& !TRPMHasTrap(pGVCpu)
757	&& ( enmInterruptibility == CPUMINTERRUPTIBILITY_UNRESTRAINED
758	\|\| uMWait > 1))
759	{
760	if ( !VM_FF_IS_ANY_SET(pGVM, fVmFFs)
761	&& !VMCPU_FF_IS_ANY_SET(pGVCpu, fCpuFFs))
762	{
763	/*
764	* Interrupts pending already?
765	*/
766	if (VMCPU_FF_TEST_AND_CLEAR(pGVCpu, VMCPU_FF_UPDATE_APIC))
767	APICUpdatePendingInterrupts(pGVCpu);
768
769	/*
770	* Flags that wake up from the halted state.
771	*/
772	uint64_t const fIntMask = VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \| VMCPU_FF_INTERRUPT_NESTED_GUEST
773	\| VMCPU_FF_INTERRUPT_NMI \| VMCPU_FF_INTERRUPT_SMI \| VMCPU_FF_UNHALT;
774
775	if (VMCPU_FF_IS_ANY_SET(pGVCpu, fIntMask))
776	return vmmR0DoHaltInterrupt(pGVCpu, uMWait, enmInterruptibility);
777	ASMNopPause();
778
779	/*
780	* Check out how long till the next timer event.
781	*/
782	uint64_t u64Delta;
783	uint64_t u64GipTime = TMTimerPollGIP(pGVM, pGVCpu, &u64Delta);
784
785	if ( !VM_FF_IS_ANY_SET(pGVM, fVmFFs)
786	&& !VMCPU_FF_IS_ANY_SET(pGVCpu, fCpuFFs))
787	{
788	if (VMCPU_FF_TEST_AND_CLEAR(pGVCpu, VMCPU_FF_UPDATE_APIC))
789	APICUpdatePendingInterrupts(pGVCpu);
790
791	if (VMCPU_FF_IS_ANY_SET(pGVCpu, fIntMask))
792	return vmmR0DoHaltInterrupt(pGVCpu, uMWait, enmInterruptibility);
793
794	/*
795	* Wait if there is enough time to the next timer event.
796	*/
797	if (u64Delta >= pGVCpu->vmm.s.cNsSpinBlockThreshold)
798	{
799	/* If there are few other CPU cores around, we will procrastinate a
800	little before going to sleep, hoping for some device raising an
801	interrupt or similar. Though, the best thing here would be to
802	dynamically adjust the spin count according to its usfulness or
803	something... */
804	if ( pGVCpu->vmm.s.cR0HaltsSucceeded > pGVCpu->vmm.s.cR0HaltsToRing3
805	&& RTMpGetOnlineCount() >= 4)
806	{
807	/** @todo Figure out how we can skip this if it hasn't help recently...
808	* @bugref{9172#c12} */
809	uint32_t cSpinLoops = 42;
810	while (cSpinLoops-- > 0)
811	{
812	ASMNopPause();
813	if (VMCPU_FF_TEST_AND_CLEAR(pGVCpu, VMCPU_FF_UPDATE_APIC))
814	APICUpdatePendingInterrupts(pGVCpu);
815	ASMNopPause();
816	if (VM_FF_IS_ANY_SET(pGVM, fVmFFs))
817	{
818	STAM_REL_COUNTER_INC(&pGVCpu->vmm.s.StatR0HaltToR3FromSpin);
819	STAM_REL_COUNTER_INC(&pGVCpu->vmm.s.StatR0HaltToR3);
820	return VINF_EM_HALT;
821	}
822	ASMNopPause();
823	if (VMCPU_FF_IS_ANY_SET(pGVCpu, fCpuFFs))
824	{
825	STAM_REL_COUNTER_INC(&pGVCpu->vmm.s.StatR0HaltToR3FromSpin);
826	STAM_REL_COUNTER_INC(&pGVCpu->vmm.s.StatR0HaltToR3);
827	return VINF_EM_HALT;
828	}
829	ASMNopPause();
830	if (VMCPU_FF_IS_ANY_SET(pGVCpu, fIntMask))
831	{
832	STAM_REL_COUNTER_INC(&pGVCpu->vmm.s.StatR0HaltExecFromSpin);
833	return vmmR0DoHaltInterrupt(pGVCpu, uMWait, enmInterruptibility);
834	}
835	ASMNopPause();
836	}
837	}
838
839	/*
840	* We have to set the state to VMCPUSTATE_STARTED_HALTED here so ring-3
841	* knows when to notify us (cannot access VMINTUSERPERVMCPU::fWait from here).
842	* After changing the state we must recheck the force flags of course.
843	*/
844	if (VMCPU_CMPXCHG_STATE(pGVCpu, VMCPUSTATE_STARTED_HALTED, VMCPUSTATE_STARTED))
845	{
846	if ( !VM_FF_IS_ANY_SET(pGVM, fVmFFs)
847	&& !VMCPU_FF_IS_ANY_SET(pGVCpu, fCpuFFs))
848	{
849	if (VMCPU_FF_TEST_AND_CLEAR(pGVCpu, VMCPU_FF_UPDATE_APIC))
850	APICUpdatePendingInterrupts(pGVCpu);
851
852	if (VMCPU_FF_IS_ANY_SET(pGVCpu, fIntMask))
853	{
854	VMCPU_CMPXCHG_STATE(pGVCpu, VMCPUSTATE_STARTED, VMCPUSTATE_STARTED_HALTED);
855	return vmmR0DoHaltInterrupt(pGVCpu, uMWait, enmInterruptibility);
856	}
857
858	/* Okay, block! */
859	uint64_t const u64StartSchedHalt = RTTimeNanoTS();
860	int rc = GVMMR0SchedHalt(pGVM, pGVCpu, u64GipTime);
861	uint64_t const u64EndSchedHalt = RTTimeNanoTS();
862	uint64_t const cNsElapsedSchedHalt = u64EndSchedHalt - u64StartSchedHalt;
863	Log10(("vmmR0DoHalt: CPU%d: halted %llu ns\n", pGVCpu->idCpu, cNsElapsedSchedHalt));
864
865	VMCPU_CMPXCHG_STATE(pGVCpu, VMCPUSTATE_STARTED, VMCPUSTATE_STARTED_HALTED);
866	STAM_REL_PROFILE_ADD_PERIOD(&pGVCpu->vmm.s.StatR0HaltBlock, cNsElapsedSchedHalt);
867	if ( rc == VINF_SUCCESS
868	\|\| rc == VERR_INTERRUPTED)
869	{
870	/* Keep some stats like ring-3 does. */
871	int64_t const cNsOverslept = u64EndSchedHalt - u64GipTime;
872	if (cNsOverslept > 50000)
873	STAM_REL_PROFILE_ADD_PERIOD(&pGVCpu->vmm.s.StatR0HaltBlockOverslept, cNsOverslept);
874	else if (cNsOverslept < -50000)
875	STAM_REL_PROFILE_ADD_PERIOD(&pGVCpu->vmm.s.StatR0HaltBlockInsomnia, cNsElapsedSchedHalt);
876	else
877	STAM_REL_PROFILE_ADD_PERIOD(&pGVCpu->vmm.s.StatR0HaltBlockOnTime, cNsElapsedSchedHalt);
878
879	/*
880	* Recheck whether we can resume execution or have to go to ring-3.
881	*/
882	if ( !VM_FF_IS_ANY_SET(pGVM, fVmFFs)
883	&& !VMCPU_FF_IS_ANY_SET(pGVCpu, fCpuFFs))
884	{
885	if (VMCPU_FF_TEST_AND_CLEAR(pGVCpu, VMCPU_FF_UPDATE_APIC))
886	APICUpdatePendingInterrupts(pGVCpu);
887	if (VMCPU_FF_IS_ANY_SET(pGVCpu, fIntMask))
888	{
889	STAM_REL_COUNTER_INC(&pGVCpu->vmm.s.StatR0HaltExecFromBlock);
890	return vmmR0DoHaltInterrupt(pGVCpu, uMWait, enmInterruptibility);
891	}
892	STAM_REL_COUNTER_INC(&pGVCpu->vmm.s.StatR0HaltToR3PostNoInt);
893	Log12(("vmmR0DoHalt: CPU%d post #2 - No pending interrupt\n", pGVCpu->idCpu));
894	}
895	else
896	{
897	STAM_REL_COUNTER_INC(&pGVCpu->vmm.s.StatR0HaltToR3PostPendingFF);
898	Log12(("vmmR0DoHalt: CPU%d post #1 - Pending FF\n", pGVCpu->idCpu));
899	}
900	}
901	else
902	{
903	STAM_REL_COUNTER_INC(&pGVCpu->vmm.s.StatR0HaltToR3Other);
904	Log12(("vmmR0DoHalt: CPU%d GVMMR0SchedHalt failed: %Rrc\n", pGVCpu->idCpu, rc));
905	}
906	}
907	else
908	{
909	VMCPU_CMPXCHG_STATE(pGVCpu, VMCPUSTATE_STARTED, VMCPUSTATE_STARTED_HALTED);
910	STAM_REL_COUNTER_INC(&pGVCpu->vmm.s.StatR0HaltToR3PendingFF);
911	Log12(("vmmR0DoHalt: CPU%d failed #5 - Pending FF\n", pGVCpu->idCpu));
912	}
913	}
914	else
915	{
916	STAM_REL_COUNTER_INC(&pGVCpu->vmm.s.StatR0HaltToR3Other);
917	Log12(("vmmR0DoHalt: CPU%d failed #4 - enmState=%d\n", pGVCpu->idCpu, VMCPU_GET_STATE(pGVCpu)));
918	}
919	}
920	else
921	{
922	STAM_REL_COUNTER_INC(&pGVCpu->vmm.s.StatR0HaltToR3SmallDelta);
923	Log12(("vmmR0DoHalt: CPU%d failed #3 - delta too small: %RU64\n", pGVCpu->idCpu, u64Delta));
924	}
925	}
926	else
927	{
928	STAM_REL_COUNTER_INC(&pGVCpu->vmm.s.StatR0HaltToR3PendingFF);
929	Log12(("vmmR0DoHalt: CPU%d failed #2 - Pending FF\n", pGVCpu->idCpu));
930	}
931	}
932	else
933	{
934	STAM_REL_COUNTER_INC(&pGVCpu->vmm.s.StatR0HaltToR3PendingFF);
935	Log12(("vmmR0DoHalt: CPU%d failed #1 - Pending FF\n", pGVCpu->idCpu));
936	}
937	}
938	else
939	{
940	STAM_REL_COUNTER_INC(&pGVCpu->vmm.s.StatR0HaltToR3Other);
941	Log12(("vmmR0DoHalt: CPU%d failed #0 - fMayHaltInRing0=%d TRPMHasTrap=%d enmInt=%d uMWait=%u\n",
942	pGVCpu->idCpu, pGVCpu->vmm.s.fMayHaltInRing0, TRPMHasTrap(pGVCpu), enmInterruptibility, uMWait));
943	}
944
945	STAM_REL_COUNTER_INC(&pGVCpu->vmm.s.StatR0HaltToR3);
946	return VINF_EM_HALT;
947	}
948
949
950	/**
951	* VMM ring-0 thread-context callback.
952	*
953	* This does common HM state updating and calls the HM-specific thread-context
954	* callback.
955	*
956	* @param enmEvent The thread-context event.
957	* @param pvUser Opaque pointer to the VMCPU.
958	*
959	* @thread EMT(pvUser)
960	*/
961	static DECLCALLBACK(void) vmmR0ThreadCtxCallback(RTTHREADCTXEVENT enmEvent, void *pvUser)
962	{
963	PVMCPUCC pVCpu = (PVMCPUCC)pvUser;
964
965	switch (enmEvent)
966	{
967	case RTTHREADCTXEVENT_IN:
968	{
969	/*
970	* Linux may call us with preemption enabled (really!) but technically we
971	* cannot get preempted here, otherwise we end up in an infinite recursion
972	* scenario (i.e. preempted in resume hook -> preempt hook -> resume hook...
973	* ad infinitum). Let's just disable preemption for now...
974	*/
975	/** @todo r=bird: I don't believe the above. The linux code is clearly enabling
976	* preemption after doing the callout (one or two functions up the
977	* call chain). */
978	/** @todo r=ramshankar: See @bugref{5313#c30}. */
979	RTTHREADPREEMPTSTATE ParanoidPreemptState = RTTHREADPREEMPTSTATE_INITIALIZER;
980	RTThreadPreemptDisable(&ParanoidPreemptState);
981
982	/* We need to update the VCPU <-> host CPU mapping. */
983	RTCPUID idHostCpu;
984	uint32_t iHostCpuSet = RTMpCurSetIndexAndId(&idHostCpu);
985	pVCpu->iHostCpuSet = iHostCpuSet;
986	ASMAtomicWriteU32(&pVCpu->idHostCpu, idHostCpu);
987
988	/* In the very unlikely event that the GIP delta for the CPU we're
989	rescheduled needs calculating, try force a return to ring-3.
990	We unfortunately cannot do the measurements right here. */
991	if (RT_UNLIKELY(SUPIsTscDeltaAvailableForCpuSetIndex(iHostCpuSet)))
992	VMCPU_FF_SET(pVCpu, VMCPU_FF_TO_R3);
993
994	/* Invoke the HM-specific thread-context callback. */
995	HMR0ThreadCtxCallback(enmEvent, pvUser);
996
997	/* Restore preemption. */
998	RTThreadPreemptRestore(&ParanoidPreemptState);
999	break;
1000	}
1001
1002	case RTTHREADCTXEVENT_OUT:
1003	{
1004	/* Invoke the HM-specific thread-context callback. */
1005	HMR0ThreadCtxCallback(enmEvent, pvUser);
1006
1007	/*
1008	* Sigh. See VMMGetCpu() used by VMCPU_ASSERT_EMT(). We cannot let several VCPUs
1009	* have the same host CPU associated with it.
1010	*/
1011	pVCpu->iHostCpuSet = UINT32_MAX;
1012	ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID);
1013	break;
1014	}
1015
1016	default:
1017	/* Invoke the HM-specific thread-context callback. */
1018	HMR0ThreadCtxCallback(enmEvent, pvUser);
1019	break;
1020	}
1021	}
1022
1023
1024	/**
1025	* Creates thread switching hook for the current EMT thread.
1026	*
1027	* This is called by GVMMR0CreateVM and GVMMR0RegisterVCpu. If the host
1028	* platform does not implement switcher hooks, no hooks will be create and the
1029	* member set to NIL_RTTHREADCTXHOOK.
1030	*
1031	* @returns VBox status code.
1032	* @param pVCpu The cross context virtual CPU structure.
1033	* @thread EMT(pVCpu)
1034	*/
1035	VMMR0_INT_DECL(int) VMMR0ThreadCtxHookCreateForEmt(PVMCPUCC pVCpu)
1036	{
1037	VMCPU_ASSERT_EMT(pVCpu);
1038	Assert(pVCpu->vmm.s.hCtxHook == NIL_RTTHREADCTXHOOK);
1039
1040	#if 1 /* To disable this stuff change to zero. */
1041	int rc = RTThreadCtxHookCreate(&pVCpu->vmm.s.hCtxHook, 0, vmmR0ThreadCtxCallback, pVCpu);
1042	if (RT_SUCCESS(rc))
1043	return rc;
1044	#else
1045	RT_NOREF(vmmR0ThreadCtxCallback);
1046	int rc = VERR_NOT_SUPPORTED;
1047	#endif
1048
1049	pVCpu->vmm.s.hCtxHook = NIL_RTTHREADCTXHOOK;
1050	if (rc == VERR_NOT_SUPPORTED)
1051	return VINF_SUCCESS;
1052
1053	LogRelMax(32, ("RTThreadCtxHookCreate failed! rc=%Rrc pVCpu=%p idCpu=%RU32\n", rc, pVCpu, pVCpu->idCpu));
1054	return VINF_SUCCESS; /* Just ignore it, we can live without context hooks. */
1055	}
1056
1057
1058	/**
1059	* Destroys the thread switching hook for the specified VCPU.
1060	*
1061	* @param pVCpu The cross context virtual CPU structure.
1062	* @remarks Can be called from any thread.
1063	*/
1064	VMMR0_INT_DECL(void) VMMR0ThreadCtxHookDestroyForEmt(PVMCPUCC pVCpu)
1065	{
1066	int rc = RTThreadCtxHookDestroy(pVCpu->vmm.s.hCtxHook);
1067	AssertRC(rc);
1068	pVCpu->vmm.s.hCtxHook = NIL_RTTHREADCTXHOOK;
1069	}
1070
1071
1072	/**
1073	* Disables the thread switching hook for this VCPU (if we got one).
1074	*
1075	* @param pVCpu The cross context virtual CPU structure.
1076	* @thread EMT(pVCpu)
1077	*
1078	* @remarks This also clears VMCPU::idHostCpu, so the mapping is invalid after
1079	* this call. This means you have to be careful with what you do!
1080	*/
1081	VMMR0_INT_DECL(void) VMMR0ThreadCtxHookDisable(PVMCPUCC pVCpu)
1082	{
1083	/*
1084	* Clear the VCPU <-> host CPU mapping as we've left HM context.
1085	* @bugref{7726#c19} explains the need for this trick:
1086	*
1087	* VMXR0CallRing3Callback/SVMR0CallRing3Callback &
1088	* hmR0VmxLeaveSession/hmR0SvmLeaveSession disables context hooks during
1089	* longjmp & normal return to ring-3, which opens a window where we may be
1090	* rescheduled without changing VMCPUID::idHostCpu and cause confusion if
1091	* the CPU starts executing a different EMT. Both functions first disables
1092	* preemption and then calls HMR0LeaveCpu which invalids idHostCpu, leaving
1093	* an opening for getting preempted.
1094	*/
1095	/** @todo Make HM not need this API! Then we could leave the hooks enabled
1096	* all the time. */
1097	/** @todo move this into the context hook disabling if(). */
1098	ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID);
1099
1100	/*
1101	* Disable the context hook, if we got one.
1102	*/
1103	if (pVCpu->vmm.s.hCtxHook != NIL_RTTHREADCTXHOOK)
1104	{
1105	Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
1106	int rc = RTThreadCtxHookDisable(pVCpu->vmm.s.hCtxHook);
1107	AssertRC(rc);
1108	}
1109	}
1110
1111
1112	/**
1113	* Internal version of VMMR0ThreadCtxHooksAreRegistered.
1114	*
1115	* @returns true if registered, false otherwise.
1116	* @param pVCpu The cross context virtual CPU structure.
1117	*/
1118	DECLINLINE(bool) vmmR0ThreadCtxHookIsEnabled(PVMCPUCC pVCpu)
1119	{
1120	return RTThreadCtxHookIsEnabled(pVCpu->vmm.s.hCtxHook);
1121	}
1122
1123
1124	/**
1125	* Whether thread-context hooks are registered for this VCPU.
1126	*
1127	* @returns true if registered, false otherwise.
1128	* @param pVCpu The cross context virtual CPU structure.
1129	*/
1130	VMMR0_INT_DECL(bool) VMMR0ThreadCtxHookIsEnabled(PVMCPUCC pVCpu)
1131	{
1132	return vmmR0ThreadCtxHookIsEnabled(pVCpu);
1133	}
1134
1135
1136	/**
1137	* Returns the ring-0 release logger instance.
1138	*
1139	* @returns Pointer to release logger, NULL if not configured.
1140	* @param pVCpu The cross context virtual CPU structure of the caller.
1141	* @thread EMT(pVCpu)
1142	*/
1143	VMMR0_INT_DECL(PRTLOGGER) VMMR0GetReleaseLogger(PVMCPUCC pVCpu)
1144	{
1145	PVMMR0LOGGER pLogger = pVCpu->vmm.s.pR0RelLoggerR0;
1146	if (pLogger)
1147	return &pLogger->Logger;
1148	return NULL;
1149	}
1150
1151
1152	#ifdef VBOX_WITH_STATISTICS
1153	/**
1154	* Record return code statistics
1155	* @param pVM The cross context VM structure.
1156	* @param pVCpu The cross context virtual CPU structure.
1157	* @param rc The status code.
1158	*/
1159	static void vmmR0RecordRC(PVMCC pVM, PVMCPUCC pVCpu, int rc)
1160	{
1161	/*
1162	* Collect statistics.
1163	*/
1164	switch (rc)
1165	{
1166	case VINF_SUCCESS:
1167	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetNormal);
1168	break;
1169	case VINF_EM_RAW_INTERRUPT:
1170	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetInterrupt);
1171	break;
1172	case VINF_EM_RAW_INTERRUPT_HYPER:
1173	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetInterruptHyper);
1174	break;
1175	case VINF_EM_RAW_GUEST_TRAP:
1176	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetGuestTrap);
1177	break;
1178	case VINF_EM_RAW_RING_SWITCH:
1179	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetRingSwitch);
1180	break;
1181	case VINF_EM_RAW_RING_SWITCH_INT:
1182	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetRingSwitchInt);
1183	break;
1184	case VINF_EM_RAW_STALE_SELECTOR:
1185	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetStaleSelector);
1186	break;
1187	case VINF_EM_RAW_IRET_TRAP:
1188	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetIRETTrap);
1189	break;
1190	case VINF_IOM_R3_IOPORT_READ:
1191	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetIORead);
1192	break;
1193	case VINF_IOM_R3_IOPORT_WRITE:
1194	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetIOWrite);
1195	break;
1196	case VINF_IOM_R3_IOPORT_COMMIT_WRITE:
1197	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetIOCommitWrite);
1198	break;
1199	case VINF_IOM_R3_MMIO_READ:
1200	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMMIORead);
1201	break;
1202	case VINF_IOM_R3_MMIO_WRITE:
1203	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMMIOWrite);
1204	break;
1205	case VINF_IOM_R3_MMIO_COMMIT_WRITE:
1206	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMMIOCommitWrite);
1207	break;
1208	case VINF_IOM_R3_MMIO_READ_WRITE:
1209	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMMIOReadWrite);
1210	break;
1211	case VINF_PATM_HC_MMIO_PATCH_READ:
1212	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMMIOPatchRead);
1213	break;
1214	case VINF_PATM_HC_MMIO_PATCH_WRITE:
1215	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMMIOPatchWrite);
1216	break;
1217	case VINF_CPUM_R3_MSR_READ:
1218	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMSRRead);
1219	break;
1220	case VINF_CPUM_R3_MSR_WRITE:
1221	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMSRWrite);
1222	break;
1223	case VINF_EM_RAW_EMULATE_INSTR:
1224	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetEmulate);
1225	break;
1226	case VINF_PATCH_EMULATE_INSTR:
1227	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPatchEmulate);
1228	break;
1229	case VINF_EM_RAW_EMULATE_INSTR_LDT_FAULT:
1230	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetLDTFault);
1231	break;
1232	case VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT:
1233	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetGDTFault);
1234	break;
1235	case VINF_EM_RAW_EMULATE_INSTR_IDT_FAULT:
1236	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetIDTFault);
1237	break;
1238	case VINF_EM_RAW_EMULATE_INSTR_TSS_FAULT:
1239	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetTSSFault);
1240	break;
1241	case VINF_CSAM_PENDING_ACTION:
1242	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetCSAMTask);
1243	break;
1244	case VINF_PGM_SYNC_CR3:
1245	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetSyncCR3);
1246	break;
1247	case VINF_PATM_PATCH_INT3:
1248	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPatchInt3);
1249	break;
1250	case VINF_PATM_PATCH_TRAP_PF:
1251	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPatchPF);
1252	break;
1253	case VINF_PATM_PATCH_TRAP_GP:
1254	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPatchGP);
1255	break;
1256	case VINF_PATM_PENDING_IRQ_AFTER_IRET:
1257	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPatchIretIRQ);
1258	break;
1259	case VINF_EM_RESCHEDULE_REM:
1260	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetRescheduleREM);
1261	break;
1262	case VINF_EM_RAW_TO_R3:
1263	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3Total);
1264	if (VM_FF_IS_SET(pVM, VM_FF_TM_VIRTUAL_SYNC))
1265	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3TMVirt);
1266	else if (VM_FF_IS_SET(pVM, VM_FF_PGM_NEED_HANDY_PAGES))
1267	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3HandyPages);
1268	else if (VM_FF_IS_SET(pVM, VM_FF_PDM_QUEUES))
1269	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3PDMQueues);
1270	else if (VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS))
1271	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3Rendezvous);
1272	else if (VM_FF_IS_SET(pVM, VM_FF_PDM_DMA))
1273	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3DMA);
1274	else if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TIMER))
1275	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3Timer);
1276	else if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PDM_CRITSECT))
1277	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3CritSect);
1278	else if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3))
1279	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3FF);
1280	else if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_IEM))
1281	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3Iem);
1282	else if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_IOM))
1283	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3Iom);
1284	else
1285	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3Unknown);
1286	break;
1287
1288	case VINF_EM_RAW_TIMER_PENDING:
1289	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetTimerPending);
1290	break;
1291	case VINF_EM_RAW_INTERRUPT_PENDING:
1292	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetInterruptPending);
1293	break;
1294	case VINF_VMM_CALL_HOST:
1295	switch (pVCpu->vmm.s.enmCallRing3Operation)
1296	{
1297	case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
1298	STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallPDMCritSectEnter);
1299	break;
1300	case VMMCALLRING3_PDM_LOCK:
1301	STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallPDMLock);
1302	break;
1303	case VMMCALLRING3_PGM_POOL_GROW:
1304	STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallPGMPoolGrow);
1305	break;
1306	case VMMCALLRING3_PGM_LOCK:
1307	STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallPGMLock);
1308	break;
1309	case VMMCALLRING3_PGM_MAP_CHUNK:
1310	STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallPGMMapChunk);
1311	break;
1312	case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
1313	STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallPGMAllocHandy);
1314	break;
1315	case VMMCALLRING3_VMM_LOGGER_FLUSH:
1316	STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallLogFlush);
1317	break;
1318	case VMMCALLRING3_VM_SET_ERROR:
1319	STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallVMSetError);
1320	break;
1321	case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
1322	STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallVMSetRuntimeError);
1323	break;
1324	case VMMCALLRING3_VM_R0_ASSERTION:
1325	default:
1326	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetCallRing3);
1327	break;
1328	}
1329	break;
1330	case VINF_PATM_DUPLICATE_FUNCTION:
1331	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPATMDuplicateFn);
1332	break;
1333	case VINF_PGM_CHANGE_MODE:
1334	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPGMChangeMode);
1335	break;
1336	case VINF_PGM_POOL_FLUSH_PENDING:
1337	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPGMFlushPending);
1338	break;
1339	case VINF_EM_PENDING_REQUEST:
1340	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPendingRequest);
1341	break;
1342	case VINF_EM_HM_PATCH_TPR_INSTR:
1343	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPatchTPR);
1344	break;
1345	default:
1346	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMisc);
1347	break;
1348	}
1349	}
1350	#endif /* VBOX_WITH_STATISTICS */
1351
1352
1353	/**
1354	* The Ring 0 entry point, called by the fast-ioctl path.
1355	*
1356	* @param pGVM The global (ring-0) VM structure.
1357	* @param pVMIgnored The cross context VM structure. The return code is
1358	* stored in pVM->vmm.s.iLastGZRc.
1359	* @param idCpu The Virtual CPU ID of the calling EMT.
1360	* @param enmOperation Which operation to execute.
1361	* @remarks Assume called with interrupts _enabled_.
1362	*/
1363	VMMR0DECL(void) VMMR0EntryFast(PGVM pGVM, PVMCC pVMIgnored, VMCPUID idCpu, VMMR0OPERATION enmOperation)
1364	{
1365	RT_NOREF(pVMIgnored);
1366
1367	/*
1368	* Validation.
1369	*/
1370	if ( idCpu < pGVM->cCpus
1371	&& pGVM->cCpus == pGVM->cCpusUnsafe)
1372	{ /likely/ }
1373	else
1374	{
1375	SUPR0Printf("VMMR0EntryFast: Bad idCpu=%#x cCpus=%#x cCpusUnsafe=%#x\n", idCpu, pGVM->cCpus, pGVM->cCpusUnsafe);
1376	return;
1377	}
1378
1379	PGVMCPU pGVCpu = &pGVM->aCpus[idCpu];
1380	RTNATIVETHREAD const hNativeThread = RTThreadNativeSelf();
1381	if (RT_LIKELY( pGVCpu->hEMT == hNativeThread
1382	&& pGVCpu->hNativeThreadR0 == hNativeThread))
1383	{ /* likely */ }
1384	else
1385	{
1386	SUPR0Printf("VMMR0EntryFast: Bad thread idCpu=%#x hNativeSelf=%p pGVCpu->hEmt=%p pGVCpu->hNativeThreadR0=%p\n",
1387	idCpu, hNativeThread, pGVCpu->hEMT, pGVCpu->hNativeThreadR0);
1388	return;
1389	}
1390
1391	/*
1392	* SMAP fun.
1393	*/
1394	VMM_CHECK_SMAP_SETUP();
1395	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1396
1397	/*
1398	* Perform requested operation.
1399	*/
1400	switch (enmOperation)
1401	{
1402	/*
1403	* Run guest code using the available hardware acceleration technology.
1404	*/
1405	case VMMR0_DO_HM_RUN:
1406	{
1407	for (;;) /* hlt loop */
1408	{
1409	/*
1410	* Disable preemption.
1411	*/
1412	Assert(!vmmR0ThreadCtxHookIsEnabled(pGVCpu));
1413	RTTHREADPREEMPTSTATE PreemptState = RTTHREADPREEMPTSTATE_INITIALIZER;
1414	RTThreadPreemptDisable(&PreemptState);
1415
1416	/*
1417	* Get the host CPU identifiers, make sure they are valid and that
1418	* we've got a TSC delta for the CPU.
1419	*/
1420	RTCPUID idHostCpu;
1421	uint32_t iHostCpuSet = RTMpCurSetIndexAndId(&idHostCpu);
1422	if (RT_LIKELY( iHostCpuSet < RTCPUSET_MAX_CPUS
1423	&& SUPIsTscDeltaAvailableForCpuSetIndex(iHostCpuSet)))
1424	{
1425	pGVCpu->iHostCpuSet = iHostCpuSet;
1426	ASMAtomicWriteU32(&pGVCpu->idHostCpu, idHostCpu);
1427
1428	/*
1429	* Update the periodic preemption timer if it's active.
1430	*/
1431	if (pGVM->vmm.s.fUsePeriodicPreemptionTimers)
1432	GVMMR0SchedUpdatePeriodicPreemptionTimer(pGVM, pGVCpu->idHostCpu, TMCalcHostTimerFrequency(pGVM, pGVCpu));
1433	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1434
1435	#ifdef VMM_R0_TOUCH_FPU
1436	/*
1437	* Make sure we've got the FPU state loaded so and we don't need to clear
1438	* CR0.TS and get out of sync with the host kernel when loading the guest
1439	* FPU state. @ref sec_cpum_fpu (CPUM.cpp) and @bugref{4053}.
1440	*/
1441	CPUMR0TouchHostFpu();
1442	#endif
1443	int rc;
1444	bool fPreemptRestored = false;
1445	if (!HMR0SuspendPending())
1446	{
1447	/*
1448	* Enable the context switching hook.
1449	*/
1450	if (pGVCpu->vmm.s.hCtxHook != NIL_RTTHREADCTXHOOK)
1451	{
1452	Assert(!RTThreadCtxHookIsEnabled(pGVCpu->vmm.s.hCtxHook));
1453	int rc2 = RTThreadCtxHookEnable(pGVCpu->vmm.s.hCtxHook); AssertRC(rc2);
1454	}
1455
1456	/*
1457	* Enter HM context.
1458	*/
1459	rc = HMR0Enter(pGVCpu);
1460	if (RT_SUCCESS(rc))
1461	{
1462	VMCPU_SET_STATE(pGVCpu, VMCPUSTATE_STARTED_HM);
1463
1464	/*
1465	* When preemption hooks are in place, enable preemption now that
1466	* we're in HM context.
1467	*/
1468	if (vmmR0ThreadCtxHookIsEnabled(pGVCpu))
1469	{
1470	fPreemptRestored = true;
1471	RTThreadPreemptRestore(&PreemptState);
1472	}
1473
1474	/*
1475	* Setup the longjmp machinery and execute guest code (calls HMR0RunGuestCode).
1476	*/
1477	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1478	rc = vmmR0CallRing3SetJmp(&pGVCpu->vmm.s.CallRing3JmpBufR0, HMR0RunGuestCode, pGVM, pGVCpu);
1479	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1480
1481	/*
1482	* Assert sanity on the way out. Using manual assertions code here as normal
1483	* assertions are going to panic the host since we're outside the setjmp/longjmp zone.
1484	*/
1485	if (RT_UNLIKELY( VMCPU_GET_STATE(pGVCpu) != VMCPUSTATE_STARTED_HM
1486	&& RT_SUCCESS_NP(rc) && rc != VINF_VMM_CALL_HOST ))
1487	{
1488	pGVM->vmm.s.szRing0AssertMsg1[0] = '\0';
1489	RTStrPrintf(pGVM->vmm.s.szRing0AssertMsg2, sizeof(pGVM->vmm.s.szRing0AssertMsg2),
1490	"Got VMCPU state %d expected %d.\n", VMCPU_GET_STATE(pGVCpu), VMCPUSTATE_STARTED_HM);
1491	rc = VERR_VMM_WRONG_HM_VMCPU_STATE;
1492	}
1493	/** @todo Get rid of this. HM shouldn't disable the context hook. */
1494	else if (RT_UNLIKELY(vmmR0ThreadCtxHookIsEnabled(pGVCpu)))
1495	{
1496	pGVM->vmm.s.szRing0AssertMsg1[0] = '\0';
1497	RTStrPrintf(pGVM->vmm.s.szRing0AssertMsg2, sizeof(pGVM->vmm.s.szRing0AssertMsg2),
1498	"Thread-context hooks still enabled! VCPU=%p Id=%u rc=%d.\n", pGVCpu, pGVCpu->idCpu, rc);
1499	rc = VERR_INVALID_STATE;
1500	}
1501
1502	VMCPU_SET_STATE(pGVCpu, VMCPUSTATE_STARTED);
1503	}
1504	STAM_COUNTER_INC(&pGVM->vmm.s.StatRunGC);
1505
1506	/*
1507	* Invalidate the host CPU identifiers before we disable the context
1508	* hook / restore preemption.
1509	*/
1510	pGVCpu->iHostCpuSet = UINT32_MAX;
1511	ASMAtomicWriteU32(&pGVCpu->idHostCpu, NIL_RTCPUID);
1512
1513	/*
1514	* Disable context hooks. Due to unresolved cleanup issues, we
1515	* cannot leave the hooks enabled when we return to ring-3.
1516	*
1517	* Note! At the moment HM may also have disabled the hook
1518	* when we get here, but the IPRT API handles that.
1519	*/
1520	if (pGVCpu->vmm.s.hCtxHook != NIL_RTTHREADCTXHOOK)
1521	{
1522	ASMAtomicWriteU32(&pGVCpu->idHostCpu, NIL_RTCPUID);
1523	RTThreadCtxHookDisable(pGVCpu->vmm.s.hCtxHook);
1524	}
1525	}
1526	/*
1527	* The system is about to go into suspend mode; go back to ring 3.
1528	*/
1529	else
1530	{
1531	rc = VINF_EM_RAW_INTERRUPT;
1532	pGVCpu->iHostCpuSet = UINT32_MAX;
1533	ASMAtomicWriteU32(&pGVCpu->idHostCpu, NIL_RTCPUID);
1534	}
1535
1536	/** @todo When HM stops messing with the context hook state, we'll disable
1537	* preemption again before the RTThreadCtxHookDisable call. */
1538	if (!fPreemptRestored)
1539	RTThreadPreemptRestore(&PreemptState);
1540
1541	pGVCpu->vmm.s.iLastGZRc = rc;
1542
1543	/* Fire dtrace probe and collect statistics. */
1544	VBOXVMM_R0_VMM_RETURN_TO_RING3_HM(pGVCpu, CPUMQueryGuestCtxPtr(pGVCpu), rc);
1545	#ifdef VBOX_WITH_STATISTICS
1546	vmmR0RecordRC(pGVM, pGVCpu, rc);
1547	#endif
1548	/*
1549	* If this is a halt.
1550	*/
1551	if (rc != VINF_EM_HALT)
1552	{ /* we're not in a hurry for a HLT, so prefer this path */ }
1553	else
1554	{
1555	pGVCpu->vmm.s.iLastGZRc = rc = vmmR0DoHalt(pGVM, pGVCpu);
1556	if (rc == VINF_SUCCESS)
1557	{
1558	pGVCpu->vmm.s.cR0HaltsSucceeded++;
1559	continue;
1560	}
1561	pGVCpu->vmm.s.cR0HaltsToRing3++;
1562	}
1563	}
1564	/*
1565	* Invalid CPU set index or TSC delta in need of measuring.
1566	*/
1567	else
1568	{
1569	pGVCpu->iHostCpuSet = UINT32_MAX;
1570	ASMAtomicWriteU32(&pGVCpu->idHostCpu, NIL_RTCPUID);
1571	RTThreadPreemptRestore(&PreemptState);
1572	if (iHostCpuSet < RTCPUSET_MAX_CPUS)
1573	{
1574	int rc = SUPR0TscDeltaMeasureBySetIndex(pGVM->pSession, iHostCpuSet, 0 /fFlags/,
1575	2 /cMsWaitRetry/, 5RT_MS_1SEC /cMsWaitThread*/,
1576	0 /default cTries/);
1577	if (RT_SUCCESS(rc) \|\| rc == VERR_CPU_OFFLINE)
1578	pGVCpu->vmm.s.iLastGZRc = VINF_EM_RAW_TO_R3;
1579	else
1580	pGVCpu->vmm.s.iLastGZRc = rc;
1581	}
1582	else
1583	pGVCpu->vmm.s.iLastGZRc = VERR_INVALID_CPU_INDEX;
1584	}
1585	break;
1586
1587	} /* halt loop. */
1588	break;
1589	}
1590
1591	#ifdef VBOX_WITH_NEM_R0
1592	# if defined(RT_ARCH_AMD64) && defined(RT_OS_WINDOWS)
1593	case VMMR0_DO_NEM_RUN:
1594	{
1595	/*
1596	* Setup the longjmp machinery and execute guest code (calls NEMR0RunGuestCode).
1597	*/
1598	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1599	# ifdef VBOXSTRICTRC_STRICT_ENABLED
1600	int rc = vmmR0CallRing3SetJmp2(&pGVCpu->vmm.s.CallRing3JmpBufR0, (PFNVMMR0SETJMP2)NEMR0RunGuestCode, pGVM, idCpu);
1601	# else
1602	int rc = vmmR0CallRing3SetJmp2(&pGVCpu->vmm.s.CallRing3JmpBufR0, NEMR0RunGuestCode, pGVM, idCpu);
1603	# endif
1604	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1605	STAM_COUNTER_INC(&pGVM->vmm.s.StatRunGC);
1606
1607	pGVCpu->vmm.s.iLastGZRc = rc;
1608
1609	/*
1610	* Fire dtrace probe and collect statistics.
1611	*/
1612	VBOXVMM_R0_VMM_RETURN_TO_RING3_NEM(pGVCpu, CPUMQueryGuestCtxPtr(pGVCpu), rc);
1613	# ifdef VBOX_WITH_STATISTICS
1614	vmmR0RecordRC(pGVM, pGVCpu, rc);
1615	# endif
1616	break;
1617	}
1618	# endif
1619	#endif
1620
1621	/*
1622	* For profiling.
1623	*/
1624	case VMMR0_DO_NOP:
1625	pGVCpu->vmm.s.iLastGZRc = VINF_SUCCESS;
1626	break;
1627
1628	/*
1629	* Shouldn't happen.
1630	*/
1631	default:
1632	AssertMsgFailed(("%#x\n", enmOperation));
1633	pGVCpu->vmm.s.iLastGZRc = VERR_NOT_SUPPORTED;
1634	break;
1635	}
1636	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1637	}
1638
1639
1640	/**
1641	* Validates a session or VM session argument.
1642	*
1643	* @returns true / false accordingly.
1644	* @param pGVM The global (ring-0) VM structure.
1645	* @param pClaimedSession The session claim to validate.
1646	* @param pSession The session argument.
1647	*/
1648	DECLINLINE(bool) vmmR0IsValidSession(PGVM pGVM, PSUPDRVSESSION pClaimedSession, PSUPDRVSESSION pSession)
1649	{
1650	/* This must be set! */
1651	if (!pSession)
1652	return false;
1653
1654	/* Only one out of the two. */
1655	if (pGVM && pClaimedSession)
1656	return false;
1657	if (pGVM)
1658	pClaimedSession = pGVM->pSession;
1659	return pClaimedSession == pSession;
1660	}
1661
1662
1663	/**
1664	* VMMR0EntryEx worker function, either called directly or when ever possible
1665	* called thru a longjmp so we can exit safely on failure.
1666	*
1667	* @returns VBox status code.
1668	* @param pGVM The global (ring-0) VM structure.
1669	* @param idCpu Virtual CPU ID argument. Must be NIL_VMCPUID if pVM
1670	* is NIL_RTR0PTR, and may be NIL_VMCPUID if it isn't
1671	* @param enmOperation Which operation to execute.
1672	* @param pReqHdr This points to a SUPVMMR0REQHDR packet. Optional.
1673	* The support driver validates this if it's present.
1674	* @param u64Arg Some simple constant argument.
1675	* @param pSession The session of the caller.
1676	*
1677	* @remarks Assume called with interrupts _enabled_.
1678	*/
1679	static int vmmR0EntryExWorker(PGVM pGVM, VMCPUID idCpu, VMMR0OPERATION enmOperation,
1680	PSUPVMMR0REQHDR pReqHdr, uint64_t u64Arg, PSUPDRVSESSION pSession)
1681	{
1682	/*
1683	* Validate pGVM and idCpu for consistency and validity.
1684	*/
1685	if (pGVM != NULL)
1686	{
1687	if (RT_LIKELY(((uintptr_t)pGVM & PAGE_OFFSET_MASK) == 0))
1688	{ /* likely */ }
1689	else
1690	{
1691	SUPR0Printf("vmmR0EntryExWorker: Invalid pGVM=%p! (op=%d)\n", pGVM, enmOperation);
1692	return VERR_INVALID_POINTER;
1693	}
1694
1695	if (RT_LIKELY(idCpu == NIL_VMCPUID \|\| idCpu < pGVM->cCpus))
1696	{ /* likely */ }
1697	else
1698	{
1699	SUPR0Printf("vmmR0EntryExWorker: Invalid idCpu %#x (cCpus=%#x)\n", idCpu, pGVM->cCpus);
1700	return VERR_INVALID_PARAMETER;
1701	}
1702
1703	if (RT_LIKELY( pGVM->enmVMState >= VMSTATE_CREATING
1704	&& pGVM->enmVMState <= VMSTATE_TERMINATED
1705	&& pGVM->pSession == pSession
1706	&& pGVM->pSelf == pGVM))
1707	{ /* likely */ }
1708	else
1709	{
1710	SUPR0Printf("vmmR0EntryExWorker: Invalid pGVM=%p:{.enmVMState=%d, .cCpus=%#x, .pSession=%p(==%p), .pSelf=%p(==%p)}! (op=%d)\n",
1711	pGVM, pGVM->enmVMState, pGVM->cCpus, pGVM->pSession, pSession, pGVM->pSelf, pGVM, enmOperation);
1712	return VERR_INVALID_POINTER;
1713	}
1714	}
1715	else if (RT_LIKELY(idCpu == NIL_VMCPUID))
1716	{ /* likely */ }
1717	else
1718	{
1719	SUPR0Printf("vmmR0EntryExWorker: Invalid idCpu=%u\n", idCpu);
1720	return VERR_INVALID_PARAMETER;
1721	}
1722
1723	/*
1724	* SMAP fun.
1725	*/
1726	VMM_CHECK_SMAP_SETUP();
1727	VMM_CHECK_SMAP_CHECK(RT_NOTHING);
1728
1729	/*
1730	* Process the request.
1731	*/
1732	int rc;
1733	switch (enmOperation)
1734	{
1735	/*
1736	* GVM requests
1737	*/
1738	case VMMR0_DO_GVMM_CREATE_VM:
1739	if (pGVM == NULL && u64Arg == 0 && idCpu == NIL_VMCPUID)
1740	rc = GVMMR0CreateVMReq((PGVMMCREATEVMREQ)pReqHdr, pSession);
1741	else
1742	rc = VERR_INVALID_PARAMETER;
1743	VMM_CHECK_SMAP_CHECK(RT_NOTHING);
1744	break;
1745
1746	case VMMR0_DO_GVMM_DESTROY_VM:
1747	if (pReqHdr == NULL && u64Arg == 0)
1748	rc = GVMMR0DestroyVM(pGVM);
1749	else
1750	rc = VERR_INVALID_PARAMETER;
1751	VMM_CHECK_SMAP_CHECK(RT_NOTHING);
1752	break;
1753
1754	case VMMR0_DO_GVMM_REGISTER_VMCPU:
1755	if (pGVM != NULL)
1756	rc = GVMMR0RegisterVCpu(pGVM, idCpu);
1757	else
1758	rc = VERR_INVALID_PARAMETER;
1759	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1760	break;
1761
1762	case VMMR0_DO_GVMM_DEREGISTER_VMCPU:
1763	if (pGVM != NULL)
1764	rc = GVMMR0DeregisterVCpu(pGVM, idCpu);
1765	else
1766	rc = VERR_INVALID_PARAMETER;
1767	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1768	break;
1769
1770	case VMMR0_DO_GVMM_SCHED_HALT:
1771	if (pReqHdr)
1772	return VERR_INVALID_PARAMETER;
1773	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1774	rc = GVMMR0SchedHaltReq(pGVM, idCpu, u64Arg);
1775	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1776	break;
1777
1778	case VMMR0_DO_GVMM_SCHED_WAKE_UP:
1779	if (pReqHdr \|\| u64Arg)
1780	return VERR_INVALID_PARAMETER;
1781	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1782	rc = GVMMR0SchedWakeUp(pGVM, idCpu);
1783	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1784	break;
1785
1786	case VMMR0_DO_GVMM_SCHED_POKE:
1787	if (pReqHdr \|\| u64Arg)
1788	return VERR_INVALID_PARAMETER;
1789	rc = GVMMR0SchedPoke(pGVM, idCpu);
1790	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1791	break;
1792
1793	case VMMR0_DO_GVMM_SCHED_WAKE_UP_AND_POKE_CPUS:
1794	if (u64Arg)
1795	return VERR_INVALID_PARAMETER;
1796	rc = GVMMR0SchedWakeUpAndPokeCpusReq(pGVM, (PGVMMSCHEDWAKEUPANDPOKECPUSREQ)pReqHdr);
1797	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1798	break;
1799
1800	case VMMR0_DO_GVMM_SCHED_POLL:
1801	if (pReqHdr \|\| u64Arg > 1)
1802	return VERR_INVALID_PARAMETER;
1803	rc = GVMMR0SchedPoll(pGVM, idCpu, !!u64Arg);
1804	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1805	break;
1806
1807	case VMMR0_DO_GVMM_QUERY_STATISTICS:
1808	if (u64Arg)
1809	return VERR_INVALID_PARAMETER;
1810	rc = GVMMR0QueryStatisticsReq(pGVM, (PGVMMQUERYSTATISTICSSREQ)pReqHdr, pSession);
1811	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1812	break;
1813
1814	case VMMR0_DO_GVMM_RESET_STATISTICS:
1815	if (u64Arg)
1816	return VERR_INVALID_PARAMETER;
1817	rc = GVMMR0ResetStatisticsReq(pGVM, (PGVMMRESETSTATISTICSSREQ)pReqHdr, pSession);
1818	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1819	break;
1820
1821	/*
1822	* Initialize the R0 part of a VM instance.
1823	*/
1824	case VMMR0_DO_VMMR0_INIT:
1825	rc = vmmR0InitVM(pGVM, RT_LODWORD(u64Arg), RT_HIDWORD(u64Arg));
1826	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1827	break;
1828
1829	/*
1830	* Does EMT specific ring-0 init.
1831	*/
1832	case VMMR0_DO_VMMR0_INIT_EMT:
1833	rc = vmmR0InitVMEmt(pGVM, idCpu);
1834	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1835	break;
1836
1837	/*
1838	* Terminate the R0 part of a VM instance.
1839	*/
1840	case VMMR0_DO_VMMR0_TERM:
1841	rc = VMMR0TermVM(pGVM, 0 /idCpu/);
1842	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1843	break;
1844
1845	/*
1846	* Attempt to enable hm mode and check the current setting.
1847	*/
1848	case VMMR0_DO_HM_ENABLE:
1849	rc = HMR0EnableAllCpus(pGVM);
1850	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1851	break;
1852
1853	/*
1854	* Setup the hardware accelerated session.
1855	*/
1856	case VMMR0_DO_HM_SETUP_VM:
1857	rc = HMR0SetupVM(pGVM);
1858	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1859	break;
1860
1861	/*
1862	* PGM wrappers.
1863	*/
1864	case VMMR0_DO_PGM_ALLOCATE_HANDY_PAGES:
1865	if (idCpu == NIL_VMCPUID)
1866	return VERR_INVALID_CPU_ID;
1867	rc = PGMR0PhysAllocateHandyPages(pGVM, idCpu);
1868	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1869	break;
1870
1871	case VMMR0_DO_PGM_FLUSH_HANDY_PAGES:
1872	if (idCpu == NIL_VMCPUID)
1873	return VERR_INVALID_CPU_ID;
1874	rc = PGMR0PhysFlushHandyPages(pGVM, idCpu);
1875	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1876	break;
1877
1878	case VMMR0_DO_PGM_ALLOCATE_LARGE_HANDY_PAGE:
1879	if (idCpu == NIL_VMCPUID)
1880	return VERR_INVALID_CPU_ID;
1881	rc = PGMR0PhysAllocateLargeHandyPage(pGVM, idCpu);
1882	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1883	break;
1884
1885	case VMMR0_DO_PGM_PHYS_SETUP_IOMMU:
1886	if (idCpu != 0)
1887	return VERR_INVALID_CPU_ID;
1888	rc = PGMR0PhysSetupIoMmu(pGVM);
1889	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1890	break;
1891
1892	case VMMR0_DO_PGM_POOL_GROW:
1893	if (idCpu == NIL_VMCPUID)
1894	return VERR_INVALID_CPU_ID;
1895	rc = PGMR0PoolGrow(pGVM);
1896	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1897	break;
1898
1899	/*
1900	* GMM wrappers.
1901	*/
1902	case VMMR0_DO_GMM_INITIAL_RESERVATION:
1903	if (u64Arg)
1904	return VERR_INVALID_PARAMETER;
1905	rc = GMMR0InitialReservationReq(pGVM, idCpu, (PGMMINITIALRESERVATIONREQ)pReqHdr);
1906	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1907	break;
1908
1909	case VMMR0_DO_GMM_UPDATE_RESERVATION:
1910	if (u64Arg)
1911	return VERR_INVALID_PARAMETER;
1912	rc = GMMR0UpdateReservationReq(pGVM, idCpu, (PGMMUPDATERESERVATIONREQ)pReqHdr);
1913	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1914	break;
1915
1916	case VMMR0_DO_GMM_ALLOCATE_PAGES:
1917	if (u64Arg)
1918	return VERR_INVALID_PARAMETER;
1919	rc = GMMR0AllocatePagesReq(pGVM, idCpu, (PGMMALLOCATEPAGESREQ)pReqHdr);
1920	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1921	break;
1922
1923	case VMMR0_DO_GMM_FREE_PAGES:
1924	if (u64Arg)
1925	return VERR_INVALID_PARAMETER;
1926	rc = GMMR0FreePagesReq(pGVM, idCpu, (PGMMFREEPAGESREQ)pReqHdr);
1927	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1928	break;
1929
1930	case VMMR0_DO_GMM_FREE_LARGE_PAGE:
1931	if (u64Arg)
1932	return VERR_INVALID_PARAMETER;
1933	rc = GMMR0FreeLargePageReq(pGVM, idCpu, (PGMMFREELARGEPAGEREQ)pReqHdr);
1934	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1935	break;
1936
1937	case VMMR0_DO_GMM_QUERY_HYPERVISOR_MEM_STATS:
1938	if (u64Arg)
1939	return VERR_INVALID_PARAMETER;
1940	rc = GMMR0QueryHypervisorMemoryStatsReq((PGMMMEMSTATSREQ)pReqHdr);
1941	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1942	break;
1943
1944	case VMMR0_DO_GMM_QUERY_MEM_STATS:
1945	if (idCpu == NIL_VMCPUID)
1946	return VERR_INVALID_CPU_ID;
1947	if (u64Arg)
1948	return VERR_INVALID_PARAMETER;
1949	rc = GMMR0QueryMemoryStatsReq(pGVM, idCpu, (PGMMMEMSTATSREQ)pReqHdr);
1950	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1951	break;
1952
1953	case VMMR0_DO_GMM_BALLOONED_PAGES:
1954	if (u64Arg)
1955	return VERR_INVALID_PARAMETER;
1956	rc = GMMR0BalloonedPagesReq(pGVM, idCpu, (PGMMBALLOONEDPAGESREQ)pReqHdr);
1957	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1958	break;
1959
1960	case VMMR0_DO_GMM_MAP_UNMAP_CHUNK:
1961	if (u64Arg)
1962	return VERR_INVALID_PARAMETER;
1963	rc = GMMR0MapUnmapChunkReq(pGVM, (PGMMMAPUNMAPCHUNKREQ)pReqHdr);
1964	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1965	break;
1966
1967	case VMMR0_DO_GMM_SEED_CHUNK:
1968	if (pReqHdr)
1969	return VERR_INVALID_PARAMETER;
1970	rc = GMMR0SeedChunk(pGVM, idCpu, (RTR3PTR)u64Arg);
1971	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1972	break;
1973
1974	case VMMR0_DO_GMM_REGISTER_SHARED_MODULE:
1975	if (idCpu == NIL_VMCPUID)
1976	return VERR_INVALID_CPU_ID;
1977	if (u64Arg)
1978	return VERR_INVALID_PARAMETER;
1979	rc = GMMR0RegisterSharedModuleReq(pGVM, idCpu, (PGMMREGISTERSHAREDMODULEREQ)pReqHdr);
1980	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1981	break;
1982
1983	case VMMR0_DO_GMM_UNREGISTER_SHARED_MODULE:
1984	if (idCpu == NIL_VMCPUID)
1985	return VERR_INVALID_CPU_ID;
1986	if (u64Arg)
1987	return VERR_INVALID_PARAMETER;
1988	rc = GMMR0UnregisterSharedModuleReq(pGVM, idCpu, (PGMMUNREGISTERSHAREDMODULEREQ)pReqHdr);
1989	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
1990	break;
1991
1992	case VMMR0_DO_GMM_RESET_SHARED_MODULES:
1993	if (idCpu == NIL_VMCPUID)
1994	return VERR_INVALID_CPU_ID;
1995	if ( u64Arg
1996	\|\| pReqHdr)
1997	return VERR_INVALID_PARAMETER;
1998	rc = GMMR0ResetSharedModules(pGVM, idCpu);
1999	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2000	break;
2001
2002	#ifdef VBOX_WITH_PAGE_SHARING
2003	case VMMR0_DO_GMM_CHECK_SHARED_MODULES:
2004	{
2005	if (idCpu == NIL_VMCPUID)
2006	return VERR_INVALID_CPU_ID;
2007	if ( u64Arg
2008	\|\| pReqHdr)
2009	return VERR_INVALID_PARAMETER;
2010	rc = GMMR0CheckSharedModules(pGVM, idCpu);
2011	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2012	break;
2013	}
2014	#endif
2015
2016	#if defined(VBOX_STRICT) && HC_ARCH_BITS == 64
2017	case VMMR0_DO_GMM_FIND_DUPLICATE_PAGE:
2018	if (u64Arg)
2019	return VERR_INVALID_PARAMETER;
2020	rc = GMMR0FindDuplicatePageReq(pGVM, (PGMMFINDDUPLICATEPAGEREQ)pReqHdr);
2021	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2022	break;
2023	#endif
2024
2025	case VMMR0_DO_GMM_QUERY_STATISTICS:
2026	if (u64Arg)
2027	return VERR_INVALID_PARAMETER;
2028	rc = GMMR0QueryStatisticsReq(pGVM, (PGMMQUERYSTATISTICSSREQ)pReqHdr);
2029	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2030	break;
2031
2032	case VMMR0_DO_GMM_RESET_STATISTICS:
2033	if (u64Arg)
2034	return VERR_INVALID_PARAMETER;
2035	rc = GMMR0ResetStatisticsReq(pGVM, (PGMMRESETSTATISTICSSREQ)pReqHdr);
2036	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2037	break;
2038
2039	/*
2040	* A quick GCFGM mock-up.
2041	*/
2042	/** @todo GCFGM with proper access control, ring-3 management interface and all that. */
2043	case VMMR0_DO_GCFGM_SET_VALUE:
2044	case VMMR0_DO_GCFGM_QUERY_VALUE:
2045	{
2046	if (pGVM \|\| !pReqHdr \|\| u64Arg \|\| idCpu != NIL_VMCPUID)
2047	return VERR_INVALID_PARAMETER;
2048	PGCFGMVALUEREQ pReq = (PGCFGMVALUEREQ)pReqHdr;
2049	if (pReq->Hdr.cbReq != sizeof(*pReq))
2050	return VERR_INVALID_PARAMETER;
2051	if (enmOperation == VMMR0_DO_GCFGM_SET_VALUE)
2052	{
2053	rc = GVMMR0SetConfig(pReq->pSession, &pReq->szName[0], pReq->u64Value);
2054	//if (rc == VERR_CFGM_VALUE_NOT_FOUND)
2055	// rc = GMMR0SetConfig(pReq->pSession, &pReq->szName[0], pReq->u64Value);
2056	}
2057	else
2058	{
2059	rc = GVMMR0QueryConfig(pReq->pSession, &pReq->szName[0], &pReq->u64Value);
2060	//if (rc == VERR_CFGM_VALUE_NOT_FOUND)
2061	// rc = GMMR0QueryConfig(pReq->pSession, &pReq->szName[0], &pReq->u64Value);
2062	}
2063	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2064	break;
2065	}
2066
2067	/*
2068	* PDM Wrappers.
2069	*/
2070	case VMMR0_DO_PDM_DRIVER_CALL_REQ_HANDLER:
2071	{
2072	if (!pReqHdr \|\| u64Arg \|\| idCpu != NIL_VMCPUID)
2073	return VERR_INVALID_PARAMETER;
2074	rc = PDMR0DriverCallReqHandler(pGVM, (PPDMDRIVERCALLREQHANDLERREQ)pReqHdr);
2075	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2076	break;
2077	}
2078
2079	case VMMR0_DO_PDM_DEVICE_CREATE:
2080	{
2081	if (!pReqHdr \|\| u64Arg \|\| idCpu != 0)
2082	return VERR_INVALID_PARAMETER;
2083	rc = PDMR0DeviceCreateReqHandler(pGVM, (PPDMDEVICECREATEREQ)pReqHdr);
2084	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2085	break;
2086	}
2087
2088	case VMMR0_DO_PDM_DEVICE_GEN_CALL:
2089	{
2090	if (!pReqHdr \|\| u64Arg)
2091	return VERR_INVALID_PARAMETER;
2092	rc = PDMR0DeviceGenCallReqHandler(pGVM, (PPDMDEVICEGENCALLREQ)pReqHdr, idCpu);
2093	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2094	break;
2095	}
2096
2097	/** @todo Remove the once all devices has been converted to new style! @bugref{9218} */
2098	case VMMR0_DO_PDM_DEVICE_COMPAT_SET_CRITSECT:
2099	{
2100	if (!pReqHdr \|\| u64Arg \|\| idCpu != 0)
2101	return VERR_INVALID_PARAMETER;
2102	rc = PDMR0DeviceCompatSetCritSectReqHandler(pGVM, (PPDMDEVICECOMPATSETCRITSECTREQ)pReqHdr);
2103	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2104	break;
2105	}
2106
2107	/*
2108	* Requests to the internal networking service.
2109	*/
2110	case VMMR0_DO_INTNET_OPEN:
2111	{
2112	PINTNETOPENREQ pReq = (PINTNETOPENREQ)pReqHdr;
2113	if (u64Arg \|\| !pReq \|\| !vmmR0IsValidSession(pGVM, pReq->pSession, pSession) \|\| idCpu != NIL_VMCPUID)
2114	return VERR_INVALID_PARAMETER;
2115	rc = IntNetR0OpenReq(pSession, pReq);
2116	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2117	break;
2118	}
2119
2120	case VMMR0_DO_INTNET_IF_CLOSE:
2121	if (u64Arg \|\| !pReqHdr \|\| !vmmR0IsValidSession(pGVM, ((PINTNETIFCLOSEREQ)pReqHdr)->pSession, pSession) \|\| idCpu != NIL_VMCPUID)
2122	return VERR_INVALID_PARAMETER;
2123	rc = IntNetR0IfCloseReq(pSession, (PINTNETIFCLOSEREQ)pReqHdr);
2124	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2125	break;
2126
2127
2128	case VMMR0_DO_INTNET_IF_GET_BUFFER_PTRS:
2129	if (u64Arg \|\| !pReqHdr \|\| !vmmR0IsValidSession(pGVM, ((PINTNETIFGETBUFFERPTRSREQ)pReqHdr)->pSession, pSession) \|\| idCpu != NIL_VMCPUID)
2130	return VERR_INVALID_PARAMETER;
2131	rc = IntNetR0IfGetBufferPtrsReq(pSession, (PINTNETIFGETBUFFERPTRSREQ)pReqHdr);
2132	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2133	break;
2134
2135	case VMMR0_DO_INTNET_IF_SET_PROMISCUOUS_MODE:
2136	if (u64Arg \|\| !pReqHdr \|\| !vmmR0IsValidSession(pGVM, ((PINTNETIFSETPROMISCUOUSMODEREQ)pReqHdr)->pSession, pSession) \|\| idCpu != NIL_VMCPUID)
2137	return VERR_INVALID_PARAMETER;
2138	rc = IntNetR0IfSetPromiscuousModeReq(pSession, (PINTNETIFSETPROMISCUOUSMODEREQ)pReqHdr);
2139	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2140	break;
2141
2142	case VMMR0_DO_INTNET_IF_SET_MAC_ADDRESS:
2143	if (u64Arg \|\| !pReqHdr \|\| !vmmR0IsValidSession(pGVM, ((PINTNETIFSETMACADDRESSREQ)pReqHdr)->pSession, pSession) \|\| idCpu != NIL_VMCPUID)
2144	return VERR_INVALID_PARAMETER;
2145	rc = IntNetR0IfSetMacAddressReq(pSession, (PINTNETIFSETMACADDRESSREQ)pReqHdr);
2146	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2147	break;
2148
2149	case VMMR0_DO_INTNET_IF_SET_ACTIVE:
2150	if (u64Arg \|\| !pReqHdr \|\| !vmmR0IsValidSession(pGVM, ((PINTNETIFSETACTIVEREQ)pReqHdr)->pSession, pSession) \|\| idCpu != NIL_VMCPUID)
2151	return VERR_INVALID_PARAMETER;
2152	rc = IntNetR0IfSetActiveReq(pSession, (PINTNETIFSETACTIVEREQ)pReqHdr);
2153	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2154	break;
2155
2156	case VMMR0_DO_INTNET_IF_SEND:
2157	if (u64Arg \|\| !pReqHdr \|\| !vmmR0IsValidSession(pGVM, ((PINTNETIFSENDREQ)pReqHdr)->pSession, pSession) \|\| idCpu != NIL_VMCPUID)
2158	return VERR_INVALID_PARAMETER;
2159	rc = IntNetR0IfSendReq(pSession, (PINTNETIFSENDREQ)pReqHdr);
2160	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2161	break;
2162
2163	case VMMR0_DO_INTNET_IF_WAIT:
2164	if (u64Arg \|\| !pReqHdr \|\| !vmmR0IsValidSession(pGVM, ((PINTNETIFWAITREQ)pReqHdr)->pSession, pSession) \|\| idCpu != NIL_VMCPUID)
2165	return VERR_INVALID_PARAMETER;
2166	rc = IntNetR0IfWaitReq(pSession, (PINTNETIFWAITREQ)pReqHdr);
2167	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2168	break;
2169
2170	case VMMR0_DO_INTNET_IF_ABORT_WAIT:
2171	if (u64Arg \|\| !pReqHdr \|\| !vmmR0IsValidSession(pGVM, ((PINTNETIFWAITREQ)pReqHdr)->pSession, pSession) \|\| idCpu != NIL_VMCPUID)
2172	return VERR_INVALID_PARAMETER;
2173	rc = IntNetR0IfAbortWaitReq(pSession, (PINTNETIFABORTWAITREQ)pReqHdr);
2174	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2175	break;
2176
2177	#if 0 //def VBOX_WITH_PCI_PASSTHROUGH
2178	/*
2179	* Requests to host PCI driver service.
2180	*/
2181	case VMMR0_DO_PCIRAW_REQ:
2182	if (u64Arg \|\| !pReqHdr \|\| !vmmR0IsValidSession(pGVM, ((PPCIRAWSENDREQ)pReqHdr)->pSession, pSession) \|\| idCpu != NIL_VMCPUID)
2183	return VERR_INVALID_PARAMETER;
2184	rc = PciRawR0ProcessReq(pGVM, pSession, (PPCIRAWSENDREQ)pReqHdr);
2185	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2186	break;
2187	#endif
2188
2189	/*
2190	* NEM requests.
2191	*/
2192	#ifdef VBOX_WITH_NEM_R0
2193	# if defined(RT_ARCH_AMD64) && defined(RT_OS_WINDOWS)
2194	case VMMR0_DO_NEM_INIT_VM:
2195	if (u64Arg \|\| pReqHdr \|\| idCpu != 0)
2196	return VERR_INVALID_PARAMETER;
2197	rc = NEMR0InitVM(pGVM);
2198	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2199	break;
2200
2201	case VMMR0_DO_NEM_INIT_VM_PART_2:
2202	if (u64Arg \|\| pReqHdr \|\| idCpu != 0)
2203	return VERR_INVALID_PARAMETER;
2204	rc = NEMR0InitVMPart2(pGVM);
2205	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2206	break;
2207
2208	case VMMR0_DO_NEM_MAP_PAGES:
2209	if (u64Arg \|\| pReqHdr \|\| idCpu == NIL_VMCPUID)
2210	return VERR_INVALID_PARAMETER;
2211	rc = NEMR0MapPages(pGVM, idCpu);
2212	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2213	break;
2214
2215	case VMMR0_DO_NEM_UNMAP_PAGES:
2216	if (u64Arg \|\| pReqHdr \|\| idCpu == NIL_VMCPUID)
2217	return VERR_INVALID_PARAMETER;
2218	rc = NEMR0UnmapPages(pGVM, idCpu);
2219	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2220	break;
2221
2222	case VMMR0_DO_NEM_EXPORT_STATE:
2223	if (u64Arg \|\| pReqHdr \|\| idCpu == NIL_VMCPUID)
2224	return VERR_INVALID_PARAMETER;
2225	rc = NEMR0ExportState(pGVM, idCpu);
2226	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2227	break;
2228
2229	case VMMR0_DO_NEM_IMPORT_STATE:
2230	if (pReqHdr \|\| idCpu == NIL_VMCPUID)
2231	return VERR_INVALID_PARAMETER;
2232	rc = NEMR0ImportState(pGVM, idCpu, u64Arg);
2233	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2234	break;
2235
2236	case VMMR0_DO_NEM_QUERY_CPU_TICK:
2237	if (u64Arg \|\| pReqHdr \|\| idCpu == NIL_VMCPUID)
2238	return VERR_INVALID_PARAMETER;
2239	rc = NEMR0QueryCpuTick(pGVM, idCpu);
2240	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2241	break;
2242
2243	case VMMR0_DO_NEM_RESUME_CPU_TICK_ON_ALL:
2244	if (pReqHdr \|\| idCpu == NIL_VMCPUID)
2245	return VERR_INVALID_PARAMETER;
2246	rc = NEMR0ResumeCpuTickOnAll(pGVM, idCpu, u64Arg);
2247	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2248	break;
2249
2250	case VMMR0_DO_NEM_UPDATE_STATISTICS:
2251	if (u64Arg \|\| pReqHdr)
2252	return VERR_INVALID_PARAMETER;
2253	rc = NEMR0UpdateStatistics(pGVM, idCpu);
2254	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2255	break;
2256
2257	# if 1 && defined(DEBUG_bird)
2258	case VMMR0_DO_NEM_EXPERIMENT:
2259	if (pReqHdr)
2260	return VERR_INVALID_PARAMETER;
2261	rc = NEMR0DoExperiment(pGVM, idCpu, u64Arg);
2262	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2263	break;
2264	# endif
2265	# endif
2266	#endif
2267
2268	/*
2269	* IOM requests.
2270	*/
2271	case VMMR0_DO_IOM_GROW_IO_PORTS:
2272	{
2273	if (pReqHdr \|\| idCpu != 0)
2274	return VERR_INVALID_PARAMETER;
2275	rc = IOMR0IoPortGrowRegistrationTables(pGVM, u64Arg);
2276	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2277	break;
2278	}
2279
2280	case VMMR0_DO_IOM_GROW_IO_PORT_STATS:
2281	{
2282	if (pReqHdr \|\| idCpu != 0)
2283	return VERR_INVALID_PARAMETER;
2284	rc = IOMR0IoPortGrowStatisticsTable(pGVM, u64Arg);
2285	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2286	break;
2287	}
2288
2289	case VMMR0_DO_IOM_GROW_MMIO_REGS:
2290	{
2291	if (pReqHdr \|\| idCpu != 0)
2292	return VERR_INVALID_PARAMETER;
2293	rc = IOMR0MmioGrowRegistrationTables(pGVM, u64Arg);
2294	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2295	break;
2296	}
2297
2298	case VMMR0_DO_IOM_GROW_MMIO_STATS:
2299	{
2300	if (pReqHdr \|\| idCpu != 0)
2301	return VERR_INVALID_PARAMETER;
2302	rc = IOMR0MmioGrowStatisticsTable(pGVM, u64Arg);
2303	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2304	break;
2305	}
2306
2307	case VMMR0_DO_IOM_SYNC_STATS_INDICES:
2308	{
2309	if (pReqHdr \|\| idCpu != 0)
2310	return VERR_INVALID_PARAMETER;
2311	rc = IOMR0IoPortSyncStatisticsIndices(pGVM);
2312	if (RT_SUCCESS(rc))
2313	rc = IOMR0MmioSyncStatisticsIndices(pGVM);
2314	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2315	break;
2316	}
2317
2318	/*
2319	* DBGF requests.
2320	*/
2321	#ifdef VBOX_WITH_DBGF_TRACING
2322	case VMMR0_DO_DBGF_TRACER_CREATE:
2323	{
2324	if (!pReqHdr \|\| u64Arg \|\| idCpu != 0)
2325	return VERR_INVALID_PARAMETER;
2326	rc = DBGFR0TracerCreateReqHandler(pGVM, (PDBGFTRACERCREATEREQ)pReqHdr);
2327	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2328	break;
2329	}
2330
2331	case VMMR0_DO_DBGF_TRACER_CALL_REQ_HANDLER:
2332	{
2333	if (!pReqHdr \|\| u64Arg)
2334	return VERR_INVALID_PARAMETER;
2335	# if 0 /** @todo */
2336	rc = DBGFR0TracerGenCallReqHandler(pGVM, (PDBGFTRACERGENCALLREQ)pReqHdr, idCpu);
2337	# else
2338	rc = VERR_NOT_IMPLEMENTED;
2339	# endif
2340	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2341	break;
2342	}
2343	#endif
2344
2345	case VMMR0_DO_DBGF_BP_INIT:
2346	{
2347	if (!pReqHdr \|\| u64Arg \|\| idCpu != 0)
2348	return VERR_INVALID_PARAMETER;
2349	rc = DBGFR0BpInitReqHandler(pGVM, (PDBGFBPINITREQ)pReqHdr);
2350	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2351	break;
2352	}
2353
2354	case VMMR0_DO_DBGF_BP_CHUNK_ALLOC:
2355	{
2356	if (!pReqHdr \|\| u64Arg \|\| idCpu != 0)
2357	return VERR_INVALID_PARAMETER;
2358	rc = DBGFR0BpChunkAllocReqHandler(pGVM, (PDBGFBPCHUNKALLOCREQ)pReqHdr);
2359	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2360	break;
2361	}
2362
2363	case VMMR0_DO_DBGF_BP_L2_TBL_CHUNK_ALLOC:
2364	{
2365	if (!pReqHdr \|\| u64Arg \|\| idCpu != 0)
2366	return VERR_INVALID_PARAMETER;
2367	rc = DBGFR0BpL2TblChunkAllocReqHandler(pGVM, (PDBGFBPL2TBLCHUNKALLOCREQ)pReqHdr);
2368	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2369	break;
2370	}
2371
2372	case VMMR0_DO_DBGF_BP_OWNER_INIT:
2373	{
2374	if (!pReqHdr \|\| u64Arg \|\| idCpu != 0)
2375	return VERR_INVALID_PARAMETER;
2376	rc = DBGFR0BpOwnerInitReqHandler(pGVM, (PDBGFBPOWNERINITREQ)pReqHdr);
2377	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2378	break;
2379	}
2380
2381	/*
2382	* TM requests.
2383	*/
2384	case VMMR0_DO_TM_GROW_TIMER_QUEUE:
2385	{
2386	if (pReqHdr \|\| idCpu == NIL_VMCPUID)
2387	return VERR_INVALID_PARAMETER;
2388	rc = TMR0TimerQueueGrow(pGVM, RT_HI_U32(u64Arg), RT_LO_U32(u64Arg));
2389	VMM_CHECK_SMAP_CHECK2(pGVM, RT_NOTHING);
2390	break;
2391	}
2392
2393	/*
2394	* For profiling.
2395	*/
2396	case VMMR0_DO_NOP:
2397	case VMMR0_DO_SLOW_NOP:
2398	return VINF_SUCCESS;
2399
2400	/*
2401	* For testing Ring-0 APIs invoked in this environment.
2402	*/
2403	case VMMR0_DO_TESTS:
2404	/** @todo make new test */
2405	return VINF_SUCCESS;
2406
2407	default:
2408	/*
2409	* We're returning VERR_NOT_SUPPORT here so we've got something else
2410	* than -1 which the interrupt gate glue code might return.
2411	*/
2412	Log(("operation %#x is not supported\n", enmOperation));
2413	return VERR_NOT_SUPPORTED;
2414	}
2415	return rc;
2416	}
2417
2418
2419	/**
2420	* Argument for vmmR0EntryExWrapper containing the arguments for VMMR0EntryEx.
2421	*/
2422	typedef struct VMMR0ENTRYEXARGS
2423	{
2424	PGVM pGVM;
2425	VMCPUID idCpu;
2426	VMMR0OPERATION enmOperation;
2427	PSUPVMMR0REQHDR pReq;
2428	uint64_t u64Arg;
2429	PSUPDRVSESSION pSession;
2430	} VMMR0ENTRYEXARGS;
2431	/** Pointer to a vmmR0EntryExWrapper argument package. */
2432	typedef VMMR0ENTRYEXARGS *PVMMR0ENTRYEXARGS;
2433
2434	/**
2435	* This is just a longjmp wrapper function for VMMR0EntryEx calls.
2436	*
2437	* @returns VBox status code.
2438	* @param pvArgs The argument package
2439	*/
2440	static DECLCALLBACK(int) vmmR0EntryExWrapper(void *pvArgs)
2441	{
2442	return vmmR0EntryExWorker(((PVMMR0ENTRYEXARGS)pvArgs)->pGVM,
2443	((PVMMR0ENTRYEXARGS)pvArgs)->idCpu,
2444	((PVMMR0ENTRYEXARGS)pvArgs)->enmOperation,
2445	((PVMMR0ENTRYEXARGS)pvArgs)->pReq,
2446	((PVMMR0ENTRYEXARGS)pvArgs)->u64Arg,
2447	((PVMMR0ENTRYEXARGS)pvArgs)->pSession);
2448	}
2449
2450
2451	/**
2452	* The Ring 0 entry point, called by the support library (SUP).
2453	*
2454	* @returns VBox status code.
2455	* @param pGVM The global (ring-0) VM structure.
2456	* @param pVM The cross context VM structure.
2457	* @param idCpu Virtual CPU ID argument. Must be NIL_VMCPUID if pVM
2458	* is NIL_RTR0PTR, and may be NIL_VMCPUID if it isn't
2459	* @param enmOperation Which operation to execute.
2460	* @param pReq Pointer to the SUPVMMR0REQHDR packet. Optional.
2461	* @param u64Arg Some simple constant argument.
2462	* @param pSession The session of the caller.
2463	* @remarks Assume called with interrupts _enabled_.
2464	*/
2465	VMMR0DECL(int) VMMR0EntryEx(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, VMMR0OPERATION enmOperation,
2466	PSUPVMMR0REQHDR pReq, uint64_t u64Arg, PSUPDRVSESSION pSession)
2467	{
2468	/*
2469	* Requests that should only happen on the EMT thread will be
2470	* wrapped in a setjmp so we can assert without causing trouble.
2471	*/
2472	if ( pVM != NULL
2473	&& pGVM != NULL
2474	&& pVM == pGVM /** @todo drop pVM or pGVM */
2475	&& idCpu < pGVM->cCpus
2476	&& pGVM->pSession == pSession
2477	&& pGVM->pSelf == pVM)
2478	{
2479	switch (enmOperation)
2480	{
2481	/* These might/will be called before VMMR3Init. */
2482	case VMMR0_DO_GMM_INITIAL_RESERVATION:
2483	case VMMR0_DO_GMM_UPDATE_RESERVATION:
2484	case VMMR0_DO_GMM_ALLOCATE_PAGES:
2485	case VMMR0_DO_GMM_FREE_PAGES:
2486	case VMMR0_DO_GMM_BALLOONED_PAGES:
2487	/* On the mac we might not have a valid jmp buf, so check these as well. */
2488	case VMMR0_DO_VMMR0_INIT:
2489	case VMMR0_DO_VMMR0_TERM:
2490
2491	case VMMR0_DO_PDM_DEVICE_CREATE:
2492	case VMMR0_DO_PDM_DEVICE_GEN_CALL:
2493	case VMMR0_DO_IOM_GROW_IO_PORTS:
2494	case VMMR0_DO_IOM_GROW_IO_PORT_STATS:
2495	case VMMR0_DO_DBGF_BP_INIT:
2496	case VMMR0_DO_DBGF_BP_CHUNK_ALLOC:
2497	case VMMR0_DO_DBGF_BP_L2_TBL_CHUNK_ALLOC:
2498	{
2499	PGVMCPU pGVCpu = &pGVM->aCpus[idCpu];
2500	RTNATIVETHREAD hNativeThread = RTThreadNativeSelf();
2501	if (RT_LIKELY( pGVCpu->hEMT == hNativeThread
2502	&& pGVCpu->hNativeThreadR0 == hNativeThread))
2503	{
2504	if (!pGVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack)
2505	break;
2506
2507	/** @todo validate this EMT claim... GVM knows. */
2508	VMMR0ENTRYEXARGS Args;
2509	Args.pGVM = pGVM;
2510	Args.idCpu = idCpu;
2511	Args.enmOperation = enmOperation;
2512	Args.pReq = pReq;
2513	Args.u64Arg = u64Arg;
2514	Args.pSession = pSession;
2515	return vmmR0CallRing3SetJmpEx(&pGVCpu->vmm.s.CallRing3JmpBufR0, vmmR0EntryExWrapper, &Args);
2516	}
2517	return VERR_VM_THREAD_NOT_EMT;
2518	}
2519
2520	default:
2521	case VMMR0_DO_PGM_POOL_GROW:
2522	break;
2523	}
2524	}
2525	return vmmR0EntryExWorker(pGVM, idCpu, enmOperation, pReq, u64Arg, pSession);
2526	}
2527
2528
2529	/**
2530	* Checks whether we've armed the ring-0 long jump machinery.
2531	*
2532	* @returns @c true / @c false
2533	* @param pVCpu The cross context virtual CPU structure.
2534	* @thread EMT
2535	* @sa VMMIsLongJumpArmed
2536	*/
2537	VMMR0_INT_DECL(bool) VMMR0IsLongJumpArmed(PVMCPUCC pVCpu)
2538	{
2539	#ifdef RT_ARCH_X86
2540	return pVCpu->vmm.s.CallRing3JmpBufR0.eip
2541	&& !pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call;
2542	#else
2543	return pVCpu->vmm.s.CallRing3JmpBufR0.rip
2544	&& !pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call;
2545	#endif
2546	}
2547
2548
2549	/**
2550	* Checks whether we've done a ring-3 long jump.
2551	*
2552	* @returns @c true / @c false
2553	* @param pVCpu The cross context virtual CPU structure.
2554	* @thread EMT
2555	*/
2556	VMMR0_INT_DECL(bool) VMMR0IsInRing3LongJump(PVMCPUCC pVCpu)
2557	{
2558	return pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call;
2559	}
2560
2561
2562	/**
2563	* Internal R0 logger worker: Flush logger.
2564	*
2565	* @param pLogger The logger instance to flush.
2566	* @remark This function must be exported!
2567	*/
2568	VMMR0DECL(void) vmmR0LoggerFlush(PRTLOGGER pLogger)
2569	{
2570	#ifdef LOG_ENABLED
2571	/*
2572	* Convert the pLogger into a VM handle and 'call' back to Ring-3.
2573	* (This is a bit paranoid code.)
2574	*/
2575	PVMMR0LOGGER pR0Logger = (PVMMR0LOGGER)((uintptr_t)pLogger - RT_UOFFSETOF(VMMR0LOGGER, Logger));
2576	if ( !VALID_PTR(pR0Logger)
2577	\|\| !VALID_PTR(pR0Logger + 1)
2578	\|\| pLogger->u32Magic != RTLOGGER_MAGIC)
2579	{
2580	# ifdef DEBUG
2581	SUPR0Printf("vmmR0LoggerFlush: pLogger=%p!\n", pLogger);
2582	# endif
2583	return;
2584	}
2585	if (pR0Logger->fFlushingDisabled)
2586	return; /* quietly */
2587
2588	PVMCC pVM = pR0Logger->pVM;
2589	if ( !VALID_PTR(pVM)
2590	\|\| pVM->pSelf != pVM)
2591	{
2592	# ifdef DEBUG
2593	SUPR0Printf("vmmR0LoggerFlush: pVM=%p! pSelf=%p! pLogger=%p\n", pVM, pVM->pSelf, pLogger);
2594	# endif
2595	return;
2596	}
2597
2598	PVMCPUCC pVCpu = VMMGetCpu(pVM);
2599	if (pVCpu)
2600	{
2601	/*
2602	* Check that the jump buffer is armed.
2603	*/
2604	# ifdef RT_ARCH_X86
2605	if ( !pVCpu->vmm.s.CallRing3JmpBufR0.eip
2606	\|\| pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call)
2607	# else
2608	if ( !pVCpu->vmm.s.CallRing3JmpBufR0.rip
2609	\|\| pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call)
2610	# endif
2611	{
2612	# ifdef DEBUG
2613	SUPR0Printf("vmmR0LoggerFlush: Jump buffer isn't armed!\n");
2614	# endif
2615	return;
2616	}
2617	VMMRZCallRing3(pVM, pVCpu, VMMCALLRING3_VMM_LOGGER_FLUSH, 0);
2618	}
2619	# ifdef DEBUG
2620	else
2621	SUPR0Printf("vmmR0LoggerFlush: invalid VCPU context!\n");
2622	# endif
2623	#else
2624	NOREF(pLogger);
2625	#endif /* LOG_ENABLED */
2626	}
2627
2628	#ifdef LOG_ENABLED
2629
2630	/**
2631	* Disables flushing of the ring-0 debug log.
2632	*
2633	* @param pVCpu The cross context virtual CPU structure.
2634	*/
2635	VMMR0_INT_DECL(void) VMMR0LogFlushDisable(PVMCPUCC pVCpu)
2636	{
2637	if (pVCpu->vmm.s.pR0LoggerR0)
2638	pVCpu->vmm.s.pR0LoggerR0->fFlushingDisabled = true;
2639	if (pVCpu->vmm.s.pR0RelLoggerR0)
2640	pVCpu->vmm.s.pR0RelLoggerR0->fFlushingDisabled = true;
2641	}
2642
2643
2644	/**
2645	* Enables flushing of the ring-0 debug log.
2646	*
2647	* @param pVCpu The cross context virtual CPU structure.
2648	*/
2649	VMMR0_INT_DECL(void) VMMR0LogFlushEnable(PVMCPUCC pVCpu)
2650	{
2651	if (pVCpu->vmm.s.pR0LoggerR0)
2652	pVCpu->vmm.s.pR0LoggerR0->fFlushingDisabled = false;
2653	if (pVCpu->vmm.s.pR0RelLoggerR0)
2654	pVCpu->vmm.s.pR0RelLoggerR0->fFlushingDisabled = false;
2655	}
2656
2657
2658	/**
2659	* Checks if log flushing is disabled or not.
2660	*
2661	* @param pVCpu The cross context virtual CPU structure.
2662	*/
2663	VMMR0_INT_DECL(bool) VMMR0IsLogFlushDisabled(PVMCPUCC pVCpu)
2664	{
2665	if (pVCpu->vmm.s.pR0LoggerR0)
2666	return pVCpu->vmm.s.pR0LoggerR0->fFlushingDisabled;
2667	if (pVCpu->vmm.s.pR0RelLoggerR0)
2668	return pVCpu->vmm.s.pR0RelLoggerR0->fFlushingDisabled;
2669	return true;
2670	}
2671
2672	#endif /* LOG_ENABLED */
2673
2674	/*
2675	* Override RTLogRelGetDefaultInstanceEx so we can do LogRel to VBox.log from EMTs in ring-0.
2676	*/
2677	DECLEXPORT(PRTLOGGER) RTLogRelGetDefaultInstanceEx(uint32_t fFlagsAndGroup)
2678	{
2679	PGVMCPU pGVCpu = GVMMR0GetGVCpuByEMT(NIL_RTNATIVETHREAD);
2680	if (pGVCpu)
2681	{
2682	PVMCPUCC pVCpu = pGVCpu;
2683	if (RT_VALID_PTR(pVCpu))
2684	{
2685	PVMMR0LOGGER pVmmLogger = pVCpu->vmm.s.pR0RelLoggerR0;
2686	if (RT_VALID_PTR(pVmmLogger))
2687	{
2688	if ( pVmmLogger->fCreated
2689	&& pVmmLogger->pVM == pGVCpu->pGVM)
2690	{
2691	if (pVmmLogger->Logger.fFlags & RTLOGFLAGS_DISABLED)
2692	return NULL;
2693	uint16_t const fFlags = RT_LO_U16(fFlagsAndGroup);
2694	uint16_t const iGroup = RT_HI_U16(fFlagsAndGroup);
2695	if ( iGroup != UINT16_MAX
2696	&& ( ( pVmmLogger->Logger.afGroups[iGroup < pVmmLogger->Logger.cGroups ? iGroup : 0]
2697	& (fFlags \| (uint32_t)RTLOGGRPFLAGS_ENABLED))
2698	!= (fFlags \| (uint32_t)RTLOGGRPFLAGS_ENABLED)))
2699	return NULL;
2700	return &pVmmLogger->Logger;
2701	}
2702	}
2703	}
2704	}
2705	return SUPR0GetDefaultLogRelInstanceEx(fFlagsAndGroup);
2706	}
2707
2708
2709	/*
2710	* Jump back to ring-3 if we're the EMT and the longjmp is armed.
2711	*
2712	* @returns true if the breakpoint should be hit, false if it should be ignored.
2713	*/
2714	DECLEXPORT(bool) RTCALL RTAssertShouldPanic(void)
2715	{
2716	#if 0
2717	return true;
2718	#else
2719	PVMCC pVM = GVMMR0GetVMByEMT(NIL_RTNATIVETHREAD);
2720	if (pVM)
2721	{
2722	PVMCPUCC pVCpu = VMMGetCpu(pVM);
2723
2724	if (pVCpu)
2725	{
2726	# ifdef RT_ARCH_X86
2727	if ( pVCpu->vmm.s.CallRing3JmpBufR0.eip
2728	&& !pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call)
2729	# else
2730	if ( pVCpu->vmm.s.CallRing3JmpBufR0.rip
2731	&& !pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call)
2732	# endif
2733	{
2734	int rc = VMMRZCallRing3(pVM, pVCpu, VMMCALLRING3_VM_R0_ASSERTION, 0);
2735	return RT_FAILURE_NP(rc);
2736	}
2737	}
2738	}
2739	# ifdef RT_OS_LINUX
2740	return true;
2741	# else
2742	return false;
2743	# endif
2744	#endif
2745	}
2746
2747
2748	/*
2749	* Override this so we can push it up to ring-3.
2750	*/
2751	DECLEXPORT(void) RTCALL RTAssertMsg1Weak(const char pszExpr, unsigned uLine, const char pszFile, const char *pszFunction)
2752	{
2753	/*
2754	* To the log.
2755	*/
2756	LogAlways(("\n!!R0-Assertion Failed!!\n"
2757	"Expression: %s\n"
2758	"Location : %s(%d) %s\n",
2759	pszExpr, pszFile, uLine, pszFunction));
2760
2761	/*
2762	* To the global VMM buffer.
2763	*/
2764	PVMCC pVM = GVMMR0GetVMByEMT(NIL_RTNATIVETHREAD);
2765	if (pVM)
2766	RTStrPrintf(pVM->vmm.s.szRing0AssertMsg1, sizeof(pVM->vmm.s.szRing0AssertMsg1),
2767	"\n!!R0-Assertion Failed!!\n"
2768	"Expression: %.*s\n"
2769	"Location : %s(%d) %s\n",
2770	sizeof(pVM->vmm.s.szRing0AssertMsg1) / 4 * 3, pszExpr,
2771	pszFile, uLine, pszFunction);
2772
2773	/*
2774	* Continue the normal way.
2775	*/
2776	RTAssertMsg1(pszExpr, uLine, pszFile, pszFunction);
2777	}
2778
2779
2780	/**
2781	* Callback for RTLogFormatV which writes to the ring-3 log port.
2782	* See PFNLOGOUTPUT() for details.
2783	*/
2784	static DECLCALLBACK(size_t) rtLogOutput(void pv, const char pachChars, size_t cbChars)
2785	{
2786	for (size_t i = 0; i < cbChars; i++)
2787	{
2788	LogAlways(("%c", pachChars[i])); NOREF(pachChars);
2789	}
2790
2791	NOREF(pv);
2792	return cbChars;
2793	}
2794
2795
2796	/*
2797	* Override this so we can push it up to ring-3.
2798	*/
2799	DECLEXPORT(void) RTCALL RTAssertMsg2WeakV(const char *pszFormat, va_list va)
2800	{
2801	va_list vaCopy;
2802
2803	/*
2804	* Push the message to the loggers.
2805	*/
2806	PRTLOGGER pLog = RTLogGetDefaultInstance(); /* Don't initialize it here... */
2807	if (pLog)
2808	{
2809	va_copy(vaCopy, va);
2810	RTLogFormatV(rtLogOutput, pLog, pszFormat, vaCopy);
2811	va_end(vaCopy);
2812	}
2813	pLog = RTLogRelGetDefaultInstance();
2814	if (pLog)
2815	{
2816	va_copy(vaCopy, va);
2817	RTLogFormatV(rtLogOutput, pLog, pszFormat, vaCopy);
2818	va_end(vaCopy);
2819	}
2820
2821	/*
2822	* Push it to the global VMM buffer.
2823	*/
2824	PVMCC pVM = GVMMR0GetVMByEMT(NIL_RTNATIVETHREAD);
2825	if (pVM)
2826	{
2827	va_copy(vaCopy, va);
2828	RTStrPrintfV(pVM->vmm.s.szRing0AssertMsg2, sizeof(pVM->vmm.s.szRing0AssertMsg2), pszFormat, vaCopy);
2829	va_end(vaCopy);
2830	}
2831
2832	/*
2833	* Continue the normal way.
2834	*/
2835	RTAssertMsg2V(pszFormat, va);
2836	}
2837

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source: vbox/trunk/src/VBox/VMM/VMMR0/VMMR0.cpp@ 88750

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