VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR0/VMMR0.cpp@ 55747

Last change on this file since 55747 was 55715, checked in by vboxsync, 10 years ago

VMM: typo.

  • Property svn:eol-style set to native
  • Property svn:keywords set to Id Revision
File size: 70.5 KB
Line 
1/* $Id: VMMR0.cpp 55715 2015-05-07 12:01:53Z vboxsync $ */
2/** @file
3 * VMM - Host Context Ring 0.
4 */
5
6/*
7 * Copyright (C) 2006-2012 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18/*******************************************************************************
19* Header Files *
20*******************************************************************************/
21#define LOG_GROUP LOG_GROUP_VMM
22#include <VBox/vmm/vmm.h>
23#include <VBox/sup.h>
24#include <VBox/vmm/trpm.h>
25#include <VBox/vmm/cpum.h>
26#include <VBox/vmm/pdmapi.h>
27#include <VBox/vmm/pgm.h>
28#include <VBox/vmm/stam.h>
29#include <VBox/vmm/tm.h>
30#include "VMMInternal.h"
31#include <VBox/vmm/vm.h>
32#ifdef VBOX_WITH_PCI_PASSTHROUGH
33# include <VBox/vmm/pdmpci.h>
34#endif
35
36#include <VBox/vmm/gvmm.h>
37#include <VBox/vmm/gmm.h>
38#include <VBox/vmm/gim.h>
39#include <VBox/intnet.h>
40#include <VBox/vmm/hm.h>
41#include <VBox/param.h>
42#include <VBox/err.h>
43#include <VBox/version.h>
44#include <VBox/log.h>
45
46#include <iprt/asm-amd64-x86.h>
47#include <iprt/assert.h>
48#include <iprt/crc.h>
49#include <iprt/mp.h>
50#include <iprt/once.h>
51#include <iprt/stdarg.h>
52#include <iprt/string.h>
53#include <iprt/thread.h>
54#include <iprt/timer.h>
55
56#include "dtrace/VBoxVMM.h"
57
58
59#if defined(_MSC_VER) && defined(RT_ARCH_AMD64) /** @todo check this with with VC7! */
60# pragma intrinsic(_AddressOfReturnAddress)
61#endif
62
63
64/*******************************************************************************
65* Internal Functions *
66*******************************************************************************/
67RT_C_DECLS_BEGIN
68#if defined(RT_ARCH_X86) && (defined(RT_OS_SOLARIS) || defined(RT_OS_FREEBSD))
69extern uint64_t __udivdi3(uint64_t, uint64_t);
70extern uint64_t __umoddi3(uint64_t, uint64_t);
71#endif
72RT_C_DECLS_END
73
74
75/*******************************************************************************
76* Global Variables *
77*******************************************************************************/
78/** Drag in necessary library bits.
79 * The runtime lives here (in VMMR0.r0) and VBoxDD*R0.r0 links against us. */
80PFNRT g_VMMGCDeps[] =
81{
82 (PFNRT)RTCrc32,
83 (PFNRT)RTOnce,
84#if defined(RT_ARCH_X86) && (defined(RT_OS_SOLARIS) || defined(RT_OS_FREEBSD))
85 (PFNRT)__udivdi3,
86 (PFNRT)__umoddi3,
87#endif
88 NULL
89};
90
91#ifdef RT_OS_SOLARIS
92/* Dependency information for the native solaris loader. */
93extern "C" { char _depends_on[] = "vboxdrv"; }
94#endif
95
96
97
98/**
99 * Initialize the module.
100 * This is called when we're first loaded.
101 *
102 * @returns 0 on success.
103 * @returns VBox status on failure.
104 * @param hMod Image handle for use in APIs.
105 */
106DECLEXPORT(int) ModuleInit(void *hMod)
107{
108#ifdef VBOX_WITH_DTRACE_R0
109 /*
110 * The first thing to do is register the static tracepoints.
111 * (Deregistration is automatic.)
112 */
113 int rc2 = SUPR0TracerRegisterModule(hMod, &g_VTGObjHeader);
114 if (RT_FAILURE(rc2))
115 return rc2;
116#endif
117 LogFlow(("ModuleInit:\n"));
118
119#ifdef VBOX_WITH_64ON32_CMOS_DEBUG
120 /*
121 * Display the CMOS debug code.
122 */
123 ASMOutU8(0x72, 0x03);
124 uint8_t bDebugCode = ASMInU8(0x73);
125 LogRel(("CMOS Debug Code: %#x (%d)\n", bDebugCode, bDebugCode));
126 RTLogComPrintf("CMOS Debug Code: %#x (%d)\n", bDebugCode, bDebugCode);
127#endif
128
129 /*
130 * Initialize the VMM, GVMM, GMM, HM, PGM (Darwin) and INTNET.
131 */
132 int rc = vmmInitFormatTypes();
133 if (RT_SUCCESS(rc))
134 {
135 rc = GVMMR0Init();
136 if (RT_SUCCESS(rc))
137 {
138 rc = GMMR0Init();
139 if (RT_SUCCESS(rc))
140 {
141 rc = HMR0Init();
142 if (RT_SUCCESS(rc))
143 {
144 rc = PGMRegisterStringFormatTypes();
145 if (RT_SUCCESS(rc))
146 {
147#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
148 rc = PGMR0DynMapInit();
149#endif
150 if (RT_SUCCESS(rc))
151 {
152 rc = IntNetR0Init();
153 if (RT_SUCCESS(rc))
154 {
155#ifdef VBOX_WITH_PCI_PASSTHROUGH
156 rc = PciRawR0Init();
157#endif
158 if (RT_SUCCESS(rc))
159 {
160 rc = CPUMR0ModuleInit();
161 if (RT_SUCCESS(rc))
162 {
163#ifdef VBOX_WITH_TRIPLE_FAULT_HACK
164 rc = vmmR0TripleFaultHackInit();
165 if (RT_SUCCESS(rc))
166#endif
167 {
168 LogFlow(("ModuleInit: returns success.\n"));
169 return VINF_SUCCESS;
170 }
171
172 /*
173 * Bail out.
174 */
175#ifdef VBOX_WITH_TRIPLE_FAULT_HACK
176 vmmR0TripleFaultHackTerm();
177#endif
178 }
179 else
180 LogRel(("ModuleInit: CPUMR0ModuleInit -> %Rrc\n", rc));
181#ifdef VBOX_WITH_PCI_PASSTHROUGH
182 PciRawR0Term();
183#endif
184 }
185 else
186 LogRel(("ModuleInit: PciRawR0Init -> %Rrc\n", rc));
187 IntNetR0Term();
188 }
189 else
190 LogRel(("ModuleInit: IntNetR0Init -> %Rrc\n", rc));
191#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
192 PGMR0DynMapTerm();
193#endif
194 }
195 else
196 LogRel(("ModuleInit: PGMR0DynMapInit -> %Rrc\n", rc));
197 PGMDeregisterStringFormatTypes();
198 }
199 else
200 LogRel(("ModuleInit: PGMRegisterStringFormatTypes -> %Rrc\n", rc));
201 HMR0Term();
202 }
203 else
204 LogRel(("ModuleInit: HMR0Init -> %Rrc\n", rc));
205 GMMR0Term();
206 }
207 else
208 LogRel(("ModuleInit: GMMR0Init -> %Rrc\n", rc));
209 GVMMR0Term();
210 }
211 else
212 LogRel(("ModuleInit: GVMMR0Init -> %Rrc\n", rc));
213 vmmTermFormatTypes();
214 }
215 else
216 LogRel(("ModuleInit: vmmInitFormatTypes -> %Rrc\n", rc));
217
218 LogFlow(("ModuleInit: failed %Rrc\n", rc));
219 return rc;
220}
221
222
223/**
224 * Terminate the module.
225 * This is called when we're finally unloaded.
226 *
227 * @param hMod Image handle for use in APIs.
228 */
229DECLEXPORT(void) ModuleTerm(void *hMod)
230{
231 NOREF(hMod);
232 LogFlow(("ModuleTerm:\n"));
233
234 /*
235 * Terminate the CPUM module (Local APIC cleanup).
236 */
237 CPUMR0ModuleTerm();
238
239 /*
240 * Terminate the internal network service.
241 */
242 IntNetR0Term();
243
244 /*
245 * PGM (Darwin), HM and PciRaw global cleanup.
246 */
247#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
248 PGMR0DynMapTerm();
249#endif
250#ifdef VBOX_WITH_PCI_PASSTHROUGH
251 PciRawR0Term();
252#endif
253 PGMDeregisterStringFormatTypes();
254 HMR0Term();
255#ifdef VBOX_WITH_TRIPLE_FAULT_HACK
256 vmmR0TripleFaultHackTerm();
257#endif
258
259 /*
260 * Destroy the GMM and GVMM instances.
261 */
262 GMMR0Term();
263 GVMMR0Term();
264
265 vmmTermFormatTypes();
266
267 LogFlow(("ModuleTerm: returns\n"));
268}
269
270
271/**
272 * Initiates the R0 driver for a particular VM instance.
273 *
274 * @returns VBox status code.
275 *
276 * @param pVM Pointer to the VM.
277 * @param uSvnRev The SVN revision of the ring-3 part.
278 * @param uBuildType Build type indicator.
279 * @thread EMT.
280 */
281static int vmmR0InitVM(PVM pVM, uint32_t uSvnRev, uint32_t uBuildType)
282{
283 /*
284 * Match the SVN revisions and build type.
285 */
286 if (uSvnRev != VMMGetSvnRev())
287 {
288 LogRel(("VMMR0InitVM: Revision mismatch, r3=%d r0=%d\n", uSvnRev, VMMGetSvnRev()));
289 SUPR0Printf("VMMR0InitVM: Revision mismatch, r3=%d r0=%d\n", uSvnRev, VMMGetSvnRev());
290 return VERR_VMM_R0_VERSION_MISMATCH;
291 }
292 if (uBuildType != vmmGetBuildType())
293 {
294 LogRel(("VMMR0InitVM: Build type mismatch, r3=%#x r0=%#x\n", uBuildType, vmmGetBuildType()));
295 SUPR0Printf("VMMR0InitVM: Build type mismatch, r3=%#x r0=%#x\n", uBuildType, vmmGetBuildType());
296 return VERR_VMM_R0_VERSION_MISMATCH;
297 }
298 if ( !VALID_PTR(pVM)
299 || pVM->pVMR0 != pVM)
300 return VERR_INVALID_PARAMETER;
301
302
303#ifdef LOG_ENABLED
304 /*
305 * Register the EMT R0 logger instance for VCPU 0.
306 */
307 PVMCPU pVCpu = &pVM->aCpus[0];
308
309 PVMMR0LOGGER pR0Logger = pVCpu->vmm.s.pR0LoggerR0;
310 if (pR0Logger)
311 {
312# if 0 /* testing of the logger. */
313 LogCom(("vmmR0InitVM: before %p\n", RTLogDefaultInstance()));
314 LogCom(("vmmR0InitVM: pfnFlush=%p actual=%p\n", pR0Logger->Logger.pfnFlush, vmmR0LoggerFlush));
315 LogCom(("vmmR0InitVM: pfnLogger=%p actual=%p\n", pR0Logger->Logger.pfnLogger, vmmR0LoggerWrapper));
316 LogCom(("vmmR0InitVM: offScratch=%d fFlags=%#x fDestFlags=%#x\n", pR0Logger->Logger.offScratch, pR0Logger->Logger.fFlags, pR0Logger->Logger.fDestFlags));
317
318 RTLogSetDefaultInstanceThread(&pR0Logger->Logger, (uintptr_t)pVM->pSession);
319 LogCom(("vmmR0InitVM: after %p reg\n", RTLogDefaultInstance()));
320 RTLogSetDefaultInstanceThread(NULL, pVM->pSession);
321 LogCom(("vmmR0InitVM: after %p dereg\n", RTLogDefaultInstance()));
322
323 pR0Logger->Logger.pfnLogger("hello ring-0 logger\n");
324 LogCom(("vmmR0InitVM: returned successfully from direct logger call.\n"));
325 pR0Logger->Logger.pfnFlush(&pR0Logger->Logger);
326 LogCom(("vmmR0InitVM: returned successfully from direct flush call.\n"));
327
328 RTLogSetDefaultInstanceThread(&pR0Logger->Logger, (uintptr_t)pVM->pSession);
329 LogCom(("vmmR0InitVM: after %p reg2\n", RTLogDefaultInstance()));
330 pR0Logger->Logger.pfnLogger("hello ring-0 logger\n");
331 LogCom(("vmmR0InitVM: returned successfully from direct logger call (2). offScratch=%d\n", pR0Logger->Logger.offScratch));
332 RTLogSetDefaultInstanceThread(NULL, pVM->pSession);
333 LogCom(("vmmR0InitVM: after %p dereg2\n", RTLogDefaultInstance()));
334
335 RTLogLoggerEx(&pR0Logger->Logger, 0, ~0U, "hello ring-0 logger (RTLogLoggerEx)\n");
336 LogCom(("vmmR0InitVM: RTLogLoggerEx returned fine offScratch=%d\n", pR0Logger->Logger.offScratch));
337
338 RTLogSetDefaultInstanceThread(&pR0Logger->Logger, (uintptr_t)pVM->pSession);
339 RTLogPrintf("hello ring-0 logger (RTLogPrintf)\n");
340 LogCom(("vmmR0InitVM: RTLogPrintf returned fine offScratch=%d\n", pR0Logger->Logger.offScratch));
341# endif
342 Log(("Switching to per-thread logging instance %p (key=%p)\n", &pR0Logger->Logger, pVM->pSession));
343 RTLogSetDefaultInstanceThread(&pR0Logger->Logger, (uintptr_t)pVM->pSession);
344 pR0Logger->fRegistered = true;
345 }
346#endif /* LOG_ENABLED */
347
348 /*
349 * Check if the host supports high resolution timers or not.
350 */
351 if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
352 && !RTTimerCanDoHighResolution())
353 pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
354
355 /*
356 * Initialize the per VM data for GVMM and GMM.
357 */
358 int rc = GVMMR0InitVM(pVM);
359// if (RT_SUCCESS(rc))
360// rc = GMMR0InitPerVMData(pVM);
361 if (RT_SUCCESS(rc))
362 {
363 /*
364 * Init HM, CPUM and PGM (Darwin only).
365 */
366 rc = HMR0InitVM(pVM);
367 if (RT_SUCCESS(rc))
368 {
369 rc = CPUMR0InitVM(pVM);
370 if (RT_SUCCESS(rc))
371 {
372#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
373 rc = PGMR0DynMapInitVM(pVM);
374#endif
375 if (RT_SUCCESS(rc))
376 {
377#ifdef VBOX_WITH_PCI_PASSTHROUGH
378 rc = PciRawR0InitVM(pVM);
379#endif
380 if (RT_SUCCESS(rc))
381 {
382 rc = GIMR0InitVM(pVM);
383 if (RT_SUCCESS(rc))
384 {
385 GVMMR0DoneInitVM(pVM);
386 return rc;
387 }
388
389 /* bail out*/
390#ifdef VBOX_WITH_PCI_PASSTHROUGH
391 PciRawR0TermVM(pVM);
392#endif
393 }
394 }
395 }
396 HMR0TermVM(pVM);
397 }
398 }
399
400
401 RTLogSetDefaultInstanceThread(NULL, (uintptr_t)pVM->pSession);
402 return rc;
403}
404
405
406/**
407 * Terminates the R0 bits for a particular VM instance.
408 *
409 * This is normally called by ring-3 as part of the VM termination process, but
410 * may alternatively be called during the support driver session cleanup when
411 * the VM object is destroyed (see GVMM).
412 *
413 * @returns VBox status code.
414 *
415 * @param pVM Pointer to the VM.
416 * @param pGVM Pointer to the global VM structure. Optional.
417 * @thread EMT or session clean up thread.
418 */
419VMMR0_INT_DECL(int) VMMR0TermVM(PVM pVM, PGVM pGVM)
420{
421#ifdef VBOX_WITH_PCI_PASSTHROUGH
422 PciRawR0TermVM(pVM);
423#endif
424
425 /*
426 * Tell GVMM what we're up to and check that we only do this once.
427 */
428 if (GVMMR0DoingTermVM(pVM, pGVM))
429 {
430 GIMR0TermVM(pVM);
431
432 /** @todo I wish to call PGMR0PhysFlushHandyPages(pVM, &pVM->aCpus[idCpu])
433 * here to make sure we don't leak any shared pages if we crash... */
434#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
435 PGMR0DynMapTermVM(pVM);
436#endif
437 HMR0TermVM(pVM);
438 }
439
440 /*
441 * Deregister the logger.
442 */
443 RTLogSetDefaultInstanceThread(NULL, (uintptr_t)pVM->pSession);
444 return VINF_SUCCESS;
445}
446
447
448/**
449 * Creates R0 thread-context hooks for the current EMT thread.
450 *
451 * @returns VBox status code.
452 * @param pVCpu Pointer to the VMCPU.
453 *
454 * @thread EMT(pVCpu)
455 */
456VMMR0_INT_DECL(int) VMMR0ThreadCtxHooksCreate(PVMCPU pVCpu)
457{
458 VMCPU_ASSERT_EMT(pVCpu);
459 Assert(pVCpu->vmm.s.hR0ThreadCtx == NIL_RTTHREADCTX);
460#if defined(RT_OS_LINUX) || defined(RT_OS_SOLARIS)
461 int rc = RTThreadCtxHooksCreate(&pVCpu->vmm.s.hR0ThreadCtx);
462 if ( RT_FAILURE(rc)
463 && rc != VERR_NOT_SUPPORTED)
464 {
465 Log(("RTThreadCtxHooksCreate failed! rc=%Rrc pVCpu=%p idCpu=%RU32\n", rc, pVCpu, pVCpu->idCpu));
466 return rc;
467 }
468#endif
469
470 return VINF_SUCCESS;
471}
472
473
474/**
475 * Releases the object reference for the thread-context hook.
476 *
477 * @param pVCpu Pointer to the VMCPU.
478 * @remarks Can be called from any thread.
479 */
480VMMR0_INT_DECL(void) VMMR0ThreadCtxHooksRelease(PVMCPU pVCpu)
481{
482 RTThreadCtxHooksRelease(pVCpu->vmm.s.hR0ThreadCtx);
483}
484
485
486/**
487 * Registers the thread-context hook for this VCPU.
488 *
489 * @returns VBox status code.
490 * @param pVCpu Pointer to the VMCPU.
491 * @param pfnThreadHook Pointer to the thread-context callback.
492 *
493 * @thread EMT(pVCpu)
494 */
495VMMR0_INT_DECL(int) VMMR0ThreadCtxHooksRegister(PVMCPU pVCpu, PFNRTTHREADCTXHOOK pfnThreadHook)
496{
497 VMCPU_ASSERT_EMT(pVCpu);
498 return RTThreadCtxHooksRegister(pVCpu->vmm.s.hR0ThreadCtx, pfnThreadHook, pVCpu);
499}
500
501
502/**
503 * Deregisters the thread-context hook for this VCPU.
504 *
505 * @param pVCpu Pointer to the VMCPU.
506 *
507 * @thread EMT(pVCpu)
508 */
509VMMR0_INT_DECL(void) VMMR0ThreadCtxHooksDeregister(PVMCPU pVCpu)
510{
511 /* Clear the VCPU <-> host CPU mapping as we've left HM context. See @bugref{7726} comment #19. */
512 ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID);
513
514 if (pVCpu->vmm.s.hR0ThreadCtx != NIL_RTTHREADCTX)
515 {
516 Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
517 int rc = RTThreadCtxHooksDeregister(pVCpu->vmm.s.hR0ThreadCtx);
518 AssertRC(rc);
519 }
520}
521
522
523/**
524 * Whether thread-context hooks are created (implying they're supported) on this
525 * platform.
526 *
527 * @returns true if the hooks are created, false otherwise.
528 * @param pVCpu Pointer to the VMCPU.
529 */
530VMMR0_INT_DECL(bool) VMMR0ThreadCtxHooksAreCreated(PVMCPU pVCpu)
531{
532 return pVCpu->vmm.s.hR0ThreadCtx != NIL_RTTHREADCTX;
533}
534
535
536/**
537 * Whether thread-context hooks are registered for this VCPU.
538 *
539 * @returns true if registered, false otherwise.
540 * @param pVCpu Pointer to the VMCPU.
541 */
542VMMR0_INT_DECL(bool) VMMR0ThreadCtxHooksAreRegistered(PVMCPU pVCpu)
543{
544 return RTThreadCtxHooksAreRegistered(pVCpu->vmm.s.hR0ThreadCtx);
545}
546
547
548/**
549 * VMM ring-0 thread-context callback.
550 *
551 * This does common HM state updating and calls the HM-specific thread-context
552 * callback.
553 *
554 * @param enmEvent The thread-context event.
555 * @param pvUser Opaque pointer to the VMCPU.
556 *
557 * @thread EMT(pvUser)
558 */
559static DECLCALLBACK(void) vmmR0ThreadCtxCallback(RTTHREADCTXEVENT enmEvent, void *pvUser)
560{
561 PVMCPU pVCpu = (PVMCPU)pvUser;
562
563 switch (enmEvent)
564 {
565 case RTTHREADCTXEVENT_RESUMED:
566 {
567 /*
568 * Linux may call us with preemption enabled (really!) but technically we
569 * cannot get preempted here, otherwise we end up in an infinite recursion
570 * scenario (i.e. preempted in resume hook -> preempt hook -> resume hook...
571 * ad infinitum). Let's just disable preemption for now...
572 */
573 HM_DISABLE_PREEMPT();
574
575 /* We need to update the VCPU <-> host CPU mapping. */
576 RTCPUID idHostCpu;
577 uint32_t iHostCpuSet = RTMpCurSetIndexAndId(&idHostCpu);
578 pVCpu->iHostCpuSet = iHostCpuSet;
579 ASMAtomicWriteU32(&pVCpu->idHostCpu, idHostCpu);
580
581 /* In the very unlikely event that the GIP delta for the CPU we're
582 rescheduled needs calculating, try force a return to ring-3.
583 We unfortunately cannot do the measurements right here. */
584 if (RT_UNLIKELY(SUPIsTscDeltaAvailableForCpuSetIndex(iHostCpuSet)))
585 VMCPU_FF_SET(pVCpu, VMCPU_FF_TO_R3);
586
587 /* Invoke the HM-specific thread-context callback. */
588 HMR0ThreadCtxCallback(enmEvent, pvUser);
589
590 /* Restore preemption. */
591 HM_RESTORE_PREEMPT();
592 break;
593 }
594
595 case RTTHREADCTXEVENT_PREEMPTING:
596 {
597 /* Invoke the HM-specific thread-context callback. */
598 HMR0ThreadCtxCallback(enmEvent, pvUser);
599
600 /*
601 * Sigh. See VMMGetCpu() used by VMCPU_ASSERT_EMT(). We cannot let several VCPUs
602 * have the same host CPU associated with it.
603 */
604 pVCpu->iHostCpuSet = UINT32_MAX;
605 ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID);
606 break;
607 }
608
609 default:
610 /* Invoke the HM-specific thread-context callback. */
611 HMR0ThreadCtxCallback(enmEvent, pvUser);
612 break;
613 }
614}
615
616
617#ifdef VBOX_WITH_STATISTICS
618/**
619 * Record return code statistics
620 * @param pVM Pointer to the VM.
621 * @param pVCpu Pointer to the VMCPU.
622 * @param rc The status code.
623 */
624static void vmmR0RecordRC(PVM pVM, PVMCPU pVCpu, int rc)
625{
626 /*
627 * Collect statistics.
628 */
629 switch (rc)
630 {
631 case VINF_SUCCESS:
632 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetNormal);
633 break;
634 case VINF_EM_RAW_INTERRUPT:
635 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetInterrupt);
636 break;
637 case VINF_EM_RAW_INTERRUPT_HYPER:
638 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetInterruptHyper);
639 break;
640 case VINF_EM_RAW_GUEST_TRAP:
641 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetGuestTrap);
642 break;
643 case VINF_EM_RAW_RING_SWITCH:
644 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetRingSwitch);
645 break;
646 case VINF_EM_RAW_RING_SWITCH_INT:
647 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetRingSwitchInt);
648 break;
649 case VINF_EM_RAW_STALE_SELECTOR:
650 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetStaleSelector);
651 break;
652 case VINF_EM_RAW_IRET_TRAP:
653 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetIRETTrap);
654 break;
655 case VINF_IOM_R3_IOPORT_READ:
656 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetIORead);
657 break;
658 case VINF_IOM_R3_IOPORT_WRITE:
659 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetIOWrite);
660 break;
661 case VINF_IOM_R3_MMIO_READ:
662 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMMIORead);
663 break;
664 case VINF_IOM_R3_MMIO_WRITE:
665 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMMIOWrite);
666 break;
667 case VINF_IOM_R3_MMIO_READ_WRITE:
668 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMMIOReadWrite);
669 break;
670 case VINF_PATM_HC_MMIO_PATCH_READ:
671 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMMIOPatchRead);
672 break;
673 case VINF_PATM_HC_MMIO_PATCH_WRITE:
674 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMMIOPatchWrite);
675 break;
676 case VINF_CPUM_R3_MSR_READ:
677 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMSRRead);
678 break;
679 case VINF_CPUM_R3_MSR_WRITE:
680 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMSRWrite);
681 break;
682 case VINF_EM_RAW_EMULATE_INSTR:
683 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetEmulate);
684 break;
685 case VINF_EM_RAW_EMULATE_IO_BLOCK:
686 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetIOBlockEmulate);
687 break;
688 case VINF_PATCH_EMULATE_INSTR:
689 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPatchEmulate);
690 break;
691 case VINF_EM_RAW_EMULATE_INSTR_LDT_FAULT:
692 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetLDTFault);
693 break;
694 case VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT:
695 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetGDTFault);
696 break;
697 case VINF_EM_RAW_EMULATE_INSTR_IDT_FAULT:
698 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetIDTFault);
699 break;
700 case VINF_EM_RAW_EMULATE_INSTR_TSS_FAULT:
701 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetTSSFault);
702 break;
703 case VINF_EM_RAW_EMULATE_INSTR_PD_FAULT:
704 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPDFault);
705 break;
706 case VINF_CSAM_PENDING_ACTION:
707 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetCSAMTask);
708 break;
709 case VINF_PGM_SYNC_CR3:
710 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetSyncCR3);
711 break;
712 case VINF_PATM_PATCH_INT3:
713 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPatchInt3);
714 break;
715 case VINF_PATM_PATCH_TRAP_PF:
716 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPatchPF);
717 break;
718 case VINF_PATM_PATCH_TRAP_GP:
719 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPatchGP);
720 break;
721 case VINF_PATM_PENDING_IRQ_AFTER_IRET:
722 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPatchIretIRQ);
723 break;
724 case VINF_EM_RESCHEDULE_REM:
725 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetRescheduleREM);
726 break;
727 case VINF_EM_RAW_TO_R3:
728 if (VM_FF_IS_PENDING(pVM, VM_FF_TM_VIRTUAL_SYNC))
729 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3TMVirt);
730 else if (VM_FF_IS_PENDING(pVM, VM_FF_PGM_NEED_HANDY_PAGES))
731 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3HandyPages);
732 else if (VM_FF_IS_PENDING(pVM, VM_FF_PDM_QUEUES))
733 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3PDMQueues);
734 else if (VM_FF_IS_PENDING(pVM, VM_FF_EMT_RENDEZVOUS))
735 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3Rendezvous);
736 else if (VM_FF_IS_PENDING(pVM, VM_FF_PDM_DMA))
737 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3DMA);
738 else if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_TIMER))
739 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3Timer);
740 else if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
741 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3CritSect);
742 else if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_TO_R3))
743 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3);
744 else
745 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3Unknown);
746 break;
747
748 case VINF_EM_RAW_TIMER_PENDING:
749 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetTimerPending);
750 break;
751 case VINF_EM_RAW_INTERRUPT_PENDING:
752 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetInterruptPending);
753 break;
754 case VINF_VMM_CALL_HOST:
755 switch (pVCpu->vmm.s.enmCallRing3Operation)
756 {
757 case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
758 STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallPDMCritSectEnter);
759 break;
760 case VMMCALLRING3_PDM_LOCK:
761 STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallPDMLock);
762 break;
763 case VMMCALLRING3_PGM_POOL_GROW:
764 STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallPGMPoolGrow);
765 break;
766 case VMMCALLRING3_PGM_LOCK:
767 STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallPGMLock);
768 break;
769 case VMMCALLRING3_PGM_MAP_CHUNK:
770 STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallPGMMapChunk);
771 break;
772 case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
773 STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallPGMAllocHandy);
774 break;
775 case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
776 STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallRemReplay);
777 break;
778 case VMMCALLRING3_VMM_LOGGER_FLUSH:
779 STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallLogFlush);
780 break;
781 case VMMCALLRING3_VM_SET_ERROR:
782 STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallVMSetError);
783 break;
784 case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
785 STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallVMSetRuntimeError);
786 break;
787 case VMMCALLRING3_VM_R0_ASSERTION:
788 default:
789 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetCallRing3);
790 break;
791 }
792 break;
793 case VINF_PATM_DUPLICATE_FUNCTION:
794 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPATMDuplicateFn);
795 break;
796 case VINF_PGM_CHANGE_MODE:
797 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPGMChangeMode);
798 break;
799 case VINF_PGM_POOL_FLUSH_PENDING:
800 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPGMFlushPending);
801 break;
802 case VINF_EM_PENDING_REQUEST:
803 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPendingRequest);
804 break;
805 case VINF_EM_HM_PATCH_TPR_INSTR:
806 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPatchTPR);
807 break;
808 default:
809 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMisc);
810 break;
811 }
812}
813#endif /* VBOX_WITH_STATISTICS */
814
815
816/**
817 * Unused ring-0 entry point that used to be called from the interrupt gate.
818 *
819 * Will be removed one of the next times we do a major SUPDrv version bump.
820 *
821 * @returns VBox status code.
822 * @param pVM Pointer to the VM.
823 * @param enmOperation Which operation to execute.
824 * @param pvArg Argument to the operation.
825 * @remarks Assume called with interrupts disabled.
826 */
827VMMR0DECL(int) VMMR0EntryInt(PVM pVM, VMMR0OPERATION enmOperation, void *pvArg)
828{
829 /*
830 * We're returning VERR_NOT_SUPPORT here so we've got something else
831 * than -1 which the interrupt gate glue code might return.
832 */
833 Log(("operation %#x is not supported\n", enmOperation));
834 NOREF(enmOperation); NOREF(pvArg); NOREF(pVM);
835 return VERR_NOT_SUPPORTED;
836}
837
838
839/**
840 * The Ring 0 entry point, called by the fast-ioctl path.
841 *
842 * @param pVM Pointer to the VM.
843 * The return code is stored in pVM->vmm.s.iLastGZRc.
844 * @param idCpu The Virtual CPU ID of the calling EMT.
845 * @param enmOperation Which operation to execute.
846 * @remarks Assume called with interrupts _enabled_.
847 */
848VMMR0DECL(void) VMMR0EntryFast(PVM pVM, VMCPUID idCpu, VMMR0OPERATION enmOperation)
849{
850 /*
851 * Validation.
852 */
853 if (RT_UNLIKELY(idCpu >= pVM->cCpus))
854 return;
855 PVMCPU pVCpu = &pVM->aCpus[idCpu];
856 if (RT_UNLIKELY(pVCpu->hNativeThreadR0 != RTThreadNativeSelf()))
857 return;
858
859 /*
860 * Perform requested operation.
861 */
862 switch (enmOperation)
863 {
864 /*
865 * Switch to GC and run guest raw mode code.
866 * Disable interrupts before doing the world switch.
867 */
868 case VMMR0_DO_RAW_RUN:
869 {
870#ifndef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
871 /* Some safety precautions first. */
872 if (RT_UNLIKELY(!PGMGetHyperCR3(pVCpu)))
873 {
874 pVCpu->vmm.s.iLastGZRc = VERR_PGM_NO_CR3_SHADOW_ROOT;
875 break;
876 }
877#endif
878
879 /*
880 * Disable preemption.
881 */
882 RTTHREADPREEMPTSTATE PreemptState = RTTHREADPREEMPTSTATE_INITIALIZER;
883 RTThreadPreemptDisable(&PreemptState);
884
885 /*
886 * Get the host CPU identifiers, make sure they are valid and that
887 * we've got a TSC delta for the CPU.
888 */
889 RTCPUID idHostCpu;
890 uint32_t iHostCpuSet = RTMpCurSetIndexAndId(&idHostCpu);
891 if (RT_LIKELY( iHostCpuSet < RTCPUSET_MAX_CPUS
892 && SUPIsTscDeltaAvailableForCpuSetIndex(iHostCpuSet)))
893 {
894 /*
895 * Commit the CPU identifiers and update the periodict preemption timer if it's active.
896 */
897#ifdef VBOX_WITH_VMMR0_DISABLE_LAPIC_NMI
898 CPUMR0SetLApic(pVCpu, iHostCpuSet);
899#endif
900 pVCpu->iHostCpuSet = iHostCpuSet;
901 ASMAtomicWriteU32(&pVCpu->idHostCpu, idHostCpu);
902
903 if (pVM->vmm.s.fUsePeriodicPreemptionTimers)
904 GVMMR0SchedUpdatePeriodicPreemptionTimer(pVM, pVCpu->idHostCpu, TMCalcHostTimerFrequency(pVM, pVCpu));
905
906 /*
907 * We might need to disable VT-x if the active switcher turns off paging.
908 */
909 bool fVTxDisabled;
910 int rc = HMR0EnterSwitcher(pVM, pVM->vmm.s.enmSwitcher, &fVTxDisabled);
911 if (RT_SUCCESS(rc))
912 {
913 /*
914 * Disable interrupts and run raw-mode code. The loop is for efficiently
915 * dispatching tracepoints that fired in raw-mode context.
916 */
917 RTCCUINTREG uFlags = ASMIntDisableFlags();
918
919 for (;;)
920 {
921 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED_EXEC);
922 TMNotifyStartOfExecution(pVCpu);
923
924 rc = pVM->vmm.s.pfnR0ToRawMode(pVM);
925 pVCpu->vmm.s.iLastGZRc = rc;
926
927 TMNotifyEndOfExecution(pVCpu);
928 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
929
930 if (rc != VINF_VMM_CALL_TRACER)
931 break;
932 SUPR0TracerUmodProbeFire(pVM->pSession, &pVCpu->vmm.s.TracerCtx);
933 }
934
935 /*
936 * Re-enable VT-x before we dispatch any pending host interrupts and
937 * re-enables interrupts.
938 */
939 HMR0LeaveSwitcher(pVM, fVTxDisabled);
940
941 if ( rc == VINF_EM_RAW_INTERRUPT
942 || rc == VINF_EM_RAW_INTERRUPT_HYPER)
943 TRPMR0DispatchHostInterrupt(pVM);
944
945 ASMSetFlags(uFlags);
946
947 /* Fire dtrace probe and collect statistics. */
948 VBOXVMM_R0_VMM_RETURN_TO_RING3_RC(pVCpu, CPUMQueryGuestCtxPtr(pVCpu), rc);
949#ifdef VBOX_WITH_STATISTICS
950 STAM_COUNTER_INC(&pVM->vmm.s.StatRunRC);
951 vmmR0RecordRC(pVM, pVCpu, rc);
952#endif
953 }
954 else
955 pVCpu->vmm.s.iLastGZRc = rc;
956
957 /*
958 * Invalidate the host CPU identifiers as we restore preemption.
959 */
960 pVCpu->iHostCpuSet = UINT32_MAX;
961 ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID);
962
963 RTThreadPreemptRestore(&PreemptState);
964 }
965 /*
966 * Invalid CPU set index or TSC delta in need of measuring.
967 */
968 else
969 {
970 RTThreadPreemptRestore(&PreemptState);
971 if (iHostCpuSet < RTCPUSET_MAX_CPUS)
972 {
973 int rc = SUPR0TscDeltaMeasureBySetIndex(pVM->pSession, iHostCpuSet, 0 /*fFlags*/,
974 2 /*cMsWaitRetry*/, 5*RT_MS_1SEC /*cMsWaitThread*/,
975 0 /*default cTries*/);
976 if (RT_SUCCESS(rc) || rc == VERR_CPU_OFFLINE)
977 pVCpu->vmm.s.iLastGZRc = VINF_EM_RAW_TO_R3;
978 else
979 pVCpu->vmm.s.iLastGZRc = rc;
980 }
981 else
982 pVCpu->vmm.s.iLastGZRc = VERR_INVALID_CPU_INDEX;
983 }
984 break;
985 }
986
987 /*
988 * Run guest code using the available hardware acceleration technology.
989 */
990 case VMMR0_DO_HM_RUN:
991 {
992 /*
993 * Disable preemption.
994 */
995 Assert(!VMMR0ThreadCtxHooksAreRegistered(pVCpu));
996 RTTHREADPREEMPTSTATE PreemptState = RTTHREADPREEMPTSTATE_INITIALIZER;
997 RTThreadPreemptDisable(&PreemptState);
998
999 /*
1000 * Get the host CPU identifiers, make sure they are valid and that
1001 * we've got a TSC delta for the CPU.
1002 */
1003 RTCPUID idHostCpu;
1004 uint32_t iHostCpuSet = RTMpCurSetIndexAndId(&idHostCpu);
1005 if (RT_LIKELY( iHostCpuSet < RTCPUSET_MAX_CPUS
1006 && SUPIsTscDeltaAvailableForCpuSetIndex(iHostCpuSet)))
1007 {
1008 pVCpu->iHostCpuSet = iHostCpuSet;
1009 ASMAtomicWriteU32(&pVCpu->idHostCpu, idHostCpu);
1010
1011 /*
1012 * Update the periodic preemption timer if it's active.
1013 */
1014 if (pVM->vmm.s.fUsePeriodicPreemptionTimers)
1015 GVMMR0SchedUpdatePeriodicPreemptionTimer(pVM, pVCpu->idHostCpu, TMCalcHostTimerFrequency(pVM, pVCpu));
1016
1017#ifdef LOG_ENABLED
1018 /*
1019 * Ugly: Lazy registration of ring 0 loggers.
1020 */
1021 if (pVCpu->idCpu > 0)
1022 {
1023 PVMMR0LOGGER pR0Logger = pVCpu->vmm.s.pR0LoggerR0;
1024 if ( pR0Logger
1025 && RT_UNLIKELY(!pR0Logger->fRegistered))
1026 {
1027 RTLogSetDefaultInstanceThread(&pR0Logger->Logger, (uintptr_t)pVM->pSession);
1028 pR0Logger->fRegistered = true;
1029 }
1030 }
1031#endif
1032
1033 int rc;
1034 bool fPreemptRestored = false;
1035 if (!HMR0SuspendPending())
1036 {
1037 /*
1038 * Register thread-context hooks if required.
1039 */
1040 if ( VMMR0ThreadCtxHooksAreCreated(pVCpu)
1041 && !VMMR0ThreadCtxHooksAreRegistered(pVCpu))
1042 {
1043 rc = VMMR0ThreadCtxHooksRegister(pVCpu, vmmR0ThreadCtxCallback);
1044 AssertRC(rc);
1045 }
1046
1047 /*
1048 * Enter HM context.
1049 */
1050 rc = HMR0Enter(pVM, pVCpu);
1051 if (RT_SUCCESS(rc))
1052 {
1053 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED_HM);
1054
1055 /*
1056 * When preemption hooks are in place, enable preemption now that
1057 * we're in HM context.
1058 */
1059 if (VMMR0ThreadCtxHooksAreRegistered(pVCpu))
1060 {
1061 fPreemptRestored = true;
1062 RTThreadPreemptRestore(&PreemptState);
1063 }
1064
1065 /*
1066 * Setup the longjmp machinery and execute guest code (calls HMR0RunGuestCode).
1067 */
1068 rc = vmmR0CallRing3SetJmp(&pVCpu->vmm.s.CallRing3JmpBufR0, HMR0RunGuestCode, pVM, pVCpu);
1069
1070 /*
1071 * Assert sanity on the way out. Using manual assertions code here as normal
1072 * assertions are going to panic the host since we're outside the setjmp/longjmp zone.
1073 */
1074 if (RT_UNLIKELY( VMCPU_GET_STATE(pVCpu) != VMCPUSTATE_STARTED_HM
1075 && RT_SUCCESS_NP(rc) && rc != VINF_VMM_CALL_HOST ))
1076 {
1077 pVM->vmm.s.szRing0AssertMsg1[0] = '\0';
1078 RTStrPrintf(pVM->vmm.s.szRing0AssertMsg2, sizeof(pVM->vmm.s.szRing0AssertMsg2),
1079 "Got VMCPU state %d expected %d.\n", VMCPU_GET_STATE(pVCpu), VMCPUSTATE_STARTED_HM);
1080 rc = VERR_VMM_WRONG_HM_VMCPU_STATE;
1081 }
1082 else if (RT_UNLIKELY(VMMR0ThreadCtxHooksAreRegistered(pVCpu)))
1083 {
1084 pVM->vmm.s.szRing0AssertMsg1[0] = '\0';
1085 RTStrPrintf(pVM->vmm.s.szRing0AssertMsg2, sizeof(pVM->vmm.s.szRing0AssertMsg2),
1086 "Thread-context hooks still registered! VCPU=%p Id=%u rc=%d.\n", pVCpu, pVCpu->idCpu, rc);
1087 rc = VERR_INVALID_STATE;
1088 }
1089
1090 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1091 }
1092 STAM_COUNTER_INC(&pVM->vmm.s.StatRunRC);
1093 }
1094 /*
1095 * The system is about to go into suspend mode; go back to ring 3.
1096 */
1097 else
1098 rc = VINF_EM_RAW_INTERRUPT;
1099
1100 /*
1101 * Invalidate the host CPU identifiers as we restore preemption.
1102 */
1103 pVCpu->iHostCpuSet = UINT32_MAX;
1104 ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID);
1105
1106 if (!fPreemptRestored)
1107 RTThreadPreemptRestore(&PreemptState);
1108
1109 pVCpu->vmm.s.iLastGZRc = rc;
1110
1111 /* Fire dtrace probe and collect statistics. */
1112 VBOXVMM_R0_VMM_RETURN_TO_RING3_HM(pVCpu, CPUMQueryGuestCtxPtr(pVCpu), rc);
1113#ifdef VBOX_WITH_STATISTICS
1114 vmmR0RecordRC(pVM, pVCpu, rc);
1115#endif
1116 }
1117 /*
1118 * Invalid CPU set index or TSC delta in need of measuring.
1119 */
1120 else
1121 {
1122 pVCpu->iHostCpuSet = UINT32_MAX;
1123 ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID);
1124 RTThreadPreemptRestore(&PreemptState);
1125 if (iHostCpuSet < RTCPUSET_MAX_CPUS)
1126 {
1127 int rc = SUPR0TscDeltaMeasureBySetIndex(pVM->pSession, iHostCpuSet, 0 /*fFlags*/,
1128 2 /*cMsWaitRetry*/, 5*RT_MS_1SEC /*cMsWaitThread*/,
1129 0 /*default cTries*/);
1130 if (RT_SUCCESS(rc) || rc == VERR_CPU_OFFLINE)
1131 pVCpu->vmm.s.iLastGZRc = VINF_EM_RAW_TO_R3;
1132 else
1133 pVCpu->vmm.s.iLastGZRc = rc;
1134 }
1135 else
1136 pVCpu->vmm.s.iLastGZRc = VERR_INVALID_CPU_INDEX;
1137 }
1138 break;
1139 }
1140
1141 /*
1142 * For profiling.
1143 */
1144 case VMMR0_DO_NOP:
1145 pVCpu->vmm.s.iLastGZRc = VINF_SUCCESS;
1146 break;
1147
1148 /*
1149 * Impossible.
1150 */
1151 default:
1152 AssertMsgFailed(("%#x\n", enmOperation));
1153 pVCpu->vmm.s.iLastGZRc = VERR_NOT_SUPPORTED;
1154 break;
1155 }
1156}
1157
1158
1159/**
1160 * Validates a session or VM session argument.
1161 *
1162 * @returns true / false accordingly.
1163 * @param pVM Pointer to the VM.
1164 * @param pSession The session argument.
1165 */
1166DECLINLINE(bool) vmmR0IsValidSession(PVM pVM, PSUPDRVSESSION pClaimedSession, PSUPDRVSESSION pSession)
1167{
1168 /* This must be set! */
1169 if (!pSession)
1170 return false;
1171
1172 /* Only one out of the two. */
1173 if (pVM && pClaimedSession)
1174 return false;
1175 if (pVM)
1176 pClaimedSession = pVM->pSession;
1177 return pClaimedSession == pSession;
1178}
1179
1180
1181/**
1182 * VMMR0EntryEx worker function, either called directly or when ever possible
1183 * called thru a longjmp so we can exit safely on failure.
1184 *
1185 * @returns VBox status code.
1186 * @param pVM Pointer to the VM.
1187 * @param idCpu Virtual CPU ID argument. Must be NIL_VMCPUID if pVM
1188 * is NIL_RTR0PTR, and may be NIL_VMCPUID if it isn't
1189 * @param enmOperation Which operation to execute.
1190 * @param pReqHdr This points to a SUPVMMR0REQHDR packet. Optional.
1191 * The support driver validates this if it's present.
1192 * @param u64Arg Some simple constant argument.
1193 * @param pSession The session of the caller.
1194 * @remarks Assume called with interrupts _enabled_.
1195 */
1196static int vmmR0EntryExWorker(PVM pVM, VMCPUID idCpu, VMMR0OPERATION enmOperation, PSUPVMMR0REQHDR pReqHdr, uint64_t u64Arg, PSUPDRVSESSION pSession)
1197{
1198 /*
1199 * Common VM pointer validation.
1200 */
1201 if (pVM)
1202 {
1203 if (RT_UNLIKELY( !VALID_PTR(pVM)
1204 || ((uintptr_t)pVM & PAGE_OFFSET_MASK)))
1205 {
1206 SUPR0Printf("vmmR0EntryExWorker: Invalid pVM=%p! (op=%d)\n", pVM, enmOperation);
1207 return VERR_INVALID_POINTER;
1208 }
1209 if (RT_UNLIKELY( pVM->enmVMState < VMSTATE_CREATING
1210 || pVM->enmVMState > VMSTATE_TERMINATED
1211 || pVM->pVMR0 != pVM))
1212 {
1213 SUPR0Printf("vmmR0EntryExWorker: Invalid pVM=%p:{enmVMState=%d, .pVMR0=%p}! (op=%d)\n",
1214 pVM, pVM->enmVMState, pVM->pVMR0, enmOperation);
1215 return VERR_INVALID_POINTER;
1216 }
1217
1218 if (RT_UNLIKELY(idCpu >= pVM->cCpus && idCpu != NIL_VMCPUID))
1219 {
1220 SUPR0Printf("vmmR0EntryExWorker: Invalid idCpu (%u vs cCpus=%u)\n", idCpu, pVM->cCpus);
1221 return VERR_INVALID_PARAMETER;
1222 }
1223 }
1224 else if (RT_UNLIKELY(idCpu != NIL_VMCPUID))
1225 {
1226 SUPR0Printf("vmmR0EntryExWorker: Invalid idCpu=%u\n", idCpu);
1227 return VERR_INVALID_PARAMETER;
1228 }
1229
1230
1231 switch (enmOperation)
1232 {
1233 /*
1234 * GVM requests
1235 */
1236 case VMMR0_DO_GVMM_CREATE_VM:
1237 if (pVM || u64Arg || idCpu != NIL_VMCPUID)
1238 return VERR_INVALID_PARAMETER;
1239 return GVMMR0CreateVMReq((PGVMMCREATEVMREQ)pReqHdr);
1240
1241 case VMMR0_DO_GVMM_DESTROY_VM:
1242 if (pReqHdr || u64Arg)
1243 return VERR_INVALID_PARAMETER;
1244 return GVMMR0DestroyVM(pVM);
1245
1246 case VMMR0_DO_GVMM_REGISTER_VMCPU:
1247 {
1248 if (!pVM)
1249 return VERR_INVALID_PARAMETER;
1250 return GVMMR0RegisterVCpu(pVM, idCpu);
1251 }
1252
1253 case VMMR0_DO_GVMM_SCHED_HALT:
1254 if (pReqHdr)
1255 return VERR_INVALID_PARAMETER;
1256 return GVMMR0SchedHalt(pVM, idCpu, u64Arg);
1257
1258 case VMMR0_DO_GVMM_SCHED_WAKE_UP:
1259 if (pReqHdr || u64Arg)
1260 return VERR_INVALID_PARAMETER;
1261 return GVMMR0SchedWakeUp(pVM, idCpu);
1262
1263 case VMMR0_DO_GVMM_SCHED_POKE:
1264 if (pReqHdr || u64Arg)
1265 return VERR_INVALID_PARAMETER;
1266 return GVMMR0SchedPoke(pVM, idCpu);
1267
1268 case VMMR0_DO_GVMM_SCHED_WAKE_UP_AND_POKE_CPUS:
1269 if (u64Arg)
1270 return VERR_INVALID_PARAMETER;
1271 return GVMMR0SchedWakeUpAndPokeCpusReq(pVM, (PGVMMSCHEDWAKEUPANDPOKECPUSREQ)pReqHdr);
1272
1273 case VMMR0_DO_GVMM_SCHED_POLL:
1274 if (pReqHdr || u64Arg > 1)
1275 return VERR_INVALID_PARAMETER;
1276 return GVMMR0SchedPoll(pVM, idCpu, !!u64Arg);
1277
1278 case VMMR0_DO_GVMM_QUERY_STATISTICS:
1279 if (u64Arg)
1280 return VERR_INVALID_PARAMETER;
1281 return GVMMR0QueryStatisticsReq(pVM, (PGVMMQUERYSTATISTICSSREQ)pReqHdr);
1282
1283 case VMMR0_DO_GVMM_RESET_STATISTICS:
1284 if (u64Arg)
1285 return VERR_INVALID_PARAMETER;
1286 return GVMMR0ResetStatisticsReq(pVM, (PGVMMRESETSTATISTICSSREQ)pReqHdr);
1287
1288 /*
1289 * Initialize the R0 part of a VM instance.
1290 */
1291 case VMMR0_DO_VMMR0_INIT:
1292 return vmmR0InitVM(pVM, RT_LODWORD(u64Arg), RT_HIDWORD(u64Arg));
1293
1294 /*
1295 * Terminate the R0 part of a VM instance.
1296 */
1297 case VMMR0_DO_VMMR0_TERM:
1298 return VMMR0TermVM(pVM, NULL);
1299
1300 /*
1301 * Attempt to enable hm mode and check the current setting.
1302 */
1303 case VMMR0_DO_HM_ENABLE:
1304 return HMR0EnableAllCpus(pVM);
1305
1306 /*
1307 * Setup the hardware accelerated session.
1308 */
1309 case VMMR0_DO_HM_SETUP_VM:
1310 return HMR0SetupVM(pVM);
1311
1312 /*
1313 * Switch to RC to execute Hypervisor function.
1314 */
1315 case VMMR0_DO_CALL_HYPERVISOR:
1316 {
1317 /*
1318 * Validate input / context.
1319 */
1320 if (RT_UNLIKELY(idCpu != 0))
1321 return VERR_INVALID_CPU_ID;
1322 if (RT_UNLIKELY(pVM->cCpus != 1))
1323 return VERR_INVALID_PARAMETER;
1324 PVMCPU pVCpu = &pVM->aCpus[idCpu];
1325#ifndef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
1326 if (RT_UNLIKELY(!PGMGetHyperCR3(pVCpu)))
1327 return VERR_PGM_NO_CR3_SHADOW_ROOT;
1328#endif
1329
1330 /*
1331 * Disable interrupts.
1332 */
1333 RTCCUINTREG fFlags = ASMIntDisableFlags();
1334
1335 /*
1336 * Get the host CPU identifiers, make sure they are valid and that
1337 * we've got a TSC delta for the CPU.
1338 */
1339 RTCPUID idHostCpu;
1340 uint32_t iHostCpuSet = RTMpCurSetIndexAndId(&idHostCpu);
1341 if (RT_UNLIKELY(iHostCpuSet >= RTCPUSET_MAX_CPUS))
1342 {
1343 ASMSetFlags(fFlags);
1344 return VERR_INVALID_CPU_INDEX;
1345 }
1346 if (RT_UNLIKELY(!SUPIsTscDeltaAvailableForCpuSetIndex(iHostCpuSet)))
1347 {
1348 ASMSetFlags(fFlags);
1349 int rc = SUPR0TscDeltaMeasureBySetIndex(pVM->pSession, iHostCpuSet, 0 /*fFlags*/,
1350 2 /*cMsWaitRetry*/, 5*RT_MS_1SEC /*cMsWaitThread*/,
1351 0 /*default cTries*/);
1352 if (RT_FAILURE(rc) && rc != VERR_CPU_OFFLINE)
1353 return rc;
1354 }
1355
1356 /*
1357 * Commit the CPU identifiers.
1358 */
1359#ifdef VBOX_WITH_VMMR0_DISABLE_LAPIC_NMI
1360 CPUMR0SetLApic(pVCpu, iHostCpuSet);
1361#endif
1362 pVCpu->iHostCpuSet = iHostCpuSet;
1363 ASMAtomicWriteU32(&pVCpu->idHostCpu, idHostCpu);
1364
1365 /*
1366 * We might need to disable VT-x if the active switcher turns off paging.
1367 */
1368 bool fVTxDisabled;
1369 int rc = HMR0EnterSwitcher(pVM, pVM->vmm.s.enmSwitcher, &fVTxDisabled);
1370 if (RT_SUCCESS(rc))
1371 {
1372 /*
1373 * Go through the wormhole...
1374 */
1375 rc = pVM->vmm.s.pfnR0ToRawMode(pVM);
1376
1377 /*
1378 * Re-enable VT-x before we dispatch any pending host interrupts.
1379 */
1380 HMR0LeaveSwitcher(pVM, fVTxDisabled);
1381
1382 if ( rc == VINF_EM_RAW_INTERRUPT
1383 || rc == VINF_EM_RAW_INTERRUPT_HYPER)
1384 TRPMR0DispatchHostInterrupt(pVM);
1385 }
1386
1387 /*
1388 * Invalidate the host CPU identifiers as we restore interrupts.
1389 */
1390 pVCpu->iHostCpuSet = UINT32_MAX;
1391 ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID);
1392 ASMSetFlags(fFlags);
1393 return rc;
1394 }
1395
1396 /*
1397 * PGM wrappers.
1398 */
1399 case VMMR0_DO_PGM_ALLOCATE_HANDY_PAGES:
1400 if (idCpu == NIL_VMCPUID)
1401 return VERR_INVALID_CPU_ID;
1402 return PGMR0PhysAllocateHandyPages(pVM, &pVM->aCpus[idCpu]);
1403
1404 case VMMR0_DO_PGM_FLUSH_HANDY_PAGES:
1405 if (idCpu == NIL_VMCPUID)
1406 return VERR_INVALID_CPU_ID;
1407 return PGMR0PhysFlushHandyPages(pVM, &pVM->aCpus[idCpu]);
1408
1409 case VMMR0_DO_PGM_ALLOCATE_LARGE_HANDY_PAGE:
1410 if (idCpu == NIL_VMCPUID)
1411 return VERR_INVALID_CPU_ID;
1412 return PGMR0PhysAllocateLargeHandyPage(pVM, &pVM->aCpus[idCpu]);
1413
1414 case VMMR0_DO_PGM_PHYS_SETUP_IOMMU:
1415 if (idCpu != 0)
1416 return VERR_INVALID_CPU_ID;
1417 return PGMR0PhysSetupIommu(pVM);
1418
1419 /*
1420 * GMM wrappers.
1421 */
1422 case VMMR0_DO_GMM_INITIAL_RESERVATION:
1423 if (u64Arg)
1424 return VERR_INVALID_PARAMETER;
1425 return GMMR0InitialReservationReq(pVM, idCpu, (PGMMINITIALRESERVATIONREQ)pReqHdr);
1426
1427 case VMMR0_DO_GMM_UPDATE_RESERVATION:
1428 if (u64Arg)
1429 return VERR_INVALID_PARAMETER;
1430 return GMMR0UpdateReservationReq(pVM, idCpu, (PGMMUPDATERESERVATIONREQ)pReqHdr);
1431
1432 case VMMR0_DO_GMM_ALLOCATE_PAGES:
1433 if (u64Arg)
1434 return VERR_INVALID_PARAMETER;
1435 return GMMR0AllocatePagesReq(pVM, idCpu, (PGMMALLOCATEPAGESREQ)pReqHdr);
1436
1437 case VMMR0_DO_GMM_FREE_PAGES:
1438 if (u64Arg)
1439 return VERR_INVALID_PARAMETER;
1440 return GMMR0FreePagesReq(pVM, idCpu, (PGMMFREEPAGESREQ)pReqHdr);
1441
1442 case VMMR0_DO_GMM_FREE_LARGE_PAGE:
1443 if (u64Arg)
1444 return VERR_INVALID_PARAMETER;
1445 return GMMR0FreeLargePageReq(pVM, idCpu, (PGMMFREELARGEPAGEREQ)pReqHdr);
1446
1447 case VMMR0_DO_GMM_QUERY_HYPERVISOR_MEM_STATS:
1448 if (u64Arg)
1449 return VERR_INVALID_PARAMETER;
1450 return GMMR0QueryHypervisorMemoryStatsReq(pVM, (PGMMMEMSTATSREQ)pReqHdr);
1451
1452 case VMMR0_DO_GMM_QUERY_MEM_STATS:
1453 if (idCpu == NIL_VMCPUID)
1454 return VERR_INVALID_CPU_ID;
1455 if (u64Arg)
1456 return VERR_INVALID_PARAMETER;
1457 return GMMR0QueryMemoryStatsReq(pVM, idCpu, (PGMMMEMSTATSREQ)pReqHdr);
1458
1459 case VMMR0_DO_GMM_BALLOONED_PAGES:
1460 if (u64Arg)
1461 return VERR_INVALID_PARAMETER;
1462 return GMMR0BalloonedPagesReq(pVM, idCpu, (PGMMBALLOONEDPAGESREQ)pReqHdr);
1463
1464 case VMMR0_DO_GMM_MAP_UNMAP_CHUNK:
1465 if (u64Arg)
1466 return VERR_INVALID_PARAMETER;
1467 return GMMR0MapUnmapChunkReq(pVM, (PGMMMAPUNMAPCHUNKREQ)pReqHdr);
1468
1469 case VMMR0_DO_GMM_SEED_CHUNK:
1470 if (pReqHdr)
1471 return VERR_INVALID_PARAMETER;
1472 return GMMR0SeedChunk(pVM, idCpu, (RTR3PTR)u64Arg);
1473
1474 case VMMR0_DO_GMM_REGISTER_SHARED_MODULE:
1475 if (idCpu == NIL_VMCPUID)
1476 return VERR_INVALID_CPU_ID;
1477 if (u64Arg)
1478 return VERR_INVALID_PARAMETER;
1479 return GMMR0RegisterSharedModuleReq(pVM, idCpu, (PGMMREGISTERSHAREDMODULEREQ)pReqHdr);
1480
1481 case VMMR0_DO_GMM_UNREGISTER_SHARED_MODULE:
1482 if (idCpu == NIL_VMCPUID)
1483 return VERR_INVALID_CPU_ID;
1484 if (u64Arg)
1485 return VERR_INVALID_PARAMETER;
1486 return GMMR0UnregisterSharedModuleReq(pVM, idCpu, (PGMMUNREGISTERSHAREDMODULEREQ)pReqHdr);
1487
1488 case VMMR0_DO_GMM_RESET_SHARED_MODULES:
1489 if (idCpu == NIL_VMCPUID)
1490 return VERR_INVALID_CPU_ID;
1491 if ( u64Arg
1492 || pReqHdr)
1493 return VERR_INVALID_PARAMETER;
1494 return GMMR0ResetSharedModules(pVM, idCpu);
1495
1496#ifdef VBOX_WITH_PAGE_SHARING
1497 case VMMR0_DO_GMM_CHECK_SHARED_MODULES:
1498 {
1499 if (idCpu == NIL_VMCPUID)
1500 return VERR_INVALID_CPU_ID;
1501 if ( u64Arg
1502 || pReqHdr)
1503 return VERR_INVALID_PARAMETER;
1504
1505 PVMCPU pVCpu = &pVM->aCpus[idCpu];
1506 Assert(pVCpu->hNativeThreadR0 == RTThreadNativeSelf());
1507
1508# ifdef DEBUG_sandervl
1509 /* Make sure that log flushes can jump back to ring-3; annoying to get an incomplete log (this is risky though as the code doesn't take this into account). */
1510 /* Todo: this can have bad side effects for unexpected jumps back to r3. */
1511 int rc = GMMR0CheckSharedModulesStart(pVM);
1512 if (rc == VINF_SUCCESS)
1513 {
1514 rc = vmmR0CallRing3SetJmp(&pVCpu->vmm.s.CallRing3JmpBufR0, GMMR0CheckSharedModules, pVM, pVCpu); /* this may resume code. */
1515 Assert( rc == VINF_SUCCESS
1516 || (rc == VINF_VMM_CALL_HOST && pVCpu->vmm.s.enmCallRing3Operation == VMMCALLRING3_VMM_LOGGER_FLUSH));
1517 GMMR0CheckSharedModulesEnd(pVM);
1518 }
1519# else
1520 int rc = GMMR0CheckSharedModules(pVM, pVCpu);
1521# endif
1522 return rc;
1523 }
1524#endif
1525
1526#if defined(VBOX_STRICT) && HC_ARCH_BITS == 64
1527 case VMMR0_DO_GMM_FIND_DUPLICATE_PAGE:
1528 if (u64Arg)
1529 return VERR_INVALID_PARAMETER;
1530 return GMMR0FindDuplicatePageReq(pVM, (PGMMFINDDUPLICATEPAGEREQ)pReqHdr);
1531#endif
1532
1533 case VMMR0_DO_GMM_QUERY_STATISTICS:
1534 if (u64Arg)
1535 return VERR_INVALID_PARAMETER;
1536 return GMMR0QueryStatisticsReq(pVM, (PGMMQUERYSTATISTICSSREQ)pReqHdr);
1537
1538 case VMMR0_DO_GMM_RESET_STATISTICS:
1539 if (u64Arg)
1540 return VERR_INVALID_PARAMETER;
1541 return GMMR0ResetStatisticsReq(pVM, (PGMMRESETSTATISTICSSREQ)pReqHdr);
1542
1543 /*
1544 * A quick GCFGM mock-up.
1545 */
1546 /** @todo GCFGM with proper access control, ring-3 management interface and all that. */
1547 case VMMR0_DO_GCFGM_SET_VALUE:
1548 case VMMR0_DO_GCFGM_QUERY_VALUE:
1549 {
1550 if (pVM || !pReqHdr || u64Arg || idCpu != NIL_VMCPUID)
1551 return VERR_INVALID_PARAMETER;
1552 PGCFGMVALUEREQ pReq = (PGCFGMVALUEREQ)pReqHdr;
1553 if (pReq->Hdr.cbReq != sizeof(*pReq))
1554 return VERR_INVALID_PARAMETER;
1555 int rc;
1556 if (enmOperation == VMMR0_DO_GCFGM_SET_VALUE)
1557 {
1558 rc = GVMMR0SetConfig(pReq->pSession, &pReq->szName[0], pReq->u64Value);
1559 //if (rc == VERR_CFGM_VALUE_NOT_FOUND)
1560 // rc = GMMR0SetConfig(pReq->pSession, &pReq->szName[0], pReq->u64Value);
1561 }
1562 else
1563 {
1564 rc = GVMMR0QueryConfig(pReq->pSession, &pReq->szName[0], &pReq->u64Value);
1565 //if (rc == VERR_CFGM_VALUE_NOT_FOUND)
1566 // rc = GMMR0QueryConfig(pReq->pSession, &pReq->szName[0], &pReq->u64Value);
1567 }
1568 return rc;
1569 }
1570
1571 /*
1572 * PDM Wrappers.
1573 */
1574 case VMMR0_DO_PDM_DRIVER_CALL_REQ_HANDLER:
1575 {
1576 if (!pVM || !pReqHdr || u64Arg || idCpu != NIL_VMCPUID)
1577 return VERR_INVALID_PARAMETER;
1578 return PDMR0DriverCallReqHandler(pVM, (PPDMDRIVERCALLREQHANDLERREQ)pReqHdr);
1579 }
1580
1581 case VMMR0_DO_PDM_DEVICE_CALL_REQ_HANDLER:
1582 {
1583 if (!pVM || !pReqHdr || u64Arg || idCpu != NIL_VMCPUID)
1584 return VERR_INVALID_PARAMETER;
1585 return PDMR0DeviceCallReqHandler(pVM, (PPDMDEVICECALLREQHANDLERREQ)pReqHdr);
1586 }
1587
1588 /*
1589 * Requests to the internal networking service.
1590 */
1591 case VMMR0_DO_INTNET_OPEN:
1592 {
1593 PINTNETOPENREQ pReq = (PINTNETOPENREQ)pReqHdr;
1594 if (u64Arg || !pReq || !vmmR0IsValidSession(pVM, pReq->pSession, pSession) || idCpu != NIL_VMCPUID)
1595 return VERR_INVALID_PARAMETER;
1596 return IntNetR0OpenReq(pSession, pReq);
1597 }
1598
1599 case VMMR0_DO_INTNET_IF_CLOSE:
1600 if (u64Arg || !pReqHdr || !vmmR0IsValidSession(pVM, ((PINTNETIFCLOSEREQ)pReqHdr)->pSession, pSession) || idCpu != NIL_VMCPUID)
1601 return VERR_INVALID_PARAMETER;
1602 return IntNetR0IfCloseReq(pSession, (PINTNETIFCLOSEREQ)pReqHdr);
1603
1604 case VMMR0_DO_INTNET_IF_GET_BUFFER_PTRS:
1605 if (u64Arg || !pReqHdr || !vmmR0IsValidSession(pVM, ((PINTNETIFGETBUFFERPTRSREQ)pReqHdr)->pSession, pSession) || idCpu != NIL_VMCPUID)
1606 return VERR_INVALID_PARAMETER;
1607 return IntNetR0IfGetBufferPtrsReq(pSession, (PINTNETIFGETBUFFERPTRSREQ)pReqHdr);
1608
1609 case VMMR0_DO_INTNET_IF_SET_PROMISCUOUS_MODE:
1610 if (u64Arg || !pReqHdr || !vmmR0IsValidSession(pVM, ((PINTNETIFSETPROMISCUOUSMODEREQ)pReqHdr)->pSession, pSession) || idCpu != NIL_VMCPUID)
1611 return VERR_INVALID_PARAMETER;
1612 return IntNetR0IfSetPromiscuousModeReq(pSession, (PINTNETIFSETPROMISCUOUSMODEREQ)pReqHdr);
1613
1614 case VMMR0_DO_INTNET_IF_SET_MAC_ADDRESS:
1615 if (u64Arg || !pReqHdr || !vmmR0IsValidSession(pVM, ((PINTNETIFSETMACADDRESSREQ)pReqHdr)->pSession, pSession) || idCpu != NIL_VMCPUID)
1616 return VERR_INVALID_PARAMETER;
1617 return IntNetR0IfSetMacAddressReq(pSession, (PINTNETIFSETMACADDRESSREQ)pReqHdr);
1618
1619 case VMMR0_DO_INTNET_IF_SET_ACTIVE:
1620 if (u64Arg || !pReqHdr || !vmmR0IsValidSession(pVM, ((PINTNETIFSETACTIVEREQ)pReqHdr)->pSession, pSession) || idCpu != NIL_VMCPUID)
1621 return VERR_INVALID_PARAMETER;
1622 return IntNetR0IfSetActiveReq(pSession, (PINTNETIFSETACTIVEREQ)pReqHdr);
1623
1624 case VMMR0_DO_INTNET_IF_SEND:
1625 if (u64Arg || !pReqHdr || !vmmR0IsValidSession(pVM, ((PINTNETIFSENDREQ)pReqHdr)->pSession, pSession) || idCpu != NIL_VMCPUID)
1626 return VERR_INVALID_PARAMETER;
1627 return IntNetR0IfSendReq(pSession, (PINTNETIFSENDREQ)pReqHdr);
1628
1629 case VMMR0_DO_INTNET_IF_WAIT:
1630 if (u64Arg || !pReqHdr || !vmmR0IsValidSession(pVM, ((PINTNETIFWAITREQ)pReqHdr)->pSession, pSession) || idCpu != NIL_VMCPUID)
1631 return VERR_INVALID_PARAMETER;
1632 return IntNetR0IfWaitReq(pSession, (PINTNETIFWAITREQ)pReqHdr);
1633
1634 case VMMR0_DO_INTNET_IF_ABORT_WAIT:
1635 if (u64Arg || !pReqHdr || !vmmR0IsValidSession(pVM, ((PINTNETIFWAITREQ)pReqHdr)->pSession, pSession) || idCpu != NIL_VMCPUID)
1636 return VERR_INVALID_PARAMETER;
1637 return IntNetR0IfAbortWaitReq(pSession, (PINTNETIFABORTWAITREQ)pReqHdr);
1638
1639#ifdef VBOX_WITH_PCI_PASSTHROUGH
1640 /*
1641 * Requests to host PCI driver service.
1642 */
1643 case VMMR0_DO_PCIRAW_REQ:
1644 if (u64Arg || !pReqHdr || !vmmR0IsValidSession(pVM, ((PPCIRAWSENDREQ)pReqHdr)->pSession, pSession) || idCpu != NIL_VMCPUID)
1645 return VERR_INVALID_PARAMETER;
1646 return PciRawR0ProcessReq(pSession, pVM, (PPCIRAWSENDREQ)pReqHdr);
1647#endif
1648 /*
1649 * For profiling.
1650 */
1651 case VMMR0_DO_NOP:
1652 case VMMR0_DO_SLOW_NOP:
1653 return VINF_SUCCESS;
1654
1655 /*
1656 * For testing Ring-0 APIs invoked in this environment.
1657 */
1658 case VMMR0_DO_TESTS:
1659 /** @todo make new test */
1660 return VINF_SUCCESS;
1661
1662
1663#if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL)
1664 case VMMR0_DO_TEST_SWITCHER3264:
1665 if (idCpu == NIL_VMCPUID)
1666 return VERR_INVALID_CPU_ID;
1667 return HMR0TestSwitcher3264(pVM);
1668#endif
1669 default:
1670 /*
1671 * We're returning VERR_NOT_SUPPORT here so we've got something else
1672 * than -1 which the interrupt gate glue code might return.
1673 */
1674 Log(("operation %#x is not supported\n", enmOperation));
1675 return VERR_NOT_SUPPORTED;
1676 }
1677}
1678
1679
1680/**
1681 * Argument for vmmR0EntryExWrapper containing the arguments for VMMR0EntryEx.
1682 */
1683typedef struct VMMR0ENTRYEXARGS
1684{
1685 PVM pVM;
1686 VMCPUID idCpu;
1687 VMMR0OPERATION enmOperation;
1688 PSUPVMMR0REQHDR pReq;
1689 uint64_t u64Arg;
1690 PSUPDRVSESSION pSession;
1691} VMMR0ENTRYEXARGS;
1692/** Pointer to a vmmR0EntryExWrapper argument package. */
1693typedef VMMR0ENTRYEXARGS *PVMMR0ENTRYEXARGS;
1694
1695/**
1696 * This is just a longjmp wrapper function for VMMR0EntryEx calls.
1697 *
1698 * @returns VBox status code.
1699 * @param pvArgs The argument package
1700 */
1701static DECLCALLBACK(int) vmmR0EntryExWrapper(void *pvArgs)
1702{
1703 return vmmR0EntryExWorker(((PVMMR0ENTRYEXARGS)pvArgs)->pVM,
1704 ((PVMMR0ENTRYEXARGS)pvArgs)->idCpu,
1705 ((PVMMR0ENTRYEXARGS)pvArgs)->enmOperation,
1706 ((PVMMR0ENTRYEXARGS)pvArgs)->pReq,
1707 ((PVMMR0ENTRYEXARGS)pvArgs)->u64Arg,
1708 ((PVMMR0ENTRYEXARGS)pvArgs)->pSession);
1709}
1710
1711
1712/**
1713 * The Ring 0 entry point, called by the support library (SUP).
1714 *
1715 * @returns VBox status code.
1716 * @param pVM Pointer to the VM.
1717 * @param idCpu Virtual CPU ID argument. Must be NIL_VMCPUID if pVM
1718 * is NIL_RTR0PTR, and may be NIL_VMCPUID if it isn't
1719 * @param enmOperation Which operation to execute.
1720 * @param pReq Pointer to the SUPVMMR0REQHDR packet. Optional.
1721 * @param u64Arg Some simple constant argument.
1722 * @param pSession The session of the caller.
1723 * @remarks Assume called with interrupts _enabled_.
1724 */
1725VMMR0DECL(int) VMMR0EntryEx(PVM pVM, VMCPUID idCpu, VMMR0OPERATION enmOperation, PSUPVMMR0REQHDR pReq, uint64_t u64Arg, PSUPDRVSESSION pSession)
1726{
1727 /*
1728 * Requests that should only happen on the EMT thread will be
1729 * wrapped in a setjmp so we can assert without causing trouble.
1730 */
1731 if ( VALID_PTR(pVM)
1732 && pVM->pVMR0
1733 && idCpu < pVM->cCpus)
1734 {
1735 switch (enmOperation)
1736 {
1737 /* These might/will be called before VMMR3Init. */
1738 case VMMR0_DO_GMM_INITIAL_RESERVATION:
1739 case VMMR0_DO_GMM_UPDATE_RESERVATION:
1740 case VMMR0_DO_GMM_ALLOCATE_PAGES:
1741 case VMMR0_DO_GMM_FREE_PAGES:
1742 case VMMR0_DO_GMM_BALLOONED_PAGES:
1743 /* On the mac we might not have a valid jmp buf, so check these as well. */
1744 case VMMR0_DO_VMMR0_INIT:
1745 case VMMR0_DO_VMMR0_TERM:
1746 {
1747 PVMCPU pVCpu = &pVM->aCpus[idCpu];
1748
1749 if (!pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack)
1750 break;
1751
1752 /** @todo validate this EMT claim... GVM knows. */
1753 VMMR0ENTRYEXARGS Args;
1754 Args.pVM = pVM;
1755 Args.idCpu = idCpu;
1756 Args.enmOperation = enmOperation;
1757 Args.pReq = pReq;
1758 Args.u64Arg = u64Arg;
1759 Args.pSession = pSession;
1760 return vmmR0CallRing3SetJmpEx(&pVCpu->vmm.s.CallRing3JmpBufR0, vmmR0EntryExWrapper, &Args);
1761 }
1762
1763 default:
1764 break;
1765 }
1766 }
1767 return vmmR0EntryExWorker(pVM, idCpu, enmOperation, pReq, u64Arg, pSession);
1768}
1769
1770
1771/**
1772 * Checks whether we've armed the ring-0 long jump machinery.
1773 *
1774 * @returns @c true / @c false
1775 * @param pVCpu Pointer to the VMCPU.
1776 * @thread EMT
1777 * @sa VMMIsLongJumpArmed
1778 */
1779VMMR0_INT_DECL(bool) VMMR0IsLongJumpArmed(PVMCPU pVCpu)
1780{
1781#ifdef RT_ARCH_X86
1782 return pVCpu->vmm.s.CallRing3JmpBufR0.eip
1783 && !pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call;
1784#else
1785 return pVCpu->vmm.s.CallRing3JmpBufR0.rip
1786 && !pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call;
1787#endif
1788}
1789
1790
1791/**
1792 * Checks whether we've done a ring-3 long jump.
1793 *
1794 * @returns @c true / @c false
1795 * @param pVCpu Pointer to the VMCPU.
1796 * @thread EMT
1797 */
1798VMMR0_INT_DECL(bool) VMMR0IsInRing3LongJump(PVMCPU pVCpu)
1799{
1800 return pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call;
1801}
1802
1803
1804/**
1805 * Internal R0 logger worker: Flush logger.
1806 *
1807 * @param pLogger The logger instance to flush.
1808 * @remark This function must be exported!
1809 */
1810VMMR0DECL(void) vmmR0LoggerFlush(PRTLOGGER pLogger)
1811{
1812#ifdef LOG_ENABLED
1813 /*
1814 * Convert the pLogger into a VM handle and 'call' back to Ring-3.
1815 * (This is a bit paranoid code.)
1816 */
1817 PVMMR0LOGGER pR0Logger = (PVMMR0LOGGER)((uintptr_t)pLogger - RT_OFFSETOF(VMMR0LOGGER, Logger));
1818 if ( !VALID_PTR(pR0Logger)
1819 || !VALID_PTR(pR0Logger + 1)
1820 || pLogger->u32Magic != RTLOGGER_MAGIC)
1821 {
1822# ifdef DEBUG
1823 SUPR0Printf("vmmR0LoggerFlush: pLogger=%p!\n", pLogger);
1824# endif
1825 return;
1826 }
1827 if (pR0Logger->fFlushingDisabled)
1828 return; /* quietly */
1829
1830 PVM pVM = pR0Logger->pVM;
1831 if ( !VALID_PTR(pVM)
1832 || pVM->pVMR0 != pVM)
1833 {
1834# ifdef DEBUG
1835 SUPR0Printf("vmmR0LoggerFlush: pVM=%p! pVMR0=%p! pLogger=%p\n", pVM, pVM->pVMR0, pLogger);
1836# endif
1837 return;
1838 }
1839
1840 PVMCPU pVCpu = VMMGetCpu(pVM);
1841 if (pVCpu)
1842 {
1843 /*
1844 * Check that the jump buffer is armed.
1845 */
1846# ifdef RT_ARCH_X86
1847 if ( !pVCpu->vmm.s.CallRing3JmpBufR0.eip
1848 || pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call)
1849# else
1850 if ( !pVCpu->vmm.s.CallRing3JmpBufR0.rip
1851 || pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call)
1852# endif
1853 {
1854# ifdef DEBUG
1855 SUPR0Printf("vmmR0LoggerFlush: Jump buffer isn't armed!\n");
1856# endif
1857 return;
1858 }
1859 VMMRZCallRing3(pVM, pVCpu, VMMCALLRING3_VMM_LOGGER_FLUSH, 0);
1860 }
1861# ifdef DEBUG
1862 else
1863 SUPR0Printf("vmmR0LoggerFlush: invalid VCPU context!\n");
1864# endif
1865#endif
1866}
1867
1868/**
1869 * Internal R0 logger worker: Custom prefix.
1870 *
1871 * @returns Number of chars written.
1872 *
1873 * @param pLogger The logger instance.
1874 * @param pchBuf The output buffer.
1875 * @param cchBuf The size of the buffer.
1876 * @param pvUser User argument (ignored).
1877 */
1878VMMR0DECL(size_t) vmmR0LoggerPrefix(PRTLOGGER pLogger, char *pchBuf, size_t cchBuf, void *pvUser)
1879{
1880 NOREF(pvUser);
1881#ifdef LOG_ENABLED
1882 PVMMR0LOGGER pR0Logger = (PVMMR0LOGGER)((uintptr_t)pLogger - RT_OFFSETOF(VMMR0LOGGER, Logger));
1883 if ( !VALID_PTR(pR0Logger)
1884 || !VALID_PTR(pR0Logger + 1)
1885 || pLogger->u32Magic != RTLOGGER_MAGIC
1886 || cchBuf < 2)
1887 return 0;
1888
1889 static const char s_szHex[17] = "0123456789abcdef";
1890 VMCPUID const idCpu = pR0Logger->idCpu;
1891 pchBuf[1] = s_szHex[ idCpu & 15];
1892 pchBuf[0] = s_szHex[(idCpu >> 4) & 15];
1893
1894 return 2;
1895#else
1896 return 0;
1897#endif
1898}
1899
1900#ifdef LOG_ENABLED
1901
1902/**
1903 * Disables flushing of the ring-0 debug log.
1904 *
1905 * @param pVCpu Pointer to the VMCPU.
1906 */
1907VMMR0_INT_DECL(void) VMMR0LogFlushDisable(PVMCPU pVCpu)
1908{
1909 if (pVCpu->vmm.s.pR0LoggerR0)
1910 pVCpu->vmm.s.pR0LoggerR0->fFlushingDisabled = true;
1911}
1912
1913
1914/**
1915 * Enables flushing of the ring-0 debug log.
1916 *
1917 * @param pVCpu Pointer to the VMCPU.
1918 */
1919VMMR0_INT_DECL(void) VMMR0LogFlushEnable(PVMCPU pVCpu)
1920{
1921 if (pVCpu->vmm.s.pR0LoggerR0)
1922 pVCpu->vmm.s.pR0LoggerR0->fFlushingDisabled = false;
1923}
1924
1925
1926/**
1927 * Checks if log flushing is disabled or not.
1928 *
1929 * @param pVCpu Pointer to the VMCPU.
1930 */
1931VMMR0_INT_DECL(bool) VMMR0IsLogFlushDisabled(PVMCPU pVCpu)
1932{
1933 if (pVCpu->vmm.s.pR0LoggerR0)
1934 return pVCpu->vmm.s.pR0LoggerR0->fFlushingDisabled;
1935 return true;
1936}
1937#endif /* LOG_ENABLED */
1938
1939/**
1940 * Jump back to ring-3 if we're the EMT and the longjmp is armed.
1941 *
1942 * @returns true if the breakpoint should be hit, false if it should be ignored.
1943 */
1944DECLEXPORT(bool) RTCALL RTAssertShouldPanic(void)
1945{
1946#if 0
1947 return true;
1948#else
1949 PVM pVM = GVMMR0GetVMByEMT(NIL_RTNATIVETHREAD);
1950 if (pVM)
1951 {
1952 PVMCPU pVCpu = VMMGetCpu(pVM);
1953
1954 if (pVCpu)
1955 {
1956#ifdef RT_ARCH_X86
1957 if ( pVCpu->vmm.s.CallRing3JmpBufR0.eip
1958 && !pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call)
1959#else
1960 if ( pVCpu->vmm.s.CallRing3JmpBufR0.rip
1961 && !pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call)
1962#endif
1963 {
1964 int rc = VMMRZCallRing3(pVM, pVCpu, VMMCALLRING3_VM_R0_ASSERTION, 0);
1965 return RT_FAILURE_NP(rc);
1966 }
1967 }
1968 }
1969#ifdef RT_OS_LINUX
1970 return true;
1971#else
1972 return false;
1973#endif
1974#endif
1975}
1976
1977
1978/**
1979 * Override this so we can push it up to ring-3.
1980 *
1981 * @param pszExpr Expression. Can be NULL.
1982 * @param uLine Location line number.
1983 * @param pszFile Location file name.
1984 * @param pszFunction Location function name.
1985 */
1986DECLEXPORT(void) RTCALL RTAssertMsg1Weak(const char *pszExpr, unsigned uLine, const char *pszFile, const char *pszFunction)
1987{
1988 /*
1989 * To the log.
1990 */
1991 LogAlways(("\n!!R0-Assertion Failed!!\n"
1992 "Expression: %s\n"
1993 "Location : %s(%d) %s\n",
1994 pszExpr, pszFile, uLine, pszFunction));
1995
1996 /*
1997 * To the global VMM buffer.
1998 */
1999 PVM pVM = GVMMR0GetVMByEMT(NIL_RTNATIVETHREAD);
2000 if (pVM)
2001 RTStrPrintf(pVM->vmm.s.szRing0AssertMsg1, sizeof(pVM->vmm.s.szRing0AssertMsg1),
2002 "\n!!R0-Assertion Failed!!\n"
2003 "Expression: %s\n"
2004 "Location : %s(%d) %s\n",
2005 pszExpr, pszFile, uLine, pszFunction);
2006
2007 /*
2008 * Continue the normal way.
2009 */
2010 RTAssertMsg1(pszExpr, uLine, pszFile, pszFunction);
2011}
2012
2013
2014/**
2015 * Callback for RTLogFormatV which writes to the ring-3 log port.
2016 * See PFNLOGOUTPUT() for details.
2017 */
2018static DECLCALLBACK(size_t) rtLogOutput(void *pv, const char *pachChars, size_t cbChars)
2019{
2020 for (size_t i = 0; i < cbChars; i++)
2021 LogAlways(("%c", pachChars[i]));
2022
2023 NOREF(pv);
2024 return cbChars;
2025}
2026
2027
2028/**
2029 * Override this so we can push it up to ring-3.
2030 *
2031 * @param pszFormat The format string.
2032 * @param va Arguments.
2033 */
2034DECLEXPORT(void) RTCALL RTAssertMsg2WeakV(const char *pszFormat, va_list va)
2035{
2036 va_list vaCopy;
2037
2038 /*
2039 * Push the message to the loggers.
2040 */
2041 PRTLOGGER pLog = RTLogGetDefaultInstance(); /* Don't initialize it here... */
2042 if (pLog)
2043 {
2044 va_copy(vaCopy, va);
2045 RTLogFormatV(rtLogOutput, pLog, pszFormat, vaCopy);
2046 va_end(vaCopy);
2047 }
2048 pLog = RTLogRelDefaultInstance();
2049 if (pLog)
2050 {
2051 va_copy(vaCopy, va);
2052 RTLogFormatV(rtLogOutput, pLog, pszFormat, vaCopy);
2053 va_end(vaCopy);
2054 }
2055
2056 /*
2057 * Push it to the global VMM buffer.
2058 */
2059 PVM pVM = GVMMR0GetVMByEMT(NIL_RTNATIVETHREAD);
2060 if (pVM)
2061 {
2062 va_copy(vaCopy, va);
2063 RTStrPrintfV(pVM->vmm.s.szRing0AssertMsg2, sizeof(pVM->vmm.s.szRing0AssertMsg2), pszFormat, vaCopy);
2064 va_end(vaCopy);
2065 }
2066
2067 /*
2068 * Continue the normal way.
2069 */
2070 RTAssertMsg2V(pszFormat, va);
2071}
2072
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette