VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR0/VMMR0.cpp@ 56034

Last change on this file since 56034 was 55980, checked in by vboxsync, 10 years ago

iprt/log.h,++: Added extended logger instance getters that also checks whether the given logger and group-flags are enabled, making the LogRel* checks more efficient in avoid uncessary RTLogLoggerEx parameter building and calls. Ditto for debug logging. The LOG_INSTANCE and LOG_REL_INSTANCE tricks are gone for now.

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1/* $Id: VMMR0.cpp 55980 2015-05-20 17:35:22Z vboxsync $ */
2/** @file
3 * VMM - Host Context Ring 0.
4 */
5
6/*
7 * Copyright (C) 2006-2012 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18/*******************************************************************************
19* Header Files *
20*******************************************************************************/
21#define LOG_GROUP LOG_GROUP_VMM
22#include <VBox/vmm/vmm.h>
23#include <VBox/sup.h>
24#include <VBox/vmm/trpm.h>
25#include <VBox/vmm/cpum.h>
26#include <VBox/vmm/pdmapi.h>
27#include <VBox/vmm/pgm.h>
28#include <VBox/vmm/stam.h>
29#include <VBox/vmm/tm.h>
30#include "VMMInternal.h"
31#include <VBox/vmm/vm.h>
32#ifdef VBOX_WITH_PCI_PASSTHROUGH
33# include <VBox/vmm/pdmpci.h>
34#endif
35
36#include <VBox/vmm/gvmm.h>
37#include <VBox/vmm/gmm.h>
38#include <VBox/vmm/gim.h>
39#include <VBox/intnet.h>
40#include <VBox/vmm/hm.h>
41#include <VBox/param.h>
42#include <VBox/err.h>
43#include <VBox/version.h>
44#include <VBox/log.h>
45
46#include <iprt/asm-amd64-x86.h>
47#include <iprt/assert.h>
48#include <iprt/crc.h>
49#include <iprt/mp.h>
50#include <iprt/once.h>
51#include <iprt/stdarg.h>
52#include <iprt/string.h>
53#include <iprt/thread.h>
54#include <iprt/timer.h>
55
56#include "dtrace/VBoxVMM.h"
57
58
59#if defined(_MSC_VER) && defined(RT_ARCH_AMD64) /** @todo check this with with VC7! */
60# pragma intrinsic(_AddressOfReturnAddress)
61#endif
62
63
64/*******************************************************************************
65* Internal Functions *
66*******************************************************************************/
67RT_C_DECLS_BEGIN
68#if defined(RT_ARCH_X86) && (defined(RT_OS_SOLARIS) || defined(RT_OS_FREEBSD))
69extern uint64_t __udivdi3(uint64_t, uint64_t);
70extern uint64_t __umoddi3(uint64_t, uint64_t);
71#endif
72RT_C_DECLS_END
73
74
75/*******************************************************************************
76* Global Variables *
77*******************************************************************************/
78/** Drag in necessary library bits.
79 * The runtime lives here (in VMMR0.r0) and VBoxDD*R0.r0 links against us. */
80PFNRT g_VMMGCDeps[] =
81{
82 (PFNRT)RTCrc32,
83 (PFNRT)RTOnce,
84#if defined(RT_ARCH_X86) && (defined(RT_OS_SOLARIS) || defined(RT_OS_FREEBSD))
85 (PFNRT)__udivdi3,
86 (PFNRT)__umoddi3,
87#endif
88 NULL
89};
90
91#ifdef RT_OS_SOLARIS
92/* Dependency information for the native solaris loader. */
93extern "C" { char _depends_on[] = "vboxdrv"; }
94#endif
95
96
97
98/**
99 * Initialize the module.
100 * This is called when we're first loaded.
101 *
102 * @returns 0 on success.
103 * @returns VBox status on failure.
104 * @param hMod Image handle for use in APIs.
105 */
106DECLEXPORT(int) ModuleInit(void *hMod)
107{
108#ifdef VBOX_WITH_DTRACE_R0
109 /*
110 * The first thing to do is register the static tracepoints.
111 * (Deregistration is automatic.)
112 */
113 int rc2 = SUPR0TracerRegisterModule(hMod, &g_VTGObjHeader);
114 if (RT_FAILURE(rc2))
115 return rc2;
116#endif
117 LogFlow(("ModuleInit:\n"));
118
119#ifdef VBOX_WITH_64ON32_CMOS_DEBUG
120 /*
121 * Display the CMOS debug code.
122 */
123 ASMOutU8(0x72, 0x03);
124 uint8_t bDebugCode = ASMInU8(0x73);
125 LogRel(("CMOS Debug Code: %#x (%d)\n", bDebugCode, bDebugCode));
126 RTLogComPrintf("CMOS Debug Code: %#x (%d)\n", bDebugCode, bDebugCode);
127#endif
128
129 /*
130 * Initialize the VMM, GVMM, GMM, HM, PGM (Darwin) and INTNET.
131 */
132 int rc = vmmInitFormatTypes();
133 if (RT_SUCCESS(rc))
134 {
135 rc = GVMMR0Init();
136 if (RT_SUCCESS(rc))
137 {
138 rc = GMMR0Init();
139 if (RT_SUCCESS(rc))
140 {
141 rc = HMR0Init();
142 if (RT_SUCCESS(rc))
143 {
144 rc = PGMRegisterStringFormatTypes();
145 if (RT_SUCCESS(rc))
146 {
147#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
148 rc = PGMR0DynMapInit();
149#endif
150 if (RT_SUCCESS(rc))
151 {
152 rc = IntNetR0Init();
153 if (RT_SUCCESS(rc))
154 {
155#ifdef VBOX_WITH_PCI_PASSTHROUGH
156 rc = PciRawR0Init();
157#endif
158 if (RT_SUCCESS(rc))
159 {
160 rc = CPUMR0ModuleInit();
161 if (RT_SUCCESS(rc))
162 {
163#ifdef VBOX_WITH_TRIPLE_FAULT_HACK
164 rc = vmmR0TripleFaultHackInit();
165 if (RT_SUCCESS(rc))
166#endif
167 {
168 LogFlow(("ModuleInit: returns success.\n"));
169 return VINF_SUCCESS;
170 }
171
172 /*
173 * Bail out.
174 */
175#ifdef VBOX_WITH_TRIPLE_FAULT_HACK
176 vmmR0TripleFaultHackTerm();
177#endif
178 }
179 else
180 LogRel(("ModuleInit: CPUMR0ModuleInit -> %Rrc\n", rc));
181#ifdef VBOX_WITH_PCI_PASSTHROUGH
182 PciRawR0Term();
183#endif
184 }
185 else
186 LogRel(("ModuleInit: PciRawR0Init -> %Rrc\n", rc));
187 IntNetR0Term();
188 }
189 else
190 LogRel(("ModuleInit: IntNetR0Init -> %Rrc\n", rc));
191#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
192 PGMR0DynMapTerm();
193#endif
194 }
195 else
196 LogRel(("ModuleInit: PGMR0DynMapInit -> %Rrc\n", rc));
197 PGMDeregisterStringFormatTypes();
198 }
199 else
200 LogRel(("ModuleInit: PGMRegisterStringFormatTypes -> %Rrc\n", rc));
201 HMR0Term();
202 }
203 else
204 LogRel(("ModuleInit: HMR0Init -> %Rrc\n", rc));
205 GMMR0Term();
206 }
207 else
208 LogRel(("ModuleInit: GMMR0Init -> %Rrc\n", rc));
209 GVMMR0Term();
210 }
211 else
212 LogRel(("ModuleInit: GVMMR0Init -> %Rrc\n", rc));
213 vmmTermFormatTypes();
214 }
215 else
216 LogRel(("ModuleInit: vmmInitFormatTypes -> %Rrc\n", rc));
217
218 LogFlow(("ModuleInit: failed %Rrc\n", rc));
219 return rc;
220}
221
222
223/**
224 * Terminate the module.
225 * This is called when we're finally unloaded.
226 *
227 * @param hMod Image handle for use in APIs.
228 */
229DECLEXPORT(void) ModuleTerm(void *hMod)
230{
231 NOREF(hMod);
232 LogFlow(("ModuleTerm:\n"));
233
234 /*
235 * Terminate the CPUM module (Local APIC cleanup).
236 */
237 CPUMR0ModuleTerm();
238
239 /*
240 * Terminate the internal network service.
241 */
242 IntNetR0Term();
243
244 /*
245 * PGM (Darwin), HM and PciRaw global cleanup.
246 */
247#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
248 PGMR0DynMapTerm();
249#endif
250#ifdef VBOX_WITH_PCI_PASSTHROUGH
251 PciRawR0Term();
252#endif
253 PGMDeregisterStringFormatTypes();
254 HMR0Term();
255#ifdef VBOX_WITH_TRIPLE_FAULT_HACK
256 vmmR0TripleFaultHackTerm();
257#endif
258
259 /*
260 * Destroy the GMM and GVMM instances.
261 */
262 GMMR0Term();
263 GVMMR0Term();
264
265 vmmTermFormatTypes();
266
267 LogFlow(("ModuleTerm: returns\n"));
268}
269
270
271/**
272 * Initiates the R0 driver for a particular VM instance.
273 *
274 * @returns VBox status code.
275 *
276 * @param pVM Pointer to the VM.
277 * @param uSvnRev The SVN revision of the ring-3 part.
278 * @param uBuildType Build type indicator.
279 * @thread EMT.
280 */
281static int vmmR0InitVM(PVM pVM, uint32_t uSvnRev, uint32_t uBuildType)
282{
283 /*
284 * Match the SVN revisions and build type.
285 */
286 if (uSvnRev != VMMGetSvnRev())
287 {
288 LogRel(("VMMR0InitVM: Revision mismatch, r3=%d r0=%d\n", uSvnRev, VMMGetSvnRev()));
289 SUPR0Printf("VMMR0InitVM: Revision mismatch, r3=%d r0=%d\n", uSvnRev, VMMGetSvnRev());
290 return VERR_VMM_R0_VERSION_MISMATCH;
291 }
292 if (uBuildType != vmmGetBuildType())
293 {
294 LogRel(("VMMR0InitVM: Build type mismatch, r3=%#x r0=%#x\n", uBuildType, vmmGetBuildType()));
295 SUPR0Printf("VMMR0InitVM: Build type mismatch, r3=%#x r0=%#x\n", uBuildType, vmmGetBuildType());
296 return VERR_VMM_R0_VERSION_MISMATCH;
297 }
298 if ( !VALID_PTR(pVM)
299 || pVM->pVMR0 != pVM)
300 return VERR_INVALID_PARAMETER;
301
302
303#ifdef LOG_ENABLED
304 /*
305 * Register the EMT R0 logger instance for VCPU 0.
306 */
307 PVMCPU pVCpu = &pVM->aCpus[0];
308
309 PVMMR0LOGGER pR0Logger = pVCpu->vmm.s.pR0LoggerR0;
310 if (pR0Logger)
311 {
312# if 0 /* testing of the logger. */
313 LogCom(("vmmR0InitVM: before %p\n", RTLogDefaultInstance()));
314 LogCom(("vmmR0InitVM: pfnFlush=%p actual=%p\n", pR0Logger->Logger.pfnFlush, vmmR0LoggerFlush));
315 LogCom(("vmmR0InitVM: pfnLogger=%p actual=%p\n", pR0Logger->Logger.pfnLogger, vmmR0LoggerWrapper));
316 LogCom(("vmmR0InitVM: offScratch=%d fFlags=%#x fDestFlags=%#x\n", pR0Logger->Logger.offScratch, pR0Logger->Logger.fFlags, pR0Logger->Logger.fDestFlags));
317
318 RTLogSetDefaultInstanceThread(&pR0Logger->Logger, (uintptr_t)pVM->pSession);
319 LogCom(("vmmR0InitVM: after %p reg\n", RTLogDefaultInstance()));
320 RTLogSetDefaultInstanceThread(NULL, pVM->pSession);
321 LogCom(("vmmR0InitVM: after %p dereg\n", RTLogDefaultInstance()));
322
323 pR0Logger->Logger.pfnLogger("hello ring-0 logger\n");
324 LogCom(("vmmR0InitVM: returned successfully from direct logger call.\n"));
325 pR0Logger->Logger.pfnFlush(&pR0Logger->Logger);
326 LogCom(("vmmR0InitVM: returned successfully from direct flush call.\n"));
327
328 RTLogSetDefaultInstanceThread(&pR0Logger->Logger, (uintptr_t)pVM->pSession);
329 LogCom(("vmmR0InitVM: after %p reg2\n", RTLogDefaultInstance()));
330 pR0Logger->Logger.pfnLogger("hello ring-0 logger\n");
331 LogCom(("vmmR0InitVM: returned successfully from direct logger call (2). offScratch=%d\n", pR0Logger->Logger.offScratch));
332 RTLogSetDefaultInstanceThread(NULL, pVM->pSession);
333 LogCom(("vmmR0InitVM: after %p dereg2\n", RTLogDefaultInstance()));
334
335 RTLogLoggerEx(&pR0Logger->Logger, 0, ~0U, "hello ring-0 logger (RTLogLoggerEx)\n");
336 LogCom(("vmmR0InitVM: RTLogLoggerEx returned fine offScratch=%d\n", pR0Logger->Logger.offScratch));
337
338 RTLogSetDefaultInstanceThread(&pR0Logger->Logger, (uintptr_t)pVM->pSession);
339 RTLogPrintf("hello ring-0 logger (RTLogPrintf)\n");
340 LogCom(("vmmR0InitVM: RTLogPrintf returned fine offScratch=%d\n", pR0Logger->Logger.offScratch));
341# endif
342 Log(("Switching to per-thread logging instance %p (key=%p)\n", &pR0Logger->Logger, pVM->pSession));
343 RTLogSetDefaultInstanceThread(&pR0Logger->Logger, (uintptr_t)pVM->pSession);
344 pR0Logger->fRegistered = true;
345 }
346#endif /* LOG_ENABLED */
347
348 /*
349 * Check if the host supports high resolution timers or not.
350 */
351 if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
352 && !RTTimerCanDoHighResolution())
353 pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
354
355 /*
356 * Initialize the per VM data for GVMM and GMM.
357 */
358 int rc = GVMMR0InitVM(pVM);
359// if (RT_SUCCESS(rc))
360// rc = GMMR0InitPerVMData(pVM);
361 if (RT_SUCCESS(rc))
362 {
363 /*
364 * Init HM, CPUM and PGM (Darwin only).
365 */
366 rc = HMR0InitVM(pVM);
367 if (RT_SUCCESS(rc))
368 {
369 rc = CPUMR0InitVM(pVM);
370 if (RT_SUCCESS(rc))
371 {
372#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
373 rc = PGMR0DynMapInitVM(pVM);
374#endif
375 if (RT_SUCCESS(rc))
376 {
377#ifdef VBOX_WITH_PCI_PASSTHROUGH
378 rc = PciRawR0InitVM(pVM);
379#endif
380 if (RT_SUCCESS(rc))
381 {
382 rc = GIMR0InitVM(pVM);
383 if (RT_SUCCESS(rc))
384 {
385 GVMMR0DoneInitVM(pVM);
386 return rc;
387 }
388
389 /* bail out*/
390#ifdef VBOX_WITH_PCI_PASSTHROUGH
391 PciRawR0TermVM(pVM);
392#endif
393 }
394 }
395 }
396 HMR0TermVM(pVM);
397 }
398 }
399
400
401 RTLogSetDefaultInstanceThread(NULL, (uintptr_t)pVM->pSession);
402 return rc;
403}
404
405
406/**
407 * Terminates the R0 bits for a particular VM instance.
408 *
409 * This is normally called by ring-3 as part of the VM termination process, but
410 * may alternatively be called during the support driver session cleanup when
411 * the VM object is destroyed (see GVMM).
412 *
413 * @returns VBox status code.
414 *
415 * @param pVM Pointer to the VM.
416 * @param pGVM Pointer to the global VM structure. Optional.
417 * @thread EMT or session clean up thread.
418 */
419VMMR0_INT_DECL(int) VMMR0TermVM(PVM pVM, PGVM pGVM)
420{
421#ifdef VBOX_WITH_PCI_PASSTHROUGH
422 PciRawR0TermVM(pVM);
423#endif
424
425 /*
426 * Tell GVMM what we're up to and check that we only do this once.
427 */
428 if (GVMMR0DoingTermVM(pVM, pGVM))
429 {
430 GIMR0TermVM(pVM);
431
432 /** @todo I wish to call PGMR0PhysFlushHandyPages(pVM, &pVM->aCpus[idCpu])
433 * here to make sure we don't leak any shared pages if we crash... */
434#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
435 PGMR0DynMapTermVM(pVM);
436#endif
437 HMR0TermVM(pVM);
438 }
439
440 /*
441 * Deregister the logger.
442 */
443 RTLogSetDefaultInstanceThread(NULL, (uintptr_t)pVM->pSession);
444 return VINF_SUCCESS;
445}
446
447
448/**
449 * VMM ring-0 thread-context callback.
450 *
451 * This does common HM state updating and calls the HM-specific thread-context
452 * callback.
453 *
454 * @param enmEvent The thread-context event.
455 * @param pvUser Opaque pointer to the VMCPU.
456 *
457 * @thread EMT(pvUser)
458 */
459static DECLCALLBACK(void) vmmR0ThreadCtxCallback(RTTHREADCTXEVENT enmEvent, void *pvUser)
460{
461 PVMCPU pVCpu = (PVMCPU)pvUser;
462
463 switch (enmEvent)
464 {
465 case RTTHREADCTXEVENT_IN:
466 {
467 /*
468 * Linux may call us with preemption enabled (really!) but technically we
469 * cannot get preempted here, otherwise we end up in an infinite recursion
470 * scenario (i.e. preempted in resume hook -> preempt hook -> resume hook...
471 * ad infinitum). Let's just disable preemption for now...
472 */
473 /** @todo r=bird: I don't believe the above. The linux code is clearly enabling
474 * preemption after doing the callout (one or two functions up the
475 * call chain). */
476 RTTHREADPREEMPTSTATE ParanoidPreemptState = RTTHREADPREEMPTSTATE_INITIALIZER;
477 RTThreadPreemptDisable(&ParanoidPreemptState);
478
479 /* We need to update the VCPU <-> host CPU mapping. */
480 RTCPUID idHostCpu;
481 uint32_t iHostCpuSet = RTMpCurSetIndexAndId(&idHostCpu);
482 pVCpu->iHostCpuSet = iHostCpuSet;
483 ASMAtomicWriteU32(&pVCpu->idHostCpu, idHostCpu);
484
485 /* In the very unlikely event that the GIP delta for the CPU we're
486 rescheduled needs calculating, try force a return to ring-3.
487 We unfortunately cannot do the measurements right here. */
488 if (RT_UNLIKELY(SUPIsTscDeltaAvailableForCpuSetIndex(iHostCpuSet)))
489 VMCPU_FF_SET(pVCpu, VMCPU_FF_TO_R3);
490
491 /* Invoke the HM-specific thread-context callback. */
492 HMR0ThreadCtxCallback(enmEvent, pvUser);
493
494 /* Restore preemption. */
495 RTThreadPreemptRestore(&ParanoidPreemptState);
496 break;
497 }
498
499 case RTTHREADCTXEVENT_OUT:
500 {
501 /* Invoke the HM-specific thread-context callback. */
502 HMR0ThreadCtxCallback(enmEvent, pvUser);
503
504 /*
505 * Sigh. See VMMGetCpu() used by VMCPU_ASSERT_EMT(). We cannot let several VCPUs
506 * have the same host CPU associated with it.
507 */
508 pVCpu->iHostCpuSet = UINT32_MAX;
509 ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID);
510 break;
511 }
512
513 default:
514 /* Invoke the HM-specific thread-context callback. */
515 HMR0ThreadCtxCallback(enmEvent, pvUser);
516 break;
517 }
518}
519
520
521/**
522 * Creates thread switching hook for the current EMT thread.
523 *
524 * This is called by GVMMR0CreateVM and GVMMR0RegisterVCpu. If the host
525 * platform does not implement switcher hooks, no hooks will be create and the
526 * member set to NIL_RTTHREADCTXHOOK.
527 *
528 * @returns VBox status code.
529 * @param pVCpu Pointer to the cross context CPU structure.
530 * @thread EMT(pVCpu)
531 */
532VMMR0_INT_DECL(int) VMMR0ThreadCtxHookCreateForEmt(PVMCPU pVCpu)
533{
534 VMCPU_ASSERT_EMT(pVCpu);
535 Assert(pVCpu->vmm.s.hCtxHook == NIL_RTTHREADCTXHOOK);
536
537 int rc = RTThreadCtxHookCreate(&pVCpu->vmm.s.hCtxHook, 0, vmmR0ThreadCtxCallback, pVCpu);
538 if (RT_SUCCESS(rc))
539 return rc;
540
541 pVCpu->vmm.s.hCtxHook = NIL_RTTHREADCTXHOOK;
542 if (rc == VERR_NOT_SUPPORTED)
543 return VINF_SUCCESS;
544
545 LogRelMax(32, ("RTThreadCtxHookCreate failed! rc=%Rrc pVCpu=%p idCpu=%RU32\n", rc, pVCpu, pVCpu->idCpu));
546 return VINF_SUCCESS; /* Just ignore it, we can live without context hooks. */
547}
548
549
550/**
551 * Destroys the thread switching hook for the specified VCPU.
552 *
553 * @param pVCpu Pointer to the cross context CPU structure.
554 * @remarks Can be called from any thread.
555 */
556VMMR0_INT_DECL(void) VMMR0ThreadCtxHookDestroyForEmt(PVMCPU pVCpu)
557{
558 int rc = RTThreadCtxHookDestroy(pVCpu->vmm.s.hCtxHook);
559 AssertRC(rc);
560}
561
562
563/**
564 * Disables the thread switching hook for this VCPU (if we got one).
565 *
566 * @param pVCpu Pointer to the cross context CPU structure.
567 * @thread EMT(pVCpu)
568 *
569 * @remarks This also clears VMCPU::idHostCpu, so the mapping is invalid after
570 * this call. This means you have to be careful with what you do!
571 */
572VMMR0_INT_DECL(void) VMMR0ThreadCtxHookDisable(PVMCPU pVCpu)
573{
574 /*
575 * Clear the VCPU <-> host CPU mapping as we've left HM context.
576 * @bugref{7726} comment #19 explains the need for this trick:
577 *
578 * hmR0VmxCallRing3Callback/hmR0SvmCallRing3Callback &
579 * hmR0VmxLeaveSession/hmR0SvmLeaveSession disables context hooks during
580 * longjmp & normal return to ring-3, which opens a window where we may be
581 * rescheduled without changing VMCPUID::idHostCpu and cause confusion if
582 * the CPU starts executing a different EMT. Both functions first disables
583 * preemption and then calls HMR0LeaveCpu which invalids idHostCpu, leaving
584 * an opening for getting preempted.
585 */
586 /** @todo Make HM not need this API! Then we could leave the hooks enabled
587 * all the time. */
588 /** @todo move this into the context hook disabling if(). */
589 ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID);
590
591 /*
592 * Disable the context hook, if we got one.
593 */
594 if (pVCpu->vmm.s.hCtxHook != NIL_RTTHREADCTXHOOK)
595 {
596 Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
597 int rc = RTThreadCtxHookDisable(pVCpu->vmm.s.hCtxHook);
598 AssertRC(rc);
599 }
600}
601
602
603/**
604 * Internal version of VMMR0ThreadCtxHooksAreRegistered.
605 *
606 * @returns true if registered, false otherwise.
607 * @param pVCpu Pointer to the VMCPU.
608 */
609DECLINLINE(bool) vmmR0ThreadCtxHookIsEnabled(PVMCPU pVCpu)
610{
611 return RTThreadCtxHookIsEnabled(pVCpu->vmm.s.hCtxHook);
612}
613
614
615/**
616 * Whether thread-context hooks are registered for this VCPU.
617 *
618 * @returns true if registered, false otherwise.
619 * @param pVCpu Pointer to the VMCPU.
620 */
621VMMR0_INT_DECL(bool) VMMR0ThreadCtxHookIsEnabled(PVMCPU pVCpu)
622{
623 return vmmR0ThreadCtxHookIsEnabled(pVCpu);
624}
625
626
627#ifdef VBOX_WITH_STATISTICS
628/**
629 * Record return code statistics
630 * @param pVM Pointer to the VM.
631 * @param pVCpu Pointer to the VMCPU.
632 * @param rc The status code.
633 */
634static void vmmR0RecordRC(PVM pVM, PVMCPU pVCpu, int rc)
635{
636 /*
637 * Collect statistics.
638 */
639 switch (rc)
640 {
641 case VINF_SUCCESS:
642 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetNormal);
643 break;
644 case VINF_EM_RAW_INTERRUPT:
645 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetInterrupt);
646 break;
647 case VINF_EM_RAW_INTERRUPT_HYPER:
648 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetInterruptHyper);
649 break;
650 case VINF_EM_RAW_GUEST_TRAP:
651 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetGuestTrap);
652 break;
653 case VINF_EM_RAW_RING_SWITCH:
654 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetRingSwitch);
655 break;
656 case VINF_EM_RAW_RING_SWITCH_INT:
657 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetRingSwitchInt);
658 break;
659 case VINF_EM_RAW_STALE_SELECTOR:
660 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetStaleSelector);
661 break;
662 case VINF_EM_RAW_IRET_TRAP:
663 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetIRETTrap);
664 break;
665 case VINF_IOM_R3_IOPORT_READ:
666 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetIORead);
667 break;
668 case VINF_IOM_R3_IOPORT_WRITE:
669 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetIOWrite);
670 break;
671 case VINF_IOM_R3_MMIO_READ:
672 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMMIORead);
673 break;
674 case VINF_IOM_R3_MMIO_WRITE:
675 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMMIOWrite);
676 break;
677 case VINF_IOM_R3_MMIO_READ_WRITE:
678 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMMIOReadWrite);
679 break;
680 case VINF_PATM_HC_MMIO_PATCH_READ:
681 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMMIOPatchRead);
682 break;
683 case VINF_PATM_HC_MMIO_PATCH_WRITE:
684 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMMIOPatchWrite);
685 break;
686 case VINF_CPUM_R3_MSR_READ:
687 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMSRRead);
688 break;
689 case VINF_CPUM_R3_MSR_WRITE:
690 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMSRWrite);
691 break;
692 case VINF_EM_RAW_EMULATE_INSTR:
693 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetEmulate);
694 break;
695 case VINF_EM_RAW_EMULATE_IO_BLOCK:
696 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetIOBlockEmulate);
697 break;
698 case VINF_PATCH_EMULATE_INSTR:
699 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPatchEmulate);
700 break;
701 case VINF_EM_RAW_EMULATE_INSTR_LDT_FAULT:
702 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetLDTFault);
703 break;
704 case VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT:
705 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetGDTFault);
706 break;
707 case VINF_EM_RAW_EMULATE_INSTR_IDT_FAULT:
708 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetIDTFault);
709 break;
710 case VINF_EM_RAW_EMULATE_INSTR_TSS_FAULT:
711 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetTSSFault);
712 break;
713 case VINF_EM_RAW_EMULATE_INSTR_PD_FAULT:
714 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPDFault);
715 break;
716 case VINF_CSAM_PENDING_ACTION:
717 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetCSAMTask);
718 break;
719 case VINF_PGM_SYNC_CR3:
720 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetSyncCR3);
721 break;
722 case VINF_PATM_PATCH_INT3:
723 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPatchInt3);
724 break;
725 case VINF_PATM_PATCH_TRAP_PF:
726 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPatchPF);
727 break;
728 case VINF_PATM_PATCH_TRAP_GP:
729 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPatchGP);
730 break;
731 case VINF_PATM_PENDING_IRQ_AFTER_IRET:
732 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPatchIretIRQ);
733 break;
734 case VINF_EM_RESCHEDULE_REM:
735 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetRescheduleREM);
736 break;
737 case VINF_EM_RAW_TO_R3:
738 if (VM_FF_IS_PENDING(pVM, VM_FF_TM_VIRTUAL_SYNC))
739 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3TMVirt);
740 else if (VM_FF_IS_PENDING(pVM, VM_FF_PGM_NEED_HANDY_PAGES))
741 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3HandyPages);
742 else if (VM_FF_IS_PENDING(pVM, VM_FF_PDM_QUEUES))
743 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3PDMQueues);
744 else if (VM_FF_IS_PENDING(pVM, VM_FF_EMT_RENDEZVOUS))
745 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3Rendezvous);
746 else if (VM_FF_IS_PENDING(pVM, VM_FF_PDM_DMA))
747 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3DMA);
748 else if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_TIMER))
749 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3Timer);
750 else if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
751 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3CritSect);
752 else if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_TO_R3))
753 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3);
754 else
755 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3Unknown);
756 break;
757
758 case VINF_EM_RAW_TIMER_PENDING:
759 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetTimerPending);
760 break;
761 case VINF_EM_RAW_INTERRUPT_PENDING:
762 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetInterruptPending);
763 break;
764 case VINF_VMM_CALL_HOST:
765 switch (pVCpu->vmm.s.enmCallRing3Operation)
766 {
767 case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
768 STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallPDMCritSectEnter);
769 break;
770 case VMMCALLRING3_PDM_LOCK:
771 STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallPDMLock);
772 break;
773 case VMMCALLRING3_PGM_POOL_GROW:
774 STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallPGMPoolGrow);
775 break;
776 case VMMCALLRING3_PGM_LOCK:
777 STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallPGMLock);
778 break;
779 case VMMCALLRING3_PGM_MAP_CHUNK:
780 STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallPGMMapChunk);
781 break;
782 case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
783 STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallPGMAllocHandy);
784 break;
785 case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
786 STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallRemReplay);
787 break;
788 case VMMCALLRING3_VMM_LOGGER_FLUSH:
789 STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallLogFlush);
790 break;
791 case VMMCALLRING3_VM_SET_ERROR:
792 STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallVMSetError);
793 break;
794 case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
795 STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallVMSetRuntimeError);
796 break;
797 case VMMCALLRING3_VM_R0_ASSERTION:
798 default:
799 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetCallRing3);
800 break;
801 }
802 break;
803 case VINF_PATM_DUPLICATE_FUNCTION:
804 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPATMDuplicateFn);
805 break;
806 case VINF_PGM_CHANGE_MODE:
807 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPGMChangeMode);
808 break;
809 case VINF_PGM_POOL_FLUSH_PENDING:
810 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPGMFlushPending);
811 break;
812 case VINF_EM_PENDING_REQUEST:
813 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPendingRequest);
814 break;
815 case VINF_EM_HM_PATCH_TPR_INSTR:
816 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPatchTPR);
817 break;
818 default:
819 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMisc);
820 break;
821 }
822}
823#endif /* VBOX_WITH_STATISTICS */
824
825
826/**
827 * Unused ring-0 entry point that used to be called from the interrupt gate.
828 *
829 * Will be removed one of the next times we do a major SUPDrv version bump.
830 *
831 * @returns VBox status code.
832 * @param pVM Pointer to the VM.
833 * @param enmOperation Which operation to execute.
834 * @param pvArg Argument to the operation.
835 * @remarks Assume called with interrupts disabled.
836 */
837VMMR0DECL(int) VMMR0EntryInt(PVM pVM, VMMR0OPERATION enmOperation, void *pvArg)
838{
839 /*
840 * We're returning VERR_NOT_SUPPORT here so we've got something else
841 * than -1 which the interrupt gate glue code might return.
842 */
843 Log(("operation %#x is not supported\n", enmOperation));
844 NOREF(enmOperation); NOREF(pvArg); NOREF(pVM);
845 return VERR_NOT_SUPPORTED;
846}
847
848
849/**
850 * The Ring 0 entry point, called by the fast-ioctl path.
851 *
852 * @param pVM Pointer to the VM.
853 * The return code is stored in pVM->vmm.s.iLastGZRc.
854 * @param idCpu The Virtual CPU ID of the calling EMT.
855 * @param enmOperation Which operation to execute.
856 * @remarks Assume called with interrupts _enabled_.
857 */
858VMMR0DECL(void) VMMR0EntryFast(PVM pVM, VMCPUID idCpu, VMMR0OPERATION enmOperation)
859{
860 /*
861 * Validation.
862 */
863 if (RT_UNLIKELY(idCpu >= pVM->cCpus))
864 return;
865 PVMCPU pVCpu = &pVM->aCpus[idCpu];
866 if (RT_UNLIKELY(pVCpu->hNativeThreadR0 != RTThreadNativeSelf()))
867 return;
868
869 /*
870 * Perform requested operation.
871 */
872 switch (enmOperation)
873 {
874 /*
875 * Switch to GC and run guest raw mode code.
876 * Disable interrupts before doing the world switch.
877 */
878 case VMMR0_DO_RAW_RUN:
879 {
880#ifndef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
881 /* Some safety precautions first. */
882 if (RT_UNLIKELY(!PGMGetHyperCR3(pVCpu)))
883 {
884 pVCpu->vmm.s.iLastGZRc = VERR_PGM_NO_CR3_SHADOW_ROOT;
885 break;
886 }
887#endif
888
889 /*
890 * Disable preemption.
891 */
892 RTTHREADPREEMPTSTATE PreemptState = RTTHREADPREEMPTSTATE_INITIALIZER;
893 RTThreadPreemptDisable(&PreemptState);
894
895 /*
896 * Get the host CPU identifiers, make sure they are valid and that
897 * we've got a TSC delta for the CPU.
898 */
899 RTCPUID idHostCpu;
900 uint32_t iHostCpuSet = RTMpCurSetIndexAndId(&idHostCpu);
901 if (RT_LIKELY( iHostCpuSet < RTCPUSET_MAX_CPUS
902 && SUPIsTscDeltaAvailableForCpuSetIndex(iHostCpuSet)))
903 {
904 /*
905 * Commit the CPU identifiers and update the periodict preemption timer if it's active.
906 */
907#ifdef VBOX_WITH_VMMR0_DISABLE_LAPIC_NMI
908 CPUMR0SetLApic(pVCpu, iHostCpuSet);
909#endif
910 pVCpu->iHostCpuSet = iHostCpuSet;
911 ASMAtomicWriteU32(&pVCpu->idHostCpu, idHostCpu);
912
913 if (pVM->vmm.s.fUsePeriodicPreemptionTimers)
914 GVMMR0SchedUpdatePeriodicPreemptionTimer(pVM, pVCpu->idHostCpu, TMCalcHostTimerFrequency(pVM, pVCpu));
915
916 /*
917 * We might need to disable VT-x if the active switcher turns off paging.
918 */
919 bool fVTxDisabled;
920 int rc = HMR0EnterSwitcher(pVM, pVM->vmm.s.enmSwitcher, &fVTxDisabled);
921 if (RT_SUCCESS(rc))
922 {
923 /*
924 * Disable interrupts and run raw-mode code. The loop is for efficiently
925 * dispatching tracepoints that fired in raw-mode context.
926 */
927 RTCCUINTREG uFlags = ASMIntDisableFlags();
928
929 for (;;)
930 {
931 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED_EXEC);
932 TMNotifyStartOfExecution(pVCpu);
933
934 rc = pVM->vmm.s.pfnR0ToRawMode(pVM);
935 pVCpu->vmm.s.iLastGZRc = rc;
936
937 TMNotifyEndOfExecution(pVCpu);
938 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
939
940 if (rc != VINF_VMM_CALL_TRACER)
941 break;
942 SUPR0TracerUmodProbeFire(pVM->pSession, &pVCpu->vmm.s.TracerCtx);
943 }
944
945 /*
946 * Re-enable VT-x before we dispatch any pending host interrupts and
947 * re-enables interrupts.
948 */
949 HMR0LeaveSwitcher(pVM, fVTxDisabled);
950
951 if ( rc == VINF_EM_RAW_INTERRUPT
952 || rc == VINF_EM_RAW_INTERRUPT_HYPER)
953 TRPMR0DispatchHostInterrupt(pVM);
954
955 ASMSetFlags(uFlags);
956
957 /* Fire dtrace probe and collect statistics. */
958 VBOXVMM_R0_VMM_RETURN_TO_RING3_RC(pVCpu, CPUMQueryGuestCtxPtr(pVCpu), rc);
959#ifdef VBOX_WITH_STATISTICS
960 STAM_COUNTER_INC(&pVM->vmm.s.StatRunRC);
961 vmmR0RecordRC(pVM, pVCpu, rc);
962#endif
963 }
964 else
965 pVCpu->vmm.s.iLastGZRc = rc;
966
967 /*
968 * Invalidate the host CPU identifiers as we restore preemption.
969 */
970 pVCpu->iHostCpuSet = UINT32_MAX;
971 ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID);
972
973 RTThreadPreemptRestore(&PreemptState);
974 }
975 /*
976 * Invalid CPU set index or TSC delta in need of measuring.
977 */
978 else
979 {
980 RTThreadPreemptRestore(&PreemptState);
981 if (iHostCpuSet < RTCPUSET_MAX_CPUS)
982 {
983 int rc = SUPR0TscDeltaMeasureBySetIndex(pVM->pSession, iHostCpuSet, 0 /*fFlags*/,
984 2 /*cMsWaitRetry*/, 5*RT_MS_1SEC /*cMsWaitThread*/,
985 0 /*default cTries*/);
986 if (RT_SUCCESS(rc) || rc == VERR_CPU_OFFLINE)
987 pVCpu->vmm.s.iLastGZRc = VINF_EM_RAW_TO_R3;
988 else
989 pVCpu->vmm.s.iLastGZRc = rc;
990 }
991 else
992 pVCpu->vmm.s.iLastGZRc = VERR_INVALID_CPU_INDEX;
993 }
994 break;
995 }
996
997 /*
998 * Run guest code using the available hardware acceleration technology.
999 */
1000 case VMMR0_DO_HM_RUN:
1001 {
1002 /*
1003 * Disable preemption.
1004 */
1005 Assert(!vmmR0ThreadCtxHookIsEnabled(pVCpu));
1006 RTTHREADPREEMPTSTATE PreemptState = RTTHREADPREEMPTSTATE_INITIALIZER;
1007 RTThreadPreemptDisable(&PreemptState);
1008
1009 /*
1010 * Get the host CPU identifiers, make sure they are valid and that
1011 * we've got a TSC delta for the CPU.
1012 */
1013 RTCPUID idHostCpu;
1014 uint32_t iHostCpuSet = RTMpCurSetIndexAndId(&idHostCpu);
1015 if (RT_LIKELY( iHostCpuSet < RTCPUSET_MAX_CPUS
1016 && SUPIsTscDeltaAvailableForCpuSetIndex(iHostCpuSet)))
1017 {
1018 pVCpu->iHostCpuSet = iHostCpuSet;
1019 ASMAtomicWriteU32(&pVCpu->idHostCpu, idHostCpu);
1020
1021 /*
1022 * Update the periodic preemption timer if it's active.
1023 */
1024 if (pVM->vmm.s.fUsePeriodicPreemptionTimers)
1025 GVMMR0SchedUpdatePeriodicPreemptionTimer(pVM, pVCpu->idHostCpu, TMCalcHostTimerFrequency(pVM, pVCpu));
1026
1027#ifdef LOG_ENABLED
1028 /*
1029 * Ugly: Lazy registration of ring 0 loggers.
1030 */
1031 if (pVCpu->idCpu > 0)
1032 {
1033 PVMMR0LOGGER pR0Logger = pVCpu->vmm.s.pR0LoggerR0;
1034 if ( pR0Logger
1035 && RT_UNLIKELY(!pR0Logger->fRegistered))
1036 {
1037 RTLogSetDefaultInstanceThread(&pR0Logger->Logger, (uintptr_t)pVM->pSession);
1038 pR0Logger->fRegistered = true;
1039 }
1040 }
1041#endif
1042
1043 int rc;
1044 bool fPreemptRestored = false;
1045 if (!HMR0SuspendPending())
1046 {
1047 /*
1048 * Enable the context switching hook.
1049 */
1050 if (pVCpu->vmm.s.hCtxHook != NIL_RTTHREADCTXHOOK)
1051 {
1052 Assert(!RTThreadCtxHookIsEnabled(pVCpu->vmm.s.hCtxHook));
1053 int rc2 = RTThreadCtxHookEnable(pVCpu->vmm.s.hCtxHook); AssertRC(rc2);
1054 }
1055
1056 /*
1057 * Enter HM context.
1058 */
1059 rc = HMR0Enter(pVM, pVCpu);
1060 if (RT_SUCCESS(rc))
1061 {
1062 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED_HM);
1063
1064 /*
1065 * When preemption hooks are in place, enable preemption now that
1066 * we're in HM context.
1067 */
1068 if (vmmR0ThreadCtxHookIsEnabled(pVCpu))
1069 {
1070 fPreemptRestored = true;
1071 RTThreadPreemptRestore(&PreemptState);
1072 }
1073
1074 /*
1075 * Setup the longjmp machinery and execute guest code (calls HMR0RunGuestCode).
1076 */
1077 rc = vmmR0CallRing3SetJmp(&pVCpu->vmm.s.CallRing3JmpBufR0, HMR0RunGuestCode, pVM, pVCpu);
1078
1079 /*
1080 * Assert sanity on the way out. Using manual assertions code here as normal
1081 * assertions are going to panic the host since we're outside the setjmp/longjmp zone.
1082 */
1083 if (RT_UNLIKELY( VMCPU_GET_STATE(pVCpu) != VMCPUSTATE_STARTED_HM
1084 && RT_SUCCESS_NP(rc) && rc != VINF_VMM_CALL_HOST ))
1085 {
1086 pVM->vmm.s.szRing0AssertMsg1[0] = '\0';
1087 RTStrPrintf(pVM->vmm.s.szRing0AssertMsg2, sizeof(pVM->vmm.s.szRing0AssertMsg2),
1088 "Got VMCPU state %d expected %d.\n", VMCPU_GET_STATE(pVCpu), VMCPUSTATE_STARTED_HM);
1089 rc = VERR_VMM_WRONG_HM_VMCPU_STATE;
1090 }
1091 /** @todo Get rid of this. HM shouldn't disable the context hook. */
1092 else if (RT_UNLIKELY(vmmR0ThreadCtxHookIsEnabled(pVCpu)))
1093 {
1094 pVM->vmm.s.szRing0AssertMsg1[0] = '\0';
1095 RTStrPrintf(pVM->vmm.s.szRing0AssertMsg2, sizeof(pVM->vmm.s.szRing0AssertMsg2),
1096 "Thread-context hooks still enabled! VCPU=%p Id=%u rc=%d.\n", pVCpu, pVCpu->idCpu, rc);
1097 rc = VERR_INVALID_STATE;
1098 }
1099
1100 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1101 }
1102 STAM_COUNTER_INC(&pVM->vmm.s.StatRunRC);
1103
1104 /*
1105 * Invalidate the host CPU identifiers before we disable the context
1106 * hook / restore preemption.
1107 */
1108 pVCpu->iHostCpuSet = UINT32_MAX;
1109 ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID);
1110
1111 /*
1112 * Disable context hooks. Due to unresolved cleanup issues, we
1113 * cannot leave the hooks enabled when we return to ring-3.
1114 *
1115 * Note! At the moment HM may also have disabled the hook
1116 * when we get here, but the IPRT API handles that.
1117 */
1118 if (pVCpu->vmm.s.hCtxHook != NIL_RTTHREADCTXHOOK)
1119 {
1120 ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID);
1121 RTThreadCtxHookDisable(pVCpu->vmm.s.hCtxHook);
1122 }
1123 }
1124 /*
1125 * The system is about to go into suspend mode; go back to ring 3.
1126 */
1127 else
1128 {
1129 rc = VINF_EM_RAW_INTERRUPT;
1130 pVCpu->iHostCpuSet = UINT32_MAX;
1131 ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID);
1132 }
1133
1134 /** @todo When HM stops messing with the context hook state, we'll disable
1135 * preemption again before the RTThreadCtxHookDisable call. */
1136 if (!fPreemptRestored)
1137 RTThreadPreemptRestore(&PreemptState);
1138
1139 pVCpu->vmm.s.iLastGZRc = rc;
1140
1141 /* Fire dtrace probe and collect statistics. */
1142 VBOXVMM_R0_VMM_RETURN_TO_RING3_HM(pVCpu, CPUMQueryGuestCtxPtr(pVCpu), rc);
1143#ifdef VBOX_WITH_STATISTICS
1144 vmmR0RecordRC(pVM, pVCpu, rc);
1145#endif
1146 }
1147 /*
1148 * Invalid CPU set index or TSC delta in need of measuring.
1149 */
1150 else
1151 {
1152 pVCpu->iHostCpuSet = UINT32_MAX;
1153 ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID);
1154 RTThreadPreemptRestore(&PreemptState);
1155 if (iHostCpuSet < RTCPUSET_MAX_CPUS)
1156 {
1157 int rc = SUPR0TscDeltaMeasureBySetIndex(pVM->pSession, iHostCpuSet, 0 /*fFlags*/,
1158 2 /*cMsWaitRetry*/, 5*RT_MS_1SEC /*cMsWaitThread*/,
1159 0 /*default cTries*/);
1160 if (RT_SUCCESS(rc) || rc == VERR_CPU_OFFLINE)
1161 pVCpu->vmm.s.iLastGZRc = VINF_EM_RAW_TO_R3;
1162 else
1163 pVCpu->vmm.s.iLastGZRc = rc;
1164 }
1165 else
1166 pVCpu->vmm.s.iLastGZRc = VERR_INVALID_CPU_INDEX;
1167 }
1168 break;
1169 }
1170
1171 /*
1172 * For profiling.
1173 */
1174 case VMMR0_DO_NOP:
1175 pVCpu->vmm.s.iLastGZRc = VINF_SUCCESS;
1176 break;
1177
1178 /*
1179 * Impossible.
1180 */
1181 default:
1182 AssertMsgFailed(("%#x\n", enmOperation));
1183 pVCpu->vmm.s.iLastGZRc = VERR_NOT_SUPPORTED;
1184 break;
1185 }
1186}
1187
1188
1189/**
1190 * Validates a session or VM session argument.
1191 *
1192 * @returns true / false accordingly.
1193 * @param pVM Pointer to the VM.
1194 * @param pSession The session argument.
1195 */
1196DECLINLINE(bool) vmmR0IsValidSession(PVM pVM, PSUPDRVSESSION pClaimedSession, PSUPDRVSESSION pSession)
1197{
1198 /* This must be set! */
1199 if (!pSession)
1200 return false;
1201
1202 /* Only one out of the two. */
1203 if (pVM && pClaimedSession)
1204 return false;
1205 if (pVM)
1206 pClaimedSession = pVM->pSession;
1207 return pClaimedSession == pSession;
1208}
1209
1210
1211/**
1212 * VMMR0EntryEx worker function, either called directly or when ever possible
1213 * called thru a longjmp so we can exit safely on failure.
1214 *
1215 * @returns VBox status code.
1216 * @param pVM Pointer to the VM.
1217 * @param idCpu Virtual CPU ID argument. Must be NIL_VMCPUID if pVM
1218 * is NIL_RTR0PTR, and may be NIL_VMCPUID if it isn't
1219 * @param enmOperation Which operation to execute.
1220 * @param pReqHdr This points to a SUPVMMR0REQHDR packet. Optional.
1221 * The support driver validates this if it's present.
1222 * @param u64Arg Some simple constant argument.
1223 * @param pSession The session of the caller.
1224 * @remarks Assume called with interrupts _enabled_.
1225 */
1226static int vmmR0EntryExWorker(PVM pVM, VMCPUID idCpu, VMMR0OPERATION enmOperation, PSUPVMMR0REQHDR pReqHdr, uint64_t u64Arg, PSUPDRVSESSION pSession)
1227{
1228 /*
1229 * Common VM pointer validation.
1230 */
1231 if (pVM)
1232 {
1233 if (RT_UNLIKELY( !VALID_PTR(pVM)
1234 || ((uintptr_t)pVM & PAGE_OFFSET_MASK)))
1235 {
1236 SUPR0Printf("vmmR0EntryExWorker: Invalid pVM=%p! (op=%d)\n", pVM, enmOperation);
1237 return VERR_INVALID_POINTER;
1238 }
1239 if (RT_UNLIKELY( pVM->enmVMState < VMSTATE_CREATING
1240 || pVM->enmVMState > VMSTATE_TERMINATED
1241 || pVM->pVMR0 != pVM))
1242 {
1243 SUPR0Printf("vmmR0EntryExWorker: Invalid pVM=%p:{enmVMState=%d, .pVMR0=%p}! (op=%d)\n",
1244 pVM, pVM->enmVMState, pVM->pVMR0, enmOperation);
1245 return VERR_INVALID_POINTER;
1246 }
1247
1248 if (RT_UNLIKELY(idCpu >= pVM->cCpus && idCpu != NIL_VMCPUID))
1249 {
1250 SUPR0Printf("vmmR0EntryExWorker: Invalid idCpu (%u vs cCpus=%u)\n", idCpu, pVM->cCpus);
1251 return VERR_INVALID_PARAMETER;
1252 }
1253 }
1254 else if (RT_UNLIKELY(idCpu != NIL_VMCPUID))
1255 {
1256 SUPR0Printf("vmmR0EntryExWorker: Invalid idCpu=%u\n", idCpu);
1257 return VERR_INVALID_PARAMETER;
1258 }
1259
1260
1261 switch (enmOperation)
1262 {
1263 /*
1264 * GVM requests
1265 */
1266 case VMMR0_DO_GVMM_CREATE_VM:
1267 if (pVM || u64Arg || idCpu != NIL_VMCPUID)
1268 return VERR_INVALID_PARAMETER;
1269 return GVMMR0CreateVMReq((PGVMMCREATEVMREQ)pReqHdr);
1270
1271 case VMMR0_DO_GVMM_DESTROY_VM:
1272 if (pReqHdr || u64Arg)
1273 return VERR_INVALID_PARAMETER;
1274 return GVMMR0DestroyVM(pVM);
1275
1276 case VMMR0_DO_GVMM_REGISTER_VMCPU:
1277 {
1278 if (!pVM)
1279 return VERR_INVALID_PARAMETER;
1280 return GVMMR0RegisterVCpu(pVM, idCpu);
1281 }
1282
1283 case VMMR0_DO_GVMM_SCHED_HALT:
1284 if (pReqHdr)
1285 return VERR_INVALID_PARAMETER;
1286 return GVMMR0SchedHalt(pVM, idCpu, u64Arg);
1287
1288 case VMMR0_DO_GVMM_SCHED_WAKE_UP:
1289 if (pReqHdr || u64Arg)
1290 return VERR_INVALID_PARAMETER;
1291 return GVMMR0SchedWakeUp(pVM, idCpu);
1292
1293 case VMMR0_DO_GVMM_SCHED_POKE:
1294 if (pReqHdr || u64Arg)
1295 return VERR_INVALID_PARAMETER;
1296 return GVMMR0SchedPoke(pVM, idCpu);
1297
1298 case VMMR0_DO_GVMM_SCHED_WAKE_UP_AND_POKE_CPUS:
1299 if (u64Arg)
1300 return VERR_INVALID_PARAMETER;
1301 return GVMMR0SchedWakeUpAndPokeCpusReq(pVM, (PGVMMSCHEDWAKEUPANDPOKECPUSREQ)pReqHdr);
1302
1303 case VMMR0_DO_GVMM_SCHED_POLL:
1304 if (pReqHdr || u64Arg > 1)
1305 return VERR_INVALID_PARAMETER;
1306 return GVMMR0SchedPoll(pVM, idCpu, !!u64Arg);
1307
1308 case VMMR0_DO_GVMM_QUERY_STATISTICS:
1309 if (u64Arg)
1310 return VERR_INVALID_PARAMETER;
1311 return GVMMR0QueryStatisticsReq(pVM, (PGVMMQUERYSTATISTICSSREQ)pReqHdr);
1312
1313 case VMMR0_DO_GVMM_RESET_STATISTICS:
1314 if (u64Arg)
1315 return VERR_INVALID_PARAMETER;
1316 return GVMMR0ResetStatisticsReq(pVM, (PGVMMRESETSTATISTICSSREQ)pReqHdr);
1317
1318 /*
1319 * Initialize the R0 part of a VM instance.
1320 */
1321 case VMMR0_DO_VMMR0_INIT:
1322 return vmmR0InitVM(pVM, RT_LODWORD(u64Arg), RT_HIDWORD(u64Arg));
1323
1324 /*
1325 * Terminate the R0 part of a VM instance.
1326 */
1327 case VMMR0_DO_VMMR0_TERM:
1328 return VMMR0TermVM(pVM, NULL);
1329
1330 /*
1331 * Attempt to enable hm mode and check the current setting.
1332 */
1333 case VMMR0_DO_HM_ENABLE:
1334 return HMR0EnableAllCpus(pVM);
1335
1336 /*
1337 * Setup the hardware accelerated session.
1338 */
1339 case VMMR0_DO_HM_SETUP_VM:
1340 return HMR0SetupVM(pVM);
1341
1342 /*
1343 * Switch to RC to execute Hypervisor function.
1344 */
1345 case VMMR0_DO_CALL_HYPERVISOR:
1346 {
1347 /*
1348 * Validate input / context.
1349 */
1350 if (RT_UNLIKELY(idCpu != 0))
1351 return VERR_INVALID_CPU_ID;
1352 if (RT_UNLIKELY(pVM->cCpus != 1))
1353 return VERR_INVALID_PARAMETER;
1354 PVMCPU pVCpu = &pVM->aCpus[idCpu];
1355#ifndef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
1356 if (RT_UNLIKELY(!PGMGetHyperCR3(pVCpu)))
1357 return VERR_PGM_NO_CR3_SHADOW_ROOT;
1358#endif
1359
1360 /*
1361 * Disable interrupts.
1362 */
1363 RTCCUINTREG fFlags = ASMIntDisableFlags();
1364
1365 /*
1366 * Get the host CPU identifiers, make sure they are valid and that
1367 * we've got a TSC delta for the CPU.
1368 */
1369 RTCPUID idHostCpu;
1370 uint32_t iHostCpuSet = RTMpCurSetIndexAndId(&idHostCpu);
1371 if (RT_UNLIKELY(iHostCpuSet >= RTCPUSET_MAX_CPUS))
1372 {
1373 ASMSetFlags(fFlags);
1374 return VERR_INVALID_CPU_INDEX;
1375 }
1376 if (RT_UNLIKELY(!SUPIsTscDeltaAvailableForCpuSetIndex(iHostCpuSet)))
1377 {
1378 ASMSetFlags(fFlags);
1379 int rc = SUPR0TscDeltaMeasureBySetIndex(pVM->pSession, iHostCpuSet, 0 /*fFlags*/,
1380 2 /*cMsWaitRetry*/, 5*RT_MS_1SEC /*cMsWaitThread*/,
1381 0 /*default cTries*/);
1382 if (RT_FAILURE(rc) && rc != VERR_CPU_OFFLINE)
1383 return rc;
1384 }
1385
1386 /*
1387 * Commit the CPU identifiers.
1388 */
1389#ifdef VBOX_WITH_VMMR0_DISABLE_LAPIC_NMI
1390 CPUMR0SetLApic(pVCpu, iHostCpuSet);
1391#endif
1392 pVCpu->iHostCpuSet = iHostCpuSet;
1393 ASMAtomicWriteU32(&pVCpu->idHostCpu, idHostCpu);
1394
1395 /*
1396 * We might need to disable VT-x if the active switcher turns off paging.
1397 */
1398 bool fVTxDisabled;
1399 int rc = HMR0EnterSwitcher(pVM, pVM->vmm.s.enmSwitcher, &fVTxDisabled);
1400 if (RT_SUCCESS(rc))
1401 {
1402 /*
1403 * Go through the wormhole...
1404 */
1405 rc = pVM->vmm.s.pfnR0ToRawMode(pVM);
1406
1407 /*
1408 * Re-enable VT-x before we dispatch any pending host interrupts.
1409 */
1410 HMR0LeaveSwitcher(pVM, fVTxDisabled);
1411
1412 if ( rc == VINF_EM_RAW_INTERRUPT
1413 || rc == VINF_EM_RAW_INTERRUPT_HYPER)
1414 TRPMR0DispatchHostInterrupt(pVM);
1415 }
1416
1417 /*
1418 * Invalidate the host CPU identifiers as we restore interrupts.
1419 */
1420 pVCpu->iHostCpuSet = UINT32_MAX;
1421 ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID);
1422 ASMSetFlags(fFlags);
1423 return rc;
1424 }
1425
1426 /*
1427 * PGM wrappers.
1428 */
1429 case VMMR0_DO_PGM_ALLOCATE_HANDY_PAGES:
1430 if (idCpu == NIL_VMCPUID)
1431 return VERR_INVALID_CPU_ID;
1432 return PGMR0PhysAllocateHandyPages(pVM, &pVM->aCpus[idCpu]);
1433
1434 case VMMR0_DO_PGM_FLUSH_HANDY_PAGES:
1435 if (idCpu == NIL_VMCPUID)
1436 return VERR_INVALID_CPU_ID;
1437 return PGMR0PhysFlushHandyPages(pVM, &pVM->aCpus[idCpu]);
1438
1439 case VMMR0_DO_PGM_ALLOCATE_LARGE_HANDY_PAGE:
1440 if (idCpu == NIL_VMCPUID)
1441 return VERR_INVALID_CPU_ID;
1442 return PGMR0PhysAllocateLargeHandyPage(pVM, &pVM->aCpus[idCpu]);
1443
1444 case VMMR0_DO_PGM_PHYS_SETUP_IOMMU:
1445 if (idCpu != 0)
1446 return VERR_INVALID_CPU_ID;
1447 return PGMR0PhysSetupIommu(pVM);
1448
1449 /*
1450 * GMM wrappers.
1451 */
1452 case VMMR0_DO_GMM_INITIAL_RESERVATION:
1453 if (u64Arg)
1454 return VERR_INVALID_PARAMETER;
1455 return GMMR0InitialReservationReq(pVM, idCpu, (PGMMINITIALRESERVATIONREQ)pReqHdr);
1456
1457 case VMMR0_DO_GMM_UPDATE_RESERVATION:
1458 if (u64Arg)
1459 return VERR_INVALID_PARAMETER;
1460 return GMMR0UpdateReservationReq(pVM, idCpu, (PGMMUPDATERESERVATIONREQ)pReqHdr);
1461
1462 case VMMR0_DO_GMM_ALLOCATE_PAGES:
1463 if (u64Arg)
1464 return VERR_INVALID_PARAMETER;
1465 return GMMR0AllocatePagesReq(pVM, idCpu, (PGMMALLOCATEPAGESREQ)pReqHdr);
1466
1467 case VMMR0_DO_GMM_FREE_PAGES:
1468 if (u64Arg)
1469 return VERR_INVALID_PARAMETER;
1470 return GMMR0FreePagesReq(pVM, idCpu, (PGMMFREEPAGESREQ)pReqHdr);
1471
1472 case VMMR0_DO_GMM_FREE_LARGE_PAGE:
1473 if (u64Arg)
1474 return VERR_INVALID_PARAMETER;
1475 return GMMR0FreeLargePageReq(pVM, idCpu, (PGMMFREELARGEPAGEREQ)pReqHdr);
1476
1477 case VMMR0_DO_GMM_QUERY_HYPERVISOR_MEM_STATS:
1478 if (u64Arg)
1479 return VERR_INVALID_PARAMETER;
1480 return GMMR0QueryHypervisorMemoryStatsReq(pVM, (PGMMMEMSTATSREQ)pReqHdr);
1481
1482 case VMMR0_DO_GMM_QUERY_MEM_STATS:
1483 if (idCpu == NIL_VMCPUID)
1484 return VERR_INVALID_CPU_ID;
1485 if (u64Arg)
1486 return VERR_INVALID_PARAMETER;
1487 return GMMR0QueryMemoryStatsReq(pVM, idCpu, (PGMMMEMSTATSREQ)pReqHdr);
1488
1489 case VMMR0_DO_GMM_BALLOONED_PAGES:
1490 if (u64Arg)
1491 return VERR_INVALID_PARAMETER;
1492 return GMMR0BalloonedPagesReq(pVM, idCpu, (PGMMBALLOONEDPAGESREQ)pReqHdr);
1493
1494 case VMMR0_DO_GMM_MAP_UNMAP_CHUNK:
1495 if (u64Arg)
1496 return VERR_INVALID_PARAMETER;
1497 return GMMR0MapUnmapChunkReq(pVM, (PGMMMAPUNMAPCHUNKREQ)pReqHdr);
1498
1499 case VMMR0_DO_GMM_SEED_CHUNK:
1500 if (pReqHdr)
1501 return VERR_INVALID_PARAMETER;
1502 return GMMR0SeedChunk(pVM, idCpu, (RTR3PTR)u64Arg);
1503
1504 case VMMR0_DO_GMM_REGISTER_SHARED_MODULE:
1505 if (idCpu == NIL_VMCPUID)
1506 return VERR_INVALID_CPU_ID;
1507 if (u64Arg)
1508 return VERR_INVALID_PARAMETER;
1509 return GMMR0RegisterSharedModuleReq(pVM, idCpu, (PGMMREGISTERSHAREDMODULEREQ)pReqHdr);
1510
1511 case VMMR0_DO_GMM_UNREGISTER_SHARED_MODULE:
1512 if (idCpu == NIL_VMCPUID)
1513 return VERR_INVALID_CPU_ID;
1514 if (u64Arg)
1515 return VERR_INVALID_PARAMETER;
1516 return GMMR0UnregisterSharedModuleReq(pVM, idCpu, (PGMMUNREGISTERSHAREDMODULEREQ)pReqHdr);
1517
1518 case VMMR0_DO_GMM_RESET_SHARED_MODULES:
1519 if (idCpu == NIL_VMCPUID)
1520 return VERR_INVALID_CPU_ID;
1521 if ( u64Arg
1522 || pReqHdr)
1523 return VERR_INVALID_PARAMETER;
1524 return GMMR0ResetSharedModules(pVM, idCpu);
1525
1526#ifdef VBOX_WITH_PAGE_SHARING
1527 case VMMR0_DO_GMM_CHECK_SHARED_MODULES:
1528 {
1529 if (idCpu == NIL_VMCPUID)
1530 return VERR_INVALID_CPU_ID;
1531 if ( u64Arg
1532 || pReqHdr)
1533 return VERR_INVALID_PARAMETER;
1534
1535 PVMCPU pVCpu = &pVM->aCpus[idCpu];
1536 Assert(pVCpu->hNativeThreadR0 == RTThreadNativeSelf());
1537
1538# ifdef DEBUG_sandervl
1539 /* Make sure that log flushes can jump back to ring-3; annoying to get an incomplete log (this is risky though as the code doesn't take this into account). */
1540 /* Todo: this can have bad side effects for unexpected jumps back to r3. */
1541 int rc = GMMR0CheckSharedModulesStart(pVM);
1542 if (rc == VINF_SUCCESS)
1543 {
1544 rc = vmmR0CallRing3SetJmp(&pVCpu->vmm.s.CallRing3JmpBufR0, GMMR0CheckSharedModules, pVM, pVCpu); /* this may resume code. */
1545 Assert( rc == VINF_SUCCESS
1546 || (rc == VINF_VMM_CALL_HOST && pVCpu->vmm.s.enmCallRing3Operation == VMMCALLRING3_VMM_LOGGER_FLUSH));
1547 GMMR0CheckSharedModulesEnd(pVM);
1548 }
1549# else
1550 int rc = GMMR0CheckSharedModules(pVM, pVCpu);
1551# endif
1552 return rc;
1553 }
1554#endif
1555
1556#if defined(VBOX_STRICT) && HC_ARCH_BITS == 64
1557 case VMMR0_DO_GMM_FIND_DUPLICATE_PAGE:
1558 if (u64Arg)
1559 return VERR_INVALID_PARAMETER;
1560 return GMMR0FindDuplicatePageReq(pVM, (PGMMFINDDUPLICATEPAGEREQ)pReqHdr);
1561#endif
1562
1563 case VMMR0_DO_GMM_QUERY_STATISTICS:
1564 if (u64Arg)
1565 return VERR_INVALID_PARAMETER;
1566 return GMMR0QueryStatisticsReq(pVM, (PGMMQUERYSTATISTICSSREQ)pReqHdr);
1567
1568 case VMMR0_DO_GMM_RESET_STATISTICS:
1569 if (u64Arg)
1570 return VERR_INVALID_PARAMETER;
1571 return GMMR0ResetStatisticsReq(pVM, (PGMMRESETSTATISTICSSREQ)pReqHdr);
1572
1573 /*
1574 * A quick GCFGM mock-up.
1575 */
1576 /** @todo GCFGM with proper access control, ring-3 management interface and all that. */
1577 case VMMR0_DO_GCFGM_SET_VALUE:
1578 case VMMR0_DO_GCFGM_QUERY_VALUE:
1579 {
1580 if (pVM || !pReqHdr || u64Arg || idCpu != NIL_VMCPUID)
1581 return VERR_INVALID_PARAMETER;
1582 PGCFGMVALUEREQ pReq = (PGCFGMVALUEREQ)pReqHdr;
1583 if (pReq->Hdr.cbReq != sizeof(*pReq))
1584 return VERR_INVALID_PARAMETER;
1585 int rc;
1586 if (enmOperation == VMMR0_DO_GCFGM_SET_VALUE)
1587 {
1588 rc = GVMMR0SetConfig(pReq->pSession, &pReq->szName[0], pReq->u64Value);
1589 //if (rc == VERR_CFGM_VALUE_NOT_FOUND)
1590 // rc = GMMR0SetConfig(pReq->pSession, &pReq->szName[0], pReq->u64Value);
1591 }
1592 else
1593 {
1594 rc = GVMMR0QueryConfig(pReq->pSession, &pReq->szName[0], &pReq->u64Value);
1595 //if (rc == VERR_CFGM_VALUE_NOT_FOUND)
1596 // rc = GMMR0QueryConfig(pReq->pSession, &pReq->szName[0], &pReq->u64Value);
1597 }
1598 return rc;
1599 }
1600
1601 /*
1602 * PDM Wrappers.
1603 */
1604 case VMMR0_DO_PDM_DRIVER_CALL_REQ_HANDLER:
1605 {
1606 if (!pVM || !pReqHdr || u64Arg || idCpu != NIL_VMCPUID)
1607 return VERR_INVALID_PARAMETER;
1608 return PDMR0DriverCallReqHandler(pVM, (PPDMDRIVERCALLREQHANDLERREQ)pReqHdr);
1609 }
1610
1611 case VMMR0_DO_PDM_DEVICE_CALL_REQ_HANDLER:
1612 {
1613 if (!pVM || !pReqHdr || u64Arg || idCpu != NIL_VMCPUID)
1614 return VERR_INVALID_PARAMETER;
1615 return PDMR0DeviceCallReqHandler(pVM, (PPDMDEVICECALLREQHANDLERREQ)pReqHdr);
1616 }
1617
1618 /*
1619 * Requests to the internal networking service.
1620 */
1621 case VMMR0_DO_INTNET_OPEN:
1622 {
1623 PINTNETOPENREQ pReq = (PINTNETOPENREQ)pReqHdr;
1624 if (u64Arg || !pReq || !vmmR0IsValidSession(pVM, pReq->pSession, pSession) || idCpu != NIL_VMCPUID)
1625 return VERR_INVALID_PARAMETER;
1626 return IntNetR0OpenReq(pSession, pReq);
1627 }
1628
1629 case VMMR0_DO_INTNET_IF_CLOSE:
1630 if (u64Arg || !pReqHdr || !vmmR0IsValidSession(pVM, ((PINTNETIFCLOSEREQ)pReqHdr)->pSession, pSession) || idCpu != NIL_VMCPUID)
1631 return VERR_INVALID_PARAMETER;
1632 return IntNetR0IfCloseReq(pSession, (PINTNETIFCLOSEREQ)pReqHdr);
1633
1634 case VMMR0_DO_INTNET_IF_GET_BUFFER_PTRS:
1635 if (u64Arg || !pReqHdr || !vmmR0IsValidSession(pVM, ((PINTNETIFGETBUFFERPTRSREQ)pReqHdr)->pSession, pSession) || idCpu != NIL_VMCPUID)
1636 return VERR_INVALID_PARAMETER;
1637 return IntNetR0IfGetBufferPtrsReq(pSession, (PINTNETIFGETBUFFERPTRSREQ)pReqHdr);
1638
1639 case VMMR0_DO_INTNET_IF_SET_PROMISCUOUS_MODE:
1640 if (u64Arg || !pReqHdr || !vmmR0IsValidSession(pVM, ((PINTNETIFSETPROMISCUOUSMODEREQ)pReqHdr)->pSession, pSession) || idCpu != NIL_VMCPUID)
1641 return VERR_INVALID_PARAMETER;
1642 return IntNetR0IfSetPromiscuousModeReq(pSession, (PINTNETIFSETPROMISCUOUSMODEREQ)pReqHdr);
1643
1644 case VMMR0_DO_INTNET_IF_SET_MAC_ADDRESS:
1645 if (u64Arg || !pReqHdr || !vmmR0IsValidSession(pVM, ((PINTNETIFSETMACADDRESSREQ)pReqHdr)->pSession, pSession) || idCpu != NIL_VMCPUID)
1646 return VERR_INVALID_PARAMETER;
1647 return IntNetR0IfSetMacAddressReq(pSession, (PINTNETIFSETMACADDRESSREQ)pReqHdr);
1648
1649 case VMMR0_DO_INTNET_IF_SET_ACTIVE:
1650 if (u64Arg || !pReqHdr || !vmmR0IsValidSession(pVM, ((PINTNETIFSETACTIVEREQ)pReqHdr)->pSession, pSession) || idCpu != NIL_VMCPUID)
1651 return VERR_INVALID_PARAMETER;
1652 return IntNetR0IfSetActiveReq(pSession, (PINTNETIFSETACTIVEREQ)pReqHdr);
1653
1654 case VMMR0_DO_INTNET_IF_SEND:
1655 if (u64Arg || !pReqHdr || !vmmR0IsValidSession(pVM, ((PINTNETIFSENDREQ)pReqHdr)->pSession, pSession) || idCpu != NIL_VMCPUID)
1656 return VERR_INVALID_PARAMETER;
1657 return IntNetR0IfSendReq(pSession, (PINTNETIFSENDREQ)pReqHdr);
1658
1659 case VMMR0_DO_INTNET_IF_WAIT:
1660 if (u64Arg || !pReqHdr || !vmmR0IsValidSession(pVM, ((PINTNETIFWAITREQ)pReqHdr)->pSession, pSession) || idCpu != NIL_VMCPUID)
1661 return VERR_INVALID_PARAMETER;
1662 return IntNetR0IfWaitReq(pSession, (PINTNETIFWAITREQ)pReqHdr);
1663
1664 case VMMR0_DO_INTNET_IF_ABORT_WAIT:
1665 if (u64Arg || !pReqHdr || !vmmR0IsValidSession(pVM, ((PINTNETIFWAITREQ)pReqHdr)->pSession, pSession) || idCpu != NIL_VMCPUID)
1666 return VERR_INVALID_PARAMETER;
1667 return IntNetR0IfAbortWaitReq(pSession, (PINTNETIFABORTWAITREQ)pReqHdr);
1668
1669#ifdef VBOX_WITH_PCI_PASSTHROUGH
1670 /*
1671 * Requests to host PCI driver service.
1672 */
1673 case VMMR0_DO_PCIRAW_REQ:
1674 if (u64Arg || !pReqHdr || !vmmR0IsValidSession(pVM, ((PPCIRAWSENDREQ)pReqHdr)->pSession, pSession) || idCpu != NIL_VMCPUID)
1675 return VERR_INVALID_PARAMETER;
1676 return PciRawR0ProcessReq(pSession, pVM, (PPCIRAWSENDREQ)pReqHdr);
1677#endif
1678 /*
1679 * For profiling.
1680 */
1681 case VMMR0_DO_NOP:
1682 case VMMR0_DO_SLOW_NOP:
1683 return VINF_SUCCESS;
1684
1685 /*
1686 * For testing Ring-0 APIs invoked in this environment.
1687 */
1688 case VMMR0_DO_TESTS:
1689 /** @todo make new test */
1690 return VINF_SUCCESS;
1691
1692
1693#if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL)
1694 case VMMR0_DO_TEST_SWITCHER3264:
1695 if (idCpu == NIL_VMCPUID)
1696 return VERR_INVALID_CPU_ID;
1697 return HMR0TestSwitcher3264(pVM);
1698#endif
1699 default:
1700 /*
1701 * We're returning VERR_NOT_SUPPORT here so we've got something else
1702 * than -1 which the interrupt gate glue code might return.
1703 */
1704 Log(("operation %#x is not supported\n", enmOperation));
1705 return VERR_NOT_SUPPORTED;
1706 }
1707}
1708
1709
1710/**
1711 * Argument for vmmR0EntryExWrapper containing the arguments for VMMR0EntryEx.
1712 */
1713typedef struct VMMR0ENTRYEXARGS
1714{
1715 PVM pVM;
1716 VMCPUID idCpu;
1717 VMMR0OPERATION enmOperation;
1718 PSUPVMMR0REQHDR pReq;
1719 uint64_t u64Arg;
1720 PSUPDRVSESSION pSession;
1721} VMMR0ENTRYEXARGS;
1722/** Pointer to a vmmR0EntryExWrapper argument package. */
1723typedef VMMR0ENTRYEXARGS *PVMMR0ENTRYEXARGS;
1724
1725/**
1726 * This is just a longjmp wrapper function for VMMR0EntryEx calls.
1727 *
1728 * @returns VBox status code.
1729 * @param pvArgs The argument package
1730 */
1731static DECLCALLBACK(int) vmmR0EntryExWrapper(void *pvArgs)
1732{
1733 return vmmR0EntryExWorker(((PVMMR0ENTRYEXARGS)pvArgs)->pVM,
1734 ((PVMMR0ENTRYEXARGS)pvArgs)->idCpu,
1735 ((PVMMR0ENTRYEXARGS)pvArgs)->enmOperation,
1736 ((PVMMR0ENTRYEXARGS)pvArgs)->pReq,
1737 ((PVMMR0ENTRYEXARGS)pvArgs)->u64Arg,
1738 ((PVMMR0ENTRYEXARGS)pvArgs)->pSession);
1739}
1740
1741
1742/**
1743 * The Ring 0 entry point, called by the support library (SUP).
1744 *
1745 * @returns VBox status code.
1746 * @param pVM Pointer to the VM.
1747 * @param idCpu Virtual CPU ID argument. Must be NIL_VMCPUID if pVM
1748 * is NIL_RTR0PTR, and may be NIL_VMCPUID if it isn't
1749 * @param enmOperation Which operation to execute.
1750 * @param pReq Pointer to the SUPVMMR0REQHDR packet. Optional.
1751 * @param u64Arg Some simple constant argument.
1752 * @param pSession The session of the caller.
1753 * @remarks Assume called with interrupts _enabled_.
1754 */
1755VMMR0DECL(int) VMMR0EntryEx(PVM pVM, VMCPUID idCpu, VMMR0OPERATION enmOperation, PSUPVMMR0REQHDR pReq, uint64_t u64Arg, PSUPDRVSESSION pSession)
1756{
1757 /*
1758 * Requests that should only happen on the EMT thread will be
1759 * wrapped in a setjmp so we can assert without causing trouble.
1760 */
1761 if ( VALID_PTR(pVM)
1762 && pVM->pVMR0
1763 && idCpu < pVM->cCpus)
1764 {
1765 switch (enmOperation)
1766 {
1767 /* These might/will be called before VMMR3Init. */
1768 case VMMR0_DO_GMM_INITIAL_RESERVATION:
1769 case VMMR0_DO_GMM_UPDATE_RESERVATION:
1770 case VMMR0_DO_GMM_ALLOCATE_PAGES:
1771 case VMMR0_DO_GMM_FREE_PAGES:
1772 case VMMR0_DO_GMM_BALLOONED_PAGES:
1773 /* On the mac we might not have a valid jmp buf, so check these as well. */
1774 case VMMR0_DO_VMMR0_INIT:
1775 case VMMR0_DO_VMMR0_TERM:
1776 {
1777 PVMCPU pVCpu = &pVM->aCpus[idCpu];
1778
1779 if (!pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack)
1780 break;
1781
1782 /** @todo validate this EMT claim... GVM knows. */
1783 VMMR0ENTRYEXARGS Args;
1784 Args.pVM = pVM;
1785 Args.idCpu = idCpu;
1786 Args.enmOperation = enmOperation;
1787 Args.pReq = pReq;
1788 Args.u64Arg = u64Arg;
1789 Args.pSession = pSession;
1790 return vmmR0CallRing3SetJmpEx(&pVCpu->vmm.s.CallRing3JmpBufR0, vmmR0EntryExWrapper, &Args);
1791 }
1792
1793 default:
1794 break;
1795 }
1796 }
1797 return vmmR0EntryExWorker(pVM, idCpu, enmOperation, pReq, u64Arg, pSession);
1798}
1799
1800
1801/**
1802 * Checks whether we've armed the ring-0 long jump machinery.
1803 *
1804 * @returns @c true / @c false
1805 * @param pVCpu Pointer to the VMCPU.
1806 * @thread EMT
1807 * @sa VMMIsLongJumpArmed
1808 */
1809VMMR0_INT_DECL(bool) VMMR0IsLongJumpArmed(PVMCPU pVCpu)
1810{
1811#ifdef RT_ARCH_X86
1812 return pVCpu->vmm.s.CallRing3JmpBufR0.eip
1813 && !pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call;
1814#else
1815 return pVCpu->vmm.s.CallRing3JmpBufR0.rip
1816 && !pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call;
1817#endif
1818}
1819
1820
1821/**
1822 * Checks whether we've done a ring-3 long jump.
1823 *
1824 * @returns @c true / @c false
1825 * @param pVCpu Pointer to the VMCPU.
1826 * @thread EMT
1827 */
1828VMMR0_INT_DECL(bool) VMMR0IsInRing3LongJump(PVMCPU pVCpu)
1829{
1830 return pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call;
1831}
1832
1833
1834/**
1835 * Internal R0 logger worker: Flush logger.
1836 *
1837 * @param pLogger The logger instance to flush.
1838 * @remark This function must be exported!
1839 */
1840VMMR0DECL(void) vmmR0LoggerFlush(PRTLOGGER pLogger)
1841{
1842#ifdef LOG_ENABLED
1843 /*
1844 * Convert the pLogger into a VM handle and 'call' back to Ring-3.
1845 * (This is a bit paranoid code.)
1846 */
1847 PVMMR0LOGGER pR0Logger = (PVMMR0LOGGER)((uintptr_t)pLogger - RT_OFFSETOF(VMMR0LOGGER, Logger));
1848 if ( !VALID_PTR(pR0Logger)
1849 || !VALID_PTR(pR0Logger + 1)
1850 || pLogger->u32Magic != RTLOGGER_MAGIC)
1851 {
1852# ifdef DEBUG
1853 SUPR0Printf("vmmR0LoggerFlush: pLogger=%p!\n", pLogger);
1854# endif
1855 return;
1856 }
1857 if (pR0Logger->fFlushingDisabled)
1858 return; /* quietly */
1859
1860 PVM pVM = pR0Logger->pVM;
1861 if ( !VALID_PTR(pVM)
1862 || pVM->pVMR0 != pVM)
1863 {
1864# ifdef DEBUG
1865 SUPR0Printf("vmmR0LoggerFlush: pVM=%p! pVMR0=%p! pLogger=%p\n", pVM, pVM->pVMR0, pLogger);
1866# endif
1867 return;
1868 }
1869
1870 PVMCPU pVCpu = VMMGetCpu(pVM);
1871 if (pVCpu)
1872 {
1873 /*
1874 * Check that the jump buffer is armed.
1875 */
1876# ifdef RT_ARCH_X86
1877 if ( !pVCpu->vmm.s.CallRing3JmpBufR0.eip
1878 || pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call)
1879# else
1880 if ( !pVCpu->vmm.s.CallRing3JmpBufR0.rip
1881 || pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call)
1882# endif
1883 {
1884# ifdef DEBUG
1885 SUPR0Printf("vmmR0LoggerFlush: Jump buffer isn't armed!\n");
1886# endif
1887 return;
1888 }
1889 VMMRZCallRing3(pVM, pVCpu, VMMCALLRING3_VMM_LOGGER_FLUSH, 0);
1890 }
1891# ifdef DEBUG
1892 else
1893 SUPR0Printf("vmmR0LoggerFlush: invalid VCPU context!\n");
1894# endif
1895#endif
1896}
1897
1898/**
1899 * Internal R0 logger worker: Custom prefix.
1900 *
1901 * @returns Number of chars written.
1902 *
1903 * @param pLogger The logger instance.
1904 * @param pchBuf The output buffer.
1905 * @param cchBuf The size of the buffer.
1906 * @param pvUser User argument (ignored).
1907 */
1908VMMR0DECL(size_t) vmmR0LoggerPrefix(PRTLOGGER pLogger, char *pchBuf, size_t cchBuf, void *pvUser)
1909{
1910 NOREF(pvUser);
1911#ifdef LOG_ENABLED
1912 PVMMR0LOGGER pR0Logger = (PVMMR0LOGGER)((uintptr_t)pLogger - RT_OFFSETOF(VMMR0LOGGER, Logger));
1913 if ( !VALID_PTR(pR0Logger)
1914 || !VALID_PTR(pR0Logger + 1)
1915 || pLogger->u32Magic != RTLOGGER_MAGIC
1916 || cchBuf < 2)
1917 return 0;
1918
1919 static const char s_szHex[17] = "0123456789abcdef";
1920 VMCPUID const idCpu = pR0Logger->idCpu;
1921 pchBuf[1] = s_szHex[ idCpu & 15];
1922 pchBuf[0] = s_szHex[(idCpu >> 4) & 15];
1923
1924 return 2;
1925#else
1926 return 0;
1927#endif
1928}
1929
1930#ifdef LOG_ENABLED
1931
1932/**
1933 * Disables flushing of the ring-0 debug log.
1934 *
1935 * @param pVCpu Pointer to the VMCPU.
1936 */
1937VMMR0_INT_DECL(void) VMMR0LogFlushDisable(PVMCPU pVCpu)
1938{
1939 if (pVCpu->vmm.s.pR0LoggerR0)
1940 pVCpu->vmm.s.pR0LoggerR0->fFlushingDisabled = true;
1941}
1942
1943
1944/**
1945 * Enables flushing of the ring-0 debug log.
1946 *
1947 * @param pVCpu Pointer to the VMCPU.
1948 */
1949VMMR0_INT_DECL(void) VMMR0LogFlushEnable(PVMCPU pVCpu)
1950{
1951 if (pVCpu->vmm.s.pR0LoggerR0)
1952 pVCpu->vmm.s.pR0LoggerR0->fFlushingDisabled = false;
1953}
1954
1955
1956/**
1957 * Checks if log flushing is disabled or not.
1958 *
1959 * @param pVCpu Pointer to the VMCPU.
1960 */
1961VMMR0_INT_DECL(bool) VMMR0IsLogFlushDisabled(PVMCPU pVCpu)
1962{
1963 if (pVCpu->vmm.s.pR0LoggerR0)
1964 return pVCpu->vmm.s.pR0LoggerR0->fFlushingDisabled;
1965 return true;
1966}
1967#endif /* LOG_ENABLED */
1968
1969/**
1970 * Jump back to ring-3 if we're the EMT and the longjmp is armed.
1971 *
1972 * @returns true if the breakpoint should be hit, false if it should be ignored.
1973 */
1974DECLEXPORT(bool) RTCALL RTAssertShouldPanic(void)
1975{
1976#if 0
1977 return true;
1978#else
1979 PVM pVM = GVMMR0GetVMByEMT(NIL_RTNATIVETHREAD);
1980 if (pVM)
1981 {
1982 PVMCPU pVCpu = VMMGetCpu(pVM);
1983
1984 if (pVCpu)
1985 {
1986#ifdef RT_ARCH_X86
1987 if ( pVCpu->vmm.s.CallRing3JmpBufR0.eip
1988 && !pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call)
1989#else
1990 if ( pVCpu->vmm.s.CallRing3JmpBufR0.rip
1991 && !pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call)
1992#endif
1993 {
1994 int rc = VMMRZCallRing3(pVM, pVCpu, VMMCALLRING3_VM_R0_ASSERTION, 0);
1995 return RT_FAILURE_NP(rc);
1996 }
1997 }
1998 }
1999#ifdef RT_OS_LINUX
2000 return true;
2001#else
2002 return false;
2003#endif
2004#endif
2005}
2006
2007
2008/**
2009 * Override this so we can push it up to ring-3.
2010 *
2011 * @param pszExpr Expression. Can be NULL.
2012 * @param uLine Location line number.
2013 * @param pszFile Location file name.
2014 * @param pszFunction Location function name.
2015 */
2016DECLEXPORT(void) RTCALL RTAssertMsg1Weak(const char *pszExpr, unsigned uLine, const char *pszFile, const char *pszFunction)
2017{
2018 /*
2019 * To the log.
2020 */
2021 LogAlways(("\n!!R0-Assertion Failed!!\n"
2022 "Expression: %s\n"
2023 "Location : %s(%d) %s\n",
2024 pszExpr, pszFile, uLine, pszFunction));
2025
2026 /*
2027 * To the global VMM buffer.
2028 */
2029 PVM pVM = GVMMR0GetVMByEMT(NIL_RTNATIVETHREAD);
2030 if (pVM)
2031 RTStrPrintf(pVM->vmm.s.szRing0AssertMsg1, sizeof(pVM->vmm.s.szRing0AssertMsg1),
2032 "\n!!R0-Assertion Failed!!\n"
2033 "Expression: %s\n"
2034 "Location : %s(%d) %s\n",
2035 pszExpr, pszFile, uLine, pszFunction);
2036
2037 /*
2038 * Continue the normal way.
2039 */
2040 RTAssertMsg1(pszExpr, uLine, pszFile, pszFunction);
2041}
2042
2043
2044/**
2045 * Callback for RTLogFormatV which writes to the ring-3 log port.
2046 * See PFNLOGOUTPUT() for details.
2047 */
2048static DECLCALLBACK(size_t) rtLogOutput(void *pv, const char *pachChars, size_t cbChars)
2049{
2050 for (size_t i = 0; i < cbChars; i++)
2051 LogAlways(("%c", pachChars[i]));
2052
2053 NOREF(pv);
2054 return cbChars;
2055}
2056
2057
2058/**
2059 * Override this so we can push it up to ring-3.
2060 *
2061 * @param pszFormat The format string.
2062 * @param va Arguments.
2063 */
2064DECLEXPORT(void) RTCALL RTAssertMsg2WeakV(const char *pszFormat, va_list va)
2065{
2066 va_list vaCopy;
2067
2068 /*
2069 * Push the message to the loggers.
2070 */
2071 PRTLOGGER pLog = RTLogGetDefaultInstance(); /* Don't initialize it here... */
2072 if (pLog)
2073 {
2074 va_copy(vaCopy, va);
2075 RTLogFormatV(rtLogOutput, pLog, pszFormat, vaCopy);
2076 va_end(vaCopy);
2077 }
2078 pLog = RTLogRelGetDefaultInstance();
2079 if (pLog)
2080 {
2081 va_copy(vaCopy, va);
2082 RTLogFormatV(rtLogOutput, pLog, pszFormat, vaCopy);
2083 va_end(vaCopy);
2084 }
2085
2086 /*
2087 * Push it to the global VMM buffer.
2088 */
2089 PVM pVM = GVMMR0GetVMByEMT(NIL_RTNATIVETHREAD);
2090 if (pVM)
2091 {
2092 va_copy(vaCopy, va);
2093 RTStrPrintfV(pVM->vmm.s.szRing0AssertMsg2, sizeof(pVM->vmm.s.szRing0AssertMsg2), pszFormat, vaCopy);
2094 va_end(vaCopy);
2095 }
2096
2097 /*
2098 * Continue the normal way.
2099 */
2100 RTAssertMsg2V(pszFormat, va);
2101}
2102
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