VMMR0.cpp@ 58591

Last change on this file since 58591 was 58126, checked in by vboxsync, 9 years ago
VMM: Fixed almost all the Doxygen warnings.
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File size: 80.9 KB

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1	/* $Id: VMMR0.cpp 58126 2015-10-08 20:59:48Z vboxsync $ */
2	/** @file
3	* VMM - Host Context Ring 0.
4	*/
5
6	/*
7	* Copyright (C) 2006-2015 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_VMM
23	#include <VBox/vmm/vmm.h>
24	#include <VBox/sup.h>
25	#include <VBox/vmm/trpm.h>
26	#include <VBox/vmm/cpum.h>
27	#include <VBox/vmm/pdmapi.h>
28	#include <VBox/vmm/pgm.h>
29	#include <VBox/vmm/stam.h>
30	#include <VBox/vmm/tm.h>
31	#include "VMMInternal.h"
32	#include <VBox/vmm/vm.h>
33	#ifdef VBOX_WITH_PCI_PASSTHROUGH
34	# include <VBox/vmm/pdmpci.h>
35	#endif
36
37	#include <VBox/vmm/gvmm.h>
38	#include <VBox/vmm/gmm.h>
39	#include <VBox/vmm/gim.h>
40	#include <VBox/intnet.h>
41	#include <VBox/vmm/hm.h>
42	#include <VBox/param.h>
43	#include <VBox/err.h>
44	#include <VBox/version.h>
45	#include <VBox/log.h>
46
47	#include <iprt/asm-amd64-x86.h>
48	#include <iprt/assert.h>
49	#include <iprt/crc.h>
50	#include <iprt/mp.h>
51	#include <iprt/once.h>
52	#include <iprt/stdarg.h>
53	#include <iprt/string.h>
54	#include <iprt/thread.h>
55	#include <iprt/timer.h>
56
57	#include "dtrace/VBoxVMM.h"
58
59
60	#if defined(_MSC_VER) && defined(RT_ARCH_AMD64) /** @todo check this with with VC7! */
61	# pragma intrinsic(_AddressOfReturnAddress)
62	#endif
63
64	#if defined(RT_OS_DARWIN) && ARCH_BITS == 32
65	# error "32-bit darwin is no longer supported. Go back to 4.3 or earlier!"
66	#endif
67
68
69
70	/*********************************************************************************************************************************
71	* Defined Constants And Macros *
72	*********************************************************************************************************************************/
73	/** @def VMM_CHECK_SMAP_SETUP
74	* SMAP check setup. */
75	/** @def VMM_CHECK_SMAP_CHECK
76	* Checks that the AC flag is set if SMAP is enabled. If AC is not set,
77	* it will be logged and @a a_BadExpr is executed. */
78	/** @def VMM_CHECK_SMAP_CHECK2
79	* Checks that the AC flag is set if SMAP is enabled. If AC is not set, it will
80	* be logged, written to the VMs assertion text buffer, and @a a_BadExpr is
81	* executed. */
82	#if defined(VBOX_STRICT) \|\| 1
83	# define VMM_CHECK_SMAP_SETUP() uint32_t const fKernelFeatures = SUPR0GetKernelFeatures()
84	# define VMM_CHECK_SMAP_CHECK(a_BadExpr) \
85	do { \
86	if (fKernelFeatures & SUPKERNELFEATURES_SMAP) \
87	{ \
88	RTCCUINTREG fEflCheck = ASMGetFlags(); \
89	if (RT_LIKELY(fEflCheck & X86_EFL_AC)) \
90	{ /* likely */ } \
91	else \
92	{ \
93	SUPR0Printf("%s, line %d: EFLAGS.AC is clear! (%#x)\n", __FUNCTION__, __LINE__, (uint32_t)fEflCheck); \
94	a_BadExpr; \
95	} \
96	} \
97	} while (0)
98	# define VMM_CHECK_SMAP_CHECK2(a_pVM, a_BadExpr) \
99	do { \
100	if (fKernelFeatures & SUPKERNELFEATURES_SMAP) \
101	{ \
102	RTCCUINTREG fEflCheck = ASMGetFlags(); \
103	if (RT_LIKELY(fEflCheck & X86_EFL_AC)) \
104	{ /* likely */ } \
105	else \
106	{ \
107	SUPR0BadContext((a_pVM) ? (a_pVM)->pSession : NULL, __FILE__, __LINE__, "EFLAGS.AC is zero!"); \
108	RTStrPrintf(pVM->vmm.s.szRing0AssertMsg1, sizeof(pVM->vmm.s.szRing0AssertMsg1), \
109	"%s, line %d: EFLAGS.AC is clear! (%#x)\n", __FUNCTION__, __LINE__, (uint32_t)fEflCheck); \
110	a_BadExpr; \
111	} \
112	} \
113	} while (0)
114	#else
115	# define VMM_CHECK_SMAP_SETUP() uint32_t const fKernelFeatures = 0
116	# define VMM_CHECK_SMAP_CHECK(a_BadExpr) NOREF(fKernelFeatures)
117	# define VMM_CHECK_SMAP_CHECK2(a_pVM, a_BadExpr) NOREF(fKernelFeatures)
118	#endif
119
120
121	/*********************************************************************************************************************************
122	* Internal Functions *
123	*********************************************************************************************************************************/
124	RT_C_DECLS_BEGIN
125	#if defined(RT_ARCH_X86) && (defined(RT_OS_SOLARIS) \|\| defined(RT_OS_FREEBSD))
126	extern uint64_t __udivdi3(uint64_t, uint64_t);
127	extern uint64_t __umoddi3(uint64_t, uint64_t);
128	#endif
129	RT_C_DECLS_END
130
131
132	/*********************************************************************************************************************************
133	* Global Variables *
134	*********************************************************************************************************************************/
135	/** Drag in necessary library bits.
136	* The runtime lives here (in VMMR0.r0) and VBoxDDR0.r0 links against us. /
137	PFNRT g_VMMR0Deps[] =
138	{
139	(PFNRT)RTCrc32,
140	(PFNRT)RTOnce,
141	#if defined(RT_ARCH_X86) && (defined(RT_OS_SOLARIS) \|\| defined(RT_OS_FREEBSD))
142	(PFNRT)__udivdi3,
143	(PFNRT)__umoddi3,
144	#endif
145	NULL
146	};
147
148	#ifdef RT_OS_SOLARIS
149	/* Dependency information for the native solaris loader. */
150	extern "C" { char _depends_on[] = "vboxdrv"; }
151	#endif
152
153
154
155	/**
156	* Initialize the module.
157	* This is called when we're first loaded.
158	*
159	* @returns 0 on success.
160	* @returns VBox status on failure.
161	* @param hMod Image handle for use in APIs.
162	*/
163	DECLEXPORT(int) ModuleInit(void *hMod)
164	{
165	VMM_CHECK_SMAP_SETUP();
166	VMM_CHECK_SMAP_CHECK(RT_NOTHING);
167
168	#ifdef VBOX_WITH_DTRACE_R0
169	/*
170	* The first thing to do is register the static tracepoints.
171	* (Deregistration is automatic.)
172	*/
173	int rc2 = SUPR0TracerRegisterModule(hMod, &g_VTGObjHeader);
174	if (RT_FAILURE(rc2))
175	return rc2;
176	#endif
177	LogFlow(("ModuleInit:\n"));
178
179	#ifdef VBOX_WITH_64ON32_CMOS_DEBUG
180	/*
181	* Display the CMOS debug code.
182	*/
183	ASMOutU8(0x72, 0x03);
184	uint8_t bDebugCode = ASMInU8(0x73);
185	LogRel(("CMOS Debug Code: %#x (%d)\n", bDebugCode, bDebugCode));
186	RTLogComPrintf("CMOS Debug Code: %#x (%d)\n", bDebugCode, bDebugCode);
187	#endif
188
189	/*
190	* Initialize the VMM, GVMM, GMM, HM, PGM (Darwin) and INTNET.
191	*/
192	int rc = vmmInitFormatTypes();
193	if (RT_SUCCESS(rc))
194	{
195	VMM_CHECK_SMAP_CHECK(RT_NOTHING);
196	rc = GVMMR0Init();
197	if (RT_SUCCESS(rc))
198	{
199	VMM_CHECK_SMAP_CHECK(RT_NOTHING);
200	rc = GMMR0Init();
201	if (RT_SUCCESS(rc))
202	{
203	VMM_CHECK_SMAP_CHECK(RT_NOTHING);
204	rc = HMR0Init();
205	if (RT_SUCCESS(rc))
206	{
207	VMM_CHECK_SMAP_CHECK(RT_NOTHING);
208	rc = PGMRegisterStringFormatTypes();
209	if (RT_SUCCESS(rc))
210	{
211	VMM_CHECK_SMAP_CHECK(RT_NOTHING);
212	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
213	rc = PGMR0DynMapInit();
214	#endif
215	if (RT_SUCCESS(rc))
216	{
217	VMM_CHECK_SMAP_CHECK(RT_NOTHING);
218	rc = IntNetR0Init();
219	if (RT_SUCCESS(rc))
220	{
221	#ifdef VBOX_WITH_PCI_PASSTHROUGH
222	VMM_CHECK_SMAP_CHECK(RT_NOTHING);
223	rc = PciRawR0Init();
224	#endif
225	if (RT_SUCCESS(rc))
226	{
227	VMM_CHECK_SMAP_CHECK(RT_NOTHING);
228	rc = CPUMR0ModuleInit();
229	if (RT_SUCCESS(rc))
230	{
231	#ifdef VBOX_WITH_TRIPLE_FAULT_HACK
232	VMM_CHECK_SMAP_CHECK(RT_NOTHING);
233	rc = vmmR0TripleFaultHackInit();
234	if (RT_SUCCESS(rc))
235	#endif
236	{
237	VMM_CHECK_SMAP_CHECK(rc = VERR_VMM_SMAP_BUT_AC_CLEAR);
238	if (RT_SUCCESS(rc))
239	{
240	LogFlow(("ModuleInit: returns success.\n"));
241	return VINF_SUCCESS;
242	}
243	}
244
245	/*
246	* Bail out.
247	*/
248	#ifdef VBOX_WITH_TRIPLE_FAULT_HACK
249	vmmR0TripleFaultHackTerm();
250	#endif
251	}
252	else
253	LogRel(("ModuleInit: CPUMR0ModuleInit -> %Rrc\n", rc));
254	#ifdef VBOX_WITH_PCI_PASSTHROUGH
255	PciRawR0Term();
256	#endif
257	}
258	else
259	LogRel(("ModuleInit: PciRawR0Init -> %Rrc\n", rc));
260	IntNetR0Term();
261	}
262	else
263	LogRel(("ModuleInit: IntNetR0Init -> %Rrc\n", rc));
264	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
265	PGMR0DynMapTerm();
266	#endif
267	}
268	else
269	LogRel(("ModuleInit: PGMR0DynMapInit -> %Rrc\n", rc));
270	PGMDeregisterStringFormatTypes();
271	}
272	else
273	LogRel(("ModuleInit: PGMRegisterStringFormatTypes -> %Rrc\n", rc));
274	HMR0Term();
275	}
276	else
277	LogRel(("ModuleInit: HMR0Init -> %Rrc\n", rc));
278	GMMR0Term();
279	}
280	else
281	LogRel(("ModuleInit: GMMR0Init -> %Rrc\n", rc));
282	GVMMR0Term();
283	}
284	else
285	LogRel(("ModuleInit: GVMMR0Init -> %Rrc\n", rc));
286	vmmTermFormatTypes();
287	}
288	else
289	LogRel(("ModuleInit: vmmInitFormatTypes -> %Rrc\n", rc));
290
291	LogFlow(("ModuleInit: failed %Rrc\n", rc));
292	return rc;
293	}
294
295
296	/**
297	* Terminate the module.
298	* This is called when we're finally unloaded.
299	*
300	* @param hMod Image handle for use in APIs.
301	*/
302	DECLEXPORT(void) ModuleTerm(void *hMod)
303	{
304	NOREF(hMod);
305	LogFlow(("ModuleTerm:\n"));
306
307	/*
308	* Terminate the CPUM module (Local APIC cleanup).
309	*/
310	CPUMR0ModuleTerm();
311
312	/*
313	* Terminate the internal network service.
314	*/
315	IntNetR0Term();
316
317	/*
318	* PGM (Darwin), HM and PciRaw global cleanup.
319	*/
320	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
321	PGMR0DynMapTerm();
322	#endif
323	#ifdef VBOX_WITH_PCI_PASSTHROUGH
324	PciRawR0Term();
325	#endif
326	PGMDeregisterStringFormatTypes();
327	HMR0Term();
328	#ifdef VBOX_WITH_TRIPLE_FAULT_HACK
329	vmmR0TripleFaultHackTerm();
330	#endif
331
332	/*
333	* Destroy the GMM and GVMM instances.
334	*/
335	GMMR0Term();
336	GVMMR0Term();
337
338	vmmTermFormatTypes();
339
340	LogFlow(("ModuleTerm: returns\n"));
341	}
342
343
344	/**
345	* Initiates the R0 driver for a particular VM instance.
346	*
347	* @returns VBox status code.
348	*
349	* @param pVM The cross context VM structure.
350	* @param uSvnRev The SVN revision of the ring-3 part.
351	* @param uBuildType Build type indicator.
352	* @thread EMT.
353	*/
354	static int vmmR0InitVM(PVM pVM, uint32_t uSvnRev, uint32_t uBuildType)
355	{
356	VMM_CHECK_SMAP_SETUP();
357	VMM_CHECK_SMAP_CHECK(return VERR_VMM_SMAP_BUT_AC_CLEAR);
358
359	/*
360	* Match the SVN revisions and build type.
361	*/
362	if (uSvnRev != VMMGetSvnRev())
363	{
364	LogRel(("VMMR0InitVM: Revision mismatch, r3=%d r0=%d\n", uSvnRev, VMMGetSvnRev()));
365	SUPR0Printf("VMMR0InitVM: Revision mismatch, r3=%d r0=%d\n", uSvnRev, VMMGetSvnRev());
366	return VERR_VMM_R0_VERSION_MISMATCH;
367	}
368	if (uBuildType != vmmGetBuildType())
369	{
370	LogRel(("VMMR0InitVM: Build type mismatch, r3=%#x r0=%#x\n", uBuildType, vmmGetBuildType()));
371	SUPR0Printf("VMMR0InitVM: Build type mismatch, r3=%#x r0=%#x\n", uBuildType, vmmGetBuildType());
372	return VERR_VMM_R0_VERSION_MISMATCH;
373	}
374	if ( !VALID_PTR(pVM)
375	\|\| pVM->pVMR0 != pVM)
376	return VERR_INVALID_PARAMETER;
377
378
379	#ifdef LOG_ENABLED
380	/*
381	* Register the EMT R0 logger instance for VCPU 0.
382	*/
383	PVMCPU pVCpu = &pVM->aCpus[0];
384
385	PVMMR0LOGGER pR0Logger = pVCpu->vmm.s.pR0LoggerR0;
386	if (pR0Logger)
387	{
388	# if 0 /* testing of the logger. */
389	LogCom(("vmmR0InitVM: before %p\n", RTLogDefaultInstance()));
390	LogCom(("vmmR0InitVM: pfnFlush=%p actual=%p\n", pR0Logger->Logger.pfnFlush, vmmR0LoggerFlush));
391	LogCom(("vmmR0InitVM: pfnLogger=%p actual=%p\n", pR0Logger->Logger.pfnLogger, vmmR0LoggerWrapper));
392	LogCom(("vmmR0InitVM: offScratch=%d fFlags=%#x fDestFlags=%#x\n", pR0Logger->Logger.offScratch, pR0Logger->Logger.fFlags, pR0Logger->Logger.fDestFlags));
393
394	RTLogSetDefaultInstanceThread(&pR0Logger->Logger, (uintptr_t)pVM->pSession);
395	LogCom(("vmmR0InitVM: after %p reg\n", RTLogDefaultInstance()));
396	RTLogSetDefaultInstanceThread(NULL, pVM->pSession);
397	LogCom(("vmmR0InitVM: after %p dereg\n", RTLogDefaultInstance()));
398
399	pR0Logger->Logger.pfnLogger("hello ring-0 logger\n");
400	LogCom(("vmmR0InitVM: returned successfully from direct logger call.\n"));
401	pR0Logger->Logger.pfnFlush(&pR0Logger->Logger);
402	LogCom(("vmmR0InitVM: returned successfully from direct flush call.\n"));
403
404	RTLogSetDefaultInstanceThread(&pR0Logger->Logger, (uintptr_t)pVM->pSession);
405	LogCom(("vmmR0InitVM: after %p reg2\n", RTLogDefaultInstance()));
406	pR0Logger->Logger.pfnLogger("hello ring-0 logger\n");
407	LogCom(("vmmR0InitVM: returned successfully from direct logger call (2). offScratch=%d\n", pR0Logger->Logger.offScratch));
408	RTLogSetDefaultInstanceThread(NULL, pVM->pSession);
409	LogCom(("vmmR0InitVM: after %p dereg2\n", RTLogDefaultInstance()));
410
411	RTLogLoggerEx(&pR0Logger->Logger, 0, ~0U, "hello ring-0 logger (RTLogLoggerEx)\n");
412	LogCom(("vmmR0InitVM: RTLogLoggerEx returned fine offScratch=%d\n", pR0Logger->Logger.offScratch));
413
414	RTLogSetDefaultInstanceThread(&pR0Logger->Logger, (uintptr_t)pVM->pSession);
415	RTLogPrintf("hello ring-0 logger (RTLogPrintf)\n");
416	LogCom(("vmmR0InitVM: RTLogPrintf returned fine offScratch=%d\n", pR0Logger->Logger.offScratch));
417	# endif
418	Log(("Switching to per-thread logging instance %p (key=%p)\n", &pR0Logger->Logger, pVM->pSession));
419	RTLogSetDefaultInstanceThread(&pR0Logger->Logger, (uintptr_t)pVM->pSession);
420	pR0Logger->fRegistered = true;
421	}
422	#endif /* LOG_ENABLED */
423
424	/*
425	* Check if the host supports high resolution timers or not.
426	*/
427	if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
428	&& !RTTimerCanDoHighResolution())
429	pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
430
431	/*
432	* Initialize the per VM data for GVMM and GMM.
433	*/
434	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
435	int rc = GVMMR0InitVM(pVM);
436	// if (RT_SUCCESS(rc))
437	// rc = GMMR0InitPerVMData(pVM);
438	if (RT_SUCCESS(rc))
439	{
440	/*
441	* Init HM, CPUM and PGM (Darwin only).
442	*/
443	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
444	rc = HMR0InitVM(pVM);
445	if (RT_SUCCESS(rc))
446	VMM_CHECK_SMAP_CHECK2(pVM, rc = VERR_VMM_RING0_ASSERTION); /* CPUR0InitVM will otherwise panic the host */
447	if (RT_SUCCESS(rc))
448	{
449	rc = CPUMR0InitVM(pVM);
450	if (RT_SUCCESS(rc))
451	{
452	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
453	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
454	rc = PGMR0DynMapInitVM(pVM);
455	#endif
456	if (RT_SUCCESS(rc))
457	{
458	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
459	#ifdef VBOX_WITH_PCI_PASSTHROUGH
460	rc = PciRawR0InitVM(pVM);
461	#endif
462	if (RT_SUCCESS(rc))
463	{
464	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
465	rc = GIMR0InitVM(pVM);
466	if (RT_SUCCESS(rc))
467	{
468	VMM_CHECK_SMAP_CHECK2(pVM, rc = VERR_VMM_RING0_ASSERTION);
469	if (RT_SUCCESS(rc))
470	{
471	GVMMR0DoneInitVM(pVM);
472	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
473	return rc;
474	}
475
476	/* bail out*/
477	GIMR0TermVM(pVM);
478	}
479	#ifdef VBOX_WITH_PCI_PASSTHROUGH
480	PciRawR0TermVM(pVM);
481	#endif
482	}
483	}
484	}
485	HMR0TermVM(pVM);
486	}
487	}
488
489	RTLogSetDefaultInstanceThread(NULL, (uintptr_t)pVM->pSession);
490	return rc;
491	}
492
493
494	/**
495	* Terminates the R0 bits for a particular VM instance.
496	*
497	* This is normally called by ring-3 as part of the VM termination process, but
498	* may alternatively be called during the support driver session cleanup when
499	* the VM object is destroyed (see GVMM).
500	*
501	* @returns VBox status code.
502	*
503	* @param pVM The cross context VM structure.
504	* @param pGVM Pointer to the global VM structure. Optional.
505	* @thread EMT or session clean up thread.
506	*/
507	VMMR0_INT_DECL(int) VMMR0TermVM(PVM pVM, PGVM pGVM)
508	{
509	#ifdef VBOX_WITH_PCI_PASSTHROUGH
510	PciRawR0TermVM(pVM);
511	#endif
512
513	/*
514	* Tell GVMM what we're up to and check that we only do this once.
515	*/
516	if (GVMMR0DoingTermVM(pVM, pGVM))
517	{
518	GIMR0TermVM(pVM);
519
520	/** @todo I wish to call PGMR0PhysFlushHandyPages(pVM, &pVM->aCpus[idCpu])
521	* here to make sure we don't leak any shared pages if we crash... */
522	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
523	PGMR0DynMapTermVM(pVM);
524	#endif
525	HMR0TermVM(pVM);
526	}
527
528	/*
529	* Deregister the logger.
530	*/
531	RTLogSetDefaultInstanceThread(NULL, (uintptr_t)pVM->pSession);
532	return VINF_SUCCESS;
533	}
534
535
536	/**
537	* VMM ring-0 thread-context callback.
538	*
539	* This does common HM state updating and calls the HM-specific thread-context
540	* callback.
541	*
542	* @param enmEvent The thread-context event.
543	* @param pvUser Opaque pointer to the VMCPU.
544	*
545	* @thread EMT(pvUser)
546	*/
547	static DECLCALLBACK(void) vmmR0ThreadCtxCallback(RTTHREADCTXEVENT enmEvent, void *pvUser)
548	{
549	PVMCPU pVCpu = (PVMCPU)pvUser;
550
551	switch (enmEvent)
552	{
553	case RTTHREADCTXEVENT_IN:
554	{
555	/*
556	* Linux may call us with preemption enabled (really!) but technically we
557	* cannot get preempted here, otherwise we end up in an infinite recursion
558	* scenario (i.e. preempted in resume hook -> preempt hook -> resume hook...
559	* ad infinitum). Let's just disable preemption for now...
560	*/
561	/** @todo r=bird: I don't believe the above. The linux code is clearly enabling
562	* preemption after doing the callout (one or two functions up the
563	* call chain). */
564	/** @todo r=ramshankar: See @bugref{5313#c30}. */
565	RTTHREADPREEMPTSTATE ParanoidPreemptState = RTTHREADPREEMPTSTATE_INITIALIZER;
566	RTThreadPreemptDisable(&ParanoidPreemptState);
567
568	/* We need to update the VCPU <-> host CPU mapping. */
569	RTCPUID idHostCpu;
570	uint32_t iHostCpuSet = RTMpCurSetIndexAndId(&idHostCpu);
571	pVCpu->iHostCpuSet = iHostCpuSet;
572	ASMAtomicWriteU32(&pVCpu->idHostCpu, idHostCpu);
573
574	/* In the very unlikely event that the GIP delta for the CPU we're
575	rescheduled needs calculating, try force a return to ring-3.
576	We unfortunately cannot do the measurements right here. */
577	if (RT_UNLIKELY(SUPIsTscDeltaAvailableForCpuSetIndex(iHostCpuSet)))
578	VMCPU_FF_SET(pVCpu, VMCPU_FF_TO_R3);
579
580	/* Invoke the HM-specific thread-context callback. */
581	HMR0ThreadCtxCallback(enmEvent, pvUser);
582
583	/* Restore preemption. */
584	RTThreadPreemptRestore(&ParanoidPreemptState);
585	break;
586	}
587
588	case RTTHREADCTXEVENT_OUT:
589	{
590	/* Invoke the HM-specific thread-context callback. */
591	HMR0ThreadCtxCallback(enmEvent, pvUser);
592
593	/*
594	* Sigh. See VMMGetCpu() used by VMCPU_ASSERT_EMT(). We cannot let several VCPUs
595	* have the same host CPU associated with it.
596	*/
597	pVCpu->iHostCpuSet = UINT32_MAX;
598	ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID);
599	break;
600	}
601
602	default:
603	/* Invoke the HM-specific thread-context callback. */
604	HMR0ThreadCtxCallback(enmEvent, pvUser);
605	break;
606	}
607	}
608
609
610	/**
611	* Creates thread switching hook for the current EMT thread.
612	*
613	* This is called by GVMMR0CreateVM and GVMMR0RegisterVCpu. If the host
614	* platform does not implement switcher hooks, no hooks will be create and the
615	* member set to NIL_RTTHREADCTXHOOK.
616	*
617	* @returns VBox status code.
618	* @param pVCpu The cross context virtual CPU structure.
619	* @thread EMT(pVCpu)
620	*/
621	VMMR0_INT_DECL(int) VMMR0ThreadCtxHookCreateForEmt(PVMCPU pVCpu)
622	{
623	VMCPU_ASSERT_EMT(pVCpu);
624	Assert(pVCpu->vmm.s.hCtxHook == NIL_RTTHREADCTXHOOK);
625
626	int rc = RTThreadCtxHookCreate(&pVCpu->vmm.s.hCtxHook, 0, vmmR0ThreadCtxCallback, pVCpu);
627	if (RT_SUCCESS(rc))
628	return rc;
629
630	pVCpu->vmm.s.hCtxHook = NIL_RTTHREADCTXHOOK;
631	if (rc == VERR_NOT_SUPPORTED)
632	return VINF_SUCCESS;
633
634	LogRelMax(32, ("RTThreadCtxHookCreate failed! rc=%Rrc pVCpu=%p idCpu=%RU32\n", rc, pVCpu, pVCpu->idCpu));
635	return VINF_SUCCESS; /* Just ignore it, we can live without context hooks. */
636	}
637
638
639	/**
640	* Destroys the thread switching hook for the specified VCPU.
641	*
642	* @param pVCpu The cross context virtual CPU structure.
643	* @remarks Can be called from any thread.
644	*/
645	VMMR0_INT_DECL(void) VMMR0ThreadCtxHookDestroyForEmt(PVMCPU pVCpu)
646	{
647	int rc = RTThreadCtxHookDestroy(pVCpu->vmm.s.hCtxHook);
648	AssertRC(rc);
649	}
650
651
652	/**
653	* Disables the thread switching hook for this VCPU (if we got one).
654	*
655	* @param pVCpu The cross context virtual CPU structure.
656	* @thread EMT(pVCpu)
657	*
658	* @remarks This also clears VMCPU::idHostCpu, so the mapping is invalid after
659	* this call. This means you have to be careful with what you do!
660	*/
661	VMMR0_INT_DECL(void) VMMR0ThreadCtxHookDisable(PVMCPU pVCpu)
662	{
663	/*
664	* Clear the VCPU <-> host CPU mapping as we've left HM context.
665	* @bugref{7726#c19} explains the need for this trick:
666	*
667	* hmR0VmxCallRing3Callback/hmR0SvmCallRing3Callback &
668	* hmR0VmxLeaveSession/hmR0SvmLeaveSession disables context hooks during
669	* longjmp & normal return to ring-3, which opens a window where we may be
670	* rescheduled without changing VMCPUID::idHostCpu and cause confusion if
671	* the CPU starts executing a different EMT. Both functions first disables
672	* preemption and then calls HMR0LeaveCpu which invalids idHostCpu, leaving
673	* an opening for getting preempted.
674	*/
675	/** @todo Make HM not need this API! Then we could leave the hooks enabled
676	* all the time. */
677	/** @todo move this into the context hook disabling if(). */
678	ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID);
679
680	/*
681	* Disable the context hook, if we got one.
682	*/
683	if (pVCpu->vmm.s.hCtxHook != NIL_RTTHREADCTXHOOK)
684	{
685	Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
686	int rc = RTThreadCtxHookDisable(pVCpu->vmm.s.hCtxHook);
687	AssertRC(rc);
688	}
689	}
690
691
692	/**
693	* Internal version of VMMR0ThreadCtxHooksAreRegistered.
694	*
695	* @returns true if registered, false otherwise.
696	* @param pVCpu The cross context virtual CPU structure.
697	*/
698	DECLINLINE(bool) vmmR0ThreadCtxHookIsEnabled(PVMCPU pVCpu)
699	{
700	return RTThreadCtxHookIsEnabled(pVCpu->vmm.s.hCtxHook);
701	}
702
703
704	/**
705	* Whether thread-context hooks are registered for this VCPU.
706	*
707	* @returns true if registered, false otherwise.
708	* @param pVCpu The cross context virtual CPU structure.
709	*/
710	VMMR0_INT_DECL(bool) VMMR0ThreadCtxHookIsEnabled(PVMCPU pVCpu)
711	{
712	return vmmR0ThreadCtxHookIsEnabled(pVCpu);
713	}
714
715
716	#ifdef VBOX_WITH_STATISTICS
717	/**
718	* Record return code statistics
719	* @param pVM The cross context VM structure.
720	* @param pVCpu The cross context virtual CPU structure.
721	* @param rc The status code.
722	*/
723	static void vmmR0RecordRC(PVM pVM, PVMCPU pVCpu, int rc)
724	{
725	/*
726	* Collect statistics.
727	*/
728	switch (rc)
729	{
730	case VINF_SUCCESS:
731	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetNormal);
732	break;
733	case VINF_EM_RAW_INTERRUPT:
734	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetInterrupt);
735	break;
736	case VINF_EM_RAW_INTERRUPT_HYPER:
737	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetInterruptHyper);
738	break;
739	case VINF_EM_RAW_GUEST_TRAP:
740	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetGuestTrap);
741	break;
742	case VINF_EM_RAW_RING_SWITCH:
743	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetRingSwitch);
744	break;
745	case VINF_EM_RAW_RING_SWITCH_INT:
746	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetRingSwitchInt);
747	break;
748	case VINF_EM_RAW_STALE_SELECTOR:
749	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetStaleSelector);
750	break;
751	case VINF_EM_RAW_IRET_TRAP:
752	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetIRETTrap);
753	break;
754	case VINF_IOM_R3_IOPORT_READ:
755	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetIORead);
756	break;
757	case VINF_IOM_R3_IOPORT_WRITE:
758	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetIOWrite);
759	break;
760	case VINF_IOM_R3_MMIO_READ:
761	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMMIORead);
762	break;
763	case VINF_IOM_R3_MMIO_WRITE:
764	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMMIOWrite);
765	break;
766	case VINF_IOM_R3_MMIO_READ_WRITE:
767	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMMIOReadWrite);
768	break;
769	case VINF_PATM_HC_MMIO_PATCH_READ:
770	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMMIOPatchRead);
771	break;
772	case VINF_PATM_HC_MMIO_PATCH_WRITE:
773	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMMIOPatchWrite);
774	break;
775	case VINF_CPUM_R3_MSR_READ:
776	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMSRRead);
777	break;
778	case VINF_CPUM_R3_MSR_WRITE:
779	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMSRWrite);
780	break;
781	case VINF_EM_RAW_EMULATE_INSTR:
782	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetEmulate);
783	break;
784	case VINF_EM_RAW_EMULATE_IO_BLOCK:
785	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetIOBlockEmulate);
786	break;
787	case VINF_PATCH_EMULATE_INSTR:
788	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPatchEmulate);
789	break;
790	case VINF_EM_RAW_EMULATE_INSTR_LDT_FAULT:
791	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetLDTFault);
792	break;
793	case VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT:
794	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetGDTFault);
795	break;
796	case VINF_EM_RAW_EMULATE_INSTR_IDT_FAULT:
797	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetIDTFault);
798	break;
799	case VINF_EM_RAW_EMULATE_INSTR_TSS_FAULT:
800	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetTSSFault);
801	break;
802	case VINF_CSAM_PENDING_ACTION:
803	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetCSAMTask);
804	break;
805	case VINF_PGM_SYNC_CR3:
806	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetSyncCR3);
807	break;
808	case VINF_PATM_PATCH_INT3:
809	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPatchInt3);
810	break;
811	case VINF_PATM_PATCH_TRAP_PF:
812	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPatchPF);
813	break;
814	case VINF_PATM_PATCH_TRAP_GP:
815	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPatchGP);
816	break;
817	case VINF_PATM_PENDING_IRQ_AFTER_IRET:
818	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPatchIretIRQ);
819	break;
820	case VINF_EM_RESCHEDULE_REM:
821	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetRescheduleREM);
822	break;
823	case VINF_EM_RAW_TO_R3:
824	if (VM_FF_IS_PENDING(pVM, VM_FF_TM_VIRTUAL_SYNC))
825	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3TMVirt);
826	else if (VM_FF_IS_PENDING(pVM, VM_FF_PGM_NEED_HANDY_PAGES))
827	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3HandyPages);
828	else if (VM_FF_IS_PENDING(pVM, VM_FF_PDM_QUEUES))
829	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3PDMQueues);
830	else if (VM_FF_IS_PENDING(pVM, VM_FF_EMT_RENDEZVOUS))
831	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3Rendezvous);
832	else if (VM_FF_IS_PENDING(pVM, VM_FF_PDM_DMA))
833	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3DMA);
834	else if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_TIMER))
835	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3Timer);
836	else if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
837	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3CritSect);
838	else if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_TO_R3))
839	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3);
840	else
841	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3Unknown);
842	break;
843
844	case VINF_EM_RAW_TIMER_PENDING:
845	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetTimerPending);
846	break;
847	case VINF_EM_RAW_INTERRUPT_PENDING:
848	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetInterruptPending);
849	break;
850	case VINF_VMM_CALL_HOST:
851	switch (pVCpu->vmm.s.enmCallRing3Operation)
852	{
853	case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
854	STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallPDMCritSectEnter);
855	break;
856	case VMMCALLRING3_PDM_LOCK:
857	STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallPDMLock);
858	break;
859	case VMMCALLRING3_PGM_POOL_GROW:
860	STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallPGMPoolGrow);
861	break;
862	case VMMCALLRING3_PGM_LOCK:
863	STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallPGMLock);
864	break;
865	case VMMCALLRING3_PGM_MAP_CHUNK:
866	STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallPGMMapChunk);
867	break;
868	case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
869	STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallPGMAllocHandy);
870	break;
871	case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
872	STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallRemReplay);
873	break;
874	case VMMCALLRING3_VMM_LOGGER_FLUSH:
875	STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallLogFlush);
876	break;
877	case VMMCALLRING3_VM_SET_ERROR:
878	STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallVMSetError);
879	break;
880	case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
881	STAM_COUNTER_INC(&pVM->vmm.s.StatRZCallVMSetRuntimeError);
882	break;
883	case VMMCALLRING3_VM_R0_ASSERTION:
884	default:
885	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetCallRing3);
886	break;
887	}
888	break;
889	case VINF_PATM_DUPLICATE_FUNCTION:
890	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPATMDuplicateFn);
891	break;
892	case VINF_PGM_CHANGE_MODE:
893	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPGMChangeMode);
894	break;
895	case VINF_PGM_POOL_FLUSH_PENDING:
896	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPGMFlushPending);
897	break;
898	case VINF_EM_PENDING_REQUEST:
899	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPendingRequest);
900	break;
901	case VINF_EM_HM_PATCH_TPR_INSTR:
902	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetPatchTPR);
903	break;
904	default:
905	STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetMisc);
906	break;
907	}
908	}
909	#endif /* VBOX_WITH_STATISTICS */
910
911
912	/**
913	* The Ring 0 entry point, called by the fast-ioctl path.
914	*
915	* @param pVM The cross context VM structure.
916	* The return code is stored in pVM->vmm.s.iLastGZRc.
917	* @param idCpu The Virtual CPU ID of the calling EMT.
918	* @param enmOperation Which operation to execute.
919	* @remarks Assume called with interrupts _enabled_.
920	*/
921	VMMR0DECL(void) VMMR0EntryFast(PVM pVM, VMCPUID idCpu, VMMR0OPERATION enmOperation)
922	{
923	/*
924	* Validation.
925	*/
926	if (RT_UNLIKELY(idCpu >= pVM->cCpus))
927	return;
928	PVMCPU pVCpu = &pVM->aCpus[idCpu];
929	if (RT_UNLIKELY(pVCpu->hNativeThreadR0 != RTThreadNativeSelf()))
930	return;
931	VMM_CHECK_SMAP_SETUP();
932	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
933
934	/*
935	* Perform requested operation.
936	*/
937	switch (enmOperation)
938	{
939	/*
940	* Switch to GC and run guest raw mode code.
941	* Disable interrupts before doing the world switch.
942	*/
943	case VMMR0_DO_RAW_RUN:
944	{
945	#ifdef VBOX_WITH_RAW_MODE
946	# ifndef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
947	/* Some safety precautions first. */
948	if (RT_UNLIKELY(!PGMGetHyperCR3(pVCpu)))
949	{
950	pVCpu->vmm.s.iLastGZRc = VERR_PGM_NO_CR3_SHADOW_ROOT;
951	break;
952	}
953	# endif
954
955	/*
956	* Disable preemption.
957	*/
958	RTTHREADPREEMPTSTATE PreemptState = RTTHREADPREEMPTSTATE_INITIALIZER;
959	RTThreadPreemptDisable(&PreemptState);
960
961	/*
962	* Get the host CPU identifiers, make sure they are valid and that
963	* we've got a TSC delta for the CPU.
964	*/
965	RTCPUID idHostCpu;
966	uint32_t iHostCpuSet = RTMpCurSetIndexAndId(&idHostCpu);
967	if (RT_LIKELY( iHostCpuSet < RTCPUSET_MAX_CPUS
968	&& SUPIsTscDeltaAvailableForCpuSetIndex(iHostCpuSet)))
969	{
970	/*
971	* Commit the CPU identifiers and update the periodict preemption timer if it's active.
972	*/
973	# ifdef VBOX_WITH_VMMR0_DISABLE_LAPIC_NMI
974	CPUMR0SetLApic(pVCpu, iHostCpuSet);
975	# endif
976	pVCpu->iHostCpuSet = iHostCpuSet;
977	ASMAtomicWriteU32(&pVCpu->idHostCpu, idHostCpu);
978
979	if (pVM->vmm.s.fUsePeriodicPreemptionTimers)
980	GVMMR0SchedUpdatePeriodicPreemptionTimer(pVM, pVCpu->idHostCpu, TMCalcHostTimerFrequency(pVM, pVCpu));
981
982	/*
983	* We might need to disable VT-x if the active switcher turns off paging.
984	*/
985	bool fVTxDisabled;
986	int rc = HMR0EnterSwitcher(pVM, pVM->vmm.s.enmSwitcher, &fVTxDisabled);
987	if (RT_SUCCESS(rc))
988	{
989	/*
990	* Disable interrupts and run raw-mode code. The loop is for efficiently
991	* dispatching tracepoints that fired in raw-mode context.
992	*/
993	RTCCUINTREG uFlags = ASMIntDisableFlags();
994
995	for (;;)
996	{
997	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED_EXEC);
998	TMNotifyStartOfExecution(pVCpu);
999
1000	rc = pVM->vmm.s.pfnR0ToRawMode(pVM);
1001	pVCpu->vmm.s.iLastGZRc = rc;
1002
1003	TMNotifyEndOfExecution(pVCpu);
1004	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1005
1006	if (rc != VINF_VMM_CALL_TRACER)
1007	break;
1008	SUPR0TracerUmodProbeFire(pVM->pSession, &pVCpu->vmm.s.TracerCtx);
1009	}
1010
1011	/*
1012	* Re-enable VT-x before we dispatch any pending host interrupts and
1013	* re-enables interrupts.
1014	*/
1015	HMR0LeaveSwitcher(pVM, fVTxDisabled);
1016
1017	if ( rc == VINF_EM_RAW_INTERRUPT
1018	\|\| rc == VINF_EM_RAW_INTERRUPT_HYPER)
1019	TRPMR0DispatchHostInterrupt(pVM);
1020
1021	ASMSetFlags(uFlags);
1022
1023	/* Fire dtrace probe and collect statistics. */
1024	VBOXVMM_R0_VMM_RETURN_TO_RING3_RC(pVCpu, CPUMQueryGuestCtxPtr(pVCpu), rc);
1025	# ifdef VBOX_WITH_STATISTICS
1026	STAM_COUNTER_INC(&pVM->vmm.s.StatRunRC);
1027	vmmR0RecordRC(pVM, pVCpu, rc);
1028	# endif
1029	}
1030	else
1031	pVCpu->vmm.s.iLastGZRc = rc;
1032
1033	/*
1034	* Invalidate the host CPU identifiers as we restore preemption.
1035	*/
1036	pVCpu->iHostCpuSet = UINT32_MAX;
1037	ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID);
1038
1039	RTThreadPreemptRestore(&PreemptState);
1040	}
1041	/*
1042	* Invalid CPU set index or TSC delta in need of measuring.
1043	*/
1044	else
1045	{
1046	RTThreadPreemptRestore(&PreemptState);
1047	if (iHostCpuSet < RTCPUSET_MAX_CPUS)
1048	{
1049	int rc = SUPR0TscDeltaMeasureBySetIndex(pVM->pSession, iHostCpuSet, 0 /fFlags/,
1050	2 /cMsWaitRetry/, 5RT_MS_1SEC /cMsWaitThread*/,
1051	0 /default cTries/);
1052	if (RT_SUCCESS(rc) \|\| rc == VERR_CPU_OFFLINE)
1053	pVCpu->vmm.s.iLastGZRc = VINF_EM_RAW_TO_R3;
1054	else
1055	pVCpu->vmm.s.iLastGZRc = rc;
1056	}
1057	else
1058	pVCpu->vmm.s.iLastGZRc = VERR_INVALID_CPU_INDEX;
1059	}
1060
1061	#else /* !VBOX_WITH_RAW_MODE */
1062	pVCpu->vmm.s.iLastGZRc = VERR_RAW_MODE_NOT_SUPPORTED;
1063	#endif
1064	break;
1065	}
1066
1067	/*
1068	* Run guest code using the available hardware acceleration technology.
1069	*/
1070	case VMMR0_DO_HM_RUN:
1071	{
1072	/*
1073	* Disable preemption.
1074	*/
1075	Assert(!vmmR0ThreadCtxHookIsEnabled(pVCpu));
1076	RTTHREADPREEMPTSTATE PreemptState = RTTHREADPREEMPTSTATE_INITIALIZER;
1077	RTThreadPreemptDisable(&PreemptState);
1078
1079	/*
1080	* Get the host CPU identifiers, make sure they are valid and that
1081	* we've got a TSC delta for the CPU.
1082	*/
1083	RTCPUID idHostCpu;
1084	uint32_t iHostCpuSet = RTMpCurSetIndexAndId(&idHostCpu);
1085	if (RT_LIKELY( iHostCpuSet < RTCPUSET_MAX_CPUS
1086	&& SUPIsTscDeltaAvailableForCpuSetIndex(iHostCpuSet)))
1087	{
1088	pVCpu->iHostCpuSet = iHostCpuSet;
1089	ASMAtomicWriteU32(&pVCpu->idHostCpu, idHostCpu);
1090
1091	/*
1092	* Update the periodic preemption timer if it's active.
1093	*/
1094	if (pVM->vmm.s.fUsePeriodicPreemptionTimers)
1095	GVMMR0SchedUpdatePeriodicPreemptionTimer(pVM, pVCpu->idHostCpu, TMCalcHostTimerFrequency(pVM, pVCpu));
1096	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1097
1098	#ifdef LOG_ENABLED
1099	/*
1100	* Ugly: Lazy registration of ring 0 loggers.
1101	*/
1102	if (pVCpu->idCpu > 0)
1103	{
1104	PVMMR0LOGGER pR0Logger = pVCpu->vmm.s.pR0LoggerR0;
1105	if ( pR0Logger
1106	&& RT_UNLIKELY(!pR0Logger->fRegistered))
1107	{
1108	RTLogSetDefaultInstanceThread(&pR0Logger->Logger, (uintptr_t)pVM->pSession);
1109	pR0Logger->fRegistered = true;
1110	}
1111	}
1112	#endif
1113
1114	int rc;
1115	bool fPreemptRestored = false;
1116	if (!HMR0SuspendPending())
1117	{
1118	/*
1119	* Enable the context switching hook.
1120	*/
1121	if (pVCpu->vmm.s.hCtxHook != NIL_RTTHREADCTXHOOK)
1122	{
1123	Assert(!RTThreadCtxHookIsEnabled(pVCpu->vmm.s.hCtxHook));
1124	int rc2 = RTThreadCtxHookEnable(pVCpu->vmm.s.hCtxHook); AssertRC(rc2);
1125	}
1126
1127	/*
1128	* Enter HM context.
1129	*/
1130	rc = HMR0Enter(pVM, pVCpu);
1131	if (RT_SUCCESS(rc))
1132	{
1133	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED_HM);
1134
1135	/*
1136	* When preemption hooks are in place, enable preemption now that
1137	* we're in HM context.
1138	*/
1139	if (vmmR0ThreadCtxHookIsEnabled(pVCpu))
1140	{
1141	fPreemptRestored = true;
1142	RTThreadPreemptRestore(&PreemptState);
1143	}
1144
1145	/*
1146	* Setup the longjmp machinery and execute guest code (calls HMR0RunGuestCode).
1147	*/
1148	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1149	rc = vmmR0CallRing3SetJmp(&pVCpu->vmm.s.CallRing3JmpBufR0, HMR0RunGuestCode, pVM, pVCpu);
1150	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1151
1152	/*
1153	* Assert sanity on the way out. Using manual assertions code here as normal
1154	* assertions are going to panic the host since we're outside the setjmp/longjmp zone.
1155	*/
1156	if (RT_UNLIKELY( VMCPU_GET_STATE(pVCpu) != VMCPUSTATE_STARTED_HM
1157	&& RT_SUCCESS_NP(rc) && rc != VINF_VMM_CALL_HOST ))
1158	{
1159	pVM->vmm.s.szRing0AssertMsg1[0] = '\0';
1160	RTStrPrintf(pVM->vmm.s.szRing0AssertMsg2, sizeof(pVM->vmm.s.szRing0AssertMsg2),
1161	"Got VMCPU state %d expected %d.\n", VMCPU_GET_STATE(pVCpu), VMCPUSTATE_STARTED_HM);
1162	rc = VERR_VMM_WRONG_HM_VMCPU_STATE;
1163	}
1164	/** @todo Get rid of this. HM shouldn't disable the context hook. */
1165	else if (RT_UNLIKELY(vmmR0ThreadCtxHookIsEnabled(pVCpu)))
1166	{
1167	pVM->vmm.s.szRing0AssertMsg1[0] = '\0';
1168	RTStrPrintf(pVM->vmm.s.szRing0AssertMsg2, sizeof(pVM->vmm.s.szRing0AssertMsg2),
1169	"Thread-context hooks still enabled! VCPU=%p Id=%u rc=%d.\n", pVCpu, pVCpu->idCpu, rc);
1170	rc = VERR_INVALID_STATE;
1171	}
1172
1173	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1174	}
1175	STAM_COUNTER_INC(&pVM->vmm.s.StatRunRC);
1176
1177	/*
1178	* Invalidate the host CPU identifiers before we disable the context
1179	* hook / restore preemption.
1180	*/
1181	pVCpu->iHostCpuSet = UINT32_MAX;
1182	ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID);
1183
1184	/*
1185	* Disable context hooks. Due to unresolved cleanup issues, we
1186	* cannot leave the hooks enabled when we return to ring-3.
1187	*
1188	* Note! At the moment HM may also have disabled the hook
1189	* when we get here, but the IPRT API handles that.
1190	*/
1191	if (pVCpu->vmm.s.hCtxHook != NIL_RTTHREADCTXHOOK)
1192	{
1193	ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID);
1194	RTThreadCtxHookDisable(pVCpu->vmm.s.hCtxHook);
1195	}
1196	}
1197	/*
1198	* The system is about to go into suspend mode; go back to ring 3.
1199	*/
1200	else
1201	{
1202	rc = VINF_EM_RAW_INTERRUPT;
1203	pVCpu->iHostCpuSet = UINT32_MAX;
1204	ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID);
1205	}
1206
1207	/** @todo When HM stops messing with the context hook state, we'll disable
1208	* preemption again before the RTThreadCtxHookDisable call. */
1209	if (!fPreemptRestored)
1210	RTThreadPreemptRestore(&PreemptState);
1211
1212	pVCpu->vmm.s.iLastGZRc = rc;
1213
1214	/* Fire dtrace probe and collect statistics. */
1215	VBOXVMM_R0_VMM_RETURN_TO_RING3_HM(pVCpu, CPUMQueryGuestCtxPtr(pVCpu), rc);
1216	#ifdef VBOX_WITH_STATISTICS
1217	vmmR0RecordRC(pVM, pVCpu, rc);
1218	#endif
1219	}
1220	/*
1221	* Invalid CPU set index or TSC delta in need of measuring.
1222	*/
1223	else
1224	{
1225	pVCpu->iHostCpuSet = UINT32_MAX;
1226	ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID);
1227	RTThreadPreemptRestore(&PreemptState);
1228	if (iHostCpuSet < RTCPUSET_MAX_CPUS)
1229	{
1230	int rc = SUPR0TscDeltaMeasureBySetIndex(pVM->pSession, iHostCpuSet, 0 /fFlags/,
1231	2 /cMsWaitRetry/, 5RT_MS_1SEC /cMsWaitThread*/,
1232	0 /default cTries/);
1233	if (RT_SUCCESS(rc) \|\| rc == VERR_CPU_OFFLINE)
1234	pVCpu->vmm.s.iLastGZRc = VINF_EM_RAW_TO_R3;
1235	else
1236	pVCpu->vmm.s.iLastGZRc = rc;
1237	}
1238	else
1239	pVCpu->vmm.s.iLastGZRc = VERR_INVALID_CPU_INDEX;
1240	}
1241	break;
1242	}
1243
1244	/*
1245	* For profiling.
1246	*/
1247	case VMMR0_DO_NOP:
1248	pVCpu->vmm.s.iLastGZRc = VINF_SUCCESS;
1249	break;
1250
1251	/*
1252	* Impossible.
1253	*/
1254	default:
1255	AssertMsgFailed(("%#x\n", enmOperation));
1256	pVCpu->vmm.s.iLastGZRc = VERR_NOT_SUPPORTED;
1257	break;
1258	}
1259	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1260	}
1261
1262
1263	/**
1264	* Validates a session or VM session argument.
1265	*
1266	* @returns true / false accordingly.
1267	* @param pVM The cross context VM structure.
1268	* @param pClaimedSession The session claim to validate.
1269	* @param pSession The session argument.
1270	*/
1271	DECLINLINE(bool) vmmR0IsValidSession(PVM pVM, PSUPDRVSESSION pClaimedSession, PSUPDRVSESSION pSession)
1272	{
1273	/* This must be set! */
1274	if (!pSession)
1275	return false;
1276
1277	/* Only one out of the two. */
1278	if (pVM && pClaimedSession)
1279	return false;
1280	if (pVM)
1281	pClaimedSession = pVM->pSession;
1282	return pClaimedSession == pSession;
1283	}
1284
1285
1286	/**
1287	* VMMR0EntryEx worker function, either called directly or when ever possible
1288	* called thru a longjmp so we can exit safely on failure.
1289	*
1290	* @returns VBox status code.
1291	* @param pVM The cross context VM structure.
1292	* @param idCpu Virtual CPU ID argument. Must be NIL_VMCPUID if pVM
1293	* is NIL_RTR0PTR, and may be NIL_VMCPUID if it isn't
1294	* @param enmOperation Which operation to execute.
1295	* @param pReqHdr This points to a SUPVMMR0REQHDR packet. Optional.
1296	* The support driver validates this if it's present.
1297	* @param u64Arg Some simple constant argument.
1298	* @param pSession The session of the caller.
1299	* @remarks Assume called with interrupts _enabled_.
1300	*/
1301	static int vmmR0EntryExWorker(PVM pVM, VMCPUID idCpu, VMMR0OPERATION enmOperation, PSUPVMMR0REQHDR pReqHdr, uint64_t u64Arg, PSUPDRVSESSION pSession)
1302	{
1303	/*
1304	* Common VM pointer validation.
1305	*/
1306	if (pVM)
1307	{
1308	if (RT_UNLIKELY( !VALID_PTR(pVM)
1309	\|\| ((uintptr_t)pVM & PAGE_OFFSET_MASK)))
1310	{
1311	SUPR0Printf("vmmR0EntryExWorker: Invalid pVM=%p! (op=%d)\n", pVM, enmOperation);
1312	return VERR_INVALID_POINTER;
1313	}
1314	if (RT_UNLIKELY( pVM->enmVMState < VMSTATE_CREATING
1315	\|\| pVM->enmVMState > VMSTATE_TERMINATED
1316	\|\| pVM->pVMR0 != pVM))
1317	{
1318	SUPR0Printf("vmmR0EntryExWorker: Invalid pVM=%p:{enmVMState=%d, .pVMR0=%p}! (op=%d)\n",
1319	pVM, pVM->enmVMState, pVM->pVMR0, enmOperation);
1320	return VERR_INVALID_POINTER;
1321	}
1322
1323	if (RT_UNLIKELY(idCpu >= pVM->cCpus && idCpu != NIL_VMCPUID))
1324	{
1325	SUPR0Printf("vmmR0EntryExWorker: Invalid idCpu (%u vs cCpus=%u)\n", idCpu, pVM->cCpus);
1326	return VERR_INVALID_PARAMETER;
1327	}
1328	}
1329	else if (RT_UNLIKELY(idCpu != NIL_VMCPUID))
1330	{
1331	SUPR0Printf("vmmR0EntryExWorker: Invalid idCpu=%u\n", idCpu);
1332	return VERR_INVALID_PARAMETER;
1333	}
1334	VMM_CHECK_SMAP_SETUP();
1335	VMM_CHECK_SMAP_CHECK(RT_NOTHING);
1336	int rc;
1337
1338	switch (enmOperation)
1339	{
1340	/*
1341	* GVM requests
1342	*/
1343	case VMMR0_DO_GVMM_CREATE_VM:
1344	if (pVM \|\| u64Arg \|\| idCpu != NIL_VMCPUID)
1345	return VERR_INVALID_PARAMETER;
1346	rc = GVMMR0CreateVMReq((PGVMMCREATEVMREQ)pReqHdr);
1347	VMM_CHECK_SMAP_CHECK(RT_NOTHING);
1348	break;
1349
1350	case VMMR0_DO_GVMM_DESTROY_VM:
1351	if (pReqHdr \|\| u64Arg)
1352	return VERR_INVALID_PARAMETER;
1353	rc = GVMMR0DestroyVM(pVM);
1354	VMM_CHECK_SMAP_CHECK(RT_NOTHING);
1355	break;
1356
1357	case VMMR0_DO_GVMM_REGISTER_VMCPU:
1358	{
1359	if (!pVM)
1360	return VERR_INVALID_PARAMETER;
1361	rc = GVMMR0RegisterVCpu(pVM, idCpu);
1362	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1363	break;
1364	}
1365
1366	case VMMR0_DO_GVMM_SCHED_HALT:
1367	if (pReqHdr)
1368	return VERR_INVALID_PARAMETER;
1369	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1370	rc = GVMMR0SchedHalt(pVM, idCpu, u64Arg);
1371	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1372	break;
1373
1374	case VMMR0_DO_GVMM_SCHED_WAKE_UP:
1375	if (pReqHdr \|\| u64Arg)
1376	return VERR_INVALID_PARAMETER;
1377	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1378	rc = GVMMR0SchedWakeUp(pVM, idCpu);
1379	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1380	break;
1381
1382	case VMMR0_DO_GVMM_SCHED_POKE:
1383	if (pReqHdr \|\| u64Arg)
1384	return VERR_INVALID_PARAMETER;
1385	rc = GVMMR0SchedPoke(pVM, idCpu);
1386	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1387	break;
1388
1389	case VMMR0_DO_GVMM_SCHED_WAKE_UP_AND_POKE_CPUS:
1390	if (u64Arg)
1391	return VERR_INVALID_PARAMETER;
1392	rc = GVMMR0SchedWakeUpAndPokeCpusReq(pVM, (PGVMMSCHEDWAKEUPANDPOKECPUSREQ)pReqHdr);
1393	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1394	break;
1395
1396	case VMMR0_DO_GVMM_SCHED_POLL:
1397	if (pReqHdr \|\| u64Arg > 1)
1398	return VERR_INVALID_PARAMETER;
1399	rc = GVMMR0SchedPoll(pVM, idCpu, !!u64Arg);
1400	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1401	break;
1402
1403	case VMMR0_DO_GVMM_QUERY_STATISTICS:
1404	if (u64Arg)
1405	return VERR_INVALID_PARAMETER;
1406	rc = GVMMR0QueryStatisticsReq(pVM, (PGVMMQUERYSTATISTICSSREQ)pReqHdr);
1407	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1408	break;
1409
1410	case VMMR0_DO_GVMM_RESET_STATISTICS:
1411	if (u64Arg)
1412	return VERR_INVALID_PARAMETER;
1413	rc = GVMMR0ResetStatisticsReq(pVM, (PGVMMRESETSTATISTICSSREQ)pReqHdr);
1414	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1415	break;
1416
1417	/*
1418	* Initialize the R0 part of a VM instance.
1419	*/
1420	case VMMR0_DO_VMMR0_INIT:
1421	rc = vmmR0InitVM(pVM, RT_LODWORD(u64Arg), RT_HIDWORD(u64Arg));
1422	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1423	break;
1424
1425	/*
1426	* Terminate the R0 part of a VM instance.
1427	*/
1428	case VMMR0_DO_VMMR0_TERM:
1429	rc = VMMR0TermVM(pVM, NULL);
1430	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1431	break;
1432
1433	/*
1434	* Attempt to enable hm mode and check the current setting.
1435	*/
1436	case VMMR0_DO_HM_ENABLE:
1437	rc = HMR0EnableAllCpus(pVM);
1438	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1439	break;
1440
1441	/*
1442	* Setup the hardware accelerated session.
1443	*/
1444	case VMMR0_DO_HM_SETUP_VM:
1445	rc = HMR0SetupVM(pVM);
1446	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1447	break;
1448
1449	/*
1450	* Switch to RC to execute Hypervisor function.
1451	*/
1452	case VMMR0_DO_CALL_HYPERVISOR:
1453	{
1454	#ifdef VBOX_WITH_RAW_MODE
1455	/*
1456	* Validate input / context.
1457	*/
1458	if (RT_UNLIKELY(idCpu != 0))
1459	return VERR_INVALID_CPU_ID;
1460	if (RT_UNLIKELY(pVM->cCpus != 1))
1461	return VERR_INVALID_PARAMETER;
1462	PVMCPU pVCpu = &pVM->aCpus[idCpu];
1463	# ifndef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
1464	if (RT_UNLIKELY(!PGMGetHyperCR3(pVCpu)))
1465	return VERR_PGM_NO_CR3_SHADOW_ROOT;
1466	# endif
1467
1468	/*
1469	* Disable interrupts.
1470	*/
1471	RTCCUINTREG fFlags = ASMIntDisableFlags();
1472
1473	/*
1474	* Get the host CPU identifiers, make sure they are valid and that
1475	* we've got a TSC delta for the CPU.
1476	*/
1477	RTCPUID idHostCpu;
1478	uint32_t iHostCpuSet = RTMpCurSetIndexAndId(&idHostCpu);
1479	if (RT_UNLIKELY(iHostCpuSet >= RTCPUSET_MAX_CPUS))
1480	{
1481	ASMSetFlags(fFlags);
1482	return VERR_INVALID_CPU_INDEX;
1483	}
1484	if (RT_UNLIKELY(!SUPIsTscDeltaAvailableForCpuSetIndex(iHostCpuSet)))
1485	{
1486	ASMSetFlags(fFlags);
1487	rc = SUPR0TscDeltaMeasureBySetIndex(pVM->pSession, iHostCpuSet, 0 /fFlags/,
1488	2 /cMsWaitRetry/, 5RT_MS_1SEC /cMsWaitThread*/,
1489	0 /default cTries/);
1490	if (RT_FAILURE(rc) && rc != VERR_CPU_OFFLINE)
1491	{
1492	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1493	return rc;
1494	}
1495	}
1496
1497	/*
1498	* Commit the CPU identifiers.
1499	*/
1500	# ifdef VBOX_WITH_VMMR0_DISABLE_LAPIC_NMI
1501	CPUMR0SetLApic(pVCpu, iHostCpuSet);
1502	# endif
1503	pVCpu->iHostCpuSet = iHostCpuSet;
1504	ASMAtomicWriteU32(&pVCpu->idHostCpu, idHostCpu);
1505
1506	/*
1507	* We might need to disable VT-x if the active switcher turns off paging.
1508	*/
1509	bool fVTxDisabled;
1510	rc = HMR0EnterSwitcher(pVM, pVM->vmm.s.enmSwitcher, &fVTxDisabled);
1511	if (RT_SUCCESS(rc))
1512	{
1513	/*
1514	* Go through the wormhole...
1515	*/
1516	rc = pVM->vmm.s.pfnR0ToRawMode(pVM);
1517
1518	/*
1519	* Re-enable VT-x before we dispatch any pending host interrupts.
1520	*/
1521	HMR0LeaveSwitcher(pVM, fVTxDisabled);
1522
1523	if ( rc == VINF_EM_RAW_INTERRUPT
1524	\|\| rc == VINF_EM_RAW_INTERRUPT_HYPER)
1525	TRPMR0DispatchHostInterrupt(pVM);
1526	}
1527
1528	/*
1529	* Invalidate the host CPU identifiers as we restore interrupts.
1530	*/
1531	pVCpu->iHostCpuSet = UINT32_MAX;
1532	ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID);
1533	ASMSetFlags(fFlags);
1534
1535	#else /* !VBOX_WITH_RAW_MODE */
1536	rc = VERR_RAW_MODE_NOT_SUPPORTED;
1537	#endif
1538	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1539	break;
1540	}
1541
1542	/*
1543	* PGM wrappers.
1544	*/
1545	case VMMR0_DO_PGM_ALLOCATE_HANDY_PAGES:
1546	if (idCpu == NIL_VMCPUID)
1547	return VERR_INVALID_CPU_ID;
1548	rc = PGMR0PhysAllocateHandyPages(pVM, &pVM->aCpus[idCpu]);
1549	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1550	break;
1551
1552	case VMMR0_DO_PGM_FLUSH_HANDY_PAGES:
1553	if (idCpu == NIL_VMCPUID)
1554	return VERR_INVALID_CPU_ID;
1555	rc = PGMR0PhysFlushHandyPages(pVM, &pVM->aCpus[idCpu]);
1556	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1557	break;
1558
1559	case VMMR0_DO_PGM_ALLOCATE_LARGE_HANDY_PAGE:
1560	if (idCpu == NIL_VMCPUID)
1561	return VERR_INVALID_CPU_ID;
1562	rc = PGMR0PhysAllocateLargeHandyPage(pVM, &pVM->aCpus[idCpu]);
1563	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1564	break;
1565
1566	case VMMR0_DO_PGM_PHYS_SETUP_IOMMU:
1567	if (idCpu != 0)
1568	return VERR_INVALID_CPU_ID;
1569	rc = PGMR0PhysSetupIommu(pVM);
1570	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1571	break;
1572
1573	/*
1574	* GMM wrappers.
1575	*/
1576	case VMMR0_DO_GMM_INITIAL_RESERVATION:
1577	if (u64Arg)
1578	return VERR_INVALID_PARAMETER;
1579	rc = GMMR0InitialReservationReq(pVM, idCpu, (PGMMINITIALRESERVATIONREQ)pReqHdr);
1580	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1581	break;
1582
1583	case VMMR0_DO_GMM_UPDATE_RESERVATION:
1584	if (u64Arg)
1585	return VERR_INVALID_PARAMETER;
1586	rc = GMMR0UpdateReservationReq(pVM, idCpu, (PGMMUPDATERESERVATIONREQ)pReqHdr);
1587	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1588	break;
1589
1590	case VMMR0_DO_GMM_ALLOCATE_PAGES:
1591	if (u64Arg)
1592	return VERR_INVALID_PARAMETER;
1593	rc = GMMR0AllocatePagesReq(pVM, idCpu, (PGMMALLOCATEPAGESREQ)pReqHdr);
1594	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1595	break;
1596
1597	case VMMR0_DO_GMM_FREE_PAGES:
1598	if (u64Arg)
1599	return VERR_INVALID_PARAMETER;
1600	rc = GMMR0FreePagesReq(pVM, idCpu, (PGMMFREEPAGESREQ)pReqHdr);
1601	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1602	break;
1603
1604	case VMMR0_DO_GMM_FREE_LARGE_PAGE:
1605	if (u64Arg)
1606	return VERR_INVALID_PARAMETER;
1607	rc = GMMR0FreeLargePageReq(pVM, idCpu, (PGMMFREELARGEPAGEREQ)pReqHdr);
1608	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1609	break;
1610
1611	case VMMR0_DO_GMM_QUERY_HYPERVISOR_MEM_STATS:
1612	if (u64Arg)
1613	return VERR_INVALID_PARAMETER;
1614	rc = GMMR0QueryHypervisorMemoryStatsReq(pVM, (PGMMMEMSTATSREQ)pReqHdr);
1615	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1616	break;
1617
1618	case VMMR0_DO_GMM_QUERY_MEM_STATS:
1619	if (idCpu == NIL_VMCPUID)
1620	return VERR_INVALID_CPU_ID;
1621	if (u64Arg)
1622	return VERR_INVALID_PARAMETER;
1623	rc = GMMR0QueryMemoryStatsReq(pVM, idCpu, (PGMMMEMSTATSREQ)pReqHdr);
1624	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1625	break;
1626
1627	case VMMR0_DO_GMM_BALLOONED_PAGES:
1628	if (u64Arg)
1629	return VERR_INVALID_PARAMETER;
1630	rc = GMMR0BalloonedPagesReq(pVM, idCpu, (PGMMBALLOONEDPAGESREQ)pReqHdr);
1631	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1632	break;
1633
1634	case VMMR0_DO_GMM_MAP_UNMAP_CHUNK:
1635	if (u64Arg)
1636	return VERR_INVALID_PARAMETER;
1637	rc = GMMR0MapUnmapChunkReq(pVM, (PGMMMAPUNMAPCHUNKREQ)pReqHdr);
1638	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1639	break;
1640
1641	case VMMR0_DO_GMM_SEED_CHUNK:
1642	if (pReqHdr)
1643	return VERR_INVALID_PARAMETER;
1644	rc = GMMR0SeedChunk(pVM, idCpu, (RTR3PTR)u64Arg);
1645	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1646	break;
1647
1648	case VMMR0_DO_GMM_REGISTER_SHARED_MODULE:
1649	if (idCpu == NIL_VMCPUID)
1650	return VERR_INVALID_CPU_ID;
1651	if (u64Arg)
1652	return VERR_INVALID_PARAMETER;
1653	rc = GMMR0RegisterSharedModuleReq(pVM, idCpu, (PGMMREGISTERSHAREDMODULEREQ)pReqHdr);
1654	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1655	break;
1656
1657	case VMMR0_DO_GMM_UNREGISTER_SHARED_MODULE:
1658	if (idCpu == NIL_VMCPUID)
1659	return VERR_INVALID_CPU_ID;
1660	if (u64Arg)
1661	return VERR_INVALID_PARAMETER;
1662	rc = GMMR0UnregisterSharedModuleReq(pVM, idCpu, (PGMMUNREGISTERSHAREDMODULEREQ)pReqHdr);
1663	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1664	break;
1665
1666	case VMMR0_DO_GMM_RESET_SHARED_MODULES:
1667	if (idCpu == NIL_VMCPUID)
1668	return VERR_INVALID_CPU_ID;
1669	if ( u64Arg
1670	\|\| pReqHdr)
1671	return VERR_INVALID_PARAMETER;
1672	rc = GMMR0ResetSharedModules(pVM, idCpu);
1673	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1674	break;
1675
1676	#ifdef VBOX_WITH_PAGE_SHARING
1677	case VMMR0_DO_GMM_CHECK_SHARED_MODULES:
1678	{
1679	if (idCpu == NIL_VMCPUID)
1680	return VERR_INVALID_CPU_ID;
1681	if ( u64Arg
1682	\|\| pReqHdr)
1683	return VERR_INVALID_PARAMETER;
1684
1685	PVMCPU pVCpu = &pVM->aCpus[idCpu];
1686	Assert(pVCpu->hNativeThreadR0 == RTThreadNativeSelf());
1687
1688	# ifdef DEBUG_sandervl
1689	/* Make sure that log flushes can jump back to ring-3; annoying to get an incomplete log (this is risky though as the code doesn't take this into account). */
1690	/* Todo: this can have bad side effects for unexpected jumps back to r3. */
1691	rc = GMMR0CheckSharedModulesStart(pVM);
1692	if (rc == VINF_SUCCESS)
1693	{
1694	rc = vmmR0CallRing3SetJmp(&pVCpu->vmm.s.CallRing3JmpBufR0, GMMR0CheckSharedModules, pVM, pVCpu); /* this may resume code. */
1695	Assert( rc == VINF_SUCCESS
1696	\|\| (rc == VINF_VMM_CALL_HOST && pVCpu->vmm.s.enmCallRing3Operation == VMMCALLRING3_VMM_LOGGER_FLUSH));
1697	GMMR0CheckSharedModulesEnd(pVM);
1698	}
1699	# else
1700	rc = GMMR0CheckSharedModules(pVM, pVCpu);
1701	# endif
1702	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1703	break;
1704	}
1705	#endif
1706
1707	#if defined(VBOX_STRICT) && HC_ARCH_BITS == 64
1708	case VMMR0_DO_GMM_FIND_DUPLICATE_PAGE:
1709	if (u64Arg)
1710	return VERR_INVALID_PARAMETER;
1711	rc = GMMR0FindDuplicatePageReq(pVM, (PGMMFINDDUPLICATEPAGEREQ)pReqHdr);
1712	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1713	break;
1714	#endif
1715
1716	case VMMR0_DO_GMM_QUERY_STATISTICS:
1717	if (u64Arg)
1718	return VERR_INVALID_PARAMETER;
1719	rc = GMMR0QueryStatisticsReq(pVM, (PGMMQUERYSTATISTICSSREQ)pReqHdr);
1720	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1721	break;
1722
1723	case VMMR0_DO_GMM_RESET_STATISTICS:
1724	if (u64Arg)
1725	return VERR_INVALID_PARAMETER;
1726	rc = GMMR0ResetStatisticsReq(pVM, (PGMMRESETSTATISTICSSREQ)pReqHdr);
1727	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1728	break;
1729
1730	/*
1731	* A quick GCFGM mock-up.
1732	*/
1733	/** @todo GCFGM with proper access control, ring-3 management interface and all that. */
1734	case VMMR0_DO_GCFGM_SET_VALUE:
1735	case VMMR0_DO_GCFGM_QUERY_VALUE:
1736	{
1737	if (pVM \|\| !pReqHdr \|\| u64Arg \|\| idCpu != NIL_VMCPUID)
1738	return VERR_INVALID_PARAMETER;
1739	PGCFGMVALUEREQ pReq = (PGCFGMVALUEREQ)pReqHdr;
1740	if (pReq->Hdr.cbReq != sizeof(*pReq))
1741	return VERR_INVALID_PARAMETER;
1742	if (enmOperation == VMMR0_DO_GCFGM_SET_VALUE)
1743	{
1744	rc = GVMMR0SetConfig(pReq->pSession, &pReq->szName[0], pReq->u64Value);
1745	//if (rc == VERR_CFGM_VALUE_NOT_FOUND)
1746	// rc = GMMR0SetConfig(pReq->pSession, &pReq->szName[0], pReq->u64Value);
1747	}
1748	else
1749	{
1750	rc = GVMMR0QueryConfig(pReq->pSession, &pReq->szName[0], &pReq->u64Value);
1751	//if (rc == VERR_CFGM_VALUE_NOT_FOUND)
1752	// rc = GMMR0QueryConfig(pReq->pSession, &pReq->szName[0], &pReq->u64Value);
1753	}
1754	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1755	break;
1756	}
1757
1758	/*
1759	* PDM Wrappers.
1760	*/
1761	case VMMR0_DO_PDM_DRIVER_CALL_REQ_HANDLER:
1762	{
1763	if (!pVM \|\| !pReqHdr \|\| u64Arg \|\| idCpu != NIL_VMCPUID)
1764	return VERR_INVALID_PARAMETER;
1765	rc = PDMR0DriverCallReqHandler(pVM, (PPDMDRIVERCALLREQHANDLERREQ)pReqHdr);
1766	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1767	break;
1768	}
1769
1770	case VMMR0_DO_PDM_DEVICE_CALL_REQ_HANDLER:
1771	{
1772	if (!pVM \|\| !pReqHdr \|\| u64Arg \|\| idCpu != NIL_VMCPUID)
1773	return VERR_INVALID_PARAMETER;
1774	rc = PDMR0DeviceCallReqHandler(pVM, (PPDMDEVICECALLREQHANDLERREQ)pReqHdr);
1775	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1776	break;
1777	}
1778
1779	/*
1780	* Requests to the internal networking service.
1781	*/
1782	case VMMR0_DO_INTNET_OPEN:
1783	{
1784	PINTNETOPENREQ pReq = (PINTNETOPENREQ)pReqHdr;
1785	if (u64Arg \|\| !pReq \|\| !vmmR0IsValidSession(pVM, pReq->pSession, pSession) \|\| idCpu != NIL_VMCPUID)
1786	return VERR_INVALID_PARAMETER;
1787	rc = IntNetR0OpenReq(pSession, pReq);
1788	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1789	break;
1790	}
1791
1792	case VMMR0_DO_INTNET_IF_CLOSE:
1793	if (u64Arg \|\| !pReqHdr \|\| !vmmR0IsValidSession(pVM, ((PINTNETIFCLOSEREQ)pReqHdr)->pSession, pSession) \|\| idCpu != NIL_VMCPUID)
1794	return VERR_INVALID_PARAMETER;
1795	rc = IntNetR0IfCloseReq(pSession, (PINTNETIFCLOSEREQ)pReqHdr);
1796	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1797	break;
1798
1799
1800	case VMMR0_DO_INTNET_IF_GET_BUFFER_PTRS:
1801	if (u64Arg \|\| !pReqHdr \|\| !vmmR0IsValidSession(pVM, ((PINTNETIFGETBUFFERPTRSREQ)pReqHdr)->pSession, pSession) \|\| idCpu != NIL_VMCPUID)
1802	return VERR_INVALID_PARAMETER;
1803	rc = IntNetR0IfGetBufferPtrsReq(pSession, (PINTNETIFGETBUFFERPTRSREQ)pReqHdr);
1804	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1805	break;
1806
1807	case VMMR0_DO_INTNET_IF_SET_PROMISCUOUS_MODE:
1808	if (u64Arg \|\| !pReqHdr \|\| !vmmR0IsValidSession(pVM, ((PINTNETIFSETPROMISCUOUSMODEREQ)pReqHdr)->pSession, pSession) \|\| idCpu != NIL_VMCPUID)
1809	return VERR_INVALID_PARAMETER;
1810	rc = IntNetR0IfSetPromiscuousModeReq(pSession, (PINTNETIFSETPROMISCUOUSMODEREQ)pReqHdr);
1811	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1812	break;
1813
1814	case VMMR0_DO_INTNET_IF_SET_MAC_ADDRESS:
1815	if (u64Arg \|\| !pReqHdr \|\| !vmmR0IsValidSession(pVM, ((PINTNETIFSETMACADDRESSREQ)pReqHdr)->pSession, pSession) \|\| idCpu != NIL_VMCPUID)
1816	return VERR_INVALID_PARAMETER;
1817	rc = IntNetR0IfSetMacAddressReq(pSession, (PINTNETIFSETMACADDRESSREQ)pReqHdr);
1818	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1819	break;
1820
1821	case VMMR0_DO_INTNET_IF_SET_ACTIVE:
1822	if (u64Arg \|\| !pReqHdr \|\| !vmmR0IsValidSession(pVM, ((PINTNETIFSETACTIVEREQ)pReqHdr)->pSession, pSession) \|\| idCpu != NIL_VMCPUID)
1823	return VERR_INVALID_PARAMETER;
1824	rc = IntNetR0IfSetActiveReq(pSession, (PINTNETIFSETACTIVEREQ)pReqHdr);
1825	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1826	break;
1827
1828	case VMMR0_DO_INTNET_IF_SEND:
1829	if (u64Arg \|\| !pReqHdr \|\| !vmmR0IsValidSession(pVM, ((PINTNETIFSENDREQ)pReqHdr)->pSession, pSession) \|\| idCpu != NIL_VMCPUID)
1830	return VERR_INVALID_PARAMETER;
1831	rc = IntNetR0IfSendReq(pSession, (PINTNETIFSENDREQ)pReqHdr);
1832	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1833	break;
1834
1835	case VMMR0_DO_INTNET_IF_WAIT:
1836	if (u64Arg \|\| !pReqHdr \|\| !vmmR0IsValidSession(pVM, ((PINTNETIFWAITREQ)pReqHdr)->pSession, pSession) \|\| idCpu != NIL_VMCPUID)
1837	return VERR_INVALID_PARAMETER;
1838	rc = IntNetR0IfWaitReq(pSession, (PINTNETIFWAITREQ)pReqHdr);
1839	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1840	break;
1841
1842	case VMMR0_DO_INTNET_IF_ABORT_WAIT:
1843	if (u64Arg \|\| !pReqHdr \|\| !vmmR0IsValidSession(pVM, ((PINTNETIFWAITREQ)pReqHdr)->pSession, pSession) \|\| idCpu != NIL_VMCPUID)
1844	return VERR_INVALID_PARAMETER;
1845	rc = IntNetR0IfAbortWaitReq(pSession, (PINTNETIFABORTWAITREQ)pReqHdr);
1846	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1847	break;
1848
1849	#ifdef VBOX_WITH_PCI_PASSTHROUGH
1850	/*
1851	* Requests to host PCI driver service.
1852	*/
1853	case VMMR0_DO_PCIRAW_REQ:
1854	if (u64Arg \|\| !pReqHdr \|\| !vmmR0IsValidSession(pVM, ((PPCIRAWSENDREQ)pReqHdr)->pSession, pSession) \|\| idCpu != NIL_VMCPUID)
1855	return VERR_INVALID_PARAMETER;
1856	rc = PciRawR0ProcessReq(pSession, pVM, (PPCIRAWSENDREQ)pReqHdr);
1857	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1858	break;
1859	#endif
1860	/*
1861	* For profiling.
1862	*/
1863	case VMMR0_DO_NOP:
1864	case VMMR0_DO_SLOW_NOP:
1865	return VINF_SUCCESS;
1866
1867	/*
1868	* For testing Ring-0 APIs invoked in this environment.
1869	*/
1870	case VMMR0_DO_TESTS:
1871	/** @todo make new test */
1872	return VINF_SUCCESS;
1873
1874
1875	#if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS)
1876	case VMMR0_DO_TEST_SWITCHER3264:
1877	if (idCpu == NIL_VMCPUID)
1878	return VERR_INVALID_CPU_ID;
1879	rc = HMR0TestSwitcher3264(pVM);
1880	VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING);
1881	break;
1882	#endif
1883	default:
1884	/*
1885	* We're returning VERR_NOT_SUPPORT here so we've got something else
1886	* than -1 which the interrupt gate glue code might return.
1887	*/
1888	Log(("operation %#x is not supported\n", enmOperation));
1889	return VERR_NOT_SUPPORTED;
1890	}
1891	return rc;
1892	}
1893
1894
1895	/**
1896	* Argument for vmmR0EntryExWrapper containing the arguments for VMMR0EntryEx.
1897	*/
1898	typedef struct VMMR0ENTRYEXARGS
1899	{
1900	PVM pVM;
1901	VMCPUID idCpu;
1902	VMMR0OPERATION enmOperation;
1903	PSUPVMMR0REQHDR pReq;
1904	uint64_t u64Arg;
1905	PSUPDRVSESSION pSession;
1906	} VMMR0ENTRYEXARGS;
1907	/** Pointer to a vmmR0EntryExWrapper argument package. */
1908	typedef VMMR0ENTRYEXARGS *PVMMR0ENTRYEXARGS;
1909
1910	/**
1911	* This is just a longjmp wrapper function for VMMR0EntryEx calls.
1912	*
1913	* @returns VBox status code.
1914	* @param pvArgs The argument package
1915	*/
1916	static DECLCALLBACK(int) vmmR0EntryExWrapper(void *pvArgs)
1917	{
1918	return vmmR0EntryExWorker(((PVMMR0ENTRYEXARGS)pvArgs)->pVM,
1919	((PVMMR0ENTRYEXARGS)pvArgs)->idCpu,
1920	((PVMMR0ENTRYEXARGS)pvArgs)->enmOperation,
1921	((PVMMR0ENTRYEXARGS)pvArgs)->pReq,
1922	((PVMMR0ENTRYEXARGS)pvArgs)->u64Arg,
1923	((PVMMR0ENTRYEXARGS)pvArgs)->pSession);
1924	}
1925
1926
1927	/**
1928	* The Ring 0 entry point, called by the support library (SUP).
1929	*
1930	* @returns VBox status code.
1931	* @param pVM The cross context VM structure.
1932	* @param idCpu Virtual CPU ID argument. Must be NIL_VMCPUID if pVM
1933	* is NIL_RTR0PTR, and may be NIL_VMCPUID if it isn't
1934	* @param enmOperation Which operation to execute.
1935	* @param pReq Pointer to the SUPVMMR0REQHDR packet. Optional.
1936	* @param u64Arg Some simple constant argument.
1937	* @param pSession The session of the caller.
1938	* @remarks Assume called with interrupts _enabled_.
1939	*/
1940	VMMR0DECL(int) VMMR0EntryEx(PVM pVM, VMCPUID idCpu, VMMR0OPERATION enmOperation, PSUPVMMR0REQHDR pReq, uint64_t u64Arg, PSUPDRVSESSION pSession)
1941	{
1942	/*
1943	* Requests that should only happen on the EMT thread will be
1944	* wrapped in a setjmp so we can assert without causing trouble.
1945	*/
1946	if ( VALID_PTR(pVM)
1947	&& pVM->pVMR0
1948	&& idCpu < pVM->cCpus)
1949	{
1950	switch (enmOperation)
1951	{
1952	/* These might/will be called before VMMR3Init. */
1953	case VMMR0_DO_GMM_INITIAL_RESERVATION:
1954	case VMMR0_DO_GMM_UPDATE_RESERVATION:
1955	case VMMR0_DO_GMM_ALLOCATE_PAGES:
1956	case VMMR0_DO_GMM_FREE_PAGES:
1957	case VMMR0_DO_GMM_BALLOONED_PAGES:
1958	/* On the mac we might not have a valid jmp buf, so check these as well. */
1959	case VMMR0_DO_VMMR0_INIT:
1960	case VMMR0_DO_VMMR0_TERM:
1961	{
1962	PVMCPU pVCpu = &pVM->aCpus[idCpu];
1963
1964	if (!pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack)
1965	break;
1966
1967	/** @todo validate this EMT claim... GVM knows. */
1968	VMMR0ENTRYEXARGS Args;
1969	Args.pVM = pVM;
1970	Args.idCpu = idCpu;
1971	Args.enmOperation = enmOperation;
1972	Args.pReq = pReq;
1973	Args.u64Arg = u64Arg;
1974	Args.pSession = pSession;
1975	return vmmR0CallRing3SetJmpEx(&pVCpu->vmm.s.CallRing3JmpBufR0, vmmR0EntryExWrapper, &Args);
1976	}
1977
1978	default:
1979	break;
1980	}
1981	}
1982	return vmmR0EntryExWorker(pVM, idCpu, enmOperation, pReq, u64Arg, pSession);
1983	}
1984
1985
1986	/**
1987	* Checks whether we've armed the ring-0 long jump machinery.
1988	*
1989	* @returns @c true / @c false
1990	* @param pVCpu The cross context virtual CPU structure.
1991	* @thread EMT
1992	* @sa VMMIsLongJumpArmed
1993	*/
1994	VMMR0_INT_DECL(bool) VMMR0IsLongJumpArmed(PVMCPU pVCpu)
1995	{
1996	#ifdef RT_ARCH_X86
1997	return pVCpu->vmm.s.CallRing3JmpBufR0.eip
1998	&& !pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call;
1999	#else
2000	return pVCpu->vmm.s.CallRing3JmpBufR0.rip
2001	&& !pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call;
2002	#endif
2003	}
2004
2005
2006	/**
2007	* Checks whether we've done a ring-3 long jump.
2008	*
2009	* @returns @c true / @c false
2010	* @param pVCpu The cross context virtual CPU structure.
2011	* @thread EMT
2012	*/
2013	VMMR0_INT_DECL(bool) VMMR0IsInRing3LongJump(PVMCPU pVCpu)
2014	{
2015	return pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call;
2016	}
2017
2018
2019	/**
2020	* Internal R0 logger worker: Flush logger.
2021	*
2022	* @param pLogger The logger instance to flush.
2023	* @remark This function must be exported!
2024	*/
2025	VMMR0DECL(void) vmmR0LoggerFlush(PRTLOGGER pLogger)
2026	{
2027	#ifdef LOG_ENABLED
2028	/*
2029	* Convert the pLogger into a VM handle and 'call' back to Ring-3.
2030	* (This is a bit paranoid code.)
2031	*/
2032	PVMMR0LOGGER pR0Logger = (PVMMR0LOGGER)((uintptr_t)pLogger - RT_OFFSETOF(VMMR0LOGGER, Logger));
2033	if ( !VALID_PTR(pR0Logger)
2034	\|\| !VALID_PTR(pR0Logger + 1)
2035	\|\| pLogger->u32Magic != RTLOGGER_MAGIC)
2036	{
2037	# ifdef DEBUG
2038	SUPR0Printf("vmmR0LoggerFlush: pLogger=%p!\n", pLogger);
2039	# endif
2040	return;
2041	}
2042	if (pR0Logger->fFlushingDisabled)
2043	return; /* quietly */
2044
2045	PVM pVM = pR0Logger->pVM;
2046	if ( !VALID_PTR(pVM)
2047	\|\| pVM->pVMR0 != pVM)
2048	{
2049	# ifdef DEBUG
2050	SUPR0Printf("vmmR0LoggerFlush: pVM=%p! pVMR0=%p! pLogger=%p\n", pVM, pVM->pVMR0, pLogger);
2051	# endif
2052	return;
2053	}
2054
2055	PVMCPU pVCpu = VMMGetCpu(pVM);
2056	if (pVCpu)
2057	{
2058	/*
2059	* Check that the jump buffer is armed.
2060	*/
2061	# ifdef RT_ARCH_X86
2062	if ( !pVCpu->vmm.s.CallRing3JmpBufR0.eip
2063	\|\| pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call)
2064	# else
2065	if ( !pVCpu->vmm.s.CallRing3JmpBufR0.rip
2066	\|\| pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call)
2067	# endif
2068	{
2069	# ifdef DEBUG
2070	SUPR0Printf("vmmR0LoggerFlush: Jump buffer isn't armed!\n");
2071	# endif
2072	return;
2073	}
2074	VMMRZCallRing3(pVM, pVCpu, VMMCALLRING3_VMM_LOGGER_FLUSH, 0);
2075	}
2076	# ifdef DEBUG
2077	else
2078	SUPR0Printf("vmmR0LoggerFlush: invalid VCPU context!\n");
2079	# endif
2080	#else
2081	NOREF(pLogger);
2082	#endif /* LOG_ENABLED */
2083	}
2084
2085	/**
2086	* Internal R0 logger worker: Custom prefix.
2087	*
2088	* @returns Number of chars written.
2089	*
2090	* @param pLogger The logger instance.
2091	* @param pchBuf The output buffer.
2092	* @param cchBuf The size of the buffer.
2093	* @param pvUser User argument (ignored).
2094	*/
2095	VMMR0DECL(size_t) vmmR0LoggerPrefix(PRTLOGGER pLogger, char pchBuf, size_t cchBuf, void pvUser)
2096	{
2097	NOREF(pvUser);
2098	#ifdef LOG_ENABLED
2099	PVMMR0LOGGER pR0Logger = (PVMMR0LOGGER)((uintptr_t)pLogger - RT_OFFSETOF(VMMR0LOGGER, Logger));
2100	if ( !VALID_PTR(pR0Logger)
2101	\|\| !VALID_PTR(pR0Logger + 1)
2102	\|\| pLogger->u32Magic != RTLOGGER_MAGIC
2103	\|\| cchBuf < 2)
2104	return 0;
2105
2106	static const char s_szHex[17] = "0123456789abcdef";
2107	VMCPUID const idCpu = pR0Logger->idCpu;
2108	pchBuf[1] = s_szHex[ idCpu & 15];
2109	pchBuf[0] = s_szHex[(idCpu >> 4) & 15];
2110
2111	return 2;
2112	#else
2113	NOREF(pLogger); NOREF(pchBuf); NOREF(cchBuf);
2114	return 0;
2115	#endif
2116	}
2117
2118	#ifdef LOG_ENABLED
2119
2120	/**
2121	* Disables flushing of the ring-0 debug log.
2122	*
2123	* @param pVCpu The cross context virtual CPU structure.
2124	*/
2125	VMMR0_INT_DECL(void) VMMR0LogFlushDisable(PVMCPU pVCpu)
2126	{
2127	if (pVCpu->vmm.s.pR0LoggerR0)
2128	pVCpu->vmm.s.pR0LoggerR0->fFlushingDisabled = true;
2129	}
2130
2131
2132	/**
2133	* Enables flushing of the ring-0 debug log.
2134	*
2135	* @param pVCpu The cross context virtual CPU structure.
2136	*/
2137	VMMR0_INT_DECL(void) VMMR0LogFlushEnable(PVMCPU pVCpu)
2138	{
2139	if (pVCpu->vmm.s.pR0LoggerR0)
2140	pVCpu->vmm.s.pR0LoggerR0->fFlushingDisabled = false;
2141	}
2142
2143
2144	/**
2145	* Checks if log flushing is disabled or not.
2146	*
2147	* @param pVCpu The cross context virtual CPU structure.
2148	*/
2149	VMMR0_INT_DECL(bool) VMMR0IsLogFlushDisabled(PVMCPU pVCpu)
2150	{
2151	if (pVCpu->vmm.s.pR0LoggerR0)
2152	return pVCpu->vmm.s.pR0LoggerR0->fFlushingDisabled;
2153	return true;
2154	}
2155	#endif /* LOG_ENABLED */
2156
2157	/**
2158	* Jump back to ring-3 if we're the EMT and the longjmp is armed.
2159	*
2160	* @returns true if the breakpoint should be hit, false if it should be ignored.
2161	*/
2162	DECLEXPORT(bool) RTCALL RTAssertShouldPanic(void)
2163	{
2164	#if 0
2165	return true;
2166	#else
2167	PVM pVM = GVMMR0GetVMByEMT(NIL_RTNATIVETHREAD);
2168	if (pVM)
2169	{
2170	PVMCPU pVCpu = VMMGetCpu(pVM);
2171
2172	if (pVCpu)
2173	{
2174	#ifdef RT_ARCH_X86
2175	if ( pVCpu->vmm.s.CallRing3JmpBufR0.eip
2176	&& !pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call)
2177	#else
2178	if ( pVCpu->vmm.s.CallRing3JmpBufR0.rip
2179	&& !pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call)
2180	#endif
2181	{
2182	int rc = VMMRZCallRing3(pVM, pVCpu, VMMCALLRING3_VM_R0_ASSERTION, 0);
2183	return RT_FAILURE_NP(rc);
2184	}
2185	}
2186	}
2187	#ifdef RT_OS_LINUX
2188	return true;
2189	#else
2190	return false;
2191	#endif
2192	#endif
2193	}
2194
2195
2196	/**
2197	* Override this so we can push it up to ring-3.
2198	*
2199	* @param pszExpr Expression. Can be NULL.
2200	* @param uLine Location line number.
2201	* @param pszFile Location file name.
2202	* @param pszFunction Location function name.
2203	*/
2204	DECLEXPORT(void) RTCALL RTAssertMsg1Weak(const char pszExpr, unsigned uLine, const char pszFile, const char *pszFunction)
2205	{
2206	/*
2207	* To the log.
2208	*/
2209	LogAlways(("\n!!R0-Assertion Failed!!\n"
2210	"Expression: %s\n"
2211	"Location : %s(%d) %s\n",
2212	pszExpr, pszFile, uLine, pszFunction));
2213
2214	/*
2215	* To the global VMM buffer.
2216	*/
2217	PVM pVM = GVMMR0GetVMByEMT(NIL_RTNATIVETHREAD);
2218	if (pVM)
2219	RTStrPrintf(pVM->vmm.s.szRing0AssertMsg1, sizeof(pVM->vmm.s.szRing0AssertMsg1),
2220	"\n!!R0-Assertion Failed!!\n"
2221	"Expression: %s\n"
2222	"Location : %s(%d) %s\n",
2223	pszExpr, pszFile, uLine, pszFunction);
2224
2225	/*
2226	* Continue the normal way.
2227	*/
2228	RTAssertMsg1(pszExpr, uLine, pszFile, pszFunction);
2229	}
2230
2231
2232	/**
2233	* Callback for RTLogFormatV which writes to the ring-3 log port.
2234	* See PFNLOGOUTPUT() for details.
2235	*/
2236	static DECLCALLBACK(size_t) rtLogOutput(void pv, const char pachChars, size_t cbChars)
2237	{
2238	for (size_t i = 0; i < cbChars; i++)
2239	{
2240	LogAlways(("%c", pachChars[i])); NOREF(pachChars);
2241	}
2242
2243	NOREF(pv);
2244	return cbChars;
2245	}
2246
2247
2248	/**
2249	* Override this so we can push it up to ring-3.
2250	*
2251	* @param pszFormat The format string.
2252	* @param va Arguments.
2253	*/
2254	DECLEXPORT(void) RTCALL RTAssertMsg2WeakV(const char *pszFormat, va_list va)
2255	{
2256	va_list vaCopy;
2257
2258	/*
2259	* Push the message to the loggers.
2260	*/
2261	PRTLOGGER pLog = RTLogGetDefaultInstance(); /* Don't initialize it here... */
2262	if (pLog)
2263	{
2264	va_copy(vaCopy, va);
2265	RTLogFormatV(rtLogOutput, pLog, pszFormat, vaCopy);
2266	va_end(vaCopy);
2267	}
2268	pLog = RTLogRelGetDefaultInstance();
2269	if (pLog)
2270	{
2271	va_copy(vaCopy, va);
2272	RTLogFormatV(rtLogOutput, pLog, pszFormat, vaCopy);
2273	va_end(vaCopy);
2274	}
2275
2276	/*
2277	* Push it to the global VMM buffer.
2278	*/
2279	PVM pVM = GVMMR0GetVMByEMT(NIL_RTNATIVETHREAD);
2280	if (pVM)
2281	{
2282	va_copy(vaCopy, va);
2283	RTStrPrintfV(pVM->vmm.s.szRing0AssertMsg2, sizeof(pVM->vmm.s.szRing0AssertMsg2), pszFormat, vaCopy);
2284	va_end(vaCopy);
2285	}
2286
2287	/*
2288	* Continue the normal way.
2289	*/
2290	RTAssertMsg2V(pszFormat, va);
2291	}
2292

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source: vbox/trunk/src/VBox/VMM/VMMR0/VMMR0.cpp@ 58591

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