CSAM.cpp@ 39944

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1	/* $Id: CSAM.cpp 39078 2011-10-21 14:18:22Z vboxsync $ */
2	/** @file
3	* CSAM - Guest OS Code Scanning and Analysis Manager
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	/*******************************************************************************
19	* Header Files *
20	*******************************************************************************/
21	#define LOG_GROUP LOG_GROUP_CSAM
22	#include <VBox/vmm/cpum.h>
23	#include <VBox/vmm/stam.h>
24	#include <VBox/vmm/patm.h>
25	#include <VBox/vmm/csam.h>
26	#include <VBox/vmm/cpumdis.h>
27	#include <VBox/vmm/pgm.h>
28	#include <VBox/vmm/iom.h>
29	#include <VBox/sup.h>
30	#include <VBox/vmm/mm.h>
31	#include <VBox/vmm/em.h>
32	#include <VBox/vmm/rem.h>
33	#include <VBox/vmm/selm.h>
34	#include <VBox/vmm/trpm.h>
35	#include <VBox/vmm/cfgm.h>
36	#include <VBox/param.h>
37	#include <iprt/avl.h>
38	#include <iprt/asm.h>
39	#include <iprt/thread.h>
40	#include "CSAMInternal.h"
41	#include <VBox/vmm/vm.h>
42	#include <VBox/dbg.h>
43	#include <VBox/err.h>
44	#include <VBox/vmm/ssm.h>
45	#include <VBox/log.h>
46	#include <iprt/assert.h>
47	#include <iprt/string.h>
48	#include <VBox/dis.h>
49	#include <VBox/disopcode.h>
50	#include "internal/pgm.h"
51
52
53	/* Enabled by default */
54	#define CSAM_ENABLE
55
56	/* Enable to monitor code pages for self-modifying code. */
57	#define CSAM_MONITOR_CODE_PAGES
58	/* Enable to monitor all scanned pages
59	#define CSAM_MONITOR_CSAM_CODE_PAGES */
60	/* Enable to scan beyond ret instructions.
61	#define CSAM_ANALYSE_BEYOND_RET */
62
63	/*******************************************************************************
64	* Internal Functions *
65	*******************************************************************************/
66	static DECLCALLBACK(int) csamr3Save(PVM pVM, PSSMHANDLE pSSM);
67	static DECLCALLBACK(int) csamr3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
68	static DECLCALLBACK(int) CSAMCodePageWriteHandler(PVM pVM, RTGCPTR GCPtr, void pvPtr, void pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
69	static DECLCALLBACK(int) CSAMCodePageInvalidate(PVM pVM, RTGCPTR GCPtr);
70
71	bool csamIsCodeScanned(PVM pVM, RTRCPTR pInstr, PCSAMPAGE *pPage);
72	int csamR3CheckPageRecord(PVM pVM, RTRCPTR pInstr);
73	static PCSAMPAGE csamCreatePageRecord(PVM pVM, RTRCPTR GCPtr, CSAMTAG enmTag, bool fCode32, bool fMonitorInvalidation = false);
74	static int csamRemovePageRecord(PVM pVM, RTRCPTR GCPtr);
75	static int csamReinit(PVM pVM);
76	static void csamMarkCode(PVM pVM, PCSAMPAGE pPage, RTRCPTR pInstr, uint32_t opsize, bool fScanned);
77	static int csamAnalyseCodeStream(PVM pVM, RCPTRTYPE(uint8_t ) pInstrGC, RCPTRTYPE(uint8_t ) pCurInstrGC, bool fCode32,
78	PFN_CSAMR3ANALYSE pfnCSAMR3Analyse, void *pUserData, PCSAMP2GLOOKUPREC pCacheRec);
79
80	/** @todo Temporary for debugging. */
81	static bool fInCSAMCodePageInvalidate = false;
82
83	/*******************************************************************************
84	* Global Variables *
85	*******************************************************************************/
86	#ifdef VBOX_WITH_DEBUGGER
87	static DECLCALLBACK(int) csamr3CmdOn(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PVM pVM, PCDBGCVAR paArgs, unsigned cArgs);
88	static DECLCALLBACK(int) csamr3CmdOff(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PVM pVM, PCDBGCVAR paArgs, unsigned cArgs);
89
90	/** Command descriptors. */
91	static const DBGCCMD g_aCmds[] =
92	{
93	/* pszCmd, cArgsMin, cArgsMax, paArgDesc, cArgDescs, fFlags, pfnHandler pszSyntax, ....pszDescription */
94	{ "csamon", 0, 0, NULL, 0, 0, csamr3CmdOn, "", "Enable CSAM code scanning." },
95	{ "csamoff", 0, 0, NULL, 0, 0, csamr3CmdOff, "", "Disable CSAM code scanning." },
96	};
97	#endif
98
99	/**
100	* SSM descriptor table for the CSAM structure.
101	*/
102	static const SSMFIELD g_aCsamFields[] =
103	{
104	/** @todo there are more fields that can be ignored here. */
105	SSMFIELD_ENTRY_IGNORE( CSAM, offVM),
106	SSMFIELD_ENTRY_PAD_HC64( CSAM, Alignment0, sizeof(uint32_t)),
107	SSMFIELD_ENTRY_IGN_HCPTR( CSAM, pPageTree),
108	SSMFIELD_ENTRY( CSAM, aDangerousInstr),
109	SSMFIELD_ENTRY( CSAM, cDangerousInstr),
110	SSMFIELD_ENTRY( CSAM, iDangerousInstr),
111	SSMFIELD_ENTRY_RCPTR( CSAM, pPDBitmapGC), /// @todo ignore this?
112	SSMFIELD_ENTRY_RCPTR( CSAM, pPDHCBitmapGC), /// @todo ignore this?
113	SSMFIELD_ENTRY_IGN_HCPTR( CSAM, pPDBitmapHC),
114	SSMFIELD_ENTRY_IGN_HCPTR( CSAM, pPDGCBitmapHC),
115	SSMFIELD_ENTRY_IGN_HCPTR( CSAM, savedstate.pSSM),
116	SSMFIELD_ENTRY( CSAM, savedstate.cPageRecords),
117	SSMFIELD_ENTRY( CSAM, savedstate.cPatchPageRecords),
118	SSMFIELD_ENTRY( CSAM, cDirtyPages),
119	SSMFIELD_ENTRY_RCPTR_ARRAY( CSAM, pvDirtyBasePage),
120	SSMFIELD_ENTRY_RCPTR_ARRAY( CSAM, pvDirtyFaultPage),
121	SSMFIELD_ENTRY( CSAM, cPossibleCodePages),
122	SSMFIELD_ENTRY_RCPTR_ARRAY( CSAM, pvPossibleCodePage),
123	SSMFIELD_ENTRY_RCPTR_ARRAY( CSAM, pvCallInstruction),
124	SSMFIELD_ENTRY( CSAM, iCallInstruction),
125	SSMFIELD_ENTRY( CSAM, fScanningStarted),
126	SSMFIELD_ENTRY( CSAM, fGatesChecked),
127	SSMFIELD_ENTRY_PAD_HC( CSAM, Alignment1, 6, 2),
128	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrTraps),
129	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrPages),
130	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrPagesInv),
131	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrRemovedPages),
132	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrPatchPages),
133	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrPageNPHC),
134	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrPageNPGC),
135	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrFlushes),
136	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrFlushesSkipped),
137	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrKnownPagesHC),
138	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrKnownPagesGC),
139	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrInstr),
140	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrBytesRead),
141	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrOpcodeRead),
142	SSMFIELD_ENTRY_IGNORE( CSAM, StatTime),
143	SSMFIELD_ENTRY_IGNORE( CSAM, StatTimeCheckAddr),
144	SSMFIELD_ENTRY_IGNORE( CSAM, StatTimeAddrConv),
145	SSMFIELD_ENTRY_IGNORE( CSAM, StatTimeFlushPage),
146	SSMFIELD_ENTRY_IGNORE( CSAM, StatTimeDisasm),
147	SSMFIELD_ENTRY_IGNORE( CSAM, StatFlushDirtyPages),
148	SSMFIELD_ENTRY_IGNORE( CSAM, StatCheckGates),
149	SSMFIELD_ENTRY_IGNORE( CSAM, StatCodePageModified),
150	SSMFIELD_ENTRY_IGNORE( CSAM, StatDangerousWrite),
151	SSMFIELD_ENTRY_IGNORE( CSAM, StatInstrCacheHit),
152	SSMFIELD_ENTRY_IGNORE( CSAM, StatInstrCacheMiss),
153	SSMFIELD_ENTRY_IGNORE( CSAM, StatPagePATM),
154	SSMFIELD_ENTRY_IGNORE( CSAM, StatPageCSAM),
155	SSMFIELD_ENTRY_IGNORE( CSAM, StatPageREM),
156	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrUserPages),
157	SSMFIELD_ENTRY_IGNORE( CSAM, StatPageMonitor),
158	SSMFIELD_ENTRY_IGNORE( CSAM, StatPageRemoveREMFlush),
159	SSMFIELD_ENTRY_IGNORE( CSAM, StatBitmapAlloc),
160	SSMFIELD_ENTRY_IGNORE( CSAM, StatScanNextFunction),
161	SSMFIELD_ENTRY_IGNORE( CSAM, StatScanNextFunctionFailed),
162	SSMFIELD_ENTRY_TERM()
163	};
164
165	/** Fake type to simplify g_aCsamPDBitmapArray construction. */
166	typedef struct
167	{
168	uint8_t *a[CSAM_PGDIRBMP_CHUNKS];
169	} CSAMPDBITMAPARRAY;
170
171	/**
172	* SSM descriptor table for the CSAM::pPDBitmapHC array.
173	*/
174	static SSMFIELD const g_aCsamPDBitmapArray[] =
175	{
176	SSMFIELD_ENTRY_HCPTR_NI_ARRAY(CSAMPDBITMAPARRAY, a),
177	SSMFIELD_ENTRY_TERM()
178	};
179
180	/**
181	* SSM descriptor table for the CSAMPAGEREC structure.
182	*/
183	static const SSMFIELD g_aCsamPageRecFields[] =
184	{
185	SSMFIELD_ENTRY_IGN_HCPTR( CSAMPAGEREC, Core.Key),
186	SSMFIELD_ENTRY_IGN_HCPTR( CSAMPAGEREC, Core.pLeft),
187	SSMFIELD_ENTRY_IGN_HCPTR( CSAMPAGEREC, Core.pRight),
188	SSMFIELD_ENTRY_IGNORE( CSAMPAGEREC, Core.uchHeight),
189	SSMFIELD_ENTRY_PAD_HC_AUTO( 3, 7),
190	SSMFIELD_ENTRY_RCPTR( CSAMPAGEREC, page.pPageGC),
191	SSMFIELD_ENTRY_PAD_HC_AUTO( 0, 4),
192	SSMFIELD_ENTRY_PAD_MSC32_AUTO( 4),
193	SSMFIELD_ENTRY_GCPHYS( CSAMPAGEREC, page.GCPhys),
194	SSMFIELD_ENTRY( CSAMPAGEREC, page.fFlags),
195	SSMFIELD_ENTRY( CSAMPAGEREC, page.uSize),
196	SSMFIELD_ENTRY_PAD_HC_AUTO( 0, 4),
197	SSMFIELD_ENTRY_HCPTR_NI( CSAMPAGEREC, page.pBitmap),
198	SSMFIELD_ENTRY( CSAMPAGEREC, page.fCode32),
199	SSMFIELD_ENTRY( CSAMPAGEREC, page.fMonitorActive),
200	SSMFIELD_ENTRY( CSAMPAGEREC, page.fMonitorInvalidation),
201	SSMFIELD_ENTRY_PAD_HC_AUTO( 1, 1),
202	SSMFIELD_ENTRY( CSAMPAGEREC, page.enmTag),
203	SSMFIELD_ENTRY( CSAMPAGEREC, page.u64Hash),
204	SSMFIELD_ENTRY_TERM()
205	};
206
207
208	/**
209	* Initializes the CSAM.
210	*
211	* @returns VBox status code.
212	* @param pVM The VM to operate on.
213	*/
214	VMMR3DECL(int) CSAMR3Init(PVM pVM)
215	{
216	int rc;
217
218	LogFlow(("CSAMR3Init\n"));
219
220	/* Allocate bitmap for the page directory. */
221	rc = MMR3HyperAllocOnceNoRel(pVM, CSAM_PGDIRBMP_CHUNKSsizeof(RTHCPTR), 0, MM_TAG_CSAM, (void *)&pVM->csam.s.pPDBitmapHC);
222	AssertRCReturn(rc, rc);
223	rc = MMR3HyperAllocOnceNoRel(pVM, CSAM_PGDIRBMP_CHUNKSsizeof(RTRCPTR), 0, MM_TAG_CSAM, (void *)&pVM->csam.s.pPDGCBitmapHC);
224	AssertRCReturn(rc, rc);
225	pVM->csam.s.pPDBitmapGC = MMHyperR3ToRC(pVM, pVM->csam.s.pPDGCBitmapHC);
226	pVM->csam.s.pPDHCBitmapGC = MMHyperR3ToRC(pVM, pVM->csam.s.pPDBitmapHC);
227
228	rc = csamReinit(pVM);
229	AssertRCReturn(rc, rc);
230
231	/*
232	* Register save and load state notifiers.
233	*/
234	rc = SSMR3RegisterInternal(pVM, "CSAM", 0, CSAM_SSM_VERSION, sizeof(pVM->csam.s) + PAGE_SIZE*16,
235	NULL, NULL, NULL,
236	NULL, csamr3Save, NULL,
237	NULL, csamr3Load, NULL);
238	AssertRCReturn(rc, rc);
239
240	STAM_REG(pVM, &pVM->csam.s.StatNrTraps, STAMTYPE_COUNTER, "/CSAM/PageTraps", STAMUNIT_OCCURENCES, "The number of CSAM page traps.");
241	STAM_REG(pVM, &pVM->csam.s.StatDangerousWrite, STAMTYPE_COUNTER, "/CSAM/DangerousWrites", STAMUNIT_OCCURENCES, "The number of dangerous writes that cause a context switch.");
242
243	STAM_REG(pVM, &pVM->csam.s.StatNrPageNPHC, STAMTYPE_COUNTER, "/CSAM/HC/PageNotPresent", STAMUNIT_OCCURENCES, "The number of CSAM pages marked not present.");
244	STAM_REG(pVM, &pVM->csam.s.StatNrPageNPGC, STAMTYPE_COUNTER, "/CSAM/GC/PageNotPresent", STAMUNIT_OCCURENCES, "The number of CSAM pages marked not present.");
245	STAM_REG(pVM, &pVM->csam.s.StatNrPages, STAMTYPE_COUNTER, "/CSAM/PageRec/AddedRW", STAMUNIT_OCCURENCES, "The number of CSAM page records (RW monitoring).");
246	STAM_REG(pVM, &pVM->csam.s.StatNrPagesInv, STAMTYPE_COUNTER, "/CSAM/PageRec/AddedRWI", STAMUNIT_OCCURENCES, "The number of CSAM page records (RW & invalidation monitoring).");
247	STAM_REG(pVM, &pVM->csam.s.StatNrRemovedPages, STAMTYPE_COUNTER, "/CSAM/PageRec/Removed", STAMUNIT_OCCURENCES, "The number of removed CSAM page records.");
248	STAM_REG(pVM, &pVM->csam.s.StatPageRemoveREMFlush,STAMTYPE_COUNTER, "/CSAM/PageRec/Removed/REMFlush", STAMUNIT_OCCURENCES, "The number of removed CSAM page records that caused a REM flush.");
249
250	STAM_REG(pVM, &pVM->csam.s.StatNrPatchPages, STAMTYPE_COUNTER, "/CSAM/PageRec/Patch", STAMUNIT_OCCURENCES, "The number of CSAM patch page records.");
251	STAM_REG(pVM, &pVM->csam.s.StatNrUserPages, STAMTYPE_COUNTER, "/CSAM/PageRec/Ignore/User", STAMUNIT_OCCURENCES, "The number of CSAM user page records (ignored).");
252	STAM_REG(pVM, &pVM->csam.s.StatPagePATM, STAMTYPE_COUNTER, "/CSAM/PageRec/Type/PATM", STAMUNIT_OCCURENCES, "The number of PATM page records.");
253	STAM_REG(pVM, &pVM->csam.s.StatPageCSAM, STAMTYPE_COUNTER, "/CSAM/PageRec/Type/CSAM", STAMUNIT_OCCURENCES, "The number of CSAM page records.");
254	STAM_REG(pVM, &pVM->csam.s.StatPageREM, STAMTYPE_COUNTER, "/CSAM/PageRec/Type/REM", STAMUNIT_OCCURENCES, "The number of REM page records.");
255	STAM_REG(pVM, &pVM->csam.s.StatPageMonitor, STAMTYPE_COUNTER, "/CSAM/PageRec/Monitored", STAMUNIT_OCCURENCES, "The number of monitored pages.");
256
257	STAM_REG(pVM, &pVM->csam.s.StatCodePageModified, STAMTYPE_COUNTER, "/CSAM/Monitor/DirtyPage", STAMUNIT_OCCURENCES, "The number of code page modifications.");
258
259	STAM_REG(pVM, &pVM->csam.s.StatNrFlushes, STAMTYPE_COUNTER, "/CSAM/PageFlushes", STAMUNIT_OCCURENCES, "The number of CSAM page flushes.");
260	STAM_REG(pVM, &pVM->csam.s.StatNrFlushesSkipped, STAMTYPE_COUNTER, "/CSAM/PageFlushesSkipped", STAMUNIT_OCCURENCES, "The number of CSAM page flushes that were skipped.");
261	STAM_REG(pVM, &pVM->csam.s.StatNrKnownPagesHC, STAMTYPE_COUNTER, "/CSAM/HC/KnownPageRecords", STAMUNIT_OCCURENCES, "The number of known CSAM page records.");
262	STAM_REG(pVM, &pVM->csam.s.StatNrKnownPagesGC, STAMTYPE_COUNTER, "/CSAM/GC/KnownPageRecords", STAMUNIT_OCCURENCES, "The number of known CSAM page records.");
263	STAM_REG(pVM, &pVM->csam.s.StatNrInstr, STAMTYPE_COUNTER, "/CSAM/ScannedInstr", STAMUNIT_OCCURENCES, "The number of scanned instructions.");
264	STAM_REG(pVM, &pVM->csam.s.StatNrBytesRead, STAMTYPE_COUNTER, "/CSAM/BytesRead", STAMUNIT_OCCURENCES, "The number of bytes read for scanning.");
265	STAM_REG(pVM, &pVM->csam.s.StatNrOpcodeRead, STAMTYPE_COUNTER, "/CSAM/OpcodeBytesRead", STAMUNIT_OCCURENCES, "The number of opcode bytes read by the recompiler.");
266
267	STAM_REG(pVM, &pVM->csam.s.StatBitmapAlloc, STAMTYPE_COUNTER, "/CSAM/Alloc/PageBitmap", STAMUNIT_OCCURENCES, "The number of page bitmap allocations.");
268
269	STAM_REG(pVM, &pVM->csam.s.StatInstrCacheHit, STAMTYPE_COUNTER, "/CSAM/Cache/Hit", STAMUNIT_OCCURENCES, "The number of dangerous instruction cache hits.");
270	STAM_REG(pVM, &pVM->csam.s.StatInstrCacheMiss, STAMTYPE_COUNTER, "/CSAM/Cache/Miss", STAMUNIT_OCCURENCES, "The number of dangerous instruction cache misses.");
271
272	STAM_REG(pVM, &pVM->csam.s.StatScanNextFunction, STAMTYPE_COUNTER, "/CSAM/Function/Scan/Success", STAMUNIT_OCCURENCES, "The number of found functions beyond the ret border.");
273	STAM_REG(pVM, &pVM->csam.s.StatScanNextFunctionFailed, STAMTYPE_COUNTER, "/CSAM/Function/Scan/Failed", STAMUNIT_OCCURENCES, "The number of refused functions beyond the ret border.");
274
275	STAM_REG(pVM, &pVM->csam.s.StatTime, STAMTYPE_PROFILE, "/PROF/CSAM/Scan", STAMUNIT_TICKS_PER_CALL, "Scanning overhead.");
276	STAM_REG(pVM, &pVM->csam.s.StatTimeCheckAddr, STAMTYPE_PROFILE, "/PROF/CSAM/CheckAddr", STAMUNIT_TICKS_PER_CALL, "Address check overhead.");
277	STAM_REG(pVM, &pVM->csam.s.StatTimeAddrConv, STAMTYPE_PROFILE, "/PROF/CSAM/AddrConv", STAMUNIT_TICKS_PER_CALL, "Address conversion overhead.");
278	STAM_REG(pVM, &pVM->csam.s.StatTimeFlushPage, STAMTYPE_PROFILE, "/PROF/CSAM/FlushPage", STAMUNIT_TICKS_PER_CALL, "Page flushing overhead.");
279	STAM_REG(pVM, &pVM->csam.s.StatTimeDisasm, STAMTYPE_PROFILE, "/PROF/CSAM/Disasm", STAMUNIT_TICKS_PER_CALL, "Disassembly overhead.");
280	STAM_REG(pVM, &pVM->csam.s.StatFlushDirtyPages, STAMTYPE_PROFILE, "/PROF/CSAM/FlushDirtyPage", STAMUNIT_TICKS_PER_CALL, "Dirty page flushing overhead.");
281	STAM_REG(pVM, &pVM->csam.s.StatCheckGates, STAMTYPE_PROFILE, "/PROF/CSAM/CheckGates", STAMUNIT_TICKS_PER_CALL, "CSAMR3CheckGates overhead.");
282
283	/*
284	* Check CFGM option and enable/disable CSAM.
285	*/
286	bool fEnabled;
287	rc = CFGMR3QueryBool(CFGMR3GetRoot(pVM), "CSAMEnabled", &fEnabled);
288	if (RT_FAILURE(rc))
289	#ifdef CSAM_ENABLE
290	fEnabled = true;
291	#else
292	fEnabled = false;
293	#endif
294	if (fEnabled)
295	CSAMEnableScanning(pVM);
296
297	#ifdef VBOX_WITH_DEBUGGER
298	/*
299	* Debugger commands.
300	*/
301	static bool fRegisteredCmds = false;
302	if (!fRegisteredCmds)
303	{
304	rc = DBGCRegisterCommands(&g_aCmds[0], RT_ELEMENTS(g_aCmds));
305	if (RT_SUCCESS(rc))
306	fRegisteredCmds = true;
307	}
308	#endif
309
310	return VINF_SUCCESS;
311	}
312
313	/**
314	* (Re)initializes CSAM
315	*
316	* @param pVM The VM.
317	*/
318	static int csamReinit(PVM pVM)
319	{
320	/*
321	* Assert alignment and sizes.
322	*/
323	AssertRelease(!(RT_OFFSETOF(VM, csam.s) & 31));
324	AssertRelease(sizeof(pVM->csam.s) <= sizeof(pVM->csam.padding));
325
326	/*
327	* Setup any fixed pointers and offsets.
328	*/
329	pVM->csam.s.offVM = RT_OFFSETOF(VM, patm);
330
331	pVM->csam.s.fGatesChecked = false;
332	pVM->csam.s.fScanningStarted = false;
333
334	PVMCPU pVCpu = &pVM->aCpus[0]; /* raw mode implies 1 VPCU */
335	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_CSAM_PENDING_ACTION);
336	pVM->csam.s.cDirtyPages = 0;
337	/* not necessary */
338	memset(pVM->csam.s.pvDirtyBasePage, 0, sizeof(pVM->csam.s.pvDirtyBasePage));
339	memset(pVM->csam.s.pvDirtyFaultPage, 0, sizeof(pVM->csam.s.pvDirtyFaultPage));
340
341	memset(&pVM->csam.s.aDangerousInstr, 0, sizeof(pVM->csam.s.aDangerousInstr));
342	pVM->csam.s.cDangerousInstr = 0;
343	pVM->csam.s.iDangerousInstr = 0;
344
345	memset(pVM->csam.s.pvCallInstruction, 0, sizeof(pVM->csam.s.pvCallInstruction));
346	pVM->csam.s.iCallInstruction = 0;
347
348	/** @note never mess with the pgdir bitmap here! */
349	return VINF_SUCCESS;
350	}
351
352	/**
353	* Applies relocations to data and code managed by this
354	* component. This function will be called at init and
355	* whenever the VMM need to relocate itself inside the GC.
356	*
357	* The csam will update the addresses used by the switcher.
358	*
359	* @param pVM The VM.
360	* @param offDelta Relocation delta.
361	*/
362	VMMR3DECL(void) CSAMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
363	{
364	if (offDelta)
365	{
366	/* Adjust pgdir and page bitmap pointers. */
367	pVM->csam.s.pPDBitmapGC = MMHyperR3ToRC(pVM, pVM->csam.s.pPDGCBitmapHC);
368	pVM->csam.s.pPDHCBitmapGC = MMHyperR3ToRC(pVM, pVM->csam.s.pPDBitmapHC);
369
370	for(int i=0;i<CSAM_PGDIRBMP_CHUNKS;i++)
371	{
372	if (pVM->csam.s.pPDGCBitmapHC[i])
373	{
374	pVM->csam.s.pPDGCBitmapHC[i] += offDelta;
375	}
376	}
377	}
378	return;
379	}
380
381	/**
382	* Terminates the csam.
383	*
384	* Termination means cleaning up and freeing all resources,
385	* the VM it self is at this point powered off or suspended.
386	*
387	* @returns VBox status code.
388	* @param pVM The VM to operate on.
389	*/
390	VMMR3DECL(int) CSAMR3Term(PVM pVM)
391	{
392	int rc;
393
394	rc = CSAMR3Reset(pVM);
395	AssertRC(rc);
396
397	/* @todo triggers assertion in MMHyperFree */
398	#if 0
399	for(int i=0;i<CSAM_PAGEBMP_CHUNKS;i++)
400	{
401	if (pVM->csam.s.pPDBitmapHC[i])
402	MMHyperFree(pVM, pVM->csam.s.pPDBitmapHC[i]);
403	}
404	#endif
405
406	return VINF_SUCCESS;
407	}
408
409	/**
410	* CSAM reset callback.
411	*
412	* @returns VBox status code.
413	* @param pVM The VM which is reset.
414	*/
415	VMMR3DECL(int) CSAMR3Reset(PVM pVM)
416	{
417	/* Clear page bitmaps. */
418	for(int i=0;i<CSAM_PGDIRBMP_CHUNKS;i++)
419	{
420	if (pVM->csam.s.pPDBitmapHC[i])
421	{
422	Assert((CSAM_PAGE_BITMAP_SIZE& 3) == 0);
423	ASMMemZero32(pVM->csam.s.pPDBitmapHC[i], CSAM_PAGE_BITMAP_SIZE);
424	}
425	}
426
427	/* Remove all CSAM page records. */
428	while(true)
429	{
430	PCSAMPAGEREC pPageRec = (PCSAMPAGEREC)RTAvlPVGetBestFit(&pVM->csam.s.pPageTree, 0, true);
431	if (pPageRec)
432	{
433	csamRemovePageRecord(pVM, pPageRec->page.pPageGC);
434	}
435	else
436	break;
437	}
438	Assert(!pVM->csam.s.pPageTree);
439
440	csamReinit(pVM);
441
442	return VINF_SUCCESS;
443	}
444
445
446	/**
447	* Callback function for RTAvlPVDoWithAll
448	*
449	* Counts the number of records in the tree
450	*
451	* @returns VBox status code.
452	* @param pNode Current node
453	* @param pcPatches Pointer to patch counter
454	*/
455	static DECLCALLBACK(int) CountRecord(PAVLPVNODECORE pNode, void *pcPatches)
456	{
457	NOREF(pNode);
458	(uint32_t )pcPatches = (uint32_t )pcPatches + 1;
459	return VINF_SUCCESS;
460	}
461
462	/**
463	* Callback function for RTAvlPVDoWithAll
464	*
465	* Saves the state of the page record
466	*
467	* @returns VBox status code.
468	* @param pNode Current node
469	* @param pVM1 VM Handle
470	*/
471	static DECLCALLBACK(int) SavePageState(PAVLPVNODECORE pNode, void *pVM1)
472	{
473	PVM pVM = (PVM)pVM1;
474	PCSAMPAGEREC pPage = (PCSAMPAGEREC)pNode;
475	CSAMPAGEREC page = *pPage;
476	PSSMHANDLE pSSM = pVM->csam.s.savedstate.pSSM;
477	int rc;
478
479	/* Save the page record itself */
480	rc = SSMR3PutMem(pSSM, &page, sizeof(page));
481	AssertRCReturn(rc, rc);
482
483	if (page.page.pBitmap)
484	{
485	rc = SSMR3PutMem(pSSM, page.page.pBitmap, CSAM_PAGE_BITMAP_SIZE);
486	AssertRCReturn(rc, rc);
487	}
488
489	return VINF_SUCCESS;
490	}
491
492	/**
493	* Execute state save operation.
494	*
495	* @returns VBox status code.
496	* @param pVM VM Handle.
497	* @param pSSM SSM operation handle.
498	*/
499	static DECLCALLBACK(int) csamr3Save(PVM pVM, PSSMHANDLE pSSM)
500	{
501	CSAM csamInfo = pVM->csam.s;
502	int rc;
503
504	/*
505	* Count the number of page records in the tree (feeling lazy)
506	*/
507	csamInfo.savedstate.cPageRecords = 0;
508	RTAvlPVDoWithAll(&pVM->csam.s.pPageTree, true, CountRecord, &csamInfo.savedstate.cPageRecords);
509
510	/*
511	* Save CSAM structure
512	*/
513	pVM->csam.s.savedstate.pSSM = pSSM;
514	rc = SSMR3PutMem(pSSM, &csamInfo, sizeof(csamInfo));
515	AssertRCReturn(rc, rc);
516
517	/* Save pgdir bitmap */
518	rc = SSMR3PutMem(pSSM, csamInfo.pPDBitmapHC, CSAM_PGDIRBMP_CHUNKS*sizeof(RTHCPTR));
519	AssertRCReturn(rc, rc);
520
521	for (unsigned i=0;i<CSAM_PGDIRBMP_CHUNKS;i++)
522	{
523	if(csamInfo.pPDBitmapHC[i])
524	{
525	/* Save the page bitmap. */
526	rc = SSMR3PutMem(pSSM, csamInfo.pPDBitmapHC[i], CSAM_PAGE_BITMAP_SIZE);
527	AssertRCReturn(rc, rc);
528	}
529	}
530
531	/*
532	* Save page records
533	*/
534	rc = RTAvlPVDoWithAll(&pVM->csam.s.pPageTree, true, SavePageState, pVM);
535	AssertRCReturn(rc, rc);
536
537	/** @note we don't restore aDangerousInstr; it will be recreated automatically. */
538	return VINF_SUCCESS;
539	}
540
541	/**
542	* Execute state load operation.
543	*
544	* @returns VBox status code.
545	* @param pVM VM Handle.
546	* @param pSSM SSM operation handle.
547	* @param uVersion Data layout version.
548	* @param uPass The data pass.
549	*/
550	static DECLCALLBACK(int) csamr3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
551	{
552	int rc;
553	CSAM csamInfo;
554
555	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
556	if (uVersion != CSAM_SSM_VERSION)
557	{
558	AssertMsgFailed(("csamR3Load: Invalid version uVersion=%d!\n", uVersion));
559	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
560	}
561
562	pVM->csam.s.savedstate.pSSM = pSSM;
563
564	/*
565	* Restore CSAM structure
566	*/
567	#if 0
568	rc = SSMR3GetMem(pSSM, &csamInfo, sizeof(csamInfo));
569	#else
570	RT_ZERO(csamInfo);
571	rc = SSMR3GetStructEx(pSSM, &csamInfo, sizeof(csamInfo), SSMSTRUCT_FLAGS_MEM_BAND_AID, &g_aCsamFields[0], NULL);
572	#endif
573	AssertRCReturn(rc, rc);
574
575	pVM->csam.s.fGatesChecked = csamInfo.fGatesChecked;
576	pVM->csam.s.fScanningStarted = csamInfo.fScanningStarted;
577
578	/* Restore dirty code page info. */
579	pVM->csam.s.cDirtyPages = csamInfo.cDirtyPages;
580	memcpy(pVM->csam.s.pvDirtyBasePage, csamInfo.pvDirtyBasePage, sizeof(pVM->csam.s.pvDirtyBasePage));
581	memcpy(pVM->csam.s.pvDirtyFaultPage, csamInfo.pvDirtyFaultPage, sizeof(pVM->csam.s.pvDirtyFaultPage));
582
583	/* Restore possible code page */
584	pVM->csam.s.cPossibleCodePages = csamInfo.cPossibleCodePages;
585	memcpy(pVM->csam.s.pvPossibleCodePage, csamInfo.pvPossibleCodePage, sizeof(pVM->csam.s.pvPossibleCodePage));
586
587	/* Restore pgdir bitmap (we'll change the pointers next). */
588	#if 0
589	rc = SSMR3GetMem(pSSM, pVM->csam.s.pPDBitmapHC, CSAM_PGDIRBMP_CHUNKS*sizeof(RTHCPTR));
590	#else
591	rc = SSMR3GetStructEx(pSSM, pVM->csam.s.pPDBitmapHC, sizeof(uint8_t ) CSAM_PGDIRBMP_CHUNKS,
592	SSMSTRUCT_FLAGS_MEM_BAND_AID, &g_aCsamPDBitmapArray[0], NULL);
593	#endif
594	AssertRCReturn(rc, rc);
595
596	/*
597	* Restore page bitmaps
598	*/
599	for (unsigned i=0;i<CSAM_PGDIRBMP_CHUNKS;i++)
600	{
601	if(pVM->csam.s.pPDBitmapHC[i])
602	{
603	rc = MMHyperAlloc(pVM, CSAM_PAGE_BITMAP_SIZE, 0, MM_TAG_CSAM, (void **)&pVM->csam.s.pPDBitmapHC[i]);
604	if (RT_FAILURE(rc))
605	{
606	Log(("MMHyperAlloc failed with %Rrc\n", rc));
607	return rc;
608	}
609	/* Convert to GC pointer. */
610	pVM->csam.s.pPDGCBitmapHC[i] = MMHyperR3ToRC(pVM, pVM->csam.s.pPDBitmapHC[i]);
611	Assert(pVM->csam.s.pPDGCBitmapHC[i]);
612
613	/* Restore the bitmap. */
614	rc = SSMR3GetMem(pSSM, pVM->csam.s.pPDBitmapHC[i], CSAM_PAGE_BITMAP_SIZE);
615	AssertRCReturn(rc, rc);
616	}
617	else
618	{
619	Assert(!pVM->csam.s.pPDGCBitmapHC[i]);
620	pVM->csam.s.pPDGCBitmapHC[i] = 0;
621	}
622	}
623
624	/*
625	* Restore page records
626	*/
627	for (uint32_t i=0;i<csamInfo.savedstate.cPageRecords + csamInfo.savedstate.cPatchPageRecords;i++)
628	{
629	CSAMPAGEREC page;
630	PCSAMPAGE pPage;
631
632	#if 0
633	rc = SSMR3GetMem(pSSM, &page, sizeof(page));
634	#else
635	RT_ZERO(page);
636	rc = SSMR3GetStructEx(pSSM, &page, sizeof(page), SSMSTRUCT_FLAGS_MEM_BAND_AID, &g_aCsamPageRecFields[0], NULL);
637	#endif
638	AssertRCReturn(rc, rc);
639
640	/*
641	* Recreate the page record
642	*/
643	pPage = csamCreatePageRecord(pVM, page.page.pPageGC, page.page.enmTag, page.page.fCode32, page.page.fMonitorInvalidation);
644	AssertReturn(pPage, VERR_NO_MEMORY);
645
646	pPage->GCPhys = page.page.GCPhys;
647	pPage->fFlags = page.page.fFlags;
648	pPage->u64Hash = page.page.u64Hash;
649
650	if (page.page.pBitmap)
651	{
652	rc = SSMR3GetMem(pSSM, pPage->pBitmap, CSAM_PAGE_BITMAP_SIZE);
653	AssertRCReturn(rc, rc);
654	}
655	else
656	{
657	MMR3HeapFree(pPage->pBitmap);
658	pPage->pBitmap = 0;
659	}
660	}
661
662	/* Note: we don't restore aDangerousInstr; it will be recreated automatically. */
663	memset(&pVM->csam.s.aDangerousInstr, 0, sizeof(pVM->csam.s.aDangerousInstr));
664	pVM->csam.s.cDangerousInstr = 0;
665	pVM->csam.s.iDangerousInstr = 0;
666	return VINF_SUCCESS;
667	}
668
669	/**
670	* Convert guest context address to host context pointer
671	*
672	* @returns VBox status code.
673	* @param pVM The VM to operate on.
674	* @param pCacheRec Address conversion cache record
675	* @param pGCPtr Guest context pointer
676	* @returns Host context pointer or NULL in case of an error
677	*
678	*/
679	static R3PTRTYPE(void ) CSAMGCVirtToHCVirt(PVM pVM, PCSAMP2GLOOKUPREC pCacheRec, RCPTRTYPE(uint8_t ) pGCPtr)
680	{
681	int rc;
682	R3PTRTYPE(void *) pHCPtr;
683	Assert(pVM->cCpus == 1);
684	PVMCPU pVCpu = VMMGetCpu0(pVM);
685
686	STAM_PROFILE_START(&pVM->csam.s.StatTimeAddrConv, a);
687
688	pHCPtr = PATMR3GCPtrToHCPtr(pVM, pGCPtr);
689	if (pHCPtr)
690	return pHCPtr;
691
692	if (pCacheRec->pPageLocStartHC)
693	{
694	uint32_t offset = pGCPtr & PAGE_OFFSET_MASK;
695	if (pCacheRec->pGuestLoc == (pGCPtr & PAGE_BASE_GC_MASK))
696	{
697	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeAddrConv, a);
698	return pCacheRec->pPageLocStartHC + offset;
699	}
700	}
701
702	/* Release previous lock if any. */
703	if (pCacheRec->Lock.pvMap)
704	{
705	PGMPhysReleasePageMappingLock(pVM, &pCacheRec->Lock);
706	pCacheRec->Lock.pvMap = NULL;
707	}
708
709	rc = PGMPhysGCPtr2CCPtrReadOnly(pVCpu, pGCPtr, (const void **)&pHCPtr, &pCacheRec->Lock);
710	if (rc != VINF_SUCCESS)
711	{
712	//// AssertMsgRC(rc, ("MMR3PhysGCVirt2HCVirtEx failed for %RRv\n", pGCPtr));
713	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeAddrConv, a);
714	return NULL;
715	}
716
717	pCacheRec->pPageLocStartHC = (R3PTRTYPE(uint8_t*))((RTHCUINTPTR)pHCPtr & PAGE_BASE_HC_MASK);
718	pCacheRec->pGuestLoc = pGCPtr & PAGE_BASE_GC_MASK;
719	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeAddrConv, a);
720	return pHCPtr;
721	}
722
723	/**
724	* Read callback for disassembly function; supports reading bytes that cross a page boundary
725	*
726	* @returns VBox status code.
727	* @param pSrc GC source pointer
728	* @param pDest HC destination pointer
729	* @param size Number of bytes to read
730	* @param dwUserdata Callback specific user data (pCpu)
731	*
732	*/
733	static DECLCALLBACK(int) CSAMR3ReadBytes(RTUINTPTR pSrc, uint8_t pDest, unsigned size, void pvUserdata)
734	{
735	DISCPUSTATE pCpu = (DISCPUSTATE )pvUserdata;
736	PVM pVM = (PVM)pCpu->apvUserData[0];
737	RTHCUINTPTR pInstrHC = (RTHCUINTPTR)pCpu->apvUserData[1];
738	RTGCUINTPTR32 pInstrGC = (uintptr_t)pCpu->apvUserData[2];
739	int orgsize = size;
740	Assert(pVM->cCpus == 1);
741	PVMCPU pVCpu = VMMGetCpu0(pVM);
742
743	/* We are not interested in patched instructions, so read the original opcode bytes. */
744	/** @note single instruction patches (int3) are checked in CSAMR3AnalyseCallback */
745	for (int i=0;i<orgsize;i++)
746	{
747	int rc = PATMR3QueryOpcode(pVM, (RTRCPTR)pSrc, pDest);
748	if (RT_SUCCESS(rc))
749	{
750	pSrc++;
751	pDest++;
752	size--;
753	}
754	else
755	break;
756	}
757	if (size == 0)
758	return VINF_SUCCESS;
759
760	if (PAGE_ADDRESS(pInstrGC) != PAGE_ADDRESS(pSrc + size - 1) && !PATMIsPatchGCAddr(pVM, pSrc))
761	{
762	return PGMPhysSimpleReadGCPtr(pVCpu, pDest, pSrc, size);
763	}
764	else
765	{
766	Assert(pInstrHC);
767
768	/* pInstrHC is the base address; adjust according to the GC pointer. */
769	pInstrHC = pInstrHC + (pSrc - pInstrGC);
770
771	memcpy(pDest, (void *)pInstrHC, size);
772	}
773
774	return VINF_SUCCESS;
775	}
776
777	inline int CSAMR3DISInstr(PVM pVM, DISCPUSTATE pCpu, RTRCPTR InstrGC, uint8_t InstrHC, uint32_t pOpsize, char pszOutput)
778	{
779	(pCpu)->pfnReadBytes = CSAMR3ReadBytes;
780	(pCpu)->apvUserData[0] = pVM;
781	(pCpu)->apvUserData[1] = InstrHC;
782	(pCpu)->apvUserData[2] = (void *)(uintptr_t)InstrGC; Assert(sizeof(InstrGC) <= sizeof(pCpu->apvUserData[0]));
783	#ifdef DEBUG
784	return DISInstrEx(pCpu, InstrGC, 0, pOpsize, pszOutput, OPTYPE_ALL);
785	#else
786	/* We are interested in everything except harmless stuff */
787	return DISInstrEx(pCpu, InstrGC, 0, pOpsize, pszOutput, ~(OPTYPE_INVALID \| OPTYPE_HARMLESS \| OPTYPE_RRM_MASK));
788	#endif
789	}
790
791	/**
792	* Analyses the instructions following the cli for compliance with our heuristics for cli
793	*
794	* @returns VBox status code.
795	* @param pVM The VM to operate on.
796	* @param pCpu CPU disassembly state
797	* @param pInstrGC Guest context pointer to privileged instruction
798	* @param pCurInstrGC Guest context pointer to the current instruction
799	* @param pCacheRec GC to HC cache record
800	* @param pUserData User pointer (callback specific)
801	*
802	*/
803	static int CSAMR3AnalyseCallback(PVM pVM, DISCPUSTATE pCpu, RCPTRTYPE(uint8_t ) pInstrGC, RCPTRTYPE(uint8_t *) pCurInstrGC,
804	PCSAMP2GLOOKUPREC pCacheRec, void *pUserData)
805	{
806	PCSAMPAGE pPage = (PCSAMPAGE)pUserData;
807	int rc;
808	NOREF(pInstrGC);
809
810	switch (pCpu->pCurInstr->opcode)
811	{
812	case OP_INT:
813	Assert(pCpu->param1.flags & USE_IMMEDIATE8);
814	if (pCpu->param1.parval == 3)
815	{
816	//two byte int 3
817	return VINF_SUCCESS;
818	}
819	break;
820
821	case OP_ILLUD2:
822	/* This appears to be some kind of kernel panic in Linux 2.4; no point to continue. */
823	case OP_RETN:
824	case OP_INT3:
825	case OP_INVALID:
826	#if 1
827	/* removing breaks win2k guests? */
828	case OP_IRET:
829	#endif
830	return VINF_SUCCESS;
831	}
832
833	// Check for exit points
834	switch (pCpu->pCurInstr->opcode)
835	{
836	/* It's not a good idea to patch pushf instructions:
837	* - increases the chance of conflicts (code jumping to the next instruction)
838	* - better to patch the cli
839	* - code that branches before the cli will likely hit an int 3
840	* - in general doesn't offer any benefits as we don't allow nested patch blocks (IF is always 1)
841	*/
842	case OP_PUSHF:
843	case OP_POPF:
844	break;
845
846	case OP_CLI:
847	{
848	uint32_t cbInstr = 0;
849	uint32_t opsize = pCpu->opsize;
850	bool fCode32 = pPage->fCode32;
851
852	Assert(fCode32);
853
854	PATMR3AddHint(pVM, pCurInstrGC, (fCode32) ? PATMFL_CODE32 : 0);
855
856	/* Make sure the instructions that follow the cli have not been encountered before. */
857	while (true)
858	{
859	DISCPUSTATE cpu;
860
861	if (cbInstr + opsize >= SIZEOF_NEARJUMP32)
862	break;
863
864	if (csamIsCodeScanned(pVM, pCurInstrGC + opsize, &pPage) == true)
865	{
866	/* We've scanned the next instruction(s) already. This means we've followed a branch that ended up there before -> dangerous!! */
867	PATMR3DetectConflict(pVM, pCurInstrGC, pCurInstrGC + opsize);
868	break;
869	}
870	pCurInstrGC += opsize;
871	cbInstr += opsize;
872
873	{ /* Force pCurInstrHC out of scope after we stop using it (page lock!) */
874	uint8_t *pCurInstrHC = 0;
875	pCurInstrHC = (uint8_t *)CSAMGCVirtToHCVirt(pVM, pCacheRec, pCurInstrGC);
876	if (pCurInstrHC == NULL)
877	{
878	Log(("CSAMGCVirtToHCVirt failed for %RRv\n", pCurInstrGC));
879	break;
880	}
881	Assert(VALID_PTR(pCurInstrHC));
882
883	cpu.mode = (fCode32) ? CPUMODE_32BIT : CPUMODE_16BIT;
884	rc = CSAMR3DISInstr(pVM, &cpu, pCurInstrGC, pCurInstrHC, &opsize, NULL);
885	}
886	AssertRC(rc);
887	if (RT_FAILURE(rc))
888	break;
889	}
890	break;
891	}
892
893	case OP_PUSH:
894	if (pCpu->pCurInstr->param1 != OP_PARM_REG_CS)
895	break;
896
897	/* no break */
898	case OP_STR:
899	case OP_LSL:
900	case OP_LAR:
901	case OP_SGDT:
902	case OP_SLDT:
903	case OP_SIDT:
904	case OP_SMSW:
905	case OP_VERW:
906	case OP_VERR:
907	case OP_CPUID:
908	case OP_IRET:
909	#ifdef DEBUG
910	switch(pCpu->pCurInstr->opcode)
911	{
912	case OP_STR:
913	Log(("Privileged instruction at %RRv: str!!\n", pCurInstrGC));
914	break;
915	case OP_LSL:
916	Log(("Privileged instruction at %RRv: lsl!!\n", pCurInstrGC));
917	break;
918	case OP_LAR:
919	Log(("Privileged instruction at %RRv: lar!!\n", pCurInstrGC));
920	break;
921	case OP_SGDT:
922	Log(("Privileged instruction at %RRv: sgdt!!\n", pCurInstrGC));
923	break;
924	case OP_SLDT:
925	Log(("Privileged instruction at %RRv: sldt!!\n", pCurInstrGC));
926	break;
927	case OP_SIDT:
928	Log(("Privileged instruction at %RRv: sidt!!\n", pCurInstrGC));
929	break;
930	case OP_SMSW:
931	Log(("Privileged instruction at %RRv: smsw!!\n", pCurInstrGC));
932	break;
933	case OP_VERW:
934	Log(("Privileged instruction at %RRv: verw!!\n", pCurInstrGC));
935	break;
936	case OP_VERR:
937	Log(("Privileged instruction at %RRv: verr!!\n", pCurInstrGC));
938	break;
939	case OP_CPUID:
940	Log(("Privileged instruction at %RRv: cpuid!!\n", pCurInstrGC));
941	break;
942	case OP_PUSH:
943	Log(("Privileged instruction at %RRv: push cs!!\n", pCurInstrGC));
944	break;
945	case OP_IRET:
946	Log(("Privileged instruction at %RRv: iret!!\n", pCurInstrGC));
947	break;
948	}
949	#endif
950
951	if (PATMR3HasBeenPatched(pVM, pCurInstrGC) == false)
952	{
953	rc = PATMR3InstallPatch(pVM, pCurInstrGC, (pPage->fCode32) ? PATMFL_CODE32 : 0);
954	if (RT_FAILURE(rc))
955	{
956	Log(("PATMR3InstallPatch failed with %d\n", rc));
957	return VWRN_CONTINUE_ANALYSIS;
958	}
959	}
960	if (pCpu->pCurInstr->opcode == OP_IRET)
961	return VINF_SUCCESS; /* Look no further in this branch. */
962
963	return VWRN_CONTINUE_ANALYSIS;
964
965	case OP_JMP:
966	case OP_CALL:
967	{
968	// return or jump/call through a jump table
969	if (OP_PARM_VTYPE(pCpu->pCurInstr->param1) != OP_PARM_J)
970	{
971	#ifdef DEBUG
972	switch(pCpu->pCurInstr->opcode)
973	{
974	case OP_JMP:
975	Log(("Control Flow instruction at %RRv: jmp!!\n", pCurInstrGC));
976	break;
977	case OP_CALL:
978	Log(("Control Flow instruction at %RRv: call!!\n", pCurInstrGC));
979	break;
980	}
981	#endif
982	return VWRN_CONTINUE_ANALYSIS;
983	}
984	return VWRN_CONTINUE_ANALYSIS;
985	}
986
987	}
988
989	return VWRN_CONTINUE_ANALYSIS;
990	}
991
992	#ifdef CSAM_ANALYSE_BEYOND_RET
993	/**
994	* Wrapper for csamAnalyseCodeStream for call instructions.
995	*
996	* @returns VBox status code.
997	* @param pVM The VM to operate on.
998	* @param pInstrGC Guest context pointer to privileged instruction
999	* @param pCurInstrGC Guest context pointer to the current instruction
1000	* @param fCode32 16 or 32 bits code
1001	* @param pfnCSAMR3Analyse Callback for testing the disassembled instruction
1002	* @param pUserData User pointer (callback specific)
1003	*
1004	*/
1005	static int csamAnalyseCallCodeStream(PVM pVM, RCPTRTYPE(uint8_t ) pInstrGC, RCPTRTYPE(uint8_t ) pCurInstrGC, bool fCode32,
1006	PFN_CSAMR3ANALYSE pfnCSAMR3Analyse, void *pUserData, PCSAMP2GLOOKUPREC pCacheRec)
1007	{
1008	int rc;
1009	CSAMCALLEXITREC CallExitRec;
1010	PCSAMCALLEXITREC pOldCallRec;
1011	PCSAMPAGE pPage = 0;
1012	uint32_t i;
1013
1014	CallExitRec.cInstrAfterRet = 0;
1015
1016	pOldCallRec = pCacheRec->pCallExitRec;
1017	pCacheRec->pCallExitRec = &CallExitRec;
1018
1019	rc = csamAnalyseCodeStream(pVM, pInstrGC, pCurInstrGC, fCode32, pfnCSAMR3Analyse, pUserData, pCacheRec);
1020
1021	for (i=0;i<CallExitRec.cInstrAfterRet;i++)
1022	{
1023	PCSAMPAGE pPage = 0;
1024
1025	pCurInstrGC = CallExitRec.pInstrAfterRetGC[i];
1026
1027	/* Check if we've previously encountered the instruction after the ret. */
1028	if (csamIsCodeScanned(pVM, pCurInstrGC, &pPage) == false)
1029	{
1030	DISCPUSTATE cpu;
1031	uint32_t opsize;
1032	int rc2;
1033	#ifdef DEBUG
1034	char szOutput[256];
1035	#endif
1036	if (pPage == NULL)
1037	{
1038	/* New address; let's take a look at it. */
1039	pPage = csamCreatePageRecord(pVM, pCurInstrGC, CSAM_TAG_CSAM, fCode32);
1040	if (pPage == NULL)
1041	{
1042	rc = VERR_NO_MEMORY;
1043	goto done;
1044	}
1045	}
1046
1047	/**
1048	* Some generic requirements for recognizing an adjacent function:
1049	* - alignment fillers that consist of:
1050	* - nop
1051	* - lea genregX, [genregX (+ 0)]
1052	* - push ebp after the filler (can extend this later); aligned at at least a 4 byte boundary
1053	*/
1054	for (int j=0;j<16;j++)
1055	{
1056	uint8_t pCurInstrHC = (uint8_t )CSAMGCVirtToHCVirt(pVM, pCacheRec, pCurInstrGC);
1057	if (pCurInstrHC == NULL)
1058	{
1059	Log(("CSAMGCVirtToHCVirt failed for %RRv\n", pCurInstrGC));
1060	goto done;
1061	}
1062	Assert(VALID_PTR(pCurInstrHC));
1063
1064	cpu.mode = (fCode32) ? CPUMODE_32BIT : CPUMODE_16BIT;
1065	STAM_PROFILE_START(&pVM->csam.s.StatTimeDisasm, a);
1066	#ifdef DEBUG
1067	rc2 = CSAMR3DISInstr(pVM, &cpu, pCurInstrGC, pCurInstrHC, &opsize, szOutput);
1068	if (RT_SUCCESS(rc2)) Log(("CSAM Call Analysis: %s", szOutput));
1069	#else
1070	rc2 = CSAMR3DISInstr(pVM, &cpu, pCurInstrGC, pCurInstrHC, &opsize, NULL);
1071	#endif
1072	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeDisasm, a);
1073	if (RT_FAILURE(rc2))
1074	{
1075	Log(("Disassembly failed at %RRv with %Rrc (probably page not present) -> return to caller\n", pCurInstrGC, rc2));
1076	goto done;
1077	}
1078
1079	STAM_COUNTER_ADD(&pVM->csam.s.StatNrBytesRead, opsize);
1080
1081	RCPTRTYPE(uint8_t *) addr = 0;
1082	PCSAMPAGE pJmpPage = NULL;
1083
1084	if (PAGE_ADDRESS(pCurInstrGC) != PAGE_ADDRESS(pCurInstrGC + opsize - 1))
1085	{
1086	if (!PGMGstIsPagePresent(pVM, pCurInstrGC + opsize - 1))
1087	{
1088	/// @todo fault in the page
1089	Log(("Page for current instruction %RRv is not present!!\n", pCurInstrGC));
1090	goto done;
1091	}
1092	//all is fine, let's continue
1093	csamR3CheckPageRecord(pVM, pCurInstrGC + opsize - 1);
1094	}
1095
1096	switch (cpu.pCurInstr->opcode)
1097	{
1098	case OP_NOP:
1099	case OP_INT3:
1100	break; /* acceptable */
1101
1102	case OP_LEA:
1103	/* Must be similar to:
1104	*
1105	* lea esi, [esi]
1106	* lea esi, [esi+0]
1107	* Any register is allowed as long as source and destination are identical.
1108	*/
1109	if ( cpu.param1.flags != USE_REG_GEN32
1110	\|\| ( cpu.param2.flags != USE_REG_GEN32
1111	&& ( !(cpu.param2.flags & USE_REG_GEN32)
1112	\|\| !(cpu.param2.flags & (USE_DISPLACEMENT8\|USE_DISPLACEMENT16\|USE_DISPLACEMENT32))
1113	\|\| cpu.param2.parval != 0
1114	)
1115	)
1116	\|\| cpu.param1.base.reg_gen32 != cpu.param2.base.reg_gen32
1117	)
1118	{
1119	STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunctionFailed);
1120	goto next_function;
1121	}
1122	break;
1123
1124	case OP_PUSH:
1125	{
1126	if ( (pCurInstrGC & 0x3) != 0
1127	\|\| cpu.param1.flags != USE_REG_GEN32
1128	\|\| cpu.param1.base.reg_gen32 != USE_REG_EBP
1129	)
1130	{
1131	STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunctionFailed);
1132	goto next_function;
1133	}
1134
1135	if (csamIsCodeScanned(pVM, pCurInstrGC, &pPage) == false)
1136	{
1137	CSAMCALLEXITREC CallExitRec2;
1138	CallExitRec2.cInstrAfterRet = 0;
1139
1140	pCacheRec->pCallExitRec = &CallExitRec2;
1141
1142	/* Analyse the function. */
1143	Log(("Found new function at %RRv\n", pCurInstrGC));
1144	STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunction);
1145	csamAnalyseCallCodeStream(pVM, pInstrGC, pCurInstrGC, fCode32, pfnCSAMR3Analyse, pUserData, pCacheRec);
1146	}
1147	goto next_function;
1148	}
1149
1150	case OP_SUB:
1151	{
1152	if ( (pCurInstrGC & 0x3) != 0
1153	\|\| cpu.param1.flags != USE_REG_GEN32
1154	\|\| cpu.param1.base.reg_gen32 != USE_REG_ESP
1155	)
1156	{
1157	STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunctionFailed);
1158	goto next_function;
1159	}
1160
1161	if (csamIsCodeScanned(pVM, pCurInstrGC, &pPage) == false)
1162	{
1163	CSAMCALLEXITREC CallExitRec2;
1164	CallExitRec2.cInstrAfterRet = 0;
1165
1166	pCacheRec->pCallExitRec = &CallExitRec2;
1167
1168	/* Analyse the function. */
1169	Log(("Found new function at %RRv\n", pCurInstrGC));
1170	STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunction);
1171	csamAnalyseCallCodeStream(pVM, pInstrGC, pCurInstrGC, fCode32, pfnCSAMR3Analyse, pUserData, pCacheRec);
1172	}
1173	goto next_function;
1174	}
1175
1176	default:
1177	STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunctionFailed);
1178	goto next_function;
1179	}
1180	/* Mark it as scanned. */
1181	csamMarkCode(pVM, pPage, pCurInstrGC, opsize, true);
1182	pCurInstrGC += opsize;
1183	} /* for at most 16 instructions */
1184	next_function:
1185	; /* MSVC complains otherwise */
1186	}
1187	}
1188	done:
1189	pCacheRec->pCallExitRec = pOldCallRec;
1190	return rc;
1191	}
1192	#else
1193	#define csamAnalyseCallCodeStream csamAnalyseCodeStream
1194	#endif
1195
1196	/**
1197	* Disassembles the code stream until the callback function detects a failure or decides everything is acceptable
1198	*
1199	* @returns VBox status code.
1200	* @param pVM The VM to operate on.
1201	* @param pInstrGC Guest context pointer to privileged instruction
1202	* @param pCurInstrGC Guest context pointer to the current instruction
1203	* @param fCode32 16 or 32 bits code
1204	* @param pfnCSAMR3Analyse Callback for testing the disassembled instruction
1205	* @param pUserData User pointer (callback specific)
1206	*
1207	*/
1208	static int csamAnalyseCodeStream(PVM pVM, RCPTRTYPE(uint8_t ) pInstrGC, RCPTRTYPE(uint8_t ) pCurInstrGC, bool fCode32,
1209	PFN_CSAMR3ANALYSE pfnCSAMR3Analyse, void *pUserData, PCSAMP2GLOOKUPREC pCacheRec)
1210	{
1211	DISCPUSTATE cpu;
1212	PCSAMPAGE pPage = (PCSAMPAGE)pUserData;
1213	int rc = VWRN_CONTINUE_ANALYSIS;
1214	uint32_t opsize;
1215	int rc2;
1216	Assert(pVM->cCpus == 1);
1217	PVMCPU pVCpu = VMMGetCpu0(pVM);
1218
1219	#ifdef DEBUG
1220	char szOutput[256];
1221	#endif
1222
1223	LogFlow(("csamAnalyseCodeStream: code at %RRv depth=%d\n", pCurInstrGC, pCacheRec->depth));
1224
1225	pVM->csam.s.fScanningStarted = true;
1226
1227	pCacheRec->depth++;
1228	/*
1229	* Limit the call depth. (rather arbitrary upper limit; too low and we won't detect certain
1230	* cpuid instructions in Linux kernels; too high and we waste too much time scanning code)
1231	* (512 is necessary to detect cpuid instructions in Red Hat EL4; see defect 1355)
1232	* @note we are using a lot of stack here. couple of 100k when we go to the full depth (!)
1233	*/
1234	if (pCacheRec->depth > 512)
1235	{
1236	LogFlow(("CSAM: maximum calldepth reached for %RRv\n", pCurInstrGC));
1237	pCacheRec->depth--;
1238	return VINF_SUCCESS; //let's not go on forever
1239	}
1240
1241	Assert(!PATMIsPatchGCAddr(pVM, pCurInstrGC));
1242	csamR3CheckPageRecord(pVM, pCurInstrGC);
1243
1244	while(rc == VWRN_CONTINUE_ANALYSIS)
1245	{
1246	if (csamIsCodeScanned(pVM, pCurInstrGC, &pPage) == false)
1247	{
1248	if (pPage == NULL)
1249	{
1250	/* New address; let's take a look at it. */
1251	pPage = csamCreatePageRecord(pVM, pCurInstrGC, CSAM_TAG_CSAM, fCode32);
1252	if (pPage == NULL)
1253	{
1254	rc = VERR_NO_MEMORY;
1255	goto done;
1256	}
1257	}
1258	}
1259	else
1260	{
1261	LogFlow(("Code at %RRv has been scanned before\n", pCurInstrGC));
1262	rc = VINF_SUCCESS;
1263	goto done;
1264	}
1265
1266	{ /* Force pCurInstrHC out of scope after we stop using it (page lock!) */
1267	uint8_t pCurInstrHC = (uint8_t )CSAMGCVirtToHCVirt(pVM, pCacheRec, pCurInstrGC);
1268	if (pCurInstrHC == NULL)
1269	{
1270	Log(("CSAMGCVirtToHCVirt failed for %RRv\n", pCurInstrGC));
1271	rc = VERR_PATCHING_REFUSED;
1272	goto done;
1273	}
1274	Assert(VALID_PTR(pCurInstrHC));
1275
1276	cpu.mode = (fCode32) ? CPUMODE_32BIT : CPUMODE_16BIT;
1277	STAM_PROFILE_START(&pVM->csam.s.StatTimeDisasm, a);
1278	#ifdef DEBUG
1279	rc2 = CSAMR3DISInstr(pVM, &cpu, pCurInstrGC, pCurInstrHC, &opsize, szOutput);
1280	if (RT_SUCCESS(rc2)) Log(("CSAM Analysis: %s", szOutput));
1281	#else
1282	rc2 = CSAMR3DISInstr(pVM, &cpu, pCurInstrGC, pCurInstrHC, &opsize, NULL);
1283	#endif
1284	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeDisasm, a);
1285	}
1286	if (RT_FAILURE(rc2))
1287	{
1288	Log(("Disassembly failed at %RRv with %Rrc (probably page not present) -> return to caller\n", pCurInstrGC, rc2));
1289	rc = VINF_SUCCESS;
1290	goto done;
1291	}
1292
1293	STAM_COUNTER_ADD(&pVM->csam.s.StatNrBytesRead, opsize);
1294
1295	csamMarkCode(pVM, pPage, pCurInstrGC, opsize, true);
1296
1297	RCPTRTYPE(uint8_t *) addr = 0;
1298	PCSAMPAGE pJmpPage = NULL;
1299
1300	if (PAGE_ADDRESS(pCurInstrGC) != PAGE_ADDRESS(pCurInstrGC + opsize - 1))
1301	{
1302	if (!PGMGstIsPagePresent(pVCpu, pCurInstrGC + opsize - 1))
1303	{
1304	/// @todo fault in the page
1305	Log(("Page for current instruction %RRv is not present!!\n", pCurInstrGC));
1306	rc = VWRN_CONTINUE_ANALYSIS;
1307	goto next_please;
1308	}
1309	//all is fine, let's continue
1310	csamR3CheckPageRecord(pVM, pCurInstrGC + opsize - 1);
1311	}
1312	/*
1313	* If it's harmless, then don't bother checking it (the disasm tables had better be accurate!)
1314	*/
1315	if ((cpu.pCurInstr->optype & ~OPTYPE_RRM_MASK) == OPTYPE_HARMLESS)
1316	{
1317	AssertMsg(pfnCSAMR3Analyse(pVM, &cpu, pInstrGC, pCurInstrGC, pCacheRec, (void *)pPage) == VWRN_CONTINUE_ANALYSIS, ("Instruction incorrectly marked harmless?!?!?\n"));
1318	rc = VWRN_CONTINUE_ANALYSIS;
1319	goto next_please;
1320	}
1321
1322	#ifdef CSAM_ANALYSE_BEYOND_RET
1323	/* Remember the address of the instruction following the ret in case the parent instruction was a call. */
1324	if ( pCacheRec->pCallExitRec
1325	&& cpu.pCurInstr->opcode == OP_RETN
1326	&& pCacheRec->pCallExitRec->cInstrAfterRet < CSAM_MAX_CALLEXIT_RET)
1327	{
1328	pCacheRec->pCallExitRec->pInstrAfterRetGC[pCacheRec->pCallExitRec->cInstrAfterRet] = pCurInstrGC + opsize;
1329	pCacheRec->pCallExitRec->cInstrAfterRet++;
1330	}
1331	#endif
1332
1333	rc = pfnCSAMR3Analyse(pVM, &cpu, pInstrGC, pCurInstrGC, pCacheRec, (void *)pPage);
1334	if (rc == VINF_SUCCESS)
1335	goto done;
1336
1337	// For our first attempt, we'll handle only simple relative jumps and calls (immediate offset coded in instruction)
1338	if ( ((cpu.pCurInstr->optype & OPTYPE_CONTROLFLOW) && (OP_PARM_VTYPE(cpu.pCurInstr->param1) == OP_PARM_J))
1339	\|\| (cpu.pCurInstr->opcode == OP_CALL && cpu.param1.flags == USE_DISPLACEMENT32)) /* simple indirect call (call dword ptr [address]) */
1340	{
1341	/* We need to parse 'call dword ptr [address]' type of calls to catch cpuid instructions in some recent Linux distributions (e.g. OpenSuse 10.3) */
1342	if ( cpu.pCurInstr->opcode == OP_CALL
1343	&& cpu.param1.flags == USE_DISPLACEMENT32)
1344	{
1345	addr = 0;
1346	PGMPhysSimpleReadGCPtr(pVCpu, &addr, (RTRCUINTPTR)cpu.param1.disp32, sizeof(addr));
1347	}
1348	else
1349	addr = CSAMResolveBranch(&cpu, pCurInstrGC);
1350
1351	if (addr == 0)
1352	{
1353	Log(("We don't support far jumps here!! (%08X)\n", cpu.param1.flags));
1354	rc = VINF_SUCCESS;
1355	break;
1356	}
1357	Assert(!PATMIsPatchGCAddr(pVM, addr));
1358
1359	/* If the target address lies in a patch generated jump, then special action needs to be taken. */
1360	PATMR3DetectConflict(pVM, pCurInstrGC, addr);
1361
1362	/* Same page? */
1363	if (PAGE_ADDRESS(addr) != PAGE_ADDRESS(pCurInstrGC ))
1364	{
1365	if (!PGMGstIsPagePresent(pVCpu, addr))
1366	{
1367	Log(("Page for current instruction %RRv is not present!!\n", addr));
1368	rc = VWRN_CONTINUE_ANALYSIS;
1369	goto next_please;
1370	}
1371
1372	/* All is fine, let's continue. */
1373	csamR3CheckPageRecord(pVM, addr);
1374	}
1375
1376	pJmpPage = NULL;
1377	if (csamIsCodeScanned(pVM, addr, &pJmpPage) == false)
1378	{
1379	if (pJmpPage == NULL)
1380	{
1381	/* New branch target; let's take a look at it. */
1382	pJmpPage = csamCreatePageRecord(pVM, addr, CSAM_TAG_CSAM, fCode32);
1383	if (pJmpPage == NULL)
1384	{
1385	rc = VERR_NO_MEMORY;
1386	goto done;
1387	}
1388	Assert(pPage);
1389	}
1390	if (cpu.pCurInstr->opcode == OP_CALL)
1391	rc = csamAnalyseCallCodeStream(pVM, pInstrGC, addr, fCode32, pfnCSAMR3Analyse, (void *)pJmpPage, pCacheRec);
1392	else
1393	rc = csamAnalyseCodeStream(pVM, pInstrGC, addr, fCode32, pfnCSAMR3Analyse, (void *)pJmpPage, pCacheRec);
1394
1395	if (rc != VINF_SUCCESS) {
1396	goto done;
1397	}
1398	}
1399	if (cpu.pCurInstr->opcode == OP_JMP)
1400	{//unconditional jump; return to caller
1401	rc = VINF_SUCCESS;
1402	goto done;
1403	}
1404
1405	rc = VWRN_CONTINUE_ANALYSIS;
1406	} //if ((cpu.pCurInstr->optype & OPTYPE_CONTROLFLOW) && (OP_PARM_VTYPE(cpu.pCurInstr->param1) == OP_PARM_J))
1407	#ifdef CSAM_SCAN_JUMP_TABLE
1408	else
1409	if ( cpu.pCurInstr->opcode == OP_JMP
1410	&& (cpu.param1.flags & (USE_DISPLACEMENT32\|USE_INDEX\|USE_SCALE)) == (USE_DISPLACEMENT32\|USE_INDEX\|USE_SCALE)
1411	)
1412	{
1413	RTRCPTR pJumpTableGC = (RTRCPTR)cpu.param1.disp32;
1414	uint8_t *pJumpTableHC;
1415	int rc2;
1416
1417	Log(("Jump through jump table\n"));
1418
1419	rc2 = PGMPhysGCPtr2CCPtrReadOnly(pVCpu, pJumpTableGC, (PRTHCPTR)&pJumpTableHC, missing page lock);
1420	if (rc2 == VINF_SUCCESS)
1421	{
1422	for (uint32_t i=0;i<2;i++)
1423	{
1424	uint64_t fFlags;
1425
1426	addr = pJumpTableGC + cpu.param1.scale * i;
1427	/* Same page? */
1428	if (PAGE_ADDRESS(addr) != PAGE_ADDRESS(pJumpTableGC))
1429	break;
1430
1431	addr = (RTRCPTR )(pJumpTableHC + cpu.param1.scale * i);
1432
1433	rc2 = PGMGstGetPage(pVCpu, addr, &fFlags, NULL);
1434	if ( rc2 != VINF_SUCCESS
1435	\|\| (fFlags & X86_PTE_US)
1436	\|\| !(fFlags & X86_PTE_P)
1437	)
1438	break;
1439
1440	Log(("Jump to %RRv\n", addr));
1441
1442	pJmpPage = NULL;
1443	if (csamIsCodeScanned(pVM, addr, &pJmpPage) == false)
1444	{
1445	if (pJmpPage == NULL)
1446	{
1447	/* New branch target; let's take a look at it. */
1448	pJmpPage = csamCreatePageRecord(pVM, addr, CSAM_TAG_CSAM, fCode32);
1449	if (pJmpPage == NULL)
1450	{
1451	rc = VERR_NO_MEMORY;
1452	goto done;
1453	}
1454	Assert(pPage);
1455	}
1456	rc = csamAnalyseCodeStream(pVM, pInstrGC, addr, fCode32, pfnCSAMR3Analyse, (void *)pJmpPage, pCacheRec);
1457	if (rc != VINF_SUCCESS) {
1458	goto done;
1459	}
1460	}
1461	}
1462	}
1463	}
1464	#endif
1465	if (rc != VWRN_CONTINUE_ANALYSIS) {
1466	break; //done!
1467	}
1468	next_please:
1469	if (cpu.pCurInstr->opcode == OP_JMP)
1470	{
1471	rc = VINF_SUCCESS;
1472	goto done;
1473	}
1474	pCurInstrGC += opsize;
1475	}
1476	done:
1477	pCacheRec->depth--;
1478	return rc;
1479	}
1480
1481
1482	/**
1483	* Calculates the 64 bits hash value for the current page
1484	*
1485	* @returns hash value
1486	* @param pVM The VM to operate on.
1487	* @param pInstr Page address
1488	*/
1489	uint64_t csamR3CalcPageHash(PVM pVM, RTRCPTR pInstr)
1490	{
1491	uint64_t hash = 0;
1492	uint32_t val[5];
1493	int rc;
1494	Assert(pVM->cCpus == 1);
1495	PVMCPU pVCpu = VMMGetCpu0(pVM);
1496
1497	Assert((pInstr & PAGE_OFFSET_MASK) == 0);
1498
1499	rc = PGMPhysSimpleReadGCPtr(pVCpu, &val[0], pInstr, sizeof(val[0]));
1500	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1501	if (rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT)
1502	{
1503	Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr));
1504	return ~0ULL;
1505	}
1506
1507	rc = PGMPhysSimpleReadGCPtr(pVCpu, &val[1], pInstr+1024, sizeof(val[0]));
1508	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1509	if (rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT)
1510	{
1511	Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr));
1512	return ~0ULL;
1513	}
1514
1515	rc = PGMPhysSimpleReadGCPtr(pVCpu, &val[2], pInstr+2048, sizeof(val[0]));
1516	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1517	if (rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT)
1518	{
1519	Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr));
1520	return ~0ULL;
1521	}
1522
1523	rc = PGMPhysSimpleReadGCPtr(pVCpu, &val[3], pInstr+3072, sizeof(val[0]));
1524	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1525	if (rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT)
1526	{
1527	Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr));
1528	return ~0ULL;
1529	}
1530
1531	rc = PGMPhysSimpleReadGCPtr(pVCpu, &val[4], pInstr+4092, sizeof(val[0]));
1532	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1533	if (rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT)
1534	{
1535	Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr));
1536	return ~0ULL;
1537	}
1538
1539	// don't want to get division by zero traps
1540	val[2] \|= 1;
1541	val[4] \|= 1;
1542
1543	hash = (uint64_t)val[0] * (uint64_t)val[1] / (uint64_t)val[2] + (val[3]%val[4]);
1544	return (hash == ~0ULL) ? hash - 1 : hash;
1545	}
1546
1547
1548	/**
1549	* Notify CSAM of a page flush
1550	*
1551	* @returns VBox status code
1552	* @param pVM The VM to operate on.
1553	* @param addr GC address of the page to flush
1554	* @param fRemovePage Page removal flag
1555	*/
1556	static int csamFlushPage(PVM pVM, RTRCPTR addr, bool fRemovePage)
1557	{
1558	PCSAMPAGEREC pPageRec;
1559	int rc;
1560	RTGCPHYS GCPhys = 0;
1561	uint64_t fFlags = 0;
1562	Assert(pVM->cCpus == 1 \|\| !CSAMIsEnabled(pVM));
1563
1564	if (!CSAMIsEnabled(pVM))
1565	return VINF_SUCCESS;
1566
1567	PVMCPU pVCpu = VMMGetCpu0(pVM);
1568
1569	STAM_PROFILE_START(&pVM->csam.s.StatTimeFlushPage, a);
1570
1571	addr = addr & PAGE_BASE_GC_MASK;
1572
1573	/*
1574	* Note: searching for the page in our tree first is more expensive (skipped flushes are two orders of magnitude more common)
1575	*/
1576	if (pVM->csam.s.pPageTree == NULL)
1577	{
1578	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1579	return VWRN_CSAM_PAGE_NOT_FOUND;
1580	}
1581
1582	rc = PGMGstGetPage(pVCpu, addr, &fFlags, &GCPhys);
1583	/* Returned at a very early stage (no paging yet presumably). */
1584	if (rc == VERR_NOT_SUPPORTED)
1585	{
1586	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1587	return rc;
1588	}
1589
1590	if (RT_SUCCESS(rc))
1591	{
1592	if ( (fFlags & X86_PTE_US)
1593	\|\| rc == VERR_PGM_PHYS_PAGE_RESERVED
1594	)
1595	{
1596	/* User page -> not relevant for us. */
1597	STAM_COUNTER_ADD(&pVM->csam.s.StatNrFlushesSkipped, 1);
1598	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1599	return VINF_SUCCESS;
1600	}
1601	}
1602	else
1603	if (rc != VERR_PAGE_NOT_PRESENT && rc != VERR_PAGE_TABLE_NOT_PRESENT)
1604	AssertMsgFailed(("PGMR3GetPage %RRv failed with %Rrc\n", addr, rc));
1605
1606	pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)addr);
1607	if (pPageRec)
1608	{
1609	if ( GCPhys == pPageRec->page.GCPhys
1610	&& (fFlags & X86_PTE_P))
1611	{
1612	STAM_COUNTER_ADD(&pVM->csam.s.StatNrFlushesSkipped, 1);
1613	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1614	return VINF_SUCCESS;
1615	}
1616
1617	Log(("CSAMR3FlushPage: page %RRv has changed -> FLUSH (rc=%Rrc) (Phys: %RGp vs %RGp)\n", addr, rc, GCPhys, pPageRec->page.GCPhys));
1618
1619	STAM_COUNTER_ADD(&pVM->csam.s.StatNrFlushes, 1);
1620
1621	if (fRemovePage)
1622	csamRemovePageRecord(pVM, addr);
1623	else
1624	{
1625	CSAMMarkPage(pVM, addr, false);
1626	pPageRec->page.GCPhys = 0;
1627	pPageRec->page.fFlags = 0;
1628	rc = PGMGstGetPage(pVCpu, addr, &pPageRec->page.fFlags, &pPageRec->page.GCPhys);
1629	if (rc == VINF_SUCCESS)
1630	pPageRec->page.u64Hash = csamR3CalcPageHash(pVM, addr);
1631
1632	if (pPageRec->page.pBitmap == NULL)
1633	{
1634	pPageRec->page.pBitmap = (uint8_t *)MMR3HeapAllocZ(pVM, MM_TAG_CSAM_PATCH, CSAM_PAGE_BITMAP_SIZE);
1635	Assert(pPageRec->page.pBitmap);
1636	if (pPageRec->page.pBitmap == NULL)
1637	return VERR_NO_MEMORY;
1638	}
1639	else
1640	memset(pPageRec->page.pBitmap, 0, CSAM_PAGE_BITMAP_SIZE);
1641	}
1642
1643
1644	/*
1645	* Inform patch manager about the flush; no need to repeat the above check twice.
1646	*/
1647	PATMR3FlushPage(pVM, addr);
1648
1649	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1650	return VINF_SUCCESS;
1651	}
1652	else
1653	{
1654	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1655	return VWRN_CSAM_PAGE_NOT_FOUND;
1656	}
1657	}
1658
1659	/**
1660	* Notify CSAM of a page flush
1661	*
1662	* @returns VBox status code
1663	* @param pVM The VM to operate on.
1664	* @param addr GC address of the page to flush
1665	*/
1666	VMMR3DECL(int) CSAMR3FlushPage(PVM pVM, RTRCPTR addr)
1667	{
1668	return csamFlushPage(pVM, addr, true /* remove page record */);
1669	}
1670
1671	/**
1672	* Remove a CSAM monitored page. Use with care!
1673	*
1674	* @returns VBox status code
1675	* @param pVM The VM to operate on.
1676	* @param addr GC address of the page to flush
1677	*/
1678	VMMR3DECL(int) CSAMR3RemovePage(PVM pVM, RTRCPTR addr)
1679	{
1680	PCSAMPAGEREC pPageRec;
1681	int rc;
1682
1683	addr = addr & PAGE_BASE_GC_MASK;
1684
1685	pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)addr);
1686	if (pPageRec)
1687	{
1688	rc = csamRemovePageRecord(pVM, addr);
1689	if (RT_SUCCESS(rc))
1690	PATMR3FlushPage(pVM, addr);
1691	return VINF_SUCCESS;
1692	}
1693	return VWRN_CSAM_PAGE_NOT_FOUND;
1694	}
1695
1696	/**
1697	* Check a page record in case a page has been changed
1698	*
1699	* @returns VBox status code. (trap handled or not)
1700	* @param pVM The VM to operate on.
1701	* @param pInstrGC GC instruction pointer
1702	*/
1703	int csamR3CheckPageRecord(PVM pVM, RTRCPTR pInstrGC)
1704	{
1705	PCSAMPAGEREC pPageRec;
1706	uint64_t u64hash;
1707
1708	pInstrGC = pInstrGC & PAGE_BASE_GC_MASK;
1709
1710	pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)pInstrGC);
1711	if (pPageRec)
1712	{
1713	u64hash = csamR3CalcPageHash(pVM, pInstrGC);
1714	if (u64hash != pPageRec->page.u64Hash)
1715	csamFlushPage(pVM, pInstrGC, false /* don't remove page record */);
1716	}
1717	else
1718	return VWRN_CSAM_PAGE_NOT_FOUND;
1719
1720	return VINF_SUCCESS;
1721	}
1722
1723	/**
1724	* Returns monitor description based on CSAM tag
1725	*
1726	* @return description string
1727	* @param enmTag Owner tag
1728	*/
1729	const char *csamGetMonitorDescription(CSAMTAG enmTag)
1730	{
1731	if (enmTag == CSAM_TAG_PATM)
1732	return "CSAM-PATM self-modifying code monitor handler";
1733	else
1734	if (enmTag == CSAM_TAG_REM)
1735	return "CSAM-REM self-modifying code monitor handler";
1736	Assert(enmTag == CSAM_TAG_CSAM);
1737	return "CSAM self-modifying code monitor handler";
1738	}
1739
1740	/**
1741	* Adds page record to our lookup tree
1742	*
1743	* @returns CSAMPAGE ptr or NULL if failure
1744	* @param pVM The VM to operate on.
1745	* @param GCPtr Page address
1746	* @param enmTag Owner tag
1747	* @param fCode32 16 or 32 bits code
1748	* @param fMonitorInvalidation Monitor page invalidation flag
1749	*/
1750	static PCSAMPAGE csamCreatePageRecord(PVM pVM, RTRCPTR GCPtr, CSAMTAG enmTag, bool fCode32, bool fMonitorInvalidation)
1751	{
1752	PCSAMPAGEREC pPage;
1753	int rc;
1754	bool ret;
1755	Assert(pVM->cCpus == 1);
1756	PVMCPU pVCpu = VMMGetCpu0(pVM);
1757
1758	Log(("New page record for %RRv\n", GCPtr & PAGE_BASE_GC_MASK));
1759
1760	pPage = (PCSAMPAGEREC)MMR3HeapAllocZ(pVM, MM_TAG_CSAM_PATCH, sizeof(CSAMPAGEREC));
1761	if (pPage == NULL)
1762	{
1763	AssertMsgFailed(("csamCreatePageRecord: Out of memory!!!!\n"));
1764	return NULL;
1765	}
1766	/* Round down to page boundary. */
1767	GCPtr = (GCPtr & PAGE_BASE_GC_MASK);
1768	pPage->Core.Key = (AVLPVKEY)(uintptr_t)GCPtr;
1769	pPage->page.pPageGC = GCPtr;
1770	pPage->page.fCode32 = fCode32;
1771	pPage->page.fMonitorInvalidation = fMonitorInvalidation;
1772	pPage->page.enmTag = enmTag;
1773	pPage->page.fMonitorActive = false;
1774	pPage->page.pBitmap = (uint8_t *)MMR3HeapAllocZ(pVM, MM_TAG_CSAM_PATCH, PAGE_SIZE/sizeof(uint8_t));
1775	rc = PGMGstGetPage(pVCpu, GCPtr, &pPage->page.fFlags, &pPage->page.GCPhys);
1776	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1777
1778	pPage->page.u64Hash = csamR3CalcPageHash(pVM, GCPtr);
1779	ret = RTAvlPVInsert(&pVM->csam.s.pPageTree, &pPage->Core);
1780	Assert(ret);
1781
1782	#ifdef CSAM_MONITOR_CODE_PAGES
1783	AssertRelease(!fInCSAMCodePageInvalidate);
1784
1785	switch (enmTag)
1786	{
1787	case CSAM_TAG_PATM:
1788	case CSAM_TAG_REM:
1789	#ifdef CSAM_MONITOR_CSAM_CODE_PAGES
1790	case CSAM_TAG_CSAM:
1791	#endif
1792	{
1793	rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_WRITE, GCPtr, GCPtr + (PAGE_SIZE - 1) /* inclusive! */,
1794	(fMonitorInvalidation) ? CSAMCodePageInvalidate : 0, CSAMCodePageWriteHandler, "CSAMGCCodePageWriteHandler", 0,
1795	csamGetMonitorDescription(enmTag));
1796	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PGM_HANDLER_VIRTUAL_CONFLICT, ("PGMR3HandlerVirtualRegisterEx %RRv failed with %Rrc\n", GCPtr, rc));
1797	if (RT_FAILURE(rc))
1798	Log(("PGMR3HandlerVirtualRegisterEx for %RRv failed with %Rrc\n", GCPtr, rc));
1799
1800	/* Could fail, because it's already monitored. Don't treat that condition as fatal. */
1801
1802	/* Prefetch it in case it's not there yet. */
1803	rc = PGMPrefetchPage(pVCpu, GCPtr);
1804	AssertRC(rc);
1805
1806	rc = PGMShwMakePageReadonly(pVCpu, GCPtr, 0 /fFlags/);
1807	Assert(rc == VINF_SUCCESS \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT);
1808
1809	pPage->page.fMonitorActive = true;
1810	STAM_COUNTER_INC(&pVM->csam.s.StatPageMonitor);
1811	break;
1812	}
1813	default:
1814	break; /* to shut up GCC */
1815	}
1816
1817	Log(("csamCreatePageRecord %RRv GCPhys=%RGp\n", GCPtr, pPage->page.GCPhys));
1818
1819	#ifdef VBOX_WITH_STATISTICS
1820	switch (enmTag)
1821	{
1822	case CSAM_TAG_CSAM:
1823	STAM_COUNTER_INC(&pVM->csam.s.StatPageCSAM);
1824	break;
1825	case CSAM_TAG_PATM:
1826	STAM_COUNTER_INC(&pVM->csam.s.StatPagePATM);
1827	break;
1828	case CSAM_TAG_REM:
1829	STAM_COUNTER_INC(&pVM->csam.s.StatPageREM);
1830	break;
1831	default:
1832	break; /* to shut up GCC */
1833	}
1834	#endif
1835
1836	#endif
1837
1838	STAM_COUNTER_INC(&pVM->csam.s.StatNrPages);
1839	if (fMonitorInvalidation)
1840	STAM_COUNTER_INC(&pVM->csam.s.StatNrPagesInv);
1841
1842	return &pPage->page;
1843	}
1844
1845	/**
1846	* Monitors a code page (if not already monitored)
1847	*
1848	* @returns VBox status code
1849	* @param pVM The VM to operate on.
1850	* @param pPageAddrGC The page to monitor
1851	* @param enmTag Monitor tag
1852	*/
1853	VMMR3DECL(int) CSAMR3MonitorPage(PVM pVM, RTRCPTR pPageAddrGC, CSAMTAG enmTag)
1854	{
1855	PCSAMPAGEREC pPageRec = NULL;
1856	int rc;
1857	bool fMonitorInvalidation;
1858	Assert(pVM->cCpus == 1);
1859	PVMCPU pVCpu = VMMGetCpu0(pVM);
1860
1861	/* Dirty pages must be handled before calling this function!. */
1862	Assert(!pVM->csam.s.cDirtyPages);
1863
1864	if (pVM->csam.s.fScanningStarted == false)
1865	return VINF_SUCCESS; /* too early */
1866
1867	pPageAddrGC &= PAGE_BASE_GC_MASK;
1868
1869	Log(("CSAMR3MonitorPage %RRv %d\n", pPageAddrGC, enmTag));
1870
1871	/** @todo implicit assumption */
1872	fMonitorInvalidation = (enmTag == CSAM_TAG_PATM);
1873
1874	pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)pPageAddrGC);
1875	if (pPageRec == NULL)
1876	{
1877	uint64_t fFlags;
1878
1879	rc = PGMGstGetPage(pVCpu, pPageAddrGC, &fFlags, NULL);
1880	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1881	if ( rc == VINF_SUCCESS
1882	&& (fFlags & X86_PTE_US))
1883	{
1884	/* We don't care about user pages. */
1885	STAM_COUNTER_INC(&pVM->csam.s.StatNrUserPages);
1886	return VINF_SUCCESS;
1887	}
1888
1889	csamCreatePageRecord(pVM, pPageAddrGC, enmTag, true /* 32 bits code */, fMonitorInvalidation);
1890
1891	pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)pPageAddrGC);
1892	Assert(pPageRec);
1893	}
1894	/** @todo reference count */
1895
1896	#ifdef CSAM_MONITOR_CSAM_CODE_PAGES
1897	Assert(pPageRec->page.fMonitorActive);
1898	#endif
1899
1900	#ifdef CSAM_MONITOR_CODE_PAGES
1901	if (!pPageRec->page.fMonitorActive)
1902	{
1903	Log(("CSAMR3MonitorPage: activate monitoring for %RRv\n", pPageAddrGC));
1904
1905	rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_WRITE, pPageAddrGC, pPageAddrGC + (PAGE_SIZE - 1) /* inclusive! */,
1906	(fMonitorInvalidation) ? CSAMCodePageInvalidate : 0, CSAMCodePageWriteHandler, "CSAMGCCodePageWriteHandler", 0,
1907	csamGetMonitorDescription(enmTag));
1908	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PGM_HANDLER_VIRTUAL_CONFLICT, ("PGMR3HandlerVirtualRegisterEx %RRv failed with %Rrc\n", pPageAddrGC, rc));
1909	if (RT_FAILURE(rc))
1910	Log(("PGMR3HandlerVirtualRegisterEx for %RRv failed with %Rrc\n", pPageAddrGC, rc));
1911
1912	/* Could fail, because it's already monitored. Don't treat that condition as fatal. */
1913
1914	/* Prefetch it in case it's not there yet. */
1915	rc = PGMPrefetchPage(pVCpu, pPageAddrGC);
1916	AssertRC(rc);
1917
1918	rc = PGMShwMakePageReadonly(pVCpu, pPageAddrGC, 0 /fFlags/);
1919	Assert(rc == VINF_SUCCESS \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT);
1920
1921	STAM_COUNTER_INC(&pVM->csam.s.StatPageMonitor);
1922
1923	pPageRec->page.fMonitorActive = true;
1924	pPageRec->page.fMonitorInvalidation = fMonitorInvalidation;
1925	}
1926	else
1927	if ( !pPageRec->page.fMonitorInvalidation
1928	&& fMonitorInvalidation)
1929	{
1930	Assert(pPageRec->page.fMonitorActive);
1931	PGMHandlerVirtualChangeInvalidateCallback(pVM, pPageRec->page.pPageGC, CSAMCodePageInvalidate);
1932	pPageRec->page.fMonitorInvalidation = true;
1933	STAM_COUNTER_INC(&pVM->csam.s.StatNrPagesInv);
1934
1935	/* Prefetch it in case it's not there yet. */
1936	rc = PGMPrefetchPage(pVCpu, pPageAddrGC);
1937	AssertRC(rc);
1938
1939	/* Make sure it's readonly. Page invalidation may have modified the attributes. */
1940	rc = PGMShwMakePageReadonly(pVCpu, pPageAddrGC, 0 /fFlags/);
1941	Assert(rc == VINF_SUCCESS \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT);
1942	}
1943
1944	#if 0 /* def VBOX_STRICT -> very annoying) */
1945	if (pPageRec->page.fMonitorActive)
1946	{
1947	uint64_t fPageShw;
1948	RTHCPHYS GCPhys;
1949	rc = PGMShwGetPage(pVCpu, pPageAddrGC, &fPageShw, &GCPhys);
1950	// AssertMsg( (rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT)
1951	// \|\| !(fPageShw & X86_PTE_RW)
1952	// \|\| (pPageRec->page.GCPhys == 0), ("Shadow page flags for %RRv (%RHp) aren't readonly (%RX64)!!\n", pPageAddrGC, GCPhys, fPageShw));
1953	}
1954	#endif
1955
1956	if (pPageRec->page.GCPhys == 0)
1957	{
1958	/* Prefetch it in case it's not there yet. */
1959	rc = PGMPrefetchPage(pVCpu, pPageAddrGC);
1960	AssertRC(rc);
1961	/* The page was changed behind our back. It won't be made read-only until the next SyncCR3, so force it here. */
1962	rc = PGMShwMakePageReadonly(pVCpu, pPageAddrGC, 0 /fFlags/);
1963	Assert(rc == VINF_SUCCESS \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT);
1964	}
1965	#endif /* CSAM_MONITOR_CODE_PAGES */
1966	return VINF_SUCCESS;
1967	}
1968
1969	/**
1970	* Unmonitors a code page
1971	*
1972	* @returns VBox status code
1973	* @param pVM The VM to operate on.
1974	* @param pPageAddrGC The page to monitor
1975	* @param enmTag Monitor tag
1976	*/
1977	VMMR3DECL(int) CSAMR3UnmonitorPage(PVM pVM, RTRCPTR pPageAddrGC, CSAMTAG enmTag)
1978	{
1979	pPageAddrGC &= PAGE_BASE_GC_MASK;
1980
1981	Log(("CSAMR3UnmonitorPage %RRv %d\n", pPageAddrGC, enmTag));
1982
1983	Assert(enmTag == CSAM_TAG_REM);
1984
1985	#ifdef VBOX_STRICT
1986	PCSAMPAGEREC pPageRec;
1987
1988	pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)pPageAddrGC);
1989	Assert(pPageRec && pPageRec->page.enmTag == enmTag);
1990	#endif
1991	return CSAMR3RemovePage(pVM, pPageAddrGC);
1992	}
1993
1994	/**
1995	* Removes a page record from our lookup tree
1996	*
1997	* @returns VBox status code
1998	* @param pVM The VM to operate on.
1999	* @param GCPtr Page address
2000	*/
2001	static int csamRemovePageRecord(PVM pVM, RTRCPTR GCPtr)
2002	{
2003	PCSAMPAGEREC pPageRec;
2004	Assert(pVM->cCpus == 1);
2005	PVMCPU pVCpu = VMMGetCpu0(pVM);
2006
2007	Log(("csamRemovePageRecord %RRv\n", GCPtr));
2008	pPageRec = (PCSAMPAGEREC)RTAvlPVRemove(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)GCPtr);
2009
2010	if (pPageRec)
2011	{
2012	STAM_COUNTER_INC(&pVM->csam.s.StatNrRemovedPages);
2013
2014	#ifdef CSAM_MONITOR_CODE_PAGES
2015	if (pPageRec->page.fMonitorActive)
2016	{
2017	/* @todo -> this is expensive (cr3 reload)!!!
2018	* if this happens often, then reuse it instead!!!
2019	*/
2020	Assert(!fInCSAMCodePageInvalidate);
2021	STAM_COUNTER_DEC(&pVM->csam.s.StatPageMonitor);
2022	PGMHandlerVirtualDeregister(pVM, GCPtr);
2023	}
2024	if (pPageRec->page.enmTag == CSAM_TAG_PATM)
2025	{
2026	/* Make sure the recompiler flushes its cache as this page is no longer monitored. */
2027	STAM_COUNTER_INC(&pVM->csam.s.StatPageRemoveREMFlush);
2028	CPUMSetChangedFlags(pVCpu, CPUM_CHANGED_GLOBAL_TLB_FLUSH);
2029	}
2030	#endif
2031
2032	#ifdef VBOX_WITH_STATISTICS
2033	switch (pPageRec->page.enmTag)
2034	{
2035	case CSAM_TAG_CSAM:
2036	STAM_COUNTER_DEC(&pVM->csam.s.StatPageCSAM);
2037	break;
2038	case CSAM_TAG_PATM:
2039	STAM_COUNTER_DEC(&pVM->csam.s.StatPagePATM);
2040	break;
2041	case CSAM_TAG_REM:
2042	STAM_COUNTER_DEC(&pVM->csam.s.StatPageREM);
2043	break;
2044	default:
2045	break; /* to shut up GCC */
2046	}
2047	#endif
2048
2049	if (pPageRec->page.pBitmap) MMR3HeapFree(pPageRec->page.pBitmap);
2050	MMR3HeapFree(pPageRec);
2051	}
2052	else
2053	AssertFailed();
2054
2055	return VINF_SUCCESS;
2056	}
2057
2058	/**
2059	* Callback for delayed writes from non-EMT threads
2060	*
2061	* @param pVM VM Handle.
2062	* @param GCPtr The virtual address the guest is writing to. (not correct if it's an alias!)
2063	* @param cbBuf How much it's reading/writing.
2064	*/
2065	static DECLCALLBACK(void) CSAMDelayedWriteHandler(PVM pVM, RTRCPTR GCPtr, size_t cbBuf)
2066	{
2067	int rc = PATMR3PatchWrite(pVM, GCPtr, (uint32_t)cbBuf);
2068	AssertRC(rc);
2069	}
2070
2071	/**
2072	* \#PF Handler callback for virtual access handler ranges.
2073	*
2074	* Important to realize that a physical page in a range can have aliases, and
2075	* for ALL and WRITE handlers these will also trigger.
2076	*
2077	* @returns VINF_SUCCESS if the handler have carried out the operation.
2078	* @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
2079	* @param pVM VM Handle.
2080	* @param GCPtr The virtual address the guest is writing to. (not correct if it's an alias!)
2081	* @param pvPtr The HC mapping of that address.
2082	* @param pvBuf What the guest is reading/writing.
2083	* @param cbBuf How much it's reading/writing.
2084	* @param enmAccessType The access type.
2085	* @param pvUser User argument.
2086	*/
2087	static DECLCALLBACK(int) CSAMCodePageWriteHandler(PVM pVM, RTGCPTR GCPtr, void pvPtr, void pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
2088	{
2089	int rc;
2090
2091	Assert(enmAccessType == PGMACCESSTYPE_WRITE); NOREF(enmAccessType);
2092	Log(("CSAMCodePageWriteHandler: write to %RGv size=%zu\n", GCPtr, cbBuf));
2093	NOREF(pvUser);
2094
2095	if ( PAGE_ADDRESS(pvPtr) == PAGE_ADDRESS((uintptr_t)pvPtr + cbBuf - 1)
2096	&& !memcmp(pvPtr, pvBuf, cbBuf))
2097	{
2098	Log(("CSAMCodePageWriteHandler: dummy write -> ignore\n"));
2099	return VINF_PGM_HANDLER_DO_DEFAULT;
2100	}
2101
2102	if (VM_IS_EMT(pVM))
2103	rc = PATMR3PatchWrite(pVM, GCPtr, (uint32_t)cbBuf);
2104	else
2105	{
2106	/* Queue the write instead otherwise we'll get concurrency issues. */
2107	/** @note in theory not correct to let it write the data first before disabling a patch!
2108	* (if it writes the same data as the patch jump and we replace it with obsolete opcodes)
2109	*/
2110	Log(("CSAMCodePageWriteHandler: delayed write!\n"));
2111	AssertCompileSize(RTRCPTR, 4);
2112	rc = VMR3ReqCallVoidNoWait(pVM, VMCPUID_ANY, (PFNRT)CSAMDelayedWriteHandler, 3, pVM, (RTRCPTR)GCPtr, cbBuf);
2113	}
2114	AssertRC(rc);
2115
2116	return VINF_PGM_HANDLER_DO_DEFAULT;
2117	}
2118
2119	/**
2120	* \#PF Handler callback for invalidation of virtual access handler ranges.
2121	*
2122	* @param pVM VM Handle.
2123	* @param GCPtr The virtual address the guest has changed.
2124	*/
2125	static DECLCALLBACK(int) CSAMCodePageInvalidate(PVM pVM, RTGCPTR GCPtr)
2126	{
2127	fInCSAMCodePageInvalidate = true;
2128	LogFlow(("CSAMCodePageInvalidate %RGv\n", GCPtr));
2129	/** @todo We can't remove the page (which unregisters the virtual handler) as we are called from a DoWithAll on the virtual handler tree. Argh. */
2130	csamFlushPage(pVM, GCPtr, false /* don't remove page! */);
2131	fInCSAMCodePageInvalidate = false;
2132	return VINF_SUCCESS;
2133	}
2134
2135	/**
2136	* Check if the current instruction has already been checked before
2137	*
2138	* @returns VBox status code. (trap handled or not)
2139	* @param pVM The VM to operate on.
2140	* @param pInstr Instruction pointer
2141	* @param pPage CSAM patch structure pointer
2142	*/
2143	bool csamIsCodeScanned(PVM pVM, RTRCPTR pInstr, PCSAMPAGE *pPage)
2144	{
2145	PCSAMPAGEREC pPageRec;
2146	uint32_t offset;
2147
2148	STAM_PROFILE_START(&pVM->csam.s.StatTimeCheckAddr, a);
2149
2150	offset = pInstr & PAGE_OFFSET_MASK;
2151	pInstr = pInstr & PAGE_BASE_GC_MASK;
2152
2153	Assert(pPage);
2154
2155	if (pPage && (pPage)->pPageGC == pInstr)
2156	{
2157	if ((pPage)->pBitmap == NULL \|\| ASMBitTest((pPage)->pBitmap, offset))
2158	{
2159	STAM_COUNTER_ADD(&pVM->csam.s.StatNrKnownPagesHC, 1);
2160	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeCheckAddr, a);
2161	return true;
2162	}
2163	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeCheckAddr, a);
2164	return false;
2165	}
2166
2167	pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)pInstr);
2168	if (pPageRec)
2169	{
2170	if (pPage) *pPage= &pPageRec->page;
2171	if (pPageRec->page.pBitmap == NULL \|\| ASMBitTest(pPageRec->page.pBitmap, offset))
2172	{
2173	STAM_COUNTER_ADD(&pVM->csam.s.StatNrKnownPagesHC, 1);
2174	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeCheckAddr, a);
2175	return true;
2176	}
2177	}
2178	else
2179	{
2180	if (pPage) *pPage = NULL;
2181	}
2182	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeCheckAddr, a);
2183	return false;
2184	}
2185
2186	/**
2187	* Mark an instruction in a page as scanned/not scanned
2188	*
2189	* @param pVM The VM to operate on.
2190	* @param pPage Patch structure pointer
2191	* @param pInstr Instruction pointer
2192	* @param opsize Instruction size
2193	* @param fScanned Mark as scanned or not
2194	*/
2195	static void csamMarkCode(PVM pVM, PCSAMPAGE pPage, RTRCPTR pInstr, uint32_t opsize, bool fScanned)
2196	{
2197	LogFlow(("csamMarkCodeAsScanned %RRv opsize=%d\n", pInstr, opsize));
2198	CSAMMarkPage(pVM, pInstr, fScanned);
2199
2200	/** @todo should recreate empty bitmap if !fScanned */
2201	if (pPage->pBitmap == NULL)
2202	return;
2203
2204	if (fScanned)
2205	{
2206	// retn instructions can be scanned more than once
2207	if (ASMBitTest(pPage->pBitmap, pInstr & PAGE_OFFSET_MASK) == 0)
2208	{
2209	pPage->uSize += opsize;
2210	STAM_COUNTER_ADD(&pVM->csam.s.StatNrInstr, 1);
2211	}
2212	if (pPage->uSize >= PAGE_SIZE)
2213	{
2214	Log(("Scanned full page (%RRv) -> free bitmap\n", pInstr & PAGE_BASE_GC_MASK));
2215	MMR3HeapFree(pPage->pBitmap);
2216	pPage->pBitmap = NULL;
2217	}
2218	else
2219	ASMBitSet(pPage->pBitmap, pInstr & PAGE_OFFSET_MASK);
2220	}
2221	else
2222	ASMBitClear(pPage->pBitmap, pInstr & PAGE_OFFSET_MASK);
2223	}
2224
2225	/**
2226	* Mark an instruction in a page as scanned/not scanned
2227	*
2228	* @returns VBox status code.
2229	* @param pVM The VM to operate on.
2230	* @param pInstr Instruction pointer
2231	* @param opsize Instruction size
2232	* @param fScanned Mark as scanned or not
2233	*/
2234	VMMR3DECL(int) CSAMR3MarkCode(PVM pVM, RTRCPTR pInstr, uint32_t opsize, bool fScanned)
2235	{
2236	PCSAMPAGE pPage = 0;
2237
2238	Assert(!fScanned); /* other case not implemented. */
2239	Assert(!PATMIsPatchGCAddr(pVM, pInstr));
2240
2241	if (csamIsCodeScanned(pVM, pInstr, &pPage) == false)
2242	{
2243	Assert(fScanned == true); /* other case should not be possible */
2244	return VINF_SUCCESS;
2245	}
2246
2247	Log(("CSAMR3MarkCode: %RRv size=%d fScanned=%d\n", pInstr, opsize, fScanned));
2248	csamMarkCode(pVM, pPage, pInstr, opsize, fScanned);
2249	return VINF_SUCCESS;
2250	}
2251
2252
2253	/**
2254	* Scan and analyse code
2255	*
2256	* @returns VBox status code.
2257	* @param pVM The VM to operate on.
2258	* @param pCtxCore CPU context
2259	* @param pInstrGC Instruction pointer
2260	*/
2261	VMMR3DECL(int) CSAMR3CheckCodeEx(PVM pVM, PCPUMCTXCORE pCtxCore, RTRCPTR pInstrGC)
2262	{
2263	if (EMIsRawRing0Enabled(pVM) == false \|\| PATMIsPatchGCAddr(pVM, pInstrGC) == true)
2264	{
2265	// No use
2266	return VINF_SUCCESS;
2267	}
2268
2269	if (CSAMIsEnabled(pVM))
2270	{
2271	/* Assuming 32 bits code for now. */
2272	Assert(SELMGetCpuModeFromSelector(pVM, pCtxCore->eflags, pCtxCore->cs, &pCtxCore->csHid) == CPUMODE_32BIT);
2273
2274	pInstrGC = SELMToFlat(pVM, DIS_SELREG_CS, pCtxCore, pInstrGC);
2275	return CSAMR3CheckCode(pVM, pInstrGC);
2276	}
2277	return VINF_SUCCESS;
2278	}
2279
2280	/**
2281	* Scan and analyse code
2282	*
2283	* @returns VBox status code.
2284	* @param pVM The VM to operate on.
2285	* @param pInstrGC Instruction pointer (0:32 virtual address)
2286	*/
2287	VMMR3DECL(int) CSAMR3CheckCode(PVM pVM, RTRCPTR pInstrGC)
2288	{
2289	int rc;
2290	PCSAMPAGE pPage = NULL;
2291
2292	if ( EMIsRawRing0Enabled(pVM) == false
2293	\|\| PATMIsPatchGCAddr(pVM, pInstrGC) == true)
2294	{
2295	/* Not active. */
2296	return VINF_SUCCESS;
2297	}
2298
2299	if (CSAMIsEnabled(pVM))
2300	{
2301	/* Cache record for CSAMGCVirtToHCVirt */
2302	CSAMP2GLOOKUPREC cacheRec;
2303	RT_ZERO(cacheRec);
2304
2305	STAM_PROFILE_START(&pVM->csam.s.StatTime, a);
2306	rc = csamAnalyseCallCodeStream(pVM, pInstrGC, pInstrGC, true /* 32 bits code */, CSAMR3AnalyseCallback, pPage, &cacheRec);
2307	STAM_PROFILE_STOP(&pVM->csam.s.StatTime, a);
2308	if (cacheRec.Lock.pvMap)
2309	PGMPhysReleasePageMappingLock(pVM, &cacheRec.Lock);
2310
2311	if (rc != VINF_SUCCESS)
2312	{
2313	Log(("csamAnalyseCodeStream failed with %d\n", rc));
2314	return rc;
2315	}
2316	}
2317	return VINF_SUCCESS;
2318	}
2319
2320	/**
2321	* Flush dirty code pages
2322	*
2323	* @returns VBox status code.
2324	* @param pVM The VM to operate on.
2325	*/
2326	static int csamR3FlushDirtyPages(PVM pVM)
2327	{
2328	Assert(pVM->cCpus == 1);
2329	PVMCPU pVCpu = VMMGetCpu0(pVM);
2330
2331	STAM_PROFILE_START(&pVM->csam.s.StatFlushDirtyPages, a);
2332
2333	for (uint32_t i=0;i<pVM->csam.s.cDirtyPages;i++)
2334	{
2335	int rc;
2336	PCSAMPAGEREC pPageRec;
2337	RTRCPTR GCPtr = pVM->csam.s.pvDirtyBasePage[i];
2338
2339	GCPtr = GCPtr & PAGE_BASE_GC_MASK;
2340
2341	/* Notify the recompiler that this page has been changed. */
2342	REMR3NotifyCodePageChanged(pVM, pVCpu, GCPtr);
2343
2344	/* Enable write protection again. (use the fault address as it might be an alias) */
2345	rc = PGMShwMakePageReadonly(pVCpu, pVM->csam.s.pvDirtyFaultPage[i], 0 /fFlags/);
2346	Assert(rc == VINF_SUCCESS \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT);
2347
2348	Log(("CSAMR3FlushDirtyPages: flush %RRv (modifypage rc=%Rrc)\n", pVM->csam.s.pvDirtyBasePage[i], rc));
2349
2350	pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)GCPtr);
2351	if (pPageRec && pPageRec->page.enmTag == CSAM_TAG_REM)
2352	{
2353	uint64_t fFlags;
2354
2355	rc = PGMGstGetPage(pVCpu, GCPtr, &fFlags, NULL);
2356	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
2357	if ( rc == VINF_SUCCESS
2358	&& (fFlags & X86_PTE_US))
2359	{
2360	/* We don't care about user pages. */
2361	csamRemovePageRecord(pVM, GCPtr);
2362	STAM_COUNTER_INC(&pVM->csam.s.StatNrUserPages);
2363	}
2364	}
2365	}
2366	pVM->csam.s.cDirtyPages = 0;
2367	STAM_PROFILE_STOP(&pVM->csam.s.StatFlushDirtyPages, a);
2368	return VINF_SUCCESS;
2369	}
2370
2371	/**
2372	* Flush potential new code pages
2373	*
2374	* @returns VBox status code.
2375	* @param pVM The VM to operate on.
2376	*/
2377	static int csamR3FlushCodePages(PVM pVM)
2378	{
2379	Assert(pVM->cCpus == 1);
2380	PVMCPU pVCpu = VMMGetCpu0(pVM);
2381
2382	for (uint32_t i=0;i<pVM->csam.s.cPossibleCodePages;i++)
2383	{
2384	RTRCPTR GCPtr = pVM->csam.s.pvPossibleCodePage[i];
2385
2386	GCPtr = GCPtr & PAGE_BASE_GC_MASK;
2387
2388	Log(("csamR3FlushCodePages: %RRv\n", GCPtr));
2389	PGMShwMakePageNotPresent(pVCpu, GCPtr, 0 /fFlags/);
2390	/* Resync the page to make sure instruction fetch will fault */
2391	CSAMMarkPage(pVM, GCPtr, false);
2392	}
2393	pVM->csam.s.cPossibleCodePages = 0;
2394	return VINF_SUCCESS;
2395	}
2396
2397	/**
2398	* Perform any pending actions
2399	*
2400	* @returns VBox status code.
2401	* @param pVM The VM to operate on.
2402	* @param pVCpu The VMCPU to operate on.
2403	*/
2404	VMMR3DECL(int) CSAMR3DoPendingAction(PVM pVM, PVMCPU pVCpu)
2405	{
2406	csamR3FlushDirtyPages(pVM);
2407	csamR3FlushCodePages(pVM);
2408
2409	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_CSAM_PENDING_ACTION);
2410	return VINF_SUCCESS;
2411	}
2412
2413	/**
2414	* Analyse interrupt and trap gates
2415	*
2416	* @returns VBox status code.
2417	* @param pVM The VM to operate on.
2418	* @param iGate Start gate
2419	* @param cGates Number of gates to check
2420	*/
2421	VMMR3DECL(int) CSAMR3CheckGates(PVM pVM, uint32_t iGate, uint32_t cGates)
2422	{
2423	Assert(pVM->cCpus == 1);
2424	PVMCPU pVCpu = VMMGetCpu0(pVM);
2425	uint16_t cbIDT;
2426	RTRCPTR GCPtrIDT = CPUMGetGuestIDTR(pVCpu, &cbIDT);
2427	uint32_t iGateEnd;
2428	uint32_t maxGates;
2429	VBOXIDTE aIDT[256];
2430	PVBOXIDTE pGuestIdte;
2431	int rc;
2432
2433	if (EMIsRawRing0Enabled(pVM) == false)
2434	{
2435	/* Enabling interrupt gates only works when raw ring 0 is enabled. */
2436	//AssertFailed();
2437	return VINF_SUCCESS;
2438	}
2439
2440	/* We only check all gates once during a session */
2441	if ( !pVM->csam.s.fGatesChecked
2442	&& cGates != 256)
2443	return VINF_SUCCESS; /* too early */
2444
2445	/* We only check all gates once during a session */
2446	if ( pVM->csam.s.fGatesChecked
2447	&& cGates != 1)
2448	return VINF_SUCCESS; /* ignored */
2449
2450	Assert(cGates <= 256);
2451	if (!GCPtrIDT \|\| cGates > 256)
2452	return VERR_INVALID_PARAMETER;
2453
2454	if (cGates != 1)
2455	{
2456	pVM->csam.s.fGatesChecked = true;
2457	for (unsigned i=0;i<RT_ELEMENTS(pVM->csam.s.pvCallInstruction);i++)
2458	{
2459	RTRCPTR pHandler = pVM->csam.s.pvCallInstruction[i];
2460
2461	if (pHandler)
2462	{
2463	PCSAMPAGE pPage = NULL;
2464	CSAMP2GLOOKUPREC cacheRec; /* Cache record for CSAMGCVirtToHCVirt. */
2465	RT_ZERO(cacheRec);
2466
2467	Log(("CSAMCheckGates: checking previous call instruction %RRv\n", pHandler));
2468	STAM_PROFILE_START(&pVM->csam.s.StatTime, a);
2469	rc = csamAnalyseCodeStream(pVM, pHandler, pHandler, true, CSAMR3AnalyseCallback, pPage, &cacheRec);
2470	STAM_PROFILE_STOP(&pVM->csam.s.StatTime, a);
2471	if (cacheRec.Lock.pvMap)
2472	PGMPhysReleasePageMappingLock(pVM, &cacheRec.Lock);
2473
2474	if (rc != VINF_SUCCESS)
2475	{
2476	Log(("CSAMCheckGates: csamAnalyseCodeStream failed with %d\n", rc));
2477	continue;
2478	}
2479	}
2480	}
2481	}
2482
2483	/* Determine valid upper boundary. */
2484	maxGates = (cbIDT+1) / sizeof(VBOXIDTE);
2485	Assert(iGate < maxGates);
2486	if (iGate > maxGates)
2487	return VERR_INVALID_PARAMETER;
2488
2489	if (iGate + cGates > maxGates)
2490	cGates = maxGates - iGate;
2491
2492	GCPtrIDT = GCPtrIDT + iGate * sizeof(VBOXIDTE);
2493	iGateEnd = iGate + cGates;
2494
2495	STAM_PROFILE_START(&pVM->csam.s.StatCheckGates, a);
2496
2497	/*
2498	* Get IDT entries.
2499	*/
2500	rc = PGMPhysSimpleReadGCPtr(pVCpu, aIDT, GCPtrIDT, cGates*sizeof(VBOXIDTE));
2501	if (RT_FAILURE(rc))
2502	{
2503	AssertMsgRC(rc, ("Failed to read IDTE! rc=%Rrc\n", rc));
2504	STAM_PROFILE_STOP(&pVM->csam.s.StatCheckGates, a);
2505	return rc;
2506	}
2507	pGuestIdte = &aIDT[0];
2508
2509	for (/iGate/; iGate<iGateEnd; iGate++, pGuestIdte++)
2510	{
2511	Assert(TRPMR3GetGuestTrapHandler(pVM, iGate) == TRPM_INVALID_HANDLER);
2512
2513	if ( pGuestIdte->Gen.u1Present
2514	&& (pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32 \|\| pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_INT_32)
2515	&& (pGuestIdte->Gen.u2DPL == 3 \|\| pGuestIdte->Gen.u2DPL == 0)
2516	)
2517	{
2518	RTRCPTR pHandler;
2519	PCSAMPAGE pPage = NULL;
2520	DBGFSELINFO selInfo;
2521	CSAMP2GLOOKUPREC cacheRec; /* Cache record for CSAMGCVirtToHCVirt. */
2522	RT_ZERO(cacheRec);
2523
2524	pHandler = VBOXIDTE_OFFSET(*pGuestIdte);
2525	pHandler = SELMToFlatBySel(pVM, pGuestIdte->Gen.u16SegSel, pHandler);
2526
2527	rc = SELMR3GetSelectorInfo(pVM, pVCpu, pGuestIdte->Gen.u16SegSel, &selInfo);
2528	if ( RT_FAILURE(rc)
2529	\|\| (selInfo.fFlags & (DBGFSELINFO_FLAGS_NOT_PRESENT \| DBGFSELINFO_FLAGS_INVALID))
2530	\|\| selInfo.GCPtrBase != 0
2531	\|\| selInfo.cbLimit != ~0U
2532	)
2533	{
2534	/* Refuse to patch a handler whose idt cs selector isn't wide open. */
2535	Log(("CSAMCheckGates: check gate %d failed due to rc %Rrc GCPtrBase=%RRv limit=%x\n", iGate, rc, selInfo.GCPtrBase, selInfo.cbLimit));
2536	continue;
2537	}
2538
2539
2540	if (pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32)
2541	{
2542	Log(("CSAMCheckGates: check trap gate %d at %04X:%08X (flat %RRv)\n", iGate, pGuestIdte->Gen.u16SegSel, VBOXIDTE_OFFSET(*pGuestIdte), pHandler));
2543	}
2544	else
2545	{
2546	Log(("CSAMCheckGates: check interrupt gate %d at %04X:%08X (flat %RRv)\n", iGate, pGuestIdte->Gen.u16SegSel, VBOXIDTE_OFFSET(*pGuestIdte), pHandler));
2547	}
2548
2549	STAM_PROFILE_START(&pVM->csam.s.StatTime, b);
2550	rc = csamAnalyseCodeStream(pVM, pHandler, pHandler, true, CSAMR3AnalyseCallback, pPage, &cacheRec);
2551	STAM_PROFILE_STOP(&pVM->csam.s.StatTime, b);
2552	if (cacheRec.Lock.pvMap)
2553	PGMPhysReleasePageMappingLock(pVM, &cacheRec.Lock);
2554
2555	if (rc != VINF_SUCCESS)
2556	{
2557	Log(("CSAMCheckGates: csamAnalyseCodeStream failed with %d\n", rc));
2558	continue;
2559	}
2560	/* OpenBSD guest specific patch test. */
2561	if (iGate >= 0x20)
2562	{
2563	PCPUMCTX pCtx;
2564	DISCPUSTATE cpu;
2565	RTGCUINTPTR32 aOpenBsdPushCSOffset[3] = {0x03, /* OpenBSD 3.7 & 3.8 */
2566	0x2B, /* OpenBSD 4.0 installation ISO */
2567	0x2F}; /* OpenBSD 4.0 after install */
2568
2569	pCtx = CPUMQueryGuestCtxPtr(pVCpu);
2570
2571	for (unsigned i=0;i<RT_ELEMENTS(aOpenBsdPushCSOffset);i++)
2572	{
2573	rc = CPUMR3DisasmInstrCPU(pVM, pVCpu, pCtx, pHandler - aOpenBsdPushCSOffset[i], &cpu, NULL);
2574	if ( rc == VINF_SUCCESS
2575	&& cpu.pCurInstr->opcode == OP_PUSH
2576	&& cpu.pCurInstr->param1 == OP_PARM_REG_CS)
2577	{
2578	rc = PATMR3InstallPatch(pVM, pHandler - aOpenBsdPushCSOffset[i], PATMFL_CODE32 \| PATMFL_GUEST_SPECIFIC);
2579	if (RT_SUCCESS(rc))
2580	Log(("Installed OpenBSD interrupt handler prefix instruction (push cs) patch\n"));
2581	}
2582	}
2583	}
2584
2585	/* Trap gates and certain interrupt gates. */
2586	uint32_t fPatchFlags = PATMFL_CODE32 \| PATMFL_IDTHANDLER;
2587
2588	if (pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32)
2589	fPatchFlags \|= PATMFL_TRAPHANDLER;
2590	else
2591	fPatchFlags \|= PATMFL_INTHANDLER;
2592
2593	switch (iGate) {
2594	case 8:
2595	case 10:
2596	case 11:
2597	case 12:
2598	case 13:
2599	case 14:
2600	case 17:
2601	fPatchFlags \|= PATMFL_TRAPHANDLER_WITH_ERRORCODE;
2602	break;
2603	default:
2604	/* No error code. */
2605	break;
2606	}
2607
2608	Log(("Installing %s gate handler for 0x%X at %RRv\n", (pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32) ? "trap" : "intr", iGate, pHandler));
2609
2610	rc = PATMR3InstallPatch(pVM, pHandler, fPatchFlags);
2611	if (RT_SUCCESS(rc) \|\| rc == VERR_PATM_ALREADY_PATCHED)
2612	{
2613	Log(("Gate handler 0x%X is SAFE!\n", iGate));
2614
2615	RTRCPTR pNewHandlerGC = PATMR3QueryPatchGCPtr(pVM, pHandler);
2616	if (pNewHandlerGC)
2617	{
2618	rc = TRPMR3SetGuestTrapHandler(pVM, iGate, pNewHandlerGC);
2619	if (RT_FAILURE(rc))
2620	Log(("TRPMR3SetGuestTrapHandler %d failed with %Rrc\n", iGate, rc));
2621	}
2622	}
2623	}
2624	} /* for */
2625	STAM_PROFILE_STOP(&pVM->csam.s.StatCheckGates, a);
2626	return VINF_SUCCESS;
2627	}
2628
2629	/**
2630	* Record previous call instruction addresses
2631	*
2632	* @returns VBox status code.
2633	* @param pVM The VM to operate on.
2634	* @param GCPtrCall Call address
2635	*/
2636	VMMR3DECL(int) CSAMR3RecordCallAddress(PVM pVM, RTRCPTR GCPtrCall)
2637	{
2638	for (unsigned i=0;i<RT_ELEMENTS(pVM->csam.s.pvCallInstruction);i++)
2639	{
2640	if (pVM->csam.s.pvCallInstruction[i] == GCPtrCall)
2641	return VINF_SUCCESS;
2642	}
2643
2644	Log(("CSAMR3RecordCallAddress %RRv\n", GCPtrCall));
2645
2646	pVM->csam.s.pvCallInstruction[pVM->csam.s.iCallInstruction++] = GCPtrCall;
2647	if (pVM->csam.s.iCallInstruction >= RT_ELEMENTS(pVM->csam.s.pvCallInstruction))
2648	pVM->csam.s.iCallInstruction = 0;
2649
2650	return VINF_SUCCESS;
2651	}
2652
2653
2654	/**
2655	* Query CSAM state (enabled/disabled)
2656	*
2657	* @returns 0 - disabled, 1 - enabled
2658	* @param pVM The VM to operate on.
2659	*/
2660	VMMR3DECL(int) CSAMR3IsEnabled(PVM pVM)
2661	{
2662	return pVM->fCSAMEnabled;
2663	}
2664
2665	#ifdef VBOX_WITH_DEBUGGER
2666
2667	/**
2668	* The '.csamoff' command.
2669	*
2670	* @returns VBox status.
2671	* @param pCmd Pointer to the command descriptor (as registered).
2672	* @param pCmdHlp Pointer to command helper functions.
2673	* @param pVM Pointer to the current VM (if any).
2674	* @param paArgs Pointer to (readonly) array of arguments.
2675	* @param cArgs Number of arguments in the array.
2676	*/
2677	static DECLCALLBACK(int) csamr3CmdOff(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PVM pVM, PCDBGCVAR paArgs, unsigned cArgs)
2678	{
2679	DBGC_CMDHLP_REQ_VM_RET(pCmdHlp, pCmd, pVM);
2680	NOREF(cArgs); NOREF(paArgs);
2681
2682	int rc = CSAMDisableScanning(pVM);
2683	if (RT_FAILURE(rc))
2684	return DBGCCmdHlpFailRc(pCmdHlp, pCmd, rc, "CSAMDisableScanning");
2685	return DBGCCmdHlpPrintf(pCmdHlp, "CSAM Scanning disabled\n");
2686	}
2687
2688	/**
2689	* The '.csamon' command.
2690	*
2691	* @returns VBox status.
2692	* @param pCmd Pointer to the command descriptor (as registered).
2693	* @param pCmdHlp Pointer to command helper functions.
2694	* @param pVM Pointer to the current VM (if any).
2695	* @param paArgs Pointer to (readonly) array of arguments.
2696	* @param cArgs Number of arguments in the array.
2697	*/
2698	static DECLCALLBACK(int) csamr3CmdOn(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PVM pVM, PCDBGCVAR paArgs, unsigned cArgs)
2699	{
2700	DBGC_CMDHLP_REQ_VM_RET(pCmdHlp, pCmd, pVM);
2701	NOREF(cArgs); NOREF(paArgs);
2702
2703	int rc = CSAMEnableScanning(pVM);
2704	if (RT_FAILURE(rc))
2705	return DBGCCmdHlpFailRc(pCmdHlp, pCmd, rc, "CSAMEnableScanning");
2706	return DBGCCmdHlpPrintf(pCmdHlp, "CSAM Scanning enabled\n");
2707	}
2708
2709	#endif /* VBOX_WITH_DEBUGGER */

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source: vbox/trunk/src/VBox/VMM/VMMR3/CSAM.cpp@ 39944

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