CSAM.cpp@ 41737

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1	/* $Id: CSAM.cpp 41737 2012-06-15 01:01:49Z vboxsync $ */
2	/** @file
3	* CSAM - Guest OS Code Scanning and Analysis Manager
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	/*******************************************************************************
19	* Header Files *
20	*******************************************************************************/
21	#define LOG_GROUP LOG_GROUP_CSAM
22	#include <VBox/vmm/cpum.h>
23	#include <VBox/vmm/stam.h>
24	#include <VBox/vmm/patm.h>
25	#include <VBox/vmm/csam.h>
26	#include <VBox/vmm/cpumdis.h>
27	#include <VBox/vmm/pgm.h>
28	#include <VBox/vmm/iom.h>
29	#include <VBox/sup.h>
30	#include <VBox/vmm/mm.h>
31	#include <VBox/vmm/em.h>
32	#ifdef VBOX_WITH_REM
33	# include <VBox/vmm/rem.h>
34	#endif
35	#include <VBox/vmm/selm.h>
36	#include <VBox/vmm/trpm.h>
37	#include <VBox/vmm/cfgm.h>
38	#include <VBox/param.h>
39	#include <iprt/avl.h>
40	#include <iprt/asm.h>
41	#include <iprt/thread.h>
42	#include "CSAMInternal.h"
43	#include <VBox/vmm/vm.h>
44	#include <VBox/dbg.h>
45	#include <VBox/err.h>
46	#include <VBox/vmm/ssm.h>
47	#include <VBox/log.h>
48	#include <iprt/assert.h>
49	#include <iprt/string.h>
50	#include <VBox/dis.h>
51	#include <VBox/disopcode.h>
52	#include "internal/pgm.h"
53
54
55	/* Enabled by default */
56	#define CSAM_ENABLE
57
58	/* Enable to monitor code pages for self-modifying code. */
59	#define CSAM_MONITOR_CODE_PAGES
60	/* Enable to monitor all scanned pages
61	#define CSAM_MONITOR_CSAM_CODE_PAGES */
62	/* Enable to scan beyond ret instructions.
63	#define CSAM_ANALYSE_BEYOND_RET */
64
65	/*******************************************************************************
66	* Internal Functions *
67	*******************************************************************************/
68	static DECLCALLBACK(int) csamr3Save(PVM pVM, PSSMHANDLE pSSM);
69	static DECLCALLBACK(int) csamr3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
70	static DECLCALLBACK(int) CSAMCodePageWriteHandler(PVM pVM, RTGCPTR GCPtr, void pvPtr, void pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
71	static DECLCALLBACK(int) CSAMCodePageInvalidate(PVM pVM, RTGCPTR GCPtr);
72
73	bool csamIsCodeScanned(PVM pVM, RTRCPTR pInstr, PCSAMPAGE *pPage);
74	int csamR3CheckPageRecord(PVM pVM, RTRCPTR pInstr);
75	static PCSAMPAGE csamCreatePageRecord(PVM pVM, RTRCPTR GCPtr, CSAMTAG enmTag, bool fCode32, bool fMonitorInvalidation = false);
76	static int csamRemovePageRecord(PVM pVM, RTRCPTR GCPtr);
77	static int csamReinit(PVM pVM);
78	static void csamMarkCode(PVM pVM, PCSAMPAGE pPage, RTRCPTR pInstr, uint32_t opsize, bool fScanned);
79	static int csamAnalyseCodeStream(PVM pVM, RCPTRTYPE(uint8_t ) pInstrGC, RCPTRTYPE(uint8_t ) pCurInstrGC, bool fCode32,
80	PFN_CSAMR3ANALYSE pfnCSAMR3Analyse, void *pUserData, PCSAMP2GLOOKUPREC pCacheRec);
81
82	/** @todo Temporary for debugging. */
83	static bool fInCSAMCodePageInvalidate = false;
84
85	/*******************************************************************************
86	* Global Variables *
87	*******************************************************************************/
88	#ifdef VBOX_WITH_DEBUGGER
89	static DECLCALLBACK(int) csamr3CmdOn(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PVM pVM, PCDBGCVAR paArgs, unsigned cArgs);
90	static DECLCALLBACK(int) csamr3CmdOff(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PVM pVM, PCDBGCVAR paArgs, unsigned cArgs);
91
92	/** Command descriptors. */
93	static const DBGCCMD g_aCmds[] =
94	{
95	/* pszCmd, cArgsMin, cArgsMax, paArgDesc, cArgDescs, fFlags, pfnHandler pszSyntax, ....pszDescription */
96	{ "csamon", 0, 0, NULL, 0, 0, csamr3CmdOn, "", "Enable CSAM code scanning." },
97	{ "csamoff", 0, 0, NULL, 0, 0, csamr3CmdOff, "", "Disable CSAM code scanning." },
98	};
99	#endif
100
101	/**
102	* SSM descriptor table for the CSAM structure.
103	*/
104	static const SSMFIELD g_aCsamFields[] =
105	{
106	/** @todo there are more fields that can be ignored here. */
107	SSMFIELD_ENTRY_IGNORE( CSAM, offVM),
108	SSMFIELD_ENTRY_PAD_HC64( CSAM, Alignment0, sizeof(uint32_t)),
109	SSMFIELD_ENTRY_IGN_HCPTR( CSAM, pPageTree),
110	SSMFIELD_ENTRY( CSAM, aDangerousInstr),
111	SSMFIELD_ENTRY( CSAM, cDangerousInstr),
112	SSMFIELD_ENTRY( CSAM, iDangerousInstr),
113	SSMFIELD_ENTRY_RCPTR( CSAM, pPDBitmapGC), /// @todo ignore this?
114	SSMFIELD_ENTRY_RCPTR( CSAM, pPDHCBitmapGC), /// @todo ignore this?
115	SSMFIELD_ENTRY_IGN_HCPTR( CSAM, pPDBitmapHC),
116	SSMFIELD_ENTRY_IGN_HCPTR( CSAM, pPDGCBitmapHC),
117	SSMFIELD_ENTRY_IGN_HCPTR( CSAM, savedstate.pSSM),
118	SSMFIELD_ENTRY( CSAM, savedstate.cPageRecords),
119	SSMFIELD_ENTRY( CSAM, savedstate.cPatchPageRecords),
120	SSMFIELD_ENTRY( CSAM, cDirtyPages),
121	SSMFIELD_ENTRY_RCPTR_ARRAY( CSAM, pvDirtyBasePage),
122	SSMFIELD_ENTRY_RCPTR_ARRAY( CSAM, pvDirtyFaultPage),
123	SSMFIELD_ENTRY( CSAM, cPossibleCodePages),
124	SSMFIELD_ENTRY_RCPTR_ARRAY( CSAM, pvPossibleCodePage),
125	SSMFIELD_ENTRY_RCPTR_ARRAY( CSAM, pvCallInstruction),
126	SSMFIELD_ENTRY( CSAM, iCallInstruction),
127	SSMFIELD_ENTRY( CSAM, fScanningStarted),
128	SSMFIELD_ENTRY( CSAM, fGatesChecked),
129	SSMFIELD_ENTRY_PAD_HC( CSAM, Alignment1, 6, 2),
130	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrTraps),
131	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrPages),
132	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrPagesInv),
133	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrRemovedPages),
134	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrPatchPages),
135	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrPageNPHC),
136	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrPageNPGC),
137	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrFlushes),
138	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrFlushesSkipped),
139	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrKnownPagesHC),
140	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrKnownPagesGC),
141	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrInstr),
142	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrBytesRead),
143	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrOpcodeRead),
144	SSMFIELD_ENTRY_IGNORE( CSAM, StatTime),
145	SSMFIELD_ENTRY_IGNORE( CSAM, StatTimeCheckAddr),
146	SSMFIELD_ENTRY_IGNORE( CSAM, StatTimeAddrConv),
147	SSMFIELD_ENTRY_IGNORE( CSAM, StatTimeFlushPage),
148	SSMFIELD_ENTRY_IGNORE( CSAM, StatTimeDisasm),
149	SSMFIELD_ENTRY_IGNORE( CSAM, StatFlushDirtyPages),
150	SSMFIELD_ENTRY_IGNORE( CSAM, StatCheckGates),
151	SSMFIELD_ENTRY_IGNORE( CSAM, StatCodePageModified),
152	SSMFIELD_ENTRY_IGNORE( CSAM, StatDangerousWrite),
153	SSMFIELD_ENTRY_IGNORE( CSAM, StatInstrCacheHit),
154	SSMFIELD_ENTRY_IGNORE( CSAM, StatInstrCacheMiss),
155	SSMFIELD_ENTRY_IGNORE( CSAM, StatPagePATM),
156	SSMFIELD_ENTRY_IGNORE( CSAM, StatPageCSAM),
157	SSMFIELD_ENTRY_IGNORE( CSAM, StatPageREM),
158	SSMFIELD_ENTRY_IGNORE( CSAM, StatNrUserPages),
159	SSMFIELD_ENTRY_IGNORE( CSAM, StatPageMonitor),
160	SSMFIELD_ENTRY_IGNORE( CSAM, StatPageRemoveREMFlush),
161	SSMFIELD_ENTRY_IGNORE( CSAM, StatBitmapAlloc),
162	SSMFIELD_ENTRY_IGNORE( CSAM, StatScanNextFunction),
163	SSMFIELD_ENTRY_IGNORE( CSAM, StatScanNextFunctionFailed),
164	SSMFIELD_ENTRY_TERM()
165	};
166
167	/** Fake type to simplify g_aCsamPDBitmapArray construction. */
168	typedef struct
169	{
170	uint8_t *a[CSAM_PGDIRBMP_CHUNKS];
171	} CSAMPDBITMAPARRAY;
172
173	/**
174	* SSM descriptor table for the CSAM::pPDBitmapHC array.
175	*/
176	static SSMFIELD const g_aCsamPDBitmapArray[] =
177	{
178	SSMFIELD_ENTRY_HCPTR_NI_ARRAY(CSAMPDBITMAPARRAY, a),
179	SSMFIELD_ENTRY_TERM()
180	};
181
182	/**
183	* SSM descriptor table for the CSAMPAGEREC structure.
184	*/
185	static const SSMFIELD g_aCsamPageRecFields[] =
186	{
187	SSMFIELD_ENTRY_IGN_HCPTR( CSAMPAGEREC, Core.Key),
188	SSMFIELD_ENTRY_IGN_HCPTR( CSAMPAGEREC, Core.pLeft),
189	SSMFIELD_ENTRY_IGN_HCPTR( CSAMPAGEREC, Core.pRight),
190	SSMFIELD_ENTRY_IGNORE( CSAMPAGEREC, Core.uchHeight),
191	SSMFIELD_ENTRY_PAD_HC_AUTO( 3, 7),
192	SSMFIELD_ENTRY_RCPTR( CSAMPAGEREC, page.pPageGC),
193	SSMFIELD_ENTRY_PAD_HC_AUTO( 0, 4),
194	SSMFIELD_ENTRY_PAD_MSC32_AUTO( 4),
195	SSMFIELD_ENTRY_GCPHYS( CSAMPAGEREC, page.GCPhys),
196	SSMFIELD_ENTRY( CSAMPAGEREC, page.fFlags),
197	SSMFIELD_ENTRY( CSAMPAGEREC, page.uSize),
198	SSMFIELD_ENTRY_PAD_HC_AUTO( 0, 4),
199	SSMFIELD_ENTRY_HCPTR_NI( CSAMPAGEREC, page.pBitmap),
200	SSMFIELD_ENTRY( CSAMPAGEREC, page.fCode32),
201	SSMFIELD_ENTRY( CSAMPAGEREC, page.fMonitorActive),
202	SSMFIELD_ENTRY( CSAMPAGEREC, page.fMonitorInvalidation),
203	SSMFIELD_ENTRY_PAD_HC_AUTO( 1, 1),
204	SSMFIELD_ENTRY( CSAMPAGEREC, page.enmTag),
205	SSMFIELD_ENTRY( CSAMPAGEREC, page.u64Hash),
206	SSMFIELD_ENTRY_TERM()
207	};
208
209
210	/**
211	* Initializes the CSAM.
212	*
213	* @returns VBox status code.
214	* @param pVM The VM to operate on.
215	*/
216	VMMR3DECL(int) CSAMR3Init(PVM pVM)
217	{
218	int rc;
219
220	LogFlow(("CSAMR3Init\n"));
221
222	/* Allocate bitmap for the page directory. */
223	rc = MMR3HyperAllocOnceNoRel(pVM, CSAM_PGDIRBMP_CHUNKSsizeof(RTHCPTR), 0, MM_TAG_CSAM, (void *)&pVM->csam.s.pPDBitmapHC);
224	AssertRCReturn(rc, rc);
225	rc = MMR3HyperAllocOnceNoRel(pVM, CSAM_PGDIRBMP_CHUNKSsizeof(RTRCPTR), 0, MM_TAG_CSAM, (void *)&pVM->csam.s.pPDGCBitmapHC);
226	AssertRCReturn(rc, rc);
227	pVM->csam.s.pPDBitmapGC = MMHyperR3ToRC(pVM, pVM->csam.s.pPDGCBitmapHC);
228	pVM->csam.s.pPDHCBitmapGC = MMHyperR3ToRC(pVM, pVM->csam.s.pPDBitmapHC);
229
230	rc = csamReinit(pVM);
231	AssertRCReturn(rc, rc);
232
233	/*
234	* Register save and load state notifiers.
235	*/
236	rc = SSMR3RegisterInternal(pVM, "CSAM", 0, CSAM_SSM_VERSION, sizeof(pVM->csam.s) + PAGE_SIZE*16,
237	NULL, NULL, NULL,
238	NULL, csamr3Save, NULL,
239	NULL, csamr3Load, NULL);
240	AssertRCReturn(rc, rc);
241
242	STAM_REG(pVM, &pVM->csam.s.StatNrTraps, STAMTYPE_COUNTER, "/CSAM/PageTraps", STAMUNIT_OCCURENCES, "The number of CSAM page traps.");
243	STAM_REG(pVM, &pVM->csam.s.StatDangerousWrite, STAMTYPE_COUNTER, "/CSAM/DangerousWrites", STAMUNIT_OCCURENCES, "The number of dangerous writes that cause a context switch.");
244
245	STAM_REG(pVM, &pVM->csam.s.StatNrPageNPHC, STAMTYPE_COUNTER, "/CSAM/HC/PageNotPresent", STAMUNIT_OCCURENCES, "The number of CSAM pages marked not present.");
246	STAM_REG(pVM, &pVM->csam.s.StatNrPageNPGC, STAMTYPE_COUNTER, "/CSAM/GC/PageNotPresent", STAMUNIT_OCCURENCES, "The number of CSAM pages marked not present.");
247	STAM_REG(pVM, &pVM->csam.s.StatNrPages, STAMTYPE_COUNTER, "/CSAM/PageRec/AddedRW", STAMUNIT_OCCURENCES, "The number of CSAM page records (RW monitoring).");
248	STAM_REG(pVM, &pVM->csam.s.StatNrPagesInv, STAMTYPE_COUNTER, "/CSAM/PageRec/AddedRWI", STAMUNIT_OCCURENCES, "The number of CSAM page records (RW & invalidation monitoring).");
249	STAM_REG(pVM, &pVM->csam.s.StatNrRemovedPages, STAMTYPE_COUNTER, "/CSAM/PageRec/Removed", STAMUNIT_OCCURENCES, "The number of removed CSAM page records.");
250	STAM_REG(pVM, &pVM->csam.s.StatPageRemoveREMFlush,STAMTYPE_COUNTER, "/CSAM/PageRec/Removed/REMFlush", STAMUNIT_OCCURENCES, "The number of removed CSAM page records that caused a REM flush.");
251
252	STAM_REG(pVM, &pVM->csam.s.StatNrPatchPages, STAMTYPE_COUNTER, "/CSAM/PageRec/Patch", STAMUNIT_OCCURENCES, "The number of CSAM patch page records.");
253	STAM_REG(pVM, &pVM->csam.s.StatNrUserPages, STAMTYPE_COUNTER, "/CSAM/PageRec/Ignore/User", STAMUNIT_OCCURENCES, "The number of CSAM user page records (ignored).");
254	STAM_REG(pVM, &pVM->csam.s.StatPagePATM, STAMTYPE_COUNTER, "/CSAM/PageRec/Type/PATM", STAMUNIT_OCCURENCES, "The number of PATM page records.");
255	STAM_REG(pVM, &pVM->csam.s.StatPageCSAM, STAMTYPE_COUNTER, "/CSAM/PageRec/Type/CSAM", STAMUNIT_OCCURENCES, "The number of CSAM page records.");
256	STAM_REG(pVM, &pVM->csam.s.StatPageREM, STAMTYPE_COUNTER, "/CSAM/PageRec/Type/REM", STAMUNIT_OCCURENCES, "The number of REM page records.");
257	STAM_REG(pVM, &pVM->csam.s.StatPageMonitor, STAMTYPE_COUNTER, "/CSAM/PageRec/Monitored", STAMUNIT_OCCURENCES, "The number of monitored pages.");
258
259	STAM_REG(pVM, &pVM->csam.s.StatCodePageModified, STAMTYPE_COUNTER, "/CSAM/Monitor/DirtyPage", STAMUNIT_OCCURENCES, "The number of code page modifications.");
260
261	STAM_REG(pVM, &pVM->csam.s.StatNrFlushes, STAMTYPE_COUNTER, "/CSAM/PageFlushes", STAMUNIT_OCCURENCES, "The number of CSAM page flushes.");
262	STAM_REG(pVM, &pVM->csam.s.StatNrFlushesSkipped, STAMTYPE_COUNTER, "/CSAM/PageFlushesSkipped", STAMUNIT_OCCURENCES, "The number of CSAM page flushes that were skipped.");
263	STAM_REG(pVM, &pVM->csam.s.StatNrKnownPagesHC, STAMTYPE_COUNTER, "/CSAM/HC/KnownPageRecords", STAMUNIT_OCCURENCES, "The number of known CSAM page records.");
264	STAM_REG(pVM, &pVM->csam.s.StatNrKnownPagesGC, STAMTYPE_COUNTER, "/CSAM/GC/KnownPageRecords", STAMUNIT_OCCURENCES, "The number of known CSAM page records.");
265	STAM_REG(pVM, &pVM->csam.s.StatNrInstr, STAMTYPE_COUNTER, "/CSAM/ScannedInstr", STAMUNIT_OCCURENCES, "The number of scanned instructions.");
266	STAM_REG(pVM, &pVM->csam.s.StatNrBytesRead, STAMTYPE_COUNTER, "/CSAM/BytesRead", STAMUNIT_OCCURENCES, "The number of bytes read for scanning.");
267	STAM_REG(pVM, &pVM->csam.s.StatNrOpcodeRead, STAMTYPE_COUNTER, "/CSAM/OpcodeBytesRead", STAMUNIT_OCCURENCES, "The number of opcode bytes read by the recompiler.");
268
269	STAM_REG(pVM, &pVM->csam.s.StatBitmapAlloc, STAMTYPE_COUNTER, "/CSAM/Alloc/PageBitmap", STAMUNIT_OCCURENCES, "The number of page bitmap allocations.");
270
271	STAM_REG(pVM, &pVM->csam.s.StatInstrCacheHit, STAMTYPE_COUNTER, "/CSAM/Cache/Hit", STAMUNIT_OCCURENCES, "The number of dangerous instruction cache hits.");
272	STAM_REG(pVM, &pVM->csam.s.StatInstrCacheMiss, STAMTYPE_COUNTER, "/CSAM/Cache/Miss", STAMUNIT_OCCURENCES, "The number of dangerous instruction cache misses.");
273
274	STAM_REG(pVM, &pVM->csam.s.StatScanNextFunction, STAMTYPE_COUNTER, "/CSAM/Function/Scan/Success", STAMUNIT_OCCURENCES, "The number of found functions beyond the ret border.");
275	STAM_REG(pVM, &pVM->csam.s.StatScanNextFunctionFailed, STAMTYPE_COUNTER, "/CSAM/Function/Scan/Failed", STAMUNIT_OCCURENCES, "The number of refused functions beyond the ret border.");
276
277	STAM_REG(pVM, &pVM->csam.s.StatTime, STAMTYPE_PROFILE, "/PROF/CSAM/Scan", STAMUNIT_TICKS_PER_CALL, "Scanning overhead.");
278	STAM_REG(pVM, &pVM->csam.s.StatTimeCheckAddr, STAMTYPE_PROFILE, "/PROF/CSAM/CheckAddr", STAMUNIT_TICKS_PER_CALL, "Address check overhead.");
279	STAM_REG(pVM, &pVM->csam.s.StatTimeAddrConv, STAMTYPE_PROFILE, "/PROF/CSAM/AddrConv", STAMUNIT_TICKS_PER_CALL, "Address conversion overhead.");
280	STAM_REG(pVM, &pVM->csam.s.StatTimeFlushPage, STAMTYPE_PROFILE, "/PROF/CSAM/FlushPage", STAMUNIT_TICKS_PER_CALL, "Page flushing overhead.");
281	STAM_REG(pVM, &pVM->csam.s.StatTimeDisasm, STAMTYPE_PROFILE, "/PROF/CSAM/Disasm", STAMUNIT_TICKS_PER_CALL, "Disassembly overhead.");
282	STAM_REG(pVM, &pVM->csam.s.StatFlushDirtyPages, STAMTYPE_PROFILE, "/PROF/CSAM/FlushDirtyPage", STAMUNIT_TICKS_PER_CALL, "Dirty page flushing overhead.");
283	STAM_REG(pVM, &pVM->csam.s.StatCheckGates, STAMTYPE_PROFILE, "/PROF/CSAM/CheckGates", STAMUNIT_TICKS_PER_CALL, "CSAMR3CheckGates overhead.");
284
285	/*
286	* Check CFGM option and enable/disable CSAM.
287	*/
288	bool fEnabled;
289	rc = CFGMR3QueryBool(CFGMR3GetRoot(pVM), "CSAMEnabled", &fEnabled);
290	if (RT_FAILURE(rc))
291	#ifdef CSAM_ENABLE
292	fEnabled = true;
293	#else
294	fEnabled = false;
295	#endif
296	if (fEnabled)
297	CSAMEnableScanning(pVM);
298
299	#ifdef VBOX_WITH_DEBUGGER
300	/*
301	* Debugger commands.
302	*/
303	static bool fRegisteredCmds = false;
304	if (!fRegisteredCmds)
305	{
306	rc = DBGCRegisterCommands(&g_aCmds[0], RT_ELEMENTS(g_aCmds));
307	if (RT_SUCCESS(rc))
308	fRegisteredCmds = true;
309	}
310	#endif
311
312	return VINF_SUCCESS;
313	}
314
315	/**
316	* (Re)initializes CSAM
317	*
318	* @param pVM The VM.
319	*/
320	static int csamReinit(PVM pVM)
321	{
322	/*
323	* Assert alignment and sizes.
324	*/
325	AssertRelease(!(RT_OFFSETOF(VM, csam.s) & 31));
326	AssertRelease(sizeof(pVM->csam.s) <= sizeof(pVM->csam.padding));
327
328	/*
329	* Setup any fixed pointers and offsets.
330	*/
331	pVM->csam.s.offVM = RT_OFFSETOF(VM, patm);
332
333	pVM->csam.s.fGatesChecked = false;
334	pVM->csam.s.fScanningStarted = false;
335
336	PVMCPU pVCpu = &pVM->aCpus[0]; /* raw mode implies 1 VPCU */
337	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_CSAM_PENDING_ACTION);
338	pVM->csam.s.cDirtyPages = 0;
339	/* not necessary */
340	memset(pVM->csam.s.pvDirtyBasePage, 0, sizeof(pVM->csam.s.pvDirtyBasePage));
341	memset(pVM->csam.s.pvDirtyFaultPage, 0, sizeof(pVM->csam.s.pvDirtyFaultPage));
342
343	memset(&pVM->csam.s.aDangerousInstr, 0, sizeof(pVM->csam.s.aDangerousInstr));
344	pVM->csam.s.cDangerousInstr = 0;
345	pVM->csam.s.iDangerousInstr = 0;
346
347	memset(pVM->csam.s.pvCallInstruction, 0, sizeof(pVM->csam.s.pvCallInstruction));
348	pVM->csam.s.iCallInstruction = 0;
349
350	/** @note never mess with the pgdir bitmap here! */
351	return VINF_SUCCESS;
352	}
353
354	/**
355	* Applies relocations to data and code managed by this
356	* component. This function will be called at init and
357	* whenever the VMM need to relocate itself inside the GC.
358	*
359	* The csam will update the addresses used by the switcher.
360	*
361	* @param pVM The VM.
362	* @param offDelta Relocation delta.
363	*/
364	VMMR3DECL(void) CSAMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
365	{
366	if (offDelta)
367	{
368	/* Adjust pgdir and page bitmap pointers. */
369	pVM->csam.s.pPDBitmapGC = MMHyperR3ToRC(pVM, pVM->csam.s.pPDGCBitmapHC);
370	pVM->csam.s.pPDHCBitmapGC = MMHyperR3ToRC(pVM, pVM->csam.s.pPDBitmapHC);
371
372	for(int i=0;i<CSAM_PGDIRBMP_CHUNKS;i++)
373	{
374	if (pVM->csam.s.pPDGCBitmapHC[i])
375	{
376	pVM->csam.s.pPDGCBitmapHC[i] += offDelta;
377	}
378	}
379	}
380	return;
381	}
382
383	/**
384	* Terminates the csam.
385	*
386	* Termination means cleaning up and freeing all resources,
387	* the VM it self is at this point powered off or suspended.
388	*
389	* @returns VBox status code.
390	* @param pVM The VM to operate on.
391	*/
392	VMMR3DECL(int) CSAMR3Term(PVM pVM)
393	{
394	int rc;
395
396	rc = CSAMR3Reset(pVM);
397	AssertRC(rc);
398
399	/* @todo triggers assertion in MMHyperFree */
400	#if 0
401	for(int i=0;i<CSAM_PAGEBMP_CHUNKS;i++)
402	{
403	if (pVM->csam.s.pPDBitmapHC[i])
404	MMHyperFree(pVM, pVM->csam.s.pPDBitmapHC[i]);
405	}
406	#endif
407
408	return VINF_SUCCESS;
409	}
410
411	/**
412	* CSAM reset callback.
413	*
414	* @returns VBox status code.
415	* @param pVM The VM which is reset.
416	*/
417	VMMR3DECL(int) CSAMR3Reset(PVM pVM)
418	{
419	/* Clear page bitmaps. */
420	for(int i=0;i<CSAM_PGDIRBMP_CHUNKS;i++)
421	{
422	if (pVM->csam.s.pPDBitmapHC[i])
423	{
424	Assert((CSAM_PAGE_BITMAP_SIZE& 3) == 0);
425	ASMMemZero32(pVM->csam.s.pPDBitmapHC[i], CSAM_PAGE_BITMAP_SIZE);
426	}
427	}
428
429	/* Remove all CSAM page records. */
430	while(true)
431	{
432	PCSAMPAGEREC pPageRec = (PCSAMPAGEREC)RTAvlPVGetBestFit(&pVM->csam.s.pPageTree, 0, true);
433	if (pPageRec)
434	{
435	csamRemovePageRecord(pVM, pPageRec->page.pPageGC);
436	}
437	else
438	break;
439	}
440	Assert(!pVM->csam.s.pPageTree);
441
442	csamReinit(pVM);
443
444	return VINF_SUCCESS;
445	}
446
447
448	/**
449	* Callback function for RTAvlPVDoWithAll
450	*
451	* Counts the number of records in the tree
452	*
453	* @returns VBox status code.
454	* @param pNode Current node
455	* @param pcPatches Pointer to patch counter
456	*/
457	static DECLCALLBACK(int) CountRecord(PAVLPVNODECORE pNode, void *pcPatches)
458	{
459	NOREF(pNode);
460	(uint32_t )pcPatches = (uint32_t )pcPatches + 1;
461	return VINF_SUCCESS;
462	}
463
464	/**
465	* Callback function for RTAvlPVDoWithAll
466	*
467	* Saves the state of the page record
468	*
469	* @returns VBox status code.
470	* @param pNode Current node
471	* @param pVM1 VM Handle
472	*/
473	static DECLCALLBACK(int) SavePageState(PAVLPVNODECORE pNode, void *pVM1)
474	{
475	PVM pVM = (PVM)pVM1;
476	PCSAMPAGEREC pPage = (PCSAMPAGEREC)pNode;
477	CSAMPAGEREC page = *pPage;
478	PSSMHANDLE pSSM = pVM->csam.s.savedstate.pSSM;
479	int rc;
480
481	/* Save the page record itself */
482	rc = SSMR3PutMem(pSSM, &page, sizeof(page));
483	AssertRCReturn(rc, rc);
484
485	if (page.page.pBitmap)
486	{
487	rc = SSMR3PutMem(pSSM, page.page.pBitmap, CSAM_PAGE_BITMAP_SIZE);
488	AssertRCReturn(rc, rc);
489	}
490
491	return VINF_SUCCESS;
492	}
493
494	/**
495	* Execute state save operation.
496	*
497	* @returns VBox status code.
498	* @param pVM VM Handle.
499	* @param pSSM SSM operation handle.
500	*/
501	static DECLCALLBACK(int) csamr3Save(PVM pVM, PSSMHANDLE pSSM)
502	{
503	CSAM csamInfo = pVM->csam.s;
504	int rc;
505
506	/*
507	* Count the number of page records in the tree (feeling lazy)
508	*/
509	csamInfo.savedstate.cPageRecords = 0;
510	RTAvlPVDoWithAll(&pVM->csam.s.pPageTree, true, CountRecord, &csamInfo.savedstate.cPageRecords);
511
512	/*
513	* Save CSAM structure
514	*/
515	pVM->csam.s.savedstate.pSSM = pSSM;
516	rc = SSMR3PutMem(pSSM, &csamInfo, sizeof(csamInfo));
517	AssertRCReturn(rc, rc);
518
519	/* Save pgdir bitmap */
520	rc = SSMR3PutMem(pSSM, csamInfo.pPDBitmapHC, CSAM_PGDIRBMP_CHUNKS*sizeof(RTHCPTR));
521	AssertRCReturn(rc, rc);
522
523	for (unsigned i=0;i<CSAM_PGDIRBMP_CHUNKS;i++)
524	{
525	if(csamInfo.pPDBitmapHC[i])
526	{
527	/* Save the page bitmap. */
528	rc = SSMR3PutMem(pSSM, csamInfo.pPDBitmapHC[i], CSAM_PAGE_BITMAP_SIZE);
529	AssertRCReturn(rc, rc);
530	}
531	}
532
533	/*
534	* Save page records
535	*/
536	rc = RTAvlPVDoWithAll(&pVM->csam.s.pPageTree, true, SavePageState, pVM);
537	AssertRCReturn(rc, rc);
538
539	/** @note we don't restore aDangerousInstr; it will be recreated automatically. */
540	return VINF_SUCCESS;
541	}
542
543	/**
544	* Execute state load operation.
545	*
546	* @returns VBox status code.
547	* @param pVM VM Handle.
548	* @param pSSM SSM operation handle.
549	* @param uVersion Data layout version.
550	* @param uPass The data pass.
551	*/
552	static DECLCALLBACK(int) csamr3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
553	{
554	int rc;
555	CSAM csamInfo;
556
557	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
558	if (uVersion != CSAM_SSM_VERSION)
559	{
560	AssertMsgFailed(("csamR3Load: Invalid version uVersion=%d!\n", uVersion));
561	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
562	}
563
564	pVM->csam.s.savedstate.pSSM = pSSM;
565
566	/*
567	* Restore CSAM structure
568	*/
569	#if 0
570	rc = SSMR3GetMem(pSSM, &csamInfo, sizeof(csamInfo));
571	#else
572	RT_ZERO(csamInfo);
573	rc = SSMR3GetStructEx(pSSM, &csamInfo, sizeof(csamInfo), SSMSTRUCT_FLAGS_MEM_BAND_AID, &g_aCsamFields[0], NULL);
574	#endif
575	AssertRCReturn(rc, rc);
576
577	pVM->csam.s.fGatesChecked = csamInfo.fGatesChecked;
578	pVM->csam.s.fScanningStarted = csamInfo.fScanningStarted;
579
580	/* Restore dirty code page info. */
581	pVM->csam.s.cDirtyPages = csamInfo.cDirtyPages;
582	memcpy(pVM->csam.s.pvDirtyBasePage, csamInfo.pvDirtyBasePage, sizeof(pVM->csam.s.pvDirtyBasePage));
583	memcpy(pVM->csam.s.pvDirtyFaultPage, csamInfo.pvDirtyFaultPage, sizeof(pVM->csam.s.pvDirtyFaultPage));
584
585	/* Restore possible code page */
586	pVM->csam.s.cPossibleCodePages = csamInfo.cPossibleCodePages;
587	memcpy(pVM->csam.s.pvPossibleCodePage, csamInfo.pvPossibleCodePage, sizeof(pVM->csam.s.pvPossibleCodePage));
588
589	/* Restore pgdir bitmap (we'll change the pointers next). */
590	#if 0
591	rc = SSMR3GetMem(pSSM, pVM->csam.s.pPDBitmapHC, CSAM_PGDIRBMP_CHUNKS*sizeof(RTHCPTR));
592	#else
593	rc = SSMR3GetStructEx(pSSM, pVM->csam.s.pPDBitmapHC, sizeof(uint8_t ) CSAM_PGDIRBMP_CHUNKS,
594	SSMSTRUCT_FLAGS_MEM_BAND_AID, &g_aCsamPDBitmapArray[0], NULL);
595	#endif
596	AssertRCReturn(rc, rc);
597
598	/*
599	* Restore page bitmaps
600	*/
601	for (unsigned i=0;i<CSAM_PGDIRBMP_CHUNKS;i++)
602	{
603	if(pVM->csam.s.pPDBitmapHC[i])
604	{
605	rc = MMHyperAlloc(pVM, CSAM_PAGE_BITMAP_SIZE, 0, MM_TAG_CSAM, (void **)&pVM->csam.s.pPDBitmapHC[i]);
606	if (RT_FAILURE(rc))
607	{
608	Log(("MMHyperAlloc failed with %Rrc\n", rc));
609	return rc;
610	}
611	/* Convert to GC pointer. */
612	pVM->csam.s.pPDGCBitmapHC[i] = MMHyperR3ToRC(pVM, pVM->csam.s.pPDBitmapHC[i]);
613	Assert(pVM->csam.s.pPDGCBitmapHC[i]);
614
615	/* Restore the bitmap. */
616	rc = SSMR3GetMem(pSSM, pVM->csam.s.pPDBitmapHC[i], CSAM_PAGE_BITMAP_SIZE);
617	AssertRCReturn(rc, rc);
618	}
619	else
620	{
621	Assert(!pVM->csam.s.pPDGCBitmapHC[i]);
622	pVM->csam.s.pPDGCBitmapHC[i] = 0;
623	}
624	}
625
626	/*
627	* Restore page records
628	*/
629	for (uint32_t i=0;i<csamInfo.savedstate.cPageRecords + csamInfo.savedstate.cPatchPageRecords;i++)
630	{
631	CSAMPAGEREC page;
632	PCSAMPAGE pPage;
633
634	#if 0
635	rc = SSMR3GetMem(pSSM, &page, sizeof(page));
636	#else
637	RT_ZERO(page);
638	rc = SSMR3GetStructEx(pSSM, &page, sizeof(page), SSMSTRUCT_FLAGS_MEM_BAND_AID, &g_aCsamPageRecFields[0], NULL);
639	#endif
640	AssertRCReturn(rc, rc);
641
642	/*
643	* Recreate the page record
644	*/
645	pPage = csamCreatePageRecord(pVM, page.page.pPageGC, page.page.enmTag, page.page.fCode32, page.page.fMonitorInvalidation);
646	AssertReturn(pPage, VERR_NO_MEMORY);
647
648	pPage->GCPhys = page.page.GCPhys;
649	pPage->fFlags = page.page.fFlags;
650	pPage->u64Hash = page.page.u64Hash;
651
652	if (page.page.pBitmap)
653	{
654	rc = SSMR3GetMem(pSSM, pPage->pBitmap, CSAM_PAGE_BITMAP_SIZE);
655	AssertRCReturn(rc, rc);
656	}
657	else
658	{
659	MMR3HeapFree(pPage->pBitmap);
660	pPage->pBitmap = 0;
661	}
662	}
663
664	/* Note: we don't restore aDangerousInstr; it will be recreated automatically. */
665	memset(&pVM->csam.s.aDangerousInstr, 0, sizeof(pVM->csam.s.aDangerousInstr));
666	pVM->csam.s.cDangerousInstr = 0;
667	pVM->csam.s.iDangerousInstr = 0;
668	return VINF_SUCCESS;
669	}
670
671	/**
672	* Convert guest context address to host context pointer
673	*
674	* @returns VBox status code.
675	* @param pVM The VM to operate on.
676	* @param pCacheRec Address conversion cache record
677	* @param pGCPtr Guest context pointer
678	* @returns Host context pointer or NULL in case of an error
679	*
680	*/
681	static R3PTRTYPE(void ) CSAMGCVirtToHCVirt(PVM pVM, PCSAMP2GLOOKUPREC pCacheRec, RCPTRTYPE(uint8_t ) pGCPtr)
682	{
683	int rc;
684	R3PTRTYPE(void *) pHCPtr;
685	Assert(pVM->cCpus == 1);
686	PVMCPU pVCpu = VMMGetCpu0(pVM);
687
688	STAM_PROFILE_START(&pVM->csam.s.StatTimeAddrConv, a);
689
690	pHCPtr = PATMR3GCPtrToHCPtr(pVM, pGCPtr);
691	if (pHCPtr)
692	return pHCPtr;
693
694	if (pCacheRec->pPageLocStartHC)
695	{
696	uint32_t offset = pGCPtr & PAGE_OFFSET_MASK;
697	if (pCacheRec->pGuestLoc == (pGCPtr & PAGE_BASE_GC_MASK))
698	{
699	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeAddrConv, a);
700	return pCacheRec->pPageLocStartHC + offset;
701	}
702	}
703
704	/* Release previous lock if any. */
705	if (pCacheRec->Lock.pvMap)
706	{
707	PGMPhysReleasePageMappingLock(pVM, &pCacheRec->Lock);
708	pCacheRec->Lock.pvMap = NULL;
709	}
710
711	rc = PGMPhysGCPtr2CCPtrReadOnly(pVCpu, pGCPtr, (const void **)&pHCPtr, &pCacheRec->Lock);
712	if (rc != VINF_SUCCESS)
713	{
714	//// AssertMsgRC(rc, ("MMR3PhysGCVirt2HCVirtEx failed for %RRv\n", pGCPtr));
715	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeAddrConv, a);
716	return NULL;
717	}
718
719	pCacheRec->pPageLocStartHC = (R3PTRTYPE(uint8_t*))((RTHCUINTPTR)pHCPtr & PAGE_BASE_HC_MASK);
720	pCacheRec->pGuestLoc = pGCPtr & PAGE_BASE_GC_MASK;
721	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeAddrConv, a);
722	return pHCPtr;
723	}
724
725	/**
726	* @callback_method_impl{FNDISREADBYTES}
727	*/
728	static DECLCALLBACK(int) CSAMR3ReadBytes(PDISCPUSTATE pDisState, uint8_t *pbDst, RTUINTPTR uSrcAddr, uint32_t cbToRead)
729	{
730	PVM pVM = (PVM)pDisState->pvUser;
731	RTHCUINTPTR pInstrHC = (RTHCUINTPTR)pDisState->pvUser2;
732	RTGCUINTPTR32 pInstrGC = pDisState->uInstrAddr;
733	int orgsize = cbToRead;
734	PVMCPU pVCpu = VMMGetCpu0(pVM);
735
736	/* We are not interested in patched instructions, so read the original opcode bytes.
737	Note! single instruction patches (int3) are checked in CSAMR3AnalyseCallback */
738	for (int i = 0; i < orgsize; i++)
739	{
740	int rc = PATMR3QueryOpcode(pVM, (RTRCPTR)uSrcAddr, pbDst);
741	if (RT_FAILURE(rc))
742	break;
743	uSrcAddr++;
744	pbDst++;
745	cbToRead--;
746	}
747	if (cbToRead == 0)
748	return VINF_SUCCESS;
749
750	if (PAGE_ADDRESS(pInstrGC) != PAGE_ADDRESS(uSrcAddr + cbToRead - 1) && !PATMIsPatchGCAddr(pVM, uSrcAddr))
751	return PGMPhysSimpleReadGCPtr(pVCpu, pbDst, uSrcAddr, cbToRead);
752
753	Assert(pInstrHC);
754
755	/* pInstrHC is the base address; adjust according to the GC pointer. */
756	pInstrHC = pInstrHC + (uSrcAddr - pInstrGC);
757
758	memcpy(pbDst, (void *)pInstrHC, cbToRead);
759
760	return VINF_SUCCESS;
761	}
762
763	DECLINLINE(int) CSAMR3DISInstr(PVM pVM, RTRCPTR InstrGC, uint8_t *InstrHC, DISCPUMODE enmCpuMode,
764	PDISCPUSTATE pCpu, uint32_t pcbInstr, char pszOutput, size_t cbOutput)
765	{
766	pCpu->pvUser2 = InstrHC;
767	#ifdef DEBUG
768	return DISInstrToStrEx(InstrGC, enmCpuMode, CSAMR3ReadBytes, pVM, DISOPTYPE_ALL,
769	pCpu, pcbInstr, pszOutput, cbOutput);
770	#else
771	/* We are interested in everything except harmless stuff */
772	if (pszOutput)
773	return DISInstrToStrEx(InstrGC, enmCpuMode, CSAMR3ReadBytes, pVM, ~(DISOPTYPE_INVALID \| DISOPTYPE_HARMLESS \| DISOPTYPE_RRM_MASK),
774	pCpu, pcbInstr, pszOutput, cbOutput);
775	return DISInstEx(InstrGC, enmCpuMode, ~(DISOPTYPE_INVALID \| DISOPTYPE_HARMLESS \| DISOPTYPE_RRM_MASK), CSAMR3ReadBytes, pVM,
776	pCpu, pcbInstr);
777	#endif
778	}
779
780	/**
781	* Analyses the instructions following the cli for compliance with our heuristics for cli
782	*
783	* @returns VBox status code.
784	* @param pVM The VM to operate on.
785	* @param pCpu CPU disassembly state
786	* @param pInstrGC Guest context pointer to privileged instruction
787	* @param pCurInstrGC Guest context pointer to the current instruction
788	* @param pCacheRec GC to HC cache record
789	* @param pUserData User pointer (callback specific)
790	*
791	*/
792	static int CSAMR3AnalyseCallback(PVM pVM, DISCPUSTATE pCpu, RCPTRTYPE(uint8_t ) pInstrGC, RCPTRTYPE(uint8_t *) pCurInstrGC,
793	PCSAMP2GLOOKUPREC pCacheRec, void *pUserData)
794	{
795	PCSAMPAGE pPage = (PCSAMPAGE)pUserData;
796	int rc;
797	NOREF(pInstrGC);
798
799	switch (pCpu->pCurInstr->uOpcode)
800	{
801	case OP_INT:
802	Assert(pCpu->param1.fUse & DISUSE_IMMEDIATE8);
803	if (pCpu->param1.parval == 3)
804	{
805	//two byte int 3
806	return VINF_SUCCESS;
807	}
808	break;
809
810	case OP_ILLUD2:
811	/* This appears to be some kind of kernel panic in Linux 2.4; no point to continue. */
812	case OP_RETN:
813	case OP_INT3:
814	case OP_INVALID:
815	#if 1
816	/* removing breaks win2k guests? */
817	case OP_IRET:
818	#endif
819	return VINF_SUCCESS;
820	}
821
822	// Check for exit points
823	switch (pCpu->pCurInstr->uOpcode)
824	{
825	/* It's not a good idea to patch pushf instructions:
826	* - increases the chance of conflicts (code jumping to the next instruction)
827	* - better to patch the cli
828	* - code that branches before the cli will likely hit an int 3
829	* - in general doesn't offer any benefits as we don't allow nested patch blocks (IF is always 1)
830	*/
831	case OP_PUSHF:
832	case OP_POPF:
833	break;
834
835	case OP_CLI:
836	{
837	uint32_t cbInstrs = 0;
838	uint32_t cbCurInstr = pCpu->cbInstr;
839	bool fCode32 = pPage->fCode32;
840
841	Assert(fCode32);
842
843	PATMR3AddHint(pVM, pCurInstrGC, (fCode32) ? PATMFL_CODE32 : 0);
844
845	/* Make sure the instructions that follow the cli have not been encountered before. */
846	while (true)
847	{
848	DISCPUSTATE cpu;
849
850	if (cbInstrs + cbCurInstr >= SIZEOF_NEARJUMP32)
851	break;
852
853	if (csamIsCodeScanned(pVM, pCurInstrGC + cbCurInstr, &pPage) == true)
854	{
855	/* We've scanned the next instruction(s) already. This means we've followed a branch that ended up there before -> dangerous!! */
856	PATMR3DetectConflict(pVM, pCurInstrGC, pCurInstrGC + cbCurInstr);
857	break;
858	}
859	pCurInstrGC += cbCurInstr;
860	cbInstrs += cbCurInstr;
861
862	{ /* Force pCurInstrHC out of scope after we stop using it (page lock!) */
863	uint8_t *pCurInstrHC = 0;
864	pCurInstrHC = (uint8_t *)CSAMGCVirtToHCVirt(pVM, pCacheRec, pCurInstrGC);
865	if (pCurInstrHC == NULL)
866	{
867	Log(("CSAMGCVirtToHCVirt failed for %RRv\n", pCurInstrGC));
868	break;
869	}
870	Assert(VALID_PTR(pCurInstrHC));
871
872	rc = CSAMR3DISInstr(pVM, pCurInstrGC, pCurInstrHC, (fCode32) ? DISCPUMODE_32BIT : DISCPUMODE_16BIT,
873	&cpu, &cbCurInstr, NULL, 0);
874	}
875	AssertRC(rc);
876	if (RT_FAILURE(rc))
877	break;
878	}
879	break;
880	}
881
882	case OP_PUSH:
883	if (pCpu->pCurInstr->param1 != OP_PARM_REG_CS)
884	break;
885
886	/* no break */
887	case OP_STR:
888	case OP_LSL:
889	case OP_LAR:
890	case OP_SGDT:
891	case OP_SLDT:
892	case OP_SIDT:
893	case OP_SMSW:
894	case OP_VERW:
895	case OP_VERR:
896	case OP_CPUID:
897	case OP_IRET:
898	#ifdef DEBUG
899	switch(pCpu->pCurInstr->uOpcode)
900	{
901	case OP_STR:
902	Log(("Privileged instruction at %RRv: str!!\n", pCurInstrGC));
903	break;
904	case OP_LSL:
905	Log(("Privileged instruction at %RRv: lsl!!\n", pCurInstrGC));
906	break;
907	case OP_LAR:
908	Log(("Privileged instruction at %RRv: lar!!\n", pCurInstrGC));
909	break;
910	case OP_SGDT:
911	Log(("Privileged instruction at %RRv: sgdt!!\n", pCurInstrGC));
912	break;
913	case OP_SLDT:
914	Log(("Privileged instruction at %RRv: sldt!!\n", pCurInstrGC));
915	break;
916	case OP_SIDT:
917	Log(("Privileged instruction at %RRv: sidt!!\n", pCurInstrGC));
918	break;
919	case OP_SMSW:
920	Log(("Privileged instruction at %RRv: smsw!!\n", pCurInstrGC));
921	break;
922	case OP_VERW:
923	Log(("Privileged instruction at %RRv: verw!!\n", pCurInstrGC));
924	break;
925	case OP_VERR:
926	Log(("Privileged instruction at %RRv: verr!!\n", pCurInstrGC));
927	break;
928	case OP_CPUID:
929	Log(("Privileged instruction at %RRv: cpuid!!\n", pCurInstrGC));
930	break;
931	case OP_PUSH:
932	Log(("Privileged instruction at %RRv: push cs!!\n", pCurInstrGC));
933	break;
934	case OP_IRET:
935	Log(("Privileged instruction at %RRv: iret!!\n", pCurInstrGC));
936	break;
937	}
938	#endif
939
940	if (PATMR3HasBeenPatched(pVM, pCurInstrGC) == false)
941	{
942	rc = PATMR3InstallPatch(pVM, pCurInstrGC, (pPage->fCode32) ? PATMFL_CODE32 : 0);
943	if (RT_FAILURE(rc))
944	{
945	Log(("PATMR3InstallPatch failed with %d\n", rc));
946	return VWRN_CONTINUE_ANALYSIS;
947	}
948	}
949	if (pCpu->pCurInstr->uOpcode == OP_IRET)
950	return VINF_SUCCESS; /* Look no further in this branch. */
951
952	return VWRN_CONTINUE_ANALYSIS;
953
954	case OP_JMP:
955	case OP_CALL:
956	{
957	// return or jump/call through a jump table
958	if (OP_PARM_VTYPE(pCpu->pCurInstr->param1) != OP_PARM_J)
959	{
960	#ifdef DEBUG
961	switch(pCpu->pCurInstr->uOpcode)
962	{
963	case OP_JMP:
964	Log(("Control Flow instruction at %RRv: jmp!!\n", pCurInstrGC));
965	break;
966	case OP_CALL:
967	Log(("Control Flow instruction at %RRv: call!!\n", pCurInstrGC));
968	break;
969	}
970	#endif
971	return VWRN_CONTINUE_ANALYSIS;
972	}
973	return VWRN_CONTINUE_ANALYSIS;
974	}
975
976	}
977
978	return VWRN_CONTINUE_ANALYSIS;
979	}
980
981	#ifdef CSAM_ANALYSE_BEYOND_RET
982	/**
983	* Wrapper for csamAnalyseCodeStream for call instructions.
984	*
985	* @returns VBox status code.
986	* @param pVM The VM to operate on.
987	* @param pInstrGC Guest context pointer to privileged instruction
988	* @param pCurInstrGC Guest context pointer to the current instruction
989	* @param fCode32 16 or 32 bits code
990	* @param pfnCSAMR3Analyse Callback for testing the disassembled instruction
991	* @param pUserData User pointer (callback specific)
992	*
993	*/
994	static int csamAnalyseCallCodeStream(PVM pVM, RCPTRTYPE(uint8_t ) pInstrGC, RCPTRTYPE(uint8_t ) pCurInstrGC, bool fCode32,
995	PFN_CSAMR3ANALYSE pfnCSAMR3Analyse, void *pUserData, PCSAMP2GLOOKUPREC pCacheRec)
996	{
997	int rc;
998	CSAMCALLEXITREC CallExitRec;
999	PCSAMCALLEXITREC pOldCallRec;
1000	PCSAMPAGE pPage = 0;
1001	uint32_t i;
1002
1003	CallExitRec.cInstrAfterRet = 0;
1004
1005	pOldCallRec = pCacheRec->pCallExitRec;
1006	pCacheRec->pCallExitRec = &CallExitRec;
1007
1008	rc = csamAnalyseCodeStream(pVM, pInstrGC, pCurInstrGC, fCode32, pfnCSAMR3Analyse, pUserData, pCacheRec);
1009
1010	for (i=0;i<CallExitRec.cInstrAfterRet;i++)
1011	{
1012	PCSAMPAGE pPage = 0;
1013
1014	pCurInstrGC = CallExitRec.pInstrAfterRetGC[i];
1015
1016	/* Check if we've previously encountered the instruction after the ret. */
1017	if (csamIsCodeScanned(pVM, pCurInstrGC, &pPage) == false)
1018	{
1019	DISCPUSTATE cpu;
1020	uint32_t cbInstr;
1021	int rc2;
1022	#ifdef DEBUG
1023	char szOutput[256];
1024	#endif
1025	if (pPage == NULL)
1026	{
1027	/* New address; let's take a look at it. */
1028	pPage = csamCreatePageRecord(pVM, pCurInstrGC, CSAM_TAG_CSAM, fCode32);
1029	if (pPage == NULL)
1030	{
1031	rc = VERR_NO_MEMORY;
1032	goto done;
1033	}
1034	}
1035
1036	/**
1037	* Some generic requirements for recognizing an adjacent function:
1038	* - alignment fillers that consist of:
1039	* - nop
1040	* - lea genregX, [genregX (+ 0)]
1041	* - push ebp after the filler (can extend this later); aligned at at least a 4 byte boundary
1042	*/
1043	for (int j = 0; j < 16; j++)
1044	{
1045	uint8_t pCurInstrHC = (uint8_t )CSAMGCVirtToHCVirt(pVM, pCacheRec, pCurInstrGC);
1046	if (pCurInstrHC == NULL)
1047	{
1048	Log(("CSAMGCVirtToHCVirt failed for %RRv\n", pCurInstrGC));
1049	goto done;
1050	}
1051	Assert(VALID_PTR(pCurInstrHC));
1052
1053	STAM_PROFILE_START(&pVM->csam.s.StatTimeDisasm, a);
1054	#ifdef DEBUG
1055	rc2 = CSAMR3DISInstr(pVM, pCurInstrGC, pCurInstrHC, (fCode32) ? DISCPUMODE_32BIT : DISCPUMODE_16BIT,
1056	&cpu, &cbInstr, szOutput, sizeof(szOutput));
1057	if (RT_SUCCESS(rc2)) Log(("CSAM Call Analysis: %s", szOutput));
1058	#else
1059	rc2 = CSAMR3DISInstr(pVM, pCurInstrGC, pCurInstrHC, (fCode32) ? DISCPUMODE_32BIT : DISCPUMODE_16BIT,
1060	&cpu, &cbInstr, NULL, 0);
1061	#endif
1062	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeDisasm, a);
1063	if (RT_FAILURE(rc2))
1064	{
1065	Log(("Disassembly failed at %RRv with %Rrc (probably page not present) -> return to caller\n", pCurInstrGC, rc2));
1066	goto done;
1067	}
1068
1069	STAM_COUNTER_ADD(&pVM->csam.s.StatNrBytesRead, cbInstr);
1070
1071	RCPTRTYPE(uint8_t *) addr = 0;
1072	PCSAMPAGE pJmpPage = NULL;
1073
1074	if (PAGE_ADDRESS(pCurInstrGC) != PAGE_ADDRESS(pCurInstrGC + cbInstr - 1))
1075	{
1076	if (!PGMGstIsPagePresent(pVM, pCurInstrGC + cbInstr - 1))
1077	{
1078	/// @todo fault in the page
1079	Log(("Page for current instruction %RRv is not present!!\n", pCurInstrGC));
1080	goto done;
1081	}
1082	//all is fine, let's continue
1083	csamR3CheckPageRecord(pVM, pCurInstrGC + cbInstr - 1);
1084	}
1085
1086	switch (cpu.pCurInstr->uOpcode)
1087	{
1088	case OP_NOP:
1089	case OP_INT3:
1090	break; /* acceptable */
1091
1092	case OP_LEA:
1093	/* Must be similar to:
1094	*
1095	* lea esi, [esi]
1096	* lea esi, [esi+0]
1097	* Any register is allowed as long as source and destination are identical.
1098	*/
1099	if ( cpu.param1.fUse != DISUSE_REG_GEN32
1100	\|\| ( cpu.param2.flags != DISUSE_REG_GEN32
1101	&& ( !(cpu.param2.flags & DISUSE_REG_GEN32)
1102	\|\| !(cpu.param2.flags & (DISUSE_DISPLACEMENT8\|DISUSE_DISPLACEMENT16\|DISUSE_DISPLACEMENT32))
1103	\|\| cpu.param2.parval != 0
1104	)
1105	)
1106	\|\| cpu.param1.base.reg_gen32 != cpu.param2.base.reg_gen32
1107	)
1108	{
1109	STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunctionFailed);
1110	goto next_function;
1111	}
1112	break;
1113
1114	case OP_PUSH:
1115	{
1116	if ( (pCurInstrGC & 0x3) != 0
1117	\|\| cpu.param1.fUse != DISUSE_REG_GEN32
1118	\|\| cpu.param1.base.reg_gen32 != USE_REG_EBP
1119	)
1120	{
1121	STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunctionFailed);
1122	goto next_function;
1123	}
1124
1125	if (csamIsCodeScanned(pVM, pCurInstrGC, &pPage) == false)
1126	{
1127	CSAMCALLEXITREC CallExitRec2;
1128	CallExitRec2.cInstrAfterRet = 0;
1129
1130	pCacheRec->pCallExitRec = &CallExitRec2;
1131
1132	/* Analyse the function. */
1133	Log(("Found new function at %RRv\n", pCurInstrGC));
1134	STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunction);
1135	csamAnalyseCallCodeStream(pVM, pInstrGC, pCurInstrGC, fCode32, pfnCSAMR3Analyse, pUserData, pCacheRec);
1136	}
1137	goto next_function;
1138	}
1139
1140	case OP_SUB:
1141	{
1142	if ( (pCurInstrGC & 0x3) != 0
1143	\|\| cpu.param1.fUse != DISUSE_REG_GEN32
1144	\|\| cpu.param1.base.reg_gen32 != USE_REG_ESP
1145	)
1146	{
1147	STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunctionFailed);
1148	goto next_function;
1149	}
1150
1151	if (csamIsCodeScanned(pVM, pCurInstrGC, &pPage) == false)
1152	{
1153	CSAMCALLEXITREC CallExitRec2;
1154	CallExitRec2.cInstrAfterRet = 0;
1155
1156	pCacheRec->pCallExitRec = &CallExitRec2;
1157
1158	/* Analyse the function. */
1159	Log(("Found new function at %RRv\n", pCurInstrGC));
1160	STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunction);
1161	csamAnalyseCallCodeStream(pVM, pInstrGC, pCurInstrGC, fCode32, pfnCSAMR3Analyse, pUserData, pCacheRec);
1162	}
1163	goto next_function;
1164	}
1165
1166	default:
1167	STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunctionFailed);
1168	goto next_function;
1169	}
1170	/* Mark it as scanned. */
1171	csamMarkCode(pVM, pPage, pCurInstrGC, cbInstr, true);
1172	pCurInstrGC += cbInstr;
1173	} /* for at most 16 instructions */
1174	next_function:
1175	; /* MSVC complains otherwise */
1176	}
1177	}
1178	done:
1179	pCacheRec->pCallExitRec = pOldCallRec;
1180	return rc;
1181	}
1182	#else
1183	#define csamAnalyseCallCodeStream csamAnalyseCodeStream
1184	#endif
1185
1186	/**
1187	* Disassembles the code stream until the callback function detects a failure or decides everything is acceptable
1188	*
1189	* @returns VBox status code.
1190	* @param pVM The VM to operate on.
1191	* @param pInstrGC Guest context pointer to privileged instruction
1192	* @param pCurInstrGC Guest context pointer to the current instruction
1193	* @param fCode32 16 or 32 bits code
1194	* @param pfnCSAMR3Analyse Callback for testing the disassembled instruction
1195	* @param pUserData User pointer (callback specific)
1196	*
1197	*/
1198	static int csamAnalyseCodeStream(PVM pVM, RCPTRTYPE(uint8_t ) pInstrGC, RCPTRTYPE(uint8_t ) pCurInstrGC, bool fCode32,
1199	PFN_CSAMR3ANALYSE pfnCSAMR3Analyse, void *pUserData, PCSAMP2GLOOKUPREC pCacheRec)
1200	{
1201	DISCPUSTATE cpu;
1202	PCSAMPAGE pPage = (PCSAMPAGE)pUserData;
1203	int rc = VWRN_CONTINUE_ANALYSIS;
1204	uint32_t cbInstr;
1205	int rc2;
1206	Assert(pVM->cCpus == 1);
1207	PVMCPU pVCpu = VMMGetCpu0(pVM);
1208
1209	#ifdef DEBUG
1210	char szOutput[256];
1211	#endif
1212
1213	LogFlow(("csamAnalyseCodeStream: code at %RRv depth=%d\n", pCurInstrGC, pCacheRec->depth));
1214
1215	pVM->csam.s.fScanningStarted = true;
1216
1217	pCacheRec->depth++;
1218	/*
1219	* Limit the call depth. (rather arbitrary upper limit; too low and we won't detect certain
1220	* cpuid instructions in Linux kernels; too high and we waste too much time scanning code)
1221	* (512 is necessary to detect cpuid instructions in Red Hat EL4; see defect 1355)
1222	* @note we are using a lot of stack here. couple of 100k when we go to the full depth (!)
1223	*/
1224	if (pCacheRec->depth > 512)
1225	{
1226	LogFlow(("CSAM: maximum calldepth reached for %RRv\n", pCurInstrGC));
1227	pCacheRec->depth--;
1228	return VINF_SUCCESS; //let's not go on forever
1229	}
1230
1231	Assert(!PATMIsPatchGCAddr(pVM, pCurInstrGC));
1232	csamR3CheckPageRecord(pVM, pCurInstrGC);
1233
1234	while(rc == VWRN_CONTINUE_ANALYSIS)
1235	{
1236	if (csamIsCodeScanned(pVM, pCurInstrGC, &pPage) == false)
1237	{
1238	if (pPage == NULL)
1239	{
1240	/* New address; let's take a look at it. */
1241	pPage = csamCreatePageRecord(pVM, pCurInstrGC, CSAM_TAG_CSAM, fCode32);
1242	if (pPage == NULL)
1243	{
1244	rc = VERR_NO_MEMORY;
1245	goto done;
1246	}
1247	}
1248	}
1249	else
1250	{
1251	LogFlow(("Code at %RRv has been scanned before\n", pCurInstrGC));
1252	rc = VINF_SUCCESS;
1253	goto done;
1254	}
1255
1256	{ /* Force pCurInstrHC out of scope after we stop using it (page lock!) */
1257	uint8_t pCurInstrHC = (uint8_t )CSAMGCVirtToHCVirt(pVM, pCacheRec, pCurInstrGC);
1258	if (pCurInstrHC == NULL)
1259	{
1260	Log(("CSAMGCVirtToHCVirt failed for %RRv\n", pCurInstrGC));
1261	rc = VERR_PATCHING_REFUSED;
1262	goto done;
1263	}
1264	Assert(VALID_PTR(pCurInstrHC));
1265
1266	STAM_PROFILE_START(&pVM->csam.s.StatTimeDisasm, a);
1267	#ifdef DEBUG
1268	rc2 = CSAMR3DISInstr(pVM, pCurInstrGC, pCurInstrHC, fCode32 ? DISCPUMODE_32BIT : DISCPUMODE_16BIT,
1269	&cpu, &cbInstr, szOutput, sizeof(szOutput));
1270	if (RT_SUCCESS(rc2)) Log(("CSAM Analysis: %s", szOutput));
1271	#else
1272	rc2 = CSAMR3DISInstr(pVM, pCurInstrGC, pCurInstrHC, fCode32 ? DISCPUMODE_32BIT : DISCPUMODE_16BIT,
1273	&cpu, &cbInstr, NULL, 0);
1274	#endif
1275	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeDisasm, a);
1276	}
1277	if (RT_FAILURE(rc2))
1278	{
1279	Log(("Disassembly failed at %RRv with %Rrc (probably page not present) -> return to caller\n", pCurInstrGC, rc2));
1280	rc = VINF_SUCCESS;
1281	goto done;
1282	}
1283
1284	STAM_COUNTER_ADD(&pVM->csam.s.StatNrBytesRead, cbInstr);
1285
1286	csamMarkCode(pVM, pPage, pCurInstrGC, cbInstr, true);
1287
1288	RCPTRTYPE(uint8_t *) addr = 0;
1289	PCSAMPAGE pJmpPage = NULL;
1290
1291	if (PAGE_ADDRESS(pCurInstrGC) != PAGE_ADDRESS(pCurInstrGC + cbInstr - 1))
1292	{
1293	if (!PGMGstIsPagePresent(pVCpu, pCurInstrGC + cbInstr - 1))
1294	{
1295	/// @todo fault in the page
1296	Log(("Page for current instruction %RRv is not present!!\n", pCurInstrGC));
1297	rc = VWRN_CONTINUE_ANALYSIS;
1298	goto next_please;
1299	}
1300	//all is fine, let's continue
1301	csamR3CheckPageRecord(pVM, pCurInstrGC + cbInstr - 1);
1302	}
1303	/*
1304	* If it's harmless, then don't bother checking it (the disasm tables had better be accurate!)
1305	*/
1306	if ((cpu.pCurInstr->optype & ~DISOPTYPE_RRM_MASK) == DISOPTYPE_HARMLESS)
1307	{
1308	AssertMsg(pfnCSAMR3Analyse(pVM, &cpu, pInstrGC, pCurInstrGC, pCacheRec, (void *)pPage) == VWRN_CONTINUE_ANALYSIS, ("Instruction incorrectly marked harmless?!?!?\n"));
1309	rc = VWRN_CONTINUE_ANALYSIS;
1310	goto next_please;
1311	}
1312
1313	#ifdef CSAM_ANALYSE_BEYOND_RET
1314	/* Remember the address of the instruction following the ret in case the parent instruction was a call. */
1315	if ( pCacheRec->pCallExitRec
1316	&& cpu.pCurInstr->uOpcode == OP_RETN
1317	&& pCacheRec->pCallExitRec->cInstrAfterRet < CSAM_MAX_CALLEXIT_RET)
1318	{
1319	pCacheRec->pCallExitRec->pInstrAfterRetGC[pCacheRec->pCallExitRec->cInstrAfterRet] = pCurInstrGC + cbInstr;
1320	pCacheRec->pCallExitRec->cInstrAfterRet++;
1321	}
1322	#endif
1323
1324	rc = pfnCSAMR3Analyse(pVM, &cpu, pInstrGC, pCurInstrGC, pCacheRec, (void *)pPage);
1325	if (rc == VINF_SUCCESS)
1326	goto done;
1327
1328	// For our first attempt, we'll handle only simple relative jumps and calls (immediate offset coded in instruction)
1329	if ( ((cpu.pCurInstr->optype & DISOPTYPE_CONTROLFLOW) && (OP_PARM_VTYPE(cpu.pCurInstr->param1) == OP_PARM_J))
1330	\|\| (cpu.pCurInstr->uOpcode == OP_CALL && cpu.param1.fUse == DISUSE_DISPLACEMENT32)) /* simple indirect call (call dword ptr [address]) */
1331	{
1332	/* We need to parse 'call dword ptr [address]' type of calls to catch cpuid instructions in some recent Linux distributions (e.g. OpenSuse 10.3) */
1333	if ( cpu.pCurInstr->uOpcode == OP_CALL
1334	&& cpu.param1.fUse == DISUSE_DISPLACEMENT32)
1335	{
1336	addr = 0;
1337	PGMPhysSimpleReadGCPtr(pVCpu, &addr, (RTRCUINTPTR)cpu.param1.uDisp.i32, sizeof(addr));
1338	}
1339	else
1340	addr = CSAMResolveBranch(&cpu, pCurInstrGC);
1341
1342	if (addr == 0)
1343	{
1344	Log(("We don't support far jumps here!! (%08X)\n", cpu.param1.fUse));
1345	rc = VINF_SUCCESS;
1346	break;
1347	}
1348	Assert(!PATMIsPatchGCAddr(pVM, addr));
1349
1350	/* If the target address lies in a patch generated jump, then special action needs to be taken. */
1351	PATMR3DetectConflict(pVM, pCurInstrGC, addr);
1352
1353	/* Same page? */
1354	if (PAGE_ADDRESS(addr) != PAGE_ADDRESS(pCurInstrGC ))
1355	{
1356	if (!PGMGstIsPagePresent(pVCpu, addr))
1357	{
1358	Log(("Page for current instruction %RRv is not present!!\n", addr));
1359	rc = VWRN_CONTINUE_ANALYSIS;
1360	goto next_please;
1361	}
1362
1363	/* All is fine, let's continue. */
1364	csamR3CheckPageRecord(pVM, addr);
1365	}
1366
1367	pJmpPage = NULL;
1368	if (csamIsCodeScanned(pVM, addr, &pJmpPage) == false)
1369	{
1370	if (pJmpPage == NULL)
1371	{
1372	/* New branch target; let's take a look at it. */
1373	pJmpPage = csamCreatePageRecord(pVM, addr, CSAM_TAG_CSAM, fCode32);
1374	if (pJmpPage == NULL)
1375	{
1376	rc = VERR_NO_MEMORY;
1377	goto done;
1378	}
1379	Assert(pPage);
1380	}
1381	if (cpu.pCurInstr->uOpcode == OP_CALL)
1382	rc = csamAnalyseCallCodeStream(pVM, pInstrGC, addr, fCode32, pfnCSAMR3Analyse, (void *)pJmpPage, pCacheRec);
1383	else
1384	rc = csamAnalyseCodeStream(pVM, pInstrGC, addr, fCode32, pfnCSAMR3Analyse, (void *)pJmpPage, pCacheRec);
1385
1386	if (rc != VINF_SUCCESS) {
1387	goto done;
1388	}
1389	}
1390	if (cpu.pCurInstr->uOpcode == OP_JMP)
1391	{//unconditional jump; return to caller
1392	rc = VINF_SUCCESS;
1393	goto done;
1394	}
1395
1396	rc = VWRN_CONTINUE_ANALYSIS;
1397	} //if ((cpu.pCurInstr->optype & DISOPTYPE_CONTROLFLOW) && (OP_PARM_VTYPE(cpu.pCurInstr->param1) == OP_PARM_J))
1398	#ifdef CSAM_SCAN_JUMP_TABLE
1399	else
1400	if ( cpu.pCurInstr->uOpcode == OP_JMP
1401	&& (cpu.param1.fUse & (DISUSE_DISPLACEMENT32\|DISUSE_INDEX\|DISUSE_SCALE)) == (DISUSE_DISPLACEMENT32\|DISUSE_INDEX\|DISUSE_SCALE)
1402	)
1403	{
1404	RTRCPTR pJumpTableGC = (RTRCPTR)cpu.param1.disp32;
1405	uint8_t *pJumpTableHC;
1406	int rc2;
1407
1408	Log(("Jump through jump table\n"));
1409
1410	rc2 = PGMPhysGCPtr2CCPtrReadOnly(pVCpu, pJumpTableGC, (PRTHCPTR)&pJumpTableHC, missing page lock);
1411	if (rc2 == VINF_SUCCESS)
1412	{
1413	for (uint32_t i=0;i<2;i++)
1414	{
1415	uint64_t fFlags;
1416
1417	addr = pJumpTableGC + cpu.param1.scale * i;
1418	/* Same page? */
1419	if (PAGE_ADDRESS(addr) != PAGE_ADDRESS(pJumpTableGC))
1420	break;
1421
1422	addr = (RTRCPTR )(pJumpTableHC + cpu.param1.scale * i);
1423
1424	rc2 = PGMGstGetPage(pVCpu, addr, &fFlags, NULL);
1425	if ( rc2 != VINF_SUCCESS
1426	\|\| (fFlags & X86_PTE_US)
1427	\|\| !(fFlags & X86_PTE_P)
1428	)
1429	break;
1430
1431	Log(("Jump to %RRv\n", addr));
1432
1433	pJmpPage = NULL;
1434	if (csamIsCodeScanned(pVM, addr, &pJmpPage) == false)
1435	{
1436	if (pJmpPage == NULL)
1437	{
1438	/* New branch target; let's take a look at it. */
1439	pJmpPage = csamCreatePageRecord(pVM, addr, CSAM_TAG_CSAM, fCode32);
1440	if (pJmpPage == NULL)
1441	{
1442	rc = VERR_NO_MEMORY;
1443	goto done;
1444	}
1445	Assert(pPage);
1446	}
1447	rc = csamAnalyseCodeStream(pVM, pInstrGC, addr, fCode32, pfnCSAMR3Analyse, (void *)pJmpPage, pCacheRec);
1448	if (rc != VINF_SUCCESS) {
1449	goto done;
1450	}
1451	}
1452	}
1453	}
1454	}
1455	#endif
1456	if (rc != VWRN_CONTINUE_ANALYSIS) {
1457	break; //done!
1458	}
1459	next_please:
1460	if (cpu.pCurInstr->uOpcode == OP_JMP)
1461	{
1462	rc = VINF_SUCCESS;
1463	goto done;
1464	}
1465	pCurInstrGC += cbInstr;
1466	}
1467	done:
1468	pCacheRec->depth--;
1469	return rc;
1470	}
1471
1472
1473	/**
1474	* Calculates the 64 bits hash value for the current page
1475	*
1476	* @returns hash value
1477	* @param pVM The VM to operate on.
1478	* @param pInstr Page address
1479	*/
1480	uint64_t csamR3CalcPageHash(PVM pVM, RTRCPTR pInstr)
1481	{
1482	uint64_t hash = 0;
1483	uint32_t val[5];
1484	int rc;
1485	Assert(pVM->cCpus == 1);
1486	PVMCPU pVCpu = VMMGetCpu0(pVM);
1487
1488	Assert((pInstr & PAGE_OFFSET_MASK) == 0);
1489
1490	rc = PGMPhysSimpleReadGCPtr(pVCpu, &val[0], pInstr, sizeof(val[0]));
1491	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1492	if (rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT)
1493	{
1494	Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr));
1495	return ~0ULL;
1496	}
1497
1498	rc = PGMPhysSimpleReadGCPtr(pVCpu, &val[1], pInstr+1024, sizeof(val[0]));
1499	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1500	if (rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT)
1501	{
1502	Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr));
1503	return ~0ULL;
1504	}
1505
1506	rc = PGMPhysSimpleReadGCPtr(pVCpu, &val[2], pInstr+2048, sizeof(val[0]));
1507	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1508	if (rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT)
1509	{
1510	Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr));
1511	return ~0ULL;
1512	}
1513
1514	rc = PGMPhysSimpleReadGCPtr(pVCpu, &val[3], pInstr+3072, sizeof(val[0]));
1515	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1516	if (rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT)
1517	{
1518	Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr));
1519	return ~0ULL;
1520	}
1521
1522	rc = PGMPhysSimpleReadGCPtr(pVCpu, &val[4], pInstr+4092, sizeof(val[0]));
1523	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1524	if (rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT)
1525	{
1526	Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr));
1527	return ~0ULL;
1528	}
1529
1530	// don't want to get division by zero traps
1531	val[2] \|= 1;
1532	val[4] \|= 1;
1533
1534	hash = (uint64_t)val[0] * (uint64_t)val[1] / (uint64_t)val[2] + (val[3]%val[4]);
1535	return (hash == ~0ULL) ? hash - 1 : hash;
1536	}
1537
1538
1539	/**
1540	* Notify CSAM of a page flush
1541	*
1542	* @returns VBox status code
1543	* @param pVM The VM to operate on.
1544	* @param addr GC address of the page to flush
1545	* @param fRemovePage Page removal flag
1546	*/
1547	static int csamFlushPage(PVM pVM, RTRCPTR addr, bool fRemovePage)
1548	{
1549	PCSAMPAGEREC pPageRec;
1550	int rc;
1551	RTGCPHYS GCPhys = 0;
1552	uint64_t fFlags = 0;
1553	Assert(pVM->cCpus == 1 \|\| !CSAMIsEnabled(pVM));
1554
1555	if (!CSAMIsEnabled(pVM))
1556	return VINF_SUCCESS;
1557
1558	PVMCPU pVCpu = VMMGetCpu0(pVM);
1559
1560	STAM_PROFILE_START(&pVM->csam.s.StatTimeFlushPage, a);
1561
1562	addr = addr & PAGE_BASE_GC_MASK;
1563
1564	/*
1565	* Note: searching for the page in our tree first is more expensive (skipped flushes are two orders of magnitude more common)
1566	*/
1567	if (pVM->csam.s.pPageTree == NULL)
1568	{
1569	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1570	return VWRN_CSAM_PAGE_NOT_FOUND;
1571	}
1572
1573	rc = PGMGstGetPage(pVCpu, addr, &fFlags, &GCPhys);
1574	/* Returned at a very early stage (no paging yet presumably). */
1575	if (rc == VERR_NOT_SUPPORTED)
1576	{
1577	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1578	return rc;
1579	}
1580
1581	if (RT_SUCCESS(rc))
1582	{
1583	if ( (fFlags & X86_PTE_US)
1584	\|\| rc == VERR_PGM_PHYS_PAGE_RESERVED
1585	)
1586	{
1587	/* User page -> not relevant for us. */
1588	STAM_COUNTER_ADD(&pVM->csam.s.StatNrFlushesSkipped, 1);
1589	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1590	return VINF_SUCCESS;
1591	}
1592	}
1593	else
1594	if (rc != VERR_PAGE_NOT_PRESENT && rc != VERR_PAGE_TABLE_NOT_PRESENT)
1595	AssertMsgFailed(("PGMR3GetPage %RRv failed with %Rrc\n", addr, rc));
1596
1597	pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)addr);
1598	if (pPageRec)
1599	{
1600	if ( GCPhys == pPageRec->page.GCPhys
1601	&& (fFlags & X86_PTE_P))
1602	{
1603	STAM_COUNTER_ADD(&pVM->csam.s.StatNrFlushesSkipped, 1);
1604	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1605	return VINF_SUCCESS;
1606	}
1607
1608	Log(("CSAMR3FlushPage: page %RRv has changed -> FLUSH (rc=%Rrc) (Phys: %RGp vs %RGp)\n", addr, rc, GCPhys, pPageRec->page.GCPhys));
1609
1610	STAM_COUNTER_ADD(&pVM->csam.s.StatNrFlushes, 1);
1611
1612	if (fRemovePage)
1613	csamRemovePageRecord(pVM, addr);
1614	else
1615	{
1616	CSAMMarkPage(pVM, addr, false);
1617	pPageRec->page.GCPhys = 0;
1618	pPageRec->page.fFlags = 0;
1619	rc = PGMGstGetPage(pVCpu, addr, &pPageRec->page.fFlags, &pPageRec->page.GCPhys);
1620	if (rc == VINF_SUCCESS)
1621	pPageRec->page.u64Hash = csamR3CalcPageHash(pVM, addr);
1622
1623	if (pPageRec->page.pBitmap == NULL)
1624	{
1625	pPageRec->page.pBitmap = (uint8_t *)MMR3HeapAllocZ(pVM, MM_TAG_CSAM_PATCH, CSAM_PAGE_BITMAP_SIZE);
1626	Assert(pPageRec->page.pBitmap);
1627	if (pPageRec->page.pBitmap == NULL)
1628	return VERR_NO_MEMORY;
1629	}
1630	else
1631	memset(pPageRec->page.pBitmap, 0, CSAM_PAGE_BITMAP_SIZE);
1632	}
1633
1634
1635	/*
1636	* Inform patch manager about the flush; no need to repeat the above check twice.
1637	*/
1638	PATMR3FlushPage(pVM, addr);
1639
1640	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1641	return VINF_SUCCESS;
1642	}
1643	else
1644	{
1645	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1646	return VWRN_CSAM_PAGE_NOT_FOUND;
1647	}
1648	}
1649
1650	/**
1651	* Notify CSAM of a page flush
1652	*
1653	* @returns VBox status code
1654	* @param pVM The VM to operate on.
1655	* @param addr GC address of the page to flush
1656	*/
1657	VMMR3DECL(int) CSAMR3FlushPage(PVM pVM, RTRCPTR addr)
1658	{
1659	return csamFlushPage(pVM, addr, true /* remove page record */);
1660	}
1661
1662	/**
1663	* Remove a CSAM monitored page. Use with care!
1664	*
1665	* @returns VBox status code
1666	* @param pVM The VM to operate on.
1667	* @param addr GC address of the page to flush
1668	*/
1669	VMMR3DECL(int) CSAMR3RemovePage(PVM pVM, RTRCPTR addr)
1670	{
1671	PCSAMPAGEREC pPageRec;
1672	int rc;
1673
1674	addr = addr & PAGE_BASE_GC_MASK;
1675
1676	pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)addr);
1677	if (pPageRec)
1678	{
1679	rc = csamRemovePageRecord(pVM, addr);
1680	if (RT_SUCCESS(rc))
1681	PATMR3FlushPage(pVM, addr);
1682	return VINF_SUCCESS;
1683	}
1684	return VWRN_CSAM_PAGE_NOT_FOUND;
1685	}
1686
1687	/**
1688	* Check a page record in case a page has been changed
1689	*
1690	* @returns VBox status code. (trap handled or not)
1691	* @param pVM The VM to operate on.
1692	* @param pInstrGC GC instruction pointer
1693	*/
1694	int csamR3CheckPageRecord(PVM pVM, RTRCPTR pInstrGC)
1695	{
1696	PCSAMPAGEREC pPageRec;
1697	uint64_t u64hash;
1698
1699	pInstrGC = pInstrGC & PAGE_BASE_GC_MASK;
1700
1701	pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)pInstrGC);
1702	if (pPageRec)
1703	{
1704	u64hash = csamR3CalcPageHash(pVM, pInstrGC);
1705	if (u64hash != pPageRec->page.u64Hash)
1706	csamFlushPage(pVM, pInstrGC, false /* don't remove page record */);
1707	}
1708	else
1709	return VWRN_CSAM_PAGE_NOT_FOUND;
1710
1711	return VINF_SUCCESS;
1712	}
1713
1714	/**
1715	* Returns monitor description based on CSAM tag
1716	*
1717	* @return description string
1718	* @param enmTag Owner tag
1719	*/
1720	const char *csamGetMonitorDescription(CSAMTAG enmTag)
1721	{
1722	if (enmTag == CSAM_TAG_PATM)
1723	return "CSAM-PATM self-modifying code monitor handler";
1724	else
1725	if (enmTag == CSAM_TAG_REM)
1726	return "CSAM-REM self-modifying code monitor handler";
1727	Assert(enmTag == CSAM_TAG_CSAM);
1728	return "CSAM self-modifying code monitor handler";
1729	}
1730
1731	/**
1732	* Adds page record to our lookup tree
1733	*
1734	* @returns CSAMPAGE ptr or NULL if failure
1735	* @param pVM The VM to operate on.
1736	* @param GCPtr Page address
1737	* @param enmTag Owner tag
1738	* @param fCode32 16 or 32 bits code
1739	* @param fMonitorInvalidation Monitor page invalidation flag
1740	*/
1741	static PCSAMPAGE csamCreatePageRecord(PVM pVM, RTRCPTR GCPtr, CSAMTAG enmTag, bool fCode32, bool fMonitorInvalidation)
1742	{
1743	PCSAMPAGEREC pPage;
1744	int rc;
1745	bool ret;
1746	Assert(pVM->cCpus == 1);
1747	PVMCPU pVCpu = VMMGetCpu0(pVM);
1748
1749	Log(("New page record for %RRv\n", GCPtr & PAGE_BASE_GC_MASK));
1750
1751	pPage = (PCSAMPAGEREC)MMR3HeapAllocZ(pVM, MM_TAG_CSAM_PATCH, sizeof(CSAMPAGEREC));
1752	if (pPage == NULL)
1753	{
1754	AssertMsgFailed(("csamCreatePageRecord: Out of memory!!!!\n"));
1755	return NULL;
1756	}
1757	/* Round down to page boundary. */
1758	GCPtr = (GCPtr & PAGE_BASE_GC_MASK);
1759	pPage->Core.Key = (AVLPVKEY)(uintptr_t)GCPtr;
1760	pPage->page.pPageGC = GCPtr;
1761	pPage->page.fCode32 = fCode32;
1762	pPage->page.fMonitorInvalidation = fMonitorInvalidation;
1763	pPage->page.enmTag = enmTag;
1764	pPage->page.fMonitorActive = false;
1765	pPage->page.pBitmap = (uint8_t *)MMR3HeapAllocZ(pVM, MM_TAG_CSAM_PATCH, PAGE_SIZE/sizeof(uint8_t));
1766	rc = PGMGstGetPage(pVCpu, GCPtr, &pPage->page.fFlags, &pPage->page.GCPhys);
1767	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1768
1769	pPage->page.u64Hash = csamR3CalcPageHash(pVM, GCPtr);
1770	ret = RTAvlPVInsert(&pVM->csam.s.pPageTree, &pPage->Core);
1771	Assert(ret);
1772
1773	#ifdef CSAM_MONITOR_CODE_PAGES
1774	AssertRelease(!fInCSAMCodePageInvalidate);
1775
1776	switch (enmTag)
1777	{
1778	case CSAM_TAG_PATM:
1779	case CSAM_TAG_REM:
1780	#ifdef CSAM_MONITOR_CSAM_CODE_PAGES
1781	case CSAM_TAG_CSAM:
1782	#endif
1783	{
1784	rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_WRITE, GCPtr, GCPtr + (PAGE_SIZE - 1) /* inclusive! */,
1785	(fMonitorInvalidation) ? CSAMCodePageInvalidate : 0, CSAMCodePageWriteHandler, "CSAMGCCodePageWriteHandler", 0,
1786	csamGetMonitorDescription(enmTag));
1787	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PGM_HANDLER_VIRTUAL_CONFLICT, ("PGMR3HandlerVirtualRegisterEx %RRv failed with %Rrc\n", GCPtr, rc));
1788	if (RT_FAILURE(rc))
1789	Log(("PGMR3HandlerVirtualRegisterEx for %RRv failed with %Rrc\n", GCPtr, rc));
1790
1791	/* Could fail, because it's already monitored. Don't treat that condition as fatal. */
1792
1793	/* Prefetch it in case it's not there yet. */
1794	rc = PGMPrefetchPage(pVCpu, GCPtr);
1795	AssertRC(rc);
1796
1797	rc = PGMShwMakePageReadonly(pVCpu, GCPtr, 0 /fFlags/);
1798	Assert(rc == VINF_SUCCESS \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT);
1799
1800	pPage->page.fMonitorActive = true;
1801	STAM_COUNTER_INC(&pVM->csam.s.StatPageMonitor);
1802	break;
1803	}
1804	default:
1805	break; /* to shut up GCC */
1806	}
1807
1808	Log(("csamCreatePageRecord %RRv GCPhys=%RGp\n", GCPtr, pPage->page.GCPhys));
1809
1810	#ifdef VBOX_WITH_STATISTICS
1811	switch (enmTag)
1812	{
1813	case CSAM_TAG_CSAM:
1814	STAM_COUNTER_INC(&pVM->csam.s.StatPageCSAM);
1815	break;
1816	case CSAM_TAG_PATM:
1817	STAM_COUNTER_INC(&pVM->csam.s.StatPagePATM);
1818	break;
1819	case CSAM_TAG_REM:
1820	STAM_COUNTER_INC(&pVM->csam.s.StatPageREM);
1821	break;
1822	default:
1823	break; /* to shut up GCC */
1824	}
1825	#endif
1826
1827	#endif
1828
1829	STAM_COUNTER_INC(&pVM->csam.s.StatNrPages);
1830	if (fMonitorInvalidation)
1831	STAM_COUNTER_INC(&pVM->csam.s.StatNrPagesInv);
1832
1833	return &pPage->page;
1834	}
1835
1836	/**
1837	* Monitors a code page (if not already monitored)
1838	*
1839	* @returns VBox status code
1840	* @param pVM The VM to operate on.
1841	* @param pPageAddrGC The page to monitor
1842	* @param enmTag Monitor tag
1843	*/
1844	VMMR3DECL(int) CSAMR3MonitorPage(PVM pVM, RTRCPTR pPageAddrGC, CSAMTAG enmTag)
1845	{
1846	PCSAMPAGEREC pPageRec = NULL;
1847	int rc;
1848	bool fMonitorInvalidation;
1849	Assert(pVM->cCpus == 1);
1850	PVMCPU pVCpu = VMMGetCpu0(pVM);
1851
1852	/* Dirty pages must be handled before calling this function!. */
1853	Assert(!pVM->csam.s.cDirtyPages);
1854
1855	if (pVM->csam.s.fScanningStarted == false)
1856	return VINF_SUCCESS; /* too early */
1857
1858	pPageAddrGC &= PAGE_BASE_GC_MASK;
1859
1860	Log(("CSAMR3MonitorPage %RRv %d\n", pPageAddrGC, enmTag));
1861
1862	/** @todo implicit assumption */
1863	fMonitorInvalidation = (enmTag == CSAM_TAG_PATM);
1864
1865	pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)pPageAddrGC);
1866	if (pPageRec == NULL)
1867	{
1868	uint64_t fFlags;
1869
1870	rc = PGMGstGetPage(pVCpu, pPageAddrGC, &fFlags, NULL);
1871	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1872	if ( rc == VINF_SUCCESS
1873	&& (fFlags & X86_PTE_US))
1874	{
1875	/* We don't care about user pages. */
1876	STAM_COUNTER_INC(&pVM->csam.s.StatNrUserPages);
1877	return VINF_SUCCESS;
1878	}
1879
1880	csamCreatePageRecord(pVM, pPageAddrGC, enmTag, true /* 32 bits code */, fMonitorInvalidation);
1881
1882	pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)pPageAddrGC);
1883	Assert(pPageRec);
1884	}
1885	/** @todo reference count */
1886
1887	#ifdef CSAM_MONITOR_CSAM_CODE_PAGES
1888	Assert(pPageRec->page.fMonitorActive);
1889	#endif
1890
1891	#ifdef CSAM_MONITOR_CODE_PAGES
1892	if (!pPageRec->page.fMonitorActive)
1893	{
1894	Log(("CSAMR3MonitorPage: activate monitoring for %RRv\n", pPageAddrGC));
1895
1896	rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_WRITE, pPageAddrGC, pPageAddrGC + (PAGE_SIZE - 1) /* inclusive! */,
1897	(fMonitorInvalidation) ? CSAMCodePageInvalidate : 0, CSAMCodePageWriteHandler, "CSAMGCCodePageWriteHandler", 0,
1898	csamGetMonitorDescription(enmTag));
1899	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PGM_HANDLER_VIRTUAL_CONFLICT, ("PGMR3HandlerVirtualRegisterEx %RRv failed with %Rrc\n", pPageAddrGC, rc));
1900	if (RT_FAILURE(rc))
1901	Log(("PGMR3HandlerVirtualRegisterEx for %RRv failed with %Rrc\n", pPageAddrGC, rc));
1902
1903	/* Could fail, because it's already monitored. Don't treat that condition as fatal. */
1904
1905	/* Prefetch it in case it's not there yet. */
1906	rc = PGMPrefetchPage(pVCpu, pPageAddrGC);
1907	AssertRC(rc);
1908
1909	rc = PGMShwMakePageReadonly(pVCpu, pPageAddrGC, 0 /fFlags/);
1910	Assert(rc == VINF_SUCCESS \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT);
1911
1912	STAM_COUNTER_INC(&pVM->csam.s.StatPageMonitor);
1913
1914	pPageRec->page.fMonitorActive = true;
1915	pPageRec->page.fMonitorInvalidation = fMonitorInvalidation;
1916	}
1917	else
1918	if ( !pPageRec->page.fMonitorInvalidation
1919	&& fMonitorInvalidation)
1920	{
1921	Assert(pPageRec->page.fMonitorActive);
1922	PGMHandlerVirtualChangeInvalidateCallback(pVM, pPageRec->page.pPageGC, CSAMCodePageInvalidate);
1923	pPageRec->page.fMonitorInvalidation = true;
1924	STAM_COUNTER_INC(&pVM->csam.s.StatNrPagesInv);
1925
1926	/* Prefetch it in case it's not there yet. */
1927	rc = PGMPrefetchPage(pVCpu, pPageAddrGC);
1928	AssertRC(rc);
1929
1930	/* Make sure it's readonly. Page invalidation may have modified the attributes. */
1931	rc = PGMShwMakePageReadonly(pVCpu, pPageAddrGC, 0 /fFlags/);
1932	Assert(rc == VINF_SUCCESS \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT);
1933	}
1934
1935	#if 0 /* def VBOX_STRICT -> very annoying) */
1936	if (pPageRec->page.fMonitorActive)
1937	{
1938	uint64_t fPageShw;
1939	RTHCPHYS GCPhys;
1940	rc = PGMShwGetPage(pVCpu, pPageAddrGC, &fPageShw, &GCPhys);
1941	// AssertMsg( (rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT)
1942	// \|\| !(fPageShw & X86_PTE_RW)
1943	// \|\| (pPageRec->page.GCPhys == 0), ("Shadow page flags for %RRv (%RHp) aren't readonly (%RX64)!!\n", pPageAddrGC, GCPhys, fPageShw));
1944	}
1945	#endif
1946
1947	if (pPageRec->page.GCPhys == 0)
1948	{
1949	/* Prefetch it in case it's not there yet. */
1950	rc = PGMPrefetchPage(pVCpu, pPageAddrGC);
1951	AssertRC(rc);
1952	/* The page was changed behind our back. It won't be made read-only until the next SyncCR3, so force it here. */
1953	rc = PGMShwMakePageReadonly(pVCpu, pPageAddrGC, 0 /fFlags/);
1954	Assert(rc == VINF_SUCCESS \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT);
1955	}
1956	#endif /* CSAM_MONITOR_CODE_PAGES */
1957	return VINF_SUCCESS;
1958	}
1959
1960	/**
1961	* Unmonitors a code page
1962	*
1963	* @returns VBox status code
1964	* @param pVM The VM to operate on.
1965	* @param pPageAddrGC The page to monitor
1966	* @param enmTag Monitor tag
1967	*/
1968	VMMR3DECL(int) CSAMR3UnmonitorPage(PVM pVM, RTRCPTR pPageAddrGC, CSAMTAG enmTag)
1969	{
1970	pPageAddrGC &= PAGE_BASE_GC_MASK;
1971
1972	Log(("CSAMR3UnmonitorPage %RRv %d\n", pPageAddrGC, enmTag));
1973
1974	Assert(enmTag == CSAM_TAG_REM);
1975
1976	#ifdef VBOX_STRICT
1977	PCSAMPAGEREC pPageRec;
1978
1979	pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)pPageAddrGC);
1980	Assert(pPageRec && pPageRec->page.enmTag == enmTag);
1981	#endif
1982	return CSAMR3RemovePage(pVM, pPageAddrGC);
1983	}
1984
1985	/**
1986	* Removes a page record from our lookup tree
1987	*
1988	* @returns VBox status code
1989	* @param pVM The VM to operate on.
1990	* @param GCPtr Page address
1991	*/
1992	static int csamRemovePageRecord(PVM pVM, RTRCPTR GCPtr)
1993	{
1994	PCSAMPAGEREC pPageRec;
1995	Assert(pVM->cCpus == 1);
1996	PVMCPU pVCpu = VMMGetCpu0(pVM);
1997
1998	Log(("csamRemovePageRecord %RRv\n", GCPtr));
1999	pPageRec = (PCSAMPAGEREC)RTAvlPVRemove(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)GCPtr);
2000
2001	if (pPageRec)
2002	{
2003	STAM_COUNTER_INC(&pVM->csam.s.StatNrRemovedPages);
2004
2005	#ifdef CSAM_MONITOR_CODE_PAGES
2006	if (pPageRec->page.fMonitorActive)
2007	{
2008	/* @todo -> this is expensive (cr3 reload)!!!
2009	* if this happens often, then reuse it instead!!!
2010	*/
2011	Assert(!fInCSAMCodePageInvalidate);
2012	STAM_COUNTER_DEC(&pVM->csam.s.StatPageMonitor);
2013	PGMHandlerVirtualDeregister(pVM, GCPtr);
2014	}
2015	if (pPageRec->page.enmTag == CSAM_TAG_PATM)
2016	{
2017	/* Make sure the recompiler flushes its cache as this page is no longer monitored. */
2018	STAM_COUNTER_INC(&pVM->csam.s.StatPageRemoveREMFlush);
2019	CPUMSetChangedFlags(pVCpu, CPUM_CHANGED_GLOBAL_TLB_FLUSH);
2020	}
2021	#endif
2022
2023	#ifdef VBOX_WITH_STATISTICS
2024	switch (pPageRec->page.enmTag)
2025	{
2026	case CSAM_TAG_CSAM:
2027	STAM_COUNTER_DEC(&pVM->csam.s.StatPageCSAM);
2028	break;
2029	case CSAM_TAG_PATM:
2030	STAM_COUNTER_DEC(&pVM->csam.s.StatPagePATM);
2031	break;
2032	case CSAM_TAG_REM:
2033	STAM_COUNTER_DEC(&pVM->csam.s.StatPageREM);
2034	break;
2035	default:
2036	break; /* to shut up GCC */
2037	}
2038	#endif
2039
2040	if (pPageRec->page.pBitmap) MMR3HeapFree(pPageRec->page.pBitmap);
2041	MMR3HeapFree(pPageRec);
2042	}
2043	else
2044	AssertFailed();
2045
2046	return VINF_SUCCESS;
2047	}
2048
2049	/**
2050	* Callback for delayed writes from non-EMT threads
2051	*
2052	* @param pVM VM Handle.
2053	* @param GCPtr The virtual address the guest is writing to. (not correct if it's an alias!)
2054	* @param cbBuf How much it's reading/writing.
2055	*/
2056	static DECLCALLBACK(void) CSAMDelayedWriteHandler(PVM pVM, RTRCPTR GCPtr, size_t cbBuf)
2057	{
2058	int rc = PATMR3PatchWrite(pVM, GCPtr, (uint32_t)cbBuf);
2059	AssertRC(rc);
2060	}
2061
2062	/**
2063	* \#PF Handler callback for virtual access handler ranges.
2064	*
2065	* Important to realize that a physical page in a range can have aliases, and
2066	* for ALL and WRITE handlers these will also trigger.
2067	*
2068	* @returns VINF_SUCCESS if the handler have carried out the operation.
2069	* @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
2070	* @param pVM VM Handle.
2071	* @param GCPtr The virtual address the guest is writing to. (not correct if it's an alias!)
2072	* @param pvPtr The HC mapping of that address.
2073	* @param pvBuf What the guest is reading/writing.
2074	* @param cbBuf How much it's reading/writing.
2075	* @param enmAccessType The access type.
2076	* @param pvUser User argument.
2077	*/
2078	static DECLCALLBACK(int) CSAMCodePageWriteHandler(PVM pVM, RTGCPTR GCPtr, void pvPtr, void pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
2079	{
2080	int rc;
2081
2082	Assert(enmAccessType == PGMACCESSTYPE_WRITE); NOREF(enmAccessType);
2083	Log(("CSAMCodePageWriteHandler: write to %RGv size=%zu\n", GCPtr, cbBuf));
2084	NOREF(pvUser);
2085
2086	if ( PAGE_ADDRESS(pvPtr) == PAGE_ADDRESS((uintptr_t)pvPtr + cbBuf - 1)
2087	&& !memcmp(pvPtr, pvBuf, cbBuf))
2088	{
2089	Log(("CSAMCodePageWriteHandler: dummy write -> ignore\n"));
2090	return VINF_PGM_HANDLER_DO_DEFAULT;
2091	}
2092
2093	if (VM_IS_EMT(pVM))
2094	rc = PATMR3PatchWrite(pVM, GCPtr, (uint32_t)cbBuf);
2095	else
2096	{
2097	/* Queue the write instead otherwise we'll get concurrency issues. */
2098	/** @note in theory not correct to let it write the data first before disabling a patch!
2099	* (if it writes the same data as the patch jump and we replace it with obsolete opcodes)
2100	*/
2101	Log(("CSAMCodePageWriteHandler: delayed write!\n"));
2102	AssertCompileSize(RTRCPTR, 4);
2103	rc = VMR3ReqCallVoidNoWait(pVM, VMCPUID_ANY, (PFNRT)CSAMDelayedWriteHandler, 3, pVM, (RTRCPTR)GCPtr, cbBuf);
2104	}
2105	AssertRC(rc);
2106
2107	return VINF_PGM_HANDLER_DO_DEFAULT;
2108	}
2109
2110	/**
2111	* \#PF Handler callback for invalidation of virtual access handler ranges.
2112	*
2113	* @param pVM VM Handle.
2114	* @param GCPtr The virtual address the guest has changed.
2115	*/
2116	static DECLCALLBACK(int) CSAMCodePageInvalidate(PVM pVM, RTGCPTR GCPtr)
2117	{
2118	fInCSAMCodePageInvalidate = true;
2119	LogFlow(("CSAMCodePageInvalidate %RGv\n", GCPtr));
2120	/** @todo We can't remove the page (which unregisters the virtual handler) as we are called from a DoWithAll on the virtual handler tree. Argh. */
2121	csamFlushPage(pVM, GCPtr, false /* don't remove page! */);
2122	fInCSAMCodePageInvalidate = false;
2123	return VINF_SUCCESS;
2124	}
2125
2126	/**
2127	* Check if the current instruction has already been checked before
2128	*
2129	* @returns VBox status code. (trap handled or not)
2130	* @param pVM The VM to operate on.
2131	* @param pInstr Instruction pointer
2132	* @param pPage CSAM patch structure pointer
2133	*/
2134	bool csamIsCodeScanned(PVM pVM, RTRCPTR pInstr, PCSAMPAGE *pPage)
2135	{
2136	PCSAMPAGEREC pPageRec;
2137	uint32_t offset;
2138
2139	STAM_PROFILE_START(&pVM->csam.s.StatTimeCheckAddr, a);
2140
2141	offset = pInstr & PAGE_OFFSET_MASK;
2142	pInstr = pInstr & PAGE_BASE_GC_MASK;
2143
2144	Assert(pPage);
2145
2146	if (pPage && (pPage)->pPageGC == pInstr)
2147	{
2148	if ((pPage)->pBitmap == NULL \|\| ASMBitTest((pPage)->pBitmap, offset))
2149	{
2150	STAM_COUNTER_ADD(&pVM->csam.s.StatNrKnownPagesHC, 1);
2151	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeCheckAddr, a);
2152	return true;
2153	}
2154	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeCheckAddr, a);
2155	return false;
2156	}
2157
2158	pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)pInstr);
2159	if (pPageRec)
2160	{
2161	if (pPage) *pPage= &pPageRec->page;
2162	if (pPageRec->page.pBitmap == NULL \|\| ASMBitTest(pPageRec->page.pBitmap, offset))
2163	{
2164	STAM_COUNTER_ADD(&pVM->csam.s.StatNrKnownPagesHC, 1);
2165	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeCheckAddr, a);
2166	return true;
2167	}
2168	}
2169	else
2170	{
2171	if (pPage) *pPage = NULL;
2172	}
2173	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeCheckAddr, a);
2174	return false;
2175	}
2176
2177	/**
2178	* Mark an instruction in a page as scanned/not scanned
2179	*
2180	* @param pVM The VM to operate on.
2181	* @param pPage Patch structure pointer
2182	* @param pInstr Instruction pointer
2183	* @param cbInstr Instruction size
2184	* @param fScanned Mark as scanned or not
2185	*/
2186	static void csamMarkCode(PVM pVM, PCSAMPAGE pPage, RTRCPTR pInstr, uint32_t cbInstr, bool fScanned)
2187	{
2188	LogFlow(("csamMarkCodeAsScanned %RRv cbInstr=%d\n", pInstr, cbInstr));
2189	CSAMMarkPage(pVM, pInstr, fScanned);
2190
2191	/** @todo should recreate empty bitmap if !fScanned */
2192	if (pPage->pBitmap == NULL)
2193	return;
2194
2195	if (fScanned)
2196	{
2197	// retn instructions can be scanned more than once
2198	if (ASMBitTest(pPage->pBitmap, pInstr & PAGE_OFFSET_MASK) == 0)
2199	{
2200	pPage->uSize += cbInstr;
2201	STAM_COUNTER_ADD(&pVM->csam.s.StatNrInstr, 1);
2202	}
2203	if (pPage->uSize >= PAGE_SIZE)
2204	{
2205	Log(("Scanned full page (%RRv) -> free bitmap\n", pInstr & PAGE_BASE_GC_MASK));
2206	MMR3HeapFree(pPage->pBitmap);
2207	pPage->pBitmap = NULL;
2208	}
2209	else
2210	ASMBitSet(pPage->pBitmap, pInstr & PAGE_OFFSET_MASK);
2211	}
2212	else
2213	ASMBitClear(pPage->pBitmap, pInstr & PAGE_OFFSET_MASK);
2214	}
2215
2216	/**
2217	* Mark an instruction in a page as scanned/not scanned
2218	*
2219	* @returns VBox status code.
2220	* @param pVM The VM to operate on.
2221	* @param pInstr Instruction pointer
2222	* @param cbInstr Instruction size
2223	* @param fScanned Mark as scanned or not
2224	*/
2225	VMMR3DECL(int) CSAMR3MarkCode(PVM pVM, RTRCPTR pInstr, uint32_t cbInstr, bool fScanned)
2226	{
2227	PCSAMPAGE pPage = 0;
2228
2229	Assert(!fScanned); /* other case not implemented. */
2230	Assert(!PATMIsPatchGCAddr(pVM, pInstr));
2231
2232	if (csamIsCodeScanned(pVM, pInstr, &pPage) == false)
2233	{
2234	Assert(fScanned == true); /* other case should not be possible */
2235	return VINF_SUCCESS;
2236	}
2237
2238	Log(("CSAMR3MarkCode: %RRv size=%d fScanned=%d\n", pInstr, cbInstr, fScanned));
2239	csamMarkCode(pVM, pPage, pInstr, cbInstr, fScanned);
2240	return VINF_SUCCESS;
2241	}
2242
2243
2244	/**
2245	* Scan and analyse code
2246	*
2247	* @returns VBox status code.
2248	* @param pVM The VM to operate on.
2249	* @param pCtxCore CPU context
2250	* @param pInstrGC Instruction pointer
2251	*/
2252	VMMR3DECL(int) CSAMR3CheckCodeEx(PVM pVM, PCPUMCTXCORE pCtxCore, RTRCPTR pInstrGC)
2253	{
2254	if (EMIsRawRing0Enabled(pVM) == false \|\| PATMIsPatchGCAddr(pVM, pInstrGC) == true)
2255	{
2256	// No use
2257	return VINF_SUCCESS;
2258	}
2259
2260	if (CSAMIsEnabled(pVM))
2261	{
2262	/* Assuming 32 bits code for now. */
2263	Assert(SELMGetCpuModeFromSelector(VMMGetCpu0(pVM), pCtxCore->eflags, pCtxCore->cs, &pCtxCore->csHid) == DISCPUMODE_32BIT);
2264
2265	pInstrGC = SELMToFlat(pVM, DISSELREG_CS, pCtxCore, pInstrGC);
2266	return CSAMR3CheckCode(pVM, pInstrGC);
2267	}
2268	return VINF_SUCCESS;
2269	}
2270
2271	/**
2272	* Scan and analyse code
2273	*
2274	* @returns VBox status code.
2275	* @param pVM The VM to operate on.
2276	* @param pInstrGC Instruction pointer (0:32 virtual address)
2277	*/
2278	VMMR3DECL(int) CSAMR3CheckCode(PVM pVM, RTRCPTR pInstrGC)
2279	{
2280	int rc;
2281	PCSAMPAGE pPage = NULL;
2282
2283	if ( EMIsRawRing0Enabled(pVM) == false
2284	\|\| PATMIsPatchGCAddr(pVM, pInstrGC) == true)
2285	{
2286	/* Not active. */
2287	return VINF_SUCCESS;
2288	}
2289
2290	if (CSAMIsEnabled(pVM))
2291	{
2292	/* Cache record for CSAMGCVirtToHCVirt */
2293	CSAMP2GLOOKUPREC cacheRec;
2294	RT_ZERO(cacheRec);
2295
2296	STAM_PROFILE_START(&pVM->csam.s.StatTime, a);
2297	rc = csamAnalyseCallCodeStream(pVM, pInstrGC, pInstrGC, true /* 32 bits code */, CSAMR3AnalyseCallback, pPage, &cacheRec);
2298	STAM_PROFILE_STOP(&pVM->csam.s.StatTime, a);
2299	if (cacheRec.Lock.pvMap)
2300	PGMPhysReleasePageMappingLock(pVM, &cacheRec.Lock);
2301
2302	if (rc != VINF_SUCCESS)
2303	{
2304	Log(("csamAnalyseCodeStream failed with %d\n", rc));
2305	return rc;
2306	}
2307	}
2308	return VINF_SUCCESS;
2309	}
2310
2311	/**
2312	* Flush dirty code pages
2313	*
2314	* @returns VBox status code.
2315	* @param pVM The VM to operate on.
2316	*/
2317	static int csamR3FlushDirtyPages(PVM pVM)
2318	{
2319	Assert(pVM->cCpus == 1);
2320	PVMCPU pVCpu = VMMGetCpu0(pVM);
2321
2322	STAM_PROFILE_START(&pVM->csam.s.StatFlushDirtyPages, a);
2323
2324	for (uint32_t i=0;i<pVM->csam.s.cDirtyPages;i++)
2325	{
2326	int rc;
2327	PCSAMPAGEREC pPageRec;
2328	RTRCPTR GCPtr = pVM->csam.s.pvDirtyBasePage[i];
2329
2330	GCPtr = GCPtr & PAGE_BASE_GC_MASK;
2331
2332	#ifdef VBOX_WITH_REM
2333	/* Notify the recompiler that this page has been changed. */
2334	REMR3NotifyCodePageChanged(pVM, pVCpu, GCPtr);
2335	#endif
2336
2337	/* Enable write protection again. (use the fault address as it might be an alias) */
2338	rc = PGMShwMakePageReadonly(pVCpu, pVM->csam.s.pvDirtyFaultPage[i], 0 /fFlags/);
2339	Assert(rc == VINF_SUCCESS \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT);
2340
2341	Log(("CSAMR3FlushDirtyPages: flush %RRv (modifypage rc=%Rrc)\n", pVM->csam.s.pvDirtyBasePage[i], rc));
2342
2343	pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)GCPtr);
2344	if (pPageRec && pPageRec->page.enmTag == CSAM_TAG_REM)
2345	{
2346	uint64_t fFlags;
2347
2348	rc = PGMGstGetPage(pVCpu, GCPtr, &fFlags, NULL);
2349	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
2350	if ( rc == VINF_SUCCESS
2351	&& (fFlags & X86_PTE_US))
2352	{
2353	/* We don't care about user pages. */
2354	csamRemovePageRecord(pVM, GCPtr);
2355	STAM_COUNTER_INC(&pVM->csam.s.StatNrUserPages);
2356	}
2357	}
2358	}
2359	pVM->csam.s.cDirtyPages = 0;
2360	STAM_PROFILE_STOP(&pVM->csam.s.StatFlushDirtyPages, a);
2361	return VINF_SUCCESS;
2362	}
2363
2364	/**
2365	* Flush potential new code pages
2366	*
2367	* @returns VBox status code.
2368	* @param pVM The VM to operate on.
2369	*/
2370	static int csamR3FlushCodePages(PVM pVM)
2371	{
2372	Assert(pVM->cCpus == 1);
2373	PVMCPU pVCpu = VMMGetCpu0(pVM);
2374
2375	for (uint32_t i=0;i<pVM->csam.s.cPossibleCodePages;i++)
2376	{
2377	RTRCPTR GCPtr = pVM->csam.s.pvPossibleCodePage[i];
2378
2379	GCPtr = GCPtr & PAGE_BASE_GC_MASK;
2380
2381	Log(("csamR3FlushCodePages: %RRv\n", GCPtr));
2382	PGMShwMakePageNotPresent(pVCpu, GCPtr, 0 /fFlags/);
2383	/* Resync the page to make sure instruction fetch will fault */
2384	CSAMMarkPage(pVM, GCPtr, false);
2385	}
2386	pVM->csam.s.cPossibleCodePages = 0;
2387	return VINF_SUCCESS;
2388	}
2389
2390	/**
2391	* Perform any pending actions
2392	*
2393	* @returns VBox status code.
2394	* @param pVM The VM to operate on.
2395	* @param pVCpu The VMCPU to operate on.
2396	*/
2397	VMMR3DECL(int) CSAMR3DoPendingAction(PVM pVM, PVMCPU pVCpu)
2398	{
2399	csamR3FlushDirtyPages(pVM);
2400	csamR3FlushCodePages(pVM);
2401
2402	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_CSAM_PENDING_ACTION);
2403	return VINF_SUCCESS;
2404	}
2405
2406	/**
2407	* Analyse interrupt and trap gates
2408	*
2409	* @returns VBox status code.
2410	* @param pVM The VM to operate on.
2411	* @param iGate Start gate
2412	* @param cGates Number of gates to check
2413	*/
2414	VMMR3DECL(int) CSAMR3CheckGates(PVM pVM, uint32_t iGate, uint32_t cGates)
2415	{
2416	Assert(pVM->cCpus == 1);
2417	PVMCPU pVCpu = VMMGetCpu0(pVM);
2418	uint16_t cbIDT;
2419	RTRCPTR GCPtrIDT = CPUMGetGuestIDTR(pVCpu, &cbIDT);
2420	uint32_t iGateEnd;
2421	uint32_t maxGates;
2422	VBOXIDTE aIDT[256];
2423	PVBOXIDTE pGuestIdte;
2424	int rc;
2425
2426	if (EMIsRawRing0Enabled(pVM) == false)
2427	{
2428	/* Enabling interrupt gates only works when raw ring 0 is enabled. */
2429	//AssertFailed();
2430	return VINF_SUCCESS;
2431	}
2432
2433	/* We only check all gates once during a session */
2434	if ( !pVM->csam.s.fGatesChecked
2435	&& cGates != 256)
2436	return VINF_SUCCESS; /* too early */
2437
2438	/* We only check all gates once during a session */
2439	if ( pVM->csam.s.fGatesChecked
2440	&& cGates != 1)
2441	return VINF_SUCCESS; /* ignored */
2442
2443	Assert(cGates <= 256);
2444	if (!GCPtrIDT \|\| cGates > 256)
2445	return VERR_INVALID_PARAMETER;
2446
2447	if (cGates != 1)
2448	{
2449	pVM->csam.s.fGatesChecked = true;
2450	for (unsigned i=0;i<RT_ELEMENTS(pVM->csam.s.pvCallInstruction);i++)
2451	{
2452	RTRCPTR pHandler = pVM->csam.s.pvCallInstruction[i];
2453
2454	if (pHandler)
2455	{
2456	PCSAMPAGE pPage = NULL;
2457	CSAMP2GLOOKUPREC cacheRec; /* Cache record for CSAMGCVirtToHCVirt. */
2458	RT_ZERO(cacheRec);
2459
2460	Log(("CSAMCheckGates: checking previous call instruction %RRv\n", pHandler));
2461	STAM_PROFILE_START(&pVM->csam.s.StatTime, a);
2462	rc = csamAnalyseCodeStream(pVM, pHandler, pHandler, true, CSAMR3AnalyseCallback, pPage, &cacheRec);
2463	STAM_PROFILE_STOP(&pVM->csam.s.StatTime, a);
2464	if (cacheRec.Lock.pvMap)
2465	PGMPhysReleasePageMappingLock(pVM, &cacheRec.Lock);
2466
2467	if (rc != VINF_SUCCESS)
2468	{
2469	Log(("CSAMCheckGates: csamAnalyseCodeStream failed with %d\n", rc));
2470	continue;
2471	}
2472	}
2473	}
2474	}
2475
2476	/* Determine valid upper boundary. */
2477	maxGates = (cbIDT+1) / sizeof(VBOXIDTE);
2478	Assert(iGate < maxGates);
2479	if (iGate > maxGates)
2480	return VERR_INVALID_PARAMETER;
2481
2482	if (iGate + cGates > maxGates)
2483	cGates = maxGates - iGate;
2484
2485	GCPtrIDT = GCPtrIDT + iGate * sizeof(VBOXIDTE);
2486	iGateEnd = iGate + cGates;
2487
2488	STAM_PROFILE_START(&pVM->csam.s.StatCheckGates, a);
2489
2490	/*
2491	* Get IDT entries.
2492	*/
2493	rc = PGMPhysSimpleReadGCPtr(pVCpu, aIDT, GCPtrIDT, cGates*sizeof(VBOXIDTE));
2494	if (RT_FAILURE(rc))
2495	{
2496	AssertMsgRC(rc, ("Failed to read IDTE! rc=%Rrc\n", rc));
2497	STAM_PROFILE_STOP(&pVM->csam.s.StatCheckGates, a);
2498	return rc;
2499	}
2500	pGuestIdte = &aIDT[0];
2501
2502	for (/iGate/; iGate<iGateEnd; iGate++, pGuestIdte++)
2503	{
2504	Assert(TRPMR3GetGuestTrapHandler(pVM, iGate) == TRPM_INVALID_HANDLER);
2505
2506	if ( pGuestIdte->Gen.u1Present
2507	&& (pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32 \|\| pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_INT_32)
2508	&& (pGuestIdte->Gen.u2DPL == 3 \|\| pGuestIdte->Gen.u2DPL == 0)
2509	)
2510	{
2511	RTRCPTR pHandler;
2512	PCSAMPAGE pPage = NULL;
2513	DBGFSELINFO selInfo;
2514	CSAMP2GLOOKUPREC cacheRec; /* Cache record for CSAMGCVirtToHCVirt. */
2515	RT_ZERO(cacheRec);
2516
2517	pHandler = VBOXIDTE_OFFSET(*pGuestIdte);
2518	pHandler = SELMToFlatBySel(pVM, pGuestIdte->Gen.u16SegSel, pHandler);
2519
2520	rc = SELMR3GetSelectorInfo(pVM, pVCpu, pGuestIdte->Gen.u16SegSel, &selInfo);
2521	if ( RT_FAILURE(rc)
2522	\|\| (selInfo.fFlags & (DBGFSELINFO_FLAGS_NOT_PRESENT \| DBGFSELINFO_FLAGS_INVALID))
2523	\|\| selInfo.GCPtrBase != 0
2524	\|\| selInfo.cbLimit != ~0U
2525	)
2526	{
2527	/* Refuse to patch a handler whose idt cs selector isn't wide open. */
2528	Log(("CSAMCheckGates: check gate %d failed due to rc %Rrc GCPtrBase=%RRv limit=%x\n", iGate, rc, selInfo.GCPtrBase, selInfo.cbLimit));
2529	continue;
2530	}
2531
2532
2533	if (pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32)
2534	{
2535	Log(("CSAMCheckGates: check trap gate %d at %04X:%08X (flat %RRv)\n", iGate, pGuestIdte->Gen.u16SegSel, VBOXIDTE_OFFSET(*pGuestIdte), pHandler));
2536	}
2537	else
2538	{
2539	Log(("CSAMCheckGates: check interrupt gate %d at %04X:%08X (flat %RRv)\n", iGate, pGuestIdte->Gen.u16SegSel, VBOXIDTE_OFFSET(*pGuestIdte), pHandler));
2540	}
2541
2542	STAM_PROFILE_START(&pVM->csam.s.StatTime, b);
2543	rc = csamAnalyseCodeStream(pVM, pHandler, pHandler, true, CSAMR3AnalyseCallback, pPage, &cacheRec);
2544	STAM_PROFILE_STOP(&pVM->csam.s.StatTime, b);
2545	if (cacheRec.Lock.pvMap)
2546	PGMPhysReleasePageMappingLock(pVM, &cacheRec.Lock);
2547
2548	if (rc != VINF_SUCCESS)
2549	{
2550	Log(("CSAMCheckGates: csamAnalyseCodeStream failed with %d\n", rc));
2551	continue;
2552	}
2553	/* OpenBSD guest specific patch test. */
2554	if (iGate >= 0x20)
2555	{
2556	PCPUMCTX pCtx;
2557	DISCPUSTATE cpu;
2558	RTGCUINTPTR32 aOpenBsdPushCSOffset[3] = {0x03, /* OpenBSD 3.7 & 3.8 */
2559	0x2B, /* OpenBSD 4.0 installation ISO */
2560	0x2F}; /* OpenBSD 4.0 after install */
2561
2562	pCtx = CPUMQueryGuestCtxPtr(pVCpu);
2563
2564	for (unsigned i=0;i<RT_ELEMENTS(aOpenBsdPushCSOffset);i++)
2565	{
2566	rc = CPUMR3DisasmInstrCPU(pVM, pVCpu, pCtx, pHandler - aOpenBsdPushCSOffset[i], &cpu, NULL);
2567	if ( rc == VINF_SUCCESS
2568	&& cpu.pCurInstr->uOpcode == OP_PUSH
2569	&& cpu.pCurInstr->param1 == OP_PARM_REG_CS)
2570	{
2571	rc = PATMR3InstallPatch(pVM, pHandler - aOpenBsdPushCSOffset[i], PATMFL_CODE32 \| PATMFL_GUEST_SPECIFIC);
2572	if (RT_SUCCESS(rc))
2573	Log(("Installed OpenBSD interrupt handler prefix instruction (push cs) patch\n"));
2574	}
2575	}
2576	}
2577
2578	/* Trap gates and certain interrupt gates. */
2579	uint32_t fPatchFlags = PATMFL_CODE32 \| PATMFL_IDTHANDLER;
2580
2581	if (pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32)
2582	fPatchFlags \|= PATMFL_TRAPHANDLER;
2583	else
2584	fPatchFlags \|= PATMFL_INTHANDLER;
2585
2586	switch (iGate) {
2587	case 8:
2588	case 10:
2589	case 11:
2590	case 12:
2591	case 13:
2592	case 14:
2593	case 17:
2594	fPatchFlags \|= PATMFL_TRAPHANDLER_WITH_ERRORCODE;
2595	break;
2596	default:
2597	/* No error code. */
2598	break;
2599	}
2600
2601	Log(("Installing %s gate handler for 0x%X at %RRv\n", (pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32) ? "trap" : "intr", iGate, pHandler));
2602
2603	rc = PATMR3InstallPatch(pVM, pHandler, fPatchFlags);
2604	if (RT_SUCCESS(rc) \|\| rc == VERR_PATM_ALREADY_PATCHED)
2605	{
2606	Log(("Gate handler 0x%X is SAFE!\n", iGate));
2607
2608	RTRCPTR pNewHandlerGC = PATMR3QueryPatchGCPtr(pVM, pHandler);
2609	if (pNewHandlerGC)
2610	{
2611	rc = TRPMR3SetGuestTrapHandler(pVM, iGate, pNewHandlerGC);
2612	if (RT_FAILURE(rc))
2613	Log(("TRPMR3SetGuestTrapHandler %d failed with %Rrc\n", iGate, rc));
2614	}
2615	}
2616	}
2617	} /* for */
2618	STAM_PROFILE_STOP(&pVM->csam.s.StatCheckGates, a);
2619	return VINF_SUCCESS;
2620	}
2621
2622	/**
2623	* Record previous call instruction addresses
2624	*
2625	* @returns VBox status code.
2626	* @param pVM The VM to operate on.
2627	* @param GCPtrCall Call address
2628	*/
2629	VMMR3DECL(int) CSAMR3RecordCallAddress(PVM pVM, RTRCPTR GCPtrCall)
2630	{
2631	for (unsigned i=0;i<RT_ELEMENTS(pVM->csam.s.pvCallInstruction);i++)
2632	{
2633	if (pVM->csam.s.pvCallInstruction[i] == GCPtrCall)
2634	return VINF_SUCCESS;
2635	}
2636
2637	Log(("CSAMR3RecordCallAddress %RRv\n", GCPtrCall));
2638
2639	pVM->csam.s.pvCallInstruction[pVM->csam.s.iCallInstruction++] = GCPtrCall;
2640	if (pVM->csam.s.iCallInstruction >= RT_ELEMENTS(pVM->csam.s.pvCallInstruction))
2641	pVM->csam.s.iCallInstruction = 0;
2642
2643	return VINF_SUCCESS;
2644	}
2645
2646
2647	/**
2648	* Query CSAM state (enabled/disabled)
2649	*
2650	* @returns 0 - disabled, 1 - enabled
2651	* @param pVM The VM to operate on.
2652	*/
2653	VMMR3DECL(int) CSAMR3IsEnabled(PVM pVM)
2654	{
2655	return pVM->fCSAMEnabled;
2656	}
2657
2658	#ifdef VBOX_WITH_DEBUGGER
2659
2660	/**
2661	* The '.csamoff' command.
2662	*
2663	* @returns VBox status.
2664	* @param pCmd Pointer to the command descriptor (as registered).
2665	* @param pCmdHlp Pointer to command helper functions.
2666	* @param pVM Pointer to the current VM (if any).
2667	* @param paArgs Pointer to (readonly) array of arguments.
2668	* @param cArgs Number of arguments in the array.
2669	*/
2670	static DECLCALLBACK(int) csamr3CmdOff(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PVM pVM, PCDBGCVAR paArgs, unsigned cArgs)
2671	{
2672	DBGC_CMDHLP_REQ_VM_RET(pCmdHlp, pCmd, pVM);
2673	NOREF(cArgs); NOREF(paArgs);
2674
2675	int rc = CSAMDisableScanning(pVM);
2676	if (RT_FAILURE(rc))
2677	return DBGCCmdHlpFailRc(pCmdHlp, pCmd, rc, "CSAMDisableScanning");
2678	return DBGCCmdHlpPrintf(pCmdHlp, "CSAM Scanning disabled\n");
2679	}
2680
2681	/**
2682	* The '.csamon' command.
2683	*
2684	* @returns VBox status.
2685	* @param pCmd Pointer to the command descriptor (as registered).
2686	* @param pCmdHlp Pointer to command helper functions.
2687	* @param pVM Pointer to the current VM (if any).
2688	* @param paArgs Pointer to (readonly) array of arguments.
2689	* @param cArgs Number of arguments in the array.
2690	*/
2691	static DECLCALLBACK(int) csamr3CmdOn(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PVM pVM, PCDBGCVAR paArgs, unsigned cArgs)
2692	{
2693	DBGC_CMDHLP_REQ_VM_RET(pCmdHlp, pCmd, pVM);
2694	NOREF(cArgs); NOREF(paArgs);
2695
2696	int rc = CSAMEnableScanning(pVM);
2697	if (RT_FAILURE(rc))
2698	return DBGCCmdHlpFailRc(pCmdHlp, pCmd, rc, "CSAMEnableScanning");
2699	return DBGCCmdHlpPrintf(pCmdHlp, "CSAM Scanning enabled\n");
2700	}
2701
2702	#endif /* VBOX_WITH_DEBUGGER */

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source: vbox/trunk/src/VBox/VMM/VMMR3/CSAM.cpp@ 41737

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