VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/CSAM.cpp@ 44373

Last change on this file since 44373 was 44373, checked in by vboxsync, 12 years ago

HM,++: pVM -> pUVM for main, mark as many as possible interfaces module internal.

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1/* $Id: CSAM.cpp 44373 2013-01-25 12:19:29Z vboxsync $ */
2/** @file
3 * CSAM - Guest OS Code Scanning and Analysis Manager
4 */
5
6/*
7 * Copyright (C) 2006-2013 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18/*******************************************************************************
19* Header Files *
20*******************************************************************************/
21#define LOG_GROUP LOG_GROUP_CSAM
22#include <VBox/vmm/cpum.h>
23#include <VBox/vmm/stam.h>
24#include <VBox/vmm/patm.h>
25#include <VBox/vmm/csam.h>
26#include <VBox/vmm/cpumdis.h>
27#include <VBox/vmm/pgm.h>
28#include <VBox/vmm/iom.h>
29#include <VBox/sup.h>
30#include <VBox/vmm/mm.h>
31#include <VBox/vmm/em.h>
32#ifdef VBOX_WITH_REM
33# include <VBox/vmm/rem.h>
34#endif
35#include <VBox/vmm/selm.h>
36#include <VBox/vmm/trpm.h>
37#include <VBox/vmm/cfgm.h>
38#include <VBox/vmm/ssm.h>
39#include <VBox/param.h>
40#include <iprt/avl.h>
41#include <iprt/asm.h>
42#include <iprt/thread.h>
43#include "CSAMInternal.h"
44#include <VBox/vmm/vm.h>
45#include <VBox/vmm/uvm.h>
46#include <VBox/dbg.h>
47#include <VBox/err.h>
48#include <VBox/log.h>
49#include <iprt/assert.h>
50#include <iprt/string.h>
51#include <VBox/dis.h>
52#include <VBox/disopcode.h>
53#include "internal/pgm.h"
54
55
56/* Enabled by default */
57#define CSAM_ENABLE
58
59/* Enable to monitor code pages for self-modifying code. */
60#define CSAM_MONITOR_CODE_PAGES
61/* Enable to monitor all scanned pages
62#define CSAM_MONITOR_CSAM_CODE_PAGES */
63/* Enable to scan beyond ret instructions.
64#define CSAM_ANALYSE_BEYOND_RET */
65
66/*******************************************************************************
67* Internal Functions *
68*******************************************************************************/
69static DECLCALLBACK(int) csamr3Save(PVM pVM, PSSMHANDLE pSSM);
70static DECLCALLBACK(int) csamr3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
71static DECLCALLBACK(int) CSAMCodePageWriteHandler(PVM pVM, RTGCPTR GCPtr, void *pvPtr, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
72static DECLCALLBACK(int) CSAMCodePageInvalidate(PVM pVM, RTGCPTR GCPtr);
73
74bool csamIsCodeScanned(PVM pVM, RTRCPTR pInstr, PCSAMPAGE *pPage);
75int csamR3CheckPageRecord(PVM pVM, RTRCPTR pInstr);
76static PCSAMPAGE csamCreatePageRecord(PVM pVM, RTRCPTR GCPtr, CSAMTAG enmTag, bool fCode32, bool fMonitorInvalidation = false);
77static int csamRemovePageRecord(PVM pVM, RTRCPTR GCPtr);
78static int csamReinit(PVM pVM);
79static void csamMarkCode(PVM pVM, PCSAMPAGE pPage, RTRCPTR pInstr, uint32_t opsize, bool fScanned);
80static int csamAnalyseCodeStream(PVM pVM, RCPTRTYPE(uint8_t *) pInstrGC, RCPTRTYPE(uint8_t *) pCurInstrGC, bool fCode32,
81 PFN_CSAMR3ANALYSE pfnCSAMR3Analyse, void *pUserData, PCSAMP2GLOOKUPREC pCacheRec);
82
83/** @todo Temporary for debugging. */
84static bool fInCSAMCodePageInvalidate = false;
85
86/*******************************************************************************
87* Global Variables *
88*******************************************************************************/
89#ifdef VBOX_WITH_DEBUGGER
90static DECLCALLBACK(int) csamr3CmdOn(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PVM pVM, PCDBGCVAR paArgs, unsigned cArgs);
91static DECLCALLBACK(int) csamr3CmdOff(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PVM pVM, PCDBGCVAR paArgs, unsigned cArgs);
92
93/** Command descriptors. */
94static const DBGCCMD g_aCmds[] =
95{
96 /* pszCmd, cArgsMin, cArgsMax, paArgDesc, cArgDescs, fFlags, pfnHandler pszSyntax, ....pszDescription */
97 { "csamon", 0, 0, NULL, 0, 0, csamr3CmdOn, "", "Enable CSAM code scanning." },
98 { "csamoff", 0, 0, NULL, 0, 0, csamr3CmdOff, "", "Disable CSAM code scanning." },
99};
100#endif
101
102/**
103 * SSM descriptor table for the CSAM structure.
104 */
105static const SSMFIELD g_aCsamFields[] =
106{
107 /** @todo there are more fields that can be ignored here. */
108 SSMFIELD_ENTRY_IGNORE( CSAM, offVM),
109 SSMFIELD_ENTRY_PAD_HC64( CSAM, Alignment0, sizeof(uint32_t)),
110 SSMFIELD_ENTRY_IGN_HCPTR( CSAM, pPageTree),
111 SSMFIELD_ENTRY( CSAM, aDangerousInstr),
112 SSMFIELD_ENTRY( CSAM, cDangerousInstr),
113 SSMFIELD_ENTRY( CSAM, iDangerousInstr),
114 SSMFIELD_ENTRY_RCPTR( CSAM, pPDBitmapGC), /// @todo ignore this?
115 SSMFIELD_ENTRY_RCPTR( CSAM, pPDHCBitmapGC), /// @todo ignore this?
116 SSMFIELD_ENTRY_IGN_HCPTR( CSAM, pPDBitmapHC),
117 SSMFIELD_ENTRY_IGN_HCPTR( CSAM, pPDGCBitmapHC),
118 SSMFIELD_ENTRY_IGN_HCPTR( CSAM, savedstate.pSSM),
119 SSMFIELD_ENTRY( CSAM, savedstate.cPageRecords),
120 SSMFIELD_ENTRY( CSAM, savedstate.cPatchPageRecords),
121 SSMFIELD_ENTRY( CSAM, cDirtyPages),
122 SSMFIELD_ENTRY_RCPTR_ARRAY( CSAM, pvDirtyBasePage),
123 SSMFIELD_ENTRY_RCPTR_ARRAY( CSAM, pvDirtyFaultPage),
124 SSMFIELD_ENTRY( CSAM, cPossibleCodePages),
125 SSMFIELD_ENTRY_RCPTR_ARRAY( CSAM, pvPossibleCodePage),
126 SSMFIELD_ENTRY_RCPTR_ARRAY( CSAM, pvCallInstruction),
127 SSMFIELD_ENTRY( CSAM, iCallInstruction),
128 SSMFIELD_ENTRY( CSAM, fScanningStarted),
129 SSMFIELD_ENTRY( CSAM, fGatesChecked),
130 SSMFIELD_ENTRY_PAD_HC( CSAM, Alignment1, 6, 2),
131 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrTraps),
132 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrPages),
133 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrPagesInv),
134 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrRemovedPages),
135 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrPatchPages),
136 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrPageNPHC),
137 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrPageNPGC),
138 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrFlushes),
139 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrFlushesSkipped),
140 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrKnownPagesHC),
141 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrKnownPagesGC),
142 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrInstr),
143 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrBytesRead),
144 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrOpcodeRead),
145 SSMFIELD_ENTRY_IGNORE( CSAM, StatTime),
146 SSMFIELD_ENTRY_IGNORE( CSAM, StatTimeCheckAddr),
147 SSMFIELD_ENTRY_IGNORE( CSAM, StatTimeAddrConv),
148 SSMFIELD_ENTRY_IGNORE( CSAM, StatTimeFlushPage),
149 SSMFIELD_ENTRY_IGNORE( CSAM, StatTimeDisasm),
150 SSMFIELD_ENTRY_IGNORE( CSAM, StatFlushDirtyPages),
151 SSMFIELD_ENTRY_IGNORE( CSAM, StatCheckGates),
152 SSMFIELD_ENTRY_IGNORE( CSAM, StatCodePageModified),
153 SSMFIELD_ENTRY_IGNORE( CSAM, StatDangerousWrite),
154 SSMFIELD_ENTRY_IGNORE( CSAM, StatInstrCacheHit),
155 SSMFIELD_ENTRY_IGNORE( CSAM, StatInstrCacheMiss),
156 SSMFIELD_ENTRY_IGNORE( CSAM, StatPagePATM),
157 SSMFIELD_ENTRY_IGNORE( CSAM, StatPageCSAM),
158 SSMFIELD_ENTRY_IGNORE( CSAM, StatPageREM),
159 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrUserPages),
160 SSMFIELD_ENTRY_IGNORE( CSAM, StatPageMonitor),
161 SSMFIELD_ENTRY_IGNORE( CSAM, StatPageRemoveREMFlush),
162 SSMFIELD_ENTRY_IGNORE( CSAM, StatBitmapAlloc),
163 SSMFIELD_ENTRY_IGNORE( CSAM, StatScanNextFunction),
164 SSMFIELD_ENTRY_IGNORE( CSAM, StatScanNextFunctionFailed),
165 SSMFIELD_ENTRY_TERM()
166};
167
168/** Fake type to simplify g_aCsamPDBitmapArray construction. */
169typedef struct
170{
171 uint8_t *a[CSAM_PGDIRBMP_CHUNKS];
172} CSAMPDBITMAPARRAY;
173
174/**
175 * SSM descriptor table for the CSAM::pPDBitmapHC array.
176 */
177static SSMFIELD const g_aCsamPDBitmapArray[] =
178{
179 SSMFIELD_ENTRY_HCPTR_NI_ARRAY(CSAMPDBITMAPARRAY, a),
180 SSMFIELD_ENTRY_TERM()
181};
182
183/**
184 * SSM descriptor table for the CSAMPAGEREC structure.
185 */
186static const SSMFIELD g_aCsamPageRecFields[] =
187{
188 SSMFIELD_ENTRY_IGN_HCPTR( CSAMPAGEREC, Core.Key),
189 SSMFIELD_ENTRY_IGN_HCPTR( CSAMPAGEREC, Core.pLeft),
190 SSMFIELD_ENTRY_IGN_HCPTR( CSAMPAGEREC, Core.pRight),
191 SSMFIELD_ENTRY_IGNORE( CSAMPAGEREC, Core.uchHeight),
192 SSMFIELD_ENTRY_PAD_HC_AUTO( 3, 7),
193 SSMFIELD_ENTRY_RCPTR( CSAMPAGEREC, page.pPageGC),
194 SSMFIELD_ENTRY_PAD_HC_AUTO( 0, 4),
195 SSMFIELD_ENTRY_PAD_MSC32_AUTO( 4),
196 SSMFIELD_ENTRY_GCPHYS( CSAMPAGEREC, page.GCPhys),
197 SSMFIELD_ENTRY( CSAMPAGEREC, page.fFlags),
198 SSMFIELD_ENTRY( CSAMPAGEREC, page.uSize),
199 SSMFIELD_ENTRY_PAD_HC_AUTO( 0, 4),
200 SSMFIELD_ENTRY_HCPTR_NI( CSAMPAGEREC, page.pBitmap),
201 SSMFIELD_ENTRY( CSAMPAGEREC, page.fCode32),
202 SSMFIELD_ENTRY( CSAMPAGEREC, page.fMonitorActive),
203 SSMFIELD_ENTRY( CSAMPAGEREC, page.fMonitorInvalidation),
204 SSMFIELD_ENTRY_PAD_HC_AUTO( 1, 1),
205 SSMFIELD_ENTRY( CSAMPAGEREC, page.enmTag),
206 SSMFIELD_ENTRY( CSAMPAGEREC, page.u64Hash),
207 SSMFIELD_ENTRY_TERM()
208};
209
210
211/**
212 * Initializes the CSAM.
213 *
214 * @returns VBox status code.
215 * @param pVM Pointer to the VM.
216 */
217VMMR3DECL(int) CSAMR3Init(PVM pVM)
218{
219 int rc;
220
221 LogFlow(("CSAMR3Init\n"));
222
223 /* Allocate bitmap for the page directory. */
224 rc = MMR3HyperAllocOnceNoRel(pVM, CSAM_PGDIRBMP_CHUNKS*sizeof(RTHCPTR), 0, MM_TAG_CSAM, (void **)&pVM->csam.s.pPDBitmapHC);
225 AssertRCReturn(rc, rc);
226 rc = MMR3HyperAllocOnceNoRel(pVM, CSAM_PGDIRBMP_CHUNKS*sizeof(RTRCPTR), 0, MM_TAG_CSAM, (void **)&pVM->csam.s.pPDGCBitmapHC);
227 AssertRCReturn(rc, rc);
228 pVM->csam.s.pPDBitmapGC = MMHyperR3ToRC(pVM, pVM->csam.s.pPDGCBitmapHC);
229 pVM->csam.s.pPDHCBitmapGC = MMHyperR3ToRC(pVM, pVM->csam.s.pPDBitmapHC);
230
231 rc = csamReinit(pVM);
232 AssertRCReturn(rc, rc);
233
234 /*
235 * Register save and load state notifiers.
236 */
237 rc = SSMR3RegisterInternal(pVM, "CSAM", 0, CSAM_SSM_VERSION, sizeof(pVM->csam.s) + PAGE_SIZE*16,
238 NULL, NULL, NULL,
239 NULL, csamr3Save, NULL,
240 NULL, csamr3Load, NULL);
241 AssertRCReturn(rc, rc);
242
243 STAM_REG(pVM, &pVM->csam.s.StatNrTraps, STAMTYPE_COUNTER, "/CSAM/PageTraps", STAMUNIT_OCCURENCES, "The number of CSAM page traps.");
244 STAM_REG(pVM, &pVM->csam.s.StatDangerousWrite, STAMTYPE_COUNTER, "/CSAM/DangerousWrites", STAMUNIT_OCCURENCES, "The number of dangerous writes that cause a context switch.");
245
246 STAM_REG(pVM, &pVM->csam.s.StatNrPageNPHC, STAMTYPE_COUNTER, "/CSAM/HC/PageNotPresent", STAMUNIT_OCCURENCES, "The number of CSAM pages marked not present.");
247 STAM_REG(pVM, &pVM->csam.s.StatNrPageNPGC, STAMTYPE_COUNTER, "/CSAM/GC/PageNotPresent", STAMUNIT_OCCURENCES, "The number of CSAM pages marked not present.");
248 STAM_REG(pVM, &pVM->csam.s.StatNrPages, STAMTYPE_COUNTER, "/CSAM/PageRec/AddedRW", STAMUNIT_OCCURENCES, "The number of CSAM page records (RW monitoring).");
249 STAM_REG(pVM, &pVM->csam.s.StatNrPagesInv, STAMTYPE_COUNTER, "/CSAM/PageRec/AddedRWI", STAMUNIT_OCCURENCES, "The number of CSAM page records (RW & invalidation monitoring).");
250 STAM_REG(pVM, &pVM->csam.s.StatNrRemovedPages, STAMTYPE_COUNTER, "/CSAM/PageRec/Removed", STAMUNIT_OCCURENCES, "The number of removed CSAM page records.");
251 STAM_REG(pVM, &pVM->csam.s.StatPageRemoveREMFlush,STAMTYPE_COUNTER, "/CSAM/PageRec/Removed/REMFlush", STAMUNIT_OCCURENCES, "The number of removed CSAM page records that caused a REM flush.");
252
253 STAM_REG(pVM, &pVM->csam.s.StatNrPatchPages, STAMTYPE_COUNTER, "/CSAM/PageRec/Patch", STAMUNIT_OCCURENCES, "The number of CSAM patch page records.");
254 STAM_REG(pVM, &pVM->csam.s.StatNrUserPages, STAMTYPE_COUNTER, "/CSAM/PageRec/Ignore/User", STAMUNIT_OCCURENCES, "The number of CSAM user page records (ignored).");
255 STAM_REG(pVM, &pVM->csam.s.StatPagePATM, STAMTYPE_COUNTER, "/CSAM/PageRec/Type/PATM", STAMUNIT_OCCURENCES, "The number of PATM page records.");
256 STAM_REG(pVM, &pVM->csam.s.StatPageCSAM, STAMTYPE_COUNTER, "/CSAM/PageRec/Type/CSAM", STAMUNIT_OCCURENCES, "The number of CSAM page records.");
257 STAM_REG(pVM, &pVM->csam.s.StatPageREM, STAMTYPE_COUNTER, "/CSAM/PageRec/Type/REM", STAMUNIT_OCCURENCES, "The number of REM page records.");
258 STAM_REG(pVM, &pVM->csam.s.StatPageMonitor, STAMTYPE_COUNTER, "/CSAM/PageRec/Monitored", STAMUNIT_OCCURENCES, "The number of monitored pages.");
259
260 STAM_REG(pVM, &pVM->csam.s.StatCodePageModified, STAMTYPE_COUNTER, "/CSAM/Monitor/DirtyPage", STAMUNIT_OCCURENCES, "The number of code page modifications.");
261
262 STAM_REG(pVM, &pVM->csam.s.StatNrFlushes, STAMTYPE_COUNTER, "/CSAM/PageFlushes", STAMUNIT_OCCURENCES, "The number of CSAM page flushes.");
263 STAM_REG(pVM, &pVM->csam.s.StatNrFlushesSkipped, STAMTYPE_COUNTER, "/CSAM/PageFlushesSkipped", STAMUNIT_OCCURENCES, "The number of CSAM page flushes that were skipped.");
264 STAM_REG(pVM, &pVM->csam.s.StatNrKnownPagesHC, STAMTYPE_COUNTER, "/CSAM/HC/KnownPageRecords", STAMUNIT_OCCURENCES, "The number of known CSAM page records.");
265 STAM_REG(pVM, &pVM->csam.s.StatNrKnownPagesGC, STAMTYPE_COUNTER, "/CSAM/GC/KnownPageRecords", STAMUNIT_OCCURENCES, "The number of known CSAM page records.");
266 STAM_REG(pVM, &pVM->csam.s.StatNrInstr, STAMTYPE_COUNTER, "/CSAM/ScannedInstr", STAMUNIT_OCCURENCES, "The number of scanned instructions.");
267 STAM_REG(pVM, &pVM->csam.s.StatNrBytesRead, STAMTYPE_COUNTER, "/CSAM/BytesRead", STAMUNIT_OCCURENCES, "The number of bytes read for scanning.");
268 STAM_REG(pVM, &pVM->csam.s.StatNrOpcodeRead, STAMTYPE_COUNTER, "/CSAM/OpcodeBytesRead", STAMUNIT_OCCURENCES, "The number of opcode bytes read by the recompiler.");
269
270 STAM_REG(pVM, &pVM->csam.s.StatBitmapAlloc, STAMTYPE_COUNTER, "/CSAM/Alloc/PageBitmap", STAMUNIT_OCCURENCES, "The number of page bitmap allocations.");
271
272 STAM_REG(pVM, &pVM->csam.s.StatInstrCacheHit, STAMTYPE_COUNTER, "/CSAM/Cache/Hit", STAMUNIT_OCCURENCES, "The number of dangerous instruction cache hits.");
273 STAM_REG(pVM, &pVM->csam.s.StatInstrCacheMiss, STAMTYPE_COUNTER, "/CSAM/Cache/Miss", STAMUNIT_OCCURENCES, "The number of dangerous instruction cache misses.");
274
275 STAM_REG(pVM, &pVM->csam.s.StatScanNextFunction, STAMTYPE_COUNTER, "/CSAM/Function/Scan/Success", STAMUNIT_OCCURENCES, "The number of found functions beyond the ret border.");
276 STAM_REG(pVM, &pVM->csam.s.StatScanNextFunctionFailed, STAMTYPE_COUNTER, "/CSAM/Function/Scan/Failed", STAMUNIT_OCCURENCES, "The number of refused functions beyond the ret border.");
277
278 STAM_REG(pVM, &pVM->csam.s.StatTime, STAMTYPE_PROFILE, "/PROF/CSAM/Scan", STAMUNIT_TICKS_PER_CALL, "Scanning overhead.");
279 STAM_REG(pVM, &pVM->csam.s.StatTimeCheckAddr, STAMTYPE_PROFILE, "/PROF/CSAM/CheckAddr", STAMUNIT_TICKS_PER_CALL, "Address check overhead.");
280 STAM_REG(pVM, &pVM->csam.s.StatTimeAddrConv, STAMTYPE_PROFILE, "/PROF/CSAM/AddrConv", STAMUNIT_TICKS_PER_CALL, "Address conversion overhead.");
281 STAM_REG(pVM, &pVM->csam.s.StatTimeFlushPage, STAMTYPE_PROFILE, "/PROF/CSAM/FlushPage", STAMUNIT_TICKS_PER_CALL, "Page flushing overhead.");
282 STAM_REG(pVM, &pVM->csam.s.StatTimeDisasm, STAMTYPE_PROFILE, "/PROF/CSAM/Disasm", STAMUNIT_TICKS_PER_CALL, "Disassembly overhead.");
283 STAM_REG(pVM, &pVM->csam.s.StatFlushDirtyPages, STAMTYPE_PROFILE, "/PROF/CSAM/FlushDirtyPage", STAMUNIT_TICKS_PER_CALL, "Dirty page flushing overhead.");
284 STAM_REG(pVM, &pVM->csam.s.StatCheckGates, STAMTYPE_PROFILE, "/PROF/CSAM/CheckGates", STAMUNIT_TICKS_PER_CALL, "CSAMR3CheckGates overhead.");
285
286 /*
287 * Check CFGM option and enable/disable CSAM.
288 */
289 bool fEnabled;
290 rc = CFGMR3QueryBool(CFGMR3GetRoot(pVM), "CSAMEnabled", &fEnabled);
291 if (RT_FAILURE(rc))
292#ifdef CSAM_ENABLE
293 fEnabled = true;
294#else
295 fEnabled = false;
296#endif
297 if (fEnabled)
298 CSAMEnableScanning(pVM);
299
300#ifdef VBOX_WITH_DEBUGGER
301 /*
302 * Debugger commands.
303 */
304 static bool fRegisteredCmds = false;
305 if (!fRegisteredCmds)
306 {
307 rc = DBGCRegisterCommands(&g_aCmds[0], RT_ELEMENTS(g_aCmds));
308 if (RT_SUCCESS(rc))
309 fRegisteredCmds = true;
310 }
311#endif
312
313 return VINF_SUCCESS;
314}
315
316/**
317 * (Re)initializes CSAM
318 *
319 * @param pVM The VM.
320 */
321static int csamReinit(PVM pVM)
322{
323 /*
324 * Assert alignment and sizes.
325 */
326 AssertRelease(!(RT_OFFSETOF(VM, csam.s) & 31));
327 AssertRelease(sizeof(pVM->csam.s) <= sizeof(pVM->csam.padding));
328
329 /*
330 * Setup any fixed pointers and offsets.
331 */
332 pVM->csam.s.offVM = RT_OFFSETOF(VM, patm);
333
334 pVM->csam.s.fGatesChecked = false;
335 pVM->csam.s.fScanningStarted = false;
336
337 PVMCPU pVCpu = &pVM->aCpus[0]; /* raw mode implies 1 VPCU */
338 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_CSAM_PENDING_ACTION);
339 pVM->csam.s.cDirtyPages = 0;
340 /* not necessary */
341 memset(pVM->csam.s.pvDirtyBasePage, 0, sizeof(pVM->csam.s.pvDirtyBasePage));
342 memset(pVM->csam.s.pvDirtyFaultPage, 0, sizeof(pVM->csam.s.pvDirtyFaultPage));
343
344 memset(&pVM->csam.s.aDangerousInstr, 0, sizeof(pVM->csam.s.aDangerousInstr));
345 pVM->csam.s.cDangerousInstr = 0;
346 pVM->csam.s.iDangerousInstr = 0;
347
348 memset(pVM->csam.s.pvCallInstruction, 0, sizeof(pVM->csam.s.pvCallInstruction));
349 pVM->csam.s.iCallInstruction = 0;
350
351 /** @note never mess with the pgdir bitmap here! */
352 return VINF_SUCCESS;
353}
354
355/**
356 * Applies relocations to data and code managed by this
357 * component. This function will be called at init and
358 * whenever the VMM need to relocate itself inside the GC.
359 *
360 * The csam will update the addresses used by the switcher.
361 *
362 * @param pVM The VM.
363 * @param offDelta Relocation delta.
364 */
365VMMR3DECL(void) CSAMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
366{
367 if (offDelta)
368 {
369 /* Adjust pgdir and page bitmap pointers. */
370 pVM->csam.s.pPDBitmapGC = MMHyperR3ToRC(pVM, pVM->csam.s.pPDGCBitmapHC);
371 pVM->csam.s.pPDHCBitmapGC = MMHyperR3ToRC(pVM, pVM->csam.s.pPDBitmapHC);
372
373 for(int i=0;i<CSAM_PGDIRBMP_CHUNKS;i++)
374 {
375 if (pVM->csam.s.pPDGCBitmapHC[i])
376 {
377 pVM->csam.s.pPDGCBitmapHC[i] += offDelta;
378 }
379 }
380 }
381 return;
382}
383
384/**
385 * Terminates the csam.
386 *
387 * Termination means cleaning up and freeing all resources,
388 * the VM it self is at this point powered off or suspended.
389 *
390 * @returns VBox status code.
391 * @param pVM Pointer to the VM.
392 */
393VMMR3DECL(int) CSAMR3Term(PVM pVM)
394{
395 int rc;
396
397 rc = CSAMR3Reset(pVM);
398 AssertRC(rc);
399
400 /* @todo triggers assertion in MMHyperFree */
401#if 0
402 for(int i=0;i<CSAM_PAGEBMP_CHUNKS;i++)
403 {
404 if (pVM->csam.s.pPDBitmapHC[i])
405 MMHyperFree(pVM, pVM->csam.s.pPDBitmapHC[i]);
406 }
407#endif
408
409 return VINF_SUCCESS;
410}
411
412/**
413 * CSAM reset callback.
414 *
415 * @returns VBox status code.
416 * @param pVM The VM which is reset.
417 */
418VMMR3DECL(int) CSAMR3Reset(PVM pVM)
419{
420 /* Clear page bitmaps. */
421 for(int i=0;i<CSAM_PGDIRBMP_CHUNKS;i++)
422 {
423 if (pVM->csam.s.pPDBitmapHC[i])
424 {
425 Assert((CSAM_PAGE_BITMAP_SIZE& 3) == 0);
426 ASMMemZero32(pVM->csam.s.pPDBitmapHC[i], CSAM_PAGE_BITMAP_SIZE);
427 }
428 }
429
430 /* Remove all CSAM page records. */
431 while(true)
432 {
433 PCSAMPAGEREC pPageRec = (PCSAMPAGEREC)RTAvlPVGetBestFit(&pVM->csam.s.pPageTree, 0, true);
434 if (pPageRec)
435 {
436 csamRemovePageRecord(pVM, pPageRec->page.pPageGC);
437 }
438 else
439 break;
440 }
441 Assert(!pVM->csam.s.pPageTree);
442
443 csamReinit(pVM);
444
445 return VINF_SUCCESS;
446}
447
448
449/**
450 * Callback function for RTAvlPVDoWithAll
451 *
452 * Counts the number of records in the tree
453 *
454 * @returns VBox status code.
455 * @param pNode Current node
456 * @param pcPatches Pointer to patch counter
457 */
458static DECLCALLBACK(int) CountRecord(PAVLPVNODECORE pNode, void *pcPatches)
459{
460 NOREF(pNode);
461 *(uint32_t *)pcPatches = *(uint32_t *)pcPatches + 1;
462 return VINF_SUCCESS;
463}
464
465/**
466 * Callback function for RTAvlPVDoWithAll
467 *
468 * Saves the state of the page record
469 *
470 * @returns VBox status code.
471 * @param pNode Current node
472 * @param pVM1 Pointer to the VM
473 */
474static DECLCALLBACK(int) SavePageState(PAVLPVNODECORE pNode, void *pVM1)
475{
476 PVM pVM = (PVM)pVM1;
477 PCSAMPAGEREC pPage = (PCSAMPAGEREC)pNode;
478 CSAMPAGEREC page = *pPage;
479 PSSMHANDLE pSSM = pVM->csam.s.savedstate.pSSM;
480 int rc;
481
482 /* Save the page record itself */
483 rc = SSMR3PutMem(pSSM, &page, sizeof(page));
484 AssertRCReturn(rc, rc);
485
486 if (page.page.pBitmap)
487 {
488 rc = SSMR3PutMem(pSSM, page.page.pBitmap, CSAM_PAGE_BITMAP_SIZE);
489 AssertRCReturn(rc, rc);
490 }
491
492 return VINF_SUCCESS;
493}
494
495/**
496 * Execute state save operation.
497 *
498 * @returns VBox status code.
499 * @param pVM Pointer to the VM.
500 * @param pSSM SSM operation handle.
501 */
502static DECLCALLBACK(int) csamr3Save(PVM pVM, PSSMHANDLE pSSM)
503{
504 CSAM csamInfo = pVM->csam.s;
505 int rc;
506
507 /*
508 * Count the number of page records in the tree (feeling lazy)
509 */
510 csamInfo.savedstate.cPageRecords = 0;
511 RTAvlPVDoWithAll(&pVM->csam.s.pPageTree, true, CountRecord, &csamInfo.savedstate.cPageRecords);
512
513 /*
514 * Save CSAM structure
515 */
516 pVM->csam.s.savedstate.pSSM = pSSM;
517 rc = SSMR3PutMem(pSSM, &csamInfo, sizeof(csamInfo));
518 AssertRCReturn(rc, rc);
519
520 /* Save pgdir bitmap */
521 rc = SSMR3PutMem(pSSM, csamInfo.pPDBitmapHC, CSAM_PGDIRBMP_CHUNKS*sizeof(RTHCPTR));
522 AssertRCReturn(rc, rc);
523
524 for (unsigned i=0;i<CSAM_PGDIRBMP_CHUNKS;i++)
525 {
526 if(csamInfo.pPDBitmapHC[i])
527 {
528 /* Save the page bitmap. */
529 rc = SSMR3PutMem(pSSM, csamInfo.pPDBitmapHC[i], CSAM_PAGE_BITMAP_SIZE);
530 AssertRCReturn(rc, rc);
531 }
532 }
533
534 /*
535 * Save page records
536 */
537 rc = RTAvlPVDoWithAll(&pVM->csam.s.pPageTree, true, SavePageState, pVM);
538 AssertRCReturn(rc, rc);
539
540 /** @note we don't restore aDangerousInstr; it will be recreated automatically. */
541 return VINF_SUCCESS;
542}
543
544/**
545 * Execute state load operation.
546 *
547 * @returns VBox status code.
548 * @param pVM Pointer to the VM.
549 * @param pSSM SSM operation handle.
550 * @param uVersion Data layout version.
551 * @param uPass The data pass.
552 */
553static DECLCALLBACK(int) csamr3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
554{
555 int rc;
556 CSAM csamInfo;
557
558 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
559 if (uVersion != CSAM_SSM_VERSION)
560 {
561 AssertMsgFailed(("csamR3Load: Invalid version uVersion=%d!\n", uVersion));
562 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
563 }
564
565 pVM->csam.s.savedstate.pSSM = pSSM;
566
567 /*
568 * Restore CSAM structure
569 */
570#if 0
571 rc = SSMR3GetMem(pSSM, &csamInfo, sizeof(csamInfo));
572#else
573 RT_ZERO(csamInfo);
574 rc = SSMR3GetStructEx(pSSM, &csamInfo, sizeof(csamInfo), SSMSTRUCT_FLAGS_MEM_BAND_AID, &g_aCsamFields[0], NULL);
575#endif
576 AssertRCReturn(rc, rc);
577
578 pVM->csam.s.fGatesChecked = csamInfo.fGatesChecked;
579 pVM->csam.s.fScanningStarted = csamInfo.fScanningStarted;
580
581 /* Restore dirty code page info. */
582 pVM->csam.s.cDirtyPages = csamInfo.cDirtyPages;
583 memcpy(pVM->csam.s.pvDirtyBasePage, csamInfo.pvDirtyBasePage, sizeof(pVM->csam.s.pvDirtyBasePage));
584 memcpy(pVM->csam.s.pvDirtyFaultPage, csamInfo.pvDirtyFaultPage, sizeof(pVM->csam.s.pvDirtyFaultPage));
585
586 /* Restore possible code page */
587 pVM->csam.s.cPossibleCodePages = csamInfo.cPossibleCodePages;
588 memcpy(pVM->csam.s.pvPossibleCodePage, csamInfo.pvPossibleCodePage, sizeof(pVM->csam.s.pvPossibleCodePage));
589
590 /* Restore pgdir bitmap (we'll change the pointers next). */
591#if 0
592 rc = SSMR3GetMem(pSSM, pVM->csam.s.pPDBitmapHC, CSAM_PGDIRBMP_CHUNKS*sizeof(RTHCPTR));
593#else
594 rc = SSMR3GetStructEx(pSSM, pVM->csam.s.pPDBitmapHC, sizeof(uint8_t *) * CSAM_PGDIRBMP_CHUNKS,
595 SSMSTRUCT_FLAGS_MEM_BAND_AID, &g_aCsamPDBitmapArray[0], NULL);
596#endif
597 AssertRCReturn(rc, rc);
598
599 /*
600 * Restore page bitmaps
601 */
602 for (unsigned i=0;i<CSAM_PGDIRBMP_CHUNKS;i++)
603 {
604 if(pVM->csam.s.pPDBitmapHC[i])
605 {
606 rc = MMHyperAlloc(pVM, CSAM_PAGE_BITMAP_SIZE, 0, MM_TAG_CSAM, (void **)&pVM->csam.s.pPDBitmapHC[i]);
607 if (RT_FAILURE(rc))
608 {
609 Log(("MMHyperAlloc failed with %Rrc\n", rc));
610 return rc;
611 }
612 /* Convert to GC pointer. */
613 pVM->csam.s.pPDGCBitmapHC[i] = MMHyperR3ToRC(pVM, pVM->csam.s.pPDBitmapHC[i]);
614 Assert(pVM->csam.s.pPDGCBitmapHC[i]);
615
616 /* Restore the bitmap. */
617 rc = SSMR3GetMem(pSSM, pVM->csam.s.pPDBitmapHC[i], CSAM_PAGE_BITMAP_SIZE);
618 AssertRCReturn(rc, rc);
619 }
620 else
621 {
622 Assert(!pVM->csam.s.pPDGCBitmapHC[i]);
623 pVM->csam.s.pPDGCBitmapHC[i] = 0;
624 }
625 }
626
627 /*
628 * Restore page records
629 */
630 for (uint32_t i=0;i<csamInfo.savedstate.cPageRecords + csamInfo.savedstate.cPatchPageRecords;i++)
631 {
632 CSAMPAGEREC page;
633 PCSAMPAGE pPage;
634
635#if 0
636 rc = SSMR3GetMem(pSSM, &page, sizeof(page));
637#else
638 RT_ZERO(page);
639 rc = SSMR3GetStructEx(pSSM, &page, sizeof(page), SSMSTRUCT_FLAGS_MEM_BAND_AID, &g_aCsamPageRecFields[0], NULL);
640#endif
641 AssertRCReturn(rc, rc);
642
643 /*
644 * Recreate the page record
645 */
646 pPage = csamCreatePageRecord(pVM, page.page.pPageGC, page.page.enmTag, page.page.fCode32, page.page.fMonitorInvalidation);
647 AssertReturn(pPage, VERR_NO_MEMORY);
648
649 pPage->GCPhys = page.page.GCPhys;
650 pPage->fFlags = page.page.fFlags;
651 pPage->u64Hash = page.page.u64Hash;
652
653 if (page.page.pBitmap)
654 {
655 rc = SSMR3GetMem(pSSM, pPage->pBitmap, CSAM_PAGE_BITMAP_SIZE);
656 AssertRCReturn(rc, rc);
657 }
658 else
659 {
660 MMR3HeapFree(pPage->pBitmap);
661 pPage->pBitmap = 0;
662 }
663 }
664
665 /* Note: we don't restore aDangerousInstr; it will be recreated automatically. */
666 memset(&pVM->csam.s.aDangerousInstr, 0, sizeof(pVM->csam.s.aDangerousInstr));
667 pVM->csam.s.cDangerousInstr = 0;
668 pVM->csam.s.iDangerousInstr = 0;
669 return VINF_SUCCESS;
670}
671
672/**
673 * Convert guest context address to host context pointer
674 *
675 * @returns Byte pointer (ring-3 context) corresponding to pGCPtr on success,
676 * NULL on failure.
677 * @param pVM Pointer to the VM.
678 * @param pCacheRec Address conversion cache record
679 * @param pGCPtr Guest context pointer
680 * @returns Host context pointer or NULL in case of an error
681 *
682 */
683static uint8_t *csamR3GCVirtToHCVirt(PVM pVM, PCSAMP2GLOOKUPREC pCacheRec, RCPTRTYPE(uint8_t *) pGCPtr)
684{
685 int rc;
686 void *pHCPtr;
687 Assert(pVM->cCpus == 1);
688 PVMCPU pVCpu = VMMGetCpu0(pVM);
689
690 STAM_PROFILE_START(&pVM->csam.s.StatTimeAddrConv, a);
691
692 pHCPtr = PATMR3GCPtrToHCPtr(pVM, pGCPtr);
693 if (pHCPtr)
694 return (uint8_t *)pHCPtr;
695
696 if (pCacheRec->pPageLocStartHC)
697 {
698 uint32_t offset = pGCPtr & PAGE_OFFSET_MASK;
699 if (pCacheRec->pGuestLoc == (pGCPtr & PAGE_BASE_GC_MASK))
700 {
701 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeAddrConv, a);
702 return pCacheRec->pPageLocStartHC + offset;
703 }
704 }
705
706 /* Release previous lock if any. */
707 if (pCacheRec->Lock.pvMap)
708 {
709 PGMPhysReleasePageMappingLock(pVM, &pCacheRec->Lock);
710 pCacheRec->Lock.pvMap = NULL;
711 }
712
713 rc = PGMPhysGCPtr2CCPtrReadOnly(pVCpu, pGCPtr, (const void **)&pHCPtr, &pCacheRec->Lock);
714 if (rc != VINF_SUCCESS)
715 {
716//// AssertMsgRC(rc, ("MMR3PhysGCVirt2HCVirtEx failed for %RRv\n", pGCPtr));
717 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeAddrConv, a);
718 return NULL;
719 }
720
721 pCacheRec->pPageLocStartHC = (uint8_t*)((uintptr_t)pHCPtr & PAGE_BASE_HC_MASK);
722 pCacheRec->pGuestLoc = pGCPtr & PAGE_BASE_GC_MASK;
723 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeAddrConv, a);
724 return (uint8_t *)pHCPtr;
725}
726
727
728/** For csamR3ReadBytes. */
729typedef struct CSAMDISINFO
730{
731 PVM pVM;
732 uint8_t const *pbSrcInstr; /* aka pInstHC */
733} CSAMDISINFO, *PCSAMDISINFO;
734
735
736/**
737 * @callback_method_impl{FNDISREADBYTES}
738 */
739static DECLCALLBACK(int) csamR3ReadBytes(PDISCPUSTATE pDis, uint8_t offInstr, uint8_t cbMinRead, uint8_t cbMaxRead)
740{
741 PCSAMDISINFO pDisInfo = (PCSAMDISINFO)pDis->pvUser;
742
743 /*
744 * We are not interested in patched instructions, so read the original opcode bytes.
745 *
746 * Note! single instruction patches (int3) are checked in CSAMR3AnalyseCallback
747 *
748 * Since we're decoding one instruction at the time, we don't need to be
749 * concerned about any patched instructions following the first one. We
750 * could in fact probably skip this PATM call for offInstr != 0.
751 */
752 size_t cbRead = cbMaxRead;
753 RTUINTPTR uSrcAddr = pDis->uInstrAddr + offInstr;
754 int rc = PATMR3ReadOrgInstr(pDisInfo->pVM, pDis->uInstrAddr + offInstr, &pDis->abInstr[offInstr], cbRead, &cbRead);
755 if (RT_SUCCESS(rc))
756 {
757 if (cbRead >= cbMinRead)
758 {
759 pDis->cbCachedInstr = offInstr + (uint8_t)cbRead;
760 return rc;
761 }
762
763 cbMinRead -= (uint8_t)cbRead;
764 cbMaxRead -= (uint8_t)cbRead;
765 offInstr += (uint8_t)cbRead;
766 uSrcAddr += cbRead;
767 }
768
769 /*
770 * The current byte isn't a patch instruction byte.
771 */
772 AssertPtr(pDisInfo->pbSrcInstr);
773 if ((pDis->uInstrAddr >> PAGE_SHIFT) == ((uSrcAddr + cbMaxRead - 1) >> PAGE_SHIFT))
774 {
775 memcpy(&pDis->abInstr[offInstr], &pDisInfo->pbSrcInstr[offInstr], cbMaxRead);
776 offInstr += cbMaxRead;
777 rc = VINF_SUCCESS;
778 }
779 else if ( (pDis->uInstrAddr >> PAGE_SHIFT) == ((uSrcAddr + cbMinRead - 1) >> PAGE_SHIFT)
780 || PATMIsPatchGCAddr(pDisInfo->pVM, uSrcAddr) /** @todo does CSAM actually analyze patch code, or is this just a copy&past check? */
781 )
782 {
783 memcpy(&pDis->abInstr[offInstr], &pDisInfo->pbSrcInstr[offInstr], cbMinRead);
784 offInstr += cbMinRead;
785 rc = VINF_SUCCESS;
786 }
787 else
788 {
789 /* Crossed page boundrary, pbSrcInstr is no good... */
790 rc = PGMPhysSimpleReadGCPtr(VMMGetCpu0(pDisInfo->pVM), &pDis->abInstr[offInstr], uSrcAddr, cbMinRead);
791 offInstr += cbMinRead;
792 }
793
794 pDis->cbCachedInstr = offInstr;
795 return rc;
796}
797
798DECLINLINE(int) csamR3DISInstr(PVM pVM, RTRCPTR InstrGC, uint8_t *InstrHC, DISCPUMODE enmCpuMode,
799 PDISCPUSTATE pCpu, uint32_t *pcbInstr, char *pszOutput, size_t cbOutput)
800{
801 CSAMDISINFO DisInfo = { pVM, InstrHC };
802#ifdef DEBUG
803 return DISInstrToStrEx(InstrGC, enmCpuMode, csamR3ReadBytes, &DisInfo, DISOPTYPE_ALL,
804 pCpu, pcbInstr, pszOutput, cbOutput);
805#else
806 /* We are interested in everything except harmless stuff */
807 if (pszOutput)
808 return DISInstrToStrEx(InstrGC, enmCpuMode, csamR3ReadBytes, &DisInfo,
809 ~(DISOPTYPE_INVALID | DISOPTYPE_HARMLESS | DISOPTYPE_RRM_MASK),
810 pCpu, pcbInstr, pszOutput, cbOutput);
811 return DISInstrEx(InstrGC, enmCpuMode, ~(DISOPTYPE_INVALID | DISOPTYPE_HARMLESS | DISOPTYPE_RRM_MASK),
812 csamR3ReadBytes, &DisInfo, pCpu, pcbInstr);
813#endif
814}
815
816/**
817 * Analyses the instructions following the cli for compliance with our heuristics for cli
818 *
819 * @returns VBox status code.
820 * @param pVM Pointer to the VM.
821 * @param pCpu CPU disassembly state
822 * @param pInstrGC Guest context pointer to privileged instruction
823 * @param pCurInstrGC Guest context pointer to the current instruction
824 * @param pCacheRec GC to HC cache record
825 * @param pUserData User pointer (callback specific)
826 *
827 */
828static int CSAMR3AnalyseCallback(PVM pVM, DISCPUSTATE *pCpu, RCPTRTYPE(uint8_t *) pInstrGC, RCPTRTYPE(uint8_t *) pCurInstrGC,
829 PCSAMP2GLOOKUPREC pCacheRec, void *pUserData)
830{
831 PCSAMPAGE pPage = (PCSAMPAGE)pUserData;
832 int rc;
833 NOREF(pInstrGC);
834
835 switch (pCpu->pCurInstr->uOpcode)
836 {
837 case OP_INT:
838 Assert(pCpu->Param1.fUse & DISUSE_IMMEDIATE8);
839 if (pCpu->Param1.uValue == 3)
840 {
841 //two byte int 3
842 return VINF_SUCCESS;
843 }
844 break;
845
846 case OP_ILLUD2:
847 /* This appears to be some kind of kernel panic in Linux 2.4; no point to continue. */
848 case OP_RETN:
849 case OP_INT3:
850 case OP_INVALID:
851#if 1
852 /* removing breaks win2k guests? */
853 case OP_IRET:
854#endif
855 return VINF_SUCCESS;
856 }
857
858 // Check for exit points
859 switch (pCpu->pCurInstr->uOpcode)
860 {
861 /* It's not a good idea to patch pushf instructions:
862 * - increases the chance of conflicts (code jumping to the next instruction)
863 * - better to patch the cli
864 * - code that branches before the cli will likely hit an int 3
865 * - in general doesn't offer any benefits as we don't allow nested patch blocks (IF is always 1)
866 */
867 case OP_PUSHF:
868 case OP_POPF:
869 break;
870
871 case OP_CLI:
872 {
873 uint32_t cbInstrs = 0;
874 uint32_t cbCurInstr = pCpu->cbInstr;
875 bool fCode32 = pPage->fCode32;
876
877 Assert(fCode32);
878
879 PATMR3AddHint(pVM, pCurInstrGC, (fCode32) ? PATMFL_CODE32 : 0);
880
881 /* Make sure the instructions that follow the cli have not been encountered before. */
882 while (true)
883 {
884 DISCPUSTATE cpu;
885
886 if (cbInstrs + cbCurInstr >= SIZEOF_NEARJUMP32)
887 break;
888
889 if (csamIsCodeScanned(pVM, pCurInstrGC + cbCurInstr, &pPage) == true)
890 {
891 /* We've scanned the next instruction(s) already. This means we've
892 followed a branch that ended up there before -> dangerous!! */
893 PATMR3DetectConflict(pVM, pCurInstrGC, pCurInstrGC + cbCurInstr);
894 break;
895 }
896 pCurInstrGC += cbCurInstr;
897 cbInstrs += cbCurInstr;
898
899 { /* Force pCurInstrHC out of scope after we stop using it (page lock!) */
900 uint8_t *pCurInstrHC = csamR3GCVirtToHCVirt(pVM, pCacheRec, pCurInstrGC);
901 if (pCurInstrHC == NULL)
902 {
903 Log(("csamR3GCVirtToHCVirt failed for %RRv\n", pCurInstrGC));
904 break;
905 }
906 Assert(VALID_PTR(pCurInstrHC));
907
908 rc = csamR3DISInstr(pVM, pCurInstrGC, pCurInstrHC, (fCode32) ? DISCPUMODE_32BIT : DISCPUMODE_16BIT,
909 &cpu, &cbCurInstr, NULL, 0);
910 }
911 AssertRC(rc);
912 if (RT_FAILURE(rc))
913 break;
914 }
915 break;
916 }
917
918 case OP_PUSH:
919 if (pCpu->pCurInstr->fParam1 != OP_PARM_REG_CS)
920 break;
921
922 /* no break */
923 case OP_STR:
924 case OP_LSL:
925 case OP_LAR:
926 case OP_SGDT:
927 case OP_SLDT:
928 case OP_SIDT:
929 case OP_SMSW:
930 case OP_VERW:
931 case OP_VERR:
932 case OP_CPUID:
933 case OP_IRET:
934#ifdef DEBUG
935 switch(pCpu->pCurInstr->uOpcode)
936 {
937 case OP_STR:
938 Log(("Privileged instruction at %RRv: str!!\n", pCurInstrGC));
939 break;
940 case OP_LSL:
941 Log(("Privileged instruction at %RRv: lsl!!\n", pCurInstrGC));
942 break;
943 case OP_LAR:
944 Log(("Privileged instruction at %RRv: lar!!\n", pCurInstrGC));
945 break;
946 case OP_SGDT:
947 Log(("Privileged instruction at %RRv: sgdt!!\n", pCurInstrGC));
948 break;
949 case OP_SLDT:
950 Log(("Privileged instruction at %RRv: sldt!!\n", pCurInstrGC));
951 break;
952 case OP_SIDT:
953 Log(("Privileged instruction at %RRv: sidt!!\n", pCurInstrGC));
954 break;
955 case OP_SMSW:
956 Log(("Privileged instruction at %RRv: smsw!!\n", pCurInstrGC));
957 break;
958 case OP_VERW:
959 Log(("Privileged instruction at %RRv: verw!!\n", pCurInstrGC));
960 break;
961 case OP_VERR:
962 Log(("Privileged instruction at %RRv: verr!!\n", pCurInstrGC));
963 break;
964 case OP_CPUID:
965 Log(("Privileged instruction at %RRv: cpuid!!\n", pCurInstrGC));
966 break;
967 case OP_PUSH:
968 Log(("Privileged instruction at %RRv: push cs!!\n", pCurInstrGC));
969 break;
970 case OP_IRET:
971 Log(("Privileged instruction at %RRv: iret!!\n", pCurInstrGC));
972 break;
973 }
974#endif
975
976 if (PATMR3HasBeenPatched(pVM, pCurInstrGC) == false)
977 {
978 rc = PATMR3InstallPatch(pVM, pCurInstrGC, (pPage->fCode32) ? PATMFL_CODE32 : 0);
979 if (RT_FAILURE(rc))
980 {
981 Log(("PATMR3InstallPatch failed with %d\n", rc));
982 return VWRN_CONTINUE_ANALYSIS;
983 }
984 }
985 if (pCpu->pCurInstr->uOpcode == OP_IRET)
986 return VINF_SUCCESS; /* Look no further in this branch. */
987
988 return VWRN_CONTINUE_ANALYSIS;
989
990 case OP_JMP:
991 case OP_CALL:
992 {
993 // return or jump/call through a jump table
994 if (OP_PARM_VTYPE(pCpu->pCurInstr->fParam1) != OP_PARM_J)
995 {
996#ifdef DEBUG
997 switch(pCpu->pCurInstr->uOpcode)
998 {
999 case OP_JMP:
1000 Log(("Control Flow instruction at %RRv: jmp!!\n", pCurInstrGC));
1001 break;
1002 case OP_CALL:
1003 Log(("Control Flow instruction at %RRv: call!!\n", pCurInstrGC));
1004 break;
1005 }
1006#endif
1007 return VWRN_CONTINUE_ANALYSIS;
1008 }
1009 return VWRN_CONTINUE_ANALYSIS;
1010 }
1011
1012 }
1013
1014 return VWRN_CONTINUE_ANALYSIS;
1015}
1016
1017#ifdef CSAM_ANALYSE_BEYOND_RET
1018/**
1019 * Wrapper for csamAnalyseCodeStream for call instructions.
1020 *
1021 * @returns VBox status code.
1022 * @param pVM Pointer to the VM.
1023 * @param pInstrGC Guest context pointer to privileged instruction
1024 * @param pCurInstrGC Guest context pointer to the current instruction
1025 * @param fCode32 16 or 32 bits code
1026 * @param pfnCSAMR3Analyse Callback for testing the disassembled instruction
1027 * @param pUserData User pointer (callback specific)
1028 *
1029 */
1030static int csamAnalyseCallCodeStream(PVM pVM, RCPTRTYPE(uint8_t *) pInstrGC, RCPTRTYPE(uint8_t *) pCurInstrGC, bool fCode32,
1031 PFN_CSAMR3ANALYSE pfnCSAMR3Analyse, void *pUserData, PCSAMP2GLOOKUPREC pCacheRec)
1032{
1033 int rc;
1034 CSAMCALLEXITREC CallExitRec;
1035 PCSAMCALLEXITREC pOldCallRec;
1036 PCSAMPAGE pPage = 0;
1037 uint32_t i;
1038
1039 CallExitRec.cInstrAfterRet = 0;
1040
1041 pOldCallRec = pCacheRec->pCallExitRec;
1042 pCacheRec->pCallExitRec = &CallExitRec;
1043
1044 rc = csamAnalyseCodeStream(pVM, pInstrGC, pCurInstrGC, fCode32, pfnCSAMR3Analyse, pUserData, pCacheRec);
1045
1046 for (i=0;i<CallExitRec.cInstrAfterRet;i++)
1047 {
1048 PCSAMPAGE pPage = 0;
1049
1050 pCurInstrGC = CallExitRec.pInstrAfterRetGC[i];
1051
1052 /* Check if we've previously encountered the instruction after the ret. */
1053 if (csamIsCodeScanned(pVM, pCurInstrGC, &pPage) == false)
1054 {
1055 DISCPUSTATE cpu;
1056 uint32_t cbInstr;
1057 int rc2;
1058#ifdef DEBUG
1059 char szOutput[256];
1060#endif
1061 if (pPage == NULL)
1062 {
1063 /* New address; let's take a look at it. */
1064 pPage = csamCreatePageRecord(pVM, pCurInstrGC, CSAM_TAG_CSAM, fCode32);
1065 if (pPage == NULL)
1066 {
1067 rc = VERR_NO_MEMORY;
1068 goto done;
1069 }
1070 }
1071
1072 /**
1073 * Some generic requirements for recognizing an adjacent function:
1074 * - alignment fillers that consist of:
1075 * - nop
1076 * - lea genregX, [genregX (+ 0)]
1077 * - push ebp after the filler (can extend this later); aligned at at least a 4 byte boundary
1078 */
1079 for (int j = 0; j < 16; j++)
1080 {
1081 uint8_t *pCurInstrHC = csamR3GCVirtToHCVirt(pVM, pCacheRec, pCurInstrGC);
1082 if (pCurInstrHC == NULL)
1083 {
1084 Log(("csamR3GCVirtToHCVirt failed for %RRv\n", pCurInstrGC));
1085 goto done;
1086 }
1087 Assert(VALID_PTR(pCurInstrHC));
1088
1089 STAM_PROFILE_START(&pVM->csam.s.StatTimeDisasm, a);
1090#ifdef DEBUG
1091 rc2 = csamR3DISInstr(pVM, pCurInstrGC, pCurInstrHC, (fCode32) ? DISCPUMODE_32BIT : DISCPUMODE_16BIT,
1092 &cpu, &cbInstr, szOutput, sizeof(szOutput));
1093 if (RT_SUCCESS(rc2)) Log(("CSAM Call Analysis: %s", szOutput));
1094#else
1095 rc2 = csamR3DISInstr(pVM, pCurInstrGC, pCurInstrHC, (fCode32) ? DISCPUMODE_32BIT : DISCPUMODE_16BIT,
1096 &cpu, &cbInstr, NULL, 0);
1097#endif
1098 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeDisasm, a);
1099 if (RT_FAILURE(rc2))
1100 {
1101 Log(("Disassembly failed at %RRv with %Rrc (probably page not present) -> return to caller\n", pCurInstrGC, rc2));
1102 goto done;
1103 }
1104
1105 STAM_COUNTER_ADD(&pVM->csam.s.StatNrBytesRead, cbInstr);
1106
1107 RCPTRTYPE(uint8_t *) addr = 0;
1108 PCSAMPAGE pJmpPage = NULL;
1109
1110 if (PAGE_ADDRESS(pCurInstrGC) != PAGE_ADDRESS(pCurInstrGC + cbInstr - 1))
1111 {
1112 if (!PGMGstIsPagePresent(pVM, pCurInstrGC + cbInstr - 1))
1113 {
1114 /// @todo fault in the page
1115 Log(("Page for current instruction %RRv is not present!!\n", pCurInstrGC));
1116 goto done;
1117 }
1118 //all is fine, let's continue
1119 csamR3CheckPageRecord(pVM, pCurInstrGC + cbInstr - 1);
1120 }
1121
1122 switch (cpu.pCurInstr->uOpcode)
1123 {
1124 case OP_NOP:
1125 case OP_INT3:
1126 break; /* acceptable */
1127
1128 case OP_LEA:
1129 /* Must be similar to:
1130 *
1131 * lea esi, [esi]
1132 * lea esi, [esi+0]
1133 * Any register is allowed as long as source and destination are identical.
1134 */
1135 if ( cpu.Param1.fUse != DISUSE_REG_GEN32
1136 || ( cpu.Param2.flags != DISUSE_REG_GEN32
1137 && ( !(cpu.Param2.flags & DISUSE_REG_GEN32)
1138 || !(cpu.Param2.flags & (DISUSE_DISPLACEMENT8|DISUSE_DISPLACEMENT16|DISUSE_DISPLACEMENT32))
1139 || cpu.Param2.uValue != 0
1140 )
1141 )
1142 || cpu.Param1.base.reg_gen32 != cpu.Param2.base.reg_gen32
1143 )
1144 {
1145 STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunctionFailed);
1146 goto next_function;
1147 }
1148 break;
1149
1150 case OP_PUSH:
1151 {
1152 if ( (pCurInstrGC & 0x3) != 0
1153 || cpu.Param1.fUse != DISUSE_REG_GEN32
1154 || cpu.Param1.base.reg_gen32 != USE_REG_EBP
1155 )
1156 {
1157 STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunctionFailed);
1158 goto next_function;
1159 }
1160
1161 if (csamIsCodeScanned(pVM, pCurInstrGC, &pPage) == false)
1162 {
1163 CSAMCALLEXITREC CallExitRec2;
1164 CallExitRec2.cInstrAfterRet = 0;
1165
1166 pCacheRec->pCallExitRec = &CallExitRec2;
1167
1168 /* Analyse the function. */
1169 Log(("Found new function at %RRv\n", pCurInstrGC));
1170 STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunction);
1171 csamAnalyseCallCodeStream(pVM, pInstrGC, pCurInstrGC, fCode32, pfnCSAMR3Analyse, pUserData, pCacheRec);
1172 }
1173 goto next_function;
1174 }
1175
1176 case OP_SUB:
1177 {
1178 if ( (pCurInstrGC & 0x3) != 0
1179 || cpu.Param1.fUse != DISUSE_REG_GEN32
1180 || cpu.Param1.base.reg_gen32 != USE_REG_ESP
1181 )
1182 {
1183 STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunctionFailed);
1184 goto next_function;
1185 }
1186
1187 if (csamIsCodeScanned(pVM, pCurInstrGC, &pPage) == false)
1188 {
1189 CSAMCALLEXITREC CallExitRec2;
1190 CallExitRec2.cInstrAfterRet = 0;
1191
1192 pCacheRec->pCallExitRec = &CallExitRec2;
1193
1194 /* Analyse the function. */
1195 Log(("Found new function at %RRv\n", pCurInstrGC));
1196 STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunction);
1197 csamAnalyseCallCodeStream(pVM, pInstrGC, pCurInstrGC, fCode32, pfnCSAMR3Analyse, pUserData, pCacheRec);
1198 }
1199 goto next_function;
1200 }
1201
1202 default:
1203 STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunctionFailed);
1204 goto next_function;
1205 }
1206 /* Mark it as scanned. */
1207 csamMarkCode(pVM, pPage, pCurInstrGC, cbInstr, true);
1208 pCurInstrGC += cbInstr;
1209 } /* for at most 16 instructions */
1210next_function:
1211 ; /* MSVC complains otherwise */
1212 }
1213 }
1214done:
1215 pCacheRec->pCallExitRec = pOldCallRec;
1216 return rc;
1217}
1218#else
1219#define csamAnalyseCallCodeStream csamAnalyseCodeStream
1220#endif
1221
1222/**
1223 * Disassembles the code stream until the callback function detects a failure or decides everything is acceptable
1224 *
1225 * @returns VBox status code.
1226 * @param pVM Pointer to the VM.
1227 * @param pInstrGC Guest context pointer to privileged instruction
1228 * @param pCurInstrGC Guest context pointer to the current instruction
1229 * @param fCode32 16 or 32 bits code
1230 * @param pfnCSAMR3Analyse Callback for testing the disassembled instruction
1231 * @param pUserData User pointer (callback specific)
1232 *
1233 */
1234static int csamAnalyseCodeStream(PVM pVM, RCPTRTYPE(uint8_t *) pInstrGC, RCPTRTYPE(uint8_t *) pCurInstrGC, bool fCode32,
1235 PFN_CSAMR3ANALYSE pfnCSAMR3Analyse, void *pUserData, PCSAMP2GLOOKUPREC pCacheRec)
1236{
1237 DISCPUSTATE cpu;
1238 PCSAMPAGE pPage = (PCSAMPAGE)pUserData;
1239 int rc = VWRN_CONTINUE_ANALYSIS;
1240 uint32_t cbInstr;
1241 int rc2;
1242 Assert(pVM->cCpus == 1);
1243 PVMCPU pVCpu = VMMGetCpu0(pVM);
1244
1245#ifdef DEBUG
1246 char szOutput[256];
1247#endif
1248
1249 LogFlow(("csamAnalyseCodeStream: code at %RRv depth=%d\n", pCurInstrGC, pCacheRec->depth));
1250
1251 pVM->csam.s.fScanningStarted = true;
1252
1253 pCacheRec->depth++;
1254 /*
1255 * Limit the call depth. (rather arbitrary upper limit; too low and we won't detect certain
1256 * cpuid instructions in Linux kernels; too high and we waste too much time scanning code)
1257 * (512 is necessary to detect cpuid instructions in Red Hat EL4; see defect 1355)
1258 * @note we are using a lot of stack here. couple of 100k when we go to the full depth (!)
1259 */
1260 if (pCacheRec->depth > 512)
1261 {
1262 LogFlow(("CSAM: maximum calldepth reached for %RRv\n", pCurInstrGC));
1263 pCacheRec->depth--;
1264 return VINF_SUCCESS; //let's not go on forever
1265 }
1266
1267 Assert(!PATMIsPatchGCAddr(pVM, pCurInstrGC));
1268 csamR3CheckPageRecord(pVM, pCurInstrGC);
1269
1270 while(rc == VWRN_CONTINUE_ANALYSIS)
1271 {
1272 if (csamIsCodeScanned(pVM, pCurInstrGC, &pPage) == false)
1273 {
1274 if (pPage == NULL)
1275 {
1276 /* New address; let's take a look at it. */
1277 pPage = csamCreatePageRecord(pVM, pCurInstrGC, CSAM_TAG_CSAM, fCode32);
1278 if (pPage == NULL)
1279 {
1280 rc = VERR_NO_MEMORY;
1281 goto done;
1282 }
1283 }
1284 }
1285 else
1286 {
1287 LogFlow(("Code at %RRv has been scanned before\n", pCurInstrGC));
1288 rc = VINF_SUCCESS;
1289 goto done;
1290 }
1291
1292 { /* Force pCurInstrHC out of scope after we stop using it (page lock!) */
1293 uint8_t *pCurInstrHC = csamR3GCVirtToHCVirt(pVM, pCacheRec, pCurInstrGC);
1294 if (pCurInstrHC == NULL)
1295 {
1296 Log(("csamR3GCVirtToHCVirt failed for %RRv\n", pCurInstrGC));
1297 rc = VERR_PATCHING_REFUSED;
1298 goto done;
1299 }
1300 Assert(VALID_PTR(pCurInstrHC));
1301
1302 STAM_PROFILE_START(&pVM->csam.s.StatTimeDisasm, a);
1303#ifdef DEBUG
1304 rc2 = csamR3DISInstr(pVM, pCurInstrGC, pCurInstrHC, fCode32 ? DISCPUMODE_32BIT : DISCPUMODE_16BIT,
1305 &cpu, &cbInstr, szOutput, sizeof(szOutput));
1306 if (RT_SUCCESS(rc2)) Log(("CSAM Analysis: %s", szOutput));
1307#else
1308 rc2 = csamR3DISInstr(pVM, pCurInstrGC, pCurInstrHC, fCode32 ? DISCPUMODE_32BIT : DISCPUMODE_16BIT,
1309 &cpu, &cbInstr, NULL, 0);
1310#endif
1311 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeDisasm, a);
1312 }
1313 if (RT_FAILURE(rc2))
1314 {
1315 Log(("Disassembly failed at %RRv with %Rrc (probably page not present) -> return to caller\n", pCurInstrGC, rc2));
1316 rc = VINF_SUCCESS;
1317 goto done;
1318 }
1319
1320 STAM_COUNTER_ADD(&pVM->csam.s.StatNrBytesRead, cbInstr);
1321
1322 csamMarkCode(pVM, pPage, pCurInstrGC, cbInstr, true);
1323
1324 RCPTRTYPE(uint8_t *) addr = 0;
1325 PCSAMPAGE pJmpPage = NULL;
1326
1327 if (PAGE_ADDRESS(pCurInstrGC) != PAGE_ADDRESS(pCurInstrGC + cbInstr - 1))
1328 {
1329 if (!PGMGstIsPagePresent(pVCpu, pCurInstrGC + cbInstr - 1))
1330 {
1331 /// @todo fault in the page
1332 Log(("Page for current instruction %RRv is not present!!\n", pCurInstrGC));
1333 rc = VWRN_CONTINUE_ANALYSIS;
1334 goto next_please;
1335 }
1336 //all is fine, let's continue
1337 csamR3CheckPageRecord(pVM, pCurInstrGC + cbInstr - 1);
1338 }
1339 /*
1340 * If it's harmless, then don't bother checking it (the disasm tables had better be accurate!)
1341 */
1342 if ((cpu.pCurInstr->fOpType & ~DISOPTYPE_RRM_MASK) == DISOPTYPE_HARMLESS)
1343 {
1344 AssertMsg(pfnCSAMR3Analyse(pVM, &cpu, pInstrGC, pCurInstrGC, pCacheRec, (void *)pPage) == VWRN_CONTINUE_ANALYSIS, ("Instruction incorrectly marked harmless?!?!?\n"));
1345 rc = VWRN_CONTINUE_ANALYSIS;
1346 goto next_please;
1347 }
1348
1349#ifdef CSAM_ANALYSE_BEYOND_RET
1350 /* Remember the address of the instruction following the ret in case the parent instruction was a call. */
1351 if ( pCacheRec->pCallExitRec
1352 && cpu.pCurInstr->uOpcode == OP_RETN
1353 && pCacheRec->pCallExitRec->cInstrAfterRet < CSAM_MAX_CALLEXIT_RET)
1354 {
1355 pCacheRec->pCallExitRec->pInstrAfterRetGC[pCacheRec->pCallExitRec->cInstrAfterRet] = pCurInstrGC + cbInstr;
1356 pCacheRec->pCallExitRec->cInstrAfterRet++;
1357 }
1358#endif
1359
1360 rc = pfnCSAMR3Analyse(pVM, &cpu, pInstrGC, pCurInstrGC, pCacheRec, (void *)pPage);
1361 if (rc == VINF_SUCCESS)
1362 goto done;
1363
1364 // For our first attempt, we'll handle only simple relative jumps and calls (immediate offset coded in instruction)
1365 if ( ((cpu.pCurInstr->fOpType & DISOPTYPE_CONTROLFLOW) && (OP_PARM_VTYPE(cpu.pCurInstr->fParam1) == OP_PARM_J))
1366 || (cpu.pCurInstr->uOpcode == OP_CALL && cpu.Param1.fUse == DISUSE_DISPLACEMENT32)) /* simple indirect call (call dword ptr [address]) */
1367 {
1368 /* We need to parse 'call dword ptr [address]' type of calls to catch cpuid instructions in some recent Linux distributions (e.g. OpenSuse 10.3) */
1369 if ( cpu.pCurInstr->uOpcode == OP_CALL
1370 && cpu.Param1.fUse == DISUSE_DISPLACEMENT32)
1371 {
1372 addr = 0;
1373 PGMPhysSimpleReadGCPtr(pVCpu, &addr, (RTRCUINTPTR)cpu.Param1.uDisp.i32, sizeof(addr));
1374 }
1375 else
1376 addr = CSAMResolveBranch(&cpu, pCurInstrGC);
1377
1378 if (addr == 0)
1379 {
1380 Log(("We don't support far jumps here!! (%08X)\n", cpu.Param1.fUse));
1381 rc = VINF_SUCCESS;
1382 break;
1383 }
1384 Assert(!PATMIsPatchGCAddr(pVM, addr));
1385
1386 /* If the target address lies in a patch generated jump, then special action needs to be taken. */
1387 PATMR3DetectConflict(pVM, pCurInstrGC, addr);
1388
1389 /* Same page? */
1390 if (PAGE_ADDRESS(addr) != PAGE_ADDRESS(pCurInstrGC ))
1391 {
1392 if (!PGMGstIsPagePresent(pVCpu, addr))
1393 {
1394 Log(("Page for current instruction %RRv is not present!!\n", addr));
1395 rc = VWRN_CONTINUE_ANALYSIS;
1396 goto next_please;
1397 }
1398
1399 /* All is fine, let's continue. */
1400 csamR3CheckPageRecord(pVM, addr);
1401 }
1402
1403 pJmpPage = NULL;
1404 if (csamIsCodeScanned(pVM, addr, &pJmpPage) == false)
1405 {
1406 if (pJmpPage == NULL)
1407 {
1408 /* New branch target; let's take a look at it. */
1409 pJmpPage = csamCreatePageRecord(pVM, addr, CSAM_TAG_CSAM, fCode32);
1410 if (pJmpPage == NULL)
1411 {
1412 rc = VERR_NO_MEMORY;
1413 goto done;
1414 }
1415 Assert(pPage);
1416 }
1417 if (cpu.pCurInstr->uOpcode == OP_CALL)
1418 rc = csamAnalyseCallCodeStream(pVM, pInstrGC, addr, fCode32, pfnCSAMR3Analyse, (void *)pJmpPage, pCacheRec);
1419 else
1420 rc = csamAnalyseCodeStream(pVM, pInstrGC, addr, fCode32, pfnCSAMR3Analyse, (void *)pJmpPage, pCacheRec);
1421
1422 if (rc != VINF_SUCCESS) {
1423 goto done;
1424 }
1425 }
1426 if (cpu.pCurInstr->uOpcode == OP_JMP)
1427 {//unconditional jump; return to caller
1428 rc = VINF_SUCCESS;
1429 goto done;
1430 }
1431
1432 rc = VWRN_CONTINUE_ANALYSIS;
1433 } //if ((cpu.pCurInstr->fOpType & DISOPTYPE_CONTROLFLOW) && (OP_PARM_VTYPE(cpu.pCurInstr->fParam1) == OP_PARM_J))
1434#ifdef CSAM_SCAN_JUMP_TABLE
1435 else
1436 if ( cpu.pCurInstr->uOpcode == OP_JMP
1437 && (cpu.Param1.fUse & (DISUSE_DISPLACEMENT32|DISUSE_INDEX|DISUSE_SCALE)) == (DISUSE_DISPLACEMENT32|DISUSE_INDEX|DISUSE_SCALE)
1438 )
1439 {
1440 RTRCPTR pJumpTableGC = (RTRCPTR)cpu.Param1.disp32;
1441 uint8_t *pJumpTableHC;
1442 int rc2;
1443
1444 Log(("Jump through jump table\n"));
1445
1446 rc2 = PGMPhysGCPtr2CCPtrReadOnly(pVCpu, pJumpTableGC, (PRTHCPTR)&pJumpTableHC, missing page lock);
1447 if (rc2 == VINF_SUCCESS)
1448 {
1449 for (uint32_t i=0;i<2;i++)
1450 {
1451 uint64_t fFlags;
1452
1453 addr = pJumpTableGC + cpu.Param1.scale * i;
1454 /* Same page? */
1455 if (PAGE_ADDRESS(addr) != PAGE_ADDRESS(pJumpTableGC))
1456 break;
1457
1458 addr = *(RTRCPTR *)(pJumpTableHC + cpu.Param1.scale * i);
1459
1460 rc2 = PGMGstGetPage(pVCpu, addr, &fFlags, NULL);
1461 if ( rc2 != VINF_SUCCESS
1462 || (fFlags & X86_PTE_US)
1463 || !(fFlags & X86_PTE_P)
1464 )
1465 break;
1466
1467 Log(("Jump to %RRv\n", addr));
1468
1469 pJmpPage = NULL;
1470 if (csamIsCodeScanned(pVM, addr, &pJmpPage) == false)
1471 {
1472 if (pJmpPage == NULL)
1473 {
1474 /* New branch target; let's take a look at it. */
1475 pJmpPage = csamCreatePageRecord(pVM, addr, CSAM_TAG_CSAM, fCode32);
1476 if (pJmpPage == NULL)
1477 {
1478 rc = VERR_NO_MEMORY;
1479 goto done;
1480 }
1481 Assert(pPage);
1482 }
1483 rc = csamAnalyseCodeStream(pVM, pInstrGC, addr, fCode32, pfnCSAMR3Analyse, (void *)pJmpPage, pCacheRec);
1484 if (rc != VINF_SUCCESS) {
1485 goto done;
1486 }
1487 }
1488 }
1489 }
1490 }
1491#endif
1492 if (rc != VWRN_CONTINUE_ANALYSIS) {
1493 break; //done!
1494 }
1495next_please:
1496 if (cpu.pCurInstr->uOpcode == OP_JMP)
1497 {
1498 rc = VINF_SUCCESS;
1499 goto done;
1500 }
1501 pCurInstrGC += cbInstr;
1502 }
1503done:
1504 pCacheRec->depth--;
1505 return rc;
1506}
1507
1508
1509/**
1510 * Calculates the 64 bits hash value for the current page
1511 *
1512 * @returns hash value
1513 * @param pVM Pointer to the VM.
1514 * @param pInstr Page address
1515 */
1516uint64_t csamR3CalcPageHash(PVM pVM, RTRCPTR pInstr)
1517{
1518 uint64_t hash = 0;
1519 uint32_t val[5];
1520 int rc;
1521 Assert(pVM->cCpus == 1);
1522 PVMCPU pVCpu = VMMGetCpu0(pVM);
1523
1524 Assert((pInstr & PAGE_OFFSET_MASK) == 0);
1525
1526 rc = PGMPhysSimpleReadGCPtr(pVCpu, &val[0], pInstr, sizeof(val[0]));
1527 AssertMsg(RT_SUCCESS(rc) || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1528 if (rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT)
1529 {
1530 Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr));
1531 return ~0ULL;
1532 }
1533
1534 rc = PGMPhysSimpleReadGCPtr(pVCpu, &val[1], pInstr+1024, sizeof(val[0]));
1535 AssertMsg(RT_SUCCESS(rc) || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1536 if (rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT)
1537 {
1538 Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr));
1539 return ~0ULL;
1540 }
1541
1542 rc = PGMPhysSimpleReadGCPtr(pVCpu, &val[2], pInstr+2048, sizeof(val[0]));
1543 AssertMsg(RT_SUCCESS(rc) || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1544 if (rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT)
1545 {
1546 Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr));
1547 return ~0ULL;
1548 }
1549
1550 rc = PGMPhysSimpleReadGCPtr(pVCpu, &val[3], pInstr+3072, sizeof(val[0]));
1551 AssertMsg(RT_SUCCESS(rc) || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1552 if (rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT)
1553 {
1554 Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr));
1555 return ~0ULL;
1556 }
1557
1558 rc = PGMPhysSimpleReadGCPtr(pVCpu, &val[4], pInstr+4092, sizeof(val[0]));
1559 AssertMsg(RT_SUCCESS(rc) || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1560 if (rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT)
1561 {
1562 Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr));
1563 return ~0ULL;
1564 }
1565
1566 // don't want to get division by zero traps
1567 val[2] |= 1;
1568 val[4] |= 1;
1569
1570 hash = (uint64_t)val[0] * (uint64_t)val[1] / (uint64_t)val[2] + (val[3]%val[4]);
1571 return (hash == ~0ULL) ? hash - 1 : hash;
1572}
1573
1574
1575/**
1576 * Notify CSAM of a page flush
1577 *
1578 * @returns VBox status code
1579 * @param pVM Pointer to the VM.
1580 * @param addr GC address of the page to flush
1581 * @param fRemovePage Page removal flag
1582 */
1583static int csamFlushPage(PVM pVM, RTRCPTR addr, bool fRemovePage)
1584{
1585 PCSAMPAGEREC pPageRec;
1586 int rc;
1587 RTGCPHYS GCPhys = 0;
1588 uint64_t fFlags = 0;
1589 Assert(pVM->cCpus == 1 || !CSAMIsEnabled(pVM));
1590
1591 if (!CSAMIsEnabled(pVM))
1592 return VINF_SUCCESS;
1593
1594 PVMCPU pVCpu = VMMGetCpu0(pVM);
1595
1596 STAM_PROFILE_START(&pVM->csam.s.StatTimeFlushPage, a);
1597
1598 addr = addr & PAGE_BASE_GC_MASK;
1599
1600 /*
1601 * Note: searching for the page in our tree first is more expensive (skipped flushes are two orders of magnitude more common)
1602 */
1603 if (pVM->csam.s.pPageTree == NULL)
1604 {
1605 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1606 return VWRN_CSAM_PAGE_NOT_FOUND;
1607 }
1608
1609 rc = PGMGstGetPage(pVCpu, addr, &fFlags, &GCPhys);
1610 /* Returned at a very early stage (no paging yet presumably). */
1611 if (rc == VERR_NOT_SUPPORTED)
1612 {
1613 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1614 return rc;
1615 }
1616
1617 if (RT_SUCCESS(rc))
1618 {
1619 if ( (fFlags & X86_PTE_US)
1620 || rc == VERR_PGM_PHYS_PAGE_RESERVED
1621 )
1622 {
1623 /* User page -> not relevant for us. */
1624 STAM_COUNTER_ADD(&pVM->csam.s.StatNrFlushesSkipped, 1);
1625 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1626 return VINF_SUCCESS;
1627 }
1628 }
1629 else
1630 if (rc != VERR_PAGE_NOT_PRESENT && rc != VERR_PAGE_TABLE_NOT_PRESENT)
1631 AssertMsgFailed(("PGMR3GetPage %RRv failed with %Rrc\n", addr, rc));
1632
1633 pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)addr);
1634 if (pPageRec)
1635 {
1636 if ( GCPhys == pPageRec->page.GCPhys
1637 && (fFlags & X86_PTE_P))
1638 {
1639 STAM_COUNTER_ADD(&pVM->csam.s.StatNrFlushesSkipped, 1);
1640 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1641 return VINF_SUCCESS;
1642 }
1643
1644 Log(("CSAMR3FlushPage: page %RRv has changed -> FLUSH (rc=%Rrc) (Phys: %RGp vs %RGp)\n", addr, rc, GCPhys, pPageRec->page.GCPhys));
1645
1646 STAM_COUNTER_ADD(&pVM->csam.s.StatNrFlushes, 1);
1647
1648 if (fRemovePage)
1649 csamRemovePageRecord(pVM, addr);
1650 else
1651 {
1652 CSAMMarkPage(pVM, addr, false);
1653 pPageRec->page.GCPhys = 0;
1654 pPageRec->page.fFlags = 0;
1655 rc = PGMGstGetPage(pVCpu, addr, &pPageRec->page.fFlags, &pPageRec->page.GCPhys);
1656 if (rc == VINF_SUCCESS)
1657 pPageRec->page.u64Hash = csamR3CalcPageHash(pVM, addr);
1658
1659 if (pPageRec->page.pBitmap == NULL)
1660 {
1661 pPageRec->page.pBitmap = (uint8_t *)MMR3HeapAllocZ(pVM, MM_TAG_CSAM_PATCH, CSAM_PAGE_BITMAP_SIZE);
1662 Assert(pPageRec->page.pBitmap);
1663 if (pPageRec->page.pBitmap == NULL)
1664 return VERR_NO_MEMORY;
1665 }
1666 else
1667 memset(pPageRec->page.pBitmap, 0, CSAM_PAGE_BITMAP_SIZE);
1668 }
1669
1670
1671 /*
1672 * Inform patch manager about the flush; no need to repeat the above check twice.
1673 */
1674 PATMR3FlushPage(pVM, addr);
1675
1676 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1677 return VINF_SUCCESS;
1678 }
1679 else
1680 {
1681 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1682 return VWRN_CSAM_PAGE_NOT_FOUND;
1683 }
1684}
1685
1686/**
1687 * Notify CSAM of a page flush
1688 *
1689 * @returns VBox status code
1690 * @param pVM Pointer to the VM.
1691 * @param addr GC address of the page to flush
1692 */
1693VMMR3DECL(int) CSAMR3FlushPage(PVM pVM, RTRCPTR addr)
1694{
1695 return csamFlushPage(pVM, addr, true /* remove page record */);
1696}
1697
1698/**
1699 * Remove a CSAM monitored page. Use with care!
1700 *
1701 * @returns VBox status code
1702 * @param pVM Pointer to the VM.
1703 * @param addr GC address of the page to flush
1704 */
1705VMMR3DECL(int) CSAMR3RemovePage(PVM pVM, RTRCPTR addr)
1706{
1707 PCSAMPAGEREC pPageRec;
1708 int rc;
1709
1710 addr = addr & PAGE_BASE_GC_MASK;
1711
1712 pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)addr);
1713 if (pPageRec)
1714 {
1715 rc = csamRemovePageRecord(pVM, addr);
1716 if (RT_SUCCESS(rc))
1717 PATMR3FlushPage(pVM, addr);
1718 return VINF_SUCCESS;
1719 }
1720 return VWRN_CSAM_PAGE_NOT_FOUND;
1721}
1722
1723/**
1724 * Check a page record in case a page has been changed
1725 *
1726 * @returns VBox status code. (trap handled or not)
1727 * @param pVM Pointer to the VM.
1728 * @param pInstrGC GC instruction pointer
1729 */
1730int csamR3CheckPageRecord(PVM pVM, RTRCPTR pInstrGC)
1731{
1732 PCSAMPAGEREC pPageRec;
1733 uint64_t u64hash;
1734
1735 pInstrGC = pInstrGC & PAGE_BASE_GC_MASK;
1736
1737 pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)pInstrGC);
1738 if (pPageRec)
1739 {
1740 u64hash = csamR3CalcPageHash(pVM, pInstrGC);
1741 if (u64hash != pPageRec->page.u64Hash)
1742 csamFlushPage(pVM, pInstrGC, false /* don't remove page record */);
1743 }
1744 else
1745 return VWRN_CSAM_PAGE_NOT_FOUND;
1746
1747 return VINF_SUCCESS;
1748}
1749
1750/**
1751 * Returns monitor description based on CSAM tag
1752 *
1753 * @return description string
1754 * @param enmTag Owner tag
1755 */
1756const char *csamGetMonitorDescription(CSAMTAG enmTag)
1757{
1758 if (enmTag == CSAM_TAG_PATM)
1759 return "CSAM-PATM self-modifying code monitor handler";
1760 else
1761 if (enmTag == CSAM_TAG_REM)
1762 return "CSAM-REM self-modifying code monitor handler";
1763 Assert(enmTag == CSAM_TAG_CSAM);
1764 return "CSAM self-modifying code monitor handler";
1765}
1766
1767/**
1768 * Adds page record to our lookup tree
1769 *
1770 * @returns CSAMPAGE ptr or NULL if failure
1771 * @param pVM Pointer to the VM.
1772 * @param GCPtr Page address
1773 * @param enmTag Owner tag
1774 * @param fCode32 16 or 32 bits code
1775 * @param fMonitorInvalidation Monitor page invalidation flag
1776 */
1777static PCSAMPAGE csamCreatePageRecord(PVM pVM, RTRCPTR GCPtr, CSAMTAG enmTag, bool fCode32, bool fMonitorInvalidation)
1778{
1779 PCSAMPAGEREC pPage;
1780 int rc;
1781 bool ret;
1782 Assert(pVM->cCpus == 1);
1783 PVMCPU pVCpu = VMMGetCpu0(pVM);
1784
1785 Log(("New page record for %RRv\n", GCPtr & PAGE_BASE_GC_MASK));
1786
1787 pPage = (PCSAMPAGEREC)MMR3HeapAllocZ(pVM, MM_TAG_CSAM_PATCH, sizeof(CSAMPAGEREC));
1788 if (pPage == NULL)
1789 {
1790 AssertMsgFailed(("csamCreatePageRecord: Out of memory!!!!\n"));
1791 return NULL;
1792 }
1793 /* Round down to page boundary. */
1794 GCPtr = (GCPtr & PAGE_BASE_GC_MASK);
1795 pPage->Core.Key = (AVLPVKEY)(uintptr_t)GCPtr;
1796 pPage->page.pPageGC = GCPtr;
1797 pPage->page.fCode32 = fCode32;
1798 pPage->page.fMonitorInvalidation = fMonitorInvalidation;
1799 pPage->page.enmTag = enmTag;
1800 pPage->page.fMonitorActive = false;
1801 pPage->page.pBitmap = (uint8_t *)MMR3HeapAllocZ(pVM, MM_TAG_CSAM_PATCH, PAGE_SIZE/sizeof(uint8_t));
1802 rc = PGMGstGetPage(pVCpu, GCPtr, &pPage->page.fFlags, &pPage->page.GCPhys);
1803 AssertMsg(RT_SUCCESS(rc) || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1804
1805 pPage->page.u64Hash = csamR3CalcPageHash(pVM, GCPtr);
1806 ret = RTAvlPVInsert(&pVM->csam.s.pPageTree, &pPage->Core);
1807 Assert(ret);
1808
1809#ifdef CSAM_MONITOR_CODE_PAGES
1810 AssertRelease(!fInCSAMCodePageInvalidate);
1811
1812 switch (enmTag)
1813 {
1814 case CSAM_TAG_PATM:
1815 case CSAM_TAG_REM:
1816#ifdef CSAM_MONITOR_CSAM_CODE_PAGES
1817 case CSAM_TAG_CSAM:
1818#endif
1819 {
1820 rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_WRITE, GCPtr, GCPtr + (PAGE_SIZE - 1) /* inclusive! */,
1821 (fMonitorInvalidation) ? CSAMCodePageInvalidate : 0, CSAMCodePageWriteHandler, "CSAMGCCodePageWriteHandler", 0,
1822 csamGetMonitorDescription(enmTag));
1823 AssertMsg(RT_SUCCESS(rc) || rc == VERR_PGM_HANDLER_VIRTUAL_CONFLICT, ("PGMR3HandlerVirtualRegisterEx %RRv failed with %Rrc\n", GCPtr, rc));
1824 if (RT_FAILURE(rc))
1825 Log(("PGMR3HandlerVirtualRegisterEx for %RRv failed with %Rrc\n", GCPtr, rc));
1826
1827 /* Could fail, because it's already monitored. Don't treat that condition as fatal. */
1828
1829 /* Prefetch it in case it's not there yet. */
1830 rc = PGMPrefetchPage(pVCpu, GCPtr);
1831 AssertRC(rc);
1832
1833 rc = PGMShwMakePageReadonly(pVCpu, GCPtr, 0 /*fFlags*/);
1834 Assert(rc == VINF_SUCCESS || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
1835
1836 pPage->page.fMonitorActive = true;
1837 STAM_COUNTER_INC(&pVM->csam.s.StatPageMonitor);
1838 break;
1839 }
1840 default:
1841 break; /* to shut up GCC */
1842 }
1843
1844 Log(("csamCreatePageRecord %RRv GCPhys=%RGp\n", GCPtr, pPage->page.GCPhys));
1845
1846#ifdef VBOX_WITH_STATISTICS
1847 switch (enmTag)
1848 {
1849 case CSAM_TAG_CSAM:
1850 STAM_COUNTER_INC(&pVM->csam.s.StatPageCSAM);
1851 break;
1852 case CSAM_TAG_PATM:
1853 STAM_COUNTER_INC(&pVM->csam.s.StatPagePATM);
1854 break;
1855 case CSAM_TAG_REM:
1856 STAM_COUNTER_INC(&pVM->csam.s.StatPageREM);
1857 break;
1858 default:
1859 break; /* to shut up GCC */
1860 }
1861#endif
1862
1863#endif
1864
1865 STAM_COUNTER_INC(&pVM->csam.s.StatNrPages);
1866 if (fMonitorInvalidation)
1867 STAM_COUNTER_INC(&pVM->csam.s.StatNrPagesInv);
1868
1869 return &pPage->page;
1870}
1871
1872/**
1873 * Monitors a code page (if not already monitored)
1874 *
1875 * @returns VBox status code
1876 * @param pVM Pointer to the VM.
1877 * @param pPageAddrGC The page to monitor
1878 * @param enmTag Monitor tag
1879 */
1880VMMR3DECL(int) CSAMR3MonitorPage(PVM pVM, RTRCPTR pPageAddrGC, CSAMTAG enmTag)
1881{
1882 PCSAMPAGEREC pPageRec = NULL;
1883 int rc;
1884 bool fMonitorInvalidation;
1885 Assert(pVM->cCpus == 1);
1886 PVMCPU pVCpu = VMMGetCpu0(pVM);
1887
1888 /* Dirty pages must be handled before calling this function!. */
1889 Assert(!pVM->csam.s.cDirtyPages);
1890
1891 if (pVM->csam.s.fScanningStarted == false)
1892 return VINF_SUCCESS; /* too early */
1893
1894 pPageAddrGC &= PAGE_BASE_GC_MASK;
1895
1896 Log(("CSAMR3MonitorPage %RRv %d\n", pPageAddrGC, enmTag));
1897
1898 /** @todo implicit assumption */
1899 fMonitorInvalidation = (enmTag == CSAM_TAG_PATM);
1900
1901 pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)pPageAddrGC);
1902 if (pPageRec == NULL)
1903 {
1904 uint64_t fFlags;
1905
1906 rc = PGMGstGetPage(pVCpu, pPageAddrGC, &fFlags, NULL);
1907 AssertMsg(RT_SUCCESS(rc) || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1908 if ( rc == VINF_SUCCESS
1909 && (fFlags & X86_PTE_US))
1910 {
1911 /* We don't care about user pages. */
1912 STAM_COUNTER_INC(&pVM->csam.s.StatNrUserPages);
1913 return VINF_SUCCESS;
1914 }
1915
1916 csamCreatePageRecord(pVM, pPageAddrGC, enmTag, true /* 32 bits code */, fMonitorInvalidation);
1917
1918 pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)pPageAddrGC);
1919 Assert(pPageRec);
1920 }
1921 /** @todo reference count */
1922
1923#ifdef CSAM_MONITOR_CSAM_CODE_PAGES
1924 Assert(pPageRec->page.fMonitorActive);
1925#endif
1926
1927#ifdef CSAM_MONITOR_CODE_PAGES
1928 if (!pPageRec->page.fMonitorActive)
1929 {
1930 Log(("CSAMR3MonitorPage: activate monitoring for %RRv\n", pPageAddrGC));
1931
1932 rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_WRITE, pPageAddrGC, pPageAddrGC + (PAGE_SIZE - 1) /* inclusive! */,
1933 (fMonitorInvalidation) ? CSAMCodePageInvalidate : 0, CSAMCodePageWriteHandler, "CSAMGCCodePageWriteHandler", 0,
1934 csamGetMonitorDescription(enmTag));
1935 AssertMsg(RT_SUCCESS(rc) || rc == VERR_PGM_HANDLER_VIRTUAL_CONFLICT, ("PGMR3HandlerVirtualRegisterEx %RRv failed with %Rrc\n", pPageAddrGC, rc));
1936 if (RT_FAILURE(rc))
1937 Log(("PGMR3HandlerVirtualRegisterEx for %RRv failed with %Rrc\n", pPageAddrGC, rc));
1938
1939 /* Could fail, because it's already monitored. Don't treat that condition as fatal. */
1940
1941 /* Prefetch it in case it's not there yet. */
1942 rc = PGMPrefetchPage(pVCpu, pPageAddrGC);
1943 AssertRC(rc);
1944
1945 rc = PGMShwMakePageReadonly(pVCpu, pPageAddrGC, 0 /*fFlags*/);
1946 Assert(rc == VINF_SUCCESS || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
1947
1948 STAM_COUNTER_INC(&pVM->csam.s.StatPageMonitor);
1949
1950 pPageRec->page.fMonitorActive = true;
1951 pPageRec->page.fMonitorInvalidation = fMonitorInvalidation;
1952 }
1953 else
1954 if ( !pPageRec->page.fMonitorInvalidation
1955 && fMonitorInvalidation)
1956 {
1957 Assert(pPageRec->page.fMonitorActive);
1958 PGMHandlerVirtualChangeInvalidateCallback(pVM, pPageRec->page.pPageGC, CSAMCodePageInvalidate);
1959 pPageRec->page.fMonitorInvalidation = true;
1960 STAM_COUNTER_INC(&pVM->csam.s.StatNrPagesInv);
1961
1962 /* Prefetch it in case it's not there yet. */
1963 rc = PGMPrefetchPage(pVCpu, pPageAddrGC);
1964 AssertRC(rc);
1965
1966 /* Make sure it's readonly. Page invalidation may have modified the attributes. */
1967 rc = PGMShwMakePageReadonly(pVCpu, pPageAddrGC, 0 /*fFlags*/);
1968 Assert(rc == VINF_SUCCESS || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
1969 }
1970
1971#if 0 /* def VBOX_STRICT -> very annoying) */
1972 if (pPageRec->page.fMonitorActive)
1973 {
1974 uint64_t fPageShw;
1975 RTHCPHYS GCPhys;
1976 rc = PGMShwGetPage(pVCpu, pPageAddrGC, &fPageShw, &GCPhys);
1977// AssertMsg( (rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT)
1978// || !(fPageShw & X86_PTE_RW)
1979// || (pPageRec->page.GCPhys == 0), ("Shadow page flags for %RRv (%RHp) aren't readonly (%RX64)!!\n", pPageAddrGC, GCPhys, fPageShw));
1980 }
1981#endif
1982
1983 if (pPageRec->page.GCPhys == 0)
1984 {
1985 /* Prefetch it in case it's not there yet. */
1986 rc = PGMPrefetchPage(pVCpu, pPageAddrGC);
1987 AssertRC(rc);
1988 /* The page was changed behind our back. It won't be made read-only until the next SyncCR3, so force it here. */
1989 rc = PGMShwMakePageReadonly(pVCpu, pPageAddrGC, 0 /*fFlags*/);
1990 Assert(rc == VINF_SUCCESS || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
1991 }
1992#endif /* CSAM_MONITOR_CODE_PAGES */
1993 return VINF_SUCCESS;
1994}
1995
1996/**
1997 * Unmonitors a code page
1998 *
1999 * @returns VBox status code
2000 * @param pVM Pointer to the VM.
2001 * @param pPageAddrGC The page to monitor
2002 * @param enmTag Monitor tag
2003 */
2004VMMR3DECL(int) CSAMR3UnmonitorPage(PVM pVM, RTRCPTR pPageAddrGC, CSAMTAG enmTag)
2005{
2006 pPageAddrGC &= PAGE_BASE_GC_MASK;
2007
2008 Log(("CSAMR3UnmonitorPage %RRv %d\n", pPageAddrGC, enmTag));
2009
2010 Assert(enmTag == CSAM_TAG_REM);
2011
2012#ifdef VBOX_STRICT
2013 PCSAMPAGEREC pPageRec;
2014
2015 pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)pPageAddrGC);
2016 Assert(pPageRec && pPageRec->page.enmTag == enmTag);
2017#endif
2018 return CSAMR3RemovePage(pVM, pPageAddrGC);
2019}
2020
2021/**
2022 * Removes a page record from our lookup tree
2023 *
2024 * @returns VBox status code
2025 * @param pVM Pointer to the VM.
2026 * @param GCPtr Page address
2027 */
2028static int csamRemovePageRecord(PVM pVM, RTRCPTR GCPtr)
2029{
2030 PCSAMPAGEREC pPageRec;
2031 Assert(pVM->cCpus == 1);
2032 PVMCPU pVCpu = VMMGetCpu0(pVM);
2033
2034 Log(("csamRemovePageRecord %RRv\n", GCPtr));
2035 pPageRec = (PCSAMPAGEREC)RTAvlPVRemove(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)GCPtr);
2036
2037 if (pPageRec)
2038 {
2039 STAM_COUNTER_INC(&pVM->csam.s.StatNrRemovedPages);
2040
2041#ifdef CSAM_MONITOR_CODE_PAGES
2042 if (pPageRec->page.fMonitorActive)
2043 {
2044 /* @todo -> this is expensive (cr3 reload)!!!
2045 * if this happens often, then reuse it instead!!!
2046 */
2047 Assert(!fInCSAMCodePageInvalidate);
2048 STAM_COUNTER_DEC(&pVM->csam.s.StatPageMonitor);
2049 PGMHandlerVirtualDeregister(pVM, GCPtr);
2050 }
2051 if (pPageRec->page.enmTag == CSAM_TAG_PATM)
2052 {
2053 /* Make sure the recompiler flushes its cache as this page is no longer monitored. */
2054 STAM_COUNTER_INC(&pVM->csam.s.StatPageRemoveREMFlush);
2055 CPUMSetChangedFlags(pVCpu, CPUM_CHANGED_GLOBAL_TLB_FLUSH);
2056 }
2057#endif
2058
2059#ifdef VBOX_WITH_STATISTICS
2060 switch (pPageRec->page.enmTag)
2061 {
2062 case CSAM_TAG_CSAM:
2063 STAM_COUNTER_DEC(&pVM->csam.s.StatPageCSAM);
2064 break;
2065 case CSAM_TAG_PATM:
2066 STAM_COUNTER_DEC(&pVM->csam.s.StatPagePATM);
2067 break;
2068 case CSAM_TAG_REM:
2069 STAM_COUNTER_DEC(&pVM->csam.s.StatPageREM);
2070 break;
2071 default:
2072 break; /* to shut up GCC */
2073 }
2074#endif
2075
2076 if (pPageRec->page.pBitmap) MMR3HeapFree(pPageRec->page.pBitmap);
2077 MMR3HeapFree(pPageRec);
2078 }
2079 else
2080 AssertFailed();
2081
2082 return VINF_SUCCESS;
2083}
2084
2085/**
2086 * Callback for delayed writes from non-EMT threads
2087 *
2088 * @param pVM Pointer to the VM.
2089 * @param GCPtr The virtual address the guest is writing to. (not correct if it's an alias!)
2090 * @param cbBuf How much it's reading/writing.
2091 */
2092static DECLCALLBACK(void) CSAMDelayedWriteHandler(PVM pVM, RTRCPTR GCPtr, size_t cbBuf)
2093{
2094 int rc = PATMR3PatchWrite(pVM, GCPtr, (uint32_t)cbBuf);
2095 AssertRC(rc);
2096}
2097
2098/**
2099 * \#PF Handler callback for virtual access handler ranges.
2100 *
2101 * Important to realize that a physical page in a range can have aliases, and
2102 * for ALL and WRITE handlers these will also trigger.
2103 *
2104 * @returns VINF_SUCCESS if the handler have carried out the operation.
2105 * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
2106 * @param pVM Pointer to the VM.
2107 * @param GCPtr The virtual address the guest is writing to. (not correct if it's an alias!)
2108 * @param pvPtr The HC mapping of that address.
2109 * @param pvBuf What the guest is reading/writing.
2110 * @param cbBuf How much it's reading/writing.
2111 * @param enmAccessType The access type.
2112 * @param pvUser User argument.
2113 */
2114static DECLCALLBACK(int) CSAMCodePageWriteHandler(PVM pVM, RTGCPTR GCPtr, void *pvPtr, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
2115{
2116 int rc;
2117
2118 Assert(enmAccessType == PGMACCESSTYPE_WRITE); NOREF(enmAccessType);
2119 Log(("CSAMCodePageWriteHandler: write to %RGv size=%zu\n", GCPtr, cbBuf));
2120 NOREF(pvUser);
2121
2122 if ( PAGE_ADDRESS(pvPtr) == PAGE_ADDRESS((uintptr_t)pvPtr + cbBuf - 1)
2123 && !memcmp(pvPtr, pvBuf, cbBuf))
2124 {
2125 Log(("CSAMCodePageWriteHandler: dummy write -> ignore\n"));
2126 return VINF_PGM_HANDLER_DO_DEFAULT;
2127 }
2128
2129 if (VM_IS_EMT(pVM))
2130 rc = PATMR3PatchWrite(pVM, GCPtr, (uint32_t)cbBuf);
2131 else
2132 {
2133 /* Queue the write instead otherwise we'll get concurrency issues. */
2134 /** @note in theory not correct to let it write the data first before disabling a patch!
2135 * (if it writes the same data as the patch jump and we replace it with obsolete opcodes)
2136 */
2137 Log(("CSAMCodePageWriteHandler: delayed write!\n"));
2138 AssertCompileSize(RTRCPTR, 4);
2139 rc = VMR3ReqCallVoidNoWait(pVM, VMCPUID_ANY, (PFNRT)CSAMDelayedWriteHandler, 3, pVM, (RTRCPTR)GCPtr, cbBuf);
2140 }
2141 AssertRC(rc);
2142
2143 return VINF_PGM_HANDLER_DO_DEFAULT;
2144}
2145
2146/**
2147 * \#PF Handler callback for invalidation of virtual access handler ranges.
2148 *
2149 * @param pVM Pointer to the VM.
2150 * @param GCPtr The virtual address the guest has changed.
2151 */
2152static DECLCALLBACK(int) CSAMCodePageInvalidate(PVM pVM, RTGCPTR GCPtr)
2153{
2154 fInCSAMCodePageInvalidate = true;
2155 LogFlow(("CSAMCodePageInvalidate %RGv\n", GCPtr));
2156 /** @todo We can't remove the page (which unregisters the virtual handler) as we are called from a DoWithAll on the virtual handler tree. Argh. */
2157 csamFlushPage(pVM, GCPtr, false /* don't remove page! */);
2158 fInCSAMCodePageInvalidate = false;
2159 return VINF_SUCCESS;
2160}
2161
2162/**
2163 * Check if the current instruction has already been checked before
2164 *
2165 * @returns VBox status code. (trap handled or not)
2166 * @param pVM Pointer to the VM.
2167 * @param pInstr Instruction pointer
2168 * @param pPage CSAM patch structure pointer
2169 */
2170bool csamIsCodeScanned(PVM pVM, RTRCPTR pInstr, PCSAMPAGE *pPage)
2171{
2172 PCSAMPAGEREC pPageRec;
2173 uint32_t offset;
2174
2175 STAM_PROFILE_START(&pVM->csam.s.StatTimeCheckAddr, a);
2176
2177 offset = pInstr & PAGE_OFFSET_MASK;
2178 pInstr = pInstr & PAGE_BASE_GC_MASK;
2179
2180 Assert(pPage);
2181
2182 if (*pPage && (*pPage)->pPageGC == pInstr)
2183 {
2184 if ((*pPage)->pBitmap == NULL || ASMBitTest((*pPage)->pBitmap, offset))
2185 {
2186 STAM_COUNTER_ADD(&pVM->csam.s.StatNrKnownPagesHC, 1);
2187 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeCheckAddr, a);
2188 return true;
2189 }
2190 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeCheckAddr, a);
2191 return false;
2192 }
2193
2194 pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)pInstr);
2195 if (pPageRec)
2196 {
2197 if (pPage) *pPage= &pPageRec->page;
2198 if (pPageRec->page.pBitmap == NULL || ASMBitTest(pPageRec->page.pBitmap, offset))
2199 {
2200 STAM_COUNTER_ADD(&pVM->csam.s.StatNrKnownPagesHC, 1);
2201 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeCheckAddr, a);
2202 return true;
2203 }
2204 }
2205 else
2206 {
2207 if (pPage) *pPage = NULL;
2208 }
2209 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeCheckAddr, a);
2210 return false;
2211}
2212
2213/**
2214 * Mark an instruction in a page as scanned/not scanned
2215 *
2216 * @param pVM Pointer to the VM.
2217 * @param pPage Patch structure pointer
2218 * @param pInstr Instruction pointer
2219 * @param cbInstr Instruction size
2220 * @param fScanned Mark as scanned or not
2221 */
2222static void csamMarkCode(PVM pVM, PCSAMPAGE pPage, RTRCPTR pInstr, uint32_t cbInstr, bool fScanned)
2223{
2224 LogFlow(("csamMarkCodeAsScanned %RRv cbInstr=%d\n", pInstr, cbInstr));
2225 CSAMMarkPage(pVM, pInstr, fScanned);
2226
2227 /** @todo should recreate empty bitmap if !fScanned */
2228 if (pPage->pBitmap == NULL)
2229 return;
2230
2231 if (fScanned)
2232 {
2233 // retn instructions can be scanned more than once
2234 if (ASMBitTest(pPage->pBitmap, pInstr & PAGE_OFFSET_MASK) == 0)
2235 {
2236 pPage->uSize += cbInstr;
2237 STAM_COUNTER_ADD(&pVM->csam.s.StatNrInstr, 1);
2238 }
2239 if (pPage->uSize >= PAGE_SIZE)
2240 {
2241 Log(("Scanned full page (%RRv) -> free bitmap\n", pInstr & PAGE_BASE_GC_MASK));
2242 MMR3HeapFree(pPage->pBitmap);
2243 pPage->pBitmap = NULL;
2244 }
2245 else
2246 ASMBitSet(pPage->pBitmap, pInstr & PAGE_OFFSET_MASK);
2247 }
2248 else
2249 ASMBitClear(pPage->pBitmap, pInstr & PAGE_OFFSET_MASK);
2250}
2251
2252/**
2253 * Mark an instruction in a page as scanned/not scanned
2254 *
2255 * @returns VBox status code.
2256 * @param pVM Pointer to the VM.
2257 * @param pInstr Instruction pointer
2258 * @param cbInstr Instruction size
2259 * @param fScanned Mark as scanned or not
2260 */
2261VMMR3DECL(int) CSAMR3MarkCode(PVM pVM, RTRCPTR pInstr, uint32_t cbInstr, bool fScanned)
2262{
2263 PCSAMPAGE pPage = 0;
2264
2265 Assert(!fScanned); /* other case not implemented. */
2266 Assert(!PATMIsPatchGCAddr(pVM, pInstr));
2267
2268 if (csamIsCodeScanned(pVM, pInstr, &pPage) == false)
2269 {
2270 Assert(fScanned == true); /* other case should not be possible */
2271 return VINF_SUCCESS;
2272 }
2273
2274 Log(("CSAMR3MarkCode: %RRv size=%d fScanned=%d\n", pInstr, cbInstr, fScanned));
2275 csamMarkCode(pVM, pPage, pInstr, cbInstr, fScanned);
2276 return VINF_SUCCESS;
2277}
2278
2279
2280/**
2281 * Scan and analyse code
2282 *
2283 * @returns VBox status code.
2284 * @param pVM Pointer to the VM.
2285 * @param pCtxCore CPU context
2286 * @param pInstrGC Instruction pointer
2287 */
2288VMMR3DECL(int) CSAMR3CheckCodeEx(PVM pVM, PCPUMCTXCORE pCtxCore, RTRCPTR pInstrGC)
2289{
2290 if (EMIsRawRing0Enabled(pVM) == false || PATMIsPatchGCAddr(pVM, pInstrGC) == true)
2291 {
2292 // No use
2293 return VINF_SUCCESS;
2294 }
2295
2296 if (CSAMIsEnabled(pVM))
2297 {
2298 /* Assuming 32 bits code for now. */
2299 Assert(CPUMGetGuestCodeBits(VMMGetCpu0(pVM)) == 32);
2300
2301 pInstrGC = SELMToFlat(pVM, DISSELREG_CS, pCtxCore, pInstrGC);
2302 return CSAMR3CheckCode(pVM, pInstrGC);
2303 }
2304 return VINF_SUCCESS;
2305}
2306
2307/**
2308 * Scan and analyse code
2309 *
2310 * @returns VBox status code.
2311 * @param pVM Pointer to the VM.
2312 * @param pInstrGC Instruction pointer (0:32 virtual address)
2313 */
2314VMMR3DECL(int) CSAMR3CheckCode(PVM pVM, RTRCPTR pInstrGC)
2315{
2316 int rc;
2317 PCSAMPAGE pPage = NULL;
2318
2319 if ( EMIsRawRing0Enabled(pVM) == false
2320 || PATMIsPatchGCAddr(pVM, pInstrGC) == true)
2321 {
2322 /* Not active. */
2323 return VINF_SUCCESS;
2324 }
2325
2326 if (CSAMIsEnabled(pVM))
2327 {
2328 /* Cache record for csamR3GCVirtToHCVirt */
2329 CSAMP2GLOOKUPREC cacheRec;
2330 RT_ZERO(cacheRec);
2331
2332 STAM_PROFILE_START(&pVM->csam.s.StatTime, a);
2333 rc = csamAnalyseCallCodeStream(pVM, pInstrGC, pInstrGC, true /* 32 bits code */, CSAMR3AnalyseCallback, pPage, &cacheRec);
2334 STAM_PROFILE_STOP(&pVM->csam.s.StatTime, a);
2335 if (cacheRec.Lock.pvMap)
2336 PGMPhysReleasePageMappingLock(pVM, &cacheRec.Lock);
2337
2338 if (rc != VINF_SUCCESS)
2339 {
2340 Log(("csamAnalyseCodeStream failed with %d\n", rc));
2341 return rc;
2342 }
2343 }
2344 return VINF_SUCCESS;
2345}
2346
2347/**
2348 * Flush dirty code pages
2349 *
2350 * @returns VBox status code.
2351 * @param pVM Pointer to the VM.
2352 */
2353static int csamR3FlushDirtyPages(PVM pVM)
2354{
2355 Assert(pVM->cCpus == 1);
2356 PVMCPU pVCpu = VMMGetCpu0(pVM);
2357
2358 STAM_PROFILE_START(&pVM->csam.s.StatFlushDirtyPages, a);
2359
2360 for (uint32_t i=0;i<pVM->csam.s.cDirtyPages;i++)
2361 {
2362 int rc;
2363 PCSAMPAGEREC pPageRec;
2364 RTRCPTR GCPtr = pVM->csam.s.pvDirtyBasePage[i];
2365
2366 GCPtr = GCPtr & PAGE_BASE_GC_MASK;
2367
2368#ifdef VBOX_WITH_REM
2369 /* Notify the recompiler that this page has been changed. */
2370 REMR3NotifyCodePageChanged(pVM, pVCpu, GCPtr);
2371#endif
2372
2373 /* Enable write protection again. (use the fault address as it might be an alias) */
2374 rc = PGMShwMakePageReadonly(pVCpu, pVM->csam.s.pvDirtyFaultPage[i], 0 /*fFlags*/);
2375 Assert(rc == VINF_SUCCESS || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
2376
2377 Log(("CSAMR3FlushDirtyPages: flush %RRv (modifypage rc=%Rrc)\n", pVM->csam.s.pvDirtyBasePage[i], rc));
2378
2379 pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)GCPtr);
2380 if (pPageRec && pPageRec->page.enmTag == CSAM_TAG_REM)
2381 {
2382 uint64_t fFlags;
2383
2384 rc = PGMGstGetPage(pVCpu, GCPtr, &fFlags, NULL);
2385 AssertMsg(RT_SUCCESS(rc) || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
2386 if ( rc == VINF_SUCCESS
2387 && (fFlags & X86_PTE_US))
2388 {
2389 /* We don't care about user pages. */
2390 csamRemovePageRecord(pVM, GCPtr);
2391 STAM_COUNTER_INC(&pVM->csam.s.StatNrUserPages);
2392 }
2393 }
2394 }
2395 pVM->csam.s.cDirtyPages = 0;
2396 STAM_PROFILE_STOP(&pVM->csam.s.StatFlushDirtyPages, a);
2397 return VINF_SUCCESS;
2398}
2399
2400/**
2401 * Flush potential new code pages
2402 *
2403 * @returns VBox status code.
2404 * @param pVM Pointer to the VM.
2405 */
2406static int csamR3FlushCodePages(PVM pVM)
2407{
2408 Assert(pVM->cCpus == 1);
2409 PVMCPU pVCpu = VMMGetCpu0(pVM);
2410
2411 for (uint32_t i=0;i<pVM->csam.s.cPossibleCodePages;i++)
2412 {
2413 RTRCPTR GCPtr = pVM->csam.s.pvPossibleCodePage[i];
2414
2415 GCPtr = GCPtr & PAGE_BASE_GC_MASK;
2416
2417 Log(("csamR3FlushCodePages: %RRv\n", GCPtr));
2418 PGMShwMakePageNotPresent(pVCpu, GCPtr, 0 /*fFlags*/);
2419 /* Resync the page to make sure instruction fetch will fault */
2420 CSAMMarkPage(pVM, GCPtr, false);
2421 }
2422 pVM->csam.s.cPossibleCodePages = 0;
2423 return VINF_SUCCESS;
2424}
2425
2426/**
2427 * Perform any pending actions
2428 *
2429 * @returns VBox status code.
2430 * @param pVM Pointer to the VM.
2431 * @param pVCpu Pointer to the VMCPU.
2432 */
2433VMMR3DECL(int) CSAMR3DoPendingAction(PVM pVM, PVMCPU pVCpu)
2434{
2435 csamR3FlushDirtyPages(pVM);
2436 csamR3FlushCodePages(pVM);
2437
2438 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_CSAM_PENDING_ACTION);
2439 return VINF_SUCCESS;
2440}
2441
2442/**
2443 * Analyse interrupt and trap gates
2444 *
2445 * @returns VBox status code.
2446 * @param pVM Pointer to the VM.
2447 * @param iGate Start gate
2448 * @param cGates Number of gates to check
2449 */
2450VMMR3DECL(int) CSAMR3CheckGates(PVM pVM, uint32_t iGate, uint32_t cGates)
2451{
2452#ifdef VBOX_WITH_RAW_MODE
2453 Assert(pVM->cCpus == 1);
2454 PVMCPU pVCpu = VMMGetCpu0(pVM);
2455 uint16_t cbIDT;
2456 RTRCPTR GCPtrIDT = CPUMGetGuestIDTR(pVCpu, &cbIDT);
2457 uint32_t iGateEnd;
2458 uint32_t maxGates;
2459 VBOXIDTE aIDT[256];
2460 PVBOXIDTE pGuestIdte;
2461 int rc;
2462
2463 if (EMIsRawRing0Enabled(pVM) == false)
2464 {
2465 /* Enabling interrupt gates only works when raw ring 0 is enabled. */
2466 //AssertFailed();
2467 return VINF_SUCCESS;
2468 }
2469
2470 /* We only check all gates once during a session */
2471 if ( !pVM->csam.s.fGatesChecked
2472 && cGates != 256)
2473 return VINF_SUCCESS; /* too early */
2474
2475 /* We only check all gates once during a session */
2476 if ( pVM->csam.s.fGatesChecked
2477 && cGates != 1)
2478 return VINF_SUCCESS; /* ignored */
2479
2480 Assert(cGates <= 256);
2481 if (!GCPtrIDT || cGates > 256)
2482 return VERR_INVALID_PARAMETER;
2483
2484 if (cGates != 1)
2485 {
2486 pVM->csam.s.fGatesChecked = true;
2487 for (unsigned i=0;i<RT_ELEMENTS(pVM->csam.s.pvCallInstruction);i++)
2488 {
2489 RTRCPTR pHandler = pVM->csam.s.pvCallInstruction[i];
2490
2491 if (pHandler)
2492 {
2493 PCSAMPAGE pPage = NULL;
2494 CSAMP2GLOOKUPREC cacheRec; /* Cache record for csamR3GCVirtToHCVirt. */
2495 RT_ZERO(cacheRec);
2496
2497 Log(("CSAMCheckGates: checking previous call instruction %RRv\n", pHandler));
2498 STAM_PROFILE_START(&pVM->csam.s.StatTime, a);
2499 rc = csamAnalyseCodeStream(pVM, pHandler, pHandler, true, CSAMR3AnalyseCallback, pPage, &cacheRec);
2500 STAM_PROFILE_STOP(&pVM->csam.s.StatTime, a);
2501 if (cacheRec.Lock.pvMap)
2502 PGMPhysReleasePageMappingLock(pVM, &cacheRec.Lock);
2503
2504 if (rc != VINF_SUCCESS)
2505 {
2506 Log(("CSAMCheckGates: csamAnalyseCodeStream failed with %d\n", rc));
2507 continue;
2508 }
2509 }
2510 }
2511 }
2512
2513 /* Determine valid upper boundary. */
2514 maxGates = (cbIDT+1) / sizeof(VBOXIDTE);
2515 Assert(iGate < maxGates);
2516 if (iGate > maxGates)
2517 return VERR_INVALID_PARAMETER;
2518
2519 if (iGate + cGates > maxGates)
2520 cGates = maxGates - iGate;
2521
2522 GCPtrIDT = GCPtrIDT + iGate * sizeof(VBOXIDTE);
2523 iGateEnd = iGate + cGates;
2524
2525 STAM_PROFILE_START(&pVM->csam.s.StatCheckGates, a);
2526
2527 /*
2528 * Get IDT entries.
2529 */
2530 rc = PGMPhysSimpleReadGCPtr(pVCpu, aIDT, GCPtrIDT, cGates*sizeof(VBOXIDTE));
2531 if (RT_FAILURE(rc))
2532 {
2533 AssertMsgRC(rc, ("Failed to read IDTE! rc=%Rrc\n", rc));
2534 STAM_PROFILE_STOP(&pVM->csam.s.StatCheckGates, a);
2535 return rc;
2536 }
2537 pGuestIdte = &aIDT[0];
2538
2539 for (/*iGate*/; iGate<iGateEnd; iGate++, pGuestIdte++)
2540 {
2541 Assert(TRPMR3GetGuestTrapHandler(pVM, iGate) == TRPM_INVALID_HANDLER);
2542
2543 if ( pGuestIdte->Gen.u1Present
2544 && (pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32 || pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_INT_32)
2545 && (pGuestIdte->Gen.u2DPL == 3 || pGuestIdte->Gen.u2DPL == 0)
2546 )
2547 {
2548 RTRCPTR pHandler;
2549 PCSAMPAGE pPage = NULL;
2550 DBGFSELINFO selInfo;
2551 CSAMP2GLOOKUPREC cacheRec; /* Cache record for csamR3GCVirtToHCVirt. */
2552 RT_ZERO(cacheRec);
2553
2554 pHandler = VBOXIDTE_OFFSET(*pGuestIdte);
2555 pHandler = SELMToFlatBySel(pVM, pGuestIdte->Gen.u16SegSel, pHandler);
2556
2557 rc = SELMR3GetSelectorInfo(pVM, pVCpu, pGuestIdte->Gen.u16SegSel, &selInfo);
2558 if ( RT_FAILURE(rc)
2559 || (selInfo.fFlags & (DBGFSELINFO_FLAGS_NOT_PRESENT | DBGFSELINFO_FLAGS_INVALID))
2560 || selInfo.GCPtrBase != 0
2561 || selInfo.cbLimit != ~0U
2562 )
2563 {
2564 /* Refuse to patch a handler whose idt cs selector isn't wide open. */
2565 Log(("CSAMCheckGates: check gate %d failed due to rc %Rrc GCPtrBase=%RRv limit=%x\n", iGate, rc, selInfo.GCPtrBase, selInfo.cbLimit));
2566 continue;
2567 }
2568
2569
2570 if (pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32)
2571 {
2572 Log(("CSAMCheckGates: check trap gate %d at %04X:%08X (flat %RRv)\n", iGate, pGuestIdte->Gen.u16SegSel, VBOXIDTE_OFFSET(*pGuestIdte), pHandler));
2573 }
2574 else
2575 {
2576 Log(("CSAMCheckGates: check interrupt gate %d at %04X:%08X (flat %RRv)\n", iGate, pGuestIdte->Gen.u16SegSel, VBOXIDTE_OFFSET(*pGuestIdte), pHandler));
2577 }
2578
2579 STAM_PROFILE_START(&pVM->csam.s.StatTime, b);
2580 rc = csamAnalyseCodeStream(pVM, pHandler, pHandler, true, CSAMR3AnalyseCallback, pPage, &cacheRec);
2581 STAM_PROFILE_STOP(&pVM->csam.s.StatTime, b);
2582 if (cacheRec.Lock.pvMap)
2583 PGMPhysReleasePageMappingLock(pVM, &cacheRec.Lock);
2584
2585 if (rc != VINF_SUCCESS)
2586 {
2587 Log(("CSAMCheckGates: csamAnalyseCodeStream failed with %d\n", rc));
2588 continue;
2589 }
2590 /* OpenBSD guest specific patch test. */
2591 if (iGate >= 0x20)
2592 {
2593 PCPUMCTX pCtx;
2594 DISCPUSTATE cpu;
2595 RTGCUINTPTR32 aOpenBsdPushCSOffset[3] = {0x03, /* OpenBSD 3.7 & 3.8 */
2596 0x2B, /* OpenBSD 4.0 installation ISO */
2597 0x2F}; /* OpenBSD 4.0 after install */
2598
2599 pCtx = CPUMQueryGuestCtxPtr(pVCpu);
2600
2601 for (unsigned i=0;i<RT_ELEMENTS(aOpenBsdPushCSOffset);i++)
2602 {
2603 rc = CPUMR3DisasmInstrCPU(pVM, pVCpu, pCtx, pHandler - aOpenBsdPushCSOffset[i], &cpu, NULL);
2604 if ( rc == VINF_SUCCESS
2605 && cpu.pCurInstr->uOpcode == OP_PUSH
2606 && cpu.pCurInstr->fParam1 == OP_PARM_REG_CS)
2607 {
2608 rc = PATMR3InstallPatch(pVM, pHandler - aOpenBsdPushCSOffset[i], PATMFL_CODE32 | PATMFL_GUEST_SPECIFIC);
2609 if (RT_SUCCESS(rc))
2610 Log(("Installed OpenBSD interrupt handler prefix instruction (push cs) patch\n"));
2611 }
2612 }
2613 }
2614
2615 /* Trap gates and certain interrupt gates. */
2616 uint32_t fPatchFlags = PATMFL_CODE32 | PATMFL_IDTHANDLER;
2617
2618 if (pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32)
2619 fPatchFlags |= PATMFL_TRAPHANDLER;
2620 else
2621 fPatchFlags |= PATMFL_INTHANDLER;
2622
2623 switch (iGate) {
2624 case 8:
2625 case 10:
2626 case 11:
2627 case 12:
2628 case 13:
2629 case 14:
2630 case 17:
2631 fPatchFlags |= PATMFL_TRAPHANDLER_WITH_ERRORCODE;
2632 break;
2633 default:
2634 /* No error code. */
2635 break;
2636 }
2637
2638 Log(("Installing %s gate handler for 0x%X at %RRv\n", (pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32) ? "trap" : "intr", iGate, pHandler));
2639
2640 rc = PATMR3InstallPatch(pVM, pHandler, fPatchFlags);
2641 if (RT_SUCCESS(rc) || rc == VERR_PATM_ALREADY_PATCHED)
2642 {
2643 Log(("Gate handler 0x%X is SAFE!\n", iGate));
2644
2645 RTRCPTR pNewHandlerGC = PATMR3QueryPatchGCPtr(pVM, pHandler);
2646 if (pNewHandlerGC)
2647 {
2648 rc = TRPMR3SetGuestTrapHandler(pVM, iGate, pNewHandlerGC);
2649 if (RT_FAILURE(rc))
2650 Log(("TRPMR3SetGuestTrapHandler %d failed with %Rrc\n", iGate, rc));
2651 }
2652 }
2653 }
2654 } /* for */
2655 STAM_PROFILE_STOP(&pVM->csam.s.StatCheckGates, a);
2656#endif /* VBOX_WITH_RAW_MODE */
2657 return VINF_SUCCESS;
2658}
2659
2660/**
2661 * Record previous call instruction addresses
2662 *
2663 * @returns VBox status code.
2664 * @param pVM Pointer to the VM.
2665 * @param GCPtrCall Call address
2666 */
2667VMMR3DECL(int) CSAMR3RecordCallAddress(PVM pVM, RTRCPTR GCPtrCall)
2668{
2669 for (unsigned i=0;i<RT_ELEMENTS(pVM->csam.s.pvCallInstruction);i++)
2670 {
2671 if (pVM->csam.s.pvCallInstruction[i] == GCPtrCall)
2672 return VINF_SUCCESS;
2673 }
2674
2675 Log(("CSAMR3RecordCallAddress %RRv\n", GCPtrCall));
2676
2677 pVM->csam.s.pvCallInstruction[pVM->csam.s.iCallInstruction++] = GCPtrCall;
2678 if (pVM->csam.s.iCallInstruction >= RT_ELEMENTS(pVM->csam.s.pvCallInstruction))
2679 pVM->csam.s.iCallInstruction = 0;
2680
2681 return VINF_SUCCESS;
2682}
2683
2684
2685/**
2686 * Query CSAM state (enabled/disabled)
2687 *
2688 * @returns true if enabled, false otherwise.
2689 * @param pUVM The user mode VM handle.
2690 */
2691VMMR3DECL(bool) CSAMR3IsEnabled(PUVM pUVM)
2692{
2693 UVM_ASSERT_VALID_EXT_RETURN(pUVM, false);
2694 PVM pVM = pUVM->pVM;
2695 VM_ASSERT_VALID_EXT_RETURN(pVM, false);
2696 return CSAMIsEnabled(pVM);
2697}
2698
2699#ifdef VBOX_WITH_DEBUGGER
2700
2701/**
2702 * The '.csamoff' command.
2703 *
2704 * @returns VBox status.
2705 * @param pCmd Pointer to the command descriptor (as registered).
2706 * @param pCmdHlp Pointer to command helper functions.
2707 * @param pVM Pointer to the current VM (if any).
2708 * @param paArgs Pointer to (readonly) array of arguments.
2709 * @param cArgs Number of arguments in the array.
2710 */
2711static DECLCALLBACK(int) csamr3CmdOff(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PVM pVM, PCDBGCVAR paArgs, unsigned cArgs)
2712{
2713 DBGC_CMDHLP_REQ_VM_RET(pCmdHlp, pCmd, pVM);
2714 NOREF(cArgs); NOREF(paArgs);
2715
2716 int rc = CSAMDisableScanning(pVM);
2717 if (RT_FAILURE(rc))
2718 return DBGCCmdHlpFailRc(pCmdHlp, pCmd, rc, "CSAMDisableScanning");
2719 return DBGCCmdHlpPrintf(pCmdHlp, "CSAM Scanning disabled\n");
2720}
2721
2722/**
2723 * The '.csamon' command.
2724 *
2725 * @returns VBox status.
2726 * @param pCmd Pointer to the command descriptor (as registered).
2727 * @param pCmdHlp Pointer to command helper functions.
2728 * @param pVM Pointer to the current VM (if any).
2729 * @param paArgs Pointer to (readonly) array of arguments.
2730 * @param cArgs Number of arguments in the array.
2731 */
2732static DECLCALLBACK(int) csamr3CmdOn(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PVM pVM, PCDBGCVAR paArgs, unsigned cArgs)
2733{
2734 DBGC_CMDHLP_REQ_VM_RET(pCmdHlp, pCmd, pVM);
2735 NOREF(cArgs); NOREF(paArgs);
2736
2737 int rc = CSAMEnableScanning(pVM);
2738 if (RT_FAILURE(rc))
2739 return DBGCCmdHlpFailRc(pCmdHlp, pCmd, rc, "CSAMEnableScanning");
2740 return DBGCCmdHlpPrintf(pCmdHlp, "CSAM Scanning enabled\n");
2741}
2742
2743#endif /* VBOX_WITH_DEBUGGER */
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