VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/CSAM.cpp@ 45457

Last change on this file since 45457 was 45276, checked in by vboxsync, 12 years ago

Ring-1 compression patches, courtesy of trivirt AG:

  • main: diff to remove the hwvirt requirement for QNX
  • rem: diff for dealing with raw ring 0/1 selectors and general changes to allowed guest execution states
  • vmm: changes for using the guest's TSS selector index as our hypervisor TSS selector (makes str safe) (VBOX_WITH_SAFE_STR )
  • vmm: changes for dealing with guest ring 1 code (VBOX_WITH_RAW_RING1)
  • vmm: change to emulate smsw in RC/R0 (QNX uses this old style instruction a lot so going to qemu for emulation is very expensive)
  • vmm: change (hack) to kick out patm virtual handlers in case they conflict with guest GDT/TSS write monitors; we should allow multiple handlers per page, but that change would be rather invasive
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id Revision
File size: 99.1 KB
Line 
1/* $Id: CSAM.cpp 45276 2013-04-02 08:17:11Z vboxsync $ */
2/** @file
3 * CSAM - Guest OS Code Scanning and Analysis Manager
4 */
5
6/*
7 * Copyright (C) 2006-2013 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18/*******************************************************************************
19* Header Files *
20*******************************************************************************/
21#define LOG_GROUP LOG_GROUP_CSAM
22#include <VBox/vmm/cpum.h>
23#include <VBox/vmm/stam.h>
24#include <VBox/vmm/patm.h>
25#include <VBox/vmm/csam.h>
26#include <VBox/vmm/cpumdis.h>
27#include <VBox/vmm/pgm.h>
28#include <VBox/vmm/iom.h>
29#include <VBox/sup.h>
30#include <VBox/vmm/mm.h>
31#include <VBox/vmm/em.h>
32#ifdef VBOX_WITH_REM
33# include <VBox/vmm/rem.h>
34#endif
35#include <VBox/vmm/selm.h>
36#include <VBox/vmm/trpm.h>
37#include <VBox/vmm/cfgm.h>
38#include <VBox/vmm/ssm.h>
39#include <VBox/param.h>
40#include <iprt/avl.h>
41#include <iprt/asm.h>
42#include <iprt/thread.h>
43#include "CSAMInternal.h"
44#include <VBox/vmm/vm.h>
45#include <VBox/vmm/uvm.h>
46#include <VBox/dbg.h>
47#include <VBox/err.h>
48#include <VBox/log.h>
49#include <iprt/assert.h>
50#include <iprt/string.h>
51#include <VBox/dis.h>
52#include <VBox/disopcode.h>
53#include "internal/pgm.h"
54
55
56/* Enabled by default */
57#define CSAM_ENABLE
58
59/* Enable to monitor code pages for self-modifying code. */
60#define CSAM_MONITOR_CODE_PAGES
61/* Enable to monitor all scanned pages
62#define CSAM_MONITOR_CSAM_CODE_PAGES */
63/* Enable to scan beyond ret instructions.
64#define CSAM_ANALYSE_BEYOND_RET */
65
66/*******************************************************************************
67* Internal Functions *
68*******************************************************************************/
69static DECLCALLBACK(int) csamr3Save(PVM pVM, PSSMHANDLE pSSM);
70static DECLCALLBACK(int) csamr3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
71static DECLCALLBACK(int) CSAMCodePageWriteHandler(PVM pVM, RTGCPTR GCPtr, void *pvPtr, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
72static DECLCALLBACK(int) CSAMCodePageInvalidate(PVM pVM, RTGCPTR GCPtr);
73
74bool csamIsCodeScanned(PVM pVM, RTRCPTR pInstr, PCSAMPAGE *pPage);
75int csamR3CheckPageRecord(PVM pVM, RTRCPTR pInstr);
76static PCSAMPAGE csamCreatePageRecord(PVM pVM, RTRCPTR GCPtr, CSAMTAG enmTag, bool fCode32, bool fMonitorInvalidation = false);
77static int csamRemovePageRecord(PVM pVM, RTRCPTR GCPtr);
78static int csamReinit(PVM pVM);
79static void csamMarkCode(PVM pVM, PCSAMPAGE pPage, RTRCPTR pInstr, uint32_t opsize, bool fScanned);
80static int csamAnalyseCodeStream(PVM pVM, RCPTRTYPE(uint8_t *) pInstrGC, RCPTRTYPE(uint8_t *) pCurInstrGC, bool fCode32,
81 PFN_CSAMR3ANALYSE pfnCSAMR3Analyse, void *pUserData, PCSAMP2GLOOKUPREC pCacheRec);
82
83/** @todo Temporary for debugging. */
84static bool fInCSAMCodePageInvalidate = false;
85
86#ifdef VBOX_WITH_DEBUGGER
87static FNDBGCCMD csamr3CmdOn;
88static FNDBGCCMD csamr3CmdOff;
89#endif
90
91
92/*******************************************************************************
93* Global Variables *
94*******************************************************************************/
95#ifdef VBOX_WITH_DEBUGGER
96/** Command descriptors. */
97static const DBGCCMD g_aCmds[] =
98{
99 /* pszCmd, cArgsMin, cArgsMax, paArgDesc, cArgDescs, fFlags, pfnHandler pszSyntax, ....pszDescription */
100 { "csamon", 0, 0, NULL, 0, 0, csamr3CmdOn, "", "Enable CSAM code scanning." },
101 { "csamoff", 0, 0, NULL, 0, 0, csamr3CmdOff, "", "Disable CSAM code scanning." },
102};
103#endif
104
105/**
106 * SSM descriptor table for the CSAM structure.
107 */
108static const SSMFIELD g_aCsamFields[] =
109{
110 /** @todo there are more fields that can be ignored here. */
111 SSMFIELD_ENTRY_IGNORE( CSAM, offVM),
112 SSMFIELD_ENTRY_PAD_HC64( CSAM, Alignment0, sizeof(uint32_t)),
113 SSMFIELD_ENTRY_IGN_HCPTR( CSAM, pPageTree),
114 SSMFIELD_ENTRY( CSAM, aDangerousInstr),
115 SSMFIELD_ENTRY( CSAM, cDangerousInstr),
116 SSMFIELD_ENTRY( CSAM, iDangerousInstr),
117 SSMFIELD_ENTRY_RCPTR( CSAM, pPDBitmapGC), /// @todo ignore this?
118 SSMFIELD_ENTRY_RCPTR( CSAM, pPDHCBitmapGC), /// @todo ignore this?
119 SSMFIELD_ENTRY_IGN_HCPTR( CSAM, pPDBitmapHC),
120 SSMFIELD_ENTRY_IGN_HCPTR( CSAM, pPDGCBitmapHC),
121 SSMFIELD_ENTRY_IGN_HCPTR( CSAM, savedstate.pSSM),
122 SSMFIELD_ENTRY( CSAM, savedstate.cPageRecords),
123 SSMFIELD_ENTRY( CSAM, savedstate.cPatchPageRecords),
124 SSMFIELD_ENTRY( CSAM, cDirtyPages),
125 SSMFIELD_ENTRY_RCPTR_ARRAY( CSAM, pvDirtyBasePage),
126 SSMFIELD_ENTRY_RCPTR_ARRAY( CSAM, pvDirtyFaultPage),
127 SSMFIELD_ENTRY( CSAM, cPossibleCodePages),
128 SSMFIELD_ENTRY_RCPTR_ARRAY( CSAM, pvPossibleCodePage),
129 SSMFIELD_ENTRY_RCPTR_ARRAY( CSAM, pvCallInstruction),
130 SSMFIELD_ENTRY( CSAM, iCallInstruction),
131 SSMFIELD_ENTRY( CSAM, fScanningStarted),
132 SSMFIELD_ENTRY( CSAM, fGatesChecked),
133 SSMFIELD_ENTRY_PAD_HC( CSAM, Alignment1, 6, 2),
134 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrTraps),
135 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrPages),
136 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrPagesInv),
137 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrRemovedPages),
138 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrPatchPages),
139 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrPageNPHC),
140 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrPageNPGC),
141 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrFlushes),
142 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrFlushesSkipped),
143 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrKnownPagesHC),
144 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrKnownPagesGC),
145 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrInstr),
146 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrBytesRead),
147 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrOpcodeRead),
148 SSMFIELD_ENTRY_IGNORE( CSAM, StatTime),
149 SSMFIELD_ENTRY_IGNORE( CSAM, StatTimeCheckAddr),
150 SSMFIELD_ENTRY_IGNORE( CSAM, StatTimeAddrConv),
151 SSMFIELD_ENTRY_IGNORE( CSAM, StatTimeFlushPage),
152 SSMFIELD_ENTRY_IGNORE( CSAM, StatTimeDisasm),
153 SSMFIELD_ENTRY_IGNORE( CSAM, StatFlushDirtyPages),
154 SSMFIELD_ENTRY_IGNORE( CSAM, StatCheckGates),
155 SSMFIELD_ENTRY_IGNORE( CSAM, StatCodePageModified),
156 SSMFIELD_ENTRY_IGNORE( CSAM, StatDangerousWrite),
157 SSMFIELD_ENTRY_IGNORE( CSAM, StatInstrCacheHit),
158 SSMFIELD_ENTRY_IGNORE( CSAM, StatInstrCacheMiss),
159 SSMFIELD_ENTRY_IGNORE( CSAM, StatPagePATM),
160 SSMFIELD_ENTRY_IGNORE( CSAM, StatPageCSAM),
161 SSMFIELD_ENTRY_IGNORE( CSAM, StatPageREM),
162 SSMFIELD_ENTRY_IGNORE( CSAM, StatNrUserPages),
163 SSMFIELD_ENTRY_IGNORE( CSAM, StatPageMonitor),
164 SSMFIELD_ENTRY_IGNORE( CSAM, StatPageRemoveREMFlush),
165 SSMFIELD_ENTRY_IGNORE( CSAM, StatBitmapAlloc),
166 SSMFIELD_ENTRY_IGNORE( CSAM, StatScanNextFunction),
167 SSMFIELD_ENTRY_IGNORE( CSAM, StatScanNextFunctionFailed),
168 SSMFIELD_ENTRY_TERM()
169};
170
171/** Fake type to simplify g_aCsamPDBitmapArray construction. */
172typedef struct
173{
174 uint8_t *a[CSAM_PGDIRBMP_CHUNKS];
175} CSAMPDBITMAPARRAY;
176
177/**
178 * SSM descriptor table for the CSAM::pPDBitmapHC array.
179 */
180static SSMFIELD const g_aCsamPDBitmapArray[] =
181{
182 SSMFIELD_ENTRY_HCPTR_NI_ARRAY(CSAMPDBITMAPARRAY, a),
183 SSMFIELD_ENTRY_TERM()
184};
185
186/**
187 * SSM descriptor table for the CSAMPAGEREC structure.
188 */
189static const SSMFIELD g_aCsamPageRecFields[] =
190{
191 SSMFIELD_ENTRY_IGN_HCPTR( CSAMPAGEREC, Core.Key),
192 SSMFIELD_ENTRY_IGN_HCPTR( CSAMPAGEREC, Core.pLeft),
193 SSMFIELD_ENTRY_IGN_HCPTR( CSAMPAGEREC, Core.pRight),
194 SSMFIELD_ENTRY_IGNORE( CSAMPAGEREC, Core.uchHeight),
195 SSMFIELD_ENTRY_PAD_HC_AUTO( 3, 7),
196 SSMFIELD_ENTRY_RCPTR( CSAMPAGEREC, page.pPageGC),
197 SSMFIELD_ENTRY_PAD_HC_AUTO( 0, 4),
198 SSMFIELD_ENTRY_PAD_MSC32_AUTO( 4),
199 SSMFIELD_ENTRY_GCPHYS( CSAMPAGEREC, page.GCPhys),
200 SSMFIELD_ENTRY( CSAMPAGEREC, page.fFlags),
201 SSMFIELD_ENTRY( CSAMPAGEREC, page.uSize),
202 SSMFIELD_ENTRY_PAD_HC_AUTO( 0, 4),
203 SSMFIELD_ENTRY_HCPTR_NI( CSAMPAGEREC, page.pBitmap),
204 SSMFIELD_ENTRY( CSAMPAGEREC, page.fCode32),
205 SSMFIELD_ENTRY( CSAMPAGEREC, page.fMonitorActive),
206 SSMFIELD_ENTRY( CSAMPAGEREC, page.fMonitorInvalidation),
207 SSMFIELD_ENTRY_PAD_HC_AUTO( 1, 1),
208 SSMFIELD_ENTRY( CSAMPAGEREC, page.enmTag),
209 SSMFIELD_ENTRY( CSAMPAGEREC, page.u64Hash),
210 SSMFIELD_ENTRY_TERM()
211};
212
213
214/**
215 * Initializes the CSAM.
216 *
217 * @returns VBox status code.
218 * @param pVM Pointer to the VM.
219 */
220VMMR3_INT_DECL(int) CSAMR3Init(PVM pVM)
221{
222 int rc;
223
224 LogFlow(("CSAMR3Init\n"));
225
226 /* Allocate bitmap for the page directory. */
227 rc = MMR3HyperAllocOnceNoRel(pVM, CSAM_PGDIRBMP_CHUNKS*sizeof(RTHCPTR), 0, MM_TAG_CSAM, (void **)&pVM->csam.s.pPDBitmapHC);
228 AssertRCReturn(rc, rc);
229 rc = MMR3HyperAllocOnceNoRel(pVM, CSAM_PGDIRBMP_CHUNKS*sizeof(RTRCPTR), 0, MM_TAG_CSAM, (void **)&pVM->csam.s.pPDGCBitmapHC);
230 AssertRCReturn(rc, rc);
231 pVM->csam.s.pPDBitmapGC = MMHyperR3ToRC(pVM, pVM->csam.s.pPDGCBitmapHC);
232 pVM->csam.s.pPDHCBitmapGC = MMHyperR3ToRC(pVM, pVM->csam.s.pPDBitmapHC);
233
234 rc = csamReinit(pVM);
235 AssertRCReturn(rc, rc);
236
237 /*
238 * Register save and load state notifiers.
239 */
240 rc = SSMR3RegisterInternal(pVM, "CSAM", 0, CSAM_SSM_VERSION, sizeof(pVM->csam.s) + PAGE_SIZE*16,
241 NULL, NULL, NULL,
242 NULL, csamr3Save, NULL,
243 NULL, csamr3Load, NULL);
244 AssertRCReturn(rc, rc);
245
246 STAM_REG(pVM, &pVM->csam.s.StatNrTraps, STAMTYPE_COUNTER, "/CSAM/PageTraps", STAMUNIT_OCCURENCES, "The number of CSAM page traps.");
247 STAM_REG(pVM, &pVM->csam.s.StatDangerousWrite, STAMTYPE_COUNTER, "/CSAM/DangerousWrites", STAMUNIT_OCCURENCES, "The number of dangerous writes that cause a context switch.");
248
249 STAM_REG(pVM, &pVM->csam.s.StatNrPageNPHC, STAMTYPE_COUNTER, "/CSAM/HC/PageNotPresent", STAMUNIT_OCCURENCES, "The number of CSAM pages marked not present.");
250 STAM_REG(pVM, &pVM->csam.s.StatNrPageNPGC, STAMTYPE_COUNTER, "/CSAM/GC/PageNotPresent", STAMUNIT_OCCURENCES, "The number of CSAM pages marked not present.");
251 STAM_REG(pVM, &pVM->csam.s.StatNrPages, STAMTYPE_COUNTER, "/CSAM/PageRec/AddedRW", STAMUNIT_OCCURENCES, "The number of CSAM page records (RW monitoring).");
252 STAM_REG(pVM, &pVM->csam.s.StatNrPagesInv, STAMTYPE_COUNTER, "/CSAM/PageRec/AddedRWI", STAMUNIT_OCCURENCES, "The number of CSAM page records (RW & invalidation monitoring).");
253 STAM_REG(pVM, &pVM->csam.s.StatNrRemovedPages, STAMTYPE_COUNTER, "/CSAM/PageRec/Removed", STAMUNIT_OCCURENCES, "The number of removed CSAM page records.");
254 STAM_REG(pVM, &pVM->csam.s.StatPageRemoveREMFlush,STAMTYPE_COUNTER, "/CSAM/PageRec/Removed/REMFlush", STAMUNIT_OCCURENCES, "The number of removed CSAM page records that caused a REM flush.");
255
256 STAM_REG(pVM, &pVM->csam.s.StatNrPatchPages, STAMTYPE_COUNTER, "/CSAM/PageRec/Patch", STAMUNIT_OCCURENCES, "The number of CSAM patch page records.");
257 STAM_REG(pVM, &pVM->csam.s.StatNrUserPages, STAMTYPE_COUNTER, "/CSAM/PageRec/Ignore/User", STAMUNIT_OCCURENCES, "The number of CSAM user page records (ignored).");
258 STAM_REG(pVM, &pVM->csam.s.StatPagePATM, STAMTYPE_COUNTER, "/CSAM/PageRec/Type/PATM", STAMUNIT_OCCURENCES, "The number of PATM page records.");
259 STAM_REG(pVM, &pVM->csam.s.StatPageCSAM, STAMTYPE_COUNTER, "/CSAM/PageRec/Type/CSAM", STAMUNIT_OCCURENCES, "The number of CSAM page records.");
260 STAM_REG(pVM, &pVM->csam.s.StatPageREM, STAMTYPE_COUNTER, "/CSAM/PageRec/Type/REM", STAMUNIT_OCCURENCES, "The number of REM page records.");
261 STAM_REG(pVM, &pVM->csam.s.StatPageMonitor, STAMTYPE_COUNTER, "/CSAM/PageRec/Monitored", STAMUNIT_OCCURENCES, "The number of monitored pages.");
262
263 STAM_REG(pVM, &pVM->csam.s.StatCodePageModified, STAMTYPE_COUNTER, "/CSAM/Monitor/DirtyPage", STAMUNIT_OCCURENCES, "The number of code page modifications.");
264
265 STAM_REG(pVM, &pVM->csam.s.StatNrFlushes, STAMTYPE_COUNTER, "/CSAM/PageFlushes", STAMUNIT_OCCURENCES, "The number of CSAM page flushes.");
266 STAM_REG(pVM, &pVM->csam.s.StatNrFlushesSkipped, STAMTYPE_COUNTER, "/CSAM/PageFlushesSkipped", STAMUNIT_OCCURENCES, "The number of CSAM page flushes that were skipped.");
267 STAM_REG(pVM, &pVM->csam.s.StatNrKnownPagesHC, STAMTYPE_COUNTER, "/CSAM/HC/KnownPageRecords", STAMUNIT_OCCURENCES, "The number of known CSAM page records.");
268 STAM_REG(pVM, &pVM->csam.s.StatNrKnownPagesGC, STAMTYPE_COUNTER, "/CSAM/GC/KnownPageRecords", STAMUNIT_OCCURENCES, "The number of known CSAM page records.");
269 STAM_REG(pVM, &pVM->csam.s.StatNrInstr, STAMTYPE_COUNTER, "/CSAM/ScannedInstr", STAMUNIT_OCCURENCES, "The number of scanned instructions.");
270 STAM_REG(pVM, &pVM->csam.s.StatNrBytesRead, STAMTYPE_COUNTER, "/CSAM/BytesRead", STAMUNIT_OCCURENCES, "The number of bytes read for scanning.");
271 STAM_REG(pVM, &pVM->csam.s.StatNrOpcodeRead, STAMTYPE_COUNTER, "/CSAM/OpcodeBytesRead", STAMUNIT_OCCURENCES, "The number of opcode bytes read by the recompiler.");
272
273 STAM_REG(pVM, &pVM->csam.s.StatBitmapAlloc, STAMTYPE_COUNTER, "/CSAM/Alloc/PageBitmap", STAMUNIT_OCCURENCES, "The number of page bitmap allocations.");
274
275 STAM_REG(pVM, &pVM->csam.s.StatInstrCacheHit, STAMTYPE_COUNTER, "/CSAM/Cache/Hit", STAMUNIT_OCCURENCES, "The number of dangerous instruction cache hits.");
276 STAM_REG(pVM, &pVM->csam.s.StatInstrCacheMiss, STAMTYPE_COUNTER, "/CSAM/Cache/Miss", STAMUNIT_OCCURENCES, "The number of dangerous instruction cache misses.");
277
278 STAM_REG(pVM, &pVM->csam.s.StatScanNextFunction, STAMTYPE_COUNTER, "/CSAM/Function/Scan/Success", STAMUNIT_OCCURENCES, "The number of found functions beyond the ret border.");
279 STAM_REG(pVM, &pVM->csam.s.StatScanNextFunctionFailed, STAMTYPE_COUNTER, "/CSAM/Function/Scan/Failed", STAMUNIT_OCCURENCES, "The number of refused functions beyond the ret border.");
280
281 STAM_REG(pVM, &pVM->csam.s.StatTime, STAMTYPE_PROFILE, "/PROF/CSAM/Scan", STAMUNIT_TICKS_PER_CALL, "Scanning overhead.");
282 STAM_REG(pVM, &pVM->csam.s.StatTimeCheckAddr, STAMTYPE_PROFILE, "/PROF/CSAM/CheckAddr", STAMUNIT_TICKS_PER_CALL, "Address check overhead.");
283 STAM_REG(pVM, &pVM->csam.s.StatTimeAddrConv, STAMTYPE_PROFILE, "/PROF/CSAM/AddrConv", STAMUNIT_TICKS_PER_CALL, "Address conversion overhead.");
284 STAM_REG(pVM, &pVM->csam.s.StatTimeFlushPage, STAMTYPE_PROFILE, "/PROF/CSAM/FlushPage", STAMUNIT_TICKS_PER_CALL, "Page flushing overhead.");
285 STAM_REG(pVM, &pVM->csam.s.StatTimeDisasm, STAMTYPE_PROFILE, "/PROF/CSAM/Disasm", STAMUNIT_TICKS_PER_CALL, "Disassembly overhead.");
286 STAM_REG(pVM, &pVM->csam.s.StatFlushDirtyPages, STAMTYPE_PROFILE, "/PROF/CSAM/FlushDirtyPage", STAMUNIT_TICKS_PER_CALL, "Dirty page flushing overhead.");
287 STAM_REG(pVM, &pVM->csam.s.StatCheckGates, STAMTYPE_PROFILE, "/PROF/CSAM/CheckGates", STAMUNIT_TICKS_PER_CALL, "CSAMR3CheckGates overhead.");
288
289 /*
290 * Check CFGM option and enable/disable CSAM.
291 */
292 bool fEnabled;
293 rc = CFGMR3QueryBool(CFGMR3GetRoot(pVM), "CSAMEnabled", &fEnabled);
294 if (RT_FAILURE(rc))
295#ifdef CSAM_ENABLE
296 fEnabled = true;
297#else
298 fEnabled = false;
299#endif
300 if (fEnabled)
301 CSAMEnableScanning(pVM);
302
303#ifdef VBOX_WITH_DEBUGGER
304 /*
305 * Debugger commands.
306 */
307 static bool fRegisteredCmds = false;
308 if (!fRegisteredCmds)
309 {
310 rc = DBGCRegisterCommands(&g_aCmds[0], RT_ELEMENTS(g_aCmds));
311 if (RT_SUCCESS(rc))
312 fRegisteredCmds = true;
313 }
314#endif
315
316 return VINF_SUCCESS;
317}
318
319/**
320 * (Re)initializes CSAM
321 *
322 * @param pVM The VM.
323 */
324static int csamReinit(PVM pVM)
325{
326 /*
327 * Assert alignment and sizes.
328 */
329 AssertRelease(!(RT_OFFSETOF(VM, csam.s) & 31));
330 AssertRelease(sizeof(pVM->csam.s) <= sizeof(pVM->csam.padding));
331
332 /*
333 * Setup any fixed pointers and offsets.
334 */
335 pVM->csam.s.offVM = RT_OFFSETOF(VM, patm);
336
337 pVM->csam.s.fGatesChecked = false;
338 pVM->csam.s.fScanningStarted = false;
339
340 PVMCPU pVCpu = &pVM->aCpus[0]; /* raw mode implies 1 VPCU */
341 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_CSAM_PENDING_ACTION);
342 pVM->csam.s.cDirtyPages = 0;
343 /* not necessary */
344 memset(pVM->csam.s.pvDirtyBasePage, 0, sizeof(pVM->csam.s.pvDirtyBasePage));
345 memset(pVM->csam.s.pvDirtyFaultPage, 0, sizeof(pVM->csam.s.pvDirtyFaultPage));
346
347 memset(&pVM->csam.s.aDangerousInstr, 0, sizeof(pVM->csam.s.aDangerousInstr));
348 pVM->csam.s.cDangerousInstr = 0;
349 pVM->csam.s.iDangerousInstr = 0;
350
351 memset(pVM->csam.s.pvCallInstruction, 0, sizeof(pVM->csam.s.pvCallInstruction));
352 pVM->csam.s.iCallInstruction = 0;
353
354 /** @note never mess with the pgdir bitmap here! */
355 return VINF_SUCCESS;
356}
357
358/**
359 * Applies relocations to data and code managed by this
360 * component. This function will be called at init and
361 * whenever the VMM need to relocate itself inside the GC.
362 *
363 * The csam will update the addresses used by the switcher.
364 *
365 * @param pVM The VM.
366 * @param offDelta Relocation delta.
367 */
368VMMR3_INT_DECL(void) CSAMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
369{
370 if (offDelta)
371 {
372 /* Adjust pgdir and page bitmap pointers. */
373 pVM->csam.s.pPDBitmapGC = MMHyperR3ToRC(pVM, pVM->csam.s.pPDGCBitmapHC);
374 pVM->csam.s.pPDHCBitmapGC = MMHyperR3ToRC(pVM, pVM->csam.s.pPDBitmapHC);
375
376 for(int i=0;i<CSAM_PGDIRBMP_CHUNKS;i++)
377 {
378 if (pVM->csam.s.pPDGCBitmapHC[i])
379 {
380 pVM->csam.s.pPDGCBitmapHC[i] += offDelta;
381 }
382 }
383 }
384 return;
385}
386
387/**
388 * Terminates the csam.
389 *
390 * Termination means cleaning up and freeing all resources,
391 * the VM it self is at this point powered off or suspended.
392 *
393 * @returns VBox status code.
394 * @param pVM Pointer to the VM.
395 */
396VMMR3_INT_DECL(int) CSAMR3Term(PVM pVM)
397{
398 int rc;
399
400 rc = CSAMR3Reset(pVM);
401 AssertRC(rc);
402
403 /* @todo triggers assertion in MMHyperFree */
404#if 0
405 for(int i=0;i<CSAM_PAGEBMP_CHUNKS;i++)
406 {
407 if (pVM->csam.s.pPDBitmapHC[i])
408 MMHyperFree(pVM, pVM->csam.s.pPDBitmapHC[i]);
409 }
410#endif
411
412 return VINF_SUCCESS;
413}
414
415/**
416 * CSAM reset callback.
417 *
418 * @returns VBox status code.
419 * @param pVM The VM which is reset.
420 */
421VMMR3_INT_DECL(int) CSAMR3Reset(PVM pVM)
422{
423 /* Clear page bitmaps. */
424 for(int i=0;i<CSAM_PGDIRBMP_CHUNKS;i++)
425 {
426 if (pVM->csam.s.pPDBitmapHC[i])
427 {
428 Assert((CSAM_PAGE_BITMAP_SIZE& 3) == 0);
429 ASMMemZero32(pVM->csam.s.pPDBitmapHC[i], CSAM_PAGE_BITMAP_SIZE);
430 }
431 }
432
433 /* Remove all CSAM page records. */
434 while(true)
435 {
436 PCSAMPAGEREC pPageRec = (PCSAMPAGEREC)RTAvlPVGetBestFit(&pVM->csam.s.pPageTree, 0, true);
437 if (pPageRec)
438 {
439 csamRemovePageRecord(pVM, pPageRec->page.pPageGC);
440 }
441 else
442 break;
443 }
444 Assert(!pVM->csam.s.pPageTree);
445
446 csamReinit(pVM);
447
448 return VINF_SUCCESS;
449}
450
451
452/**
453 * Callback function for RTAvlPVDoWithAll
454 *
455 * Counts the number of records in the tree
456 *
457 * @returns VBox status code.
458 * @param pNode Current node
459 * @param pcPatches Pointer to patch counter
460 */
461static DECLCALLBACK(int) CountRecord(PAVLPVNODECORE pNode, void *pcPatches)
462{
463 NOREF(pNode);
464 *(uint32_t *)pcPatches = *(uint32_t *)pcPatches + 1;
465 return VINF_SUCCESS;
466}
467
468/**
469 * Callback function for RTAvlPVDoWithAll
470 *
471 * Saves the state of the page record
472 *
473 * @returns VBox status code.
474 * @param pNode Current node
475 * @param pVM1 Pointer to the VM
476 */
477static DECLCALLBACK(int) SavePageState(PAVLPVNODECORE pNode, void *pVM1)
478{
479 PVM pVM = (PVM)pVM1;
480 PCSAMPAGEREC pPage = (PCSAMPAGEREC)pNode;
481 CSAMPAGEREC page = *pPage;
482 PSSMHANDLE pSSM = pVM->csam.s.savedstate.pSSM;
483 int rc;
484
485 /* Save the page record itself */
486 rc = SSMR3PutMem(pSSM, &page, sizeof(page));
487 AssertRCReturn(rc, rc);
488
489 if (page.page.pBitmap)
490 {
491 rc = SSMR3PutMem(pSSM, page.page.pBitmap, CSAM_PAGE_BITMAP_SIZE);
492 AssertRCReturn(rc, rc);
493 }
494
495 return VINF_SUCCESS;
496}
497
498/**
499 * Execute state save operation.
500 *
501 * @returns VBox status code.
502 * @param pVM Pointer to the VM.
503 * @param pSSM SSM operation handle.
504 */
505static DECLCALLBACK(int) csamr3Save(PVM pVM, PSSMHANDLE pSSM)
506{
507 CSAM csamInfo = pVM->csam.s;
508 int rc;
509
510 /*
511 * Count the number of page records in the tree (feeling lazy)
512 */
513 csamInfo.savedstate.cPageRecords = 0;
514 RTAvlPVDoWithAll(&pVM->csam.s.pPageTree, true, CountRecord, &csamInfo.savedstate.cPageRecords);
515
516 /*
517 * Save CSAM structure
518 */
519 pVM->csam.s.savedstate.pSSM = pSSM;
520 rc = SSMR3PutMem(pSSM, &csamInfo, sizeof(csamInfo));
521 AssertRCReturn(rc, rc);
522
523 /* Save pgdir bitmap */
524 rc = SSMR3PutMem(pSSM, csamInfo.pPDBitmapHC, CSAM_PGDIRBMP_CHUNKS*sizeof(RTHCPTR));
525 AssertRCReturn(rc, rc);
526
527 for (unsigned i=0;i<CSAM_PGDIRBMP_CHUNKS;i++)
528 {
529 if(csamInfo.pPDBitmapHC[i])
530 {
531 /* Save the page bitmap. */
532 rc = SSMR3PutMem(pSSM, csamInfo.pPDBitmapHC[i], CSAM_PAGE_BITMAP_SIZE);
533 AssertRCReturn(rc, rc);
534 }
535 }
536
537 /*
538 * Save page records
539 */
540 rc = RTAvlPVDoWithAll(&pVM->csam.s.pPageTree, true, SavePageState, pVM);
541 AssertRCReturn(rc, rc);
542
543 /** @note we don't restore aDangerousInstr; it will be recreated automatically. */
544 return VINF_SUCCESS;
545}
546
547/**
548 * Execute state load operation.
549 *
550 * @returns VBox status code.
551 * @param pVM Pointer to the VM.
552 * @param pSSM SSM operation handle.
553 * @param uVersion Data layout version.
554 * @param uPass The data pass.
555 */
556static DECLCALLBACK(int) csamr3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
557{
558 int rc;
559 CSAM csamInfo;
560
561 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
562 if (uVersion != CSAM_SSM_VERSION)
563 {
564 AssertMsgFailed(("csamR3Load: Invalid version uVersion=%d!\n", uVersion));
565 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
566 }
567
568 pVM->csam.s.savedstate.pSSM = pSSM;
569
570 /*
571 * Restore CSAM structure
572 */
573#if 0
574 rc = SSMR3GetMem(pSSM, &csamInfo, sizeof(csamInfo));
575#else
576 RT_ZERO(csamInfo);
577 rc = SSMR3GetStructEx(pSSM, &csamInfo, sizeof(csamInfo), SSMSTRUCT_FLAGS_MEM_BAND_AID, &g_aCsamFields[0], NULL);
578#endif
579 AssertRCReturn(rc, rc);
580
581 pVM->csam.s.fGatesChecked = csamInfo.fGatesChecked;
582 pVM->csam.s.fScanningStarted = csamInfo.fScanningStarted;
583
584 /* Restore dirty code page info. */
585 pVM->csam.s.cDirtyPages = csamInfo.cDirtyPages;
586 memcpy(pVM->csam.s.pvDirtyBasePage, csamInfo.pvDirtyBasePage, sizeof(pVM->csam.s.pvDirtyBasePage));
587 memcpy(pVM->csam.s.pvDirtyFaultPage, csamInfo.pvDirtyFaultPage, sizeof(pVM->csam.s.pvDirtyFaultPage));
588
589 /* Restore possible code page */
590 pVM->csam.s.cPossibleCodePages = csamInfo.cPossibleCodePages;
591 memcpy(pVM->csam.s.pvPossibleCodePage, csamInfo.pvPossibleCodePage, sizeof(pVM->csam.s.pvPossibleCodePage));
592
593 /* Restore pgdir bitmap (we'll change the pointers next). */
594#if 0
595 rc = SSMR3GetMem(pSSM, pVM->csam.s.pPDBitmapHC, CSAM_PGDIRBMP_CHUNKS*sizeof(RTHCPTR));
596#else
597 rc = SSMR3GetStructEx(pSSM, pVM->csam.s.pPDBitmapHC, sizeof(uint8_t *) * CSAM_PGDIRBMP_CHUNKS,
598 SSMSTRUCT_FLAGS_MEM_BAND_AID, &g_aCsamPDBitmapArray[0], NULL);
599#endif
600 AssertRCReturn(rc, rc);
601
602 /*
603 * Restore page bitmaps
604 */
605 for (unsigned i=0;i<CSAM_PGDIRBMP_CHUNKS;i++)
606 {
607 if(pVM->csam.s.pPDBitmapHC[i])
608 {
609 rc = MMHyperAlloc(pVM, CSAM_PAGE_BITMAP_SIZE, 0, MM_TAG_CSAM, (void **)&pVM->csam.s.pPDBitmapHC[i]);
610 if (RT_FAILURE(rc))
611 {
612 Log(("MMHyperAlloc failed with %Rrc\n", rc));
613 return rc;
614 }
615 /* Convert to GC pointer. */
616 pVM->csam.s.pPDGCBitmapHC[i] = MMHyperR3ToRC(pVM, pVM->csam.s.pPDBitmapHC[i]);
617 Assert(pVM->csam.s.pPDGCBitmapHC[i]);
618
619 /* Restore the bitmap. */
620 rc = SSMR3GetMem(pSSM, pVM->csam.s.pPDBitmapHC[i], CSAM_PAGE_BITMAP_SIZE);
621 AssertRCReturn(rc, rc);
622 }
623 else
624 {
625 Assert(!pVM->csam.s.pPDGCBitmapHC[i]);
626 pVM->csam.s.pPDGCBitmapHC[i] = 0;
627 }
628 }
629
630 /*
631 * Restore page records
632 */
633 for (uint32_t i=0;i<csamInfo.savedstate.cPageRecords + csamInfo.savedstate.cPatchPageRecords;i++)
634 {
635 CSAMPAGEREC page;
636 PCSAMPAGE pPage;
637
638#if 0
639 rc = SSMR3GetMem(pSSM, &page, sizeof(page));
640#else
641 RT_ZERO(page);
642 rc = SSMR3GetStructEx(pSSM, &page, sizeof(page), SSMSTRUCT_FLAGS_MEM_BAND_AID, &g_aCsamPageRecFields[0], NULL);
643#endif
644 AssertRCReturn(rc, rc);
645
646 /*
647 * Recreate the page record
648 */
649 pPage = csamCreatePageRecord(pVM, page.page.pPageGC, page.page.enmTag, page.page.fCode32, page.page.fMonitorInvalidation);
650 AssertReturn(pPage, VERR_NO_MEMORY);
651
652 pPage->GCPhys = page.page.GCPhys;
653 pPage->fFlags = page.page.fFlags;
654 pPage->u64Hash = page.page.u64Hash;
655
656 if (page.page.pBitmap)
657 {
658 rc = SSMR3GetMem(pSSM, pPage->pBitmap, CSAM_PAGE_BITMAP_SIZE);
659 AssertRCReturn(rc, rc);
660 }
661 else
662 {
663 MMR3HeapFree(pPage->pBitmap);
664 pPage->pBitmap = 0;
665 }
666 }
667
668 /* Note: we don't restore aDangerousInstr; it will be recreated automatically. */
669 memset(&pVM->csam.s.aDangerousInstr, 0, sizeof(pVM->csam.s.aDangerousInstr));
670 pVM->csam.s.cDangerousInstr = 0;
671 pVM->csam.s.iDangerousInstr = 0;
672 return VINF_SUCCESS;
673}
674
675/**
676 * Convert guest context address to host context pointer
677 *
678 * @returns Byte pointer (ring-3 context) corresponding to pGCPtr on success,
679 * NULL on failure.
680 * @param pVM Pointer to the VM.
681 * @param pCacheRec Address conversion cache record
682 * @param pGCPtr Guest context pointer
683 * @returns Host context pointer or NULL in case of an error
684 *
685 */
686static uint8_t *csamR3GCVirtToHCVirt(PVM pVM, PCSAMP2GLOOKUPREC pCacheRec, RCPTRTYPE(uint8_t *) pGCPtr)
687{
688 int rc;
689 void *pHCPtr;
690 Assert(pVM->cCpus == 1);
691 PVMCPU pVCpu = VMMGetCpu0(pVM);
692
693 STAM_PROFILE_START(&pVM->csam.s.StatTimeAddrConv, a);
694
695 pHCPtr = PATMR3GCPtrToHCPtr(pVM, pGCPtr);
696 if (pHCPtr)
697 return (uint8_t *)pHCPtr;
698
699 if (pCacheRec->pPageLocStartHC)
700 {
701 uint32_t offset = pGCPtr & PAGE_OFFSET_MASK;
702 if (pCacheRec->pGuestLoc == (pGCPtr & PAGE_BASE_GC_MASK))
703 {
704 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeAddrConv, a);
705 return pCacheRec->pPageLocStartHC + offset;
706 }
707 }
708
709 /* Release previous lock if any. */
710 if (pCacheRec->Lock.pvMap)
711 {
712 PGMPhysReleasePageMappingLock(pVM, &pCacheRec->Lock);
713 pCacheRec->Lock.pvMap = NULL;
714 }
715
716 rc = PGMPhysGCPtr2CCPtrReadOnly(pVCpu, pGCPtr, (const void **)&pHCPtr, &pCacheRec->Lock);
717 if (rc != VINF_SUCCESS)
718 {
719//// AssertMsgRC(rc, ("MMR3PhysGCVirt2HCVirtEx failed for %RRv\n", pGCPtr));
720 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeAddrConv, a);
721 return NULL;
722 }
723
724 pCacheRec->pPageLocStartHC = (uint8_t*)((uintptr_t)pHCPtr & PAGE_BASE_HC_MASK);
725 pCacheRec->pGuestLoc = pGCPtr & PAGE_BASE_GC_MASK;
726 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeAddrConv, a);
727 return (uint8_t *)pHCPtr;
728}
729
730
731/** For csamR3ReadBytes. */
732typedef struct CSAMDISINFO
733{
734 PVM pVM;
735 uint8_t const *pbSrcInstr; /* aka pInstHC */
736} CSAMDISINFO, *PCSAMDISINFO;
737
738
739/**
740 * @callback_method_impl{FNDISREADBYTES}
741 */
742static DECLCALLBACK(int) csamR3ReadBytes(PDISCPUSTATE pDis, uint8_t offInstr, uint8_t cbMinRead, uint8_t cbMaxRead)
743{
744 PCSAMDISINFO pDisInfo = (PCSAMDISINFO)pDis->pvUser;
745
746 /*
747 * We are not interested in patched instructions, so read the original opcode bytes.
748 *
749 * Note! single instruction patches (int3) are checked in CSAMR3AnalyseCallback
750 *
751 * Since we're decoding one instruction at the time, we don't need to be
752 * concerned about any patched instructions following the first one. We
753 * could in fact probably skip this PATM call for offInstr != 0.
754 */
755 size_t cbRead = cbMaxRead;
756 RTUINTPTR uSrcAddr = pDis->uInstrAddr + offInstr;
757 int rc = PATMR3ReadOrgInstr(pDisInfo->pVM, pDis->uInstrAddr + offInstr, &pDis->abInstr[offInstr], cbRead, &cbRead);
758 if (RT_SUCCESS(rc))
759 {
760 if (cbRead >= cbMinRead)
761 {
762 pDis->cbCachedInstr = offInstr + (uint8_t)cbRead;
763 return rc;
764 }
765
766 cbMinRead -= (uint8_t)cbRead;
767 cbMaxRead -= (uint8_t)cbRead;
768 offInstr += (uint8_t)cbRead;
769 uSrcAddr += cbRead;
770 }
771
772 /*
773 * The current byte isn't a patch instruction byte.
774 */
775 AssertPtr(pDisInfo->pbSrcInstr);
776 if ((pDis->uInstrAddr >> PAGE_SHIFT) == ((uSrcAddr + cbMaxRead - 1) >> PAGE_SHIFT))
777 {
778 memcpy(&pDis->abInstr[offInstr], &pDisInfo->pbSrcInstr[offInstr], cbMaxRead);
779 offInstr += cbMaxRead;
780 rc = VINF_SUCCESS;
781 }
782 else if ( (pDis->uInstrAddr >> PAGE_SHIFT) == ((uSrcAddr + cbMinRead - 1) >> PAGE_SHIFT)
783 || PATMIsPatchGCAddr(pDisInfo->pVM, uSrcAddr) /** @todo does CSAM actually analyze patch code, or is this just a copy&past check? */
784 )
785 {
786 memcpy(&pDis->abInstr[offInstr], &pDisInfo->pbSrcInstr[offInstr], cbMinRead);
787 offInstr += cbMinRead;
788 rc = VINF_SUCCESS;
789 }
790 else
791 {
792 /* Crossed page boundrary, pbSrcInstr is no good... */
793 rc = PGMPhysSimpleReadGCPtr(VMMGetCpu0(pDisInfo->pVM), &pDis->abInstr[offInstr], uSrcAddr, cbMinRead);
794 offInstr += cbMinRead;
795 }
796
797 pDis->cbCachedInstr = offInstr;
798 return rc;
799}
800
801DECLINLINE(int) csamR3DISInstr(PVM pVM, RTRCPTR InstrGC, uint8_t *InstrHC, DISCPUMODE enmCpuMode,
802 PDISCPUSTATE pCpu, uint32_t *pcbInstr, char *pszOutput, size_t cbOutput)
803{
804 CSAMDISINFO DisInfo = { pVM, InstrHC };
805#ifdef DEBUG
806 return DISInstrToStrEx(InstrGC, enmCpuMode, csamR3ReadBytes, &DisInfo, DISOPTYPE_ALL,
807 pCpu, pcbInstr, pszOutput, cbOutput);
808#else
809 /* We are interested in everything except harmless stuff */
810 if (pszOutput)
811 return DISInstrToStrEx(InstrGC, enmCpuMode, csamR3ReadBytes, &DisInfo,
812 ~(DISOPTYPE_INVALID | DISOPTYPE_HARMLESS | DISOPTYPE_RRM_MASK),
813 pCpu, pcbInstr, pszOutput, cbOutput);
814 return DISInstrEx(InstrGC, enmCpuMode, ~(DISOPTYPE_INVALID | DISOPTYPE_HARMLESS | DISOPTYPE_RRM_MASK),
815 csamR3ReadBytes, &DisInfo, pCpu, pcbInstr);
816#endif
817}
818
819/**
820 * Analyses the instructions following the cli for compliance with our heuristics for cli
821 *
822 * @returns VBox status code.
823 * @param pVM Pointer to the VM.
824 * @param pCpu CPU disassembly state
825 * @param pInstrGC Guest context pointer to privileged instruction
826 * @param pCurInstrGC Guest context pointer to the current instruction
827 * @param pCacheRec GC to HC cache record
828 * @param pUserData User pointer (callback specific)
829 *
830 */
831static int CSAMR3AnalyseCallback(PVM pVM, DISCPUSTATE *pCpu, RCPTRTYPE(uint8_t *) pInstrGC, RCPTRTYPE(uint8_t *) pCurInstrGC,
832 PCSAMP2GLOOKUPREC pCacheRec, void *pUserData)
833{
834 PCSAMPAGE pPage = (PCSAMPAGE)pUserData;
835 int rc;
836 NOREF(pInstrGC);
837
838 switch (pCpu->pCurInstr->uOpcode)
839 {
840 case OP_INT:
841 Assert(pCpu->Param1.fUse & DISUSE_IMMEDIATE8);
842 if (pCpu->Param1.uValue == 3)
843 {
844 //two byte int 3
845 return VINF_SUCCESS;
846 }
847 break;
848
849 /* removing breaks win2k guests? */
850 case OP_IRET:
851#ifdef VBOX_WITH_RAW_RING1
852 if (EMIsRawRing1Enabled(pVM))
853 break;
854#endif
855 /* no break */
856
857 case OP_ILLUD2:
858 /* This appears to be some kind of kernel panic in Linux 2.4; no point to continue. */
859 case OP_RETN:
860 case OP_INT3:
861 case OP_INVALID:
862 return VINF_SUCCESS;
863 }
864
865 // Check for exit points
866 switch (pCpu->pCurInstr->uOpcode)
867 {
868 /* It's not a good idea to patch pushf instructions:
869 * - increases the chance of conflicts (code jumping to the next instruction)
870 * - better to patch the cli
871 * - code that branches before the cli will likely hit an int 3
872 * - in general doesn't offer any benefits as we don't allow nested patch blocks (IF is always 1)
873 */
874 case OP_PUSHF:
875 case OP_POPF:
876 break;
877
878 case OP_CLI:
879 {
880 uint32_t cbInstrs = 0;
881 uint32_t cbCurInstr = pCpu->cbInstr;
882 bool fCode32 = pPage->fCode32;
883
884 Assert(fCode32);
885
886 PATMR3AddHint(pVM, pCurInstrGC, (fCode32) ? PATMFL_CODE32 : 0);
887
888 /* Make sure the instructions that follow the cli have not been encountered before. */
889 while (true)
890 {
891 DISCPUSTATE cpu;
892
893 if (cbInstrs + cbCurInstr >= SIZEOF_NEARJUMP32)
894 break;
895
896 if (csamIsCodeScanned(pVM, pCurInstrGC + cbCurInstr, &pPage) == true)
897 {
898 /* We've scanned the next instruction(s) already. This means we've
899 followed a branch that ended up there before -> dangerous!! */
900 PATMR3DetectConflict(pVM, pCurInstrGC, pCurInstrGC + cbCurInstr);
901 break;
902 }
903 pCurInstrGC += cbCurInstr;
904 cbInstrs += cbCurInstr;
905
906 { /* Force pCurInstrHC out of scope after we stop using it (page lock!) */
907 uint8_t *pCurInstrHC = csamR3GCVirtToHCVirt(pVM, pCacheRec, pCurInstrGC);
908 if (pCurInstrHC == NULL)
909 {
910 Log(("csamR3GCVirtToHCVirt failed for %RRv\n", pCurInstrGC));
911 break;
912 }
913 Assert(VALID_PTR(pCurInstrHC));
914
915 rc = csamR3DISInstr(pVM, pCurInstrGC, pCurInstrHC, (fCode32) ? DISCPUMODE_32BIT : DISCPUMODE_16BIT,
916 &cpu, &cbCurInstr, NULL, 0);
917 }
918 AssertRC(rc);
919 if (RT_FAILURE(rc))
920 break;
921 }
922 break;
923 }
924
925#ifdef VBOX_WITH_RAW_RING1
926 case OP_MOV:
927 /* mov xx, CS is a dangerous instruction as our raw ring usage leaks through. */
928 if ( EMIsRawRing1Enabled(pVM)
929 && (pCpu->Param2.fUse & DISUSE_REG_SEG)
930 && (pCpu->Param2.Base.idxSegReg == DISSELREG_CS))
931 {
932 Log(("CSAM: Patching dangerous 'mov xx, cs' instruction at %RGv with an int3\n", pCurInstrGC));
933 if (PATMR3HasBeenPatched(pVM, pCurInstrGC) == false)
934 {
935 rc = PATMR3InstallPatch(pVM, pCurInstrGC, (pPage->fCode32) ? PATMFL_CODE32 : 0);
936 if (RT_FAILURE(rc))
937 {
938 Log(("PATMR3InstallPatch failed with %d\n", rc));
939 return VWRN_CONTINUE_ANALYSIS;
940 }
941 }
942 return VWRN_CONTINUE_ANALYSIS;
943 }
944 break;
945#endif
946
947 case OP_PUSH:
948 /** @todo broken comparison!! should be if ((pCpu->Param1.fUse & DISUSE_REG_SEG) && (pCpu->Param1.Base.idxSegReg == DISSELREG_SS)) */
949 if (pCpu->pCurInstr->fParam1 != OP_PARM_REG_CS)
950 break;
951
952 /* no break */
953#ifndef VBOX_WITH_SAFE_STR
954 case OP_STR:
955#endif
956 case OP_LSL:
957 case OP_LAR:
958 case OP_SGDT:
959 case OP_SLDT:
960 case OP_SIDT:
961 case OP_SMSW:
962 case OP_VERW:
963 case OP_VERR:
964 case OP_CPUID:
965 case OP_IRET:
966#ifdef DEBUG
967 switch(pCpu->pCurInstr->uOpcode)
968 {
969 case OP_STR:
970 Log(("Privileged instruction at %RRv: str!!\n", pCurInstrGC));
971 break;
972 case OP_LSL:
973 Log(("Privileged instruction at %RRv: lsl!!\n", pCurInstrGC));
974 break;
975 case OP_LAR:
976 Log(("Privileged instruction at %RRv: lar!!\n", pCurInstrGC));
977 break;
978 case OP_SGDT:
979 Log(("Privileged instruction at %RRv: sgdt!!\n", pCurInstrGC));
980 break;
981 case OP_SLDT:
982 Log(("Privileged instruction at %RRv: sldt!!\n", pCurInstrGC));
983 break;
984 case OP_SIDT:
985 Log(("Privileged instruction at %RRv: sidt!!\n", pCurInstrGC));
986 break;
987 case OP_SMSW:
988 Log(("Privileged instruction at %RRv: smsw!!\n", pCurInstrGC));
989 break;
990 case OP_VERW:
991 Log(("Privileged instruction at %RRv: verw!!\n", pCurInstrGC));
992 break;
993 case OP_VERR:
994 Log(("Privileged instruction at %RRv: verr!!\n", pCurInstrGC));
995 break;
996 case OP_CPUID:
997 Log(("Privileged instruction at %RRv: cpuid!!\n", pCurInstrGC));
998 break;
999 case OP_PUSH:
1000 Log(("Privileged instruction at %RRv: push cs!!\n", pCurInstrGC));
1001 break;
1002 case OP_IRET:
1003 Log(("Privileged instruction at %RRv: iret!!\n", pCurInstrGC));
1004 break;
1005 }
1006#endif
1007
1008 if (PATMR3HasBeenPatched(pVM, pCurInstrGC) == false)
1009 {
1010 rc = PATMR3InstallPatch(pVM, pCurInstrGC, (pPage->fCode32) ? PATMFL_CODE32 : 0);
1011 if (RT_FAILURE(rc))
1012 {
1013 Log(("PATMR3InstallPatch failed with %d\n", rc));
1014 return VWRN_CONTINUE_ANALYSIS;
1015 }
1016 }
1017 if (pCpu->pCurInstr->uOpcode == OP_IRET)
1018 return VINF_SUCCESS; /* Look no further in this branch. */
1019
1020 return VWRN_CONTINUE_ANALYSIS;
1021
1022 case OP_JMP:
1023 case OP_CALL:
1024 {
1025 // return or jump/call through a jump table
1026 if (OP_PARM_VTYPE(pCpu->pCurInstr->fParam1) != OP_PARM_J)
1027 {
1028#ifdef DEBUG
1029 switch(pCpu->pCurInstr->uOpcode)
1030 {
1031 case OP_JMP:
1032 Log(("Control Flow instruction at %RRv: jmp!!\n", pCurInstrGC));
1033 break;
1034 case OP_CALL:
1035 Log(("Control Flow instruction at %RRv: call!!\n", pCurInstrGC));
1036 break;
1037 }
1038#endif
1039 return VWRN_CONTINUE_ANALYSIS;
1040 }
1041 return VWRN_CONTINUE_ANALYSIS;
1042 }
1043
1044 }
1045
1046 return VWRN_CONTINUE_ANALYSIS;
1047}
1048
1049#ifdef CSAM_ANALYSE_BEYOND_RET
1050/**
1051 * Wrapper for csamAnalyseCodeStream for call instructions.
1052 *
1053 * @returns VBox status code.
1054 * @param pVM Pointer to the VM.
1055 * @param pInstrGC Guest context pointer to privileged instruction
1056 * @param pCurInstrGC Guest context pointer to the current instruction
1057 * @param fCode32 16 or 32 bits code
1058 * @param pfnCSAMR3Analyse Callback for testing the disassembled instruction
1059 * @param pUserData User pointer (callback specific)
1060 *
1061 */
1062static int csamAnalyseCallCodeStream(PVM pVM, RCPTRTYPE(uint8_t *) pInstrGC, RCPTRTYPE(uint8_t *) pCurInstrGC, bool fCode32,
1063 PFN_CSAMR3ANALYSE pfnCSAMR3Analyse, void *pUserData, PCSAMP2GLOOKUPREC pCacheRec)
1064{
1065 int rc;
1066 CSAMCALLEXITREC CallExitRec;
1067 PCSAMCALLEXITREC pOldCallRec;
1068 PCSAMPAGE pPage = 0;
1069 uint32_t i;
1070
1071 CallExitRec.cInstrAfterRet = 0;
1072
1073 pOldCallRec = pCacheRec->pCallExitRec;
1074 pCacheRec->pCallExitRec = &CallExitRec;
1075
1076 rc = csamAnalyseCodeStream(pVM, pInstrGC, pCurInstrGC, fCode32, pfnCSAMR3Analyse, pUserData, pCacheRec);
1077
1078 for (i=0;i<CallExitRec.cInstrAfterRet;i++)
1079 {
1080 PCSAMPAGE pPage = 0;
1081
1082 pCurInstrGC = CallExitRec.pInstrAfterRetGC[i];
1083
1084 /* Check if we've previously encountered the instruction after the ret. */
1085 if (csamIsCodeScanned(pVM, pCurInstrGC, &pPage) == false)
1086 {
1087 DISCPUSTATE cpu;
1088 uint32_t cbInstr;
1089 int rc2;
1090#ifdef DEBUG
1091 char szOutput[256];
1092#endif
1093 if (pPage == NULL)
1094 {
1095 /* New address; let's take a look at it. */
1096 pPage = csamCreatePageRecord(pVM, pCurInstrGC, CSAM_TAG_CSAM, fCode32);
1097 if (pPage == NULL)
1098 {
1099 rc = VERR_NO_MEMORY;
1100 goto done;
1101 }
1102 }
1103
1104 /**
1105 * Some generic requirements for recognizing an adjacent function:
1106 * - alignment fillers that consist of:
1107 * - nop
1108 * - lea genregX, [genregX (+ 0)]
1109 * - push ebp after the filler (can extend this later); aligned at at least a 4 byte boundary
1110 */
1111 for (int j = 0; j < 16; j++)
1112 {
1113 uint8_t *pCurInstrHC = csamR3GCVirtToHCVirt(pVM, pCacheRec, pCurInstrGC);
1114 if (pCurInstrHC == NULL)
1115 {
1116 Log(("csamR3GCVirtToHCVirt failed for %RRv\n", pCurInstrGC));
1117 goto done;
1118 }
1119 Assert(VALID_PTR(pCurInstrHC));
1120
1121 STAM_PROFILE_START(&pVM->csam.s.StatTimeDisasm, a);
1122#ifdef DEBUG
1123 rc2 = csamR3DISInstr(pVM, pCurInstrGC, pCurInstrHC, (fCode32) ? DISCPUMODE_32BIT : DISCPUMODE_16BIT,
1124 &cpu, &cbInstr, szOutput, sizeof(szOutput));
1125 if (RT_SUCCESS(rc2)) Log(("CSAM Call Analysis: %s", szOutput));
1126#else
1127 rc2 = csamR3DISInstr(pVM, pCurInstrGC, pCurInstrHC, (fCode32) ? DISCPUMODE_32BIT : DISCPUMODE_16BIT,
1128 &cpu, &cbInstr, NULL, 0);
1129#endif
1130 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeDisasm, a);
1131 if (RT_FAILURE(rc2))
1132 {
1133 Log(("Disassembly failed at %RRv with %Rrc (probably page not present) -> return to caller\n", pCurInstrGC, rc2));
1134 goto done;
1135 }
1136
1137 STAM_COUNTER_ADD(&pVM->csam.s.StatNrBytesRead, cbInstr);
1138
1139 RCPTRTYPE(uint8_t *) addr = 0;
1140 PCSAMPAGE pJmpPage = NULL;
1141
1142 if (PAGE_ADDRESS(pCurInstrGC) != PAGE_ADDRESS(pCurInstrGC + cbInstr - 1))
1143 {
1144 if (!PGMGstIsPagePresent(pVM, pCurInstrGC + cbInstr - 1))
1145 {
1146 /// @todo fault in the page
1147 Log(("Page for current instruction %RRv is not present!!\n", pCurInstrGC));
1148 goto done;
1149 }
1150 //all is fine, let's continue
1151 csamR3CheckPageRecord(pVM, pCurInstrGC + cbInstr - 1);
1152 }
1153
1154 switch (cpu.pCurInstr->uOpcode)
1155 {
1156 case OP_NOP:
1157 case OP_INT3:
1158 break; /* acceptable */
1159
1160 case OP_LEA:
1161 /* Must be similar to:
1162 *
1163 * lea esi, [esi]
1164 * lea esi, [esi+0]
1165 * Any register is allowed as long as source and destination are identical.
1166 */
1167 if ( cpu.Param1.fUse != DISUSE_REG_GEN32
1168 || ( cpu.Param2.flags != DISUSE_REG_GEN32
1169 && ( !(cpu.Param2.flags & DISUSE_REG_GEN32)
1170 || !(cpu.Param2.flags & (DISUSE_DISPLACEMENT8|DISUSE_DISPLACEMENT16|DISUSE_DISPLACEMENT32))
1171 || cpu.Param2.uValue != 0
1172 )
1173 )
1174 || cpu.Param1.base.reg_gen32 != cpu.Param2.base.reg_gen32
1175 )
1176 {
1177 STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunctionFailed);
1178 goto next_function;
1179 }
1180 break;
1181
1182 case OP_PUSH:
1183 {
1184 if ( (pCurInstrGC & 0x3) != 0
1185 || cpu.Param1.fUse != DISUSE_REG_GEN32
1186 || cpu.Param1.base.reg_gen32 != USE_REG_EBP
1187 )
1188 {
1189 STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunctionFailed);
1190 goto next_function;
1191 }
1192
1193 if (csamIsCodeScanned(pVM, pCurInstrGC, &pPage) == false)
1194 {
1195 CSAMCALLEXITREC CallExitRec2;
1196 CallExitRec2.cInstrAfterRet = 0;
1197
1198 pCacheRec->pCallExitRec = &CallExitRec2;
1199
1200 /* Analyse the function. */
1201 Log(("Found new function at %RRv\n", pCurInstrGC));
1202 STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunction);
1203 csamAnalyseCallCodeStream(pVM, pInstrGC, pCurInstrGC, fCode32, pfnCSAMR3Analyse, pUserData, pCacheRec);
1204 }
1205 goto next_function;
1206 }
1207
1208 case OP_SUB:
1209 {
1210 if ( (pCurInstrGC & 0x3) != 0
1211 || cpu.Param1.fUse != DISUSE_REG_GEN32
1212 || cpu.Param1.base.reg_gen32 != USE_REG_ESP
1213 )
1214 {
1215 STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunctionFailed);
1216 goto next_function;
1217 }
1218
1219 if (csamIsCodeScanned(pVM, pCurInstrGC, &pPage) == false)
1220 {
1221 CSAMCALLEXITREC CallExitRec2;
1222 CallExitRec2.cInstrAfterRet = 0;
1223
1224 pCacheRec->pCallExitRec = &CallExitRec2;
1225
1226 /* Analyse the function. */
1227 Log(("Found new function at %RRv\n", pCurInstrGC));
1228 STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunction);
1229 csamAnalyseCallCodeStream(pVM, pInstrGC, pCurInstrGC, fCode32, pfnCSAMR3Analyse, pUserData, pCacheRec);
1230 }
1231 goto next_function;
1232 }
1233
1234 default:
1235 STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunctionFailed);
1236 goto next_function;
1237 }
1238 /* Mark it as scanned. */
1239 csamMarkCode(pVM, pPage, pCurInstrGC, cbInstr, true);
1240 pCurInstrGC += cbInstr;
1241 } /* for at most 16 instructions */
1242next_function:
1243 ; /* MSVC complains otherwise */
1244 }
1245 }
1246done:
1247 pCacheRec->pCallExitRec = pOldCallRec;
1248 return rc;
1249}
1250#else
1251#define csamAnalyseCallCodeStream csamAnalyseCodeStream
1252#endif
1253
1254/**
1255 * Disassembles the code stream until the callback function detects a failure or decides everything is acceptable
1256 *
1257 * @returns VBox status code.
1258 * @param pVM Pointer to the VM.
1259 * @param pInstrGC Guest context pointer to privileged instruction
1260 * @param pCurInstrGC Guest context pointer to the current instruction
1261 * @param fCode32 16 or 32 bits code
1262 * @param pfnCSAMR3Analyse Callback for testing the disassembled instruction
1263 * @param pUserData User pointer (callback specific)
1264 *
1265 */
1266static int csamAnalyseCodeStream(PVM pVM, RCPTRTYPE(uint8_t *) pInstrGC, RCPTRTYPE(uint8_t *) pCurInstrGC, bool fCode32,
1267 PFN_CSAMR3ANALYSE pfnCSAMR3Analyse, void *pUserData, PCSAMP2GLOOKUPREC pCacheRec)
1268{
1269 DISCPUSTATE cpu;
1270 PCSAMPAGE pPage = (PCSAMPAGE)pUserData;
1271 int rc = VWRN_CONTINUE_ANALYSIS;
1272 uint32_t cbInstr;
1273 int rc2;
1274 Assert(pVM->cCpus == 1);
1275 PVMCPU pVCpu = VMMGetCpu0(pVM);
1276
1277#ifdef DEBUG
1278 char szOutput[256];
1279#endif
1280
1281 LogFlow(("csamAnalyseCodeStream: code at %RRv depth=%d\n", pCurInstrGC, pCacheRec->depth));
1282
1283 pVM->csam.s.fScanningStarted = true;
1284
1285 pCacheRec->depth++;
1286 /*
1287 * Limit the call depth. (rather arbitrary upper limit; too low and we won't detect certain
1288 * cpuid instructions in Linux kernels; too high and we waste too much time scanning code)
1289 * (512 is necessary to detect cpuid instructions in Red Hat EL4; see defect 1355)
1290 * @note we are using a lot of stack here. couple of 100k when we go to the full depth (!)
1291 */
1292 if (pCacheRec->depth > 512)
1293 {
1294 LogFlow(("CSAM: maximum calldepth reached for %RRv\n", pCurInstrGC));
1295 pCacheRec->depth--;
1296 return VINF_SUCCESS; //let's not go on forever
1297 }
1298
1299 Assert(!PATMIsPatchGCAddr(pVM, pCurInstrGC));
1300 csamR3CheckPageRecord(pVM, pCurInstrGC);
1301
1302 while(rc == VWRN_CONTINUE_ANALYSIS)
1303 {
1304 if (csamIsCodeScanned(pVM, pCurInstrGC, &pPage) == false)
1305 {
1306 if (pPage == NULL)
1307 {
1308 /* New address; let's take a look at it. */
1309 pPage = csamCreatePageRecord(pVM, pCurInstrGC, CSAM_TAG_CSAM, fCode32);
1310 if (pPage == NULL)
1311 {
1312 rc = VERR_NO_MEMORY;
1313 goto done;
1314 }
1315 }
1316 }
1317 else
1318 {
1319 LogFlow(("Code at %RRv has been scanned before\n", pCurInstrGC));
1320 rc = VINF_SUCCESS;
1321 goto done;
1322 }
1323
1324 { /* Force pCurInstrHC out of scope after we stop using it (page lock!) */
1325 uint8_t *pCurInstrHC = csamR3GCVirtToHCVirt(pVM, pCacheRec, pCurInstrGC);
1326 if (pCurInstrHC == NULL)
1327 {
1328 Log(("csamR3GCVirtToHCVirt failed for %RRv\n", pCurInstrGC));
1329 rc = VERR_PATCHING_REFUSED;
1330 goto done;
1331 }
1332 Assert(VALID_PTR(pCurInstrHC));
1333
1334 STAM_PROFILE_START(&pVM->csam.s.StatTimeDisasm, a);
1335#ifdef DEBUG
1336 rc2 = csamR3DISInstr(pVM, pCurInstrGC, pCurInstrHC, fCode32 ? DISCPUMODE_32BIT : DISCPUMODE_16BIT,
1337 &cpu, &cbInstr, szOutput, sizeof(szOutput));
1338 if (RT_SUCCESS(rc2)) Log(("CSAM Analysis: %s", szOutput));
1339#else
1340 rc2 = csamR3DISInstr(pVM, pCurInstrGC, pCurInstrHC, fCode32 ? DISCPUMODE_32BIT : DISCPUMODE_16BIT,
1341 &cpu, &cbInstr, NULL, 0);
1342#endif
1343 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeDisasm, a);
1344 }
1345 if (RT_FAILURE(rc2))
1346 {
1347 Log(("Disassembly failed at %RRv with %Rrc (probably page not present) -> return to caller\n", pCurInstrGC, rc2));
1348 rc = VINF_SUCCESS;
1349 goto done;
1350 }
1351
1352 STAM_COUNTER_ADD(&pVM->csam.s.StatNrBytesRead, cbInstr);
1353
1354 csamMarkCode(pVM, pPage, pCurInstrGC, cbInstr, true);
1355
1356 RCPTRTYPE(uint8_t *) addr = 0;
1357 PCSAMPAGE pJmpPage = NULL;
1358
1359 if (PAGE_ADDRESS(pCurInstrGC) != PAGE_ADDRESS(pCurInstrGC + cbInstr - 1))
1360 {
1361 if (!PGMGstIsPagePresent(pVCpu, pCurInstrGC + cbInstr - 1))
1362 {
1363 /// @todo fault in the page
1364 Log(("Page for current instruction %RRv is not present!!\n", pCurInstrGC));
1365 rc = VWRN_CONTINUE_ANALYSIS;
1366 goto next_please;
1367 }
1368 //all is fine, let's continue
1369 csamR3CheckPageRecord(pVM, pCurInstrGC + cbInstr - 1);
1370 }
1371 /*
1372 * If it's harmless, then don't bother checking it (the disasm tables had better be accurate!)
1373 */
1374 if ((cpu.pCurInstr->fOpType & ~DISOPTYPE_RRM_MASK) == DISOPTYPE_HARMLESS)
1375 {
1376 AssertMsg(pfnCSAMR3Analyse(pVM, &cpu, pInstrGC, pCurInstrGC, pCacheRec, (void *)pPage) == VWRN_CONTINUE_ANALYSIS, ("Instruction incorrectly marked harmless?!?!?\n"));
1377 rc = VWRN_CONTINUE_ANALYSIS;
1378 goto next_please;
1379 }
1380
1381#ifdef CSAM_ANALYSE_BEYOND_RET
1382 /* Remember the address of the instruction following the ret in case the parent instruction was a call. */
1383 if ( pCacheRec->pCallExitRec
1384 && cpu.pCurInstr->uOpcode == OP_RETN
1385 && pCacheRec->pCallExitRec->cInstrAfterRet < CSAM_MAX_CALLEXIT_RET)
1386 {
1387 pCacheRec->pCallExitRec->pInstrAfterRetGC[pCacheRec->pCallExitRec->cInstrAfterRet] = pCurInstrGC + cbInstr;
1388 pCacheRec->pCallExitRec->cInstrAfterRet++;
1389 }
1390#endif
1391
1392 rc = pfnCSAMR3Analyse(pVM, &cpu, pInstrGC, pCurInstrGC, pCacheRec, (void *)pPage);
1393 if (rc == VINF_SUCCESS)
1394 goto done;
1395
1396 // For our first attempt, we'll handle only simple relative jumps and calls (immediate offset coded in instruction)
1397 if ( ((cpu.pCurInstr->fOpType & DISOPTYPE_CONTROLFLOW) && (OP_PARM_VTYPE(cpu.pCurInstr->fParam1) == OP_PARM_J))
1398 || (cpu.pCurInstr->uOpcode == OP_CALL && cpu.Param1.fUse == DISUSE_DISPLACEMENT32)) /* simple indirect call (call dword ptr [address]) */
1399 {
1400 /* We need to parse 'call dword ptr [address]' type of calls to catch cpuid instructions in some recent Linux distributions (e.g. OpenSuse 10.3) */
1401 if ( cpu.pCurInstr->uOpcode == OP_CALL
1402 && cpu.Param1.fUse == DISUSE_DISPLACEMENT32)
1403 {
1404 addr = 0;
1405 PGMPhysSimpleReadGCPtr(pVCpu, &addr, (RTRCUINTPTR)cpu.Param1.uDisp.i32, sizeof(addr));
1406 }
1407 else
1408 addr = CSAMResolveBranch(&cpu, pCurInstrGC);
1409
1410 if (addr == 0)
1411 {
1412 Log(("We don't support far jumps here!! (%08X)\n", cpu.Param1.fUse));
1413 rc = VINF_SUCCESS;
1414 break;
1415 }
1416 Assert(!PATMIsPatchGCAddr(pVM, addr));
1417
1418 /* If the target address lies in a patch generated jump, then special action needs to be taken. */
1419 PATMR3DetectConflict(pVM, pCurInstrGC, addr);
1420
1421 /* Same page? */
1422 if (PAGE_ADDRESS(addr) != PAGE_ADDRESS(pCurInstrGC ))
1423 {
1424 if (!PGMGstIsPagePresent(pVCpu, addr))
1425 {
1426 Log(("Page for current instruction %RRv is not present!!\n", addr));
1427 rc = VWRN_CONTINUE_ANALYSIS;
1428 goto next_please;
1429 }
1430
1431 /* All is fine, let's continue. */
1432 csamR3CheckPageRecord(pVM, addr);
1433 }
1434
1435 pJmpPage = NULL;
1436 if (csamIsCodeScanned(pVM, addr, &pJmpPage) == false)
1437 {
1438 if (pJmpPage == NULL)
1439 {
1440 /* New branch target; let's take a look at it. */
1441 pJmpPage = csamCreatePageRecord(pVM, addr, CSAM_TAG_CSAM, fCode32);
1442 if (pJmpPage == NULL)
1443 {
1444 rc = VERR_NO_MEMORY;
1445 goto done;
1446 }
1447 Assert(pPage);
1448 }
1449 if (cpu.pCurInstr->uOpcode == OP_CALL)
1450 rc = csamAnalyseCallCodeStream(pVM, pInstrGC, addr, fCode32, pfnCSAMR3Analyse, (void *)pJmpPage, pCacheRec);
1451 else
1452 rc = csamAnalyseCodeStream(pVM, pInstrGC, addr, fCode32, pfnCSAMR3Analyse, (void *)pJmpPage, pCacheRec);
1453
1454 if (rc != VINF_SUCCESS) {
1455 goto done;
1456 }
1457 }
1458 if (cpu.pCurInstr->uOpcode == OP_JMP)
1459 {//unconditional jump; return to caller
1460 rc = VINF_SUCCESS;
1461 goto done;
1462 }
1463
1464 rc = VWRN_CONTINUE_ANALYSIS;
1465 } //if ((cpu.pCurInstr->fOpType & DISOPTYPE_CONTROLFLOW) && (OP_PARM_VTYPE(cpu.pCurInstr->fParam1) == OP_PARM_J))
1466#ifdef CSAM_SCAN_JUMP_TABLE
1467 else
1468 if ( cpu.pCurInstr->uOpcode == OP_JMP
1469 && (cpu.Param1.fUse & (DISUSE_DISPLACEMENT32|DISUSE_INDEX|DISUSE_SCALE)) == (DISUSE_DISPLACEMENT32|DISUSE_INDEX|DISUSE_SCALE)
1470 )
1471 {
1472 RTRCPTR pJumpTableGC = (RTRCPTR)cpu.Param1.disp32;
1473 uint8_t *pJumpTableHC;
1474 int rc2;
1475
1476 Log(("Jump through jump table\n"));
1477
1478 rc2 = PGMPhysGCPtr2CCPtrReadOnly(pVCpu, pJumpTableGC, (PRTHCPTR)&pJumpTableHC, missing page lock);
1479 if (rc2 == VINF_SUCCESS)
1480 {
1481 for (uint32_t i=0;i<2;i++)
1482 {
1483 uint64_t fFlags;
1484
1485 addr = pJumpTableGC + cpu.Param1.scale * i;
1486 /* Same page? */
1487 if (PAGE_ADDRESS(addr) != PAGE_ADDRESS(pJumpTableGC))
1488 break;
1489
1490 addr = *(RTRCPTR *)(pJumpTableHC + cpu.Param1.scale * i);
1491
1492 rc2 = PGMGstGetPage(pVCpu, addr, &fFlags, NULL);
1493 if ( rc2 != VINF_SUCCESS
1494 || (fFlags & X86_PTE_US)
1495 || !(fFlags & X86_PTE_P)
1496 )
1497 break;
1498
1499 Log(("Jump to %RRv\n", addr));
1500
1501 pJmpPage = NULL;
1502 if (csamIsCodeScanned(pVM, addr, &pJmpPage) == false)
1503 {
1504 if (pJmpPage == NULL)
1505 {
1506 /* New branch target; let's take a look at it. */
1507 pJmpPage = csamCreatePageRecord(pVM, addr, CSAM_TAG_CSAM, fCode32);
1508 if (pJmpPage == NULL)
1509 {
1510 rc = VERR_NO_MEMORY;
1511 goto done;
1512 }
1513 Assert(pPage);
1514 }
1515 rc = csamAnalyseCodeStream(pVM, pInstrGC, addr, fCode32, pfnCSAMR3Analyse, (void *)pJmpPage, pCacheRec);
1516 if (rc != VINF_SUCCESS) {
1517 goto done;
1518 }
1519 }
1520 }
1521 }
1522 }
1523#endif
1524 if (rc != VWRN_CONTINUE_ANALYSIS) {
1525 break; //done!
1526 }
1527next_please:
1528 if (cpu.pCurInstr->uOpcode == OP_JMP)
1529 {
1530 rc = VINF_SUCCESS;
1531 goto done;
1532 }
1533 pCurInstrGC += cbInstr;
1534 }
1535done:
1536 pCacheRec->depth--;
1537 return rc;
1538}
1539
1540
1541/**
1542 * Calculates the 64 bits hash value for the current page
1543 *
1544 * @returns hash value
1545 * @param pVM Pointer to the VM.
1546 * @param pInstr Page address
1547 */
1548uint64_t csamR3CalcPageHash(PVM pVM, RTRCPTR pInstr)
1549{
1550 uint64_t hash = 0;
1551 uint32_t val[5];
1552 int rc;
1553 Assert(pVM->cCpus == 1);
1554 PVMCPU pVCpu = VMMGetCpu0(pVM);
1555
1556 Assert((pInstr & PAGE_OFFSET_MASK) == 0);
1557
1558 rc = PGMPhysSimpleReadGCPtr(pVCpu, &val[0], pInstr, sizeof(val[0]));
1559 AssertMsg(RT_SUCCESS(rc) || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1560 if (rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT)
1561 {
1562 Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr));
1563 return ~0ULL;
1564 }
1565
1566 rc = PGMPhysSimpleReadGCPtr(pVCpu, &val[1], pInstr+1024, sizeof(val[0]));
1567 AssertMsg(RT_SUCCESS(rc) || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1568 if (rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT)
1569 {
1570 Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr));
1571 return ~0ULL;
1572 }
1573
1574 rc = PGMPhysSimpleReadGCPtr(pVCpu, &val[2], pInstr+2048, sizeof(val[0]));
1575 AssertMsg(RT_SUCCESS(rc) || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1576 if (rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT)
1577 {
1578 Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr));
1579 return ~0ULL;
1580 }
1581
1582 rc = PGMPhysSimpleReadGCPtr(pVCpu, &val[3], pInstr+3072, sizeof(val[0]));
1583 AssertMsg(RT_SUCCESS(rc) || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1584 if (rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT)
1585 {
1586 Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr));
1587 return ~0ULL;
1588 }
1589
1590 rc = PGMPhysSimpleReadGCPtr(pVCpu, &val[4], pInstr+4092, sizeof(val[0]));
1591 AssertMsg(RT_SUCCESS(rc) || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1592 if (rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT)
1593 {
1594 Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr));
1595 return ~0ULL;
1596 }
1597
1598 // don't want to get division by zero traps
1599 val[2] |= 1;
1600 val[4] |= 1;
1601
1602 hash = (uint64_t)val[0] * (uint64_t)val[1] / (uint64_t)val[2] + (val[3]%val[4]);
1603 return (hash == ~0ULL) ? hash - 1 : hash;
1604}
1605
1606
1607/**
1608 * Notify CSAM of a page flush
1609 *
1610 * @returns VBox status code
1611 * @param pVM Pointer to the VM.
1612 * @param addr GC address of the page to flush
1613 * @param fRemovePage Page removal flag
1614 */
1615static int csamFlushPage(PVM pVM, RTRCPTR addr, bool fRemovePage)
1616{
1617 PCSAMPAGEREC pPageRec;
1618 int rc;
1619 RTGCPHYS GCPhys = 0;
1620 uint64_t fFlags = 0;
1621 Assert(pVM->cCpus == 1 || !CSAMIsEnabled(pVM));
1622
1623 if (!CSAMIsEnabled(pVM))
1624 return VINF_SUCCESS;
1625
1626 PVMCPU pVCpu = VMMGetCpu0(pVM);
1627
1628 STAM_PROFILE_START(&pVM->csam.s.StatTimeFlushPage, a);
1629
1630 addr = addr & PAGE_BASE_GC_MASK;
1631
1632 /*
1633 * Note: searching for the page in our tree first is more expensive (skipped flushes are two orders of magnitude more common)
1634 */
1635 if (pVM->csam.s.pPageTree == NULL)
1636 {
1637 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1638 return VWRN_CSAM_PAGE_NOT_FOUND;
1639 }
1640
1641 rc = PGMGstGetPage(pVCpu, addr, &fFlags, &GCPhys);
1642 /* Returned at a very early stage (no paging yet presumably). */
1643 if (rc == VERR_NOT_SUPPORTED)
1644 {
1645 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1646 return rc;
1647 }
1648
1649 if (RT_SUCCESS(rc))
1650 {
1651 if ( (fFlags & X86_PTE_US)
1652 || rc == VERR_PGM_PHYS_PAGE_RESERVED
1653 )
1654 {
1655 /* User page -> not relevant for us. */
1656 STAM_COUNTER_ADD(&pVM->csam.s.StatNrFlushesSkipped, 1);
1657 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1658 return VINF_SUCCESS;
1659 }
1660 }
1661 else
1662 if (rc != VERR_PAGE_NOT_PRESENT && rc != VERR_PAGE_TABLE_NOT_PRESENT)
1663 AssertMsgFailed(("PGMR3GetPage %RRv failed with %Rrc\n", addr, rc));
1664
1665 pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)addr);
1666 if (pPageRec)
1667 {
1668 if ( GCPhys == pPageRec->page.GCPhys
1669 && (fFlags & X86_PTE_P))
1670 {
1671 STAM_COUNTER_ADD(&pVM->csam.s.StatNrFlushesSkipped, 1);
1672 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1673 return VINF_SUCCESS;
1674 }
1675
1676 Log(("CSAMR3FlushPage: page %RRv has changed -> FLUSH (rc=%Rrc) (Phys: %RGp vs %RGp)\n", addr, rc, GCPhys, pPageRec->page.GCPhys));
1677
1678 STAM_COUNTER_ADD(&pVM->csam.s.StatNrFlushes, 1);
1679
1680 if (fRemovePage)
1681 csamRemovePageRecord(pVM, addr);
1682 else
1683 {
1684 CSAMMarkPage(pVM, addr, false);
1685 pPageRec->page.GCPhys = 0;
1686 pPageRec->page.fFlags = 0;
1687 rc = PGMGstGetPage(pVCpu, addr, &pPageRec->page.fFlags, &pPageRec->page.GCPhys);
1688 if (rc == VINF_SUCCESS)
1689 pPageRec->page.u64Hash = csamR3CalcPageHash(pVM, addr);
1690
1691 if (pPageRec->page.pBitmap == NULL)
1692 {
1693 pPageRec->page.pBitmap = (uint8_t *)MMR3HeapAllocZ(pVM, MM_TAG_CSAM_PATCH, CSAM_PAGE_BITMAP_SIZE);
1694 Assert(pPageRec->page.pBitmap);
1695 if (pPageRec->page.pBitmap == NULL)
1696 return VERR_NO_MEMORY;
1697 }
1698 else
1699 memset(pPageRec->page.pBitmap, 0, CSAM_PAGE_BITMAP_SIZE);
1700 }
1701
1702
1703 /*
1704 * Inform patch manager about the flush; no need to repeat the above check twice.
1705 */
1706 PATMR3FlushPage(pVM, addr);
1707
1708 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1709 return VINF_SUCCESS;
1710 }
1711 else
1712 {
1713 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1714 return VWRN_CSAM_PAGE_NOT_FOUND;
1715 }
1716}
1717
1718/**
1719 * Notify CSAM of a page flush
1720 *
1721 * @returns VBox status code
1722 * @param pVM Pointer to the VM.
1723 * @param addr GC address of the page to flush
1724 */
1725VMMR3_INT_DECL(int) CSAMR3FlushPage(PVM pVM, RTRCPTR addr)
1726{
1727 return csamFlushPage(pVM, addr, true /* remove page record */);
1728}
1729
1730/**
1731 * Remove a CSAM monitored page. Use with care!
1732 *
1733 * @returns VBox status code
1734 * @param pVM Pointer to the VM.
1735 * @param addr GC address of the page to flush
1736 */
1737VMMR3_INT_DECL(int) CSAMR3RemovePage(PVM pVM, RTRCPTR addr)
1738{
1739 PCSAMPAGEREC pPageRec;
1740 int rc;
1741
1742 addr = addr & PAGE_BASE_GC_MASK;
1743
1744 pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)addr);
1745 if (pPageRec)
1746 {
1747 rc = csamRemovePageRecord(pVM, addr);
1748 if (RT_SUCCESS(rc))
1749 PATMR3FlushPage(pVM, addr);
1750 return VINF_SUCCESS;
1751 }
1752 return VWRN_CSAM_PAGE_NOT_FOUND;
1753}
1754
1755/**
1756 * Check a page record in case a page has been changed
1757 *
1758 * @returns VBox status code. (trap handled or not)
1759 * @param pVM Pointer to the VM.
1760 * @param pInstrGC GC instruction pointer
1761 */
1762int csamR3CheckPageRecord(PVM pVM, RTRCPTR pInstrGC)
1763{
1764 PCSAMPAGEREC pPageRec;
1765 uint64_t u64hash;
1766
1767 pInstrGC = pInstrGC & PAGE_BASE_GC_MASK;
1768
1769 pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)pInstrGC);
1770 if (pPageRec)
1771 {
1772 u64hash = csamR3CalcPageHash(pVM, pInstrGC);
1773 if (u64hash != pPageRec->page.u64Hash)
1774 csamFlushPage(pVM, pInstrGC, false /* don't remove page record */);
1775 }
1776 else
1777 return VWRN_CSAM_PAGE_NOT_FOUND;
1778
1779 return VINF_SUCCESS;
1780}
1781
1782/**
1783 * Returns monitor description based on CSAM tag
1784 *
1785 * @return description string
1786 * @param enmTag Owner tag
1787 */
1788const char *csamGetMonitorDescription(CSAMTAG enmTag)
1789{
1790 if (enmTag == CSAM_TAG_PATM)
1791 return "CSAM-PATM self-modifying code monitor handler";
1792 else
1793 if (enmTag == CSAM_TAG_REM)
1794 return "CSAM-REM self-modifying code monitor handler";
1795 Assert(enmTag == CSAM_TAG_CSAM);
1796 return "CSAM self-modifying code monitor handler";
1797}
1798
1799/**
1800 * Adds page record to our lookup tree
1801 *
1802 * @returns CSAMPAGE ptr or NULL if failure
1803 * @param pVM Pointer to the VM.
1804 * @param GCPtr Page address
1805 * @param enmTag Owner tag
1806 * @param fCode32 16 or 32 bits code
1807 * @param fMonitorInvalidation Monitor page invalidation flag
1808 */
1809static PCSAMPAGE csamCreatePageRecord(PVM pVM, RTRCPTR GCPtr, CSAMTAG enmTag, bool fCode32, bool fMonitorInvalidation)
1810{
1811 PCSAMPAGEREC pPage;
1812 int rc;
1813 bool ret;
1814 Assert(pVM->cCpus == 1);
1815 PVMCPU pVCpu = VMMGetCpu0(pVM);
1816
1817 Log(("New page record for %RRv\n", GCPtr & PAGE_BASE_GC_MASK));
1818
1819 pPage = (PCSAMPAGEREC)MMR3HeapAllocZ(pVM, MM_TAG_CSAM_PATCH, sizeof(CSAMPAGEREC));
1820 if (pPage == NULL)
1821 {
1822 AssertMsgFailed(("csamCreatePageRecord: Out of memory!!!!\n"));
1823 return NULL;
1824 }
1825 /* Round down to page boundary. */
1826 GCPtr = (GCPtr & PAGE_BASE_GC_MASK);
1827 pPage->Core.Key = (AVLPVKEY)(uintptr_t)GCPtr;
1828 pPage->page.pPageGC = GCPtr;
1829 pPage->page.fCode32 = fCode32;
1830 pPage->page.fMonitorInvalidation = fMonitorInvalidation;
1831 pPage->page.enmTag = enmTag;
1832 pPage->page.fMonitorActive = false;
1833 pPage->page.pBitmap = (uint8_t *)MMR3HeapAllocZ(pVM, MM_TAG_CSAM_PATCH, PAGE_SIZE/sizeof(uint8_t));
1834 rc = PGMGstGetPage(pVCpu, GCPtr, &pPage->page.fFlags, &pPage->page.GCPhys);
1835 AssertMsg(RT_SUCCESS(rc) || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1836
1837 pPage->page.u64Hash = csamR3CalcPageHash(pVM, GCPtr);
1838 ret = RTAvlPVInsert(&pVM->csam.s.pPageTree, &pPage->Core);
1839 Assert(ret);
1840
1841#ifdef CSAM_MONITOR_CODE_PAGES
1842 AssertRelease(!fInCSAMCodePageInvalidate);
1843
1844 switch (enmTag)
1845 {
1846 case CSAM_TAG_PATM:
1847 case CSAM_TAG_REM:
1848#ifdef CSAM_MONITOR_CSAM_CODE_PAGES
1849 case CSAM_TAG_CSAM:
1850#endif
1851 {
1852 rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_WRITE, GCPtr, GCPtr + (PAGE_SIZE - 1) /* inclusive! */,
1853 (fMonitorInvalidation) ? CSAMCodePageInvalidate : 0, CSAMCodePageWriteHandler, "CSAMGCCodePageWriteHandler", 0,
1854 csamGetMonitorDescription(enmTag));
1855 AssertMsg(RT_SUCCESS(rc) || rc == VERR_PGM_HANDLER_VIRTUAL_CONFLICT, ("PGMR3HandlerVirtualRegisterEx %RRv failed with %Rrc\n", GCPtr, rc));
1856 if (RT_FAILURE(rc))
1857 Log(("PGMR3HandlerVirtualRegisterEx for %RRv failed with %Rrc\n", GCPtr, rc));
1858
1859 /* Could fail, because it's already monitored. Don't treat that condition as fatal. */
1860
1861 /* Prefetch it in case it's not there yet. */
1862 rc = PGMPrefetchPage(pVCpu, GCPtr);
1863 AssertRC(rc);
1864
1865 rc = PGMShwMakePageReadonly(pVCpu, GCPtr, 0 /*fFlags*/);
1866 Assert(rc == VINF_SUCCESS || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
1867
1868 pPage->page.fMonitorActive = true;
1869 STAM_COUNTER_INC(&pVM->csam.s.StatPageMonitor);
1870 break;
1871 }
1872 default:
1873 break; /* to shut up GCC */
1874 }
1875
1876 Log(("csamCreatePageRecord %RRv GCPhys=%RGp\n", GCPtr, pPage->page.GCPhys));
1877
1878#ifdef VBOX_WITH_STATISTICS
1879 switch (enmTag)
1880 {
1881 case CSAM_TAG_CSAM:
1882 STAM_COUNTER_INC(&pVM->csam.s.StatPageCSAM);
1883 break;
1884 case CSAM_TAG_PATM:
1885 STAM_COUNTER_INC(&pVM->csam.s.StatPagePATM);
1886 break;
1887 case CSAM_TAG_REM:
1888 STAM_COUNTER_INC(&pVM->csam.s.StatPageREM);
1889 break;
1890 default:
1891 break; /* to shut up GCC */
1892 }
1893#endif
1894
1895#endif
1896
1897 STAM_COUNTER_INC(&pVM->csam.s.StatNrPages);
1898 if (fMonitorInvalidation)
1899 STAM_COUNTER_INC(&pVM->csam.s.StatNrPagesInv);
1900
1901 return &pPage->page;
1902}
1903
1904/**
1905 * Monitors a code page (if not already monitored)
1906 *
1907 * @returns VBox status code
1908 * @param pVM Pointer to the VM.
1909 * @param pPageAddrGC The page to monitor
1910 * @param enmTag Monitor tag
1911 */
1912VMMR3DECL(int) CSAMR3MonitorPage(PVM pVM, RTRCPTR pPageAddrGC, CSAMTAG enmTag)
1913{
1914 PCSAMPAGEREC pPageRec = NULL;
1915 int rc;
1916 bool fMonitorInvalidation;
1917 Assert(pVM->cCpus == 1);
1918 PVMCPU pVCpu = VMMGetCpu0(pVM);
1919
1920 /* Dirty pages must be handled before calling this function!. */
1921 Assert(!pVM->csam.s.cDirtyPages);
1922
1923 if (pVM->csam.s.fScanningStarted == false)
1924 return VINF_SUCCESS; /* too early */
1925
1926 pPageAddrGC &= PAGE_BASE_GC_MASK;
1927
1928 Log(("CSAMR3MonitorPage %RRv %d\n", pPageAddrGC, enmTag));
1929
1930 /** @todo implicit assumption */
1931 fMonitorInvalidation = (enmTag == CSAM_TAG_PATM);
1932
1933 pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)pPageAddrGC);
1934 if (pPageRec == NULL)
1935 {
1936 uint64_t fFlags;
1937
1938 rc = PGMGstGetPage(pVCpu, pPageAddrGC, &fFlags, NULL);
1939 AssertMsg(RT_SUCCESS(rc) || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1940 if ( rc == VINF_SUCCESS
1941 && (fFlags & X86_PTE_US))
1942 {
1943 /* We don't care about user pages. */
1944 STAM_COUNTER_INC(&pVM->csam.s.StatNrUserPages);
1945 return VINF_SUCCESS;
1946 }
1947
1948 csamCreatePageRecord(pVM, pPageAddrGC, enmTag, true /* 32 bits code */, fMonitorInvalidation);
1949
1950 pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)pPageAddrGC);
1951 Assert(pPageRec);
1952 }
1953 /** @todo reference count */
1954
1955#ifdef CSAM_MONITOR_CSAM_CODE_PAGES
1956 Assert(pPageRec->page.fMonitorActive);
1957#endif
1958
1959#ifdef CSAM_MONITOR_CODE_PAGES
1960 if (!pPageRec->page.fMonitorActive)
1961 {
1962 Log(("CSAMR3MonitorPage: activate monitoring for %RRv\n", pPageAddrGC));
1963
1964 rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_WRITE, pPageAddrGC, pPageAddrGC + (PAGE_SIZE - 1) /* inclusive! */,
1965 (fMonitorInvalidation) ? CSAMCodePageInvalidate : 0, CSAMCodePageWriteHandler, "CSAMGCCodePageWriteHandler", 0,
1966 csamGetMonitorDescription(enmTag));
1967 AssertMsg(RT_SUCCESS(rc) || rc == VERR_PGM_HANDLER_VIRTUAL_CONFLICT, ("PGMR3HandlerVirtualRegisterEx %RRv failed with %Rrc\n", pPageAddrGC, rc));
1968 if (RT_FAILURE(rc))
1969 Log(("PGMR3HandlerVirtualRegisterEx for %RRv failed with %Rrc\n", pPageAddrGC, rc));
1970
1971 /* Could fail, because it's already monitored. Don't treat that condition as fatal. */
1972
1973 /* Prefetch it in case it's not there yet. */
1974 rc = PGMPrefetchPage(pVCpu, pPageAddrGC);
1975 AssertRC(rc);
1976
1977 rc = PGMShwMakePageReadonly(pVCpu, pPageAddrGC, 0 /*fFlags*/);
1978 Assert(rc == VINF_SUCCESS || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
1979
1980 STAM_COUNTER_INC(&pVM->csam.s.StatPageMonitor);
1981
1982 pPageRec->page.fMonitorActive = true;
1983 pPageRec->page.fMonitorInvalidation = fMonitorInvalidation;
1984 }
1985 else
1986 if ( !pPageRec->page.fMonitorInvalidation
1987 && fMonitorInvalidation)
1988 {
1989 Assert(pPageRec->page.fMonitorActive);
1990 PGMHandlerVirtualChangeInvalidateCallback(pVM, pPageRec->page.pPageGC, CSAMCodePageInvalidate);
1991 pPageRec->page.fMonitorInvalidation = true;
1992 STAM_COUNTER_INC(&pVM->csam.s.StatNrPagesInv);
1993
1994 /* Prefetch it in case it's not there yet. */
1995 rc = PGMPrefetchPage(pVCpu, pPageAddrGC);
1996 AssertRC(rc);
1997
1998 /* Make sure it's readonly. Page invalidation may have modified the attributes. */
1999 rc = PGMShwMakePageReadonly(pVCpu, pPageAddrGC, 0 /*fFlags*/);
2000 Assert(rc == VINF_SUCCESS || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
2001 }
2002
2003#if 0 /* def VBOX_STRICT -> very annoying) */
2004 if (pPageRec->page.fMonitorActive)
2005 {
2006 uint64_t fPageShw;
2007 RTHCPHYS GCPhys;
2008 rc = PGMShwGetPage(pVCpu, pPageAddrGC, &fPageShw, &GCPhys);
2009// AssertMsg( (rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT)
2010// || !(fPageShw & X86_PTE_RW)
2011// || (pPageRec->page.GCPhys == 0), ("Shadow page flags for %RRv (%RHp) aren't readonly (%RX64)!!\n", pPageAddrGC, GCPhys, fPageShw));
2012 }
2013#endif
2014
2015 if (pPageRec->page.GCPhys == 0)
2016 {
2017 /* Prefetch it in case it's not there yet. */
2018 rc = PGMPrefetchPage(pVCpu, pPageAddrGC);
2019 AssertRC(rc);
2020 /* The page was changed behind our back. It won't be made read-only until the next SyncCR3, so force it here. */
2021 rc = PGMShwMakePageReadonly(pVCpu, pPageAddrGC, 0 /*fFlags*/);
2022 Assert(rc == VINF_SUCCESS || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
2023 }
2024#endif /* CSAM_MONITOR_CODE_PAGES */
2025 return VINF_SUCCESS;
2026}
2027
2028/**
2029 * Unmonitors a code page
2030 *
2031 * @returns VBox status code
2032 * @param pVM Pointer to the VM.
2033 * @param pPageAddrGC The page to monitor
2034 * @param enmTag Monitor tag
2035 */
2036VMMR3DECL(int) CSAMR3UnmonitorPage(PVM pVM, RTRCPTR pPageAddrGC, CSAMTAG enmTag)
2037{
2038 pPageAddrGC &= PAGE_BASE_GC_MASK;
2039
2040 Log(("CSAMR3UnmonitorPage %RRv %d\n", pPageAddrGC, enmTag));
2041
2042 Assert(enmTag == CSAM_TAG_REM);
2043
2044#ifdef VBOX_STRICT
2045 PCSAMPAGEREC pPageRec;
2046
2047 pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)pPageAddrGC);
2048 Assert(pPageRec && pPageRec->page.enmTag == enmTag);
2049#endif
2050 return CSAMR3RemovePage(pVM, pPageAddrGC);
2051}
2052
2053/**
2054 * Removes a page record from our lookup tree
2055 *
2056 * @returns VBox status code
2057 * @param pVM Pointer to the VM.
2058 * @param GCPtr Page address
2059 */
2060static int csamRemovePageRecord(PVM pVM, RTRCPTR GCPtr)
2061{
2062 PCSAMPAGEREC pPageRec;
2063 Assert(pVM->cCpus == 1);
2064 PVMCPU pVCpu = VMMGetCpu0(pVM);
2065
2066 Log(("csamRemovePageRecord %RRv\n", GCPtr));
2067 pPageRec = (PCSAMPAGEREC)RTAvlPVRemove(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)GCPtr);
2068
2069 if (pPageRec)
2070 {
2071 STAM_COUNTER_INC(&pVM->csam.s.StatNrRemovedPages);
2072
2073#ifdef CSAM_MONITOR_CODE_PAGES
2074 if (pPageRec->page.fMonitorActive)
2075 {
2076 /* @todo -> this is expensive (cr3 reload)!!!
2077 * if this happens often, then reuse it instead!!!
2078 */
2079 Assert(!fInCSAMCodePageInvalidate);
2080 STAM_COUNTER_DEC(&pVM->csam.s.StatPageMonitor);
2081 PGMHandlerVirtualDeregister(pVM, GCPtr);
2082 }
2083 if (pPageRec->page.enmTag == CSAM_TAG_PATM)
2084 {
2085 /* Make sure the recompiler flushes its cache as this page is no longer monitored. */
2086 STAM_COUNTER_INC(&pVM->csam.s.StatPageRemoveREMFlush);
2087 CPUMSetChangedFlags(pVCpu, CPUM_CHANGED_GLOBAL_TLB_FLUSH);
2088 }
2089#endif
2090
2091#ifdef VBOX_WITH_STATISTICS
2092 switch (pPageRec->page.enmTag)
2093 {
2094 case CSAM_TAG_CSAM:
2095 STAM_COUNTER_DEC(&pVM->csam.s.StatPageCSAM);
2096 break;
2097 case CSAM_TAG_PATM:
2098 STAM_COUNTER_DEC(&pVM->csam.s.StatPagePATM);
2099 break;
2100 case CSAM_TAG_REM:
2101 STAM_COUNTER_DEC(&pVM->csam.s.StatPageREM);
2102 break;
2103 default:
2104 break; /* to shut up GCC */
2105 }
2106#endif
2107
2108 if (pPageRec->page.pBitmap) MMR3HeapFree(pPageRec->page.pBitmap);
2109 MMR3HeapFree(pPageRec);
2110 }
2111 else
2112 AssertFailed();
2113
2114 return VINF_SUCCESS;
2115}
2116
2117/**
2118 * Callback for delayed writes from non-EMT threads
2119 *
2120 * @param pVM Pointer to the VM.
2121 * @param GCPtr The virtual address the guest is writing to. (not correct if it's an alias!)
2122 * @param cbBuf How much it's reading/writing.
2123 */
2124static DECLCALLBACK(void) CSAMDelayedWriteHandler(PVM pVM, RTRCPTR GCPtr, size_t cbBuf)
2125{
2126 int rc = PATMR3PatchWrite(pVM, GCPtr, (uint32_t)cbBuf);
2127 AssertRC(rc);
2128}
2129
2130/**
2131 * \#PF Handler callback for virtual access handler ranges.
2132 *
2133 * Important to realize that a physical page in a range can have aliases, and
2134 * for ALL and WRITE handlers these will also trigger.
2135 *
2136 * @returns VINF_SUCCESS if the handler have carried out the operation.
2137 * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
2138 * @param pVM Pointer to the VM.
2139 * @param GCPtr The virtual address the guest is writing to. (not correct if it's an alias!)
2140 * @param pvPtr The HC mapping of that address.
2141 * @param pvBuf What the guest is reading/writing.
2142 * @param cbBuf How much it's reading/writing.
2143 * @param enmAccessType The access type.
2144 * @param pvUser User argument.
2145 */
2146static DECLCALLBACK(int) CSAMCodePageWriteHandler(PVM pVM, RTGCPTR GCPtr, void *pvPtr, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
2147{
2148 int rc;
2149
2150 Assert(enmAccessType == PGMACCESSTYPE_WRITE); NOREF(enmAccessType);
2151 Log(("CSAMCodePageWriteHandler: write to %RGv size=%zu\n", GCPtr, cbBuf));
2152 NOREF(pvUser);
2153
2154 if ( PAGE_ADDRESS(pvPtr) == PAGE_ADDRESS((uintptr_t)pvPtr + cbBuf - 1)
2155 && !memcmp(pvPtr, pvBuf, cbBuf))
2156 {
2157 Log(("CSAMCodePageWriteHandler: dummy write -> ignore\n"));
2158 return VINF_PGM_HANDLER_DO_DEFAULT;
2159 }
2160
2161 if (VM_IS_EMT(pVM))
2162 rc = PATMR3PatchWrite(pVM, GCPtr, (uint32_t)cbBuf);
2163 else
2164 {
2165 /* Queue the write instead otherwise we'll get concurrency issues. */
2166 /** @note in theory not correct to let it write the data first before disabling a patch!
2167 * (if it writes the same data as the patch jump and we replace it with obsolete opcodes)
2168 */
2169 Log(("CSAMCodePageWriteHandler: delayed write!\n"));
2170 AssertCompileSize(RTRCPTR, 4);
2171 rc = VMR3ReqCallVoidNoWait(pVM, VMCPUID_ANY, (PFNRT)CSAMDelayedWriteHandler, 3, pVM, (RTRCPTR)GCPtr, cbBuf);
2172 }
2173 AssertRC(rc);
2174
2175 return VINF_PGM_HANDLER_DO_DEFAULT;
2176}
2177
2178/**
2179 * \#PF Handler callback for invalidation of virtual access handler ranges.
2180 *
2181 * @param pVM Pointer to the VM.
2182 * @param GCPtr The virtual address the guest has changed.
2183 */
2184static DECLCALLBACK(int) CSAMCodePageInvalidate(PVM pVM, RTGCPTR GCPtr)
2185{
2186 fInCSAMCodePageInvalidate = true;
2187 LogFlow(("CSAMCodePageInvalidate %RGv\n", GCPtr));
2188 /** @todo We can't remove the page (which unregisters the virtual handler) as we are called from a DoWithAll on the virtual handler tree. Argh. */
2189 csamFlushPage(pVM, GCPtr, false /* don't remove page! */);
2190 fInCSAMCodePageInvalidate = false;
2191 return VINF_SUCCESS;
2192}
2193
2194/**
2195 * Check if the current instruction has already been checked before
2196 *
2197 * @returns VBox status code. (trap handled or not)
2198 * @param pVM Pointer to the VM.
2199 * @param pInstr Instruction pointer
2200 * @param pPage CSAM patch structure pointer
2201 */
2202bool csamIsCodeScanned(PVM pVM, RTRCPTR pInstr, PCSAMPAGE *pPage)
2203{
2204 PCSAMPAGEREC pPageRec;
2205 uint32_t offset;
2206
2207 STAM_PROFILE_START(&pVM->csam.s.StatTimeCheckAddr, a);
2208
2209 offset = pInstr & PAGE_OFFSET_MASK;
2210 pInstr = pInstr & PAGE_BASE_GC_MASK;
2211
2212 Assert(pPage);
2213
2214 if (*pPage && (*pPage)->pPageGC == pInstr)
2215 {
2216 if ((*pPage)->pBitmap == NULL || ASMBitTest((*pPage)->pBitmap, offset))
2217 {
2218 STAM_COUNTER_ADD(&pVM->csam.s.StatNrKnownPagesHC, 1);
2219 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeCheckAddr, a);
2220 return true;
2221 }
2222 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeCheckAddr, a);
2223 return false;
2224 }
2225
2226 pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)pInstr);
2227 if (pPageRec)
2228 {
2229 if (pPage) *pPage= &pPageRec->page;
2230 if (pPageRec->page.pBitmap == NULL || ASMBitTest(pPageRec->page.pBitmap, offset))
2231 {
2232 STAM_COUNTER_ADD(&pVM->csam.s.StatNrKnownPagesHC, 1);
2233 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeCheckAddr, a);
2234 return true;
2235 }
2236 }
2237 else
2238 {
2239 if (pPage) *pPage = NULL;
2240 }
2241 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeCheckAddr, a);
2242 return false;
2243}
2244
2245/**
2246 * Mark an instruction in a page as scanned/not scanned
2247 *
2248 * @param pVM Pointer to the VM.
2249 * @param pPage Patch structure pointer
2250 * @param pInstr Instruction pointer
2251 * @param cbInstr Instruction size
2252 * @param fScanned Mark as scanned or not
2253 */
2254static void csamMarkCode(PVM pVM, PCSAMPAGE pPage, RTRCPTR pInstr, uint32_t cbInstr, bool fScanned)
2255{
2256 LogFlow(("csamMarkCodeAsScanned %RRv cbInstr=%d\n", pInstr, cbInstr));
2257 CSAMMarkPage(pVM, pInstr, fScanned);
2258
2259 /** @todo should recreate empty bitmap if !fScanned */
2260 if (pPage->pBitmap == NULL)
2261 return;
2262
2263 if (fScanned)
2264 {
2265 // retn instructions can be scanned more than once
2266 if (ASMBitTest(pPage->pBitmap, pInstr & PAGE_OFFSET_MASK) == 0)
2267 {
2268 pPage->uSize += cbInstr;
2269 STAM_COUNTER_ADD(&pVM->csam.s.StatNrInstr, 1);
2270 }
2271 if (pPage->uSize >= PAGE_SIZE)
2272 {
2273 Log(("Scanned full page (%RRv) -> free bitmap\n", pInstr & PAGE_BASE_GC_MASK));
2274 MMR3HeapFree(pPage->pBitmap);
2275 pPage->pBitmap = NULL;
2276 }
2277 else
2278 ASMBitSet(pPage->pBitmap, pInstr & PAGE_OFFSET_MASK);
2279 }
2280 else
2281 ASMBitClear(pPage->pBitmap, pInstr & PAGE_OFFSET_MASK);
2282}
2283
2284/**
2285 * Mark an instruction in a page as scanned/not scanned
2286 *
2287 * @returns VBox status code.
2288 * @param pVM Pointer to the VM.
2289 * @param pInstr Instruction pointer
2290 * @param cbInstr Instruction size
2291 * @param fScanned Mark as scanned or not
2292 */
2293VMMR3_INT_DECL(int) CSAMR3MarkCode(PVM pVM, RTRCPTR pInstr, uint32_t cbInstr, bool fScanned)
2294{
2295 PCSAMPAGE pPage = 0;
2296
2297 Assert(!fScanned); /* other case not implemented. */
2298 Assert(!PATMIsPatchGCAddr(pVM, pInstr));
2299
2300 if (csamIsCodeScanned(pVM, pInstr, &pPage) == false)
2301 {
2302 Assert(fScanned == true); /* other case should not be possible */
2303 return VINF_SUCCESS;
2304 }
2305
2306 Log(("CSAMR3MarkCode: %RRv size=%d fScanned=%d\n", pInstr, cbInstr, fScanned));
2307 csamMarkCode(pVM, pPage, pInstr, cbInstr, fScanned);
2308 return VINF_SUCCESS;
2309}
2310
2311
2312/**
2313 * Scan and analyse code
2314 *
2315 * @returns VBox status code.
2316 * @param pVM Pointer to the VM.
2317 * @param pCtxCore CPU context
2318 * @param pInstrGC Instruction pointer
2319 */
2320VMMR3_INT_DECL(int) CSAMR3CheckCodeEx(PVM pVM, PCPUMCTXCORE pCtxCore, RTRCPTR pInstrGC)
2321{
2322 if (EMIsRawRing0Enabled(pVM) == false || PATMIsPatchGCAddr(pVM, pInstrGC) == true)
2323 {
2324 // No use
2325 return VINF_SUCCESS;
2326 }
2327
2328 if (CSAMIsEnabled(pVM))
2329 {
2330 /* Assuming 32 bits code for now. */
2331 Assert(CPUMGetGuestCodeBits(VMMGetCpu0(pVM)) == 32);
2332
2333 pInstrGC = SELMToFlat(pVM, DISSELREG_CS, pCtxCore, pInstrGC);
2334 return CSAMR3CheckCode(pVM, pInstrGC);
2335 }
2336 return VINF_SUCCESS;
2337}
2338
2339/**
2340 * Scan and analyse code
2341 *
2342 * @returns VBox status code.
2343 * @param pVM Pointer to the VM.
2344 * @param pInstrGC Instruction pointer (0:32 virtual address)
2345 */
2346VMMR3_INT_DECL(int) CSAMR3CheckCode(PVM pVM, RTRCPTR pInstrGC)
2347{
2348 int rc;
2349 PCSAMPAGE pPage = NULL;
2350
2351 if ( EMIsRawRing0Enabled(pVM) == false
2352 || PATMIsPatchGCAddr(pVM, pInstrGC) == true)
2353 {
2354 /* Not active. */
2355 return VINF_SUCCESS;
2356 }
2357
2358 if (CSAMIsEnabled(pVM))
2359 {
2360 /* Cache record for csamR3GCVirtToHCVirt */
2361 CSAMP2GLOOKUPREC cacheRec;
2362 RT_ZERO(cacheRec);
2363
2364 STAM_PROFILE_START(&pVM->csam.s.StatTime, a);
2365 rc = csamAnalyseCallCodeStream(pVM, pInstrGC, pInstrGC, true /* 32 bits code */, CSAMR3AnalyseCallback, pPage, &cacheRec);
2366 STAM_PROFILE_STOP(&pVM->csam.s.StatTime, a);
2367 if (cacheRec.Lock.pvMap)
2368 PGMPhysReleasePageMappingLock(pVM, &cacheRec.Lock);
2369
2370 if (rc != VINF_SUCCESS)
2371 {
2372 Log(("csamAnalyseCodeStream failed with %d\n", rc));
2373 return rc;
2374 }
2375 }
2376 return VINF_SUCCESS;
2377}
2378
2379/**
2380 * Flush dirty code pages
2381 *
2382 * @returns VBox status code.
2383 * @param pVM Pointer to the VM.
2384 */
2385static int csamR3FlushDirtyPages(PVM pVM)
2386{
2387 Assert(pVM->cCpus == 1);
2388 PVMCPU pVCpu = VMMGetCpu0(pVM);
2389
2390 STAM_PROFILE_START(&pVM->csam.s.StatFlushDirtyPages, a);
2391
2392 for (uint32_t i=0;i<pVM->csam.s.cDirtyPages;i++)
2393 {
2394 int rc;
2395 PCSAMPAGEREC pPageRec;
2396 RTRCPTR GCPtr = pVM->csam.s.pvDirtyBasePage[i];
2397
2398 GCPtr = GCPtr & PAGE_BASE_GC_MASK;
2399
2400#ifdef VBOX_WITH_REM
2401 /* Notify the recompiler that this page has been changed. */
2402 REMR3NotifyCodePageChanged(pVM, pVCpu, GCPtr);
2403#endif
2404
2405 /* Enable write protection again. (use the fault address as it might be an alias) */
2406 rc = PGMShwMakePageReadonly(pVCpu, pVM->csam.s.pvDirtyFaultPage[i], 0 /*fFlags*/);
2407 Assert(rc == VINF_SUCCESS || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
2408
2409 Log(("CSAMR3FlushDirtyPages: flush %RRv (modifypage rc=%Rrc)\n", pVM->csam.s.pvDirtyBasePage[i], rc));
2410
2411 pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)(uintptr_t)GCPtr);
2412 if (pPageRec && pPageRec->page.enmTag == CSAM_TAG_REM)
2413 {
2414 uint64_t fFlags;
2415
2416 rc = PGMGstGetPage(pVCpu, GCPtr, &fFlags, NULL);
2417 AssertMsg(RT_SUCCESS(rc) || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
2418 if ( rc == VINF_SUCCESS
2419 && (fFlags & X86_PTE_US))
2420 {
2421 /* We don't care about user pages. */
2422 csamRemovePageRecord(pVM, GCPtr);
2423 STAM_COUNTER_INC(&pVM->csam.s.StatNrUserPages);
2424 }
2425 }
2426 }
2427 pVM->csam.s.cDirtyPages = 0;
2428 STAM_PROFILE_STOP(&pVM->csam.s.StatFlushDirtyPages, a);
2429 return VINF_SUCCESS;
2430}
2431
2432/**
2433 * Flush potential new code pages
2434 *
2435 * @returns VBox status code.
2436 * @param pVM Pointer to the VM.
2437 */
2438static int csamR3FlushCodePages(PVM pVM)
2439{
2440 Assert(pVM->cCpus == 1);
2441 PVMCPU pVCpu = VMMGetCpu0(pVM);
2442
2443 for (uint32_t i=0;i<pVM->csam.s.cPossibleCodePages;i++)
2444 {
2445 RTRCPTR GCPtr = pVM->csam.s.pvPossibleCodePage[i];
2446
2447 GCPtr = GCPtr & PAGE_BASE_GC_MASK;
2448
2449 Log(("csamR3FlushCodePages: %RRv\n", GCPtr));
2450 PGMShwMakePageNotPresent(pVCpu, GCPtr, 0 /*fFlags*/);
2451 /* Resync the page to make sure instruction fetch will fault */
2452 CSAMMarkPage(pVM, GCPtr, false);
2453 }
2454 pVM->csam.s.cPossibleCodePages = 0;
2455 return VINF_SUCCESS;
2456}
2457
2458/**
2459 * Perform any pending actions
2460 *
2461 * @returns VBox status code.
2462 * @param pVM Pointer to the VM.
2463 * @param pVCpu Pointer to the VMCPU.
2464 */
2465VMMR3_INT_DECL(int) CSAMR3DoPendingAction(PVM pVM, PVMCPU pVCpu)
2466{
2467 csamR3FlushDirtyPages(pVM);
2468 csamR3FlushCodePages(pVM);
2469
2470 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_CSAM_PENDING_ACTION);
2471 return VINF_SUCCESS;
2472}
2473
2474/**
2475 * Analyse interrupt and trap gates
2476 *
2477 * @returns VBox status code.
2478 * @param pVM Pointer to the VM.
2479 * @param iGate Start gate
2480 * @param cGates Number of gates to check
2481 */
2482VMMR3_INT_DECL(int) CSAMR3CheckGates(PVM pVM, uint32_t iGate, uint32_t cGates)
2483{
2484#ifdef VBOX_WITH_RAW_MODE
2485 Assert(pVM->cCpus == 1);
2486 PVMCPU pVCpu = VMMGetCpu0(pVM);
2487 uint16_t cbIDT;
2488 RTRCPTR GCPtrIDT = CPUMGetGuestIDTR(pVCpu, &cbIDT);
2489 uint32_t iGateEnd;
2490 uint32_t maxGates;
2491 VBOXIDTE aIDT[256];
2492 PVBOXIDTE pGuestIdte;
2493 int rc;
2494
2495 if (EMIsRawRing0Enabled(pVM) == false)
2496 {
2497 /* Enabling interrupt gates only works when raw ring 0 is enabled. */
2498 //AssertFailed();
2499 return VINF_SUCCESS;
2500 }
2501
2502 /* We only check all gates once during a session */
2503 if ( !pVM->csam.s.fGatesChecked
2504 && cGates != 256)
2505 return VINF_SUCCESS; /* too early */
2506
2507 /* We only check all gates once during a session */
2508 if ( pVM->csam.s.fGatesChecked
2509 && cGates != 1)
2510 return VINF_SUCCESS; /* ignored */
2511
2512 Assert(cGates <= 256);
2513 if (!GCPtrIDT || cGates > 256)
2514 return VERR_INVALID_PARAMETER;
2515
2516 if (cGates != 1)
2517 {
2518 pVM->csam.s.fGatesChecked = true;
2519 for (unsigned i=0;i<RT_ELEMENTS(pVM->csam.s.pvCallInstruction);i++)
2520 {
2521 RTRCPTR pHandler = pVM->csam.s.pvCallInstruction[i];
2522
2523 if (pHandler)
2524 {
2525 PCSAMPAGE pPage = NULL;
2526 CSAMP2GLOOKUPREC cacheRec; /* Cache record for csamR3GCVirtToHCVirt. */
2527 RT_ZERO(cacheRec);
2528
2529 Log(("CSAMCheckGates: checking previous call instruction %RRv\n", pHandler));
2530 STAM_PROFILE_START(&pVM->csam.s.StatTime, a);
2531 rc = csamAnalyseCodeStream(pVM, pHandler, pHandler, true, CSAMR3AnalyseCallback, pPage, &cacheRec);
2532 STAM_PROFILE_STOP(&pVM->csam.s.StatTime, a);
2533 if (cacheRec.Lock.pvMap)
2534 PGMPhysReleasePageMappingLock(pVM, &cacheRec.Lock);
2535
2536 if (rc != VINF_SUCCESS)
2537 {
2538 Log(("CSAMCheckGates: csamAnalyseCodeStream failed with %d\n", rc));
2539 continue;
2540 }
2541 }
2542 }
2543 }
2544
2545 /* Determine valid upper boundary. */
2546 maxGates = (cbIDT+1) / sizeof(VBOXIDTE);
2547 Assert(iGate < maxGates);
2548 if (iGate > maxGates)
2549 return VERR_INVALID_PARAMETER;
2550
2551 if (iGate + cGates > maxGates)
2552 cGates = maxGates - iGate;
2553
2554 GCPtrIDT = GCPtrIDT + iGate * sizeof(VBOXIDTE);
2555 iGateEnd = iGate + cGates;
2556
2557 STAM_PROFILE_START(&pVM->csam.s.StatCheckGates, a);
2558
2559 /*
2560 * Get IDT entries.
2561 */
2562 rc = PGMPhysSimpleReadGCPtr(pVCpu, aIDT, GCPtrIDT, cGates*sizeof(VBOXIDTE));
2563 if (RT_FAILURE(rc))
2564 {
2565 AssertMsgRC(rc, ("Failed to read IDTE! rc=%Rrc\n", rc));
2566 STAM_PROFILE_STOP(&pVM->csam.s.StatCheckGates, a);
2567 return rc;
2568 }
2569 pGuestIdte = &aIDT[0];
2570
2571 for (/*iGate*/; iGate<iGateEnd; iGate++, pGuestIdte++)
2572 {
2573 Assert(TRPMR3GetGuestTrapHandler(pVM, iGate) == TRPM_INVALID_HANDLER);
2574
2575 if ( pGuestIdte->Gen.u1Present
2576 && (pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32 || pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_INT_32)
2577 && (pGuestIdte->Gen.u2DPL == 3 || pGuestIdte->Gen.u2DPL == 0)
2578 )
2579 {
2580 RTRCPTR pHandler;
2581 PCSAMPAGE pPage = NULL;
2582 DBGFSELINFO selInfo;
2583 CSAMP2GLOOKUPREC cacheRec; /* Cache record for csamR3GCVirtToHCVirt. */
2584 RT_ZERO(cacheRec);
2585
2586 pHandler = VBOXIDTE_OFFSET(*pGuestIdte);
2587 pHandler = SELMToFlatBySel(pVM, pGuestIdte->Gen.u16SegSel, pHandler);
2588
2589 rc = SELMR3GetSelectorInfo(pVM, pVCpu, pGuestIdte->Gen.u16SegSel, &selInfo);
2590 if ( RT_FAILURE(rc)
2591 || (selInfo.fFlags & (DBGFSELINFO_FLAGS_NOT_PRESENT | DBGFSELINFO_FLAGS_INVALID))
2592 || selInfo.GCPtrBase != 0
2593 || selInfo.cbLimit != ~0U
2594 )
2595 {
2596 /* Refuse to patch a handler whose idt cs selector isn't wide open. */
2597 Log(("CSAMCheckGates: check gate %d failed due to rc %Rrc GCPtrBase=%RRv limit=%x\n", iGate, rc, selInfo.GCPtrBase, selInfo.cbLimit));
2598 continue;
2599 }
2600
2601
2602 if (pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32)
2603 {
2604 Log(("CSAMCheckGates: check trap gate %d at %04X:%08X (flat %RRv)\n", iGate, pGuestIdte->Gen.u16SegSel, VBOXIDTE_OFFSET(*pGuestIdte), pHandler));
2605 }
2606 else
2607 {
2608 Log(("CSAMCheckGates: check interrupt gate %d at %04X:%08X (flat %RRv)\n", iGate, pGuestIdte->Gen.u16SegSel, VBOXIDTE_OFFSET(*pGuestIdte), pHandler));
2609 }
2610
2611 STAM_PROFILE_START(&pVM->csam.s.StatTime, b);
2612 rc = csamAnalyseCodeStream(pVM, pHandler, pHandler, true, CSAMR3AnalyseCallback, pPage, &cacheRec);
2613 STAM_PROFILE_STOP(&pVM->csam.s.StatTime, b);
2614 if (cacheRec.Lock.pvMap)
2615 PGMPhysReleasePageMappingLock(pVM, &cacheRec.Lock);
2616
2617 if (rc != VINF_SUCCESS)
2618 {
2619 Log(("CSAMCheckGates: csamAnalyseCodeStream failed with %d\n", rc));
2620 continue;
2621 }
2622 /* OpenBSD guest specific patch test. */
2623 if (iGate >= 0x20)
2624 {
2625 PCPUMCTX pCtx;
2626 DISCPUSTATE cpu;
2627 RTGCUINTPTR32 aOpenBsdPushCSOffset[3] = {0x03, /* OpenBSD 3.7 & 3.8 */
2628 0x2B, /* OpenBSD 4.0 installation ISO */
2629 0x2F}; /* OpenBSD 4.0 after install */
2630
2631 pCtx = CPUMQueryGuestCtxPtr(pVCpu);
2632
2633 for (unsigned i=0;i<RT_ELEMENTS(aOpenBsdPushCSOffset);i++)
2634 {
2635 rc = CPUMR3DisasmInstrCPU(pVM, pVCpu, pCtx, pHandler - aOpenBsdPushCSOffset[i], &cpu, NULL);
2636 if ( rc == VINF_SUCCESS
2637 && cpu.pCurInstr->uOpcode == OP_PUSH
2638 && cpu.pCurInstr->fParam1 == OP_PARM_REG_CS)
2639 {
2640 rc = PATMR3InstallPatch(pVM, pHandler - aOpenBsdPushCSOffset[i], PATMFL_CODE32 | PATMFL_GUEST_SPECIFIC);
2641 if (RT_SUCCESS(rc))
2642 Log(("Installed OpenBSD interrupt handler prefix instruction (push cs) patch\n"));
2643 }
2644 }
2645 }
2646
2647 /* Trap gates and certain interrupt gates. */
2648 uint32_t fPatchFlags = PATMFL_CODE32 | PATMFL_IDTHANDLER;
2649
2650 if (pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32)
2651 fPatchFlags |= PATMFL_TRAPHANDLER;
2652 else
2653 fPatchFlags |= PATMFL_INTHANDLER;
2654
2655 switch (iGate) {
2656 case 8:
2657 case 10:
2658 case 11:
2659 case 12:
2660 case 13:
2661 case 14:
2662 case 17:
2663 fPatchFlags |= PATMFL_TRAPHANDLER_WITH_ERRORCODE;
2664 break;
2665 default:
2666 /* No error code. */
2667 break;
2668 }
2669
2670 Log(("Installing %s gate handler for 0x%X at %RRv\n", (pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32) ? "trap" : "intr", iGate, pHandler));
2671
2672 rc = PATMR3InstallPatch(pVM, pHandler, fPatchFlags);
2673 if ( RT_SUCCESS(rc)
2674 || rc == VERR_PATM_ALREADY_PATCHED)
2675 {
2676 Log(("Gate handler 0x%X is SAFE!\n", iGate));
2677
2678 RTRCPTR pNewHandlerGC = PATMR3QueryPatchGCPtr(pVM, pHandler);
2679 if (pNewHandlerGC)
2680 {
2681 rc = TRPMR3SetGuestTrapHandler(pVM, iGate, pNewHandlerGC);
2682 if (RT_FAILURE(rc))
2683 Log(("TRPMR3SetGuestTrapHandler %d failed with %Rrc\n", iGate, rc));
2684 }
2685 }
2686 }
2687 } /* for */
2688 STAM_PROFILE_STOP(&pVM->csam.s.StatCheckGates, a);
2689#endif /* VBOX_WITH_RAW_MODE */
2690 return VINF_SUCCESS;
2691}
2692
2693/**
2694 * Record previous call instruction addresses
2695 *
2696 * @returns VBox status code.
2697 * @param pVM Pointer to the VM.
2698 * @param GCPtrCall Call address
2699 */
2700VMMR3DECL(int) CSAMR3RecordCallAddress(PVM pVM, RTRCPTR GCPtrCall)
2701{
2702 for (unsigned i=0;i<RT_ELEMENTS(pVM->csam.s.pvCallInstruction);i++)
2703 {
2704 if (pVM->csam.s.pvCallInstruction[i] == GCPtrCall)
2705 return VINF_SUCCESS;
2706 }
2707
2708 Log(("CSAMR3RecordCallAddress %RRv\n", GCPtrCall));
2709
2710 pVM->csam.s.pvCallInstruction[pVM->csam.s.iCallInstruction++] = GCPtrCall;
2711 if (pVM->csam.s.iCallInstruction >= RT_ELEMENTS(pVM->csam.s.pvCallInstruction))
2712 pVM->csam.s.iCallInstruction = 0;
2713
2714 return VINF_SUCCESS;
2715}
2716
2717
2718/**
2719 * Query CSAM state (enabled/disabled)
2720 *
2721 * @returns true if enabled, false otherwise.
2722 * @param pUVM The user mode VM handle.
2723 */
2724VMMR3DECL(bool) CSAMR3IsEnabled(PUVM pUVM)
2725{
2726 UVM_ASSERT_VALID_EXT_RETURN(pUVM, false);
2727 PVM pVM = pUVM->pVM;
2728 VM_ASSERT_VALID_EXT_RETURN(pVM, false);
2729 return CSAMIsEnabled(pVM);
2730}
2731
2732
2733/**
2734 * Enables or disables code scanning.
2735 *
2736 * @returns VBox status code.
2737 * @param pUVM The user mode VM handle.
2738 * @param fEnabled Whether to enable or disable scanning.
2739 */
2740VMMR3DECL(int) CSAMR3SetScanningEnabled(PUVM pUVM, bool fEnabled)
2741{
2742 UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
2743 PVM pVM = pUVM->pVM;
2744 VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE);
2745
2746 int rc;
2747 if (fEnabled)
2748 rc = CSAMEnableScanning(pVM);
2749 else
2750 rc = CSAMDisableScanning(pVM);
2751 return rc;
2752}
2753
2754
2755#ifdef VBOX_WITH_DEBUGGER
2756
2757/**
2758 * @callback_method_impl{FNDBGCCMD, The '.csamoff' command.}
2759 */
2760static DECLCALLBACK(int) csamr3CmdOff(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PUVM pUVM, PCDBGCVAR paArgs, unsigned cArgs)
2761{
2762 DBGC_CMDHLP_REQ_UVM_RET(pCmdHlp, pCmd, pUVM);
2763 NOREF(cArgs); NOREF(paArgs);
2764
2765 int rc = CSAMR3SetScanningEnabled(pUVM, false);
2766 if (RT_FAILURE(rc))
2767 return DBGCCmdHlpFailRc(pCmdHlp, pCmd, rc, "CSAMR3SetScanningEnabled");
2768 return DBGCCmdHlpPrintf(pCmdHlp, "CSAM Scanning disabled\n");
2769}
2770
2771/**
2772 * @callback_method_impl{FNDBGCCMD, The '.csamon' command.}
2773 */
2774static DECLCALLBACK(int) csamr3CmdOn(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PUVM pUVM, PCDBGCVAR paArgs, unsigned cArgs)
2775{
2776 DBGC_CMDHLP_REQ_UVM_RET(pCmdHlp, pCmd, pUVM);
2777 NOREF(cArgs); NOREF(paArgs);
2778
2779 int rc = CSAMR3SetScanningEnabled(pUVM, true);
2780 if (RT_FAILURE(rc))
2781 return DBGCCmdHlpFailRc(pCmdHlp, pCmd, rc, "CSAMR3SetScanningEnabled");
2782 return DBGCCmdHlpPrintf(pCmdHlp, "CSAM Scanning enabled\n");
2783}
2784
2785#endif /* VBOX_WITH_DEBUGGER */
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