DBGFDisas.cpp@ 107227

Last change on this file since 107227 was 107227, checked in by vboxsync, 6 weeks ago
VMM: Cleaning up ARMv8 / x86 split. jiraref:VBP-1470
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1	/* $Id: DBGFDisas.cpp 107227 2024-12-04 15:20:14Z vboxsync $ */
2	/** @file
3	* DBGF - Debugger Facility, Disassembler.
4	*/
5
6	/*
7	* Copyright (C) 2006-2024 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	*/
27
28
29	/*********************************************************************************************************************************
30	* Header Files *
31	*********************************************************************************************************************************/
32	#define LOG_GROUP LOG_GROUP_DBGF
33	#include <VBox/vmm/dbgf.h>
34	#include <VBox/vmm/selm.h>
35	#include <VBox/vmm/mm.h>
36	#include <VBox/vmm/hm.h>
37	#include <VBox/vmm/pgm.h>
38	#include <VBox/vmm/cpum.h>
39	#include "DBGFInternal.h"
40	#include <VBox/dis.h>
41	#include <VBox/err.h>
42	#include <VBox/param.h>
43	#include <VBox/vmm/vm.h>
44	#include <VBox/vmm/uvm.h>
45
46	#include <VBox/log.h>
47	#include <iprt/assert.h>
48	#include <iprt/string.h>
49	#include <iprt/alloca.h>
50	#include <iprt/ctype.h>
51
52
53	/*********************************************************************************************************************************
54	* Structures and Typedefs *
55	*********************************************************************************************************************************/
56	/**
57	* Structure used when disassembling and instructions in DBGF.
58	* This is used so the reader function can get the stuff it needs.
59	*/
60	typedef struct
61	{
62	/** The core structure. */
63	DISSTATE Dis;
64	/** The cross context VM structure. */
65	PVM pVM;
66	/** The cross context virtual CPU structure. */
67	PVMCPU pVCpu;
68	/** The address space for resolving symbol. */
69	RTDBGAS hDbgAs;
70	#ifdef VBOX_VMM_TARGET_X86
71	/** Pointer to the first byte in the segment. */
72	RTGCUINTPTR GCPtrSegBase;
73	/** Pointer to the byte after the end of the segment. (might have wrapped!) */
74	RTGCUINTPTR GCPtrSegEnd;
75	/** The size of the segment minus 1. */
76	RTGCUINTPTR cbSegLimit;
77	#endif
78	/** The guest paging mode. */
79	PGMMODE enmMode;
80	/** Pointer to the current page - R3 Ptr. */
81	void const *pvPageR3;
82	/** Pointer to the current page - GC Ptr. */
83	RTGCPTR GCPtrPage;
84	/** Pointer to the next instruction (relative to GCPtrSegBase). */
85	RTGCUINTPTR GCPtrNext;
86	/** The lock information that PGMPhysReleasePageMappingLock needs. */
87	PGMPAGEMAPLOCK PageMapLock;
88	/** Whether the PageMapLock is valid or not. */
89	bool fLocked;
90	/** 64 bits mode or not. */
91	bool f64Bits;
92	} DBGFDISASSTATE, *PDBGFDISASSTATE;
93
94
95	/*********************************************************************************************************************************
96	* Internal Functions *
97	*********************************************************************************************************************************/
98	static FNDISREADBYTES dbgfR3DisasInstrRead;
99
100
101
102	/**
103	* Calls the disassembler with the proper reader functions and such for disa
104	*
105	* @returns VBox status code.
106	* @param pVM The cross context VM structure.
107	* @param pVCpu The cross context virtual CPU structure.
108	* @param pSelInfo The selector info.
109	* @param enmMode The guest paging mode.
110	* @param fFlags DBGF_DISAS_FLAGS_XXX.
111	* @param GCPtr The GC pointer (selector offset).
112	* @param pState The disas CPU state.
113	*/
114	static int dbgfR3DisasInstrFirst(PVM pVM, PVMCPU pVCpu, PDBGFSELINFO pSelInfo, PGMMODE enmMode,
115	RTGCPTR GCPtr, uint32_t fFlags, PDBGFDISASSTATE pState)
116	{
117	#ifndef VBOX_VMM_TARGET_X86
118	RT_NOREF_PV(pSelInfo);
119	pState->f64Bits = CPUMIsGuestIn64BitCode(pVCpu);
120	#else
121	pState->GCPtrSegBase = pSelInfo->GCPtrBase;
122	pState->GCPtrSegEnd = pSelInfo->cbLimit + 1 + (RTGCUINTPTR)pSelInfo->GCPtrBase;
123	pState->cbSegLimit = pSelInfo->cbLimit;
124	pState->f64Bits = enmMode >= PGMMODE_AMD64 && pSelInfo->u.Raw.Gen.u1Long;
125	#endif
126	pState->enmMode = enmMode;
127	pState->GCPtrPage = 0;
128	pState->pvPageR3 = NULL;
129	pState->hDbgAs = DBGF_AS_GLOBAL;
130	pState->pVM = pVM;
131	pState->pVCpu = pVCpu;
132	pState->fLocked = false;
133
134	DISCPUMODE enmCpuMode;
135	switch (fFlags & DBGF_DISAS_FLAGS_MODE_MASK)
136	{
137	default:
138	AssertFailed();
139	RT_FALL_THRU();
140	case DBGF_DISAS_FLAGS_DEFAULT_MODE:
141	enmCpuMode = CPUMGetGuestDisMode(pVCpu);
142	break;
143	#ifdef VBOX_VMM_TARGET_X86
144	case DBGF_DISAS_FLAGS_16BIT_MODE:
145	case DBGF_DISAS_FLAGS_16BIT_REAL_MODE:
146	enmCpuMode = DISCPUMODE_16BIT;
147	break;
148	case DBGF_DISAS_FLAGS_32BIT_MODE:
149	enmCpuMode = DISCPUMODE_32BIT;
150	break;
151	case DBGF_DISAS_FLAGS_64BIT_MODE:
152	enmCpuMode = DISCPUMODE_64BIT;
153	break;
154	#elif defined(VBOX_VMM_TARGET_ARMV8)
155	case DBGF_DISAS_FLAGS_16BIT_MODE: /** @todo r=aeichner This is a bit abusive... */
156	case DBGF_DISAS_FLAGS_16BIT_REAL_MODE:
157	enmCpuMode = DISCPUMODE_ARMV8_T32;
158	break;
159	case DBGF_DISAS_FLAGS_32BIT_MODE:
160	enmCpuMode = DISCPUMODE_ARMV8_A32;
161	break;
162	case DBGF_DISAS_FLAGS_64BIT_MODE:
163	enmCpuMode = DISCPUMODE_ARMV8_A64;
164	break;
165	#else
166	# error "port me"
167	#endif
168	}
169
170	uint32_t cbInstr;
171	int rc = DISInstrWithReader(GCPtr,
172	enmCpuMode,
173	dbgfR3DisasInstrRead,
174	&pState->Dis,
175	&pState->Dis,
176	&cbInstr);
177	if (RT_SUCCESS(rc))
178	{
179	pState->GCPtrNext = GCPtr + cbInstr;
180	return VINF_SUCCESS;
181	}
182
183	/* cleanup */
184	if (pState->fLocked)
185	{
186	PGMPhysReleasePageMappingLock(pVM, &pState->PageMapLock);
187	pState->fLocked = false;
188	}
189	return rc;
190	}
191
192
193	#if 0
194	/**
195	* Calls the disassembler for disassembling the next instruction.
196	*
197	* @returns VBox status code.
198	* @param pState The disas CPU state.
199	*/
200	static int dbgfR3DisasInstrNext(PDBGFDISASSTATE pState)
201	{
202	uint32_t cbInstr;
203	int rc = DISInstr(&pState->Cpu, (void *)pState->GCPtrNext, 0, &cbInstr, NULL);
204	if (RT_SUCCESS(rc))
205	{
206	pState->GCPtrNext = GCPtr + cbInstr;
207	return VINF_SUCCESS;
208	}
209	return rc;
210	}
211	#endif
212
213
214	/**
215	* Done with the disassembler state, free associated resources.
216	*
217	* @param pState The disas CPU state ++.
218	*/
219	static void dbgfR3DisasInstrDone(PDBGFDISASSTATE pState)
220	{
221	if (pState->fLocked)
222	{
223	PGMPhysReleasePageMappingLock(pState->pVM, &pState->PageMapLock);
224	pState->fLocked = false;
225	}
226	}
227
228
229	/**
230	* @callback_method_impl{FNDISREADBYTES}
231	*
232	* @remarks The source is relative to the base address indicated by
233	* DBGFDISASSTATE::GCPtrSegBase.
234	*/
235	static DECLCALLBACK(int) dbgfR3DisasInstrRead(PDISSTATE pDis, uint8_t offInstr, uint8_t cbMinRead, uint8_t cbMaxRead)
236	{
237	PDBGFDISASSTATE pState = (PDBGFDISASSTATE)pDis;
238	for (;;)
239	{
240	#ifdef VBOX_VMM_TARGET_X86
241	RTGCUINTPTR GCPtr = pDis->uInstrAddr + offInstr + pState->GCPtrSegBase;
242	#else
243	RTGCUINTPTR GCPtr = pDis->uInstrAddr + offInstr;
244	#endif
245
246	/*
247	* Need to update the page translation?
248	*/
249	if ( !pState->pvPageR3
250	\|\| (GCPtr >> GUEST_PAGE_SHIFT) != (pState->GCPtrPage >> GUEST_PAGE_SHIFT))
251	{
252	int rc = VINF_SUCCESS;
253
254	/* translate the address */
255	pState->GCPtrPage = GCPtr & ~(RTGCPTR)GUEST_PAGE_OFFSET_MASK;
256	if (pState->fLocked)
257	PGMPhysReleasePageMappingLock(pState->pVM, &pState->PageMapLock);
258	if (PGMMODE_WITH_PAGING(pState->enmMode))
259	rc = PGMPhysGCPtr2CCPtrReadOnly(pState->pVCpu, pState->GCPtrPage, &pState->pvPageR3, &pState->PageMapLock);
260	else
261	rc = PGMPhysGCPhys2CCPtrReadOnly(pState->pVM, pState->GCPtrPage, &pState->pvPageR3, &pState->PageMapLock);
262	if (RT_SUCCESS(rc))
263	pState->fLocked = true;
264	else
265	{
266	pState->fLocked = false;
267	pState->pvPageR3 = NULL;
268	return rc;
269	}
270	}
271
272	#ifdef VBOX_VMM_TARGET_X86
273	/*
274	* Check the segment limit.
275	*/
276	if (!pState->f64Bits && pDis->uInstrAddr + offInstr > pState->cbSegLimit)
277	return VERR_OUT_OF_SELECTOR_BOUNDS;
278	#endif
279
280	/*
281	* Calc how much we can read, maxing out the read.
282	*/
283	uint32_t cb = GUEST_PAGE_SIZE - (GCPtr & GUEST_PAGE_OFFSET_MASK);
284	#ifdef VBOX_VMM_TARGET_X86
285	if (!pState->f64Bits)
286	{
287	RTGCUINTPTR cbSeg = pState->GCPtrSegEnd - GCPtr;
288	if (cb > cbSeg && cbSeg)
289	cb = cbSeg;
290	}
291	#endif
292	if (cb > cbMaxRead)
293	cb = cbMaxRead;
294
295	/*
296	* Read and advance,
297	*/
298	memcpy(&pDis->Instr.ab[offInstr], (char *)pState->pvPageR3 + (GCPtr & GUEST_PAGE_OFFSET_MASK), cb);
299	offInstr += (uint8_t)cb;
300	if (cb >= cbMinRead)
301	{
302	pDis->cbCachedInstr = offInstr;
303	return VINF_SUCCESS;
304	}
305	cbMaxRead -= (uint8_t)cb;
306	cbMinRead -= (uint8_t)cb;
307	}
308	}
309
310
311	/**
312	* @callback_method_impl{FNDISGETSYMBOL}
313	*/
314	static DECLCALLBACK(int) dbgfR3DisasGetSymbol(PCDISSTATE pDis, uint32_t u32Sel, RTUINTPTR uAddress,
315	char pszBuf, size_t cchBuf, RTINTPTR poff, void *pvUser)
316	{
317	PDBGFDISASSTATE pState = (PDBGFDISASSTATE)pDis;
318
319	/*
320	* Address conversion
321	*/
322	DBGFADDRESS Addr;
323	int rc;
324	#ifdef VBOX_VMM_TARGET_X86
325	PCDBGFSELINFO pSelInfo = (PCDBGFSELINFO)pvUser;
326
327	/* Start with CS. */
328	if ( DIS_FMT_SEL_IS_REG(u32Sel)
329	? DIS_FMT_SEL_GET_REG(u32Sel) == DISSELREG_CS
330	: pSelInfo->Sel == DIS_FMT_SEL_GET_VALUE(u32Sel))
331	rc = DBGFR3AddrFromSelInfoOff(pState->pVM->pUVM, &Addr, pSelInfo, uAddress);
332	/* In long mode everything but FS and GS is easy. */
333	else if ( pState->Dis.uCpuMode == DISCPUMODE_64BIT
334	&& DIS_FMT_SEL_IS_REG(u32Sel)
335	&& DIS_FMT_SEL_GET_REG(u32Sel) != DISSELREG_GS
336	&& DIS_FMT_SEL_GET_REG(u32Sel) != DISSELREG_FS)
337	{
338	DBGFR3AddrFromFlat(pState->pVM->pUVM, &Addr, uAddress);
339	rc = VINF_SUCCESS;
340	}
341	/* Here's a quick hack to catch patch manager SS relative access. */
342	else if ( DIS_FMT_SEL_IS_REG(u32Sel)
343	&& DIS_FMT_SEL_GET_REG(u32Sel) == DISSELREG_SS
344	&& pSelInfo->GCPtrBase == 0
345	&& pSelInfo->cbLimit >= UINT32_MAX)
346	{
347	DBGFR3AddrFromFlat(pState->pVM->pUVM, &Addr, uAddress);
348	rc = VINF_SUCCESS;
349	}
350	else
351	{
352	/** @todo implement a generic solution here. */
353	rc = VERR_SYMBOL_NOT_FOUND;
354	}
355
356	#else
357	RT_NOREF(pvUser, u32Sel);
358	DBGFR3AddrFromFlat(pState->pVM->pUVM, &Addr, uAddress);
359	rc = VINF_SUCCESS;
360	#endif
361
362	/*
363	* If we got an address, try resolve it into a symbol.
364	*/
365	if (RT_SUCCESS(rc))
366	{
367	RTDBGSYMBOL Sym;
368	RTGCINTPTR off;
369	rc = DBGFR3AsSymbolByAddr(pState->pVM->pUVM, pState->hDbgAs, &Addr,
370	RTDBGSYMADDR_FLAGS_LESS_OR_EQUAL \| RTDBGSYMADDR_FLAGS_SKIP_ABS_IN_DEFERRED,
371	&off, &Sym, NULL /phMod/);
372	if (RT_SUCCESS(rc))
373	{
374	/*
375	* Return the symbol and offset.
376	*/
377	size_t cchName = strlen(Sym.szName);
378	if (cchName >= cchBuf)
379	cchName = cchBuf - 1;
380	memcpy(pszBuf, Sym.szName, cchName);
381	pszBuf[cchName] = '\0';
382
383	*poff = off;
384	}
385	}
386	return rc;
387	}
388
389
390	/**
391	* Disassembles the one instruction according to the specified flags and
392	* address, internal worker executing on the EMT of the specified virtual CPU.
393	*
394	* @returns VBox status code.
395	* @param pVM The cross context VM structure.
396	* @param pVCpu The cross context virtual CPU structure.
397	* @param Sel The code selector. This used to determine the 32/16 bit ness and
398	* calculation of the actual instruction address.
399	* @param pGCPtr Pointer to the variable holding the code address
400	* relative to the base of Sel.
401	* @param fFlags Flags controlling where to start and how to format.
402	* A combination of the DBGF_DISAS_FLAGS_* \#defines.
403	* @param pszOutput Output buffer.
404	* @param cbOutput Size of the output buffer.
405	* @param pcbInstr Where to return the size of the instruction.
406	* @param pDisState Where to store the disassembler state into.
407	*/
408	static DECLCALLBACK(int)
409	dbgfR3DisasInstrExOnVCpu(PVM pVM, PVMCPU pVCpu, RTSEL Sel, PRTGCPTR pGCPtr, uint32_t fFlags,
410	char pszOutput, uint32_t cbOutput, uint32_t pcbInstr, PDBGFDISSTATE pDisState)
411	{
412	VMCPU_ASSERT_EMT(pVCpu);
413	RTGCPTR GCPtr = *pGCPtr;
414	int rc;
415
416	#ifdef VBOX_VMM_TARGET_X86
417	/*
418	* Get the Sel and GCPtr if fFlags requests that.
419	*/
420	PCCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
421	PCCPUMSELREG pSRegCS = NULL;
422	if (fFlags & DBGF_DISAS_FLAGS_CURRENT_GUEST)
423	{
424	Sel = pCtx->cs.Sel;
425	pSRegCS = &pCtx->cs;
426	GCPtr = pCtx->rip;
427	}
428	/*
429	* Check if the selector matches the guest CS, use the hidden
430	* registers from that if they are valid. Saves time and effort.
431	*/
432	else
433	{
434	if (pCtx->cs.Sel == Sel && Sel != DBGF_SEL_FLAT)
435	pSRegCS = &pCtx->cs;
436	else
437	pCtx = NULL;
438	}
439
440	/*
441	* Read the selector info - assume no stale selectors and nasty stuff like that.
442	*
443	* Note! We CANNOT load invalid hidden selector registers since that would
444	* mean that log/debug statements or the debug will influence the
445	* guest state and make things behave differently.
446	*/
447	DBGFSELINFO SelInfo;
448	const PGMMODE enmMode = PGMGetGuestMode(pVCpu);
449	bool fRealModeAddress = false;
450
451	if ( pSRegCS
452	&& CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, pSRegCS))
453	{
454	SelInfo.Sel = Sel;
455	SelInfo.SelGate = 0;
456	SelInfo.GCPtrBase = pSRegCS->u64Base;
457	SelInfo.cbLimit = pSRegCS->u32Limit;
458	SelInfo.fFlags = PGMMODE_IS_64BIT_MODE(enmMode)
459	? DBGFSELINFO_FLAGS_LONG_MODE
460	: enmMode != PGMMODE_REAL && !pCtx->eflags.Bits.u1VM
461	? DBGFSELINFO_FLAGS_PROT_MODE
462	: DBGFSELINFO_FLAGS_REAL_MODE;
463
464	SelInfo.u.Raw.au32[0] = 0;
465	SelInfo.u.Raw.au32[1] = 0;
466	SelInfo.u.Raw.Gen.u16LimitLow = 0xffff;
467	SelInfo.u.Raw.Gen.u4LimitHigh = 0xf;
468	SelInfo.u.Raw.Gen.u1Present = pSRegCS->Attr.n.u1Present;
469	SelInfo.u.Raw.Gen.u1Granularity = pSRegCS->Attr.n.u1Granularity;;
470	SelInfo.u.Raw.Gen.u1DefBig = pSRegCS->Attr.n.u1DefBig;
471	SelInfo.u.Raw.Gen.u1Long = pSRegCS->Attr.n.u1Long;
472	SelInfo.u.Raw.Gen.u1DescType = pSRegCS->Attr.n.u1DescType;
473	SelInfo.u.Raw.Gen.u4Type = pSRegCS->Attr.n.u4Type;
474	fRealModeAddress = !!(SelInfo.fFlags & DBGFSELINFO_FLAGS_REAL_MODE);
475	}
476	else if (Sel == DBGF_SEL_FLAT)
477	{
478	SelInfo.Sel = Sel;
479	SelInfo.SelGate = 0;
480	SelInfo.GCPtrBase = 0;
481	SelInfo.cbLimit = ~(RTGCUINTPTR)0;
482	SelInfo.fFlags = PGMMODE_IS_64BIT_MODE(enmMode)
483	? DBGFSELINFO_FLAGS_LONG_MODE
484	: enmMode != PGMMODE_REAL
485	? DBGFSELINFO_FLAGS_PROT_MODE
486	: DBGFSELINFO_FLAGS_REAL_MODE;
487	SelInfo.u.Raw.au32[0] = 0;
488	SelInfo.u.Raw.au32[1] = 0;
489	SelInfo.u.Raw.Gen.u16LimitLow = 0xffff;
490	SelInfo.u.Raw.Gen.u4LimitHigh = 0xf;
491
492	pSRegCS = &CPUMQueryGuestCtxPtr(pVCpu)->cs;
493	if (CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, pSRegCS))
494	{
495	/* Assume the current CS defines the execution mode. */
496	SelInfo.u.Raw.Gen.u1Present = pSRegCS->Attr.n.u1Present;
497	SelInfo.u.Raw.Gen.u1Granularity = pSRegCS->Attr.n.u1Granularity;;
498	SelInfo.u.Raw.Gen.u1DefBig = pSRegCS->Attr.n.u1DefBig;
499	SelInfo.u.Raw.Gen.u1Long = pSRegCS->Attr.n.u1Long;
500	SelInfo.u.Raw.Gen.u1DescType = pSRegCS->Attr.n.u1DescType;
501	SelInfo.u.Raw.Gen.u4Type = pSRegCS->Attr.n.u4Type;
502	}
503	else
504	{
505	pSRegCS = NULL;
506	SelInfo.u.Raw.Gen.u1Present = 1;
507	SelInfo.u.Raw.Gen.u1Granularity = 1;
508	SelInfo.u.Raw.Gen.u1DefBig = 1;
509	SelInfo.u.Raw.Gen.u1DescType = 1;
510	SelInfo.u.Raw.Gen.u4Type = X86_SEL_TYPE_EO;
511	}
512	}
513	else if ( (pCtx && pCtx->eflags.Bits.u1VM)
514	\|\| enmMode == PGMMODE_REAL
515	\|\| (fFlags & DBGF_DISAS_FLAGS_MODE_MASK) == DBGF_DISAS_FLAGS_16BIT_REAL_MODE)
516	{ /* V86 mode or real mode - real mode addressing */
517	SelInfo.Sel = Sel;
518	SelInfo.SelGate = 0;
519	SelInfo.GCPtrBase = Sel * 16;
520	SelInfo.cbLimit = ~(RTGCUINTPTR)0;
521	SelInfo.fFlags = DBGFSELINFO_FLAGS_REAL_MODE;
522	SelInfo.u.Raw.au32[0] = 0;
523	SelInfo.u.Raw.au32[1] = 0;
524	SelInfo.u.Raw.Gen.u16LimitLow = 0xffff;
525	SelInfo.u.Raw.Gen.u4LimitHigh = 0xf;
526	SelInfo.u.Raw.Gen.u1Present = 1;
527	SelInfo.u.Raw.Gen.u1Granularity = 1;
528	SelInfo.u.Raw.Gen.u1DefBig = 0; /* 16 bits */
529	SelInfo.u.Raw.Gen.u1DescType = 1;
530	SelInfo.u.Raw.Gen.u4Type = X86_SEL_TYPE_EO;
531	fRealModeAddress = true;
532	}
533	else
534	{
535	rc = SELMR3GetSelectorInfo(pVCpu, Sel, &SelInfo);
536	if (RT_FAILURE(rc))
537	{
538	RTStrPrintf(pszOutput, cbOutput, "Sel=%04x -> %Rrc\n", Sel, rc);
539	return rc;
540	}
541	}
542
543	#else /* !VBOX_VMM_TARGET_X86 */
544	const PGMMODE enmMode = PGMGetGuestMode(pVCpu);
545	const bool fRealModeAddress = false;
546	if (fFlags & DBGF_DISAS_FLAGS_CURRENT_GUEST)
547	GCPtr = CPUMGetGuestFlatPC(pVCpu);
548	#endif /* !VBOX_VMM_TARGET_X86 */
549
550	/*
551	* Disassemble it.
552	*/
553	DBGFDISASSTATE State;
554	#ifdef VBOX_VMM_TARGET_X86
555	rc = dbgfR3DisasInstrFirst(pVM, pVCpu, &SelInfo, enmMode, GCPtr, fFlags, &State);
556	#else
557	rc = dbgfR3DisasInstrFirst(pVM, pVCpu, NULL, enmMode, GCPtr, fFlags, &State);
558	#endif
559	if (RT_FAILURE(rc))
560	{
561	if (State.Dis.cbCachedInstr)
562	RTStrPrintf(pszOutput, cbOutput, "Disas -> %Rrc; %.*Rhxs\n", rc, (size_t)State.Dis.cbCachedInstr, State.Dis.Instr.ab);
563	else
564	RTStrPrintf(pszOutput, cbOutput, "Disas -> %Rrc\n", rc);
565	return rc;
566	}
567
568	/*
569	* Format it.
570	*/
571	char szBuf[512];
572	#ifdef VBOX_VMM_TARGET_ARMV8
573	DISFormatArmV8Ex(&State.Dis, szBuf, sizeof(szBuf),
574	DIS_FMT_FLAGS_RELATIVE_BRANCH,
575	fFlags & DBGF_DISAS_FLAGS_NO_SYMBOLS ? NULL : dbgfR3DisasGetSymbol,
576	NULL);
577	#elif defined(VBOX_VMM_TARGET_X86)
578	DISFormatYasmEx(&State.Dis, szBuf, sizeof(szBuf),
579	DIS_FMT_FLAGS_RELATIVE_BRANCH,
580	fFlags & DBGF_DISAS_FLAGS_NO_SYMBOLS ? NULL : dbgfR3DisasGetSymbol,
581	&SelInfo);
582	#else
583	# error "port me"
584	#endif
585
586	/*
587	* Print it to the user specified buffer.
588	*/
589	size_t cch;
590	if (fFlags & DBGF_DISAS_FLAGS_NO_BYTES)
591	{
592	if (fFlags & DBGF_DISAS_FLAGS_NO_ADDRESS)
593	cch = RTStrPrintf(pszOutput, cbOutput, "%s", szBuf);
594	else if (fRealModeAddress)
595	cch = RTStrPrintf(pszOutput, cbOutput, "%04x:%04x %s", Sel, (unsigned)GCPtr, szBuf);
596	else if (Sel == DBGF_SEL_FLAT)
597	{
598	if (PGMMODE_IS_64BIT_MODE(enmMode))
599	cch = RTStrPrintf(pszOutput, cbOutput, "%RGv %s", GCPtr, szBuf);
600	else
601	cch = RTStrPrintf(pszOutput, cbOutput, "%08RX32 %s", (uint32_t)GCPtr, szBuf);
602	}
603	else
604	{
605	if (PGMMODE_IS_64BIT_MODE(enmMode))
606	cch = RTStrPrintf(pszOutput, cbOutput, "%04x:%RGv %s", Sel, GCPtr, szBuf);
607	else
608	cch = RTStrPrintf(pszOutput, cbOutput, "%04x:%08RX32 %s", Sel, (uint32_t)GCPtr, szBuf);
609	}
610	}
611	else
612	{
613	uint32_t cbInstr = State.Dis.cbInstr;
614	uint8_t const *pabInstr = State.Dis.Instr.ab;
615	if (fFlags & DBGF_DISAS_FLAGS_NO_ADDRESS)
616	cch = RTStrPrintf(pszOutput, cbOutput, "%.Rhxs%s %s",
617	cbInstr, pabInstr, cbInstr < 8 ? (8 - cbInstr) * 3 : 0, "",
618	szBuf);
619	else if (fRealModeAddress)
620	cch = RTStrPrintf(pszOutput, cbOutput, "%04x:%04x %.Rhxs%s %s",
621	Sel, (unsigned)GCPtr,
622	cbInstr, pabInstr, cbInstr < 8 ? (8 - cbInstr) * 3 : 0, "",
623	szBuf);
624	else if (Sel == DBGF_SEL_FLAT)
625	{
626	if (PGMMODE_IS_64BIT_MODE(enmMode))
627	cch = RTStrPrintf(pszOutput, cbOutput, "%RGv %.Rhxs%s %s",
628	GCPtr,
629	cbInstr, pabInstr, cbInstr < 8 ? (8 - cbInstr) * 3 : 0, "",
630	szBuf);
631	else
632	cch = RTStrPrintf(pszOutput, cbOutput, "%08RX32 %.Rhxs%s %s",
633	(uint32_t)GCPtr,
634	cbInstr, pabInstr, cbInstr < 8 ? (8 - cbInstr) * 3 : 0, "",
635	szBuf);
636	}
637	else
638	{
639	if (PGMMODE_IS_64BIT_MODE(enmMode))
640	cch = RTStrPrintf(pszOutput, cbOutput, "%04x:%RGv %.Rhxs%s %s",
641	Sel, GCPtr,
642	cbInstr, pabInstr, cbInstr < 8 ? (8 - cbInstr) * 3 : 0, "",
643	szBuf);
644	else
645	cch = RTStrPrintf(pszOutput, cbOutput, "%04x:%08RX32 %.Rhxs%s %s",
646	Sel, (uint32_t)GCPtr,
647	cbInstr, pabInstr, cbInstr < 8 ? (8 - cbInstr) * 3 : 0, "",
648	szBuf);
649	}
650	}
651
652	if (pcbInstr)
653	*pcbInstr = State.Dis.cbInstr;
654
655	if (pDisState)
656	{
657	pDisState->pCurInstr = State.Dis.pCurInstr;
658	pDisState->cbInstr = State.Dis.cbInstr;
659	pDisState->Param1 = State.Dis.aParams[0];
660	pDisState->Param2 = State.Dis.aParams[1];
661	pDisState->Param3 = State.Dis.aParams[2];
662	pDisState->Param4 = State.Dis.aParams[3];
663	#ifdef VBOX_VMM_TARGET_ARMV8
664	memcpy(&pDisState->armv8, &State.Dis.armv8, sizeof(State.Dis.armv8));
665	#elif defined(VBOX_VMM_TARGET_X86)
666	memcpy(&pDisState->x86, &State.Dis.x86, sizeof(State.Dis.x86));
667	#else
668	# error "port me"
669	#endif
670	}
671
672	dbgfR3DisasInstrDone(&State);
673	return VINF_SUCCESS;
674	}
675
676
677	/**
678	* Disassembles the one instruction according to the specified flags and address
679	* returning part of the disassembler state.
680	*
681	* @returns VBox status code.
682	* @param pUVM The user mode VM handle.
683	* @param idCpu The ID of virtual CPU.
684	* @param pAddr The code address.
685	* @param fFlags Flags controlling where to start and how to format.
686	* A combination of the DBGF_DISAS_FLAGS_* \#defines.
687	* @param pszOutput Output buffer. This will always be properly
688	* terminated if @a cbOutput is greater than zero.
689	* @param cbOutput Size of the output buffer.
690	* @param pDisState The disassembler state to fill in.
691	*
692	* @remarks May have to switch to the EMT of the virtual CPU in order to do
693	* address conversion.
694	*/
695	DECLHIDDEN(int) dbgfR3DisasInstrStateEx(PUVM pUVM, VMCPUID idCpu, PDBGFADDRESS pAddr, uint32_t fFlags,
696	char *pszOutput, uint32_t cbOutput, PDBGFDISSTATE pDisState)
697	{
698	AssertReturn(cbOutput > 0, VERR_INVALID_PARAMETER);
699	*pszOutput = '\0';
700	UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
701	PVM pVM = pUVM->pVM;
702	VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE);
703	AssertReturn(idCpu < pUVM->cCpus, VERR_INVALID_CPU_ID);
704	AssertReturn(!(fFlags & ~DBGF_DISAS_FLAGS_VALID_MASK), VERR_INVALID_PARAMETER);
705	AssertReturn((fFlags & DBGF_DISAS_FLAGS_MODE_MASK) <= DBGF_DISAS_FLAGS_64BIT_MODE, VERR_INVALID_PARAMETER);
706
707	/*
708	* Optimize the common case where we're called on the EMT of idCpu since
709	* we're using this all the time when logging.
710	*/
711	int rc;
712	PVMCPU pVCpu = VMMGetCpu(pVM);
713	if ( pVCpu
714	&& pVCpu->idCpu == idCpu)
715	rc = dbgfR3DisasInstrExOnVCpu(pVM, pVCpu, pAddr->Sel, &pAddr->off, fFlags, pszOutput, cbOutput, NULL, pDisState);
716	else
717	rc = VMR3ReqPriorityCallWait(pVM, idCpu, (PFNRT)dbgfR3DisasInstrExOnVCpu, 9,
718	pVM, VMMGetCpuById(pVM, idCpu), pAddr->Sel, &pAddr->off, fFlags,
719	pszOutput, cbOutput, NULL, pDisState);
720	return rc;
721	}
722
723	/**
724	* Disassembles the one instruction according to the specified flags and address.
725	*
726	* @returns VBox status code.
727	* @param pUVM The user mode VM handle.
728	* @param idCpu The ID of virtual CPU.
729	* @param Sel The code selector. This used to determine the 32/16 bit ness and
730	* calculation of the actual instruction address.
731	* @param GCPtr The code address relative to the base of Sel.
732	* @param fFlags Flags controlling where to start and how to format.
733	* A combination of the DBGF_DISAS_FLAGS_* \#defines.
734	* @param pszOutput Output buffer. This will always be properly
735	* terminated if @a cbOutput is greater than zero.
736	* @param cbOutput Size of the output buffer.
737	* @param pcbInstr Where to return the size of the instruction.
738	*
739	* @remarks May have to switch to the EMT of the virtual CPU in order to do
740	* address conversion.
741	*/
742	VMMR3DECL(int) DBGFR3DisasInstrEx(PUVM pUVM, VMCPUID idCpu, RTSEL Sel, RTGCPTR GCPtr, uint32_t fFlags,
743	char pszOutput, uint32_t cbOutput, uint32_t pcbInstr)
744	{
745	AssertReturn(cbOutput > 0, VERR_INVALID_PARAMETER);
746	*pszOutput = '\0';
747	UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
748	PVM pVM = pUVM->pVM;
749	VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE);
750	AssertReturn(idCpu < pUVM->cCpus, VERR_INVALID_CPU_ID);
751	AssertReturn(!(fFlags & ~DBGF_DISAS_FLAGS_VALID_MASK), VERR_INVALID_PARAMETER);
752	AssertReturn((fFlags & DBGF_DISAS_FLAGS_MODE_MASK) <= DBGF_DISAS_FLAGS_64BIT_MODE, VERR_INVALID_PARAMETER);
753
754	/*
755	* Optimize the common case where we're called on the EMT of idCpu since
756	* we're using this all the time when logging.
757	*/
758	int rc;
759	PVMCPU pVCpu = VMMGetCpu(pVM);
760	if ( pVCpu
761	&& pVCpu->idCpu == idCpu)
762	rc = dbgfR3DisasInstrExOnVCpu(pVM, pVCpu, Sel, &GCPtr, fFlags, pszOutput, cbOutput, pcbInstr, NULL);
763	else
764	rc = VMR3ReqPriorityCallWait(pVM, idCpu, (PFNRT)dbgfR3DisasInstrExOnVCpu, 9,
765	pVM, VMMGetCpuById(pVM, idCpu), Sel, &GCPtr, fFlags, pszOutput, cbOutput, pcbInstr, NULL);
766	return rc;
767	}
768
769
770	/**
771	* Disassembles the current guest context instruction.
772	* All registers and data will be displayed. Addresses will be attempted resolved to symbols.
773	*
774	* @returns VBox status code.
775	* @param pVCpu The cross context virtual CPU structure.
776	* @param pszOutput Output buffer. This will always be properly
777	* terminated if @a cbOutput is greater than zero.
778	* @param cbOutput Size of the output buffer.
779	* @thread EMT(pVCpu)
780	*/
781	VMMR3_INT_DECL(int) DBGFR3DisasInstrCurrent(PVMCPU pVCpu, char *pszOutput, uint32_t cbOutput)
782	{
783	AssertReturn(cbOutput > 0, VERR_INVALID_PARAMETER);
784	*pszOutput = '\0';
785	Assert(VMCPU_IS_EMT(pVCpu));
786
787	RTGCPTR GCPtr = 0;
788	return dbgfR3DisasInstrExOnVCpu(pVCpu->pVMR3, pVCpu, 0, &GCPtr,
789	DBGF_DISAS_FLAGS_CURRENT_GUEST \| DBGF_DISAS_FLAGS_DEFAULT_MODE
790	\| DBGF_DISAS_FLAGS_ANNOTATE_PATCHED,
791	pszOutput, cbOutput, NULL, NULL);
792	}
793
794
795	/**
796	* Disassembles the current guest context instruction and writes it to the log.
797	* All registers and data will be displayed. Addresses will be attempted resolved to symbols.
798	*
799	* @returns VBox status code.
800	* @param pVCpu The cross context virtual CPU structure.
801	* @param pszPrefix Short prefix string to the disassembly string. (optional)
802	* @thread EMT(pVCpu)
803	*/
804	VMMR3DECL(int) DBGFR3DisasInstrCurrentLogInternal(PVMCPU pVCpu, const char *pszPrefix)
805	{
806	char szBuf[256];
807	szBuf[0] = '\0';
808	int rc = DBGFR3DisasInstrCurrent(pVCpu, &szBuf[0], sizeof(szBuf));
809	if (RT_FAILURE(rc))
810	RTStrPrintf(szBuf, sizeof(szBuf), "DBGFR3DisasInstrCurrentLog failed with rc=%Rrc\n", rc);
811	if (pszPrefix && *pszPrefix)
812	{
813	if (pVCpu->CTX_SUFF(pVM)->cCpus > 1)
814	RTLogPrintf("%s-CPU%u: %s\n", pszPrefix, pVCpu->idCpu, szBuf);
815	else
816	RTLogPrintf("%s: %s\n", pszPrefix, szBuf);
817	}
818	else
819	RTLogPrintf("%s\n", szBuf);
820	return rc;
821	}
822
823
824
825	/**
826	* Disassembles the specified guest context instruction and writes it to the log.
827	* Addresses will be attempted resolved to symbols.
828	*
829	* @returns VBox status code.
830	* @param pVCpu The cross context virtual CPU structure of the calling
831	* EMT.
832	* @param Sel The code selector. This used to determine the 32/16
833	* bit-ness and calculation of the actual instruction
834	* address.
835	* @param GCPtr The code address relative to the base of Sel.
836	* @param pszPrefix Short prefix string to the disassembly string.
837	* (optional)
838	* @thread EMT(pVCpu)
839	*/
840	VMMR3DECL(int) DBGFR3DisasInstrLogInternal(PVMCPU pVCpu, RTSEL Sel, RTGCPTR GCPtr, const char *pszPrefix)
841	{
842	Assert(VMCPU_IS_EMT(pVCpu));
843
844	char szBuf[256];
845	RTGCPTR GCPtrTmp = GCPtr;
846	int rc = dbgfR3DisasInstrExOnVCpu(pVCpu->pVMR3, pVCpu, Sel, &GCPtrTmp, DBGF_DISAS_FLAGS_DEFAULT_MODE,
847	&szBuf[0], sizeof(szBuf), NULL, NULL);
848	if (RT_FAILURE(rc))
849	RTStrPrintf(szBuf, sizeof(szBuf), "DBGFR3DisasInstrLog(, %RTsel, %RGv) failed with rc=%Rrc\n", Sel, GCPtr, rc);
850	if (pszPrefix && *pszPrefix)
851	{
852	if (pVCpu->CTX_SUFF(pVM)->cCpus > 1)
853	RTLogPrintf("%s-CPU%u: %s\n", pszPrefix, pVCpu->idCpu, szBuf);
854	else
855	RTLogPrintf("%s: %s\n", pszPrefix, szBuf);
856	}
857	else
858	RTLogPrintf("%s\n", szBuf);
859	return rc;
860	}
861

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source: vbox/trunk/src/VBox/VMM/VMMR3/DBGFDisas.cpp@ 107227

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