VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/DBGFStack.cpp@ 73483

Last change on this file since 73483 was 73483, checked in by vboxsync, 6 years ago

DBGF,VMM: Dump sure registers for the first frame too. Display sure registers in ring-0 assertion stacks. bugref:3897
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1/* $Id: DBGFStack.cpp 73483 2018-08-03 12:47:32Z vboxsync $ */
2/** @file
3 * DBGF - Debugger Facility, Call Stack Analyser.
4 */
5
6/*
7 * Copyright (C) 2006-2017 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DBGF
23#include <VBox/vmm/dbgf.h>
24#include <VBox/vmm/selm.h>
25#include <VBox/vmm/mm.h>
26#include "DBGFInternal.h"
27#include <VBox/vmm/vm.h>
28#include <VBox/vmm/uvm.h>
29#include <VBox/err.h>
30#include <VBox/log.h>
31#include <iprt/param.h>
32#include <iprt/assert.h>
33#include <iprt/alloca.h>
34#include <iprt/mem.h>
35#include <iprt/string.h>
36#include <iprt/formats/pecoff.h>
37
38
39/*********************************************************************************************************************************
40* Structures and Typedefs *
41*********************************************************************************************************************************/
42static DECLCALLBACK(int) dbgfR3StackReadCallback(PRTDBGUNWINDSTATE pThis, RTUINTPTR uSp, size_t cbToRead, void *pvDst);
43
44/**
45 * Unwind context.
46 *
47 * @note Using a constructor and destructor here for simple+safe cleanup.
48 *
49 * @todo Generalize and move to IPRT or some such place.
50 */
51typedef struct DBGFUNWINDCTX
52{
53 PUVM m_pUVM;
54 VMCPUID m_idCpu;
55 RTDBGAS m_hAs;
56 PCCPUMCTX m_pInitialCtx;
57 bool m_fIsHostRing0;
58 uint64_t m_uOsScratch; /**< For passing to DBGFOSREG::pfnStackUnwindAssist. */
59
60 RTDBGUNWINDSTATE m_State;
61
62 RTDBGMOD m_hCached;
63 RTUINTPTR m_uCachedMapping;
64 RTUINTPTR m_cbCachedMapping;
65 uint8_t *m_pbCachedInfo;
66 size_t m_cbCachedInfo;
67
68 /** Function table for PE/AMD64 (entire m_pbCachedInfo) . */
69 PCIMAGE_RUNTIME_FUNCTION_ENTRY m_paFunctions;
70 /** Number functions in m_paFunctions. */
71 size_t m_cFunctions;
72
73 DBGFUNWINDCTX(PUVM pUVM, VMCPUID idCpu, PCCPUMCTX pInitialCtx, RTDBGAS hAs)
74 {
75 m_State.u32Magic = RTDBGUNWINDSTATE_MAGIC;
76 m_State.enmArch = RTLDRARCH_AMD64;
77 m_State.pfnReadStack = dbgfR3StackReadCallback;
78 m_State.pvUser = this;
79 RT_ZERO(m_State.u);
80 if (pInitialCtx)
81 {
82 m_State.u.x86.auRegs[X86_GREG_xAX] = pInitialCtx->rax;
83 m_State.u.x86.auRegs[X86_GREG_xCX] = pInitialCtx->rcx;
84 m_State.u.x86.auRegs[X86_GREG_xDX] = pInitialCtx->rdx;
85 m_State.u.x86.auRegs[X86_GREG_xBX] = pInitialCtx->rbx;
86 m_State.u.x86.auRegs[X86_GREG_xSP] = pInitialCtx->rsp;
87 m_State.u.x86.auRegs[X86_GREG_xBP] = pInitialCtx->rbp;
88 m_State.u.x86.auRegs[X86_GREG_xSI] = pInitialCtx->rsi;
89 m_State.u.x86.auRegs[X86_GREG_xDI] = pInitialCtx->rdi;
90 m_State.u.x86.auRegs[X86_GREG_x8 ] = pInitialCtx->r8;
91 m_State.u.x86.auRegs[X86_GREG_x9 ] = pInitialCtx->r9;
92 m_State.u.x86.auRegs[X86_GREG_x10] = pInitialCtx->r10;
93 m_State.u.x86.auRegs[X86_GREG_x11] = pInitialCtx->r11;
94 m_State.u.x86.auRegs[X86_GREG_x12] = pInitialCtx->r12;
95 m_State.u.x86.auRegs[X86_GREG_x13] = pInitialCtx->r13;
96 m_State.u.x86.auRegs[X86_GREG_x14] = pInitialCtx->r14;
97 m_State.u.x86.auRegs[X86_GREG_x15] = pInitialCtx->r15;
98 m_State.uPc = pInitialCtx->rip;
99 m_State.u.x86.uRFlags = pInitialCtx->rflags.u;
100 m_State.u.x86.auSegs[X86_SREG_ES] = pInitialCtx->es.Sel;
101 m_State.u.x86.auSegs[X86_SREG_CS] = pInitialCtx->cs.Sel;
102 m_State.u.x86.auSegs[X86_SREG_SS] = pInitialCtx->ss.Sel;
103 m_State.u.x86.auSegs[X86_SREG_DS] = pInitialCtx->ds.Sel;
104 m_State.u.x86.auSegs[X86_SREG_GS] = pInitialCtx->gs.Sel;
105 m_State.u.x86.auSegs[X86_SREG_FS] = pInitialCtx->fs.Sel;
106 m_State.u.x86.fRealOrV86 = CPUMIsGuestInRealOrV86ModeEx(pInitialCtx);
107 }
108 else if (hAs == DBGF_AS_R0)
109 VMMR3InitR0StackUnwindState(pUVM, idCpu, &m_State);
110
111 m_pUVM = pUVM;
112 m_idCpu = idCpu;
113 m_hAs = DBGFR3AsResolveAndRetain(pUVM, hAs);
114 m_pInitialCtx = pInitialCtx;
115 m_fIsHostRing0 = hAs == DBGF_AS_R0;
116 m_uOsScratch = 0;
117
118 m_hCached = NIL_RTDBGMOD;
119 m_uCachedMapping = 0;
120 m_cbCachedMapping = 0;
121 m_pbCachedInfo = NULL;
122 m_cbCachedInfo = 0;
123 m_paFunctions = NULL;
124 m_cFunctions = 0;
125 }
126
127 ~DBGFUNWINDCTX();
128
129} DBGFUNWINDCTX;
130/** Pointer to unwind context. */
131typedef DBGFUNWINDCTX *PDBGFUNWINDCTX;
132
133
134static void dbgfR3UnwindCtxFlushCache(PDBGFUNWINDCTX pUnwindCtx)
135{
136 if (pUnwindCtx->m_hCached != NIL_RTDBGMOD)
137 {
138 RTDbgModRelease(pUnwindCtx->m_hCached);
139 pUnwindCtx->m_hCached = NIL_RTDBGMOD;
140 }
141 if (pUnwindCtx->m_pbCachedInfo)
142 {
143 RTMemFree(pUnwindCtx->m_pbCachedInfo);
144 pUnwindCtx->m_pbCachedInfo = NULL;
145 }
146 pUnwindCtx->m_cbCachedInfo = 0;
147 pUnwindCtx->m_paFunctions = NULL;
148 pUnwindCtx->m_cFunctions = 0;
149}
150
151
152DBGFUNWINDCTX::~DBGFUNWINDCTX()
153{
154 dbgfR3UnwindCtxFlushCache(this);
155 if (m_hAs != NIL_RTDBGAS)
156 {
157 RTDbgAsRelease(m_hAs);
158 m_hAs = NIL_RTDBGAS;
159 }
160}
161
162
163/**
164 * @interface_method_impl{RTDBGUNWINDSTATE,pfnReadStack}
165 */
166static DECLCALLBACK(int) dbgfR3StackReadCallback(PRTDBGUNWINDSTATE pThis, RTUINTPTR uSp, size_t cbToRead, void *pvDst)
167{
168 Assert( pThis->enmArch == RTLDRARCH_AMD64
169 || pThis->enmArch == RTLDRARCH_X86_32);
170
171 PDBGFUNWINDCTX pUnwindCtx = (PDBGFUNWINDCTX)pThis->pvUser;
172 DBGFADDRESS SrcAddr;
173 int rc = VINF_SUCCESS;
174 if (pUnwindCtx->m_fIsHostRing0)
175 DBGFR3AddrFromHostR0(&SrcAddr, uSp);
176 else
177 {
178 if ( pThis->enmArch == RTLDRARCH_X86_32
179 || pThis->enmArch == RTLDRARCH_X86_16)
180 {
181 if (!pThis->u.x86.fRealOrV86)
182 rc = DBGFR3AddrFromSelOff(pUnwindCtx->m_pUVM, pUnwindCtx->m_idCpu, &SrcAddr, pThis->u.x86.auSegs[X86_SREG_SS], uSp);
183 else
184 DBGFR3AddrFromFlat(pUnwindCtx->m_pUVM, &SrcAddr, uSp + ((uint32_t)pThis->u.x86.auSegs[X86_SREG_SS] << 4));
185 }
186 else
187 DBGFR3AddrFromFlat(pUnwindCtx->m_pUVM, &SrcAddr, uSp);
188 }
189 if (RT_SUCCESS(rc))
190 rc = DBGFR3MemRead(pUnwindCtx->m_pUVM, pUnwindCtx->m_idCpu, &SrcAddr, pvDst, cbToRead);
191 return rc;
192}
193
194
195/**
196 * Sets PC and SP.
197 *
198 * @returns true.
199 * @param pUnwindCtx The unwind context.
200 * @param pAddrPC The program counter (PC) value to set.
201 * @param pAddrStack The stack pointer (SP) value to set.
202 */
203static bool dbgfR3UnwindCtxSetPcAndSp(PDBGFUNWINDCTX pUnwindCtx, PCDBGFADDRESS pAddrPC, PCDBGFADDRESS pAddrStack)
204{
205 Assert( pUnwindCtx->m_State.enmArch == RTLDRARCH_AMD64
206 || pUnwindCtx->m_State.enmArch == RTLDRARCH_X86_32);
207
208 if (!DBGFADDRESS_IS_FAR(pAddrPC))
209 pUnwindCtx->m_State.uPc = pAddrPC->FlatPtr;
210 else
211 {
212 pUnwindCtx->m_State.uPc = pAddrPC->off;
213 pUnwindCtx->m_State.u.x86.auSegs[X86_SREG_CS] = pAddrPC->Sel;
214 }
215 if (!DBGFADDRESS_IS_FAR(pAddrStack))
216 pUnwindCtx->m_State.u.x86.auRegs[X86_GREG_xSP] = pAddrStack->FlatPtr;
217 else
218 {
219 pUnwindCtx->m_State.u.x86.auRegs[X86_GREG_xSP] = pAddrStack->off;
220 pUnwindCtx->m_State.u.x86.auSegs[X86_SREG_SS] = pAddrStack->Sel;
221 }
222 return true;
223}
224
225
226/**
227 * Try read a 16-bit value off the stack.
228 *
229 * @returns pfnReadStack result.
230 * @param pThis The unwind state.
231 * @param uSrcAddr The stack address.
232 * @param puDst The read destination.
233 */
234DECLINLINE(int) dbgUnwindLoadStackU16(PRTDBGUNWINDSTATE pThis, uint64_t uSrcAddr, uint16_t *puDst)
235{
236 return pThis->pfnReadStack(pThis, uSrcAddr, sizeof(*puDst), puDst);
237}
238
239
240/**
241 * Try read a 64-bit value off the stack.
242 *
243 * @returns pfnReadStack result.
244 * @param pThis The unwind state.
245 * @param uSrcAddr The stack address.
246 * @param puDst The read destination.
247 */
248DECLINLINE(int) dbgUnwindLoadStackU64(PRTDBGUNWINDSTATE pThis, uint64_t uSrcAddr, uint64_t *puDst)
249{
250 return pThis->pfnReadStack(pThis, uSrcAddr, sizeof(*puDst), puDst);
251}
252
253
254/**
255 * Binary searches the lookup table.
256 *
257 * @returns RVA of unwind info on success, UINT32_MAX on failure.
258 * @param paFunctions The table to lookup @a uRva in.
259 * @param iEnd Size of the table.
260 * @param uRva The RVA of the function we want.
261 */
262DECLINLINE(PCIMAGE_RUNTIME_FUNCTION_ENTRY)
263dbgfR3UnwindCtxLookupUnwindInfoRva(PCIMAGE_RUNTIME_FUNCTION_ENTRY paFunctions, size_t iEnd, uint32_t uRva)
264{
265 size_t iBegin = 0;
266 while (iBegin < iEnd)
267 {
268 size_t const i = iBegin + (iEnd - iBegin) / 2;
269 PCIMAGE_RUNTIME_FUNCTION_ENTRY pEntry = &paFunctions[i];
270 if (uRva < pEntry->BeginAddress)
271 iEnd = i;
272 else if (uRva > pEntry->EndAddress)
273 iBegin = i + 1;
274 else
275 return pEntry;
276 }
277 return NULL;
278}
279
280
281/**
282 * Processes an IRET frame.
283 *
284 * @returns true.
285 * @param pThis The unwind state being worked.
286 * @param fErrCd Non-zero if there is an error code on the stack.
287 */
288static bool dbgUnwindPeAmd64DoOneIRet(PRTDBGUNWINDSTATE pThis, uint8_t fErrCd)
289{
290 Assert(fErrCd <= 1);
291 if (!fErrCd)
292 pThis->u.x86.Loaded.s.fErrCd = 0;
293 else
294 {
295 pThis->u.x86.uErrCd = 0;
296 pThis->u.x86.Loaded.s.fErrCd = 1;
297 dbgUnwindLoadStackU64(pThis, pThis->u.x86.auRegs[X86_GREG_xSP], &pThis->u.x86.uErrCd);
298 pThis->u.x86.auRegs[X86_GREG_xSP] += 8;
299 }
300
301 pThis->enmRetType = RTDBGRETURNTYPE_IRET64;
302 pThis->u.x86.FrameAddr.off = pThis->u.x86.auRegs[X86_GREG_xSP] - /* pretend rbp is pushed on the stack */ 8;
303 pThis->u.x86.FrameAddr.sel = pThis->u.x86.auSegs[X86_SREG_SS];
304
305 dbgUnwindLoadStackU64(pThis, pThis->u.x86.auRegs[X86_GREG_xSP], &pThis->uPc);
306 pThis->u.x86.auRegs[X86_GREG_xSP] += 8; /* RIP */
307
308 dbgUnwindLoadStackU16(pThis, pThis->u.x86.auRegs[X86_GREG_xSP], &pThis->u.x86.auSegs[X86_SREG_CS]);
309 pThis->u.x86.auRegs[X86_GREG_xSP] += 8; /* CS */
310
311 dbgUnwindLoadStackU64(pThis, pThis->u.x86.auRegs[X86_GREG_xSP], &pThis->u.x86.uRFlags);
312 pThis->u.x86.auRegs[X86_GREG_xSP] += 8; /* EFLAGS */
313
314 uint64_t uNewRsp = (pThis->u.x86.auRegs[X86_GREG_xSP] - 8) & ~(uint64_t)15;
315 dbgUnwindLoadStackU64(pThis, pThis->u.x86.auRegs[X86_GREG_xSP], &uNewRsp);
316 pThis->u.x86.auRegs[X86_GREG_xSP] += 8; /* RSP */
317
318 dbgUnwindLoadStackU16(pThis, pThis->u.x86.auRegs[X86_GREG_xSP], &pThis->u.x86.auSegs[X86_SREG_SS]);
319 pThis->u.x86.auRegs[X86_GREG_xSP] += 8; /* SS */
320
321 pThis->u.x86.auRegs[X86_GREG_xSP] = uNewRsp;
322
323 pThis->u.x86.Loaded.s.fRegs |= RT_BIT(X86_GREG_xSP);
324 pThis->u.x86.Loaded.s.fSegs |= RT_BIT(X86_SREG_CS) | RT_BIT(X86_SREG_SS);
325 pThis->u.x86.Loaded.s.fPc = 1;
326 pThis->u.x86.Loaded.s.fFrameAddr = 1;
327 pThis->u.x86.Loaded.s.fRFlags = 1;
328 return true;
329}
330
331
332/**
333 * Unwinds one frame using cached module info.
334 *
335 * @returns true on success, false on failure.
336 * @param hMod The debug module to retrieve unwind info from.
337 * @param paFunctions The table to lookup @a uRvaRip in.
338 * @param cFunctions Size of the lookup table.
339 * @param pThis The unwind state.
340 * @param uRvaRip The RVA of the RIP.
341 *
342 * @todo Move this down to IPRT in the ldrPE.cpp / dbgmodcodeview.cpp area.
343 */
344static bool dbgUnwindPeAmd64DoOne(RTDBGMOD hMod, PCIMAGE_RUNTIME_FUNCTION_ENTRY paFunctions, size_t cFunctions,
345 PRTDBGUNWINDSTATE pThis, uint32_t uRvaRip)
346{
347 /*
348 * Lookup the unwind info RVA and try read it.
349 */
350 PCIMAGE_RUNTIME_FUNCTION_ENTRY pEntry = dbgfR3UnwindCtxLookupUnwindInfoRva(paFunctions, cFunctions, uRvaRip);
351 if (pEntry)
352 {
353 IMAGE_RUNTIME_FUNCTION_ENTRY ChainedEntry;
354 unsigned iFrameReg = ~0U;
355 unsigned offFrameReg = 0;
356
357 int fInEpilog = -1; /* -1: not-determined-assume-false; 0: false; 1: true. */
358 uint8_t cbEpilog = 0;
359 uint8_t offEpilog = UINT8_MAX;
360 for (unsigned cChainLoops = 0; ; cChainLoops++)
361 {
362 /*
363 * Get the info.
364 */
365 union
366 {
367 uint32_t uRva;
368 uint8_t ab[ RT_OFFSETOF(IMAGE_UNWIND_INFO, aOpcodes)
369 + sizeof(IMAGE_UNWIND_CODE) * 256
370 + sizeof(IMAGE_RUNTIME_FUNCTION_ENTRY)];
371 } uBuf;
372
373 uBuf.uRva = pEntry->UnwindInfoAddress;
374 size_t cbBuf = sizeof(uBuf);
375 int rc = RTDbgModImageQueryProp(hMod, RTLDRPROP_UNWIND_INFO, &uBuf, cbBuf, &cbBuf);
376 if (RT_FAILURE(rc))
377 return false;
378
379 /*
380 * Check the info.
381 */
382 ASMCompilerBarrier(); /* we're aliasing */
383 PCIMAGE_UNWIND_INFO pInfo = (PCIMAGE_UNWIND_INFO)&uBuf;
384
385 if (pInfo->Version != 1 && pInfo->Version != 2)
386 return false;
387
388 /*
389 * Execute the opcodes.
390 */
391 unsigned const cOpcodes = pInfo->CountOfCodes;
392 unsigned iOpcode = 0;
393
394 /*
395 * Check for epilog opcodes at the start and see if we're in an epilog.
396 */
397 if ( pInfo->Version >= 2
398 && iOpcode < cOpcodes
399 && pInfo->aOpcodes[iOpcode].u.UnwindOp == IMAGE_AMD64_UWOP_EPILOG)
400 {
401 if (fInEpilog == -1)
402 {
403 cbEpilog = pInfo->aOpcodes[iOpcode].u.CodeOffset;
404 Assert(cbEpilog > 0);
405
406 uint32_t uRvaEpilog = pEntry->EndAddress - cbEpilog;
407 iOpcode++;
408 if ( (pInfo->aOpcodes[iOpcode - 1].u.OpInfo & 1)
409 && uRvaRip >= uRvaEpilog)
410 {
411 offEpilog = uRvaRip - uRvaEpilog;
412 fInEpilog = 1;
413 }
414 else
415 {
416 fInEpilog = 0;
417 while (iOpcode < cOpcodes && pInfo->aOpcodes[iOpcode].u.UnwindOp == IMAGE_AMD64_UWOP_EPILOG)
418 {
419 uRvaEpilog = pEntry->EndAddress
420 - (pInfo->aOpcodes[iOpcode].u.CodeOffset + (pInfo->aOpcodes[iOpcode].u.OpInfo << 8));
421 iOpcode++;
422 if (uRvaRip - uRvaEpilog < cbEpilog)
423 {
424 offEpilog = uRvaRip - uRvaEpilog;
425 fInEpilog = 1;
426 break;
427 }
428 }
429 }
430 }
431 while (iOpcode < cOpcodes && pInfo->aOpcodes[iOpcode].u.UnwindOp == IMAGE_AMD64_UWOP_EPILOG)
432 iOpcode++;
433 }
434 if (fInEpilog != 1)
435 {
436 /*
437 * Skip opcodes that doesn't apply to us if we're in the prolog.
438 */
439 uint32_t offPc = uRvaRip - pEntry->BeginAddress;
440 if (offPc < pInfo->SizeOfProlog)
441 while (iOpcode < cOpcodes && pInfo->aOpcodes[iOpcode].u.CodeOffset > offPc)
442 iOpcode++;
443
444 /*
445 * Execute the opcodes.
446 */
447 if (pInfo->FrameRegister != 0)
448 {
449 iFrameReg = pInfo->FrameRegister;
450 offFrameReg = pInfo->FrameOffset * 16;
451 }
452 while (iOpcode < cOpcodes)
453 {
454 Assert(pInfo->aOpcodes[iOpcode].u.CodeOffset <= offPc);
455 uint8_t const uOpInfo = pInfo->aOpcodes[iOpcode].u.OpInfo;
456 uint8_t const uUnwindOp = pInfo->aOpcodes[iOpcode].u.UnwindOp;
457 switch (uUnwindOp)
458 {
459 case IMAGE_AMD64_UWOP_PUSH_NONVOL:
460 dbgUnwindLoadStackU64(pThis, pThis->u.x86.auRegs[X86_GREG_xSP], &pThis->u.x86.auRegs[uOpInfo]);
461 pThis->u.x86.Loaded.s.fRegs |= RT_BIT(uOpInfo);
462 pThis->u.x86.auRegs[X86_GREG_xSP] += 8;
463 iOpcode++;
464 break;
465
466 case IMAGE_AMD64_UWOP_ALLOC_LARGE:
467 if (uOpInfo == 0)
468 {
469 iOpcode += 2;
470 AssertBreak(iOpcode <= cOpcodes);
471 pThis->u.x86.auRegs[X86_GREG_xSP] += pInfo->aOpcodes[iOpcode - 1].FrameOffset * 8;
472 }
473 else
474 {
475 iOpcode += 3;
476 AssertBreak(iOpcode <= cOpcodes);
477 pThis->u.x86.auRegs[X86_GREG_xSP] += RT_MAKE_U32(pInfo->aOpcodes[iOpcode - 2].FrameOffset,
478 pInfo->aOpcodes[iOpcode - 1].FrameOffset);
479 }
480 break;
481
482 case IMAGE_AMD64_UWOP_ALLOC_SMALL:
483 AssertBreak(iOpcode <= cOpcodes);
484 pThis->u.x86.auRegs[X86_GREG_xSP] += uOpInfo * 8 + 8;
485 iOpcode++;
486 break;
487
488 case IMAGE_AMD64_UWOP_SET_FPREG:
489 iFrameReg = uOpInfo;
490 offFrameReg = pInfo->FrameOffset * 16;
491 iOpcode++;
492 break;
493
494 case IMAGE_AMD64_UWOP_SAVE_NONVOL:
495 case IMAGE_AMD64_UWOP_SAVE_NONVOL_FAR:
496 {
497 uint32_t off = 0;
498 iOpcode++;
499 if (iOpcode < cOpcodes)
500 {
501 off = pInfo->aOpcodes[iOpcode].FrameOffset;
502 iOpcode++;
503 if (uUnwindOp == IMAGE_AMD64_UWOP_SAVE_NONVOL_FAR && iOpcode < cOpcodes)
504 {
505 off |= (uint32_t)pInfo->aOpcodes[iOpcode].FrameOffset << 16;
506 iOpcode++;
507 }
508 }
509 off *= 8;
510 dbgUnwindLoadStackU64(pThis, pThis->u.x86.auRegs[X86_GREG_xSP] + off, &pThis->u.x86.auRegs[uOpInfo]);
511 pThis->u.x86.Loaded.s.fRegs |= RT_BIT(uOpInfo);
512 break;
513 }
514
515 case IMAGE_AMD64_UWOP_SAVE_XMM128:
516 iOpcode += 2;
517 break;
518
519 case IMAGE_AMD64_UWOP_SAVE_XMM128_FAR:
520 iOpcode += 3;
521 break;
522
523 case IMAGE_AMD64_UWOP_PUSH_MACHFRAME:
524 return dbgUnwindPeAmd64DoOneIRet(pThis, uOpInfo);
525
526 case IMAGE_AMD64_UWOP_EPILOG:
527 iOpcode += 1;
528 break;
529
530 case IMAGE_AMD64_UWOP_RESERVED_7:
531 AssertFailedReturn(false);
532
533 default:
534 AssertMsgFailedReturn(("%u\n", uUnwindOp), false);
535 }
536 }
537 }
538 else
539 {
540 /*
541 * We're in the POP sequence of an epilog. The POP sequence should
542 * mirror the PUSH sequence exactly.
543 *
544 * Note! We should only end up here for the initial frame (just consider
545 * RSP, stack allocations, non-volatile register restores, ++).
546 */
547 while (iOpcode < cOpcodes)
548 {
549 uint8_t const uOpInfo = pInfo->aOpcodes[iOpcode].u.OpInfo;
550 uint8_t const uUnwindOp = pInfo->aOpcodes[iOpcode].u.UnwindOp;
551 switch (uUnwindOp)
552 {
553 case IMAGE_AMD64_UWOP_PUSH_NONVOL:
554 pThis->u.x86.auRegs[X86_GREG_xSP] += 8;
555 if (offEpilog == 0)
556 {
557 dbgUnwindLoadStackU64(pThis, pThis->u.x86.auRegs[X86_GREG_xSP], &pThis->u.x86.auRegs[uOpInfo]);
558 pThis->u.x86.Loaded.s.fRegs |= RT_BIT(uOpInfo);
559 }
560 else
561 {
562 /* Decrement offEpilog by estimated POP instruction length. */
563 offEpilog -= 1;
564 if (offEpilog > 0 && uOpInfo >= 8)
565 offEpilog -= 1;
566 }
567 iOpcode++;
568 break;
569
570 case IMAGE_AMD64_UWOP_PUSH_MACHFRAME: /* Must terminate an epilog, so always execute this. */
571 return dbgUnwindPeAmd64DoOneIRet(pThis, uOpInfo);
572
573 case IMAGE_AMD64_UWOP_ALLOC_SMALL:
574 case IMAGE_AMD64_UWOP_SET_FPREG:
575 case IMAGE_AMD64_UWOP_EPILOG:
576 iOpcode++;
577 break;
578 case IMAGE_AMD64_UWOP_SAVE_NONVOL:
579 case IMAGE_AMD64_UWOP_SAVE_XMM128:
580 iOpcode += 2;
581 break;
582 case IMAGE_AMD64_UWOP_ALLOC_LARGE:
583 case IMAGE_AMD64_UWOP_SAVE_NONVOL_FAR:
584 case IMAGE_AMD64_UWOP_SAVE_XMM128_FAR:
585 iOpcode += 3;
586 break;
587
588 default:
589 AssertMsgFailedReturn(("%u\n", uUnwindOp), false);
590 }
591 }
592 }
593
594 /*
595 * Chained stuff?
596 */
597 if (!(pInfo->Flags & IMAGE_UNW_FLAGS_CHAININFO))
598 break;
599 ChainedEntry = *(PCIMAGE_RUNTIME_FUNCTION_ENTRY)&pInfo->aOpcodes[(cOpcodes + 1) & ~1];
600 pEntry = &ChainedEntry;
601 AssertReturn(cChainLoops < 32, false);
602 }
603
604 /*
605 * RSP should now give us the return address, so perform a RET.
606 */
607 pThis->enmRetType = RTDBGRETURNTYPE_NEAR64;
608
609 pThis->u.x86.FrameAddr.off = pThis->u.x86.auRegs[X86_GREG_xSP] - /* pretend rbp is pushed on the stack */ 8;
610 pThis->u.x86.FrameAddr.sel = pThis->u.x86.auSegs[X86_SREG_SS];
611 pThis->u.x86.Loaded.s.fFrameAddr = 1;
612
613 dbgUnwindLoadStackU64(pThis, pThis->u.x86.auRegs[X86_GREG_xSP], &pThis->uPc);
614 pThis->u.x86.auRegs[X86_GREG_xSP] += 8;
615 pThis->u.x86.Loaded.s.fPc = 1;
616 return true;
617 }
618
619 return false;
620}
621
622
623/**
624 * Tries to unwind one frame using unwind info.
625 *
626 * @returns true on success, false on failure.
627 * @param pUnwindCtx The unwind context.
628 */
629static bool dbgfR3UnwindCtxDoOneFrame(PDBGFUNWINDCTX pUnwindCtx)
630{
631 /*
632 * Hope for the same module as last time around.
633 */
634 RTUINTPTR offCache = pUnwindCtx->m_State.uPc - pUnwindCtx->m_uCachedMapping;
635 if (offCache < pUnwindCtx->m_cbCachedMapping)
636 return dbgUnwindPeAmd64DoOne(pUnwindCtx->m_hCached, pUnwindCtx->m_paFunctions, pUnwindCtx->m_cFunctions,
637 &pUnwindCtx->m_State, offCache);
638
639 /*
640 * Try locate the module.
641 */
642 RTDBGMOD hDbgMod = NIL_RTDBGMOD;
643 RTUINTPTR uBase = 0;
644 RTDBGSEGIDX idxSeg = NIL_RTDBGSEGIDX;
645 int rc = RTDbgAsModuleByAddr(pUnwindCtx->m_hAs, pUnwindCtx->m_State.uPc, &hDbgMod, &uBase, &idxSeg);
646 if (RT_SUCCESS(rc))
647 {
648 /* We cache the module regardless of unwind info. */
649 dbgfR3UnwindCtxFlushCache(pUnwindCtx);
650 pUnwindCtx->m_hCached = hDbgMod;
651 pUnwindCtx->m_uCachedMapping = uBase;
652 pUnwindCtx->m_cbCachedMapping = idxSeg == NIL_RTDBGSEGIDX ? RTDbgModImageSize(hDbgMod)
653 : RTDbgModSegmentSize(hDbgMod, idxSeg);
654
655 /* Play simple for now. */
656 if ( idxSeg == NIL_RTDBGSEGIDX
657 && RTDbgModImageGetFormat(hDbgMod) == RTLDRFMT_PE
658 && RTDbgModImageGetArch(hDbgMod) == RTLDRARCH_AMD64)
659 {
660 /*
661 * Try query the unwind data.
662 */
663 uint32_t uDummy;
664 size_t cbNeeded = 0;
665 rc = RTDbgModImageQueryProp(hDbgMod, RTLDRPROP_UNWIND_TABLE, &uDummy, 0, &cbNeeded);
666 if ( rc == VERR_BUFFER_OVERFLOW
667 && cbNeeded >= sizeof(*pUnwindCtx->m_paFunctions)
668 && cbNeeded < _64M)
669 {
670 void *pvBuf = RTMemAllocZ(cbNeeded + 32);
671 if (pvBuf)
672 {
673 rc = RTDbgModImageQueryProp(hDbgMod, RTLDRPROP_UNWIND_TABLE, pvBuf, cbNeeded + 32, &cbNeeded);
674 if (RT_SUCCESS(rc))
675 {
676 pUnwindCtx->m_pbCachedInfo = (uint8_t *)pvBuf;
677 pUnwindCtx->m_cbCachedInfo = cbNeeded;
678 pUnwindCtx->m_paFunctions = (PCIMAGE_RUNTIME_FUNCTION_ENTRY)pvBuf;
679 pUnwindCtx->m_cFunctions = cbNeeded / sizeof(*pUnwindCtx->m_paFunctions);
680
681 return dbgUnwindPeAmd64DoOne(pUnwindCtx->m_hCached, pUnwindCtx->m_paFunctions, pUnwindCtx->m_cFunctions,
682 &pUnwindCtx->m_State, pUnwindCtx->m_State.uPc - pUnwindCtx->m_uCachedMapping);
683 }
684 RTMemFree(pvBuf);
685 }
686 }
687 }
688 }
689 return false;
690}
691
692
693/**
694 * Read stack memory, will init entire buffer.
695 */
696DECLINLINE(int) dbgfR3StackRead(PUVM pUVM, VMCPUID idCpu, void *pvBuf, PCDBGFADDRESS pSrcAddr, size_t cb, size_t *pcbRead)
697{
698 int rc = DBGFR3MemRead(pUVM, idCpu, pSrcAddr, pvBuf, cb);
699 if (RT_FAILURE(rc))
700 {
701 /* fallback: byte by byte and zero the ones we fail to read. */
702 size_t cbRead;
703 for (cbRead = 0; cbRead < cb; cbRead++)
704 {
705 DBGFADDRESS Addr = *pSrcAddr;
706 rc = DBGFR3MemRead(pUVM, idCpu, DBGFR3AddrAdd(&Addr, cbRead), (uint8_t *)pvBuf + cbRead, 1);
707 if (RT_FAILURE(rc))
708 break;
709 }
710 if (cbRead)
711 rc = VINF_SUCCESS;
712 memset((char *)pvBuf + cbRead, 0, cb - cbRead);
713 *pcbRead = cbRead;
714 }
715 else
716 *pcbRead = cb;
717 return rc;
718}
719
720/**
721 * Collects sure registers on frame exit.
722 *
723 * @returns VINF_SUCCESS or VERR_NO_MEMORY.
724 * @param pUVM The user mode VM handle for the allocation.
725 * @param pFrame The frame in question.
726 * @param pState The unwind state.
727 */
728static int dbgfR3StackWalkCollectRegisterChanges(PUVM pUVM, PDBGFSTACKFRAME pFrame, PRTDBGUNWINDSTATE pState)
729{
730 pFrame->cSureRegs = 0;
731 pFrame->paSureRegs = NULL;
732
733 if ( pState->enmArch == RTLDRARCH_AMD64
734 || pState->enmArch == RTLDRARCH_X86_32
735 || pState->enmArch == RTLDRARCH_X86_16)
736 {
737 if (pState->u.x86.Loaded.fAll)
738 {
739 /*
740 * Count relevant registers.
741 */
742 uint32_t cRegs = 0;
743 if (pState->u.x86.Loaded.s.fRegs)
744 for (uint32_t f = 1; f < RT_BIT_32(RT_ELEMENTS(pState->u.x86.auRegs)); f <<= 1)
745 if (pState->u.x86.Loaded.s.fRegs & f)
746 cRegs++;
747 if (pState->u.x86.Loaded.s.fSegs)
748 for (uint32_t f = 1; f < RT_BIT_32(RT_ELEMENTS(pState->u.x86.auSegs)); f <<= 1)
749 if (pState->u.x86.Loaded.s.fSegs & f)
750 cRegs++;
751 if (pState->u.x86.Loaded.s.fRFlags)
752 cRegs++;
753 if (pState->u.x86.Loaded.s.fErrCd)
754 cRegs++;
755 if (cRegs > 0)
756 {
757 /*
758 * Allocate the arrays.
759 */
760 PDBGFREGVALEX paSureRegs = (PDBGFREGVALEX)MMR3HeapAllocZU(pUVM, MM_TAG_DBGF_STACK, sizeof(DBGFREGVALEX) * cRegs);
761 AssertReturn(paSureRegs, VERR_NO_MEMORY);
762 pFrame->paSureRegs = paSureRegs;
763 pFrame->cSureRegs = cRegs;
764
765 /*
766 * Popuplate the arrays.
767 */
768 uint32_t iReg = 0;
769 if (pState->u.x86.Loaded.s.fRegs)
770 for (uint32_t i = 1; i < RT_ELEMENTS(pState->u.x86.auRegs); i++)
771 if (pState->u.x86.Loaded.s.fRegs & RT_BIT(i))
772 {
773 paSureRegs[iReg].Value.u64 = pState->u.x86.auRegs[i];
774 paSureRegs[iReg].enmType = DBGFREGVALTYPE_U64;
775 paSureRegs[iReg].enmReg = (DBGFREG)(DBGFREG_RAX + i);
776 iReg++;
777 }
778
779 if (pState->u.x86.Loaded.s.fSegs)
780 for (uint32_t i = 1; i < RT_ELEMENTS(pState->u.x86.auSegs); i++)
781 if (pState->u.x86.Loaded.s.fSegs & RT_BIT(i))
782 {
783 paSureRegs[iReg].Value.u16 = pState->u.x86.auSegs[i];
784 paSureRegs[iReg].enmType = DBGFREGVALTYPE_U16;
785 switch (i)
786 {
787 case X86_SREG_ES: paSureRegs[iReg].enmReg = DBGFREG_ES; break;
788 case X86_SREG_CS: paSureRegs[iReg].enmReg = DBGFREG_CS; break;
789 case X86_SREG_SS: paSureRegs[iReg].enmReg = DBGFREG_SS; break;
790 case X86_SREG_DS: paSureRegs[iReg].enmReg = DBGFREG_DS; break;
791 case X86_SREG_FS: paSureRegs[iReg].enmReg = DBGFREG_FS; break;
792 case X86_SREG_GS: paSureRegs[iReg].enmReg = DBGFREG_GS; break;
793 default: AssertFailedBreak();
794 }
795 iReg++;
796 }
797
798 if (iReg < cRegs)
799 {
800 if (pState->u.x86.Loaded.s.fRFlags)
801 {
802 paSureRegs[iReg].Value.u64 = pState->u.x86.uRFlags;
803 paSureRegs[iReg].enmType = DBGFREGVALTYPE_U64;
804 paSureRegs[iReg].enmReg = DBGFREG_RFLAGS;
805 iReg++;
806 }
807 if (pState->u.x86.Loaded.s.fErrCd)
808 {
809 paSureRegs[iReg].Value.u64 = pState->u.x86.uErrCd;
810 paSureRegs[iReg].enmType = DBGFREGVALTYPE_U64;
811 paSureRegs[iReg].enmReg = DBGFREG_END;
812 paSureRegs[iReg].pszName = "trap-errcd";
813 iReg++;
814 }
815 }
816 Assert(iReg == cRegs);
817 }
818 }
819 }
820
821 return VINF_SUCCESS;
822}
823
824
825/**
826 * Internal worker routine.
827 *
828 * On x86 the typical stack frame layout is like this:
829 * .. ..
830 * 16 parameter 2
831 * 12 parameter 1
832 * 8 parameter 0
833 * 4 return address
834 * 0 old ebp; current ebp points here
835 */
836DECL_NO_INLINE(static, int) dbgfR3StackWalk(PDBGFUNWINDCTX pUnwindCtx, PDBGFSTACKFRAME pFrame, bool fFirst)
837{
838 /*
839 * Stop if we got a read error in the previous run.
840 */
841 if (pFrame->fFlags & DBGFSTACKFRAME_FLAGS_LAST)
842 return VERR_NO_MORE_FILES;
843
844 /*
845 * Advance the frame (except for the first).
846 */
847 if (!fFirst) /** @todo we can probably eliminate this fFirst business... */
848 {
849 /* frame, pc and stack is taken from the existing frames return members. */
850 pFrame->AddrFrame = pFrame->AddrReturnFrame;
851 pFrame->AddrPC = pFrame->AddrReturnPC;
852 pFrame->pSymPC = pFrame->pSymReturnPC;
853 pFrame->pLinePC = pFrame->pLineReturnPC;
854
855 /* increment the frame number. */
856 pFrame->iFrame++;
857
858 /* UNWIND_INFO_RET -> USED_UNWIND; return type */
859 if (!(pFrame->fFlags & DBGFSTACKFRAME_FLAGS_UNWIND_INFO_RET))
860 pFrame->fFlags &= ~DBGFSTACKFRAME_FLAGS_USED_UNWIND_INFO;
861 else
862 {
863 pFrame->fFlags |= DBGFSTACKFRAME_FLAGS_USED_UNWIND_INFO;
864 pFrame->fFlags &= ~DBGFSTACKFRAME_FLAGS_UNWIND_INFO_RET;
865 if (pFrame->enmReturnFrameReturnType != RTDBGRETURNTYPE_INVALID)
866 {
867 pFrame->enmReturnType = pFrame->enmReturnFrameReturnType;
868 pFrame->enmReturnFrameReturnType = RTDBGRETURNTYPE_INVALID;
869 }
870 }
871 pFrame->fFlags &= ~DBGFSTACKFRAME_FLAGS_TRAP_FRAME;
872 }
873
874 /*
875 * Figure the return address size and use the old PC to guess stack item size.
876 */
877 /** @todo this is bogus... */
878 unsigned cbRetAddr = RTDbgReturnTypeSize(pFrame->enmReturnType);
879 unsigned cbStackItem;
880 switch (pFrame->AddrPC.fFlags & DBGFADDRESS_FLAGS_TYPE_MASK)
881 {
882 case DBGFADDRESS_FLAGS_FAR16: cbStackItem = 2; break;
883 case DBGFADDRESS_FLAGS_FAR32: cbStackItem = 4; break;
884 case DBGFADDRESS_FLAGS_FAR64: cbStackItem = 8; break;
885 case DBGFADDRESS_FLAGS_RING0: cbStackItem = sizeof(RTHCUINTPTR); break;
886 default:
887 switch (pFrame->enmReturnType)
888 {
889 case RTDBGRETURNTYPE_FAR16:
890 case RTDBGRETURNTYPE_IRET16:
891 case RTDBGRETURNTYPE_IRET32_V86:
892 case RTDBGRETURNTYPE_NEAR16: cbStackItem = 2; break;
893
894 case RTDBGRETURNTYPE_FAR32:
895 case RTDBGRETURNTYPE_IRET32:
896 case RTDBGRETURNTYPE_IRET32_PRIV:
897 case RTDBGRETURNTYPE_NEAR32: cbStackItem = 4; break;
898
899 case RTDBGRETURNTYPE_FAR64:
900 case RTDBGRETURNTYPE_IRET64:
901 case RTDBGRETURNTYPE_NEAR64: cbStackItem = 8; break;
902
903 default:
904 AssertMsgFailed(("%d\n", pFrame->enmReturnType));
905 cbStackItem = 4;
906 break;
907 }
908 }
909
910 /*
911 * Read the raw frame data.
912 * We double cbRetAddr in case we have a far return.
913 */
914 union
915 {
916 uint64_t *pu64;
917 uint32_t *pu32;
918 uint16_t *pu16;
919 uint8_t *pb;
920 void *pv;
921 } u, uRet, uArgs, uBp;
922 size_t cbRead = cbRetAddr*2 + cbStackItem + sizeof(pFrame->Args);
923 u.pv = alloca(cbRead);
924 uBp = u;
925 uRet.pb = u.pb + cbStackItem;
926 uArgs.pb = u.pb + cbStackItem + cbRetAddr;
927
928 Assert(DBGFADDRESS_IS_VALID(&pFrame->AddrFrame));
929 int rc = dbgfR3StackRead(pUnwindCtx->m_pUVM, pUnwindCtx->m_idCpu, u.pv, &pFrame->AddrFrame, cbRead, &cbRead);
930 if ( RT_FAILURE(rc)
931 || cbRead < cbRetAddr + cbStackItem)
932 pFrame->fFlags |= DBGFSTACKFRAME_FLAGS_LAST;
933
934 /*
935 * Return Frame address.
936 *
937 * If we used unwind info to get here, the unwind register context will be
938 * positioned after the return instruction has been executed. We start by
939 * picking up the rBP register here for return frame and will try improve
940 * on it further down by using unwind info.
941 */
942 pFrame->AddrReturnFrame = pFrame->AddrFrame;
943 if (pFrame->fFlags & DBGFSTACKFRAME_FLAGS_USED_UNWIND_INFO)
944 {
945 if ( pFrame->enmReturnType == RTDBGRETURNTYPE_IRET32_PRIV
946 || pFrame->enmReturnType == RTDBGRETURNTYPE_IRET64)
947 DBGFR3AddrFromSelOff(pUnwindCtx->m_pUVM, pUnwindCtx->m_idCpu, &pFrame->AddrReturnFrame,
948 pUnwindCtx->m_State.u.x86.auSegs[X86_SREG_SS], pUnwindCtx->m_State.u.x86.auRegs[X86_GREG_xBP]);
949 else if (pFrame->enmReturnType == RTDBGRETURNTYPE_IRET32_V86)
950 DBGFR3AddrFromFlat(pUnwindCtx->m_pUVM, &pFrame->AddrReturnFrame,
951 ((uint32_t)pUnwindCtx->m_State.u.x86.auSegs[X86_SREG_SS] << 4)
952 + pUnwindCtx->m_State.u.x86.auRegs[X86_GREG_xBP]);
953 else
954 {
955 pFrame->AddrReturnFrame.off = pUnwindCtx->m_State.u.x86.auRegs[X86_GREG_xBP];
956 pFrame->AddrReturnFrame.FlatPtr += pFrame->AddrReturnFrame.off - pFrame->AddrFrame.off;
957 }
958 }
959 else
960 {
961 switch (cbStackItem)
962 {
963 case 2: pFrame->AddrReturnFrame.off = *uBp.pu16; break;
964 case 4: pFrame->AddrReturnFrame.off = *uBp.pu32; break;
965 case 8: pFrame->AddrReturnFrame.off = *uBp.pu64; break;
966 default: AssertMsgFailedReturn(("cbStackItem=%d\n", cbStackItem), VERR_DBGF_STACK_IPE_1);
967 }
968
969 /* Watcom tries to keep the frame pointer odd for far returns. */
970 if ( cbStackItem <= 4
971 && !(pFrame->fFlags & DBGFSTACKFRAME_FLAGS_USED_UNWIND_INFO))
972 {
973 if (pFrame->AddrReturnFrame.off & 1)
974 {
975 pFrame->AddrReturnFrame.off &= ~(RTGCUINTPTR)1;
976 if (pFrame->enmReturnType == RTDBGRETURNTYPE_NEAR16)
977 {
978 pFrame->fFlags |= DBGFSTACKFRAME_FLAGS_USED_ODD_EVEN;
979 pFrame->enmReturnType = RTDBGRETURNTYPE_FAR16;
980 cbRetAddr = 4;
981 }
982 else if (pFrame->enmReturnType == RTDBGRETURNTYPE_NEAR32)
983 {
984 pFrame->fFlags |= DBGFSTACKFRAME_FLAGS_USED_ODD_EVEN;
985 pFrame->enmReturnType = RTDBGRETURNTYPE_FAR32;
986 cbRetAddr = 8;
987 }
988 }
989 else if (pFrame->fFlags & DBGFSTACKFRAME_FLAGS_USED_ODD_EVEN)
990 {
991 if (pFrame->enmReturnType == RTDBGRETURNTYPE_FAR16)
992 {
993 pFrame->enmReturnType = RTDBGRETURNTYPE_NEAR16;
994 cbRetAddr = 2;
995 }
996 else if (pFrame->enmReturnType == RTDBGRETURNTYPE_NEAR32)
997 {
998 pFrame->enmReturnType = RTDBGRETURNTYPE_FAR32;
999 cbRetAddr = 4;
1000 }
1001 pFrame->fFlags &= ~DBGFSTACKFRAME_FLAGS_USED_ODD_EVEN;
1002 }
1003 uArgs.pb = u.pb + cbStackItem + cbRetAddr;
1004 }
1005
1006 pFrame->AddrReturnFrame.FlatPtr += pFrame->AddrReturnFrame.off - pFrame->AddrFrame.off;
1007 }
1008
1009 /*
1010 * Return Stack Address.
1011 */
1012 pFrame->AddrReturnStack = pFrame->AddrReturnFrame;
1013 if (pFrame->fFlags & DBGFSTACKFRAME_FLAGS_USED_UNWIND_INFO)
1014 {
1015 if ( pFrame->enmReturnType == RTDBGRETURNTYPE_IRET32_PRIV
1016 || pFrame->enmReturnType == RTDBGRETURNTYPE_IRET64)
1017 DBGFR3AddrFromSelOff(pUnwindCtx->m_pUVM, pUnwindCtx->m_idCpu, &pFrame->AddrReturnStack,
1018 pUnwindCtx->m_State.u.x86.auSegs[X86_SREG_SS], pUnwindCtx->m_State.u.x86.auRegs[X86_GREG_xSP]);
1019 else if (pFrame->enmReturnType == RTDBGRETURNTYPE_IRET32_V86)
1020 DBGFR3AddrFromFlat(pUnwindCtx->m_pUVM, &pFrame->AddrReturnStack,
1021 ((uint32_t)pUnwindCtx->m_State.u.x86.auSegs[X86_SREG_SS] << 4)
1022 + pUnwindCtx->m_State.u.x86.auRegs[X86_GREG_xSP]);
1023 else
1024 {
1025 pFrame->AddrReturnStack.off = pUnwindCtx->m_State.u.x86.auRegs[X86_GREG_xSP];
1026 pFrame->AddrReturnStack.FlatPtr += pFrame->AddrReturnStack.off - pFrame->AddrStack.off;
1027 }
1028 }
1029 else
1030 {
1031 pFrame->AddrReturnStack.off += cbStackItem + cbRetAddr;
1032 pFrame->AddrReturnStack.FlatPtr += cbStackItem + cbRetAddr;
1033 }
1034
1035 /*
1036 * Return PC.
1037 */
1038 pFrame->AddrReturnPC = pFrame->AddrPC;
1039 if (pFrame->fFlags & DBGFSTACKFRAME_FLAGS_USED_UNWIND_INFO)
1040 {
1041 if (RTDbgReturnTypeIsNear(pFrame->enmReturnType))
1042 {
1043 pFrame->AddrReturnPC.off = pUnwindCtx->m_State.uPc;
1044 pFrame->AddrReturnPC.FlatPtr += pFrame->AddrReturnPC.off - pFrame->AddrPC.off;
1045 }
1046 else
1047 DBGFR3AddrFromSelOff(pUnwindCtx->m_pUVM, pUnwindCtx->m_idCpu, &pFrame->AddrReturnPC,
1048 pUnwindCtx->m_State.u.x86.auSegs[X86_SREG_CS], pUnwindCtx->m_State.uPc);
1049 }
1050 else
1051 switch (pFrame->enmReturnType)
1052 {
1053 case RTDBGRETURNTYPE_NEAR16:
1054 if (DBGFADDRESS_IS_VALID(&pFrame->AddrReturnPC))
1055 {
1056 pFrame->AddrReturnPC.FlatPtr += *uRet.pu16 - pFrame->AddrReturnPC.off;
1057 pFrame->AddrReturnPC.off = *uRet.pu16;
1058 }
1059 else
1060 DBGFR3AddrFromFlat(pUnwindCtx->m_pUVM, &pFrame->AddrReturnPC, *uRet.pu16);
1061 break;
1062 case RTDBGRETURNTYPE_NEAR32:
1063 if (DBGFADDRESS_IS_VALID(&pFrame->AddrReturnPC))
1064 {
1065 pFrame->AddrReturnPC.FlatPtr += *uRet.pu32 - pFrame->AddrReturnPC.off;
1066 pFrame->AddrReturnPC.off = *uRet.pu32;
1067 }
1068 else
1069 DBGFR3AddrFromFlat(pUnwindCtx->m_pUVM, &pFrame->AddrReturnPC, *uRet.pu32);
1070 break;
1071 case RTDBGRETURNTYPE_NEAR64:
1072 if (DBGFADDRESS_IS_VALID(&pFrame->AddrReturnPC))
1073 {
1074 pFrame->AddrReturnPC.FlatPtr += *uRet.pu64 - pFrame->AddrReturnPC.off;
1075 pFrame->AddrReturnPC.off = *uRet.pu64;
1076 }
1077 else
1078 DBGFR3AddrFromFlat(pUnwindCtx->m_pUVM, &pFrame->AddrReturnPC, *uRet.pu64);
1079 break;
1080 case RTDBGRETURNTYPE_FAR16:
1081 DBGFR3AddrFromSelOff(pUnwindCtx->m_pUVM, pUnwindCtx->m_idCpu, &pFrame->AddrReturnPC, uRet.pu16[1], uRet.pu16[0]);
1082 break;
1083 case RTDBGRETURNTYPE_FAR32:
1084 DBGFR3AddrFromSelOff(pUnwindCtx->m_pUVM, pUnwindCtx->m_idCpu, &pFrame->AddrReturnPC, uRet.pu16[2], uRet.pu32[0]);
1085 break;
1086 case RTDBGRETURNTYPE_FAR64:
1087 DBGFR3AddrFromSelOff(pUnwindCtx->m_pUVM, pUnwindCtx->m_idCpu, &pFrame->AddrReturnPC, uRet.pu16[4], uRet.pu64[0]);
1088 break;
1089 case RTDBGRETURNTYPE_IRET16:
1090 DBGFR3AddrFromSelOff(pUnwindCtx->m_pUVM, pUnwindCtx->m_idCpu, &pFrame->AddrReturnPC, uRet.pu16[1], uRet.pu16[0]);
1091 break;
1092 case RTDBGRETURNTYPE_IRET32:
1093 DBGFR3AddrFromSelOff(pUnwindCtx->m_pUVM, pUnwindCtx->m_idCpu, &pFrame->AddrReturnPC, uRet.pu16[2], uRet.pu32[0]);
1094 break;
1095 case RTDBGRETURNTYPE_IRET32_PRIV:
1096 DBGFR3AddrFromSelOff(pUnwindCtx->m_pUVM, pUnwindCtx->m_idCpu, &pFrame->AddrReturnPC, uRet.pu16[2], uRet.pu32[0]);
1097 break;
1098 case RTDBGRETURNTYPE_IRET32_V86:
1099 DBGFR3AddrFromSelOff(pUnwindCtx->m_pUVM, pUnwindCtx->m_idCpu, &pFrame->AddrReturnPC, uRet.pu16[2], uRet.pu32[0]);
1100 break;
1101 case RTDBGRETURNTYPE_IRET64:
1102 DBGFR3AddrFromSelOff(pUnwindCtx->m_pUVM, pUnwindCtx->m_idCpu, &pFrame->AddrReturnPC, uRet.pu16[4], uRet.pu64[0]);
1103 break;
1104 default:
1105 AssertMsgFailed(("enmReturnType=%d\n", pFrame->enmReturnType));
1106 return VERR_INVALID_PARAMETER;
1107 }
1108
1109
1110 pFrame->pSymReturnPC = DBGFR3AsSymbolByAddrA(pUnwindCtx->m_pUVM, pUnwindCtx->m_hAs, &pFrame->AddrReturnPC,
1111 RTDBGSYMADDR_FLAGS_LESS_OR_EQUAL | RTDBGSYMADDR_FLAGS_SKIP_ABS_IN_DEFERRED,
1112 NULL /*poffDisp*/, NULL /*phMod*/);
1113 pFrame->pLineReturnPC = DBGFR3AsLineByAddrA(pUnwindCtx->m_pUVM, pUnwindCtx->m_hAs, &pFrame->AddrReturnPC,
1114 NULL /*poffDisp*/, NULL /*phMod*/);
1115
1116 /*
1117 * Frame bitness flag.
1118 */
1119 /** @todo use previous return type for this? */
1120 pFrame->fFlags &= ~(DBGFSTACKFRAME_FLAGS_16BIT | DBGFSTACKFRAME_FLAGS_32BIT | DBGFSTACKFRAME_FLAGS_64BIT);
1121 switch (cbStackItem)
1122 {
1123 case 2: pFrame->fFlags |= DBGFSTACKFRAME_FLAGS_16BIT; break;
1124 case 4: pFrame->fFlags |= DBGFSTACKFRAME_FLAGS_32BIT; break;
1125 case 8: pFrame->fFlags |= DBGFSTACKFRAME_FLAGS_64BIT; break;
1126 default: AssertMsgFailedReturn(("cbStackItem=%d\n", cbStackItem), VERR_DBGF_STACK_IPE_2);
1127 }
1128
1129 /*
1130 * The arguments.
1131 */
1132 memcpy(&pFrame->Args, uArgs.pv, sizeof(pFrame->Args));
1133
1134 /*
1135 * Collect register changes.
1136 * Then call the OS layer to assist us (e.g. NT trap frames).
1137 */
1138 if (pFrame->fFlags & DBGFSTACKFRAME_FLAGS_USED_UNWIND_INFO)
1139 {
1140 rc = dbgfR3StackWalkCollectRegisterChanges(pUnwindCtx->m_pUVM, pFrame, &pUnwindCtx->m_State);
1141 if (RT_FAILURE(rc))
1142 return rc;
1143
1144 if ( pUnwindCtx->m_pInitialCtx
1145 && pUnwindCtx->m_hAs != NIL_RTDBGAS)
1146 {
1147 rc = dbgfR3OSStackUnwindAssist(pUnwindCtx->m_pUVM, pUnwindCtx->m_idCpu, pFrame, &pUnwindCtx->m_State,
1148 pUnwindCtx->m_pInitialCtx, pUnwindCtx->m_hAs, &pUnwindCtx->m_uOsScratch);
1149 if (RT_FAILURE(rc))
1150 return rc;
1151 }
1152 }
1153
1154 /*
1155 * Try use unwind information to locate the return frame pointer (for the
1156 * next loop iteration).
1157 */
1158 Assert(!(pFrame->fFlags & DBGFSTACKFRAME_FLAGS_UNWIND_INFO_RET));
1159 pFrame->enmReturnFrameReturnType = RTDBGRETURNTYPE_INVALID;
1160 if (!(pFrame->fFlags & DBGFSTACKFRAME_FLAGS_LAST))
1161 {
1162 /* Set PC and SP if we didn't unwind our way here (context will then point
1163 and the return PC and SP already). */
1164 if (!(pFrame->fFlags & DBGFSTACKFRAME_FLAGS_USED_UNWIND_INFO))
1165 {
1166 dbgfR3UnwindCtxSetPcAndSp(pUnwindCtx, &pFrame->AddrReturnPC, &pFrame->AddrReturnStack);
1167 }
1168 /** @todo Reevaluate CS if the previous frame return type isn't near. */
1169 if ( pUnwindCtx->m_State.enmArch == RTLDRARCH_AMD64
1170 || pUnwindCtx->m_State.enmArch == RTLDRARCH_X86_32
1171 || pUnwindCtx->m_State.enmArch == RTLDRARCH_X86_16)
1172 pUnwindCtx->m_State.u.x86.Loaded.fAll = 0;
1173 else
1174 AssertFailed();
1175 if (dbgfR3UnwindCtxDoOneFrame(pUnwindCtx))
1176 {
1177 if (pUnwindCtx->m_fIsHostRing0)
1178 DBGFR3AddrFromHostR0(&pFrame->AddrReturnFrame, pUnwindCtx->m_State.u.x86.FrameAddr.off);
1179 else
1180 {
1181 DBGFADDRESS AddrReturnFrame = pFrame->AddrReturnFrame;
1182 rc = DBGFR3AddrFromSelOff(pUnwindCtx->m_pUVM, pUnwindCtx->m_idCpu, &AddrReturnFrame,
1183 pUnwindCtx->m_State.u.x86.FrameAddr.sel, pUnwindCtx->m_State.u.x86.FrameAddr.off);
1184 if (RT_SUCCESS(rc))
1185 pFrame->AddrReturnFrame = AddrReturnFrame;
1186 }
1187 pFrame->enmReturnFrameReturnType = pUnwindCtx->m_State.enmRetType;
1188 pFrame->fFlags |= DBGFSTACKFRAME_FLAGS_UNWIND_INFO_RET;
1189 }
1190 }
1191
1192 return VINF_SUCCESS;
1193}
1194
1195
1196/**
1197 * Walks the entire stack allocating memory as we walk.
1198 */
1199static DECLCALLBACK(int) dbgfR3StackWalkCtxFull(PUVM pUVM, VMCPUID idCpu, PCCPUMCTX pCtx, RTDBGAS hAs,
1200 DBGFCODETYPE enmCodeType,
1201 PCDBGFADDRESS pAddrFrame,
1202 PCDBGFADDRESS pAddrStack,
1203 PCDBGFADDRESS pAddrPC,
1204 RTDBGRETURNTYPE enmReturnType,
1205 PCDBGFSTACKFRAME *ppFirstFrame)
1206{
1207 DBGFUNWINDCTX UnwindCtx(pUVM, idCpu, pCtx, hAs);
1208
1209 /* alloc first frame. */
1210 PDBGFSTACKFRAME pCur = (PDBGFSTACKFRAME)MMR3HeapAllocZU(pUVM, MM_TAG_DBGF_STACK, sizeof(*pCur));
1211 if (!pCur)
1212 return VERR_NO_MEMORY;
1213
1214 /*
1215 * Initialize the frame.
1216 */
1217 pCur->pNextInternal = NULL;
1218 pCur->pFirstInternal = pCur;
1219
1220 int rc = VINF_SUCCESS;
1221 if (pAddrPC)
1222 pCur->AddrPC = *pAddrPC;
1223 else if (enmCodeType != DBGFCODETYPE_GUEST)
1224 DBGFR3AddrFromFlat(pUVM, &pCur->AddrPC, pCtx->rip);
1225 else
1226 rc = DBGFR3AddrFromSelOff(pUVM, idCpu, &pCur->AddrPC, pCtx->cs.Sel, pCtx->rip);
1227 if (RT_SUCCESS(rc))
1228 {
1229 uint64_t fAddrMask;
1230 if (enmCodeType == DBGFCODETYPE_RING0)
1231 fAddrMask = HC_ARCH_BITS == 64 ? UINT64_MAX : UINT32_MAX;
1232 else if (enmCodeType == DBGFCODETYPE_HYPER)
1233 fAddrMask = UINT32_MAX;
1234 else if (DBGFADDRESS_IS_FAR16(&pCur->AddrPC))
1235 fAddrMask = UINT16_MAX;
1236 else if (DBGFADDRESS_IS_FAR32(&pCur->AddrPC))
1237 fAddrMask = UINT32_MAX;
1238 else if (DBGFADDRESS_IS_FAR64(&pCur->AddrPC))
1239 fAddrMask = UINT64_MAX;
1240 else
1241 {
1242 PVMCPU pVCpu = VMMGetCpuById(pUVM->pVM, idCpu);
1243 CPUMMODE enmCpuMode = CPUMGetGuestMode(pVCpu);
1244 if (enmCpuMode == CPUMMODE_REAL)
1245 {
1246 fAddrMask = UINT16_MAX;
1247 if (enmReturnType == RTDBGRETURNTYPE_INVALID)
1248 pCur->enmReturnType = RTDBGRETURNTYPE_NEAR16;
1249 }
1250 else if ( enmCpuMode == CPUMMODE_PROTECTED
1251 || !CPUMIsGuestIn64BitCode(pVCpu))
1252 {
1253 fAddrMask = UINT32_MAX;
1254 if (enmReturnType == RTDBGRETURNTYPE_INVALID)
1255 pCur->enmReturnType = RTDBGRETURNTYPE_NEAR32;
1256 }
1257 else
1258 {
1259 fAddrMask = UINT64_MAX;
1260 if (enmReturnType == RTDBGRETURNTYPE_INVALID)
1261 pCur->enmReturnType = RTDBGRETURNTYPE_NEAR64;
1262 }
1263 }
1264
1265 if (enmReturnType == RTDBGRETURNTYPE_INVALID)
1266 switch (pCur->AddrPC.fFlags & DBGFADDRESS_FLAGS_TYPE_MASK)
1267 {
1268 case DBGFADDRESS_FLAGS_FAR16: pCur->enmReturnType = RTDBGRETURNTYPE_NEAR16; break;
1269 case DBGFADDRESS_FLAGS_FAR32: pCur->enmReturnType = RTDBGRETURNTYPE_NEAR32; break;
1270 case DBGFADDRESS_FLAGS_FAR64: pCur->enmReturnType = RTDBGRETURNTYPE_NEAR64; break;
1271 case DBGFADDRESS_FLAGS_RING0:
1272 pCur->enmReturnType = HC_ARCH_BITS == 64 ? RTDBGRETURNTYPE_NEAR64 : RTDBGRETURNTYPE_NEAR32;
1273 break;
1274 default:
1275 pCur->enmReturnType = RTDBGRETURNTYPE_NEAR32;
1276 break;
1277 }
1278
1279
1280 if (pAddrStack)
1281 pCur->AddrStack = *pAddrStack;
1282 else if (enmCodeType != DBGFCODETYPE_GUEST)
1283 DBGFR3AddrFromFlat(pUVM, &pCur->AddrStack, pCtx->rsp & fAddrMask);
1284 else
1285 rc = DBGFR3AddrFromSelOff(pUVM, idCpu, &pCur->AddrStack, pCtx->ss.Sel, pCtx->rsp & fAddrMask);
1286
1287 Assert(!(pCur->fFlags & DBGFSTACKFRAME_FLAGS_USED_UNWIND_INFO));
1288 if (pAddrFrame)
1289 pCur->AddrFrame = *pAddrFrame;
1290 else if (enmCodeType != DBGFCODETYPE_GUEST)
1291 DBGFR3AddrFromFlat(pUVM, &pCur->AddrFrame, pCtx->rbp & fAddrMask);
1292 else if (RT_SUCCESS(rc))
1293 rc = DBGFR3AddrFromSelOff(pUVM, idCpu, &pCur->AddrFrame, pCtx->ss.Sel, pCtx->rbp & fAddrMask);
1294
1295 /*
1296 * Try unwind and get a better frame pointer and state.
1297 */
1298 if ( RT_SUCCESS(rc)
1299 && dbgfR3UnwindCtxSetPcAndSp(&UnwindCtx, &pCur->AddrPC, &pCur->AddrStack)
1300 && dbgfR3UnwindCtxDoOneFrame(&UnwindCtx))
1301 {
1302 pCur->enmReturnType = UnwindCtx.m_State.enmRetType;
1303 pCur->fFlags |= DBGFSTACKFRAME_FLAGS_USED_UNWIND_INFO;
1304 if (!UnwindCtx.m_fIsHostRing0)
1305 rc = DBGFR3AddrFromSelOff(UnwindCtx.m_pUVM, UnwindCtx.m_idCpu, &pCur->AddrFrame,
1306 UnwindCtx.m_State.u.x86.FrameAddr.sel, UnwindCtx.m_State.u.x86.FrameAddr.off);
1307 else
1308 DBGFR3AddrFromHostR0(&pCur->AddrFrame, UnwindCtx.m_State.u.x86.FrameAddr.off);
1309 }
1310 /*
1311 * The first frame.
1312 */
1313 if (RT_SUCCESS(rc))
1314 {
1315 if (DBGFADDRESS_IS_VALID(&pCur->AddrPC))
1316 {
1317 pCur->pSymPC = DBGFR3AsSymbolByAddrA(pUVM, hAs, &pCur->AddrPC,
1318 RTDBGSYMADDR_FLAGS_LESS_OR_EQUAL | RTDBGSYMADDR_FLAGS_SKIP_ABS_IN_DEFERRED,
1319 NULL /*poffDisp*/, NULL /*phMod*/);
1320 pCur->pLinePC = DBGFR3AsLineByAddrA(pUVM, hAs, &pCur->AddrPC, NULL /*poffDisp*/, NULL /*phMod*/);
1321 }
1322
1323 rc = dbgfR3StackWalk(&UnwindCtx, pCur, true /*fFirst*/);
1324 }
1325 }
1326 else
1327 pCur->enmReturnType = enmReturnType;
1328 if (RT_FAILURE(rc))
1329 {
1330 DBGFR3StackWalkEnd(pCur);
1331 return rc;
1332 }
1333
1334 /*
1335 * The other frames.
1336 */
1337 DBGFSTACKFRAME Next = *pCur;
1338 while (!(pCur->fFlags & (DBGFSTACKFRAME_FLAGS_LAST | DBGFSTACKFRAME_FLAGS_MAX_DEPTH | DBGFSTACKFRAME_FLAGS_LOOP)))
1339 {
1340 Next.cSureRegs = 0;
1341 Next.paSureRegs = NULL;
1342
1343 /* try walk. */
1344 rc = dbgfR3StackWalk(&UnwindCtx, &Next, false /*fFirst*/);
1345 if (RT_FAILURE(rc))
1346 break;
1347
1348 /* add the next frame to the chain. */
1349 PDBGFSTACKFRAME pNext = (PDBGFSTACKFRAME)MMR3HeapAllocU(pUVM, MM_TAG_DBGF_STACK, sizeof(*pNext));
1350 if (!pNext)
1351 {
1352 DBGFR3StackWalkEnd(pCur);
1353 return VERR_NO_MEMORY;
1354 }
1355 *pNext = Next;
1356 pCur->pNextInternal = pNext;
1357 pCur = pNext;
1358 Assert(pCur->pNextInternal == NULL);
1359
1360 /* check for loop */
1361 for (PCDBGFSTACKFRAME pLoop = pCur->pFirstInternal;
1362 pLoop && pLoop != pCur;
1363 pLoop = pLoop->pNextInternal)
1364 if (pLoop->AddrFrame.FlatPtr == pCur->AddrFrame.FlatPtr)
1365 {
1366 pCur->fFlags |= DBGFSTACKFRAME_FLAGS_LOOP;
1367 break;
1368 }
1369
1370 /* check for insane recursion */
1371 if (pCur->iFrame >= 2048)
1372 pCur->fFlags |= DBGFSTACKFRAME_FLAGS_MAX_DEPTH;
1373 }
1374
1375 *ppFirstFrame = pCur->pFirstInternal;
1376 return rc;
1377}
1378
1379
1380/**
1381 * Common worker for DBGFR3StackWalkBeginGuestEx, DBGFR3StackWalkBeginHyperEx,
1382 * DBGFR3StackWalkBeginGuest and DBGFR3StackWalkBeginHyper.
1383 */
1384static int dbgfR3StackWalkBeginCommon(PUVM pUVM,
1385 VMCPUID idCpu,
1386 DBGFCODETYPE enmCodeType,
1387 PCDBGFADDRESS pAddrFrame,
1388 PCDBGFADDRESS pAddrStack,
1389 PCDBGFADDRESS pAddrPC,
1390 RTDBGRETURNTYPE enmReturnType,
1391 PCDBGFSTACKFRAME *ppFirstFrame)
1392{
1393 /*
1394 * Validate parameters.
1395 */
1396 *ppFirstFrame = NULL;
1397 UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
1398 PVM pVM = pUVM->pVM;
1399 VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE);
1400 AssertReturn(idCpu < pVM->cCpus, VERR_INVALID_CPU_ID);
1401 if (pAddrFrame)
1402 AssertReturn(DBGFR3AddrIsValid(pUVM, pAddrFrame), VERR_INVALID_PARAMETER);
1403 if (pAddrStack)
1404 AssertReturn(DBGFR3AddrIsValid(pUVM, pAddrStack), VERR_INVALID_PARAMETER);
1405 if (pAddrPC)
1406 AssertReturn(DBGFR3AddrIsValid(pUVM, pAddrPC), VERR_INVALID_PARAMETER);
1407 AssertReturn(enmReturnType >= RTDBGRETURNTYPE_INVALID && enmReturnType < RTDBGRETURNTYPE_END, VERR_INVALID_PARAMETER);
1408
1409 /*
1410 * Get the CPUM context pointer and pass it on the specified EMT.
1411 */
1412 RTDBGAS hAs;
1413 PCCPUMCTX pCtx;
1414 switch (enmCodeType)
1415 {
1416 case DBGFCODETYPE_GUEST:
1417 pCtx = CPUMQueryGuestCtxPtr(VMMGetCpuById(pVM, idCpu));
1418 hAs = DBGF_AS_GLOBAL;
1419 break;
1420 case DBGFCODETYPE_HYPER:
1421 pCtx = CPUMQueryGuestCtxPtr(VMMGetCpuById(pVM, idCpu));
1422 hAs = DBGF_AS_RC_AND_GC_GLOBAL;
1423 break;
1424 case DBGFCODETYPE_RING0:
1425 pCtx = NULL; /* No valid context present. */
1426 hAs = DBGF_AS_R0;
1427 break;
1428 default:
1429 AssertFailedReturn(VERR_INVALID_PARAMETER);
1430 }
1431 return VMR3ReqPriorityCallWaitU(pUVM, idCpu, (PFNRT)dbgfR3StackWalkCtxFull, 10,
1432 pUVM, idCpu, pCtx, hAs, enmCodeType,
1433 pAddrFrame, pAddrStack, pAddrPC, enmReturnType, ppFirstFrame);
1434}
1435
1436
1437/**
1438 * Begins a guest stack walk, extended version.
1439 *
1440 * This will walk the current stack, constructing a list of info frames which is
1441 * returned to the caller. The caller uses DBGFR3StackWalkNext to traverse the
1442 * list and DBGFR3StackWalkEnd to release it.
1443 *
1444 * @returns VINF_SUCCESS on success.
1445 * @returns VERR_NO_MEMORY if we're out of memory.
1446 *
1447 * @param pUVM The user mode VM handle.
1448 * @param idCpu The ID of the virtual CPU which stack we want to walk.
1449 * @param enmCodeType Code type
1450 * @param pAddrFrame Frame address to start at. (Optional)
1451 * @param pAddrStack Stack address to start at. (Optional)
1452 * @param pAddrPC Program counter to start at. (Optional)
1453 * @param enmReturnType The return address type. (Optional)
1454 * @param ppFirstFrame Where to return the pointer to the first info frame.
1455 */
1456VMMR3DECL(int) DBGFR3StackWalkBeginEx(PUVM pUVM,
1457 VMCPUID idCpu,
1458 DBGFCODETYPE enmCodeType,
1459 PCDBGFADDRESS pAddrFrame,
1460 PCDBGFADDRESS pAddrStack,
1461 PCDBGFADDRESS pAddrPC,
1462 RTDBGRETURNTYPE enmReturnType,
1463 PCDBGFSTACKFRAME *ppFirstFrame)
1464{
1465 return dbgfR3StackWalkBeginCommon(pUVM, idCpu, enmCodeType, pAddrFrame, pAddrStack, pAddrPC, enmReturnType, ppFirstFrame);
1466}
1467
1468
1469/**
1470 * Begins a guest stack walk.
1471 *
1472 * This will walk the current stack, constructing a list of info frames which is
1473 * returned to the caller. The caller uses DBGFR3StackWalkNext to traverse the
1474 * list and DBGFR3StackWalkEnd to release it.
1475 *
1476 * @returns VINF_SUCCESS on success.
1477 * @returns VERR_NO_MEMORY if we're out of memory.
1478 *
1479 * @param pUVM The user mode VM handle.
1480 * @param idCpu The ID of the virtual CPU which stack we want to walk.
1481 * @param enmCodeType Code type
1482 * @param ppFirstFrame Where to return the pointer to the first info frame.
1483 */
1484VMMR3DECL(int) DBGFR3StackWalkBegin(PUVM pUVM, VMCPUID idCpu, DBGFCODETYPE enmCodeType, PCDBGFSTACKFRAME *ppFirstFrame)
1485{
1486 return dbgfR3StackWalkBeginCommon(pUVM, idCpu, enmCodeType, NULL, NULL, NULL, RTDBGRETURNTYPE_INVALID, ppFirstFrame);
1487}
1488
1489/**
1490 * Gets the next stack frame.
1491 *
1492 * @returns Pointer to the info for the next stack frame.
1493 * NULL if no more frames.
1494 *
1495 * @param pCurrent Pointer to the current stack frame.
1496 *
1497 */
1498VMMR3DECL(PCDBGFSTACKFRAME) DBGFR3StackWalkNext(PCDBGFSTACKFRAME pCurrent)
1499{
1500 return pCurrent
1501 ? pCurrent->pNextInternal
1502 : NULL;
1503}
1504
1505
1506/**
1507 * Ends a stack walk process.
1508 *
1509 * This *must* be called after a successful first call to any of the stack
1510 * walker functions. If not called we will leak memory or other resources.
1511 *
1512 * @param pFirstFrame The frame returned by one of the begin functions.
1513 */
1514VMMR3DECL(void) DBGFR3StackWalkEnd(PCDBGFSTACKFRAME pFirstFrame)
1515{
1516 if ( !pFirstFrame
1517 || !pFirstFrame->pFirstInternal)
1518 return;
1519
1520 PDBGFSTACKFRAME pFrame = (PDBGFSTACKFRAME)pFirstFrame->pFirstInternal;
1521 while (pFrame)
1522 {
1523 PDBGFSTACKFRAME pCur = pFrame;
1524 pFrame = (PDBGFSTACKFRAME)pCur->pNextInternal;
1525 if (pFrame)
1526 {
1527 if (pCur->pSymReturnPC == pFrame->pSymPC)
1528 pFrame->pSymPC = NULL;
1529 if (pCur->pSymReturnPC == pFrame->pSymReturnPC)
1530 pFrame->pSymReturnPC = NULL;
1531
1532 if (pCur->pSymPC == pFrame->pSymPC)
1533 pFrame->pSymPC = NULL;
1534 if (pCur->pSymPC == pFrame->pSymReturnPC)
1535 pFrame->pSymReturnPC = NULL;
1536
1537 if (pCur->pLineReturnPC == pFrame->pLinePC)
1538 pFrame->pLinePC = NULL;
1539 if (pCur->pLineReturnPC == pFrame->pLineReturnPC)
1540 pFrame->pLineReturnPC = NULL;
1541
1542 if (pCur->pLinePC == pFrame->pLinePC)
1543 pFrame->pLinePC = NULL;
1544 if (pCur->pLinePC == pFrame->pLineReturnPC)
1545 pFrame->pLineReturnPC = NULL;
1546 }
1547
1548 RTDbgSymbolFree(pCur->pSymPC);
1549 RTDbgSymbolFree(pCur->pSymReturnPC);
1550 RTDbgLineFree(pCur->pLinePC);
1551 RTDbgLineFree(pCur->pLineReturnPC);
1552
1553 if (pCur->paSureRegs)
1554 {
1555 MMR3HeapFree(pCur->paSureRegs);
1556 pCur->paSureRegs = NULL;
1557 pCur->cSureRegs = 0;
1558 }
1559
1560 pCur->pNextInternal = NULL;
1561 pCur->pFirstInternal = NULL;
1562 pCur->fFlags = 0;
1563 MMR3HeapFree(pCur);
1564 }
1565}
1566
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