VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/EMHM.cpp@ 107466

Last change on this file since 107466 was 107194, checked in by vboxsync, 2 months ago

VMM: More adjustments for VBOX_WITH_ONLY_PGM_NEM_MODE, VBOX_WITH_MINIMAL_R0, VBOX_WITH_HWVIRT and such. jiraref:VBP-1466

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1/* $Id: EMHM.cpp 107194 2024-11-29 14:47:06Z vboxsync $ */
2/** @file
3 * EM - Execution Monitor / Manager - hardware virtualization
4 */
5
6/*
7 * Copyright (C) 2006-2024 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28
29/*********************************************************************************************************************************
30* Header Files *
31*********************************************************************************************************************************/
32#define LOG_GROUP LOG_GROUP_EM
33#define VMCPU_INCL_CPUM_GST_CTX
34#include <VBox/vmm/em.h>
35#include <VBox/vmm/vmm.h>
36#include <VBox/vmm/selm.h>
37#include <VBox/vmm/trpm.h>
38#include <VBox/vmm/iem.h>
39#include <VBox/vmm/iom.h>
40#include <VBox/vmm/dbgf.h>
41#include <VBox/vmm/pgm.h>
42#include <VBox/vmm/tm.h>
43#include <VBox/vmm/mm.h>
44#include <VBox/vmm/ssm.h>
45#include <VBox/vmm/pdmapi.h>
46#include <VBox/vmm/pdmcritsect.h>
47#include <VBox/vmm/pdmqueue.h>
48#include <VBox/vmm/hm.h>
49#include "EMInternal.h"
50#include <VBox/vmm/vm.h>
51#include <VBox/vmm/gim.h>
52#include <VBox/vmm/cpumdis.h>
53#include <VBox/dis.h>
54#include <VBox/err.h>
55#include <VBox/vmm/dbgf.h>
56#include "VMMTracing.h"
57
58#include <iprt/asm.h>
59
60#include "EMInline.h"
61
62#ifndef VBOX_WITH_HWVIRT
63# error "VBOX_WITH_HWVIRT misconfig!"
64#endif
65
66
67/*********************************************************************************************************************************
68* Internal Functions *
69*********************************************************************************************************************************/
70static int emR3HmHandleRC(PVM pVM, PVMCPU pVCpu, int rc);
71DECLINLINE(int) emR3HmExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC = VINF_SUCCESS);
72static int emR3HmExecuteIOInstruction(PVM pVM, PVMCPU pVCpu);
73static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu);
74
75#define EMHANDLERC_WITH_HM
76#define emR3ExecuteInstruction emR3HmExecuteInstruction
77#define emR3ExecuteIOInstruction emR3HmExecuteIOInstruction
78#include "EMHandleRCTmpl.h"
79
80
81/**
82 * Executes instruction in HM mode if we can.
83 *
84 * This is somewhat comparable to REMR3EmulateInstruction.
85 *
86 * @returns VBox strict status code.
87 * @retval VINF_EM_DBG_STEPPED on success.
88 * @retval VERR_EM_CANNOT_EXEC_GUEST if we cannot execute guest instructions in
89 * HM right now.
90 *
91 * @param pVM The cross context VM structure.
92 * @param pVCpu The cross context virtual CPU structure for the calling EMT.
93 * @param fFlags Combinations of EM_ONE_INS_FLAGS_XXX.
94 * @thread EMT.
95 */
96VMMR3_INT_DECL(VBOXSTRICTRC) EMR3HmSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
97{
98 Assert(!(fFlags & ~EM_ONE_INS_FLAGS_MASK));
99
100 if (!HMCanExecuteGuest(pVM, pVCpu, &pVCpu->cpum.GstCtx))
101 return VINF_EM_RESCHEDULE;
102
103 uint64_t const uOldRip = pVCpu->cpum.GstCtx.rip;
104 for (;;)
105 {
106 /*
107 * Service necessary FFs before going into HM.
108 */
109 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
110 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
111 {
112 VBOXSTRICTRC rcStrict = emR3HmForcedActions(pVM, pVCpu);
113 if (rcStrict != VINF_SUCCESS)
114 {
115 Log(("EMR3HmSingleInstruction: FFs before -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
116 return rcStrict;
117 }
118 }
119
120 /*
121 * Go execute it.
122 */
123 bool fOld = HMSetSingleInstruction(pVM, pVCpu, true);
124 VBOXSTRICTRC rcStrict = VMMR3HmRunGC(pVM, pVCpu);
125 HMSetSingleInstruction(pVM, pVCpu, fOld);
126 LogFlow(("EMR3HmSingleInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
127
128 /*
129 * Handle high priority FFs and informational status codes. We don't do
130 * normal FF processing the caller or the next call can deal with them.
131 */
132 VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
133 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
134 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
135 {
136 rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict);
137 LogFlow(("EMR3HmSingleInstruction: FFs after -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
138 }
139
140 if (rcStrict != VINF_SUCCESS && (rcStrict < VINF_EM_FIRST || rcStrict > VINF_EM_LAST))
141 {
142 rcStrict = emR3HmHandleRC(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
143 Log(("EMR3HmSingleInstruction: emR3HmHandleRC -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
144 }
145
146 /*
147 * Done?
148 */
149 if ( (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED)
150 || !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE)
151 || pVCpu->cpum.GstCtx.rip != uOldRip)
152 {
153 if (rcStrict == VINF_SUCCESS && pVCpu->cpum.GstCtx.rip != uOldRip)
154 rcStrict = VINF_EM_DBG_STEPPED;
155 Log(("EMR3HmSingleInstruction: returns %Rrc (rip %llx -> %llx)\n", VBOXSTRICTRC_VAL(rcStrict), uOldRip, pVCpu->cpum.GstCtx.rip));
156 CPUM_IMPORT_EXTRN_RET(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK);
157 return rcStrict;
158 }
159 }
160}
161
162
163/**
164 * Executes one (or perhaps a few more) instruction(s).
165 *
166 * @returns VBox status code suitable for EM.
167 *
168 * @param pVM The cross context VM structure.
169 * @param pVCpu The cross context virtual CPU structure.
170 * @param rcRC Return code from RC.
171 * @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
172 * instruction and prefix the log output with this text.
173 */
174#if defined(LOG_ENABLED) || defined(DOXYGEN_RUNNING)
175static int emR3HmExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC, const char *pszPrefix)
176#else
177static int emR3HmExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC)
178#endif
179{
180 RT_NOREF(rcRC, pVM);
181
182#ifdef LOG_ENABLED
183 /*
184 * Log it.
185 */
186 Log(("EMINS: %04x:%RGv RSP=%RGv\n", pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, (RTGCPTR)pVCpu->cpum.GstCtx.rsp));
187 if (pszPrefix)
188 {
189 DBGFR3_INFO_LOG(pVM, pVCpu, "cpumguest", pszPrefix);
190 DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
191 }
192#endif
193
194 /*
195 * Use IEM and fallback on REM if the functionality is missing.
196 * Once IEM gets mature enough, nothing should ever fall back.
197 */
198 STAM_PROFILE_START(&pVCpu->em.s.StatIEMEmu, a);
199 VBOXSTRICTRC rcStrict;
200 uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
201 RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
202 if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
203 {
204 CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
205 rcStrict = VBOXSTRICTRC_TODO(IEMExecOne(pVCpu));
206 }
207 else
208 {
209 RT_UNTRUSTED_VALIDATED_FENCE();
210 rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
211 LogFlow(("emR3HmExecuteInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
212 }
213 STAM_PROFILE_STOP(&pVCpu->em.s.StatIEMEmu, a);
214
215 return VBOXSTRICTRC_TODO(rcStrict);
216}
217
218
219/**
220 * Executes one (or perhaps a few more) instruction(s).
221 * This is just a wrapper for discarding pszPrefix in non-logging builds.
222 *
223 * @returns VBox status code suitable for EM.
224 * @param pVM The cross context VM structure.
225 * @param pVCpu The cross context virtual CPU structure.
226 * @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
227 * instruction and prefix the log output with this text.
228 * @param rcGC GC return code
229 */
230DECLINLINE(int) emR3HmExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC)
231{
232#ifdef LOG_ENABLED
233 return emR3HmExecuteInstructionWorker(pVM, pVCpu, rcGC, pszPrefix);
234#else
235 RT_NOREF_PV(pszPrefix);
236 return emR3HmExecuteInstructionWorker(pVM, pVCpu, rcGC);
237#endif
238}
239
240
241/**
242 * Executes one (or perhaps a few more) IO instruction(s).
243 *
244 * @returns VBox status code suitable for EM.
245 * @param pVM The cross context VM structure.
246 * @param pVCpu The cross context virtual CPU structure.
247 */
248static int emR3HmExecuteIOInstruction(PVM pVM, PVMCPU pVCpu)
249{
250 RT_NOREF(pVM);
251 STAM_PROFILE_START(&pVCpu->em.s.StatIOEmu, a);
252
253 VBOXSTRICTRC rcStrict;
254 uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
255 RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
256 if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
257 {
258 /*
259 * Hand it over to the interpreter.
260 */
261 CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
262 rcStrict = IEMExecOne(pVCpu);
263 LogFlow(("emR3HmExecuteIOInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
264 }
265 else
266 {
267 RT_UNTRUSTED_VALIDATED_FENCE();
268 CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
269 rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
270 LogFlow(("emR3HmExecuteIOInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
271 STAM_COUNTER_INC(&pVCpu->em.s.StatIoRestarted);
272 }
273
274 STAM_COUNTER_INC(&pVCpu->em.s.StatIoIem);
275 STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
276 return VBOXSTRICTRC_TODO(rcStrict);
277}
278
279
280/**
281 * Process HM specific forced actions.
282 *
283 * This function is called when any FFs in the VM_FF_HIGH_PRIORITY_PRE_RAW_MASK
284 * or/and VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK are pending.
285 *
286 * @returns VBox status code. May return VINF_EM_NO_MEMORY but none of the other
287 * EM statuses.
288 * @param pVM The cross context VM structure.
289 * @param pVCpu The cross context virtual CPU structure.
290 */
291static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu)
292{
293 /*
294 * Sync page directory.
295 */
296 if (VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL))
297 {
298 CPUM_IMPORT_EXTRN_RET(pVCpu, CPUMCTX_EXTRN_CR0 | CPUMCTX_EXTRN_CR3 | CPUMCTX_EXTRN_CR4);
299 Assert(pVCpu->em.s.enmState != EMSTATE_WAIT_SIPI);
300 int rc = PGMSyncCR3(pVCpu, pVCpu->cpum.GstCtx.cr0, pVCpu->cpum.GstCtx.cr3, pVCpu->cpum.GstCtx.cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
301 if (RT_FAILURE(rc))
302 return rc;
303
304 /* Prefetch pages for EIP and ESP. */
305 /** @todo This is rather expensive. Should investigate if it really helps at all. */
306 /** @todo this should be skipped! */
307 CPUM_IMPORT_EXTRN_RET(pVCpu, CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_SS);
308 rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVCpu, X86_SREG_CS, &pVCpu->cpum.GstCtx, pVCpu->cpum.GstCtx.rip));
309 if (rc == VINF_SUCCESS)
310 rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVCpu, X86_SREG_SS, &pVCpu->cpum.GstCtx, pVCpu->cpum.GstCtx.rsp));
311 if (rc != VINF_SUCCESS)
312 {
313 if (rc != VINF_PGM_SYNC_CR3)
314 {
315 AssertLogRelMsgReturn(RT_FAILURE(rc), ("%Rrc\n", rc), VERR_IPE_UNEXPECTED_INFO_STATUS);
316 return rc;
317 }
318 rc = PGMSyncCR3(pVCpu, pVCpu->cpum.GstCtx.cr0, pVCpu->cpum.GstCtx.cr3, pVCpu->cpum.GstCtx.cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
319 if (RT_FAILURE(rc))
320 return rc;
321 }
322 /** @todo maybe prefetch the supervisor stack page as well */
323 }
324
325 /*
326 * Allocate handy pages (just in case the above actions have consumed some pages).
327 */
328 if (VM_FF_IS_PENDING_EXCEPT(pVM, VM_FF_PGM_NEED_HANDY_PAGES, VM_FF_PGM_NO_MEMORY))
329 {
330 int rc = PGMR3PhysAllocateHandyPages(pVM);
331 if (RT_FAILURE(rc))
332 return rc;
333 }
334
335 /*
336 * Check whether we're out of memory now.
337 *
338 * This may stem from some of the above actions or operations that has been executed
339 * since we ran FFs. The allocate handy pages must for instance always be followed by
340 * this check.
341 */
342 if (VM_FF_IS_SET(pVM, VM_FF_PGM_NO_MEMORY))
343 return VINF_EM_NO_MEMORY;
344
345 return VINF_SUCCESS;
346}
347
348
349/**
350 * Executes hardware accelerated raw code. (Intel VT-x & AMD-V)
351 *
352 * This function contains the inner EM execution loop for HM (the outer loop
353 * being in EMR3ExecuteVM()).
354 *
355 * @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE,
356 * VINF_EM_RESCHEDULE_REM, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
357 *
358 * @param pVM The cross context VM structure.
359 * @param pVCpu The cross context virtual CPU structure.
360 * @param pfFFDone Where to store an indicator telling whether or not
361 * FFs were done before returning.
362 */
363int emR3HmExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone)
364{
365 int rc = VERR_IPE_UNINITIALIZED_STATUS;
366
367 LogFlow(("emR3HmExecute%d: (cs:eip=%04x:%RGv)\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
368 *pfFFDone = false;
369
370 STAM_REL_COUNTER_INC(&pVCpu->em.s.StatHMExecuteCalled);
371
372 /*
373 * Spin till we get a forced action which returns anything but VINF_SUCCESS.
374 */
375 for (;;)
376 {
377 STAM_PROFILE_ADV_START(&pVCpu->em.s.StatHMEntry, a);
378
379 /* Check if a forced reschedule is pending. */
380 if (HMR3IsRescheduleRequired(pVM, &pVCpu->cpum.GstCtx))
381 {
382 rc = VINF_EM_RESCHEDULE;
383 break;
384 }
385
386 /*
387 * Process high priority pre-execution raw-mode FFs.
388 */
389 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
390 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
391 {
392 rc = emR3HmForcedActions(pVM, pVCpu);
393 if (rc != VINF_SUCCESS)
394 break;
395 }
396
397#ifdef LOG_ENABLED
398 /*
399 * Log important stuff before entering GC.
400 */
401 if (TRPMHasTrap(pVCpu))
402 Log(("CPU%d: Pending hardware interrupt=0x%x cs:rip=%04X:%RGv\n", pVCpu->idCpu, TRPMGetTrapNo(pVCpu), pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
403
404 uint32_t cpl = CPUMGetGuestCPL(pVCpu);
405 if (pVM->cCpus == 1)
406 {
407 if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
408 Log(("HWV86: %08X IF=%d\n", pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
409 else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
410 Log(("HWR%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
411 else
412 Log(("HWR%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
413 }
414 else
415 {
416 if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
417 Log(("HWV86-CPU%d: %08X IF=%d\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
418 else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
419 Log(("HWR%d-CPU%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
420 else
421 Log(("HWR%d-CPU%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
422 }
423#endif /* LOG_ENABLED */
424
425 /*
426 * Execute the code.
427 */
428 STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatHMEntry, a);
429
430 if (RT_LIKELY(emR3IsExecutionAllowed(pVM, pVCpu)))
431 {
432 STAM_REL_PROFILE_START(&pVCpu->em.s.StatHMExec, x);
433 rc = VMMR3HmRunGC(pVM, pVCpu);
434 STAM_REL_PROFILE_STOP(&pVCpu->em.s.StatHMExec, x);
435 }
436 else
437 {
438 /* Give up this time slice; virtual time continues */
439 STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatCapped, u);
440 RTThreadSleep(5);
441 STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatCapped, u);
442 rc = VINF_SUCCESS;
443 }
444
445
446 /*
447 * Deal with high priority post execution FFs before doing anything else.
448 */
449 VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
450 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
451 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
452 rc = VBOXSTRICTRC_TODO(emR3HighPriorityPostForcedActions(pVM, pVCpu, rc));
453
454 /*
455 * Process the returned status code.
456 */
457 if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
458 break;
459
460 rc = emR3HmHandleRC(pVM, pVCpu, rc);
461 if (rc != VINF_SUCCESS)
462 break;
463
464 /*
465 * Check and execute forced actions.
466 */
467#ifdef VBOX_HIGH_RES_TIMERS_HACK
468 TMTimerPollVoid(pVM, pVCpu);
469#endif
470 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_ALL_MASK)
471 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_ALL_MASK))
472 {
473 rc = emR3ForcedActions(pVM, pVCpu, rc);
474 VBOXVMM_EM_FF_ALL_RET(pVCpu, rc);
475 if ( rc != VINF_SUCCESS
476 && rc != VINF_EM_RESCHEDULE_EXEC_ENGINE)
477 {
478 *pfFFDone = true;
479 break;
480 }
481 }
482 }
483
484 /*
485 * Return to outer loop.
486 */
487#if defined(LOG_ENABLED) && defined(DEBUG)
488 RTLogFlush(NULL);
489#endif
490 return rc;
491}
492
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