EMHM.cpp@ 109189

Last change on this file since 109189 was 109189, checked in by vboxsync, 23 hours ago
VMM: Removed CPUMR3DisasmInstrCPU as nobody uses it (replaced by DBGFR3DisasInstrCurrent and friends by now).
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File size: 18.6 KB

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1	/* $Id: EMHM.cpp 109189 2025-05-07 11:24:03Z vboxsync $ */
2	/** @file
3	* EM - Execution Monitor / Manager - hardware virtualization
4	*/
5
6	/*
7	* Copyright (C) 2006-2024 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	*/
27
28
29	/*********************************************************************************************************************************
30	* Header Files *
31	*********************************************************************************************************************************/
32	#define LOG_GROUP LOG_GROUP_EM
33	#define VMCPU_INCL_CPUM_GST_CTX
34	#include <VBox/vmm/em.h>
35	#include <VBox/vmm/vmm.h>
36	#include <VBox/vmm/selm.h>
37	#include <VBox/vmm/trpm.h>
38	#include <VBox/vmm/iem.h>
39	#include <VBox/vmm/iom.h>
40	#include <VBox/vmm/dbgf.h>
41	#include <VBox/vmm/pgm.h>
42	#include <VBox/vmm/tm.h>
43	#include <VBox/vmm/mm.h>
44	#include <VBox/vmm/ssm.h>
45	#include <VBox/vmm/pdmapi.h>
46	#include <VBox/vmm/pdmcritsect.h>
47	#include <VBox/vmm/pdmqueue.h>
48	#include <VBox/vmm/hm.h>
49	#include "EMInternal.h"
50	#include <VBox/vmm/vm.h>
51	#include <VBox/vmm/gim.h>
52	#include <VBox/dis.h>
53	#include <VBox/err.h>
54	#include <VBox/vmm/dbgf.h>
55	#include "VMMTracing.h"
56
57	#include <iprt/asm.h>
58
59	#include "EMInline.h"
60
61	#ifndef VBOX_WITH_HWVIRT
62	# error "VBOX_WITH_HWVIRT misconfig!"
63	#endif
64
65
66	/*********************************************************************************************************************************
67	* Internal Functions *
68	*********************************************************************************************************************************/
69	static int emR3HmHandleRC(PVM pVM, PVMCPU pVCpu, int rc);
70	DECLINLINE(int) emR3HmExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC = VINF_SUCCESS);
71	static int emR3HmExecuteIOInstruction(PVM pVM, PVMCPU pVCpu);
72	static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu);
73
74	#define EMHANDLERC_WITH_HM
75	#define emR3ExecuteInstruction emR3HmExecuteInstruction
76	#define emR3ExecuteIOInstruction emR3HmExecuteIOInstruction
77	#include "EMHandleRCTmpl.h"
78
79
80	/**
81	* Executes instruction in HM mode if we can.
82	*
83	* This is somewhat comparable to REMR3EmulateInstruction.
84	*
85	* @returns VBox strict status code.
86	* @retval VINF_EM_DBG_STEPPED on success.
87	* @retval VERR_EM_CANNOT_EXEC_GUEST if we cannot execute guest instructions in
88	* HM right now.
89	*
90	* @param pVM The cross context VM structure.
91	* @param pVCpu The cross context virtual CPU structure for the calling EMT.
92	* @param fFlags Combinations of EM_ONE_INS_FLAGS_XXX.
93	* @thread EMT.
94	*/
95	VMMR3_INT_DECL(VBOXSTRICTRC) EMR3HmSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
96	{
97	Assert(!(fFlags & ~EM_ONE_INS_FLAGS_MASK));
98
99	if (!HMCanExecuteGuest(pVM, pVCpu, &pVCpu->cpum.GstCtx))
100	return VINF_EM_RESCHEDULE;
101
102	uint64_t const uOldRip = pVCpu->cpum.GstCtx.rip;
103	for (;;)
104	{
105	/*
106	* Service necessary FFs before going into HM.
107	*/
108	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
109	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
110	{
111	VBOXSTRICTRC rcStrict = emR3HmForcedActions(pVM, pVCpu);
112	if (rcStrict != VINF_SUCCESS)
113	{
114	Log(("EMR3HmSingleInstruction: FFs before -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
115	return rcStrict;
116	}
117	}
118
119	/*
120	* Go execute it.
121	*/
122	bool fOld = HMSetSingleInstruction(pVM, pVCpu, true);
123	VBOXSTRICTRC rcStrict = VMMR3HmRunGC(pVM, pVCpu);
124	HMSetSingleInstruction(pVM, pVCpu, fOld);
125	LogFlow(("EMR3HmSingleInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
126
127	/*
128	* Handle high priority FFs and informational status codes. We don't do
129	* normal FF processing the caller or the next call can deal with them.
130	*/
131	VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
132	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
133	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
134	{
135	rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict);
136	LogFlow(("EMR3HmSingleInstruction: FFs after -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
137	}
138
139	if (rcStrict != VINF_SUCCESS && (rcStrict < VINF_EM_FIRST \|\| rcStrict > VINF_EM_LAST))
140	{
141	rcStrict = emR3HmHandleRC(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
142	Log(("EMR3HmSingleInstruction: emR3HmHandleRC -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
143	}
144
145	/*
146	* Done?
147	*/
148	if ( (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED)
149	\|\| !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE)
150	\|\| pVCpu->cpum.GstCtx.rip != uOldRip)
151	{
152	if (rcStrict == VINF_SUCCESS && pVCpu->cpum.GstCtx.rip != uOldRip)
153	rcStrict = VINF_EM_DBG_STEPPED;
154	Log(("EMR3HmSingleInstruction: returns %Rrc (rip %llx -> %llx)\n", VBOXSTRICTRC_VAL(rcStrict), uOldRip, pVCpu->cpum.GstCtx.rip));
155	CPUM_IMPORT_EXTRN_RET(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK);
156	return rcStrict;
157	}
158	}
159	}
160
161
162	/**
163	* Executes one (or perhaps a few more) instruction(s).
164	*
165	* @returns VBox status code suitable for EM.
166	*
167	* @param pVM The cross context VM structure.
168	* @param pVCpu The cross context virtual CPU structure.
169	* @param rcRC Return code from RC.
170	* @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
171	* instruction and prefix the log output with this text.
172	*/
173	#if defined(LOG_ENABLED) \|\| defined(DOXYGEN_RUNNING)
174	static int emR3HmExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC, const char *pszPrefix)
175	#else
176	static int emR3HmExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC)
177	#endif
178	{
179	RT_NOREF(rcRC, pVM);
180
181	#ifdef LOG_ENABLED
182	/*
183	* Log it.
184	*/
185	Log(("EMINS: %04x:%RGv RSP=%RGv\n", pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, (RTGCPTR)pVCpu->cpum.GstCtx.rsp));
186	if (pszPrefix)
187	{
188	DBGFR3_INFO_LOG(pVM, pVCpu, "cpumguest", pszPrefix);
189	DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
190	}
191	#endif
192
193	/*
194	* Use IEM and fallback on REM if the functionality is missing.
195	* Once IEM gets mature enough, nothing should ever fall back.
196	*/
197	STAM_PROFILE_START(&pVCpu->em.s.StatIEMEmu, a);
198	VBOXSTRICTRC rcStrict;
199	uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
200	RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
201	if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
202	{
203	CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
204	rcStrict = VBOXSTRICTRC_TODO(IEMExecOne(pVCpu));
205	}
206	else
207	{
208	RT_UNTRUSTED_VALIDATED_FENCE();
209	rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
210	LogFlow(("emR3HmExecuteInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
211	}
212	STAM_PROFILE_STOP(&pVCpu->em.s.StatIEMEmu, a);
213
214	return VBOXSTRICTRC_TODO(rcStrict);
215	}
216
217
218	/**
219	* Executes one (or perhaps a few more) instruction(s).
220	* This is just a wrapper for discarding pszPrefix in non-logging builds.
221	*
222	* @returns VBox status code suitable for EM.
223	* @param pVM The cross context VM structure.
224	* @param pVCpu The cross context virtual CPU structure.
225	* @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
226	* instruction and prefix the log output with this text.
227	* @param rcGC GC return code
228	*/
229	DECLINLINE(int) emR3HmExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC)
230	{
231	#ifdef LOG_ENABLED
232	return emR3HmExecuteInstructionWorker(pVM, pVCpu, rcGC, pszPrefix);
233	#else
234	RT_NOREF_PV(pszPrefix);
235	return emR3HmExecuteInstructionWorker(pVM, pVCpu, rcGC);
236	#endif
237	}
238
239
240	/**
241	* Executes one (or perhaps a few more) IO instruction(s).
242	*
243	* @returns VBox status code suitable for EM.
244	* @param pVM The cross context VM structure.
245	* @param pVCpu The cross context virtual CPU structure.
246	*/
247	static int emR3HmExecuteIOInstruction(PVM pVM, PVMCPU pVCpu)
248	{
249	RT_NOREF(pVM);
250	STAM_PROFILE_START(&pVCpu->em.s.StatIOEmu, a);
251
252	VBOXSTRICTRC rcStrict;
253	uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
254	RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
255	if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
256	{
257	/*
258	* Hand it over to the interpreter.
259	*/
260	CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
261	rcStrict = IEMExecOne(pVCpu);
262	LogFlow(("emR3HmExecuteIOInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
263	}
264	else
265	{
266	RT_UNTRUSTED_VALIDATED_FENCE();
267	CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
268	rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
269	LogFlow(("emR3HmExecuteIOInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
270	STAM_COUNTER_INC(&pVCpu->em.s.StatIoRestarted);
271	}
272
273	STAM_COUNTER_INC(&pVCpu->em.s.StatIoIem);
274	STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
275	return VBOXSTRICTRC_TODO(rcStrict);
276	}
277
278
279	/**
280	* Process HM specific forced actions.
281	*
282	* This function is called when any FFs in the VM_FF_HIGH_PRIORITY_PRE_RAW_MASK
283	* or/and VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK are pending.
284	*
285	* @returns VBox status code. May return VINF_EM_NO_MEMORY but none of the other
286	* EM statuses.
287	* @param pVM The cross context VM structure.
288	* @param pVCpu The cross context virtual CPU structure.
289	*/
290	static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu)
291	{
292	/*
293	* Sync page directory.
294	*/
295	if (VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL))
296	{
297	CPUM_IMPORT_EXTRN_RET(pVCpu, CPUMCTX_EXTRN_CR0 \| CPUMCTX_EXTRN_CR3 \| CPUMCTX_EXTRN_CR4);
298	Assert(pVCpu->em.s.enmState != EMSTATE_WAIT_SIPI);
299	int rc = PGMSyncCR3(pVCpu, pVCpu->cpum.GstCtx.cr0, pVCpu->cpum.GstCtx.cr3, pVCpu->cpum.GstCtx.cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
300	if (RT_FAILURE(rc))
301	return rc;
302
303	/* Prefetch pages for EIP and ESP. */
304	/** @todo This is rather expensive. Should investigate if it really helps at all. */
305	/** @todo this should be skipped! */
306	CPUM_IMPORT_EXTRN_RET(pVCpu, CPUMCTX_EXTRN_CS \| CPUMCTX_EXTRN_SS);
307	rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVCpu, X86_SREG_CS, &pVCpu->cpum.GstCtx, pVCpu->cpum.GstCtx.rip));
308	if (rc == VINF_SUCCESS)
309	rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVCpu, X86_SREG_SS, &pVCpu->cpum.GstCtx, pVCpu->cpum.GstCtx.rsp));
310	if (rc != VINF_SUCCESS)
311	{
312	if (rc != VINF_PGM_SYNC_CR3)
313	{
314	AssertLogRelMsgReturn(RT_FAILURE(rc), ("%Rrc\n", rc), VERR_IPE_UNEXPECTED_INFO_STATUS);
315	return rc;
316	}
317	rc = PGMSyncCR3(pVCpu, pVCpu->cpum.GstCtx.cr0, pVCpu->cpum.GstCtx.cr3, pVCpu->cpum.GstCtx.cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
318	if (RT_FAILURE(rc))
319	return rc;
320	}
321	/** @todo maybe prefetch the supervisor stack page as well */
322	}
323
324	/*
325	* Allocate handy pages (just in case the above actions have consumed some pages).
326	*/
327	if (VM_FF_IS_PENDING_EXCEPT(pVM, VM_FF_PGM_NEED_HANDY_PAGES, VM_FF_PGM_NO_MEMORY))
328	{
329	int rc = PGMR3PhysAllocateHandyPages(pVM);
330	if (RT_FAILURE(rc))
331	return rc;
332	}
333
334	/*
335	* Check whether we're out of memory now.
336	*
337	* This may stem from some of the above actions or operations that has been executed
338	* since we ran FFs. The allocate handy pages must for instance always be followed by
339	* this check.
340	*/
341	if (VM_FF_IS_SET(pVM, VM_FF_PGM_NO_MEMORY))
342	return VINF_EM_NO_MEMORY;
343
344	return VINF_SUCCESS;
345	}
346
347
348	/**
349	* Executes hardware accelerated raw code. (Intel VT-x & AMD-V)
350	*
351	* This function contains the inner EM execution loop for HM (the outer loop
352	* being in EMR3ExecuteVM()).
353	*
354	* @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE,
355	* VINF_EM_RESCHEDULE_REM, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
356	*
357	* @param pVM The cross context VM structure.
358	* @param pVCpu The cross context virtual CPU structure.
359	* @param pfFFDone Where to store an indicator telling whether or not
360	* FFs were done before returning.
361	*/
362	int emR3HmExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone)
363	{
364	int rc = VERR_IPE_UNINITIALIZED_STATUS;
365
366	LogFlow(("emR3HmExecute%d: (cs:eip=%04x:%RGv)\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
367	*pfFFDone = false;
368
369	STAM_REL_COUNTER_INC(&pVCpu->em.s.StatHMExecuteCalled);
370
371	/*
372	* Spin till we get a forced action which returns anything but VINF_SUCCESS.
373	*/
374	for (;;)
375	{
376	STAM_PROFILE_ADV_START(&pVCpu->em.s.StatHMEntry, a);
377
378	/* Check if a forced reschedule is pending. */
379	if (HMR3IsRescheduleRequired(pVM, &pVCpu->cpum.GstCtx))
380	{
381	rc = VINF_EM_RESCHEDULE;
382	break;
383	}
384
385	/*
386	* Process high priority pre-execution raw-mode FFs.
387	*/
388	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
389	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
390	{
391	rc = emR3HmForcedActions(pVM, pVCpu);
392	if (rc != VINF_SUCCESS)
393	break;
394	}
395
396	#ifdef LOG_ENABLED
397	/*
398	* Log important stuff before entering GC.
399	*/
400	if (TRPMHasTrap(pVCpu))
401	Log(("CPU%d: Pending hardware interrupt=0x%x cs:rip=%04X:%RGv\n", pVCpu->idCpu, TRPMGetTrapNo(pVCpu), pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
402
403	uint32_t cpl = CPUMGetGuestCPL(pVCpu);
404	if (pVM->cCpus == 1)
405	{
406	if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
407	Log(("HWV86: %08X IF=%d\n", pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
408	else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
409	Log(("HWR%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
410	else
411	Log(("HWR%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
412	}
413	else
414	{
415	if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
416	Log(("HWV86-CPU%d: %08X IF=%d\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
417	else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
418	Log(("HWR%d-CPU%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
419	else
420	Log(("HWR%d-CPU%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
421	}
422	#endif /* LOG_ENABLED */
423
424	/*
425	* Execute the code.
426	*/
427	STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatHMEntry, a);
428
429	if (RT_LIKELY(emR3IsExecutionAllowed(pVM, pVCpu)))
430	{
431	STAM_REL_PROFILE_START(&pVCpu->em.s.StatHMExec, x);
432	rc = VMMR3HmRunGC(pVM, pVCpu);
433	STAM_REL_PROFILE_STOP(&pVCpu->em.s.StatHMExec, x);
434	}
435	else
436	{
437	/* Give up this time slice; virtual time continues */
438	STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatCapped, u);
439	RTThreadSleep(5);
440	STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatCapped, u);
441	rc = VINF_SUCCESS;
442	}
443
444
445	/*
446	* Deal with high priority post execution FFs before doing anything else.
447	*/
448	VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
449	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
450	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
451	rc = VBOXSTRICTRC_TODO(emR3HighPriorityPostForcedActions(pVM, pVCpu, rc));
452
453	/*
454	* Process the returned status code.
455	*/
456	if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
457	break;
458
459	rc = emR3HmHandleRC(pVM, pVCpu, rc);
460	if (rc != VINF_SUCCESS)
461	break;
462
463	/*
464	* Check and execute forced actions.
465	*/
466	#ifdef VBOX_HIGH_RES_TIMERS_HACK
467	TMTimerPollVoid(pVM, pVCpu);
468	#endif
469	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_ALL_MASK)
470	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_ALL_MASK))
471	{
472	rc = emR3ForcedActions(pVM, pVCpu, rc);
473	VBOXVMM_EM_FF_ALL_RET(pVCpu, rc);
474	if ( rc != VINF_SUCCESS
475	&& rc != VINF_EM_RESCHEDULE_EXEC_ENGINE)
476	{
477	*pfFFDone = true;
478	break;
479	}
480	}
481	}
482
483	/*
484	* Return to outer loop.
485	*/
486	#if defined(LOG_ENABLED) && defined(DEBUG)
487	RTLogFlush(NULL);
488	#endif
489	return rc;
490	}
491

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source: vbox/trunk/src/VBox/VMM/VMMR3/EMHM.cpp@ 109189

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