EMHM.cpp@ 61705

Last change on this file since 61705 was 61634, checked in by vboxsync, 9 years ago
Fixed DBGFR3_INFO_LOG to only run on the current EMT as we'll easily deadlock if we involv other EMT like for cpumguest.
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 18.5 KB

Line
1	/* $Id: EMHM.cpp 61634 2016-06-09 18:23:17Z vboxsync $ */
2	/** @file
3	* EM - Execution Monitor / Manager - hardware virtualization
4	*/
5
6	/*
7	* Copyright (C) 2006-2015 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_EM
23	#include <VBox/vmm/em.h>
24	#include <VBox/vmm/vmm.h>
25	#include <VBox/vmm/csam.h>
26	#include <VBox/vmm/selm.h>
27	#include <VBox/vmm/trpm.h>
28	#include <VBox/vmm/iem.h>
29	#include <VBox/vmm/iom.h>
30	#include <VBox/vmm/dbgf.h>
31	#include <VBox/vmm/pgm.h>
32	#ifdef VBOX_WITH_REM
33	# include <VBox/vmm/rem.h>
34	#endif
35	#include <VBox/vmm/tm.h>
36	#include <VBox/vmm/mm.h>
37	#include <VBox/vmm/ssm.h>
38	#include <VBox/vmm/pdmapi.h>
39	#include <VBox/vmm/pdmcritsect.h>
40	#include <VBox/vmm/pdmqueue.h>
41	#include <VBox/vmm/hm.h>
42	#include "EMInternal.h"
43	#include <VBox/vmm/vm.h>
44	#include <VBox/vmm/gim.h>
45	#include <VBox/vmm/cpumdis.h>
46	#include <VBox/dis.h>
47	#include <VBox/disopcode.h>
48	#include <VBox/vmm/dbgf.h>
49	#include "VMMTracing.h"
50
51	#include <iprt/asm.h>
52
53
54	/*********************************************************************************************************************************
55	* Defined Constants And Macros *
56	*********************************************************************************************************************************/
57	#if 0 /* Disabled till after 2.1.0 when we've time to test it. */
58	#define EM_NOTIFY_HM
59	#endif
60
61
62	/*********************************************************************************************************************************
63	* Internal Functions *
64	*********************************************************************************************************************************/
65	DECLINLINE(int) emR3HmExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC = VINF_SUCCESS);
66	static int emR3HmExecuteIOInstruction(PVM pVM, PVMCPU pVCpu);
67	static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
68
69	#define EMHANDLERC_WITH_HM
70	#define emR3ExecuteInstruction emR3HmExecuteInstruction
71	#define emR3ExecuteIOInstruction emR3HmExecuteIOInstruction
72	#include "EMHandleRCTmpl.h"
73
74
75	/**
76	* Executes instruction in HM mode if we can.
77	*
78	* This is somewhat comparable to REMR3EmulateInstruction.
79	*
80	* @returns VBox strict status code.
81	* @retval VINF_EM_DBG_STEPPED on success.
82	* @retval VERR_EM_CANNOT_EXEC_GUEST if we cannot execute guest instructions in
83	* HM right now.
84	*
85	* @param pVM The cross context VM structure.
86	* @param pVCpu The cross context virtual CPU structure for the calling EMT.
87	* @param fFlags Combinations of EM_ONE_INS_FLAGS_XXX.
88	* @thread EMT.
89	*/
90	VMMR3_INT_DECL(VBOXSTRICTRC) EMR3HmSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
91	{
92	PCPUMCTX pCtx = pVCpu->em.s.pCtx;
93	Assert(!(fFlags & ~EM_ONE_INS_FLAGS_MASK));
94
95	if (!HMR3CanExecuteGuest(pVM, pCtx))
96	return VINF_EM_RESCHEDULE;
97
98	uint64_t const uOldRip = pCtx->rip;
99	for (;;)
100	{
101	/*
102	* Service necessary FFs before going into HM.
103	*/
104	if ( VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
105	\|\| VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
106	{
107	VBOXSTRICTRC rcStrict = emR3HmForcedActions(pVM, pVCpu, pCtx);
108	if (rcStrict != VINF_SUCCESS)
109	{
110	Log(("EMR3HmSingleInstruction: FFs before -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
111	return rcStrict;
112	}
113	}
114
115	/*
116	* Go execute it.
117	*/
118	bool fOld = HMSetSingleInstruction(pVM, pVCpu, true);
119	VBOXSTRICTRC rcStrict = VMMR3HmRunGC(pVM, pVCpu);
120	HMSetSingleInstruction(pVM, pVCpu, fOld);
121	LogFlow(("EMR3HmSingleInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
122
123	/*
124	* Handle high priority FFs and informational status codes. We don't do
125	* normal FF processing the caller or the next call can deal with them.
126	*/
127	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
128	if ( VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
129	\|\| VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
130	{
131	rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
132	LogFlow(("EMR3HmSingleInstruction: FFs after -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
133	}
134
135	if (rcStrict != VINF_SUCCESS && (rcStrict < VINF_EM_FIRST \|\| rcStrict > VINF_EM_LAST))
136	{
137	rcStrict = emR3HmHandleRC(pVM, pVCpu, pCtx, VBOXSTRICTRC_TODO(rcStrict));
138	Log(("EMR3HmSingleInstruction: emR3HmHandleRC -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
139	}
140
141	/*
142	* Done?
143	*/
144	if ( (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED)
145	\|\| !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE)
146	\|\| pCtx->rip != uOldRip)
147	{
148	if (rcStrict == VINF_SUCCESS && pCtx->rip != uOldRip)
149	rcStrict = VINF_EM_DBG_STEPPED;
150	Log(("EMR3HmSingleInstruction: returns %Rrc (rip %llx -> %llx)\n", VBOXSTRICTRC_VAL(rcStrict), uOldRip, pCtx->rip));
151	return rcStrict;
152	}
153	}
154	}
155
156
157	/**
158	* Executes one (or perhaps a few more) instruction(s).
159	*
160	* @returns VBox status code suitable for EM.
161	*
162	* @param pVM The cross context VM structure.
163	* @param pVCpu The cross context virtual CPU structure.
164	* @param rcRC Return code from RC.
165	* @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
166	* instruction and prefix the log output with this text.
167	*/
168	#if defined(LOG_ENABLED) \|\| defined(DOXYGEN_RUNNING)
169	static int emR3HmExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC, const char *pszPrefix)
170	#else
171	static int emR3HmExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC)
172	#endif
173	{
174	#ifdef LOG_ENABLED
175	PCPUMCTX pCtx = pVCpu->em.s.pCtx;
176	#endif
177	int rc;
178	NOREF(rcRC);
179
180	#ifdef LOG_ENABLED
181	/*
182	* Log it.
183	*/
184	Log(("EMINS: %04x:%RGv RSP=%RGv\n", pCtx->cs.Sel, (RTGCPTR)pCtx->rip, (RTGCPTR)pCtx->rsp));
185	if (pszPrefix)
186	{
187	DBGFR3_INFO_LOG(pVM, pVCpu, "cpumguest", pszPrefix);
188	DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
189	}
190	#endif
191
192	/*
193	* Use IEM and fallback on REM if the functionality is missing.
194	* Once IEM gets mature enough, nothing should ever fall back.
195	*/
196	STAM_PROFILE_START(&pVCpu->em.s.StatIEMEmu, a);
197	rc = VBOXSTRICTRC_TODO(IEMExecOne(pVCpu));
198	STAM_PROFILE_STOP(&pVCpu->em.s.StatIEMEmu, a);
199
200	if ( rc == VERR_IEM_ASPECT_NOT_IMPLEMENTED
201	\|\| rc == VERR_IEM_INSTR_NOT_IMPLEMENTED)
202	{
203	#ifdef VBOX_WITH_REM
204	STAM_PROFILE_START(&pVCpu->em.s.StatREMEmu, b);
205	EMRemLock(pVM);
206	/* Flush the recompiler TLB if the VCPU has changed. */
207	if (pVM->em.s.idLastRemCpu != pVCpu->idCpu)
208	CPUMSetChangedFlags(pVCpu, CPUM_CHANGED_ALL);
209	pVM->em.s.idLastRemCpu = pVCpu->idCpu;
210
211	rc = REMR3EmulateInstruction(pVM, pVCpu);
212	EMRemUnlock(pVM);
213	STAM_PROFILE_STOP(&pVCpu->em.s.StatREMEmu, b);
214	#else /* !VBOX_WITH_REM */
215	NOREF(pVM);
216	#endif /* !VBOX_WITH_REM */
217	}
218
219	#ifdef EM_NOTIFY_HM
220	if (pVCpu->em.s.enmState == EMSTATE_DEBUG_GUEST_HM)
221	HMR3NotifyEmulated(pVCpu);
222	#endif
223	return rc;
224	}
225
226
227	/**
228	* Executes one (or perhaps a few more) instruction(s).
229	* This is just a wrapper for discarding pszPrefix in non-logging builds.
230	*
231	* @returns VBox status code suitable for EM.
232	* @param pVM The cross context VM structure.
233	* @param pVCpu The cross context virtual CPU structure.
234	* @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
235	* instruction and prefix the log output with this text.
236	* @param rcGC GC return code
237	*/
238	DECLINLINE(int) emR3HmExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC)
239	{
240	#ifdef LOG_ENABLED
241	return emR3HmExecuteInstructionWorker(pVM, pVCpu, rcGC, pszPrefix);
242	#else
243	return emR3HmExecuteInstructionWorker(pVM, pVCpu, rcGC);
244	#endif
245	}
246
247	/**
248	* Executes one (or perhaps a few more) IO instruction(s).
249	*
250	* @returns VBox status code suitable for EM.
251	* @param pVM The cross context VM structure.
252	* @param pVCpu The cross context virtual CPU structure.
253	*/
254	static int emR3HmExecuteIOInstruction(PVM pVM, PVMCPU pVCpu)
255	{
256	PCPUMCTX pCtx = pVCpu->em.s.pCtx;
257
258	STAM_PROFILE_START(&pVCpu->em.s.StatIOEmu, a);
259
260	/*
261	* Try to restart the io instruction that was refused in ring-0.
262	*/
263	VBOXSTRICTRC rcStrict = HMR3RestartPendingIOInstr(pVM, pVCpu, pCtx);
264	if (IOM_SUCCESS(rcStrict))
265	{
266	STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIoRestarted);
267	STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
268	return VBOXSTRICTRC_TODO(rcStrict); /* rip already updated. */
269	}
270	AssertMsgReturn(rcStrict == VERR_NOT_FOUND, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
271	RT_SUCCESS_NP(rcStrict) ? VERR_IPE_UNEXPECTED_INFO_STATUS : VBOXSTRICTRC_TODO(rcStrict));
272
273	/*
274	* Hand it over to the interpreter.
275	*/
276	rcStrict = IEMExecOne(pVCpu);
277	LogFlow(("emR3HmExecuteIOInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
278	STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIoIem);
279	STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
280	return VBOXSTRICTRC_TODO(rcStrict);
281	}
282
283
284	/**
285	* Process raw-mode specific forced actions.
286	*
287	* This function is called when any FFs in the VM_FF_HIGH_PRIORITY_PRE_RAW_MASK is pending.
288	*
289	* @returns VBox status code. May return VINF_EM_NO_MEMORY but none of the other
290	* EM statuses.
291	* @param pVM The cross context VM structure.
292	* @param pVCpu The cross context virtual CPU structure.
293	* @param pCtx Pointer to the guest CPU context.
294	*/
295	static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)
296	{
297	/*
298	* Sync page directory.
299	*/
300	if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL))
301	{
302	Assert(pVCpu->em.s.enmState != EMSTATE_WAIT_SIPI);
303	int rc = PGMSyncCR3(pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
304	if (RT_FAILURE(rc))
305	return rc;
306
307	#ifdef VBOX_WITH_RAW_MODE
308	Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT));
309	#endif
310
311	/* Prefetch pages for EIP and ESP. */
312	/** @todo This is rather expensive. Should investigate if it really helps at all. */
313	rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVM, DISSELREG_CS, CPUMCTX2CORE(pCtx), pCtx->rip));
314	if (rc == VINF_SUCCESS)
315	rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVM, DISSELREG_SS, CPUMCTX2CORE(pCtx), pCtx->rsp));
316	if (rc != VINF_SUCCESS)
317	{
318	if (rc != VINF_PGM_SYNC_CR3)
319	{
320	AssertLogRelMsgReturn(RT_FAILURE(rc), ("%Rrc\n", rc), VERR_IPE_UNEXPECTED_INFO_STATUS);
321	return rc;
322	}
323	rc = PGMSyncCR3(pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
324	if (RT_FAILURE(rc))
325	return rc;
326	}
327	/** @todo maybe prefetch the supervisor stack page as well */
328	#ifdef VBOX_WITH_RAW_MODE
329	Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT));
330	#endif
331	}
332
333	/*
334	* Allocate handy pages (just in case the above actions have consumed some pages).
335	*/
336	if (VM_FF_IS_PENDING_EXCEPT(pVM, VM_FF_PGM_NEED_HANDY_PAGES, VM_FF_PGM_NO_MEMORY))
337	{
338	int rc = PGMR3PhysAllocateHandyPages(pVM);
339	if (RT_FAILURE(rc))
340	return rc;
341	}
342
343	/*
344	* Check whether we're out of memory now.
345	*
346	* This may stem from some of the above actions or operations that has been executed
347	* since we ran FFs. The allocate handy pages must for instance always be followed by
348	* this check.
349	*/
350	if (VM_FF_IS_PENDING(pVM, VM_FF_PGM_NO_MEMORY))
351	return VINF_EM_NO_MEMORY;
352
353	return VINF_SUCCESS;
354	}
355
356
357	/**
358	* Executes hardware accelerated raw code. (Intel VT-x & AMD-V)
359	*
360	* This function contains the raw-mode version of the inner
361	* execution loop (the outer loop being in EMR3ExecuteVM()).
362	*
363	* @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE, VINF_EM_RESCHEDULE_RAW,
364	* VINF_EM_RESCHEDULE_REM, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
365	*
366	* @param pVM The cross context VM structure.
367	* @param pVCpu The cross context virtual CPU structure.
368	* @param pfFFDone Where to store an indicator telling whether or not
369	* FFs were done before returning.
370	*/
371	int emR3HmExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone)
372	{
373	int rc = VERR_IPE_UNINITIALIZED_STATUS;
374	PCPUMCTX pCtx = pVCpu->em.s.pCtx;
375
376	LogFlow(("emR3HmExecute%d: (cs:eip=%04x:%RGv)\n", pVCpu->idCpu, pCtx->cs.Sel, (RTGCPTR)pCtx->rip));
377	*pfFFDone = false;
378
379	STAM_COUNTER_INC(&pVCpu->em.s.StatHmExecuteEntry);
380
381	#ifdef EM_NOTIFY_HM
382	HMR3NotifyScheduled(pVCpu);
383	#endif
384
385	/*
386	* Spin till we get a forced action which returns anything but VINF_SUCCESS.
387	*/
388	for (;;)
389	{
390	STAM_PROFILE_ADV_START(&pVCpu->em.s.StatHmEntry, a);
391
392	/* Check if a forced reschedule is pending. */
393	if (HMR3IsRescheduleRequired(pVM, pCtx))
394	{
395	rc = VINF_EM_RESCHEDULE;
396	break;
397	}
398
399	/*
400	* Process high priority pre-execution raw-mode FFs.
401	*/
402	#ifdef VBOX_WITH_RAW_MODE
403	Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT));
404	#endif
405	if ( VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
406	\|\| VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
407	{
408	rc = emR3HmForcedActions(pVM, pVCpu, pCtx);
409	if (rc != VINF_SUCCESS)
410	break;
411	}
412
413	#ifdef LOG_ENABLED
414	/*
415	* Log important stuff before entering GC.
416	*/
417	if (TRPMHasTrap(pVCpu))
418	Log(("CPU%d: Pending hardware interrupt=0x%x cs:rip=%04X:%RGv\n", pVCpu->idCpu, TRPMGetTrapNo(pVCpu), pCtx->cs.Sel, (RTGCPTR)pCtx->rip));
419
420	uint32_t cpl = CPUMGetGuestCPL(pVCpu);
421
422	if (pVM->cCpus == 1)
423	{
424	if (pCtx->eflags.Bits.u1VM)
425	Log(("HWV86: %08X IF=%d\n", pCtx->eip, pCtx->eflags.Bits.u1IF));
426	else if (CPUMIsGuestIn64BitCodeEx(pCtx))
427	Log(("HWR%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pCtx->cs.Sel, (RTGCPTR)pCtx->rip, pCtx->rsp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
428	else
429	Log(("HWR%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pCtx->cs.Sel, pCtx->eip, pCtx->esp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
430	}
431	else
432	{
433	if (pCtx->eflags.Bits.u1VM)
434	Log(("HWV86-CPU%d: %08X IF=%d\n", pVCpu->idCpu, pCtx->eip, pCtx->eflags.Bits.u1IF));
435	else if (CPUMIsGuestIn64BitCodeEx(pCtx))
436	Log(("HWR%d-CPU%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pCtx->cs.Sel, (RTGCPTR)pCtx->rip, pCtx->rsp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
437	else
438	Log(("HWR%d-CPU%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pCtx->cs.Sel, pCtx->eip, pCtx->esp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
439	}
440	#endif /* LOG_ENABLED */
441
442	/*
443	* Execute the code.
444	*/
445	STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatHmEntry, a);
446
447	if (RT_LIKELY(emR3IsExecutionAllowed(pVM, pVCpu)))
448	{
449	STAM_PROFILE_START(&pVCpu->em.s.StatHmExec, x);
450	rc = VMMR3HmRunGC(pVM, pVCpu);
451	STAM_PROFILE_STOP(&pVCpu->em.s.StatHmExec, x);
452	}
453	else
454	{
455	/* Give up this time slice; virtual time continues */
456	STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatCapped, u);
457	RTThreadSleep(5);
458	STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatCapped, u);
459	rc = VINF_SUCCESS;
460	}
461
462
463	/*
464	* Deal with high priority post execution FFs before doing anything else.
465	*/
466	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
467	if ( VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
468	\|\| VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
469	rc = emR3HighPriorityPostForcedActions(pVM, pVCpu, rc);
470
471	/*
472	* Process the returned status code.
473	*/
474	if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
475	break;
476
477	rc = emR3HmHandleRC(pVM, pVCpu, pCtx, rc);
478	if (rc != VINF_SUCCESS)
479	break;
480
481	/*
482	* Check and execute forced actions.
483	*/
484	#ifdef VBOX_HIGH_RES_TIMERS_HACK
485	TMTimerPollVoid(pVM, pVCpu);
486	#endif
487	if ( VM_FF_IS_PENDING(pVM, VM_FF_ALL_MASK)
488	\|\| VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_ALL_MASK))
489	{
490	rc = emR3ForcedActions(pVM, pVCpu, rc);
491	VBOXVMM_EM_FF_ALL_RET(pVCpu, rc);
492	if ( rc != VINF_SUCCESS
493	&& rc != VINF_EM_RESCHEDULE_HM)
494	{
495	*pfFFDone = true;
496	break;
497	}
498	}
499	}
500
501	/*
502	* Return to outer loop.
503	*/
504	#if defined(LOG_ENABLED) && defined(DEBUG)
505	RTLogFlush(NULL);
506	#endif
507	return rc;
508	}
509

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source: vbox/trunk/src/VBox/VMM/VMMR3/EMHM.cpp@ 61705

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