EMHM.cpp@ 72610

Last change on this file since 72610 was 72598, checked in by vboxsync, 7 years ago
EMHM.cpp: Prepping for EMHistoryExec-to-ring-3 and CPUMCTX_EXTRN_xxx.
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File size: 20.2 KB

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1	/* $Id: EMHM.cpp 72598 2018-06-18 13:32:05Z vboxsync $ */
2	/** @file
3	* EM - Execution Monitor / Manager - hardware virtualization
4	*/
5
6	/*
7	* Copyright (C) 2006-2017 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_EM
23	#define VMCPU_INCL_CPUM_GST_CTX
24	#include <VBox/vmm/em.h>
25	#include <VBox/vmm/vmm.h>
26	#include <VBox/vmm/csam.h>
27	#include <VBox/vmm/selm.h>
28	#include <VBox/vmm/trpm.h>
29	#include <VBox/vmm/iem.h>
30	#include <VBox/vmm/iom.h>
31	#include <VBox/vmm/dbgf.h>
32	#include <VBox/vmm/pgm.h>
33	#ifdef VBOX_WITH_REM
34	# include <VBox/vmm/rem.h>
35	#endif
36	#include <VBox/vmm/tm.h>
37	#include <VBox/vmm/mm.h>
38	#include <VBox/vmm/ssm.h>
39	#include <VBox/vmm/pdmapi.h>
40	#include <VBox/vmm/pdmcritsect.h>
41	#include <VBox/vmm/pdmqueue.h>
42	#include <VBox/vmm/hm.h>
43	#include "EMInternal.h"
44	#include <VBox/vmm/vm.h>
45	#include <VBox/vmm/gim.h>
46	#include <VBox/vmm/cpumdis.h>
47	#include <VBox/dis.h>
48	#include <VBox/disopcode.h>
49	#include <VBox/vmm/dbgf.h>
50	#include "VMMTracing.h"
51
52	#include <iprt/asm.h>
53
54
55	/*********************************************************************************************************************************
56	* Defined Constants And Macros *
57	*********************************************************************************************************************************/
58	#if 0 /* Disabled till after 2.1.0 when we've time to test it. */
59	#define EM_NOTIFY_HM
60	#endif
61
62
63	/*********************************************************************************************************************************
64	* Internal Functions *
65	*********************************************************************************************************************************/
66	DECLINLINE(int) emR3HmExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC = VINF_SUCCESS);
67	static int emR3HmExecuteIOInstruction(PVM pVM, PVMCPU pVCpu);
68	static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
69
70	#define EMHANDLERC_WITH_HM
71	#define emR3ExecuteInstruction emR3HmExecuteInstruction
72	#define emR3ExecuteIOInstruction emR3HmExecuteIOInstruction
73	#include "EMHandleRCTmpl.h"
74
75
76	/**
77	* Executes instruction in HM mode if we can.
78	*
79	* This is somewhat comparable to REMR3EmulateInstruction.
80	*
81	* @returns VBox strict status code.
82	* @retval VINF_EM_DBG_STEPPED on success.
83	* @retval VERR_EM_CANNOT_EXEC_GUEST if we cannot execute guest instructions in
84	* HM right now.
85	*
86	* @param pVM The cross context VM structure.
87	* @param pVCpu The cross context virtual CPU structure for the calling EMT.
88	* @param fFlags Combinations of EM_ONE_INS_FLAGS_XXX.
89	* @thread EMT.
90	*/
91	VMMR3_INT_DECL(VBOXSTRICTRC) EMR3HmSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
92	{
93	PCPUMCTX pCtx = pVCpu->em.s.pCtx;
94	Assert(!(fFlags & ~EM_ONE_INS_FLAGS_MASK));
95
96	if (!HMR3CanExecuteGuest(pVM, pCtx))
97	return VINF_EM_RESCHEDULE;
98
99	uint64_t const uOldRip = pCtx->rip;
100	for (;;)
101	{
102	/*
103	* Service necessary FFs before going into HM.
104	*/
105	if ( VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
106	\|\| VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
107	{
108	VBOXSTRICTRC rcStrict = emR3HmForcedActions(pVM, pVCpu, pCtx);
109	if (rcStrict != VINF_SUCCESS)
110	{
111	Log(("EMR3HmSingleInstruction: FFs before -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
112	return rcStrict;
113	}
114	}
115
116	/*
117	* Go execute it.
118	*/
119	bool fOld = HMSetSingleInstruction(pVM, pVCpu, true);
120	VBOXSTRICTRC rcStrict = VMMR3HmRunGC(pVM, pVCpu);
121	HMSetSingleInstruction(pVM, pVCpu, fOld);
122	LogFlow(("EMR3HmSingleInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
123
124	/*
125	* Handle high priority FFs and informational status codes. We don't do
126	* normal FF processing the caller or the next call can deal with them.
127	*/
128	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
129	if ( VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
130	\|\| VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
131	{
132	rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict);
133	LogFlow(("EMR3HmSingleInstruction: FFs after -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
134	}
135
136	if (rcStrict != VINF_SUCCESS && (rcStrict < VINF_EM_FIRST \|\| rcStrict > VINF_EM_LAST))
137	{
138	rcStrict = emR3HmHandleRC(pVM, pVCpu, pCtx, VBOXSTRICTRC_TODO(rcStrict));
139	Log(("EMR3HmSingleInstruction: emR3HmHandleRC -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
140	}
141
142	/*
143	* Done?
144	*/
145	if ( (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED)
146	\|\| !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE)
147	\|\| pCtx->rip != uOldRip)
148	{
149	if (rcStrict == VINF_SUCCESS && pCtx->rip != uOldRip)
150	rcStrict = VINF_EM_DBG_STEPPED;
151	Log(("EMR3HmSingleInstruction: returns %Rrc (rip %llx -> %llx)\n", VBOXSTRICTRC_VAL(rcStrict), uOldRip, pCtx->rip));
152	CPUM_IMPORT_EXTRN_RET(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK);
153	return rcStrict;
154	}
155	}
156	}
157
158
159	/**
160	* Executes one (or perhaps a few more) instruction(s).
161	*
162	* @returns VBox status code suitable for EM.
163	*
164	* @param pVM The cross context VM structure.
165	* @param pVCpu The cross context virtual CPU structure.
166	* @param rcRC Return code from RC.
167	* @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
168	* instruction and prefix the log output with this text.
169	*/
170	#if defined(LOG_ENABLED) \|\| defined(DOXYGEN_RUNNING)
171	static int emR3HmExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC, const char *pszPrefix)
172	#else
173	static int emR3HmExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC)
174	#endif
175	{
176	#ifdef LOG_ENABLED
177	PCPUMCTX pCtx = pVCpu->em.s.pCtx;
178	#endif
179	NOREF(rcRC);
180
181	#ifdef LOG_ENABLED
182	/*
183	* Log it.
184	*/
185	Log(("EMINS: %04x:%RGv RSP=%RGv\n", pCtx->cs.Sel, (RTGCPTR)pCtx->rip, (RTGCPTR)pCtx->rsp));
186	if (pszPrefix)
187	{
188	DBGFR3_INFO_LOG(pVM, pVCpu, "cpumguest", pszPrefix);
189	DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
190	}
191	#endif
192
193	/*
194	* Use IEM and fallback on REM if the functionality is missing.
195	* Once IEM gets mature enough, nothing should ever fall back.
196	*/
197	STAM_PROFILE_START(&pVCpu->em.s.StatIEMEmu, a);
198	VBOXSTRICTRC rcStrict;
199	uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
200	RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
201	if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
202	{
203	CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
204	rcStrict = VBOXSTRICTRC_TODO(IEMExecOne(pVCpu));
205	}
206	else
207	{
208	RT_UNTRUSTED_VALIDATED_FENCE();
209	rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
210	LogFlow(("emR3HmExecuteInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
211	}
212	STAM_PROFILE_STOP(&pVCpu->em.s.StatIEMEmu, a);
213
214	if ( rcStrict == VERR_IEM_ASPECT_NOT_IMPLEMENTED
215	\|\| rcStrict == VERR_IEM_INSTR_NOT_IMPLEMENTED)
216	{
217	#ifdef VBOX_WITH_REM
218	STAM_PROFILE_START(&pVCpu->em.s.StatREMEmu, b);
219	EMRemLock(pVM);
220	/* Flush the recompiler TLB if the VCPU has changed. */
221	if (pVM->em.s.idLastRemCpu != pVCpu->idCpu)
222	CPUMSetChangedFlags(pVCpu, CPUM_CHANGED_ALL);
223	pVM->em.s.idLastRemCpu = pVCpu->idCpu;
224
225	rcStrict = REMR3EmulateInstruction(pVM, pVCpu);
226	EMRemUnlock(pVM);
227	STAM_PROFILE_STOP(&pVCpu->em.s.StatREMEmu, b);
228	#else /* !VBOX_WITH_REM */
229	NOREF(pVM);
230	#endif /* !VBOX_WITH_REM */
231	}
232
233	#ifdef EM_NOTIFY_HM
234	if (pVCpu->em.s.enmState == EMSTATE_DEBUG_GUEST_HM)
235	HMR3NotifyEmulated(pVCpu);
236	#endif
237	return VBOXSTRICTRC_TODO(rcStrict);
238	}
239
240
241	/**
242	* Executes one (or perhaps a few more) instruction(s).
243	* This is just a wrapper for discarding pszPrefix in non-logging builds.
244	*
245	* @returns VBox status code suitable for EM.
246	* @param pVM The cross context VM structure.
247	* @param pVCpu The cross context virtual CPU structure.
248	* @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
249	* instruction and prefix the log output with this text.
250	* @param rcGC GC return code
251	*/
252	DECLINLINE(int) emR3HmExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC)
253	{
254	#ifdef LOG_ENABLED
255	return emR3HmExecuteInstructionWorker(pVM, pVCpu, rcGC, pszPrefix);
256	#else
257	RT_NOREF_PV(pszPrefix);
258	return emR3HmExecuteInstructionWorker(pVM, pVCpu, rcGC);
259	#endif
260	}
261
262	/**
263	* Executes one (or perhaps a few more) IO instruction(s).
264	*
265	* @returns VBox status code suitable for EM.
266	* @param pVM The cross context VM structure.
267	* @param pVCpu The cross context virtual CPU structure.
268	*/
269	static int emR3HmExecuteIOInstruction(PVM pVM, PVMCPU pVCpu)
270	{
271	PCPUMCTX pCtx = pVCpu->em.s.pCtx;
272
273	STAM_PROFILE_START(&pVCpu->em.s.StatIOEmu, a);
274
275	VBOXSTRICTRC rcStrict;
276	uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
277	RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
278	if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
279	{
280	/*
281	* Try to restart the io instruction that was refused in ring-0.
282	*/
283	rcStrict = HMR3RestartPendingIOInstr(pVM, pVCpu, pCtx);
284	if (IOM_SUCCESS(rcStrict))
285	{
286	STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIoRestarted);
287	STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
288	return VBOXSTRICTRC_TODO(rcStrict); /* rip already updated. */
289	}
290	AssertMsgReturn(rcStrict == VERR_NOT_FOUND, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
291	RT_SUCCESS_NP(rcStrict) ? VERR_IPE_UNEXPECTED_INFO_STATUS : VBOXSTRICTRC_TODO(rcStrict));
292
293	/*
294	* Hand it over to the interpreter.
295	*/
296	CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
297	rcStrict = IEMExecOne(pVCpu);
298	LogFlow(("emR3HmExecuteIOInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
299	}
300	else
301	{
302	RT_UNTRUSTED_VALIDATED_FENCE();
303	CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
304	Assert(!HMR3HasPendingIOInstr(pVCpu));
305	rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
306	LogFlow(("emR3HmExecuteIOInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
307	STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIoRestarted);
308	}
309
310	STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIoIem);
311	STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
312	return VBOXSTRICTRC_TODO(rcStrict);
313	}
314
315
316	/**
317	* Process HM specific forced actions.
318	*
319	* This function is called when any FFs in the VM_FF_HIGH_PRIORITY_PRE_RAW_MASK
320	* or/and VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK are pending.
321	*
322	* @returns VBox status code. May return VINF_EM_NO_MEMORY but none of the other
323	* EM statuses.
324	* @param pVM The cross context VM structure.
325	* @param pVCpu The cross context virtual CPU structure.
326	* @param pCtx Pointer to the guest CPU context.
327	*/
328	static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)
329	{
330	/*
331	* Sync page directory.
332	*/
333	if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL))
334	{
335	CPUM_IMPORT_EXTRN_RET(pVCpu, CPUMCTX_EXTRN_CR0 \| CPUMCTX_EXTRN_CR3 \| CPUMCTX_EXTRN_CR4);
336	Assert(pVCpu->em.s.enmState != EMSTATE_WAIT_SIPI);
337	int rc = PGMSyncCR3(pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
338	if (RT_FAILURE(rc))
339	return rc;
340
341	#ifdef VBOX_WITH_RAW_MODE
342	Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT));
343	#endif
344
345	/* Prefetch pages for EIP and ESP. */
346	/** @todo This is rather expensive. Should investigate if it really helps at all. */
347	/** @todo this should be skipped! */
348	CPUM_IMPORT_EXTRN_RET(pVCpu, CPUMCTX_EXTRN_CS \| CPUMCTX_EXTRN_SS);
349	rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVM, DISSELREG_CS, CPUMCTX2CORE(pCtx), pCtx->rip));
350	if (rc == VINF_SUCCESS)
351	rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVM, DISSELREG_SS, CPUMCTX2CORE(pCtx), pCtx->rsp));
352	if (rc != VINF_SUCCESS)
353	{
354	if (rc != VINF_PGM_SYNC_CR3)
355	{
356	AssertLogRelMsgReturn(RT_FAILURE(rc), ("%Rrc\n", rc), VERR_IPE_UNEXPECTED_INFO_STATUS);
357	return rc;
358	}
359	rc = PGMSyncCR3(pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
360	if (RT_FAILURE(rc))
361	return rc;
362	}
363	/** @todo maybe prefetch the supervisor stack page as well */
364	#ifdef VBOX_WITH_RAW_MODE
365	Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT));
366	#endif
367	}
368
369	/*
370	* Allocate handy pages (just in case the above actions have consumed some pages).
371	*/
372	if (VM_FF_IS_PENDING_EXCEPT(pVM, VM_FF_PGM_NEED_HANDY_PAGES, VM_FF_PGM_NO_MEMORY))
373	{
374	int rc = PGMR3PhysAllocateHandyPages(pVM);
375	if (RT_FAILURE(rc))
376	return rc;
377	}
378
379	/*
380	* Check whether we're out of memory now.
381	*
382	* This may stem from some of the above actions or operations that has been executed
383	* since we ran FFs. The allocate handy pages must for instance always be followed by
384	* this check.
385	*/
386	if (VM_FF_IS_PENDING(pVM, VM_FF_PGM_NO_MEMORY))
387	return VINF_EM_NO_MEMORY;
388
389	return VINF_SUCCESS;
390	}
391
392
393	/**
394	* Executes hardware accelerated raw code. (Intel VT-x & AMD-V)
395	*
396	* This function contains the raw-mode version of the inner
397	* execution loop (the outer loop being in EMR3ExecuteVM()).
398	*
399	* @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE, VINF_EM_RESCHEDULE_RAW,
400	* VINF_EM_RESCHEDULE_REM, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
401	*
402	* @param pVM The cross context VM structure.
403	* @param pVCpu The cross context virtual CPU structure.
404	* @param pfFFDone Where to store an indicator telling whether or not
405	* FFs were done before returning.
406	*/
407	int emR3HmExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone)
408	{
409	int rc = VERR_IPE_UNINITIALIZED_STATUS;
410	PCPUMCTX pCtx = pVCpu->em.s.pCtx;
411
412	LogFlow(("emR3HmExecute%d: (cs:eip=%04x:%RGv)\n", pVCpu->idCpu, pCtx->cs.Sel, (RTGCPTR)pCtx->rip));
413	*pfFFDone = false;
414
415	STAM_COUNTER_INC(&pVCpu->em.s.StatHMExecuteCalled);
416
417	#ifdef EM_NOTIFY_HM
418	HMR3NotifyScheduled(pVCpu);
419	#endif
420
421	/*
422	* Spin till we get a forced action which returns anything but VINF_SUCCESS.
423	*/
424	for (;;)
425	{
426	STAM_PROFILE_ADV_START(&pVCpu->em.s.StatHMEntry, a);
427
428	/* Check if a forced reschedule is pending. */
429	if (HMR3IsRescheduleRequired(pVM, pCtx))
430	{
431	rc = VINF_EM_RESCHEDULE;
432	break;
433	}
434
435	/*
436	* Process high priority pre-execution raw-mode FFs.
437	*/
438	#ifdef VBOX_WITH_RAW_MODE
439	Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT));
440	#endif
441	if ( VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
442	\|\| VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
443	{
444	rc = emR3HmForcedActions(pVM, pVCpu, pCtx);
445	if (rc != VINF_SUCCESS)
446	break;
447	}
448
449	#ifdef LOG_ENABLED
450	/*
451	* Log important stuff before entering GC.
452	*/
453	if (TRPMHasTrap(pVCpu))
454	Log(("CPU%d: Pending hardware interrupt=0x%x cs:rip=%04X:%RGv\n", pVCpu->idCpu, TRPMGetTrapNo(pVCpu), pCtx->cs.Sel, (RTGCPTR)pCtx->rip));
455
456	uint32_t cpl = CPUMGetGuestCPL(pVCpu);
457	if (pVM->cCpus == 1)
458	{
459	if (pCtx->eflags.Bits.u1VM)
460	Log(("HWV86: %08X IF=%d\n", pCtx->eip, pCtx->eflags.Bits.u1IF));
461	else if (CPUMIsGuestIn64BitCodeEx(pCtx))
462	Log(("HWR%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pCtx->cs.Sel, (RTGCPTR)pCtx->rip, pCtx->rsp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
463	else
464	Log(("HWR%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pCtx->cs.Sel, pCtx->eip, pCtx->esp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
465	}
466	else
467	{
468	if (pCtx->eflags.Bits.u1VM)
469	Log(("HWV86-CPU%d: %08X IF=%d\n", pVCpu->idCpu, pCtx->eip, pCtx->eflags.Bits.u1IF));
470	else if (CPUMIsGuestIn64BitCodeEx(pCtx))
471	Log(("HWR%d-CPU%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pCtx->cs.Sel, (RTGCPTR)pCtx->rip, pCtx->rsp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
472	else
473	Log(("HWR%d-CPU%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pCtx->cs.Sel, pCtx->eip, pCtx->esp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
474	}
475	#endif /* LOG_ENABLED */
476
477	/*
478	* Execute the code.
479	*/
480	STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatHMEntry, a);
481
482	if (RT_LIKELY(emR3IsExecutionAllowed(pVM, pVCpu)))
483	{
484	STAM_PROFILE_START(&pVCpu->em.s.StatHMExec, x);
485	rc = VMMR3HmRunGC(pVM, pVCpu);
486	STAM_PROFILE_STOP(&pVCpu->em.s.StatHMExec, x);
487	}
488	else
489	{
490	/* Give up this time slice; virtual time continues */
491	STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatCapped, u);
492	RTThreadSleep(5);
493	STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatCapped, u);
494	rc = VINF_SUCCESS;
495	}
496
497
498	/*
499	* Deal with high priority post execution FFs before doing anything else.
500	*/
501	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
502	if ( VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
503	\|\| VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
504	rc = VBOXSTRICTRC_TODO(emR3HighPriorityPostForcedActions(pVM, pVCpu, rc));
505
506	/*
507	* Process the returned status code.
508	*/
509	if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
510	break;
511
512	rc = emR3HmHandleRC(pVM, pVCpu, pCtx, rc);
513	if (rc != VINF_SUCCESS)
514	break;
515
516	/*
517	* Check and execute forced actions.
518	*/
519	#ifdef VBOX_HIGH_RES_TIMERS_HACK
520	TMTimerPollVoid(pVM, pVCpu);
521	#endif
522	if ( VM_FF_IS_PENDING(pVM, VM_FF_ALL_MASK)
523	\|\| VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_ALL_MASK))
524	{
525	rc = emR3ForcedActions(pVM, pVCpu, rc);
526	VBOXVMM_EM_FF_ALL_RET(pVCpu, rc);
527	if ( rc != VINF_SUCCESS
528	&& rc != VINF_EM_RESCHEDULE_HM)
529	{
530	*pfFFDone = true;
531	break;
532	}
533	}
534	}
535
536	/*
537	* Return to outer loop.
538	*/
539	#if defined(LOG_ENABLED) && defined(DEBUG)
540	RTLogFlush(NULL);
541	#endif
542	return rc;
543	}
544

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source: vbox/trunk/src/VBox/VMM/VMMR3/EMHM.cpp@ 72610

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