VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/EMR3Nem.cpp

Last change on this file was 109189, checked in by vboxsync, 5 hours ago

VMM: Removed CPUMR3DisasmInstrCPU as nobody uses it (replaced by DBGFR3DisasInstrCurrent and friends by now).

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1/* $Id: EMR3Nem.cpp 109189 2025-05-07 11:24:03Z vboxsync $ */
2/** @file
3 * EM - Execution Monitor / Manager - NEM interface.
4 */
5
6/*
7 * Copyright (C) 2006-2024 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28
29/*********************************************************************************************************************************
30* Header Files *
31*********************************************************************************************************************************/
32#define LOG_GROUP LOG_GROUP_EM
33#define VMCPU_INCL_CPUM_GST_CTX
34#include <VBox/vmm/em.h>
35#include <VBox/vmm/vmm.h>
36#include <VBox/vmm/selm.h>
37#include <VBox/vmm/trpm.h>
38#include <VBox/vmm/iem.h>
39#include <VBox/vmm/iom.h>
40#include <VBox/vmm/nem.h>
41#include <VBox/vmm/dbgf.h>
42#include <VBox/vmm/pgm.h>
43#include <VBox/vmm/tm.h>
44#include <VBox/vmm/mm.h>
45#include <VBox/vmm/ssm.h>
46#include <VBox/vmm/pdmapi.h>
47#include <VBox/vmm/pdmcritsect.h>
48#include <VBox/vmm/pdmqueue.h>
49#include "EMInternal.h"
50#include <VBox/vmm/vm.h>
51#include <VBox/vmm/gim.h>
52#include <VBox/dis.h>
53#include <VBox/err.h>
54#include <VBox/vmm/dbgf.h>
55#include "VMMTracing.h"
56
57#include <iprt/asm.h>
58
59#include "EMInline.h"
60
61
62/*********************************************************************************************************************************
63* Internal Functions *
64*********************************************************************************************************************************/
65static int emR3NemHandleRC(PVM pVM, PVMCPU pVCpu, int rc);
66DECLINLINE(int) emR3NemExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC = VINF_SUCCESS);
67static int emR3NemExecuteIOInstruction(PVM pVM, PVMCPU pVCpu);
68static int emR3NemForcedActions(PVM pVM, PVMCPU pVCpu);
69
70#define EMHANDLERC_WITH_NEM
71#define emR3ExecuteInstruction emR3NemExecuteInstruction
72#define emR3ExecuteIOInstruction emR3NemExecuteIOInstruction
73#include "EMHandleRCTmpl.h"
74
75
76/**
77 * Executes instruction in NEM mode if we can.
78 *
79 * This is somewhat comparable to REMR3EmulateInstruction.
80 *
81 * @returns VBox strict status code.
82 * @retval VINF_EM_DBG_STEPPED on success.
83 * @retval VERR_EM_CANNOT_EXEC_GUEST if we cannot execute guest instructions in
84 * HM right now.
85 *
86 * @param pVM The cross context VM structure.
87 * @param pVCpu The cross context virtual CPU structure for the calling EMT.
88 * @param fFlags Combinations of EM_ONE_INS_FLAGS_XXX.
89 * @thread EMT.
90 */
91VBOXSTRICTRC emR3NemSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
92{
93 Assert(!(fFlags & ~EM_ONE_INS_FLAGS_MASK));
94
95 if (!NEMR3CanExecuteGuest(pVM, pVCpu))
96 return VINF_EM_RESCHEDULE;
97
98#ifdef VBOX_VMM_TARGET_ARMV8
99 uint64_t const uOldPc = pVCpu->cpum.GstCtx.Pc.u64;
100#elif defined(VBOX_VMM_TARGET_X86)
101 uint64_t const uOldRip = pVCpu->cpum.GstCtx.rip;
102#else
103# error "port me"
104#endif
105 for (;;)
106 {
107 /*
108 * Service necessary FFs before going into HM.
109 */
110 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
111 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
112 {
113 VBOXSTRICTRC rcStrict = emR3NemForcedActions(pVM, pVCpu);
114 if (rcStrict != VINF_SUCCESS)
115 {
116 Log(("emR3NemSingleInstruction: FFs before -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
117 return rcStrict;
118 }
119 }
120
121 /*
122 * Go execute it.
123 */
124 bool fOld = NEMR3SetSingleInstruction(pVM, pVCpu, true);
125 VBOXSTRICTRC rcStrict = NEMR3RunGC(pVM, pVCpu);
126 NEMR3SetSingleInstruction(pVM, pVCpu, fOld);
127 LogFlow(("emR3NemSingleInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
128
129 /*
130 * Handle high priority FFs and informational status codes. We don't do
131 * normal FF processing the caller or the next call can deal with them.
132 */
133 VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
134 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
135 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
136 {
137 rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict);
138 LogFlow(("emR3NemSingleInstruction: FFs after -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
139 }
140
141 if (rcStrict != VINF_SUCCESS && (rcStrict < VINF_EM_FIRST || rcStrict > VINF_EM_LAST))
142 {
143 rcStrict = emR3NemHandleRC(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
144 Log(("emR3NemSingleInstruction: emR3NemHandleRC -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
145 }
146
147 /*
148 * Done?
149 */
150#ifdef VBOX_VMM_TARGET_ARMV8
151 CPUM_ASSERT_NOT_EXTRN(pVCpu, CPUMCTX_EXTRN_PC);
152 if ( (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED)
153 || !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE)
154 || pVCpu->cpum.GstCtx.Pc.u64 != uOldPc)
155 {
156 if (rcStrict == VINF_SUCCESS && pVCpu->cpum.GstCtx.Pc.u64 != uOldPc)
157 rcStrict = VINF_EM_DBG_STEPPED;
158 Log(("emR3NemSingleInstruction: returns %Rrc (pc %llx -> %llx)\n",
159 VBOXSTRICTRC_VAL(rcStrict), uOldPc, pVCpu->cpum.GstCtx.Pc.u64));
160 CPUM_IMPORT_EXTRN_RET(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK);
161 return rcStrict;
162 }
163
164#elif defined(VBOX_VMM_TARGET_X86)
165 CPUM_ASSERT_NOT_EXTRN(pVCpu, CPUMCTX_EXTRN_RIP);
166 if ( (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED)
167 || !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE)
168 || pVCpu->cpum.GstCtx.rip != uOldRip)
169 {
170 if (rcStrict == VINF_SUCCESS && pVCpu->cpum.GstCtx.rip != uOldRip)
171 rcStrict = VINF_EM_DBG_STEPPED;
172 Log(("emR3NemSingleInstruction: returns %Rrc (rip %llx -> %llx)\n",
173 VBOXSTRICTRC_VAL(rcStrict), uOldRip, pVCpu->cpum.GstCtx.rip));
174 CPUM_IMPORT_EXTRN_RET(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK);
175 return rcStrict;
176 }
177
178#else
179# error "port me"
180#endif
181 }
182}
183
184
185/**
186 * Executes one (or perhaps a few more) instruction(s).
187 *
188 * @returns VBox status code suitable for EM.
189 *
190 * @param pVM The cross context VM structure.
191 * @param pVCpu The cross context virtual CPU structure.
192 * @param rcRC Return code from RC.
193 * @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
194 * instruction and prefix the log output with this text.
195 */
196#if defined(LOG_ENABLED) || defined(DOXYGEN_RUNNING)
197static int emR3NemExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC, const char *pszPrefix)
198#else
199static int emR3NemExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC)
200#endif
201{
202 NOREF(rcRC);
203
204#ifdef LOG_ENABLED
205 /*
206 * Log it.
207 */
208# ifdef VBOX_VMM_TARGET_ARMV8
209 Log(("EMINS: %RGv SP_EL0=%RGv SP_EL1=%RGv\n", (RTGCPTR)pVCpu->cpum.GstCtx.Pc.u64,
210 (RTGCPTR)pVCpu->cpum.GstCtx.aSpReg[0].u64, (RTGCPTR)pVCpu->cpum.GstCtx.aSpReg[1].u64));
211 if (pszPrefix)
212 {
213 DBGFR3_INFO_LOG(pVM, pVCpu, "cpumguest", pszPrefix);
214 DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
215 }
216# elif defined(VBOX_VMM_TARGET_X86)
217 Log(("EMINS: %04x:%RGv RSP=%RGv\n", pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, (RTGCPTR)pVCpu->cpum.GstCtx.rsp));
218 if (pszPrefix)
219 {
220 DBGFR3_INFO_LOG(pVM, pVCpu, "cpumguest", pszPrefix);
221 DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
222 }
223# else
224# error "port me"
225# endif
226#endif
227
228 /*
229 * Use IEM and fallback on REM if the functionality is missing.
230 * Once IEM gets mature enough, nothing should ever fall back.
231 */
232 STAM_PROFILE_START(&pVCpu->em.s.StatIEMEmu, a);
233
234 VBOXSTRICTRC rcStrict;
235 uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
236 RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
237 if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
238 {
239 CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
240 rcStrict = IEMExecOne(pVCpu);
241 }
242 else
243 {
244 RT_UNTRUSTED_VALIDATED_FENCE();
245 rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
246 LogFlow(("emR3NemExecuteInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
247 }
248
249 STAM_PROFILE_STOP(&pVCpu->em.s.StatIEMEmu, a);
250
251 NOREF(pVM);
252 return VBOXSTRICTRC_TODO(rcStrict);
253}
254
255
256/**
257 * Executes one (or perhaps a few more) instruction(s).
258 * This is just a wrapper for discarding pszPrefix in non-logging builds.
259 *
260 * @returns VBox status code suitable for EM.
261 * @param pVM The cross context VM structure.
262 * @param pVCpu The cross context virtual CPU structure.
263 * @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
264 * instruction and prefix the log output with this text.
265 * @param rcGC GC return code
266 */
267DECLINLINE(int) emR3NemExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC)
268{
269#ifdef LOG_ENABLED
270 return emR3NemExecuteInstructionWorker(pVM, pVCpu, rcGC, pszPrefix);
271#else
272 RT_NOREF_PV(pszPrefix);
273 return emR3NemExecuteInstructionWorker(pVM, pVCpu, rcGC);
274#endif
275}
276
277/**
278 * Executes one (or perhaps a few more) IO instruction(s).
279 *
280 * @returns VBox status code suitable for EM.
281 * @param pVM The cross context VM structure.
282 * @param pVCpu The cross context virtual CPU structure.
283 */
284static int emR3NemExecuteIOInstruction(PVM pVM, PVMCPU pVCpu)
285{
286 RT_NOREF_PV(pVM);
287 STAM_PROFILE_START(&pVCpu->em.s.StatIOEmu, a);
288
289 /*
290 * Hand it over to the interpreter.
291 */
292 CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
293 VBOXSTRICTRC rcStrict;
294 uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
295 RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
296 if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
297 {
298 rcStrict = IEMExecOne(pVCpu);
299 LogFlow(("emR3NemExecuteIOInstruction: %Rrc (IEMExecOne)\n", VBOXSTRICTRC_VAL(rcStrict)));
300 STAM_COUNTER_INC(&pVCpu->em.s.StatIoIem);
301 }
302 else
303 {
304 RT_UNTRUSTED_VALIDATED_FENCE();
305 rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
306 LogFlow(("emR3NemExecuteIOInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
307 STAM_COUNTER_INC(&pVCpu->em.s.StatIoRestarted);
308 }
309
310 STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
311 return VBOXSTRICTRC_TODO(rcStrict);
312}
313
314
315/**
316 * Process NEM specific forced actions.
317 *
318 * This function is called when any FFs in VM_FF_HIGH_PRIORITY_PRE_RAW_MASK
319 * or/and VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK are pending.
320 *
321 * @returns VBox status code. May return VINF_EM_NO_MEMORY but none of the other
322 * EM statuses.
323 * @param pVM The cross context VM structure.
324 * @param pVCpu The cross context virtual CPU structure.
325 */
326static int emR3NemForcedActions(PVM pVM, PVMCPU pVCpu)
327{
328 /*
329 * Sync page directory should not happen in NEM mode.
330 */
331 if (VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL))
332 {
333 Log(("NEM: TODO: Make VMCPU_FF_PGM_SYNC_CR3 / VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL quiet! (%#RX64)\n", (uint64_t)pVCpu->fLocalForcedActions));
334 VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL);
335 }
336
337#ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
338 /*
339 * Allocate handy pages (just in case the above actions have consumed some pages).
340 */
341 if (VM_FF_IS_PENDING_EXCEPT(pVM, VM_FF_PGM_NEED_HANDY_PAGES, VM_FF_PGM_NO_MEMORY))
342 {
343 int rc = PGMR3PhysAllocateHandyPages(pVM);
344 if (RT_FAILURE(rc))
345 return rc;
346 }
347#endif
348
349 /*
350 * Check whether we're out of memory now.
351 *
352 * This may stem from some of the above actions or operations that has been executed
353 * since we ran FFs. The allocate handy pages must for instance always be followed by
354 * this check.
355 */
356 if (VM_FF_IS_SET(pVM, VM_FF_PGM_NO_MEMORY))
357 return VINF_EM_NO_MEMORY;
358
359 return VINF_SUCCESS;
360}
361
362
363/**
364 * Executes hardware accelerated raw code. (Intel VT-x & AMD-V)
365 *
366 * This function contains the inner EM execution loop for NEM (the outer loop
367 * being in EMR3ExecuteVM()).
368 *
369 * @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE,
370 * VINF_EM_RESCHEDULE_REM, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
371 *
372 * @param pVM The cross context VM structure.
373 * @param pVCpu The cross context virtual CPU structure.
374 * @param pfFFDone Where to store an indicator telling whether or not
375 * FFs were done before returning.
376 */
377VBOXSTRICTRC emR3NemExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone)
378{
379 VBOXSTRICTRC rcStrict = VERR_IPE_UNINITIALIZED_STATUS;
380
381#ifdef VBOX_VMM_TARGET_ARMV8
382 LogFlow(("emR3NemExecute%d: (pc=%RGv)\n", pVCpu->idCpu, (RTGCPTR)pVCpu->cpum.GstCtx.Pc.u64));
383#elif defined(VBOX_VMM_TARGET_X86)
384 LogFlow(("emR3NemExecute%d: (cs:eip=%04x:%RGv)\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
385#else
386# error "port me"
387#endif
388 *pfFFDone = false;
389
390 STAM_REL_COUNTER_INC(&pVCpu->em.s.StatNEMExecuteCalled);
391
392 /*
393 * Spin till we get a forced action which returns anything but VINF_SUCCESS.
394 */
395 for (;;)
396 {
397 STAM_PROFILE_ADV_START(&pVCpu->em.s.StatNEMEntry, a);
398
399 /*
400 * Check that we can execute in NEM mode.
401 */
402 if (NEMR3CanExecuteGuest(pVM, pVCpu))
403 { /* likely */ }
404 else
405 {
406 rcStrict = VINF_EM_RESCHEDULE_REM;
407 break;
408 }
409
410 /*
411 * Process high priority pre-execution raw-mode FFs.
412 */
413 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
414 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
415 {
416 rcStrict = emR3NemForcedActions(pVM, pVCpu);
417 if (rcStrict != VINF_SUCCESS)
418 break;
419 }
420
421#ifdef LOG_ENABLED
422 /*
423 * Log important stuff before entering GC.
424 */
425# ifdef VBOX_VMM_TARGET_X86
426 if (TRPMHasTrap(pVCpu))
427 Log(("CPU%d: Pending hardware interrupt=0x%x cs:rip=%04X:%RGv\n", pVCpu->idCpu, TRPMGetTrapNo(pVCpu), pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
428
429 if (!(pVCpu->cpum.GstCtx.fExtrn & ( CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_SS
430 | CPUMCTX_EXTRN_RSP | CPUMCTX_EXTRN_CR0 | CPUMCTX_EXTRN_CR4 | CPUMCTX_EXTRN_EFER)))
431 {
432 uint32_t cpl = CPUMGetGuestCPL(pVCpu);
433 if (pVM->cCpus == 1)
434 {
435 if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
436 Log(("NEMV86: %08x IF=%d\n", pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
437 else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
438 Log(("NEMR%d: %04x:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
439 else
440 Log(("NEMR%d: %04x:%08x ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
441 }
442 else
443 {
444 if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
445 Log(("NEMV86-CPU%d: %08x IF=%d\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
446 else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
447 Log(("NEMR%d-CPU%d: %04x:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
448 else
449 Log(("NEMR%d-CPU%d: %04x:%08x ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
450 }
451 }
452# elif defined(VBOX_VMM_TARGET_ARMV8)
453 if (!(pVCpu->cpum.GstCtx.fExtrn & CPUMCTX_EXTRN_PC))
454 {
455 /** @todo better logging */
456 if (pVM->cCpus == 1)
457 Log(("NEM: %RX64\n", pVCpu->cpum.GstCtx.Pc.u64));
458 else
459 Log(("NEM-CPU%d: %RX64\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.Pc.u64));
460 }
461# else
462# error "port me"
463# endif
464 else if (pVM->cCpus == 1)
465 Log(("NEMRx: -> NEMR3RunGC\n"));
466 else
467 Log(("NEMRx-CPU%u: -> NEMR3RunGC\n", pVCpu->idCpu));
468#endif /* LOG_ENABLED */
469
470 /*
471 * Execute the code.
472 */
473 if (RT_LIKELY(emR3IsExecutionAllowed(pVM, pVCpu)))
474 {
475 STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatNEMEntry, a);
476 STAM_REL_PROFILE_START(&pVCpu->em.s.StatNEMExec, x);
477 rcStrict = NEMR3RunGC(pVM, pVCpu);
478 STAM_REL_PROFILE_STOP(&pVCpu->em.s.StatNEMExec, x);
479 }
480 else
481 {
482 /* Give up this time slice; virtual time continues */
483 STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatNEMEntry, a);
484 STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatCapped, u);
485 RTThreadSleep(5);
486 STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatCapped, u);
487 rcStrict = VINF_SUCCESS;
488 }
489
490
491 /*
492 * Deal with high priority post execution FFs before doing anything else.
493 */
494 VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
495 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
496 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
497 rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict);
498
499 /*
500 * Process the returned status code.
501 */
502 if (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST)
503 break;
504
505 rcStrict = emR3NemHandleRC(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
506 if (rcStrict != VINF_SUCCESS)
507 break;
508
509 /*
510 * Check and execute forced actions.
511 */
512#ifdef VBOX_HIGH_RES_TIMERS_HACK
513 TMTimerPollVoid(pVM, pVCpu);
514#endif
515 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_ALL_MASK)
516 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_ALL_MASK))
517 {
518 rcStrict = emR3ForcedActions(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
519 VBOXVMM_EM_FF_ALL_RET(pVCpu, VBOXSTRICTRC_VAL(rcStrict));
520 if ( rcStrict != VINF_SUCCESS
521 && rcStrict != VINF_EM_RESCHEDULE_EXEC_ENGINE)
522 {
523 *pfFFDone = true;
524 break;
525 }
526 }
527 }
528
529 /*
530 * Return to outer loop, making sure the fetch all state as we leave.
531 *
532 * Note! Not using CPUM_IMPORT_EXTRN_RET here, to prioritize an rcStrict error
533 * status over import errors.
534 */
535 if (pVCpu->cpum.GstCtx.fExtrn)
536 {
537 int rcImport = NEMImportStateOnDemand(pVCpu, pVCpu->cpum.GstCtx.fExtrn);
538 AssertReturn(RT_SUCCESS(rcImport) || RT_FAILURE_NP(rcStrict), rcImport);
539 }
540#if defined(LOG_ENABLED) && defined(DEBUG)
541 RTLogFlush(NULL);
542#endif
543 return rcStrict;
544}
545
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