EMR3Nem.cpp@ 107194

Last change on this file since 107194 was 107194, checked in by vboxsync, 7 weeks ago
VMM: More adjustments for VBOX_WITH_ONLY_PGM_NEM_MODE, VBOX_WITH_MINIMAL_R0, VBOX_WITH_HWVIRT and such. jiraref:VBP-1466
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1	/* $Id: EMR3Nem.cpp 107194 2024-11-29 14:47:06Z vboxsync $ */
2	/** @file
3	* EM - Execution Monitor / Manager - NEM interface.
4	*/
5
6	/*
7	* Copyright (C) 2006-2024 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	*/
27
28
29	/*********************************************************************************************************************************
30	* Header Files *
31	*********************************************************************************************************************************/
32	#define LOG_GROUP LOG_GROUP_EM
33	#define VMCPU_INCL_CPUM_GST_CTX
34	#include <VBox/vmm/em.h>
35	#include <VBox/vmm/vmm.h>
36	#include <VBox/vmm/selm.h>
37	#include <VBox/vmm/trpm.h>
38	#include <VBox/vmm/iem.h>
39	#include <VBox/vmm/iom.h>
40	#include <VBox/vmm/nem.h>
41	#include <VBox/vmm/dbgf.h>
42	#include <VBox/vmm/pgm.h>
43	#include <VBox/vmm/tm.h>
44	#include <VBox/vmm/mm.h>
45	#include <VBox/vmm/ssm.h>
46	#include <VBox/vmm/pdmapi.h>
47	#include <VBox/vmm/pdmcritsect.h>
48	#include <VBox/vmm/pdmqueue.h>
49	#include "EMInternal.h"
50	#include <VBox/vmm/vm.h>
51	#include <VBox/vmm/gim.h>
52	#include <VBox/vmm/cpumdis.h>
53	#include <VBox/dis.h>
54	#include <VBox/err.h>
55	#include <VBox/vmm/dbgf.h>
56	#include "VMMTracing.h"
57
58	#include <iprt/asm.h>
59
60	#include "EMInline.h"
61
62
63	/*********************************************************************************************************************************
64	* Internal Functions *
65	*********************************************************************************************************************************/
66	static int emR3NemHandleRC(PVM pVM, PVMCPU pVCpu, int rc);
67	DECLINLINE(int) emR3NemExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC = VINF_SUCCESS);
68	static int emR3NemExecuteIOInstruction(PVM pVM, PVMCPU pVCpu);
69	static int emR3NemForcedActions(PVM pVM, PVMCPU pVCpu);
70
71	#define EMHANDLERC_WITH_NEM
72	#define emR3ExecuteInstruction emR3NemExecuteInstruction
73	#define emR3ExecuteIOInstruction emR3NemExecuteIOInstruction
74	#include "EMHandleRCTmpl.h"
75
76
77	/**
78	* Executes instruction in NEM mode if we can.
79	*
80	* This is somewhat comparable to REMR3EmulateInstruction.
81	*
82	* @returns VBox strict status code.
83	* @retval VINF_EM_DBG_STEPPED on success.
84	* @retval VERR_EM_CANNOT_EXEC_GUEST if we cannot execute guest instructions in
85	* HM right now.
86	*
87	* @param pVM The cross context VM structure.
88	* @param pVCpu The cross context virtual CPU structure for the calling EMT.
89	* @param fFlags Combinations of EM_ONE_INS_FLAGS_XXX.
90	* @thread EMT.
91	*/
92	VBOXSTRICTRC emR3NemSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
93	{
94	Assert(!(fFlags & ~EM_ONE_INS_FLAGS_MASK));
95
96	if (!NEMR3CanExecuteGuest(pVM, pVCpu))
97	return VINF_EM_RESCHEDULE;
98
99	#if defined(VBOX_VMM_TARGET_ARMV8)
100	uint64_t const uOldPc = pVCpu->cpum.GstCtx.Pc.u64;
101	#else
102	uint64_t const uOldRip = pVCpu->cpum.GstCtx.rip;
103	#endif
104	for (;;)
105	{
106	/*
107	* Service necessary FFs before going into HM.
108	*/
109	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
110	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
111	{
112	VBOXSTRICTRC rcStrict = emR3NemForcedActions(pVM, pVCpu);
113	if (rcStrict != VINF_SUCCESS)
114	{
115	Log(("emR3NemSingleInstruction: FFs before -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
116	return rcStrict;
117	}
118	}
119
120	/*
121	* Go execute it.
122	*/
123	bool fOld = NEMR3SetSingleInstruction(pVM, pVCpu, true);
124	VBOXSTRICTRC rcStrict = NEMR3RunGC(pVM, pVCpu);
125	NEMR3SetSingleInstruction(pVM, pVCpu, fOld);
126	LogFlow(("emR3NemSingleInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
127
128	/*
129	* Handle high priority FFs and informational status codes. We don't do
130	* normal FF processing the caller or the next call can deal with them.
131	*/
132	VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
133	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
134	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
135	{
136	rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict);
137	LogFlow(("emR3NemSingleInstruction: FFs after -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
138	}
139
140	if (rcStrict != VINF_SUCCESS && (rcStrict < VINF_EM_FIRST \|\| rcStrict > VINF_EM_LAST))
141	{
142	rcStrict = emR3NemHandleRC(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
143	Log(("emR3NemSingleInstruction: emR3NemHandleRC -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
144	}
145
146	/*
147	* Done?
148	*/
149	#if defined(VBOX_VMM_TARGET_ARMV8)
150	CPUM_ASSERT_NOT_EXTRN(pVCpu, CPUMCTX_EXTRN_PC);
151	if ( (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED)
152	\|\| !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE)
153	\|\| pVCpu->cpum.GstCtx.Pc.u64 != uOldPc)
154	{
155	if (rcStrict == VINF_SUCCESS && pVCpu->cpum.GstCtx.Pc.u64 != uOldPc)
156	rcStrict = VINF_EM_DBG_STEPPED;
157	Log(("emR3NemSingleInstruction: returns %Rrc (pc %llx -> %llx)\n",
158	VBOXSTRICTRC_VAL(rcStrict), uOldPc, pVCpu->cpum.GstCtx.Pc.u64));
159	CPUM_IMPORT_EXTRN_RET(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK);
160	return rcStrict;
161	}
162	#else
163	CPUM_ASSERT_NOT_EXTRN(pVCpu, CPUMCTX_EXTRN_RIP);
164	if ( (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED)
165	\|\| !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE)
166	\|\| pVCpu->cpum.GstCtx.rip != uOldRip)
167	{
168	if (rcStrict == VINF_SUCCESS && pVCpu->cpum.GstCtx.rip != uOldRip)
169	rcStrict = VINF_EM_DBG_STEPPED;
170	Log(("emR3NemSingleInstruction: returns %Rrc (rip %llx -> %llx)\n",
171	VBOXSTRICTRC_VAL(rcStrict), uOldRip, pVCpu->cpum.GstCtx.rip));
172	CPUM_IMPORT_EXTRN_RET(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK);
173	return rcStrict;
174	}
175	#endif
176	}
177	}
178
179
180	/**
181	* Executes one (or perhaps a few more) instruction(s).
182	*
183	* @returns VBox status code suitable for EM.
184	*
185	* @param pVM The cross context VM structure.
186	* @param pVCpu The cross context virtual CPU structure.
187	* @param rcRC Return code from RC.
188	* @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
189	* instruction and prefix the log output with this text.
190	*/
191	#if defined(LOG_ENABLED) \|\| defined(DOXYGEN_RUNNING)
192	static int emR3NemExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC, const char *pszPrefix)
193	#else
194	static int emR3NemExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC)
195	#endif
196	{
197	NOREF(rcRC);
198
199	#ifdef LOG_ENABLED
200	/*
201	* Log it.
202	*/
203	#ifdef VBOX_VMM_TARGET_ARMV8
204	Log(("EMINS: %RGv SP_EL0=%RGv SP_EL1=%RGv\n", (RTGCPTR)pVCpu->cpum.GstCtx.Pc.u64,
205	(RTGCPTR)pVCpu->cpum.GstCtx.aSpReg[0].u64,
206	(RTGCPTR)pVCpu->cpum.GstCtx.aSpReg[1].u64));
207	if (pszPrefix)
208	{
209	DBGFR3_INFO_LOG(pVM, pVCpu, "cpumguest", pszPrefix);
210	DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
211	}
212	# else
213	Log(("EMINS: %04x:%RGv RSP=%RGv\n", pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, (RTGCPTR)pVCpu->cpum.GstCtx.rsp));
214	if (pszPrefix)
215	{
216	DBGFR3_INFO_LOG(pVM, pVCpu, "cpumguest", pszPrefix);
217	DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
218	}
219	# endif
220	#endif
221
222	/*
223	* Use IEM and fallback on REM if the functionality is missing.
224	* Once IEM gets mature enough, nothing should ever fall back.
225	*/
226	STAM_PROFILE_START(&pVCpu->em.s.StatIEMEmu, a);
227
228	VBOXSTRICTRC rcStrict;
229	uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
230	RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
231	if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
232	{
233	CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
234	rcStrict = IEMExecOne(pVCpu);
235	}
236	else
237	{
238	RT_UNTRUSTED_VALIDATED_FENCE();
239	rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
240	LogFlow(("emR3NemExecuteInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
241	}
242
243	STAM_PROFILE_STOP(&pVCpu->em.s.StatIEMEmu, a);
244
245	NOREF(pVM);
246	return VBOXSTRICTRC_TODO(rcStrict);
247	}
248
249
250	/**
251	* Executes one (or perhaps a few more) instruction(s).
252	* This is just a wrapper for discarding pszPrefix in non-logging builds.
253	*
254	* @returns VBox status code suitable for EM.
255	* @param pVM The cross context VM structure.
256	* @param pVCpu The cross context virtual CPU structure.
257	* @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
258	* instruction and prefix the log output with this text.
259	* @param rcGC GC return code
260	*/
261	DECLINLINE(int) emR3NemExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC)
262	{
263	#ifdef LOG_ENABLED
264	return emR3NemExecuteInstructionWorker(pVM, pVCpu, rcGC, pszPrefix);
265	#else
266	RT_NOREF_PV(pszPrefix);
267	return emR3NemExecuteInstructionWorker(pVM, pVCpu, rcGC);
268	#endif
269	}
270
271	/**
272	* Executes one (or perhaps a few more) IO instruction(s).
273	*
274	* @returns VBox status code suitable for EM.
275	* @param pVM The cross context VM structure.
276	* @param pVCpu The cross context virtual CPU structure.
277	*/
278	static int emR3NemExecuteIOInstruction(PVM pVM, PVMCPU pVCpu)
279	{
280	RT_NOREF_PV(pVM);
281	STAM_PROFILE_START(&pVCpu->em.s.StatIOEmu, a);
282
283	/*
284	* Hand it over to the interpreter.
285	*/
286	CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
287	VBOXSTRICTRC rcStrict;
288	uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
289	RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
290	if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
291	{
292	rcStrict = IEMExecOne(pVCpu);
293	LogFlow(("emR3NemExecuteIOInstruction: %Rrc (IEMExecOne)\n", VBOXSTRICTRC_VAL(rcStrict)));
294	STAM_COUNTER_INC(&pVCpu->em.s.StatIoIem);
295	}
296	else
297	{
298	RT_UNTRUSTED_VALIDATED_FENCE();
299	rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
300	LogFlow(("emR3NemExecuteIOInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
301	STAM_COUNTER_INC(&pVCpu->em.s.StatIoRestarted);
302	}
303
304	STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
305	return VBOXSTRICTRC_TODO(rcStrict);
306	}
307
308
309	/**
310	* Process NEM specific forced actions.
311	*
312	* This function is called when any FFs in VM_FF_HIGH_PRIORITY_PRE_RAW_MASK
313	* or/and VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK are pending.
314	*
315	* @returns VBox status code. May return VINF_EM_NO_MEMORY but none of the other
316	* EM statuses.
317	* @param pVM The cross context VM structure.
318	* @param pVCpu The cross context virtual CPU structure.
319	*/
320	static int emR3NemForcedActions(PVM pVM, PVMCPU pVCpu)
321	{
322	/*
323	* Sync page directory should not happen in NEM mode.
324	*/
325	if (VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL))
326	{
327	Log(("NEM: TODO: Make VMCPU_FF_PGM_SYNC_CR3 / VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL quiet! (%#RX64)\n", (uint64_t)pVCpu->fLocalForcedActions));
328	VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL);
329	}
330
331	#ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
332	/*
333	* Allocate handy pages (just in case the above actions have consumed some pages).
334	*/
335	if (VM_FF_IS_PENDING_EXCEPT(pVM, VM_FF_PGM_NEED_HANDY_PAGES, VM_FF_PGM_NO_MEMORY))
336	{
337	int rc = PGMR3PhysAllocateHandyPages(pVM);
338	if (RT_FAILURE(rc))
339	return rc;
340	}
341	#endif
342
343	/*
344	* Check whether we're out of memory now.
345	*
346	* This may stem from some of the above actions or operations that has been executed
347	* since we ran FFs. The allocate handy pages must for instance always be followed by
348	* this check.
349	*/
350	if (VM_FF_IS_SET(pVM, VM_FF_PGM_NO_MEMORY))
351	return VINF_EM_NO_MEMORY;
352
353	return VINF_SUCCESS;
354	}
355
356
357	/**
358	* Executes hardware accelerated raw code. (Intel VT-x & AMD-V)
359	*
360	* This function contains the inner EM execution loop for NEM (the outer loop
361	* being in EMR3ExecuteVM()).
362	*
363	* @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE,
364	* VINF_EM_RESCHEDULE_REM, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
365	*
366	* @param pVM The cross context VM structure.
367	* @param pVCpu The cross context virtual CPU structure.
368	* @param pfFFDone Where to store an indicator telling whether or not
369	* FFs were done before returning.
370	*/
371	VBOXSTRICTRC emR3NemExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone)
372	{
373	VBOXSTRICTRC rcStrict = VERR_IPE_UNINITIALIZED_STATUS;
374
375	#ifdef VBOX_VMM_TARGET_ARMV8
376	LogFlow(("emR3NemExecute%d: (pc=%RGv)\n", pVCpu->idCpu, (RTGCPTR)pVCpu->cpum.GstCtx.Pc.u64));
377	#else
378	LogFlow(("emR3NemExecute%d: (cs:eip=%04x:%RGv)\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
379	#endif
380	*pfFFDone = false;
381
382	STAM_REL_COUNTER_INC(&pVCpu->em.s.StatNEMExecuteCalled);
383
384	/*
385	* Spin till we get a forced action which returns anything but VINF_SUCCESS.
386	*/
387	for (;;)
388	{
389	STAM_PROFILE_ADV_START(&pVCpu->em.s.StatNEMEntry, a);
390
391	/*
392	* Check that we can execute in NEM mode.
393	*/
394	if (NEMR3CanExecuteGuest(pVM, pVCpu))
395	{ /* likely */ }
396	else
397	{
398	rcStrict = VINF_EM_RESCHEDULE_REM;
399	break;
400	}
401
402	/*
403	* Process high priority pre-execution raw-mode FFs.
404	*/
405	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
406	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
407	{
408	rcStrict = emR3NemForcedActions(pVM, pVCpu);
409	if (rcStrict != VINF_SUCCESS)
410	break;
411	}
412
413	#if defined(LOG_ENABLED) && !defined(VBOX_VMM_TARGET_ARMV8)
414	/*
415	* Log important stuff before entering GC.
416	*/
417	if (TRPMHasTrap(pVCpu))
418	Log(("CPU%d: Pending hardware interrupt=0x%x cs:rip=%04X:%RGv\n", pVCpu->idCpu, TRPMGetTrapNo(pVCpu), pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
419
420	if (!(pVCpu->cpum.GstCtx.fExtrn & ( CPUMCTX_EXTRN_RIP \| CPUMCTX_EXTRN_CS \| CPUMCTX_EXTRN_RFLAGS \| CPUMCTX_EXTRN_SS
421	\| CPUMCTX_EXTRN_RSP \| CPUMCTX_EXTRN_CR0 \| CPUMCTX_EXTRN_CR4 \| CPUMCTX_EXTRN_EFER)))
422	{
423	uint32_t cpl = CPUMGetGuestCPL(pVCpu);
424	if (pVM->cCpus == 1)
425	{
426	if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
427	Log(("NEMV86: %08x IF=%d\n", pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
428	else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
429	Log(("NEMR%d: %04x:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
430	else
431	Log(("NEMR%d: %04x:%08x ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
432	}
433	else
434	{
435	if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
436	Log(("NEMV86-CPU%d: %08x IF=%d\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
437	else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
438	Log(("NEMR%d-CPU%d: %04x:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
439	else
440	Log(("NEMR%d-CPU%d: %04x:%08x ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
441	}
442	}
443	else if (pVM->cCpus == 1)
444	Log(("NEMRx: -> NEMR3RunGC\n"));
445	else
446	Log(("NEMRx-CPU%u: -> NEMR3RunGC\n", pVCpu->idCpu));
447	#endif /* LOG_ENABLED */
448
449	/*
450	* Execute the code.
451	*/
452	if (RT_LIKELY(emR3IsExecutionAllowed(pVM, pVCpu)))
453	{
454	STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatNEMEntry, a);
455	STAM_REL_PROFILE_START(&pVCpu->em.s.StatNEMExec, x);
456	rcStrict = NEMR3RunGC(pVM, pVCpu);
457	STAM_REL_PROFILE_STOP(&pVCpu->em.s.StatNEMExec, x);
458	}
459	else
460	{
461	/* Give up this time slice; virtual time continues */
462	STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatNEMEntry, a);
463	STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatCapped, u);
464	RTThreadSleep(5);
465	STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatCapped, u);
466	rcStrict = VINF_SUCCESS;
467	}
468
469
470	/*
471	* Deal with high priority post execution FFs before doing anything else.
472	*/
473	VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
474	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
475	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
476	rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict);
477
478	/*
479	* Process the returned status code.
480	*/
481	if (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST)
482	break;
483
484	rcStrict = emR3NemHandleRC(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
485	if (rcStrict != VINF_SUCCESS)
486	break;
487
488	/*
489	* Check and execute forced actions.
490	*/
491	#ifdef VBOX_HIGH_RES_TIMERS_HACK
492	TMTimerPollVoid(pVM, pVCpu);
493	#endif
494	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_ALL_MASK)
495	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_ALL_MASK))
496	{
497	rcStrict = emR3ForcedActions(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
498	VBOXVMM_EM_FF_ALL_RET(pVCpu, VBOXSTRICTRC_VAL(rcStrict));
499	if ( rcStrict != VINF_SUCCESS
500	&& rcStrict != VINF_EM_RESCHEDULE_EXEC_ENGINE)
501	{
502	*pfFFDone = true;
503	break;
504	}
505	}
506	}
507
508	/*
509	* Return to outer loop, making sure the fetch all state as we leave.
510	*
511	* Note! Not using CPUM_IMPORT_EXTRN_RET here, to prioritize an rcStrict error
512	* status over import errors.
513	*/
514	if (pVCpu->cpum.GstCtx.fExtrn)
515	{
516	int rcImport = NEMImportStateOnDemand(pVCpu, pVCpu->cpum.GstCtx.fExtrn);
517	AssertReturn(RT_SUCCESS(rcImport) \|\| RT_FAILURE_NP(rcStrict), rcImport);
518	}
519	#if defined(LOG_ENABLED) && defined(DEBUG)
520	RTLogFlush(NULL);
521	#endif
522	return rcStrict;
523	}
524

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source: vbox/trunk/src/VBox/VMM/VMMR3/EMR3Nem.cpp@ 107194

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